[PATCH] ASoC: fsl_sai: Set SYNC bit of TCR2 to Asynchronous Mode
From: Nicolin Chen guangyu.c...@freescale.com There is one design rule according to SAI's reference manual: If the transmitter bit clock and frame sync are to be used by both transmitter and receiver, the transmitter must be configured for asynchronous operation and the receiver for synchronous operation. And SYNC of TCR2 is a 2-width control bit: 00 Asynchronous mode. 01 Synchronous with receiver. 10 Synchronous with another SAI transmitter. 11 Synchronous with another SAI receiver. So the driver should have set SYNC bit of TCR2 to 0x0, and meanwhile set SYNC bit of RCR2 to 0x1 (Synchronous with transmitter). Signed-off-by: Nicolin Chen nicoleots...@gmail.com --- @Mark Sir, I don't see your last patch in your branch. So I guess we can still use this better fix which does not have the 64bit compiling issue either. sound/soc/fsl/fsl_sai.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index faa0497..9f10575 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -333,8 +333,7 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, * The transmitter bit clock and frame sync are to be * used by both the transmitter and receiver. */ - regmap_update_bits(sai-regmap, FSL_SAI_TCR2, FSL_SAI_CR2_SYNC, - ~FSL_SAI_CR2_SYNC); + regmap_update_bits(sai-regmap, FSL_SAI_TCR2, FSL_SAI_CR2_SYNC, 0); regmap_update_bits(sai-regmap, FSL_SAI_RCR2, FSL_SAI_CR2_SYNC, FSL_SAI_CR2_SYNC); -- 1.8.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/cpufreq: Add pr_warn() on OPAL firmware failures
On Sun, Aug 03, 2014 at 02:54:05PM +0530, Vaidyanathan Srinivasan wrote:
@@ -131,7 +136,12 @@ static unsigned int pstate_id_to_freq(int pstate_id)
int i;
i = powernv_pstate_info.max - pstate_id;
- BUG_ON(i = powernv_pstate_info.nr_pstates || i 0);
+ if (i = powernv_pstate_info.nr_pstates || i 0) {
+ pr_warn(PState id %d outside of PState table,
+ reporting nominal id %d instead\n,
+ pstate_id, powernv_pstate_info.nominal);
+ i = powernv_pstate_info.max - powernv_pstate_info.nominal;
As of now the default loglevel corresponds to KERN_WARNING so this
warning should get printed anyway. However, don't you think it would
be better if we make it a pr_err( ) since it's a platform error that's
causing the pstate_id to go out of bounds ?
Otherwise it looks ok.
Acked-by: Gautham R. Shenoy e...@linux.vnet.ibm.com
+ }
return powernv_freqs[i].frequency;
}
--
Thanks and Regards
gautham.
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Re: [PATCH v13 4/8] powerpc: add pmd_[dirty|mkclean] for THP
Minchan Kim minc...@kernel.org writes: MADV_FREE needs pmd_dirty and pmd_mkclean for detecting recent overwrite of the contents since MADV_FREE syscall is called for THP page. This patch adds pmd_dirty and pmd_mkclean for THP page MADV_FREE support. Cc: Benjamin Herrenschmidt b...@kernel.crashing.org Cc: Paul Mackerras pau...@samba.org Cc: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com Cc: linuxppc-dev@lists.ozlabs.org Reviewed-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com Signed-off-by: Minchan Kim minc...@kernel.org --- arch/powerpc/include/asm/pgtable-ppc64.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h index eb9261024f51..c9a4bbe8e179 100644 --- a/arch/powerpc/include/asm/pgtable-ppc64.h +++ b/arch/powerpc/include/asm/pgtable-ppc64.h @@ -468,9 +468,11 @@ static inline pte_t *pmdp_ptep(pmd_t *pmd) #define pmd_pfn(pmd) pte_pfn(pmd_pte(pmd)) #define pmd_young(pmd) pte_young(pmd_pte(pmd)) +#define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd)) #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd))) #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd))) #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd))) +#define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd))) #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd))) #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd))) -- 2.0.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: scheduler crash on Power
On 04/08/14 04:20, Michael Ellerman wrote:
On Fri, 2014-08-01 at 14:24 -0700, Sukadev Bhattiprolu wrote:
Dietmar Eggemann [dietmar.eggem...@arm.com] wrote:
| ltcbrazos2-lp07 login: [ 181.915974] [ cut here
]
| [ 181.915991] WARNING: at ../kernel/sched/core.c:5881
|
| This warning indicates the problem. One of the struct sched_domains does
| not have it's groups member set.
|
| And its happening during a rebuild of the sched domain hierarchy, not
| during the initial build.
|
| You could run your system with the following patch-let (on top of
| https://lkml.org/lkml/2014/7/17/288) w/ and w/o the perf related
| patches (w/ CONFIG_SCHED_DEBUG enabled).
|
| @@ -5882,6 +5882,9 @@ static void init_sched_groups_capacity(int cpu,
| struct sched_domain *sd)
| {
| struct sched_group *sg = sd-groups;
|
| +#ifdef CONFIG_SCHED_DEBUG
| + printk(sd name: %s span: %pc\n, sd-name, sd-span);
| +#endif
| WARN_ON(!sg);
|
| do {
|
| This will show if the rebuild of the sched domain hierarchy happens on
| both systems and hopefully indicate for which sched_domain the
| sd-groups is not set.
Thanks for the patch. It appears that the NUMA sched domain does not
have the sd-groups set - snippet of the error (with your patch and
Peter's patch)
[ 181.914494] build_sched_groups: got group c6da with cpus:
[ 181.914498] build_sched_groups: got group c000dd83 with cpus:
[ 181.915234] sd name: SMT span: 8-15
[ 181.915239] sd name: DIE span: 0-7
[ 181.915242] sd name: NUMA span: 0-15
[ 181.915250] [ cut here ]
[ 181.915253] WARNING: at ../kernel/sched/core.c:5891
Patched code:
5884 static void init_sched_groups_capacity(int cpu, struct
sched_domain *sd)
5885 {
5886 struct sched_group *sg = sd-groups;
5887
5888 #ifdef CONFIG_SCHED_DEBUG
5889 printk(sd name: %s span: %pc\n, sd-name, sd-span);
5890 #endif
5891 WARN_ON(!sg);
Complete log below.
I was able to bisect it down to this patch in the 24x7 patchset
https://lkml.org/lkml/2014/5/27/804
I replaced the kfree(page) calls in the patch with
kmem_cache_free(hv_page_cache, page).
The problem sems to disappear if the call to create_events_from_catalog()
in hv_24x7_init() is skipped. I am continuing to debug the 24x7 patch.
Is that patch just clobbering memory it doesn't own and corrupting the
scheduler data structures?
Quite likely. When the system comes up initially, it has SMT and DIE
sched domain level:
...
[0.033832] build_sched_groups: got group c000e7d5 with cpus:
[0.033835] build_sched_groups: got group c000e7d8 with cpus:
[0.033844] sd name: SMT span: 8-15
[0.033847] sd name: DIE span: 0-15 -- !!!
[0.033850] sd name: SMT span: 8-15
[0.033853] sd name: DIE span: 0-15
...
and the cpu mask of DIE spans all CPUs '0-15'.
Then during the rebuild of the sched domain hierarchy, this looks very
different:
...
[ 181.914494] build_sched_groups: got group c6da with cpus:
[ 181.914498] build_sched_groups: got group c000dd83 with cpus:
[ 181.915234] sd name: SMT span: 8-15
[ 181.915239] sd name: DIE span: 0-7 -- !!!
[ 181.915242] sd name: NUMA span: 0-15
...
The cpu mask of the DIE level is all the sudden '0-7', which is clearly
wrong.
So I suspect that sched_domain_mask_f mask function for the DIE level
'cpu_cpu_mask()' returns a wrong value during this rebuild.
Could be checked with this little patch-let:
@@ -6467,6 +6467,12 @@ struct sched_domain *build_sched_domain(struct
sched_domain_topology_level *tl,
if (!sd)
return child;
+ printk(%s: cpu: %d level: %s cpu_map: %pc tl-mask: %pc\n,
+ __func__,
+ cpu, tl-name,
+ cpu_map,
+ tl-mask(cpu));
+
cpumask_and(sched_domain_span(sd), cpu_map, tl-mask(cpu));
if (child) {
sd-level = child-level + 1;
Should give you something similar like:
...
build_sched_domain: cpu: 0 level: GMC cpu_map: 0-4 tl-mask: 0
build_sched_domain: cpu: 0 level: MC cpu_map: 0-4 tl-mask: 0-1
build_sched_domain: cpu: 0 level: DIE cpu_map: 0-4 tl-mask: 0-4
build_sched_domain: cpu: 1 level: GMC cpu_map: 0-4 tl-mask: 1
build_sched_domain: cpu: 1 level: MC cpu_map: 0-4 tl-mask: 0-1
build_sched_domain: cpu: 1 level: DIE cpu_map: 0-4 tl-mask: 0-4
...
cheers
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Re: [PATCH 0/2] ASoC: fsl_asrc: Fix two dereferenced variable before check
On Mon, Aug 04, 2014 at 12:19:47PM +0800, Nicolin Chen wrote: These two patches fixes two warning of dereferenced variable reported by Dan Carpenter dan.carpen...@oracle.com Applied both, thanks. signature.asc Description: Digital signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] ASoC: fsl_sai: Set SYNC bit of TCR2 to Asynchronous Mode
On Mon, Aug 04, 2014 at 03:07:25PM +0800, Nicolin Chen wrote: From: Nicolin Chen guangyu.c...@freescale.com There is one design rule according to SAI's reference manual: If the transmitter bit clock and frame sync are to be used by both transmitter and receiver, the transmitter must be configured for asynchronous operation and the receiver for synchronous operation. Applied, thanks. signature.asc Description: Digital signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 3.2 51/94] locking/mutex: Disable optimistic spinning on some architectures
3.2.62-rc1 review patch. If anyone has any objections, please let me know. -- From: Peter Zijlstra pet...@infradead.org commit 4badad352a6bb202ec68afa7a574c0bb961e5ebc upstream. The optimistic spin code assumes regular stores and cmpxchg() play nice; this is found to not be true for at least: parisc, sparc32, tile32, metag-lock1, arc-!llsc and hexagon. There is further wreckage, but this in particular seemed easy to trigger, so blacklist this. Opt in for known good archs. Signed-off-by: Peter Zijlstra pet...@infradead.org Reported-by: Mikulas Patocka mpato...@redhat.com Cc: David Miller da...@davemloft.net Cc: Chris Metcalf cmetc...@tilera.com Cc: James Bottomley james.bottom...@hansenpartnership.com Cc: Vineet Gupta vgu...@synopsys.com Cc: Jason Low jason.l...@hp.com Cc: Waiman Long waiman.l...@hp.com Cc: James E.J. Bottomley j...@parisc-linux.org Cc: Paul McKenney paul...@linux.vnet.ibm.com Cc: John David Anglin dave.ang...@bell.net Cc: James Hogan james.ho...@imgtec.com Cc: Linus Torvalds torva...@linux-foundation.org Cc: Davidlohr Bueso davidl...@hp.com Cc: Benjamin Herrenschmidt b...@kernel.crashing.org Cc: Catalin Marinas catalin.mari...@arm.com Cc: Russell King li...@arm.linux.org.uk Cc: Will Deacon will.dea...@arm.com Cc: linux-arm-ker...@lists.infradead.org Cc: linux-ker...@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: sparcli...@vger.kernel.org Link: http://lkml.kernel.org/r/20140606175316.gv13...@laptop.programming.kicks-ass.net Signed-off-by: Ingo Molnar mi...@kernel.org [bwh: Backported to 3.2: - Adjust context - Drop arm64 change] Signed-off-by: Ben Hutchings b...@decadent.org.uk --- --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1,6 +1,7 @@ config ARM bool default y + select ARCH_SUPPORTS_ATOMIC_RMW select HAVE_DMA_API_DEBUG select HAVE_IDE if PCI || ISA || PCMCIA select HAVE_MEMBLOCK --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -137,6 +137,7 @@ config PPC select HAVE_BPF_JIT if (PPC64 NET) select HAVE_ARCH_JUMP_LABEL select ARCH_HAVE_NMI_SAFE_CMPXCHG + select ARCH_SUPPORTS_ATOMIC_RMW config EARLY_PRINTK bool --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -57,6 +57,7 @@ config SPARC64 select IRQ_PREFLOW_FASTEOI select ARCH_HAVE_NMI_SAFE_CMPXCHG select HAVE_C_RECORDMCOUNT + select ARCH_SUPPORTS_ATOMIC_RMW config ARCH_DEFCONFIG string --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -75,6 +75,7 @@ config X86 select HAVE_BPF_JIT if (X86_64 NET) select CLKEVT_I8253 select ARCH_HAVE_NMI_SAFE_CMPXCHG + select ARCH_SUPPORTS_ATOMIC_RMW config INSTRUCTION_DECODER def_bool (KPROBES || PERF_EVENTS) --- a/kernel/Kconfig.locks +++ b/kernel/Kconfig.locks @@ -198,5 +198,9 @@ config INLINE_WRITE_UNLOCK_IRQ config INLINE_WRITE_UNLOCK_IRQRESTORE def_bool !DEBUG_SPINLOCK ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE +config ARCH_SUPPORTS_ATOMIC_RMW + bool + config MUTEX_SPIN_ON_OWNER - def_bool SMP !DEBUG_MUTEXES + def_bool y + depends on SMP !DEBUG_MUTEXES ARCH_SUPPORTS_ATOMIC_RMW ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] Avoid bashisms
From 300a98f895dc7e2167cf379408322a9607907761 Mon Sep 17 00:00:00 2001
From: malc av1...@comtv.ru
Date: Mon, 4 Aug 2014 23:28:05 +0400
Subject: [PATCH] Avoid bashisms
---
arch/powerpc/kernel/prom_init_check.sh | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/prom_init_check.sh
b/arch/powerpc/kernel/prom_init_check.sh
index fe8e54b..413f792 100644
--- a/arch/powerpc/kernel/prom_init_check.sh
+++ b/arch/powerpc/kernel/prom_init_check.sh
@@ -50,22 +50,22 @@ do
done
# ignore register save/restore funcitons
- if [ ${UNDEF:0:9} = _restgpr_ ]; then
+ if [ $(printf %.9s $UNDEF) = _restgpr_ ]; then
OK=1
fi
- if [ ${UNDEF:0:10} = _restgpr0_ ]; then
+ if [ $(printf %.10s $UNDEF) = _restgpr0_ ]; then
OK=1
fi
- if [ ${UNDEF:0:11} = _rest32gpr_ ]; then
+ if [ $(printf %.11s $UNDEF) = _rest32gpr_ ]; then
OK=1
fi
- if [ ${UNDEF:0:9} = _savegpr_ ]; then
+ if [ $(printf %.9s $UNDEF) = _savegpr_ ]; then
OK=1
fi
- if [ ${UNDEF:0:10} = _savegpr0_ ]; then
+ if [ $(printf %.10s $UNDEF) = _savegpr0_ ]; then
OK=1
fi
- if [ ${UNDEF:0:11} = _save32gpr_ ]; then
+ if [ $(printf %.11s $UNDEF) = _save32gpr_ ]; then
OK=1
fi
--
2.0.0.GIT
--
mailto:av1...@comtv.ru
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[PATCH] Simplify symbol check in prom_init_check.sh
Signed-off-by: Andreas Schwab sch...@linux-m68k.org
---
arch/powerpc/kernel/prom_init_check.sh | 22 ++
1 file changed, 6 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/kernel/prom_init_check.sh
b/arch/powerpc/kernel/prom_init_check.sh
index fe8e54b..12640f7 100644
--- a/arch/powerpc/kernel/prom_init_check.sh
+++ b/arch/powerpc/kernel/prom_init_check.sh
@@ -50,24 +50,14 @@ do
done
# ignore register save/restore funcitons
- if [ ${UNDEF:0:9} = _restgpr_ ]; then
+ case $UNDEF in
+ _restgpr_*|_restgpr0_*|_rest32gpr_*)
OK=1
- fi
- if [ ${UNDEF:0:10} = _restgpr0_ ]; then
- OK=1
- fi
- if [ ${UNDEF:0:11} = _rest32gpr_ ]; then
- OK=1
- fi
- if [ ${UNDEF:0:9} = _savegpr_ ]; then
+ ;;
+ _savegpr_*|_savegpr0_*|_save32gpr_*)
OK=1
- fi
- if [ ${UNDEF:0:10} = _savegpr0_ ]; then
- OK=1
- fi
- if [ ${UNDEF:0:11} = _save32gpr_ ]; then
- OK=1
- fi
+ ;;
+ esac
if [ $OK -eq 0 ]; then
ERROR=1
--
2.0.4
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
And now for something completely different.
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Re: spi, spi_fsl-spi.c not working?
On Thu, 2014-07-17 at 11:11 +0200, Heiko Schocher wrote:
Hello all,
I just tried a mpc83xx based board (similiar to the mpc8313erdb)
with linux v3.16-rc4 using the drivers/spi/spi-fsl-spi.c driver.
DT nodes for spi are the same as in arch/powerpc/boot/dts/mpc8313erdb.dts:
spi@7000 {
cell-index = 0;
compatible = fsl,spi;
reg = 0x7000 0x1000;
interrupts = 16 0x8;
interrupt-parent = ipic;
mode = cpu;
};
Bootlog shows:
[1.341411] fsl_spi f0007000.spi: master is unqueued, this is deprecated
[1.554405] [ cut here ]
[1.559080] WARNING: at c023a958 [verbose debug info unavailable]
If you haven't already resolved this, could you enable verbose debug
info (or use gdb) to get the line number?
I don't see the WARNING when booting mpc8379rdb with SPI enabled (though
I do see the master is unqueued message). I don't have easy access to
an mpc8313erdb to test on.
-Scott
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[PATCH] arch/powerpc/mm/numa.c: Fix break placement
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=81631 Reported-by: David Binderman dcb...@hotmail.com Signed-off-by: Andrey Utkin andrey.krieger.ut...@gmail.com --- arch/powerpc/mm/numa.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index 3b181b2..d3e9a78 100644 --- a/arch/powerpc/mm/numa.c +++ b/arch/powerpc/mm/numa.c @@ -611,8 +611,8 @@ static int cpu_numa_callback(struct notifier_block *nfb, unsigned long action, case CPU_UP_CANCELED: case CPU_UP_CANCELED_FROZEN: unmap_cpu_from_node(lcpu); - break; ret = NOTIFY_OK; + break; #endif } return ret; -- 1.8.5.5 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 2/2] powerpc/nohash: Split __early_init_mmu() into boot and secondary
On Fri, 2014-08-01 at 22:07 -0500, Scott Wood wrote:
-void __init early_init_mmu(void)
-{
- __early_init_mmu(1);
-}
-
void early_init_mmu_secondary(void)
{
- __early_init_mmu(0);
+ early_init_mmu_allcpus();
}
Small nit, it took me 30s too long to figure out what you were doing due
to the naming above :)
Call the latter early_init_this_mmu() and keep the global one separate
such that early_init_mmu() does:
early_init_mmu_common();
early_init_this_mmu();
Cheers,
Ben.
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[PATCH] powerpc: Remove powerpc specific cmd_line
There is no need for yet another copy of the command line, just
use boot_command_line like everyone else.
Signed-off-by: Anton Blanchard an...@samba.org
---
Index: b/arch/powerpc/include/asm/machdep.h
===
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -326,8 +326,6 @@ extern struct machdep_calls *machine_id;
extern void probe_machine(void);
-extern char cmd_line[COMMAND_LINE_SIZE];
-
#ifdef CONFIG_PPC_PMAC
/*
* Power macintoshes have either a CUDA, PMU or SMU controlling
Index: b/arch/powerpc/kernel/prom.c
===
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -665,14 +665,12 @@ void __init early_init_devtree(void *par
* device-tree, including the platform type, initrd location and
* size, TCE reserve, and more ...
*/
- of_scan_flat_dt(early_init_dt_scan_chosen_ppc, cmd_line);
+ of_scan_flat_dt(early_init_dt_scan_chosen_ppc, boot_command_line);
/* Scan memory nodes and rebuild MEMBLOCKs */
of_scan_flat_dt(early_init_dt_scan_root, NULL);
of_scan_flat_dt(early_init_dt_scan_memory_ppc, NULL);
- /* Save command line for /proc/cmdline and then parse parameters */
- strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
parse_early_param();
/* make sure we've parsed cmdline for mem= before this */
Index: b/arch/powerpc/kernel/setup-common.c
===
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -81,8 +81,6 @@ EXPORT_SYMBOL_GPL(boot_cpuid);
unsigned long klimit = (unsigned long) _end;
-char cmd_line[COMMAND_LINE_SIZE];
-
/*
* This still seems to be needed... -- paulus
*/
Index: b/arch/powerpc/kernel/setup_32.c
===
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -268,7 +268,7 @@ static void __init exc_lvl_early_init(vo
/* Warning, IO base is not yet inited */
void __init setup_arch(char **cmdline_p)
{
- *cmdline_p = cmd_line;
+ *cmdline_p = boot_command_line;
/* so udelay does something sensible, assume = 1000 bogomips */
loops_per_jiffy = 5 / HZ;
Index: b/arch/powerpc/kernel/setup_64.c
===
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -653,7 +653,7 @@ void __init setup_arch(char **cmdline_p)
{
ppc64_boot_msg(0x12, Setup Arch);
- *cmdline_p = cmd_line;
+ *cmdline_p = boot_command_line;
/*
* Set cache line size based on type of cpu as a default.
Index: b/arch/powerpc/mm/init_32.c
===
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -106,11 +106,11 @@ unsigned long __max_low_memory = MAX_LOW
void MMU_setup(void)
{
/* Check for nobats option (used in mapin_ram). */
- if (strstr(cmd_line, nobats)) {
+ if (strstr(boot_command_line, nobats)) {
__map_without_bats = 1;
}
- if (strstr(cmd_line, noltlbs)) {
+ if (strstr(boot_command_line, noltlbs)) {
__map_without_ltlbs = 1;
}
#ifdef CONFIG_DEBUG_PAGEALLOC
Index: b/arch/powerpc/platforms/chrp/setup.c
===
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -258,7 +258,7 @@ static void chrp_init_early(void)
struct device_node *node;
const char *property;
- if (strstr(cmd_line, console=))
+ if (strstr(boot_command_line, console=))
return;
/* find the boot console from /chosen/stdout */
if (!of_chosen)
Index: b/arch/powerpc/platforms/powermac/setup.c
===
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -336,7 +336,7 @@ static void __init pmac_setup_arch(void)
#endif
#ifdef CONFIG_ADB
- if (strstr(cmd_line, adb_sync)) {
+ if (strstr(boot_command_line, adb_sync)) {
extern int __adb_probe_sync;
__adb_probe_sync = 1;
}
@@ -460,7 +460,7 @@ pmac_halt(void)
static void __init pmac_init_early(void)
{
/* Enable early btext debug if requested */
- if (strstr(cmd_line, btextdbg)) {
+ if (strstr(boot_command_line, btextdbg)) {
udbg_adb_init_early();
register_early_udbg_console();
}
@@ -469,8 +469,8 @@ static void __init pmac_init_early(void)
pmac_feature_init();
/* Initialize debug stuff */
- udbg_scc_init(!!strstr(cmd_line, sccdbg));
-
[PATCH 1/2] powerpc: Hard disable interrupts in xmon
xmon only soft disables interrupts. This seems like a bad idea - we
certainly don't want decrementer and PMU exceptions going off when
we are debugging something inside xmon.
This issue was uncovered when the hard lockup detector went off
inside xmon. To ensure we wont get a spurious hard lockup warning,
I also call touch_nmi_watchdog() when exiting xmon.
Signed-off-by: Anton Blanchard an...@samba.org
---
Index: b/arch/powerpc/xmon/xmon.c
===
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -24,6 +24,7 @@
#include linux/interrupt.h
#include linux/irq.h
#include linux/bug.h
+#include linux/nmi.h
#include asm/ptrace.h
#include asm/string.h
@@ -374,6 +375,7 @@ static int xmon_core(struct pt_regs *reg
#endif
local_irq_save(flags);
+ hard_irq_disable();
bp = in_breakpoint_table(regs-nip, offset);
if (bp != NULL) {
@@ -558,6 +560,7 @@ static int xmon_core(struct pt_regs *reg
#endif
insert_cpu_bpts();
+ touch_nmi_watchdog();
local_irq_restore(flags);
return cmd != 'X' cmd != EOF;
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[PATCH 2/2] powerpc: Add ppc64 hard lockup detector support
The hard lockup detector uses a PMU event as a periodic NMI to
detect if we are stuck (where stuck means no timer interrupts have
occurred).
Ben's rework of the ppc64 soft disable code has made ppc64 PMU
exceptions a partial NMI. They can get disabled if an external interrupt
comes in, but otherwise PMU interrupts will fire in interrupt disabled
regions.
I wrote a kernel module to test this patch and noticed we sometimes
missed hard lockup warnings. The RCU code detected the stall first and
issued an IPI to backtrace all CPUs. Unfortunately an IPI is an external
interrupt and that will hard disable interrupts, preventing the hard
lockup detector from going off.
If I reduced the hard lockup threshold to 5 seconds:
echo 5 /proc/sys/kernel/watchdog_thresh
Then it would beat the RCU code in detecting a stall and get a
correct backtrace out.
Another downside is that our PMCs can only count to 2^31, so even when
we ask for 10 seconds of processor cycles, we end up taking a couple
of PMU exceptions a second.
Signed-off-by: Anton Blanchard an...@samba.org
---
Index: b/arch/powerpc/Kconfig
===
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -145,6 +145,7 @@ config PPC
select HAVE_IRQ_EXIT_ON_IRQ_STACK
select ARCH_USE_CMPXCHG_LOCKREF if PPC64
select HAVE_ARCH_AUDITSYSCALL
+ select HAVE_PERF_EVENTS_NMI if PPC64
config GENERIC_CSUM
def_bool CPU_LITTLE_ENDIAN
Index: b/arch/powerpc/include/asm/nmi.h
===
--- /dev/null
+++ b/arch/powerpc/include/asm/nmi.h
@@ -0,0 +1,4 @@
+#ifndef _ASM_NMI_H
+#define _ASM_NMI_H
+
+#endif /* _ASM_NMI_H */
Index: b/arch/powerpc/kernel/setup_64.c
===
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -796,3 +796,10 @@ unsigned long memory_block_size_bytes(vo
struct ppc_pci_io ppc_pci_io;
EXPORT_SYMBOL(ppc_pci_io);
#endif
+
+#ifdef CONFIG_HARDLOCKUP_DETECTOR
+u64 hw_nmi_get_sample_period(int watchdog_thresh)
+{
+ return ppc_proc_freq * watchdog_thresh;
+}
+#endif
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