Re: [PATCH] selftests/powerpc: Add .gitignore for powerpc selftests
On 01/14/2015 07:45 AM, Michael Ellerman wrote: On Tue, 2015-01-13 at 17:16 -0700, Shuah Khan wrote: Please add a commit log. What does it need to say? On 01/13/2015 04:49 PM, Michael Ellerman wrote: Signed-off-by: Michael Ellerman m...@ellerman.id.au --- .../testing/selftests/powerpc/copyloops/.gitignore | 4 tools/testing/selftests/powerpc/mm/.gitignore | 1 + tools/testing/selftests/powerpc/pmu/.gitignore | 3 +++ tools/testing/selftests/powerpc/pmu/ebb/.gitignore | 22 ++ .../selftests/powerpc/primitives/.gitignore| 1 + tools/testing/selftests/powerpc/tm/.gitignore | 1 + 6 files changed, 32 insertions(+) create mode 100644 tools/testing/selftests/powerpc/copyloops/.gitignore create mode 100644 tools/testing/selftests/powerpc/mm/.gitignore create mode 100644 tools/testing/selftests/powerpc/pmu/.gitignore create mode 100644 tools/testing/selftests/powerpc/pmu/ebb/.gitignore create mode 100644 tools/testing/selftests/powerpc/primitives/.gitignore create mode 100644 tools/testing/selftests/powerpc/tm/.gitignore Please create a single .gitignore for all targets right under tools/testing/selftests/powerpc instead of multiple .gitignore files. Why? Having separate files makes it less likely we'll get merge conflicts between different test subdirectores, it also makes it more likely someone adding a test will notice they need to update the .gitignore in the same directory. Hey Michael, I had already posted a similar patch in this regard along with the ptrace patches last month. Thats why I mentioned in the cover letter that gitignore updates for all these tests will come from that patch series instead of from this one. https://lkml.org/lkml/2014/12/2/80 Regards Anshuman ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: offlining cpus breakage
Hi,
On Wednesday 07 January 2015 03:07 PM, Alexey Kardashevskiy wrote:
Hi!
ppc64_cpu --smt=off produces multiple error on the latest upstream kernel
(sha1 bdec419):
NMI watchdog: BUG: soft lockup - CPU#20 stuck for 23s! [swapper/20:0]
or
INFO: rcu_sched detected stalls on CPUs/tasks: { 2 7 8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23 2
4 25 26 27 28 29 30 31} (detected by 6, t=2102 jiffies, g=1617, c=1616,
q=1441)
and many others, all about lockups
I did bisecting and found out that reverting these helps:
77b54e9f213f76a23736940cf94bcd765fc00f40 powernv/powerpc: Add winkle
support for offline cpus
7cba160ad789a3ad7e68b92bf20eaad6ed171f80 powernv/cpuidle: Redesign idle
states management
8eb8ac89a364305d05ad16be983b7890eb462cc3 powerpc/powernv: Enable Offline
CPUs to enter deep idle states
btw reverting just two of them produces a compile error.
It is pseries_le_defconfig, POWER8 machine:
timebase: 51200
platform: PowerNV
model : palmetto
machine : PowerNV palmetto
firmware: OPAL v3
Please help to fix it. Thanks.
Upon investigation, we figured that the cpu is stuck in cpu_idle_poll
loop in kernel/sched/idle.c leading us to believe the bug is in timer
offload framework which fastsleep uses. Preeti and I are working on a
fix. We'll post it out as soon as possible.
Thanks,
Shreyas
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Re: [PATCH v3 2/3] pstore: Add pstore type id for firmware partition
On Wed, 2014-12-24 at 17:28 +0530, Hari Bathini wrote: This patch adds a pstore type id to be used for opal specific nvram partitions. This needs to be CC'ed to the pstore maintainers, and at the very least get an ACK from them. They also might ask why we need another powerpc specific pstore type, we already have 3 of the 7 that exist. cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v3 1/3] powerpc/nvram: move generic code for nvram and pstore
On Wed, 2014-12-24 at 17:28 +0530, Hari Bathini wrote: With minor checks, we can move most of the code for nvram under pseries to a common place to be re-used by other powerpc platforms like powernv. This patch moves such common code to arch/powerpc/kernel/nvram_64.c file. As I said in my reply to the previous version: ... you need to keep in mind that it is very common for us to build kernels with both POWERNV=y and PSERIES=y. So you need to make sure you're only using CONFIG_PPC_PSERIES to protect things that are optional on pseries. Not things that we *shouldn't* be doing on powernv. Please explain in your commit message how you have dealt with that. Also, you broke the build for every config that doesn't have CONFIG_PPC_PSERIES, all 95 of them. This is pasemi_defconfig for example: LD arch/powerpc/mm/built-in.o arch/powerpc/mm/init_64.o: In function `clobbering_unread_rtas_event': init_64.c:(.opd+0x48): multiple definition of `clobbering_unread_rtas_event' arch/powerpc/mm/mem.o:mem.c:(.opd+0x90): first defined here arch/powerpc/mm/init_64.o: In function `.clobbering_unread_rtas_event': init_64.c:(.text+0x80): multiple definition of `.clobbering_unread_rtas_event' arch/powerpc/mm/mem.o:mem.c:(.text+0x2c0): first defined here CC arch/powerpc/kernel/udbg.o /home/kisskb/slave/src/scripts/Makefile.build:336: recipe for target 'arch/powerpc/mm/built-in.o' failed make[2]: *** [arch/powerpc/mm/built-in.o] Error 1 /home/kisskb/slave/src/Makefile:938: recipe for target 'arch/powerpc/mm' failed make[1]: *** [arch/powerpc/mm] Error 2 make[1]: *** Waiting for unfinished jobs cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc: Remove old compile time disabled syscall tracing code
We have code to do syscall tracing which is disabled at compile time by default. It's not been touched since the dawn of time (ie. v2.6.12). There are now better ways to do syscall tracing, ie. using the raw_syscall, or syscall tracepoints. For the specific case of tracing syscalls at boot on a system that doesn't get to userspace, you can boot with: trace_event=syscalls tp_printk=on Which will trace syscalls from boot, and echo all output to the console. Signed-off-by: Michael Ellerman m...@ellerman.id.au --- arch/powerpc/kernel/entry_32.S | 77 -- arch/powerpc/kernel/entry_64.S | 13 --- arch/powerpc/kernel/syscalls.c | 14 3 files changed, 104 deletions(-) diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S index 10a093579191..cb8ef68a1ae5 100644 --- a/arch/powerpc/kernel/entry_32.S +++ b/arch/powerpc/kernel/entry_32.S @@ -33,9 +33,6 @@ #include asm/ftrace.h #include asm/ptrace.h -#undef SHOW_SYSCALLS -#undef SHOW_SYSCALLS_TASK - /* * MSR_KERNEL is 0x1 on 4xx/Book-E since it include MSR_CE. */ @@ -307,9 +304,6 @@ _GLOBAL(DoSyscall) lwz r11,_CCR(r1)/* Clear SO bit in CR */ rlwinm r11,r11,0,4,2 stw r11,_CCR(r1) -#ifdef SHOW_SYSCALLS - bl do_show_syscall -#endif /* SHOW_SYSCALLS */ #ifdef CONFIG_TRACE_IRQFLAGS /* Return from syscalls can (and generally will) hard enable * interrupts. You aren't supposed to call a syscall with @@ -352,9 +346,6 @@ syscall_dotrace_cont: blrl/* Call handler */ .globl ret_from_syscall ret_from_syscall: -#ifdef SHOW_SYSCALLS - bl do_show_syscall_exit -#endif mr r6,r3 CURRENT_THREAD_INFO(r12, r1) /* disable interrupts so current_thread_info()-flags can't change */ @@ -523,74 +514,6 @@ syscall_exit_work: bl do_syscall_trace_leave b ret_from_except_full -#ifdef SHOW_SYSCALLS -do_show_syscall: -#ifdef SHOW_SYSCALLS_TASK - lis r11,show_syscalls_task@ha - lwz r11,show_syscalls_task@l(r11) - cmp 0,r2,r11 - bnelr -#endif - stw r31,GPR31(r1) - mflrr31 - lis r3,7f@ha - addir3,r3,7f@l - lwz r4,GPR0(r1) - lwz r5,GPR3(r1) - lwz r6,GPR4(r1) - lwz r7,GPR5(r1) - lwz r8,GPR6(r1) - lwz r9,GPR7(r1) - bl printk - lis r3,77f@ha - addir3,r3,77f@l - lwz r4,GPR8(r1) - mr r5,r2 - bl printk - lwz r0,GPR0(r1) - lwz r3,GPR3(r1) - lwz r4,GPR4(r1) - lwz r5,GPR5(r1) - lwz r6,GPR6(r1) - lwz r7,GPR7(r1) - lwz r8,GPR8(r1) - mtlrr31 - lwz r31,GPR31(r1) - blr - -do_show_syscall_exit: -#ifdef SHOW_SYSCALLS_TASK - lis r11,show_syscalls_task@ha - lwz r11,show_syscalls_task@l(r11) - cmp 0,r2,r11 - bnelr -#endif - stw r31,GPR31(r1) - mflrr31 - stw r3,RESULT(r1) /* Save result */ - mr r4,r3 - lis r3,79f@ha - addir3,r3,79f@l - bl printk - lwz r3,RESULT(r1) - mtlrr31 - lwz r31,GPR31(r1) - blr - -7: .string syscall %d(%x, %x, %x, %x, %x, -77:.string %x), current=%p\n -79:.string - %x\n - .align 2,0 - -#ifdef SHOW_SYSCALLS_TASK - .data - .globl show_syscalls_task -show_syscalls_task: - .long -1 - .text -#endif -#endif /* SHOW_SYSCALLS */ - /* * The fork/clone functions need to copy the full register set into * the child process. Therefore we need to save all the nonvolatile diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 194e46dcf08d..c6dcb560c295 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S @@ -49,8 +49,6 @@ exception_marker: .section.text .align 7 -#undef SHOW_SYSCALLS - .globl system_call_common system_call_common: andi. r10,r12,MSR_PR @@ -142,13 +140,6 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR) li r10,1 std r10,SOFTE(r1) -#ifdef SHOW_SYSCALLS - bl do_show_syscall - REST_GPR(0,r1) - REST_4GPRS(3,r1) - REST_2GPRS(7,r1) - addir9,r1,STACK_FRAME_OVERHEAD -#endif CURRENT_THREAD_INFO(r11, r1) ld r10,TI_FLAGS(r11) andi. r11,r10,_TIF_SYSCALL_T_OR_A @@ -180,10 +171,6 @@ system_call: /* label this so stack traces look sane */ syscall_exit: std r3,RESULT(r1) -#ifdef SHOW_SYSCALLS - bl do_show_syscall_exit - ld r3,RESULT(r1) -#endif CURRENT_THREAD_INFO(r12, r1) ld r8,_MSR(r1) diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c index cd9be9aa016d..b2702e87db0d
Re: [V6,1/9] elf: Add new powerpc specifc core note sections
On 01/01/2015 01:38 PM, Anshuman Khandual wrote: Also, we've noticed that the 'misc' regset contains registers from different ISA versions (dscr and ppr appear in ISA 2.05, tar is from 2.07). I'm not sure if there is a way to detect presence/validity of such registers, but perhaps it might be a good idea to separate registers from different ISAs in different regsets. Thats right, will use feature CPU_FTR_ARCH_207S (which checks whether we are v2.07 compliant) to detect whether TAR register is available or not. Need to correct something here. Run time detection of the presence of TAR register through the feature bit CPU_FTR_ARCH_207S as I had mentioned before is not required. Right now we take care of the compile time availability of the individual registers the same way it is present on the thread struct. In the systems which do not have the TAR register, thread.tar is always going to be 0 which is exactly the same value we would get by excluding tar register copy after the run time detection of the feature. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH V10 00/17] Enable SRIOV on Power8
On Mon, Dec 22, 2014 at 02:05:22PM +0800, Wei Yang wrote: Bjorn, This patch set is tested on 3.19-rc1 and with the offset/stride update patch. I see your comment on the MEM64 issue, so if that is reverted, this patch set will not work. While I think we can work in parallel, I sent it here for more comment and to see whether I understand your previous comments correctly. I will work with Yinghai to find a way to fix the bug 85491, hope linux kernel could handle both cases. OK. The autobuilder found some minor issues, so I'll look for a v11 posting that fixes those. Please pick up the changelogs from my pci/virtualization branch because I rewrapped them so they fit in 80 columns when shown by git log. Bjorn ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 3/6] powerpc/ps3: Write highmem info to repository
Hi Michael, On Tue, 2015-01-13 at 14:04 +1100, Michael Ellerman wrote: On Tue, 2015-01-13 at 01:00 +, Geoff Levand wrote: Add calls to the ps3_mm_set_repository_highmem() routine when the ps3 r1 highmem region is either created or destroyed. What does this actually do? ie. from a user perspective. It will allow a kexec based bootloader (petitboot for example) to pre-allocate a highmem region and store things like an initrd or other large data needed to boot an OS. With some PS3 configurations the boot memory region is not large enough to fit all the boot data. There was ongoing discussion about this on the ML. Here are two relevant posts: https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-April/097691.html https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-April/097695.html Here is the very first post which outlines the motivation, etc.: https://lists.ozlabs.org/pipermail/cbe-oss-dev/2011-August/007420.html -Geoff ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH V7 5/8] powerpc, ptrace: Enable support for transactional memory register sets
This patch enables get and set of transactional memory related register
sets through PTRACE_GETREGSET-PTRACE_SETREGSET interface by implementing
four new powerpc specific register sets i.e REGSET_TM_SPR, REGSET_TM_CGPR,
REGSET_TM_CFPR, REGSET_CVMX support corresponding to these following new
ELF core note types added previously in this regard.
(1) NT_PPC_TM_SPR
(2) NT_PPC_TM_CGPR
(3) NT_PPC_TM_CFPR
(4) NT_PPC_TM_CVMX
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/uapi/asm/elf.h | 2 +
arch/powerpc/kernel/ptrace.c| 714 +++-
2 files changed, 701 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/include/uapi/asm/elf.h
b/arch/powerpc/include/uapi/asm/elf.h
index 59dad11..fdc8e2f 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -91,6 +91,8 @@
#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
#define ELF_NFPREG 33 /* includes fpscr */
+#define ELF_NVMX 34 /* includes all vector registers */
+#define ELF_NTMSPRREG 7 /* includes TM sprs, org_msr, dscr, tar, ppr */
typedef unsigned long elf_greg_t64;
typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 2bbbd10..b14397c 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -63,6 +63,11 @@ struct pt_regs_offset {
{.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
#define REG_OFFSET_END {.name = NULL, .offset = 0}
+/* Some common structure offsets */
+#define TSO(f) (offsetof(struct thread_struct, f))
+#define TVSO(f)(offsetof(struct thread_vr_state, f))
+#define TFSO(f)(offsetof(struct thread_fp_state, f))
+
static const struct pt_regs_offset regoffset_table[] = {
GPR_OFFSET_NAME(0),
GPR_OFFSET_NAME(1),
@@ -792,6 +797,579 @@ static int evr_set(struct task_struct *target, const
struct user_regset *regset,
}
#endif /* CONFIG_SPE */
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+/**
+ * tm_spr_active - get active number of registers in TM SPR
+ * @target:The target task.
+ * @regset:The user regset structure.
+ *
+ * This function checks the active number of available
+ * regisers in the transactional memory SPR category.
+ */
+static int tm_spr_active(struct task_struct *target,
+const struct user_regset *regset)
+{
+ if (!cpu_has_feature(CPU_FTR_TM))
+ return -ENODEV;
+
+ if (!MSR_TM_ACTIVE(target-thread.regs-msr))
+ return 0;
+
+ return regset-n;
+}
+
+/**
+ * tm_spr_get - get the TM related SPR registers
+ * @target:The target task.
+ * @regset:The user regset structure.
+ * @pos: The buffer position.
+ * @count: Number of bytes to copy.
+ * @kbuf: Kernel buffer to copy from.
+ * @ubuf: User buffer to copy into.
+ *
+ * This function gets transactional memory related SPR registers.
+ * The userspace interface buffer layout is as follows.
+ *
+ * struct {
+ * u64 tm_tfhar;
+ * u64 tm_texasr;
+ * u64 tm_tfiar;
+ * unsigned long tm_orig_msr;
+ * unsigned long tm_tar;
+ * unsigned long tm_ppr;
+ * unsigned long tm_dscr;
+ * };
+ */
+static int tm_spr_get(struct task_struct *target,
+ const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ int ret;
+
+ /* Build tests */
+ BUILD_BUG_ON(TSO(tm_tfhar) + sizeof(u64) != TSO(tm_texasr));
+ BUILD_BUG_ON(TSO(tm_texasr) + sizeof(u64) != TSO(tm_tfiar));
+ BUILD_BUG_ON(TSO(tm_tfiar) + sizeof(u64) != TSO(tm_orig_msr));
+ BUILD_BUG_ON(TSO(ckpt_regs) + sizeof(struct pt_regs) != TSO(tm_tar));
+ BUILD_BUG_ON(TSO(tm_tar) + sizeof(unsigned long) != TSO(tm_ppr));
+ BUILD_BUG_ON(TSO(tm_ppr) + sizeof(unsigned long) != TSO(tm_dscr));
+
+ if (!cpu_has_feature(CPU_FTR_TM))
+ return -ENODEV;
+
+ if (!MSR_TM_ACTIVE(target-thread.regs-msr))
+ return -ENODATA;
+
+ /* Flush the states */
+ flush_fp_to_thread(target);
+ flush_altivec_to_thread(target);
+ flush_tmregs_to_thread(target);
+
+ /* TFHAR register */
+ ret = user_regset_copyout(pos, count, kbuf, ubuf,
+ target-thread.tm_tfhar, 0, sizeof(u64));
+
+ /* TEXASR register */
+ if (!ret)
+ ret = user_regset_copyout(pos, count, kbuf, ubuf,
+ target-thread.tm_texasr, sizeof(u64),
+ 2 * sizeof(u64));
+
+ /* TFIAR register */
+ if (!ret)
+ ret = user_regset_copyout(pos, count, kbuf, ubuf,
+ target-thread.tm_tfiar,
+ 2
[PATCH V7 4/8] powerpc, ptrace: Enable vr_(get/set) for transactional memory
This patch enables the vr_get which gets the running value of all
the VMX registers and the vr_set which sets the running value of
of all the VMX registers to accommodate in transaction ptrace
interface based requests.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/kernel/ptrace.c | 94 ++--
1 file changed, 91 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index fd36b32..2bbbd10 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -523,10 +523,30 @@ static int vr_active(struct task_struct *target,
return target-thread.used_vr ? regset-n : 0;
}
+/*
+ * vr_get
+ *
+ * When the transaction is active, 'transact_vr' holds the current running
+ * value of all the VMX registers and 'vr_state' holds the last checkpointed
+ * value of all the VMX registers for the current transaction to fall back
+ * on in case it aborts. When transaction is not active 'vr_state' holds
+ * the current running state of all the VMX registers. So this function which
+ * gets the current running values of all the VMX registers, needs to know
+ * whether any transaction is active or not.
+ *
+ * Userspace interface buffer layout:
+ *
+ * struct data {
+ * vector128 vr[32];
+ * vector128 vscr;
+ * vector128 vrsave;
+ * };
+ */
static int vr_get(struct task_struct *target, const struct user_regset *regset,
unsigned int pos, unsigned int count,
void *kbuf, void __user *ubuf)
{
+ struct thread_vr_state *addr;
int ret;
flush_altivec_to_thread(target);
@@ -534,8 +554,19 @@ static int vr_get(struct task_struct *target, const struct
user_regset *regset,
BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
offsetof(struct thread_vr_state, vr[32]));
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+ if (MSR_TM_ACTIVE(target-thread.regs-msr)) {
+ flush_fp_to_thread(target);
+ flush_tmregs_to_thread(target);
+ addr = target-thread.transact_vr;
+ } else {
+ addr = target-thread.vr_state;
+ }
+#else
+ addr = target-thread.vr_state;
+#endif
ret = user_regset_copyout(pos, count, kbuf, ubuf,
- target-thread.vr_state, 0,
+ addr, 0,
33 * sizeof(vector128));
if (!ret) {
/*
@@ -546,7 +577,16 @@ static int vr_get(struct task_struct *target, const struct
user_regset *regset,
u32 word;
} vrsave;
memset(vrsave, 0, sizeof(vrsave));
+
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+ if (MSR_TM_ACTIVE(target-thread.regs-msr))
+ vrsave.word = target-thread.transact_vrsave;
+ else
+ vrsave.word = target-thread.vrsave;
+#else
vrsave.word = target-thread.vrsave;
+#endif
+
ret = user_regset_copyout(pos, count, kbuf, ubuf, vrsave,
33 * sizeof(vector128), -1);
}
@@ -554,10 +594,30 @@ static int vr_get(struct task_struct *target, const
struct user_regset *regset,
return ret;
}
+/*
+ * vr_set
+ *
+ * When the transaction is active, 'transact_vr' holds the current running
+ * value of all the VMX registers and 'vr_state' holds the last checkpointed
+ * value of all the VMX registers for the current transaction to fall back
+ * on in case it aborts. When transaction is not active 'vr_state' holds
+ * the current running state of all the VMX registers. So this function which
+ * sets the current running values of all the VMX registers, needs to know
+ * whether any transaction is active or not.
+ *
+ * Userspace interface buffer layout:
+ *
+ * struct data {
+ * vector128 vr[32];
+ * vector128 vscr;
+ * vector128 vrsave;
+ * };
+ */
static int vr_set(struct task_struct *target, const struct user_regset *regset,
unsigned int pos, unsigned int count,
const void *kbuf, const void __user *ubuf)
{
+ struct thread_vr_state *addr;
int ret;
flush_altivec_to_thread(target);
@@ -565,8 +625,19 @@ static int vr_set(struct task_struct *target, const struct
user_regset *regset,
BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
offsetof(struct thread_vr_state, vr[32]));
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+ if (MSR_TM_ACTIVE(target-thread.regs-msr)) {
+ flush_fp_to_thread(target);
+ flush_tmregs_to_thread(target);
+ addr = target-thread.transact_vr;
+ } else {
+ addr = target-thread.vr_state;
+ }
+#else
+ addr = target-thread.vr_state;
+#endif
ret = user_regset_copyin(pos, count,
[PATCH V7 3/8] powerpc, ptrace: Enable fpr_(get/set) for transactional memory
This patch enables the fpr_get which gets the running value of all
the FPR registers and the fpr_set which sets the running value of
of all the FPR registers to accommodate in transaction ptrace
interface based requests.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/kernel/ptrace.c | 103 ---
1 file changed, 97 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index f21897b..fd36b32 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -357,6 +357,33 @@ static int gpr_set(struct task_struct *target, const
struct user_regset *regset,
return ret;
}
+
+/*
+ * fpr_get
+ *
+ * When the transaction is active, 'transact_fp' holds the current running
+ * value of all FPR registers and 'fp_state' holds the last checkpointed
+ * value of all FPR registers for the current transaction. When transaction
+ * is not active 'fp_state' holds the current running state of all the FPR
+ * registers. So this function which returns the current running values of
+ * all the FPR registers, needs to know whether any transaction is active
+ * or not.
+ *
+ * Userspace interface buffer layout:
+ *
+ * struct data {
+ * u64 fpr[32];
+ * u64 fpscr;
+ * };
+ *
+ * There are two config options CONFIG_VSX and CONFIG_PPC_TRANSACTIONAL_MEM
+ * which determines the final code in this function. All the combinations of
+ * these two config options are possible except the one below as transactional
+ * memory config pulls in CONFIG_VSX automatically.
+ *
+ * !defined(CONFIG_VSX) defined(CONFIG_PPC_TRANSACTIONAL_MEM)
+ *
+ */
static int fpr_get(struct task_struct *target, const struct user_regset
*regset,
unsigned int pos, unsigned int count,
void *kbuf, void __user *ubuf)
@@ -367,22 +394,64 @@ static int fpr_get(struct task_struct *target, const
struct user_regset *regset,
#endif
flush_fp_to_thread(target);
-#ifdef CONFIG_VSX
+#if defined(CONFIG_VSX) defined(CONFIG_PPC_TRANSACTIONAL_MEM)
+ /* copy to local buffer then write that out */
+ if (MSR_TM_ACTIVE(target-thread.regs-msr)) {
+ flush_altivec_to_thread(target);
+ flush_tmregs_to_thread(target);
+ for (i = 0; i 32 ; i++)
+ buf[i] = target-thread.TS_TRANS_FPR(i);
+ buf[32] = target-thread.transact_fp.fpscr;
+ } else {
+ for (i = 0; i 32 ; i++)
+ buf[i] = target-thread.TS_FPR(i);
+ buf[32] = target-thread.fp_state.fpscr;
+ }
+ return user_regset_copyout(pos, count, kbuf, ubuf, buf, 0, -1);
+#endif
+
+#if defined(CONFIG_VSX) !defined(CONFIG_PPC_TRANSACTIONAL_MEM)
/* copy to local buffer then write that out */
for (i = 0; i 32 ; i++)
buf[i] = target-thread.TS_FPR(i);
buf[32] = target-thread.fp_state.fpscr;
return user_regset_copyout(pos, count, kbuf, ubuf, buf, 0, -1);
+#endif
-#else
+
+#if !defined(CONFIG_VSX) !defined(CONFIG_PPC_TRANSACTIONAL_MEM)
BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
offsetof(struct thread_fp_state, fpr[32][0]));
-
return user_regset_copyout(pos, count, kbuf, ubuf,
target-thread.fp_state, 0, -1);
#endif
}
+/*
+ * fpr_set
+ *
+ * When the transaction is active, 'transact_fp' holds the current running
+ * value of all FPR registers and 'fp_state' holds the last checkpointed
+ * value of all FPR registers for the current transaction. When transaction
+ * is not active 'fp_state' holds the current running state of all the FPR
+ * registers. So this function which setss the current running values of
+ * all the FPR registers, needs to know whether any transaction is active
+ * or not.
+ *
+ * Userspace interface buffer layout:
+ *
+ * struct data {
+ * u64 fpr[32];
+ * u64 fpscr;
+ * };
+ *
+ * There are two config options CONFIG_VSX and CONFIG_PPC_TRANSACTIONAL_MEM
+ * which determines the final code in this function. All the combinations of
+ * these two config options are possible except the one below as transactional
+ * memory config pulls in CONFIG_VSX automatically.
+ *
+ * !defined(CONFIG_VSX) defined(CONFIG_PPC_TRANSACTIONAL_MEM)
+ */
static int fpr_set(struct task_struct *target, const struct user_regset
*regset,
unsigned int pos, unsigned int count,
const void *kbuf, const void __user *ubuf)
@@ -393,7 +462,27 @@ static int fpr_set(struct task_struct *target, const
struct user_regset *regset,
#endif
flush_fp_to_thread(target);
-#ifdef CONFIG_VSX
+#if defined(CONFIG_VSX) defined(CONFIG_PPC_TRANSACTIONAL_MEM)
+ /* copy to local buffer then write that out */
+ i = user_regset_copyin(pos, count, kbuf, ubuf, buf, 0, -1);
+ if (i)
+
[PATCH V7 7/8] selftests, powerpc: Add test case for TM related ptrace interface
This patch adds one more test case called 'tm-ptrace' targeting TM
related ptrace interface. This test creates one child process to
run some basic TM transactions and the parent process attaches the
child to do some ptrace probing using the recently added regset
interfaces. The parent process then compares the received values
against the expected values to verify whether it has passed the
given test or not.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/tm/Makefile| 2 +-
tools/testing/selftests/powerpc/tm/tm-ptrace.c | 542 +
2 files changed, 543 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/tm/tm-ptrace.c
diff --git a/tools/testing/selftests/powerpc/tm/Makefile
b/tools/testing/selftests/powerpc/tm/Makefile
index 2cede23..71d400a 100644
--- a/tools/testing/selftests/powerpc/tm/Makefile
+++ b/tools/testing/selftests/powerpc/tm/Makefile
@@ -1,4 +1,4 @@
-PROGS := tm-resched-dscr
+PROGS := tm-resched-dscr tm-ptrace
all: $(PROGS)
diff --git a/tools/testing/selftests/powerpc/tm/tm-ptrace.c
b/tools/testing/selftests/powerpc/tm/tm-ptrace.c
new file mode 100644
index 000..7a6c7d3
--- /dev/null
+++ b/tools/testing/selftests/powerpc/tm/tm-ptrace.c
@@ -0,0 +1,542 @@
+/*
+ * Test program for TM ptrace interface
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Copyright 2014 IBM Corporation
+ *
+ * Author: Anshuman Khandual khand...@linux.vnet.ibm.com
+ */
+#include inttypes.h
+#include unistd.h
+#include stdlib.h
+#include string.h
+#include malloc.h
+#include errno.h
+#include sys/ptrace.h
+#include sys/uio.h
+#include sys/types.h
+#include sys/wait.h
+#include sys/signal.h
+#include sys/user.h
+#include linux/elf.h
+#include linux/types.h
+
+#include utils.h
+
+#define TEST_PASS 0
+#define TEST_FAIL 1
+
+#define MAX_STR_LENGTH 100
+
+/* ELF core notes */
+#define NT_PPC_TM_SPR 0x103 /* PowerPC TM special registers */
+#define NT_PPC_TM_CGPR 0x104 /* PowerpC TM checkpointed GPR */
+#define NT_PPC_TM_CFPR 0x105 /* PowerPC TM checkpointed FPR */
+#define NT_PPC_TM_CVMX 0x106 /* PowerPC TM checkpointed VMX */
+#define NT_PPC_MISC0x107 /* PowerPC miscellaneous registers */
+
+/* TM instructions */
+#define TBEGIN .long 0x7C00051D ;
+#define TEND .long 0x7C00055D ;
+
+/* SPR number */
+#define SPRN_DSCR 3
+#define SPRN_TAR 815
+#define SPRN_PPR 896
+
+#define C_DSCR 10 /* TM checkpointed DSCR */
+#define C_TAR 20 /* TM checkpointed TAR */
+#define C_PPR 0x8 /* TM checkpointed PPR */
+
+#define DSCR 50 /* TM running DSCR */
+#define TAR60 /* TM running TAR */
+#define PPR0x4 /* TM running PPR */
+
+/* Values for GPR-FPR[0..31] */
+#define VAL0 0
+#define VAL1 1
+#define VAL2 2
+#define VAL3 3
+#define VAL4 4
+#define VAL5 5
+#define VAL6 6
+#define VAL7 7
+#define VAL8 8
+#define VAL9 9
+#define VAL10 10
+#define VAL11 11
+#define VAL12 12
+#define VAL13 13
+#define VAL14 14
+#define VAL15 15
+#define VAL_MAX16
+
+/* Standard data types */
+typedef unsigned int u32;
+typedef __vector128 vector128;
+
+/* NT_PPC_TM_SPR buffer layout */
+struct tm_spr_regs {
+ u64 tm_tfhar;
+ u64 tm_texasr;
+ u64 tm_tfiar;
+ u64 tm_orig_msr;
+ u64 tm_tar;
+ u64 tm_ppr;
+ u64 tm_dscr;
+};
+
+/*
+ * NT_PPC_TM_CGPR buffer layout
+ *
+ * Same as that of struct pt_regs
+ */
+
+/* NT_PPC_TM_CFPR buffer layout */
+struct tm_cfpr {
+ u64 fpr[32];
+ u64 fpscr;
+};
+
+/* NT_PPC_TM_CVMX buffer layout */
+struct tm_cvmx {
+ vector128 vr[32] __attribute__((aligned(16)));
+ vector128 vscr __attribute__((aligned(16)));
+ u32 vrsave;
+};
+
+/* NT_PPC_MISC buffer layout */
+struct misc_regs {
+ u64 dscr;
+ u64 ppr;
+ u64 tar;
+};
+
+/*
+ * do_tm_transaction
+ *
+ * This functions sets the values for TAR, DSCR, PPR, GPR[0..31],
+ * FPR[0..31] registers before starting the trasanction which will
+ * enable the kernel to save them as checkpointed values. Then it
+ * starts the transaction where it loads a different set of values
+ * into the same registers again thus enabling the kernel to save
+ * them off as running values for this transaction. Then the function
+ * gets stuck forcing the process to loop at one single instruction.
+ * The transaction never finishes, thus giving the parent process
+ * the opportunity to trace the running and checkpointed values of
+ * various registers.
+ */
+void do_tm_transaction(void)
+{
+ asm __volatile__(
+ /* TM checkpointed values
[PATCH V7 6/8] powerpc, ptrace: Enable support for miscellaneous debug registers
This patch enables get and set of miscellaneous debug registers through
ptrace PTRACE_GETREGSET-PTRACE_SETREGSET interface by implementing new
powerpc specific register set REGSET_MISC support corresponding to the
new ELF core note NT_PPC_MISC added previously in this regard.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/uapi/asm/elf.h | 1 +
arch/powerpc/kernel/ptrace.c| 133
2 files changed, 134 insertions(+)
diff --git a/arch/powerpc/include/uapi/asm/elf.h
b/arch/powerpc/include/uapi/asm/elf.h
index fdc8e2f..a41bd98 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -93,6 +93,7 @@
#define ELF_NFPREG 33 /* includes fpscr */
#define ELF_NVMX 34 /* includes all vector registers */
#define ELF_NTMSPRREG 7 /* includes TM sprs, org_msr, dscr, tar, ppr */
+#define ELF_NMISCREG 3 /* includes dscr, tar, ppr */
typedef unsigned long elf_greg_t64;
typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index b14397c..38a1147 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -1371,6 +1371,122 @@ static int tm_cvmx_set(struct task_struct *target,
}
#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
+#ifdef CONFIG_PPC64
+/**
+ * get_misc_dbg() - get MISC debug registers
+ * @target:The target task.
+ * @regset:The user regset structure.
+ * @pos: The buffer position.
+ * @count: Number of bytes to copy.
+ * @kbuf: Kernel buffer to copy from.
+ * @ubuf: User buffer to copy into.
+ *
+ * This function gets various miscellaneous debug registers which includes
+ * DSCR, PPR and TAR. The userspace intarface buffer layout is as follows.
+ *
+ * struct {
+ * unsigned long dscr;
+ * unsigned long ppr;
+ * unsigned long tar;
+ * };
+ *
+ * The data element 'tar' in the structure will be valid only if the kernel
+ * has CONFIG_PPC_BOOK3S_64 config option enabled.
+ */
+static int get_misc_dbg(struct task_struct *target,
+ const struct user_regset *regset, unsigned int pos,
+ unsigned int count, void *kbuf, void __user *ubuf)
+{
+ int ret;
+
+ /* Build test */
+ BUILD_BUG_ON(TSO(dscr) + 2 * sizeof(unsigned long) != TSO(ppr));
+
+#ifdef CONFIG_PPC_BOOK3S_64
+ BUILD_BUG_ON(TSO(ppr) + sizeof(unsigned long) != TSO(tar));
+#endif
+
+ /* DSCR register */
+ ret = user_regset_copyout(pos, count, kbuf, ubuf,
+ target-thread.dscr, 0,
+ sizeof(unsigned long));
+
+ /* PPR register */
+ if (!ret)
+ ret = user_regset_copyout(pos, count, kbuf, ubuf,
+ target-thread.ppr,
+ sizeof(unsigned long),
+ 2 * sizeof(unsigned long));
+
+#ifdef CONFIG_PPC_BOOK3S_64
+ /* TAR register */
+ if (!ret)
+ ret = user_regset_copyout(pos, count, kbuf, ubuf,
+ target-thread.tar,
+ 2 * sizeof(unsigned long),
+ 3 * sizeof(unsigned long));
+#endif
+ return ret;
+}
+
+/**
+ * set_misc_dbg() - set MISC debug registers
+ * @target:The target task.
+ * @regset:The user regset structure.
+ * @pos: The buffer position.
+ * @count: Number of bytes to copy.
+ * @kbuf: Kernel buffer to copy into.
+ * @ubuf: User buffer to copy from.
+ *
+ * This function sets various miscellaneous debug registers which includes
+ * DSCR, PPR and TAR. The userspace intarface buffer layout is as follows.
+ *
+ * struct {
+ * unsigned long dscr;
+ * unsigned long ppr;
+ * unsigned long tar;
+ * };
+ *
+ * The data element 'tar' in the structure will be valid only if the kernel
+ * has CONFIG_PPC_BOOK3S_64 config option enabled.
+ */
+static int set_misc_dbg(struct task_struct *target,
+ const struct user_regset *regset, unsigned int pos,
+ unsigned int count, const void *kbuf,
+ const void __user *ubuf)
+{
+ int ret;
+
+ /* Build test */
+ BUILD_BUG_ON(TSO(dscr) + 2 * sizeof(unsigned long) != TSO(ppr));
+
+#ifdef CONFIG_PPC_BOOK3S_64
+ BUILD_BUG_ON(TSO(ppr) + sizeof(unsigned long) != TSO(tar));
+#endif
+
+ /* DSCR register */
+ ret = user_regset_copyin(pos, count, kbuf, ubuf,
+ target-thread.dscr, 0,
+ sizeof(unsigned long));
+
+ /* PPR register */
+ if (!ret)
+ ret = user_regset_copyin(pos, count, kbuf, ubuf,
+
[PATCH V7 0/8] Add new powerpc specific ELF core notes
This patch series adds five new ELF core note sections which can be used with existing ptrace request PTRACE_GETREGSET-SETREGSET for accessing various transactional memory and miscellaneous debug register sets on powerpc platform. Previous versions: == RFC: https://lkml.org/lkml/2014/4/1/292 V1: https://lkml.org/lkml/2014/4/2/43 V2: https://lkml.org/lkml/2014/5/5/88 V3: https://lkml.org/lkml/2014/5/23/486 V4: https://lkml.org/lkml/2014/11/11/6 V5: https://lkml.org/lkml/2014/11/25/134 V6: https://lkml.org/lkml/2014/12/2/98 Changes in V7: -- - Fixed a config directive in the MISC code - Merged the two gitignore patches into a single one Changes in V6: -- - Added two git ignore patches for powerpc selftests - Re-formatted all in-code function definitions in kernel-doc format Changes in V5: -- - Changed flush_tmregs_to_thread, so not to take into account self tracing - Dropped the 3rd patch in the series which had merged two functions - Fixed one build problem for the misc debug register patch - Accommodated almost all the review comments from Suka on the 6th patch - Minor changes to the self test program - Changed commit messages for some of the patches Changes in V4: -- - Added one test program into the powerpc selftest bucket in this regard - Split the 2nd patch in the previous series into four different patches - Accommodated most of the review comments on the previous patch series - Added a patch to merge functions __switch_to_tm and tm_reclaim_task Changes in V3: -- - Added two new error paths in every TM related get/set functions when regset support is not present on the system (ENODEV) or when the process does not have any transaction active (ENODATA) in the context - Installed the active hooks for all the newly added regset core note types Changes in V2: -- - Removed all the power specific ptrace requests corresponding to new NT_PPC_* elf core note types. Now all the register sets can be accessed from ptrace through PTRACE_GETREGSET/PTRACE_SETREGSET using the individual NT_PPC* core note type instead - Fixed couple of attribute values for REGSET_TM_CGPR register set - Renamed flush_tmreg_to_thread as flush_tmregs_to_thread - Fixed 32 bit checkpointed GPR support - Changed commit messages accordingly Test Result --- The patch series has been verified both in 32 bit and 64 bit compiled test program. Test result for the selftest test (64 bit compiled) can be found here. test: tm_ptrace tags: git_version:v3.19-rc4-54-g10a9c5d ===Testing TM based PTRACE Interface=== Testing TM specific SPR: TFHAR: 10001098 TEXASR: de018c01 TFIAR: c0041a78 TM ORIG_MSR: 8005f032 TM CH DSCR: a (PASSED) TM CH TAR: 14 (PASSED) TM CH PPR: 8 (PASSED) Testing TM checkpointed GPR: TM CH NIP: 10001098 TM CH LINK: 1ea0 TM CH CCR: 24000422 TM CH GPR[0]: 0 (PASSED) TM CH GPR[1]: 1 (PASSED) TM CH GPR[2]: 2 (PASSED) TM CH GPR[3]: 3 (PASSED) TM CH GPR[4]: 4 (PASSED) TM CH GPR[5]: 5 (PASSED) TM CH GPR[6]: 6 (PASSED) TM CH GPR[7]: 7 (PASSED) TM CH GPR[8]: 8 (PASSED) TM CH GPR[9]: 9 (PASSED) TM CH GPR[10]: a (PASSED) TM CH GPR[11]: b (PASSED) TM CH GPR[12]: c (PASSED) TM CH GPR[13]: d (PASSED) TM CH GPR[14]: e (PASSED) TM CH GPR[15]: f (PASSED) TM CH GPR[16]: 0 (PASSED) TM CH GPR[17]: 1 (PASSED) TM CH GPR[18]: 2 (PASSED) TM CH GPR[19]: 3 (PASSED) TM CH GPR[20]: 4 (PASSED) TM CH GPR[21]: 5 (PASSED) TM CH GPR[22]: 6 (PASSED) TM CH GPR[23]: 7 (PASSED) TM CH GPR[24]: 8 (PASSED) TM CH GPR[25]: 9 (PASSED) TM CH GPR[26]: a (PASSED) TM CH GPR[27]: b (PASSED) TM CH GPR[28]: c (PASSED) TM CH GPR[29]: d (PASSED) TM CH GPR[30]: e (PASSED) TM CH GPR[31]: f (PASSED) Testing TM checkpointed FPR: TM CH FPSCR: 0 TM CH FPR[0]: 0 (PASSED) TM CH FPR[1]: 1 (PASSED) TM CH FPR[2]: 2 (PASSED) TM CH FPR[3]: 3 (PASSED) TM CH FPR[4]: 4 (PASSED) TM CH FPR[5]: 5 (PASSED) TM CH FPR[6]: 6 (PASSED) TM CH FPR[7]: 7 (PASSED) TM CH FPR[8]: 8 (PASSED) TM CH FPR[9]: 9 (PASSED) TM CH FPR[10]: a (PASSED) TM CH FPR[11]: b (PASSED) TM CH FPR[12]: c (PASSED) TM CH FPR[13]: d (PASSED) TM CH FPR[14]: e (PASSED) TM CH FPR[15]: f (PASSED) TM CH FPR[16]: 0 (PASSED) TM CH FPR[17]: 1 (PASSED) TM CH FPR[18]: 2 (PASSED) TM CH FPR[19]: 3 (PASSED) TM CH FPR[20]: 4 (PASSED) TM CH FPR[21]: 5 (PASSED) TM CH FPR[22]: 6 (PASSED) TM CH FPR[23]: 7 (PASSED) TM CH FPR[24]: 8 (PASSED) TM CH FPR[25]: 9 (PASSED) TM CH FPR[26]: a (PASSED) TM CH FPR[27]: b (PASSED) TM CH FPR[28]: c (PASSED) TM CH FPR[29]: d (PASSED) TM CH FPR[30]: e (PASSED) TM CH FPR[31]: f (PASSED) Testing TM running GPR: TM RN NIP: 100011b0 TM RN LINK: 1ea0 TM RN CCR: 4000422 TM RN GPR[0]: f (PASSED) TM RN GPR[1]: e (PASSED) TM RN GPR[2]: d (PASSED) TM RN GPR[3]: c (PASSED) TM RN GPR[4]: b (PASSED) TM RN GPR[5]: a (PASSED) TM RN GPR[6]: 9 (PASSED) TM RN GPR[7]: 8 (PASSED) TM RN GPR[8]: 7 (PASSED) TM RN GPR[9]: 6 (PASSED) TM RN GPR[10]: 5 (PASSED) TM RN GPR[11]: 4
[PATCH V7 2/8] powerpc, process: Add the function flush_tmregs_to_thread
This patch creates a function flush_tmregs_to_thread which
will then be used by subsequent patches in this series. The
function checks for self tracing ptrace interface attempts
while in the TM context and logs appropriate warning message.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/switch_to.h | 8
arch/powerpc/kernel/process.c| 20
2 files changed, 28 insertions(+)
diff --git a/arch/powerpc/include/asm/switch_to.h
b/arch/powerpc/include/asm/switch_to.h
index 58abeda..23752a9 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -82,6 +82,14 @@ static inline void flush_spe_to_thread(struct task_struct *t)
}
#endif
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+extern void flush_tmregs_to_thread(struct task_struct *);
+#else
+static inline void flush_tmregs_to_thread(struct task_struct *t)
+{
+}
+#endif
+
static inline void clear_task_ebb(struct task_struct *t)
{
#ifdef CONFIG_PPC_BOOK3S_64
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index b4cc7be..a6f7ca5 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -745,6 +745,26 @@ void restore_tm_state(struct pt_regs *regs)
#define __switch_to_tm(prev)
#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
+#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
+void flush_tmregs_to_thread(struct task_struct *tsk)
+{
+ /*
+* Process self tracing is not yet supported through
+* ptrace interface. Ptrace generic code should have
+* prevented this from happening in the first place.
+* Warn once here with the message, if some how it
+* is attempted.
+*/
+ WARN_ONCE(tsk == current,
+ Not expecting ptrace on self: TM regs may be incorrect\n);
+
+ /*
+* If task is not current, it should have been flushed
+* already to it's thread_struct during __switch_to().
+*/
+}
+#endif
+
struct task_struct *__switch_to(struct task_struct *prev,
struct task_struct *new)
{
--
1.9.3
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[PATCH V7 1/8] elf: Add new powerpc specifc core note sections
This patch adds four new ELF core note sections for powerpc
transactional memory and one new ELF core note section for
powerpc general miscellaneous debug registers. These addition
of new ELF core note sections extends the existing ELF ABI
without affecting it in any manner.
Acked-by: Andrew Morton a...@linux-foundation.org
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
include/uapi/linux/elf.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h
index 71e1d0e..0fd9983 100644
--- a/include/uapi/linux/elf.h
+++ b/include/uapi/linux/elf.h
@@ -379,6 +379,11 @@ typedef struct elf64_shdr {
#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
#define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
+#define NT_PPC_TM_SPR 0x103 /* PowerPC TM special registers */
+#define NT_PPC_TM_CGPR 0x104 /* PowerpC TM checkpointed GPR */
+#define NT_PPC_TM_CFPR 0x105 /* PowerPC TM checkpointed FPR */
+#define NT_PPC_TM_CVMX 0x106 /* PowerPC TM checkpointed VMX */
+#define NT_PPC_MISC0x107 /* PowerPC miscellaneous registers */
#define NT_386_TLS 0x200 /* i386 TLS slots (struct user_desc) */
#define NT_386_IOPERM 0x201 /* x86 io permission bitmap (1=deny) */
#define NT_X86_XSTATE 0x202 /* x86 extended state using xsave */
--
1.9.3
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[PATCH V7 8/8] selftests: Make GIT ignore all binaries in powerpc test suite
This patch includes all of the powerpc test binaries into the .gitignore file listing in their respective directories. This will make sure that GIT ignores all of these test binaries while displaying status. Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com --- NOTE: As Michael had mentioned (https://lkml.org/lkml/2015/1/13/868) adding binaries into different .gitignore file in their respective test directories under powerpc. .../testing/selftests/powerpc/copyloops/.gitignore | 4 tools/testing/selftests/powerpc/mm/.gitignore | 1 + tools/testing/selftests/powerpc/pmu/.gitignore | 3 +++ tools/testing/selftests/powerpc/pmu/ebb/.gitignore | 22 ++ .../selftests/powerpc/primitives/.gitignore| 1 + tools/testing/selftests/powerpc/tm/.gitignore | 2 ++ 6 files changed, 33 insertions(+) create mode 100644 tools/testing/selftests/powerpc/copyloops/.gitignore create mode 100644 tools/testing/selftests/powerpc/mm/.gitignore create mode 100644 tools/testing/selftests/powerpc/pmu/.gitignore create mode 100644 tools/testing/selftests/powerpc/pmu/ebb/.gitignore create mode 100644 tools/testing/selftests/powerpc/primitives/.gitignore create mode 100644 tools/testing/selftests/powerpc/tm/.gitignore diff --git a/tools/testing/selftests/powerpc/copyloops/.gitignore b/tools/testing/selftests/powerpc/copyloops/.gitignore new file mode 100644 index 000..25a192f --- /dev/null +++ b/tools/testing/selftests/powerpc/copyloops/.gitignore @@ -0,0 +1,4 @@ +copyuser_64 +copyuser_power7 +memcpy_64 +memcpy_power7 diff --git a/tools/testing/selftests/powerpc/mm/.gitignore b/tools/testing/selftests/powerpc/mm/.gitignore new file mode 100644 index 000..156f4e8 --- /dev/null +++ b/tools/testing/selftests/powerpc/mm/.gitignore @@ -0,0 +1 @@ +hugetlb_vs_thp_test diff --git a/tools/testing/selftests/powerpc/pmu/.gitignore b/tools/testing/selftests/powerpc/pmu/.gitignore new file mode 100644 index 000..e748f33 --- /dev/null +++ b/tools/testing/selftests/powerpc/pmu/.gitignore @@ -0,0 +1,3 @@ +count_instructions +l3_bank_test +per_event_excludes diff --git a/tools/testing/selftests/powerpc/pmu/ebb/.gitignore b/tools/testing/selftests/powerpc/pmu/ebb/.gitignore new file mode 100644 index 000..42bddbe --- /dev/null +++ b/tools/testing/selftests/powerpc/pmu/ebb/.gitignore @@ -0,0 +1,22 @@ +reg_access_test +event_attributes_test +cycles_test +cycles_with_freeze_test +pmc56_overflow_test +ebb_vs_cpu_event_test +cpu_event_vs_ebb_test +cpu_event_pinned_vs_ebb_test +task_event_vs_ebb_test +task_event_pinned_vs_ebb_test +multi_ebb_procs_test +multi_counter_test +pmae_handling_test +close_clears_pmcc_test +instruction_count_test +fork_cleanup_test +ebb_on_child_test +ebb_on_willing_child_test +back_to_back_ebbs_test +lost_exception_test +no_handler_test +cycles_with_mmcr2_test diff --git a/tools/testing/selftests/powerpc/primitives/.gitignore b/tools/testing/selftests/powerpc/primitives/.gitignore new file mode 100644 index 000..4cc4e31 --- /dev/null +++ b/tools/testing/selftests/powerpc/primitives/.gitignore @@ -0,0 +1 @@ +load_unaligned_zeropad diff --git a/tools/testing/selftests/powerpc/tm/.gitignore b/tools/testing/selftests/powerpc/tm/.gitignore new file mode 100644 index 000..71f9f9d --- /dev/null +++ b/tools/testing/selftests/powerpc/tm/.gitignore @@ -0,0 +1,2 @@ +tm-ptrace +tm-resched-dscr -- 1.9.3 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 3.18 028/150] powerpc/powernv: Switch off MMU before entering nap/sleep/rvwinkle mode
3.18-stable review patch. If anyone has any objections, please let me know. -- From: Paul Mackerras pau...@samba.org commit 8117ac6a6c2fa0f847ff6a21a1f32c8d2c8501d0 upstream. Currently, when going idle, we set the flag indicating that we are in nap mode (paca-kvm_hstate.hwthread_state) and then execute the nap (or sleep or rvwinkle) instruction, all with the MMU on. This is bad for two reasons: (a) the architecture specifies that those instructions must be executed with the MMU off, and in fact with only the SF, HV, ME and possibly RI bits set, and (b) this introduces a race, because as soon as we set the flag, another thread can switch the MMU to a guest context. If the race is lost, this thread will typically start looping on relocation-on ISIs at 0xc...4400. This fixes it by setting the MSR as required by the architecture before setting the flag or executing the nap/sleep/rvwinkle instruction. [ shre...@linux.vnet.ibm.com: Edited to handle LE ] Signed-off-by: Paul Mackerras pau...@samba.org Signed-off-by: Shreyas B. Prabhu shre...@linux.vnet.ibm.com Cc: Benjamin Herrenschmidt b...@kernel.crashing.org Cc: Michael Ellerman m...@ellerman.id.au Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Michael Ellerman m...@ellerman.id.au Signed-off-by: Greg Kroah-Hartman gre...@linuxfoundation.org --- arch/powerpc/include/asm/reg.h|2 ++ arch/powerpc/kernel/idle_power7.S | 18 +- 2 files changed, 19 insertions(+), 1 deletion(-) --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -118,8 +118,10 @@ #define __MSR (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV) #ifdef __BIG_ENDIAN__ #define MSR_ __MSR +#define MSR_IDLE (MSR_ME | MSR_SF | MSR_HV) #else #define MSR_ (__MSR | MSR_LE) +#define MSR_IDLE (MSR_ME | MSR_SF | MSR_HV | MSR_LE) #endif #define MSR_KERNEL (MSR_ | MSR_64BIT) #define MSR_USER32 (MSR_ | MSR_PR | MSR_EE) --- a/arch/powerpc/kernel/idle_power7.S +++ b/arch/powerpc/kernel/idle_power7.S @@ -101,7 +101,23 @@ _GLOBAL(power7_powersave_common) std r9,_MSR(r1) std r1,PACAR1(r13) -_GLOBAL(power7_enter_nap_mode) + /* +* Go to real mode to do the nap, as required by the architecture. +* Also, we need to be in real mode before setting hwthread_state, +* because as soon as we do that, another thread can switch +* the MMU context to the guest. +*/ + LOAD_REG_IMMEDIATE(r5, MSR_IDLE) + li r6, MSR_RI + andcr6, r9, r6 + LOAD_REG_ADDR(r7, power7_enter_nap_mode) + mtmsrd r6, 1 /* clear RI before setting SRR0/1 */ + mtspr SPRN_SRR0, r7 + mtspr SPRN_SRR1, r5 + rfid + + .globl power7_enter_nap_mode +power7_enter_nap_mode: #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE /* Tell KVM we're napping */ li r4,KVM_HWTHREAD_IN_NAP ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 3.14 20/77] powerpc/powernv: Switch off MMU before entering nap/sleep/rvwinkle mode
3.14-stable review patch. If anyone has any objections, please let me know. -- From: Paul Mackerras pau...@samba.org commit 8117ac6a6c2fa0f847ff6a21a1f32c8d2c8501d0 upstream. Currently, when going idle, we set the flag indicating that we are in nap mode (paca-kvm_hstate.hwthread_state) and then execute the nap (or sleep or rvwinkle) instruction, all with the MMU on. This is bad for two reasons: (a) the architecture specifies that those instructions must be executed with the MMU off, and in fact with only the SF, HV, ME and possibly RI bits set, and (b) this introduces a race, because as soon as we set the flag, another thread can switch the MMU to a guest context. If the race is lost, this thread will typically start looping on relocation-on ISIs at 0xc...4400. This fixes it by setting the MSR as required by the architecture before setting the flag or executing the nap/sleep/rvwinkle instruction. [ shre...@linux.vnet.ibm.com: Edited to handle LE ] Signed-off-by: Paul Mackerras pau...@samba.org Signed-off-by: Shreyas B. Prabhu shre...@linux.vnet.ibm.com Cc: Benjamin Herrenschmidt b...@kernel.crashing.org Cc: Michael Ellerman m...@ellerman.id.au Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Michael Ellerman m...@ellerman.id.au Signed-off-by: Greg Kroah-Hartman gre...@linuxfoundation.org --- arch/powerpc/include/asm/reg.h|2 ++ arch/powerpc/kernel/idle_power7.S | 18 +- 2 files changed, 19 insertions(+), 1 deletion(-) --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -118,8 +118,10 @@ #define __MSR (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV) #ifdef __BIG_ENDIAN__ #define MSR_ __MSR +#define MSR_IDLE (MSR_ME | MSR_SF | MSR_HV) #else #define MSR_ (__MSR | MSR_LE) +#define MSR_IDLE (MSR_ME | MSR_SF | MSR_HV | MSR_LE) #endif #define MSR_KERNEL (MSR_ | MSR_64BIT) #define MSR_USER32 (MSR_ | MSR_PR | MSR_EE) --- a/arch/powerpc/kernel/idle_power7.S +++ b/arch/powerpc/kernel/idle_power7.S @@ -84,7 +84,23 @@ _GLOBAL(power7_nap) std r9,_MSR(r1) std r1,PACAR1(r13) -_GLOBAL(power7_enter_nap_mode) + /* +* Go to real mode to do the nap, as required by the architecture. +* Also, we need to be in real mode before setting hwthread_state, +* because as soon as we do that, another thread can switch +* the MMU context to the guest. +*/ + LOAD_REG_IMMEDIATE(r5, MSR_IDLE) + li r6, MSR_RI + andcr6, r9, r6 + LOAD_REG_ADDR(r7, power7_enter_nap_mode) + mtmsrd r6, 1 /* clear RI before setting SRR0/1 */ + mtspr SPRN_SRR0, r7 + mtspr SPRN_SRR1, r5 + rfid + + .globl power7_enter_nap_mode +power7_enter_nap_mode: #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE /* Tell KVM we're napping */ li r4,KVM_HWTHREAD_IN_NAP ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] selftests/powerpc: Add .gitignore for powerpc selftests
On Tue, 2015-01-13 at 17:16 -0700, Shuah Khan wrote: Please add a commit log. What does it need to say? On 01/13/2015 04:49 PM, Michael Ellerman wrote: Signed-off-by: Michael Ellerman m...@ellerman.id.au --- .../testing/selftests/powerpc/copyloops/.gitignore | 4 tools/testing/selftests/powerpc/mm/.gitignore | 1 + tools/testing/selftests/powerpc/pmu/.gitignore | 3 +++ tools/testing/selftests/powerpc/pmu/ebb/.gitignore | 22 ++ .../selftests/powerpc/primitives/.gitignore| 1 + tools/testing/selftests/powerpc/tm/.gitignore | 1 + 6 files changed, 32 insertions(+) create mode 100644 tools/testing/selftests/powerpc/copyloops/.gitignore create mode 100644 tools/testing/selftests/powerpc/mm/.gitignore create mode 100644 tools/testing/selftests/powerpc/pmu/.gitignore create mode 100644 tools/testing/selftests/powerpc/pmu/ebb/.gitignore create mode 100644 tools/testing/selftests/powerpc/primitives/.gitignore create mode 100644 tools/testing/selftests/powerpc/tm/.gitignore Please create a single .gitignore for all targets right under tools/testing/selftests/powerpc instead of multiple .gitignore files. Why? Having separate files makes it less likely we'll get merge conflicts between different test subdirectores, it also makes it more likely someone adding a test will notice they need to update the .gitignore in the same directory. cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 09/10] PCI, powerpc: clip firmware assigned resource under parent bridge's
Did a quick test, looks good on my machine.
Thanks :-)
On Mon, Jan 12, 2015 at 11:23:19AM -0800, Yinghai Lu wrote:
Some bios put range that is not fully coverred by root bus resources.
Try to clip them and update them in pci bridge bars.
We'd like to fix other arches instead of just x86.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=85491
Reported-by: Marek Kordik kordikma...@gmail.com
Fixes: 5b28541552ef (PCI: Restrict 64-bit prefetchable bridge windows to
64-bit resources)
Signed-off-by: Yinghai Lu ying...@kernel.org
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Michael Ellerman m...@ellerman.id.au
Cc: Gavin Shan gws...@linux.vnet.ibm.com
Cc: Anton Blanchard an...@samba.org
Cc: Sebastian Ott seb...@linux.vnet.ibm.com
Cc: Wei Yang weiy...@linux.vnet.ibm.com
Cc: Andrew Murray amur...@embedded-bits.co.uk
Cc: linuxppc-dev@lists.ozlabs.org
---
arch/powerpc/kernel/pci-common.c | 43 +++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/pci-common.c
b/arch/powerpc/kernel/pci-common.c
index 37d512d..6909546 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1148,6 +1148,7 @@ static void pcibios_allocate_bus_resources(struct
pci_bus *bus)
struct pci_bus *b;
int i;
struct resource *res, *pr;
+ bool changed = false;
pr_debug(PCI: Allocating bus resources for %04x:%02x...\n,
pci_domain_nr(bus), bus-number);
@@ -1184,6 +1185,8 @@ static void pcibios_allocate_bus_resources(struct
pci_bus *bus)
pr, (pr pr-name) ? pr-name : nil);
if (pr !(pr-flags IORESOURCE_UNSET)) {
+ struct pci_dev *dev = bus-self;
+
if (request_resource(pr, res) == 0)
continue;
/*
@@ -1193,6 +1196,16 @@ static void pcibios_allocate_bus_resources(struct
pci_bus *bus)
*/
if (reparent_resources(pr, res) == 0)
continue;
+
+ if (dev i = PCI_BRIDGE_RESOURCES
+ i PCI_NUM_RESOURCES
+ (dev-class 8) == PCI_CLASS_BRIDGE_PCI
+ pci_bus_clip_resource(dev, res)) {
+ changed = true;
+ if (pci_claim_resource(dev, i) = 0)
+ continue;
+ }
+
}
pr_warning(PCI: Cannot allocate resource region
%d of PCI bridge %d, will remap\n, i, bus-number);
@@ -1208,6 +1221,9 @@ static void pcibios_allocate_bus_resources(struct
pci_bus *bus)
res-flags = 0;
}
+ if (changed)
+ pci_setup_bridge(bus);
+
list_for_each_entry(b, bus-children, node)
pcibios_allocate_bus_resources(b);
}
@@ -1225,6 +1241,13 @@ static inline void alloc_resource(struct pci_dev *dev,
int idx)
pr = pci_find_parent_resource(dev, r);
if (!pr || (pr-flags IORESOURCE_UNSET) ||
request_resource(pr, r) 0) {
+ /* try again with clip */
+ if (idx != PCI_ROM_RESOURCE pci_bus_clip_resource(dev, r)) {
+ pci_update_resource(dev, idx);
+ if (pci_claim_resource(dev, idx) = 0)
+ return;
+ }
+
printk(KERN_WARNING PCI: Cannot allocate resource region %d
of device %s, will remap\n, idx, pci_name(dev));
if (pr)
@@ -1386,6 +1409,7 @@ void pcibios_claim_one_bus(struct pci_bus *bus)
struct pci_bus *child_bus;
list_for_each_entry(dev, bus-devices, bus_list) {
+ bool changed = false;
int i;
for (i = 0; i PCI_NUM_RESOURCES; i++) {
@@ -1401,8 +1425,25 @@ void pcibios_claim_one_bus(struct pci_bus *bus)
(unsigned long long)r-end,
(unsigned int)r-flags);
- pci_claim_resource(dev, i);
+ if (pci_claim_resource(dev, i) = 0)
+ continue;
+
+ if (dev-subordinate
+ i = PCI_BRIDGE_RESOURCES
+ i PCI_NUM_RESOURCES
+ (dev-class 8) == PCI_CLASS_BRIDGE_PCI
+ pci_bus_clip_resource(dev, r)) {
+ changed = true;
+ pci_claim_resource(dev, i);
+ } else if (i PCI_BRIDGE_RESOURCES
+ i != PCI_ROM_RESOURCE
+ pci_bus_clip_resource(dev, r)) {
+ pci_update_resource(dev, i);
+
[PATCH V2 04/12] powerpc, dscr: Added some in-code documentation
This patch adds some in-code documentation to the DSCR related
code to make it more readable without having any functional
change to it.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/processor.h | 9 +
arch/powerpc/kernel/sysfs.c | 38
2 files changed, 47 insertions(+)
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index bf117d8..28ded5d 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -295,6 +295,15 @@ struct thread_struct {
#endif
#ifdef CONFIG_PPC64
unsigned long dscr;
+ /*
+* This member element dscr_inherit indicates that the process
+* has explicitly attempted and changed the DSCR register value
+* for itself. Hence kernel wont use the default CPU DSCR value
+* contained in the PACA structure anymore during process context
+* switch. Once this variable is set, this behaviour will also be
+* inherited to all the children of this process from that point
+* onwards.
+*/
int dscr_inherit;
unsigned long ppr;/* used to save/restore SMT priority */
#endif
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index fa1fd8a..692873b 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -496,13 +496,34 @@ static DEVICE_ATTR(spurr, 0400, show_spurr, NULL);
static DEVICE_ATTR(purr, 0400, show_purr, store_purr);
static DEVICE_ATTR(pir, 0400, show_pir, NULL);
+/*
+ * This is the system wide DSCR register default value. Any
+ * change to this default value through the sysfs interface
+ * will update all per cpu DSCR default values across the
+ * system stored in their respective PACA structures.
+ */
static unsigned long dscr_default;
+/**
+ * read_dscr() - Fetch the cpu specific DSCR default
+ * @val: Returned cpu specific DSCR default value
+ *
+ * This function returns the per cpu DSCR default value
+ * for any cpu which is contained in it's PACA structure.
+ */
static void read_dscr(void *val)
{
*(unsigned long *)val = get_paca()-dscr_default;
}
+
+/**
+ * write_dscr() - Update the cpu specific DSCR default
+ * @val: New cpu specific DSCR default value to update
+ *
+ * This function updates the per cpu DSCR default value
+ * for any cpu which is contained in it's PACA structure.
+ */
static void write_dscr(void *val)
{
get_paca()-dscr_default = *(unsigned long *)val;
@@ -520,12 +541,29 @@ static void add_write_permission_dev_attr(struct
device_attribute *attr)
attr-attr.mode |= 0200;
}
+/**
+ * show_dscr_default() - Fetch the system wide DSCR default
+ * @dev: Device structure
+ * @attr: Device attribute structure
+ * @buf: Interface buffer
+ *
+ * This function returns the system wide DSCR default value.
+ */
static ssize_t show_dscr_default(struct device *dev,
struct device_attribute *attr, char *buf)
{
return sprintf(buf, %lx\n, dscr_default);
}
+/**
+ * store_dscr_default() - Update the system wide DSCR default
+ * @dev: Device structure
+ * @attr: Device attribute structure
+ * @buf: Interface buffer
+ * @count: Size of the update
+ *
+ * This function updates the system wide DSCR default value.
+ */
static ssize_t __used store_dscr_default(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
--
1.9.3
___
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[PATCH V2 01/12] powerpc: Fix handling of DSCR related facility unavailable exception
Currently DSCR (Data Stream Control Register) can be accessed with
mfspr or mtspr instructions inside a thread via two different SPR
numbers. One being the user accessible problem state SPR number 0x03
and the other being the privilege state SPR number 0x11. All access
through the privilege state SPR number get emulated through illegal
instruction exception. Any access through the problem state SPR number
raises one facility unavailable exception which sets the thread based
dscr_inherit bit and enables DSCR facility through FSCR register thus
allowing direct access to DSCR without going through this exception in
the future. We set the thread.dscr_inherit bit whether the access was
with mfspr or mtspr instruction which is neither correct nor does it
match the behaviour through the instruction emulation code path driven
from privilege state SPR number. User currently observes two different
kind of behaviour when accessing the DSCR through these two SPR numbers.
This problem can be observed through these two test cases by replacing
the privilege state SPR number with the problem state SPR number.
(1) http://ozlabs.org/~anton/junkcode/dscr_default_test.c
(2) http://ozlabs.org/~anton/junkcode/dscr_explicit_test.c
This patch fixes the problem by making sure that the behaviour visible
to the user remains the same irrespective of which SPR number is being
used. Inside facility unavailable exception, we check whether it was
cuased by a mfspr or a mtspr isntrucction. In case of mfspr instruction,
just emulate the instruction. In case of mtspr instruction, set the
thread based dscr_inherit bit and also enable the facility through FSCR.
All user SPR based mfspr instruction will be emulated till one user SPR
based mtspr has been executed.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/kernel/traps.c | 45 -
1 file changed, 40 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index e6595b7..cd69340 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -1377,6 +1377,7 @@ void facility_unavailable_exception(struct pt_regs *regs)
};
char *facility = unknown;
u64 value;
+ u32 instword, rd;
u8 status;
bool hv;
@@ -1388,12 +1389,46 @@ void facility_unavailable_exception(struct pt_regs
*regs)
status = value 56;
if (status == FSCR_DSCR_LG) {
- /* User is acessing the DSCR. Set the inherit bit and allow
-* the user to set it directly in future by setting via the
-* FSCR DSCR bit. We always leave HFSCR DSCR set.
+ /*
+* User is accessing the DSCR register using the problem
+* state only SPR number (0x03) either through a mfspr or
+* a mtspr instruction. If it is a write attempt through
+* a mtspr, then we set the inherit bit. This also allows
+* the user to write or read the register directly in the
+* future by setting via the FSCR DSCR bit. But in case it
+* is a read DSCR attempt through a mfspr instruction, we
+* just emulate the instruction instead. This code path will
+* always emulate all the mfspr instructions till the user
+* has attempted atleast one mtspr instruction. This way it
+* preserves the same behaviour when the user is accessing
+* the DSCR through privilege level only SPR number (0x11)
+* which is emulated through illegal instruction exception.
+* We always leave HFSCR DSCR set.
*/
- current-thread.dscr_inherit = 1;
- mtspr(SPRN_FSCR, value | FSCR_DSCR);
+ if (get_user(instword, (u32 __user *)(regs-nip))) {
+ pr_err(Failed to fetch the user instruction\n);
+ return;
+ }
+
+ /* Write into DSCR (mtspr 0x03, RS) */
+ if ((instword PPC_INST_MTSPR_DSCR_USER_MASK)
+ == PPC_INST_MTSPR_DSCR_USER) {
+ rd = (instword 21) 0x1f;
+ current-thread.dscr = regs-gpr[rd];
+ current-thread.dscr_inherit = 1;
+ mtspr(SPRN_FSCR, value | FSCR_DSCR);
+ }
+
+ /* Read from DSCR (mfspr RT, 0x03) */
+ if ((instword PPC_INST_MFSPR_DSCR_USER_MASK)
+ == PPC_INST_MFSPR_DSCR_USER) {
+ if (emulate_instruction(regs)) {
+ pr_err(DSCR based mfspr emulation failed\n);
+ return;
+ }
+ regs-nip += 4;
+ emulate_single_step(regs);
+ }
[PATCH V2 08/12] selftests, powerpc: Add test for DSCR SPR numbers
This patch adds a test which verifies that the DSCR privilege and
problem state SPR read write accesses while making sure that the
results are always the same irrespective of which SPR number is
being used.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 2 +-
.../selftests/powerpc/dscr/dscr_user_test.c| 62 ++
2 files changed, 63 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_user_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index aede453..ae865d8 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,4 +1,4 @@
-PROGS := dscr_default_test dscr_explicit_test
+PROGS := dscr_default_test dscr_explicit_test dscr_user_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_user_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_user_test.c
new file mode 100644
index 000..f25d68e
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_user_test.c
@@ -0,0 +1,62 @@
+/*
+ * POWER Data Stream Control Register (DSCR) SPR test
+ *
+ * This test modifies the DSCR value through both the SPR number
+ * based mtspr instruction and then makes sure that the same is
+ * reflected through mfspr instruction using either of the SPR
+ * numbers.
+ *
+ * When using the privilege state SPR, the instructions such as
+ * mfspr or mtspr are priviledged and the kernel emulates them
+ * for us. Instructions using problem state SPR can be exuecuted
+ * directly without any emulation if the HW supports them. Else
+ * they also get emulated by the kernel.
+ *
+ * Copyright (C) 2013 Anton Blanchard an...@au.ibm.com, IBM
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include dscr.h
+
+static int check_dscr(char *str)
+{
+ unsigned long cur_dscr, cur_dscr_usr;
+
+ cur_dscr = get_dscr();
+ cur_dscr_usr = get_dscr_usr();
+ if (cur_dscr != cur_dscr_usr) {
+ printf(%s set, kernel get %lx != user get %lx\n,
+ str, cur_dscr, cur_dscr_usr);
+ return 1;
+ }
+ return 0;
+}
+
+int test_body(void)
+{
+ int i;
+
+ check_dscr();
+
+ for (i = 0; i COUNT; i++) {
+ set_dscr(i);
+ if (check_dscr(kernel))
+ return 1;
+ }
+
+ for (i = 0; i COUNT; i++) {
+ set_dscr_usr(i);
+ if (check_dscr(user))
+ return 1;
+ }
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(test_body, dscr_user_test);
+}
--
1.9.3
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[PATCH 1/2] MAINTAINERS: ibmvscsi driver maintainer change
Change maintainer of ibmvscsi driver to Tyrel Datwyler. Signed-off-by: Tyrel Datwyler tyr...@linux.vnet.ibm.com Cc: Nathan Fontenot nf...@linux.vnet.ibm.com Cc: Brian King brk...@linux.vnet.ibm.com --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 79b2e4b..a646b94 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4754,7 +4754,7 @@ S:Supported F: drivers/net/ethernet/ibm/ibmveth.* IBM Power Virtual SCSI Device Drivers -M: Nathan Fontenot nf...@linux.vnet.ibm.com +M: Tyrel Datwyler tyr...@linux.vnet.ibm.com L: linux-s...@vger.kernel.org S: Supported F: drivers/scsi/ibmvscsi/ibmvscsi* -- 1.7.12.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH V2 07/12] selftests, powerpc: Add test for explicitly changing DSCR value
This patch adds a test which modifies the DSCR using mtspr instruction
and verifies the change using mfspr instruction. It uses both the
privilege state SPR as well as the problem state SPR for the purpose.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 2 +-
.../selftests/powerpc/dscr/dscr_explicit_test.c| 72 ++
2 files changed, 73 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index 0aa90ab..aede453 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,4 +1,4 @@
-PROGS := dscr_default_test
+PROGS := dscr_default_test dscr_explicit_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c
new file mode 100644
index 000..5c0b7c1
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c
@@ -0,0 +1,72 @@
+/*
+ * POWER Data Stream Control Register (DSCR) explicit test
+ *
+ * This test modifies the DSCR value using mtspr instruction and
+ * verifies the change with mfspr instruction. It uses both the
+ * privilege state SPR and the problem state SPR for this purpose.
+ *
+ * When using the privilege state SPR, the instructions such as
+ * mfspr or mtspr are priviledged and the kernel emulates them
+ * for us. Instructions using problem state SPR can be exuecuted
+ * directly without any emulation if the HW supports them. Else
+ * they also get emulated by the kernel.
+ *
+ * Copyright (C) 2012 Anton Blanchard an...@au.ibm.com, IBM
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include dscr.h
+
+int test_body(void)
+{
+ unsigned long i, dscr = 0;
+
+ srand(getpid());
+ set_dscr(dscr);
+
+ for (i = 0; i COUNT; i++) {
+ unsigned long cur_dscr, cur_dscr_usr;
+ double ret = uniform_deviate(rand());
+
+ if (ret 0.001) {
+ dscr++;
+ if (dscr DSCR_MAX)
+ dscr = 0;
+
+ set_dscr(dscr);
+ }
+
+ cur_dscr = get_dscr();
+ if (cur_dscr != dscr) {
+ fprintf(stderr, Kernel DSCR should be %ld but
+ is %ld\n, dscr, cur_dscr);
+ return 1;
+ }
+
+ ret = uniform_deviate(rand());
+ if (ret 0.001) {
+ dscr++;
+ if (dscr DSCR_MAX)
+ dscr = 0;
+
+ set_dscr_usr(dscr);
+ }
+
+ cur_dscr_usr = get_dscr_usr();
+ if (cur_dscr_usr != dscr) {
+ fprintf(stderr, User DSCR should be %ld but
+ is %ld\n, dscr, cur_dscr_usr);
+ return 1;
+ }
+ }
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(test_body, dscr_explicit_test);
+}
--
1.9.3
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[PATCH V2 00/12] POWER DSCR fixes, improvements, docs and tests
This patch series has patches for POWER DSCR fixes, improvements, in code documentaion, kernel support user documentation and selftest based test cases. It has got five test cases which are derived from Anton's DSCR test bucket which can be listed as follows. (1) http://ozlabs.org/~anton/junkcode/dscr_default_test.c (2) http://ozlabs.org/~anton/junkcode/dscr_explicit_test.c (3) http://ozlabs.org/~anton/junkcode/dscr_inherit_exec_test.c (4) http://ozlabs.org/~anton/junkcode/dscr_inherit_test.c (5) http://ozlabs.org/~anton/junkcode/user_dscr_test.c So the derivied test cases have Anton's copyright along with mine but the commit message as of now has only my signed-off-by statement. As Anton mentioned before he would put his signed-off-by after reviewing these modified test cases. NOTE1: Anton's original inherit exec test expected the child to have system default DSCR value instead of the inherited DSCR value from it's parent. But looks like thats not the case when we execute the test, it always inherits it's parent's DSCR value over the exec call as well. So I have changed the test program assuming its correct to have the inherited DSCR value in the fork/execed child program. Please let me know if thats not correct and I am missing something there. NOTE2: The selftests/powerpc/.gitignore will be added and will get updated through a different patch series related to ptrace instead of this one. Changes in V2: - - Updated the thread struct DSCR value inside mtspr facility exception path - Modified the in code documentation to follow the kernel-doc format - Added seven selftest based DSCR related test cases under powerpc Original V1: - Posted here at https://patchwork.ozlabs.org/patch/418583/ Anshuman Khandual (12): powerpc: Fix handling of DSCR related facility unavailable exception powerpc, process: Remove the unused extern dscr_default powerpc, offset: Change PACA_DSCR to PACA_DSCR_DEFAULT powerpc, dscr: Added some in-code documentation documentation, powerpc: Add documentation for DSCR support selftests, powerpc: Add test for system wide DSCR default selftests, powerpc: Add test for explicitly changing DSCR value selftests, powerpc: Add test for DSCR SPR numbers selftests, powerpc: Add test for DSCR value inheritence across fork selftests, powerpc: Add test for DSCR inheritence across fork exec selftests, powerpc: Add test for all DSCR sysfs interfaces selftests, powerpc: Add thread based stress test for DSCR sysfs interfaces Documentation/powerpc/00-INDEX | 2 + Documentation/powerpc/dscr.txt | 83 ++ arch/powerpc/include/asm/processor.h | 9 ++ arch/powerpc/kernel/asm-offsets.c | 2 +- arch/powerpc/kernel/entry_64.S | 2 +- arch/powerpc/kernel/process.c | 2 - arch/powerpc/kernel/sysfs.c| 38 +++ arch/powerpc/kernel/tm.S | 4 +- arch/powerpc/kernel/traps.c| 45 +++- arch/powerpc/kvm/book3s_hv_rmhandlers.S| 2 +- tools/testing/selftests/powerpc/Makefile | 2 +- tools/testing/selftests/powerpc/dscr/Makefile | 19 tools/testing/selftests/powerpc/dscr/dscr.h| 120 .../selftests/powerpc/dscr/dscr_default_test.c | 121 + .../selftests/powerpc/dscr/dscr_explicit_test.c| 72 .../powerpc/dscr/dscr_inherit_exec_test.c | 118 .../selftests/powerpc/dscr/dscr_inherit_test.c | 96 .../selftests/powerpc/dscr/dscr_sysfs_test.c | 89 +++ .../powerpc/dscr/dscr_sysfs_thread_test.c | 114 +++ .../selftests/powerpc/dscr/dscr_user_test.c| 62 +++ 20 files changed, 989 insertions(+), 13 deletions(-) create mode 100644 Documentation/powerpc/dscr.txt create mode 100644 tools/testing/selftests/powerpc/dscr/Makefile create mode 100644 tools/testing/selftests/powerpc/dscr/dscr.h create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_default_test.c create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_sysfs_thread_test.c create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_user_test.c -- 1.9.3 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH V2 03/12] powerpc, offset: Change PACA_DSCR to PACA_DSCR_DEFAULT
PACA_DSCR offset macro tracks dscr_default element in the paca structure. Better change the name of this macro to match that of the data element it tracks. Makes the code more readable. Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com --- arch/powerpc/kernel/asm-offsets.c | 2 +- arch/powerpc/kernel/entry_64.S | 2 +- arch/powerpc/kernel/tm.S| 4 ++-- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index e624f96..dcfffe2 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c @@ -246,7 +246,7 @@ int main(void) #endif DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id)); DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state)); - DEFINE(PACA_DSCR, offsetof(struct paca_struct, dscr_default)); + DEFINE(PACA_DSCR_DEFAULT, offsetof(struct paca_struct, dscr_default)); DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime)); DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user)); DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time)); diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 194e46d..b5cd2b59 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S @@ -564,7 +564,7 @@ BEGIN_FTR_SECTION ld r0,THREAD_DSCR(r4) cmpwi r6,0 bne 1f - ld r0,PACA_DSCR(r13) + ld r0,PACA_DSCR_DEFAULT(r13) 1: BEGIN_FTR_SECTION_NESTED(70) mfspr r8, SPRN_FSCR diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S index 2a324f4..dbd2c18 100644 --- a/arch/powerpc/kernel/tm.S +++ b/arch/powerpc/kernel/tm.S @@ -293,7 +293,7 @@ dont_backup_fp: ld r2, STK_GOT(r1) /* Load CPU's default DSCR */ - ld r0, PACA_DSCR(r13) + ld r0, PACA_DSCR_DEFAULT(r13) mtspr SPRN_DSCR, r0 blr @@ -473,7 +473,7 @@ restore_gprs: ld r2, STK_GOT(r1) /* Load CPU's default DSCR */ - ld r0, PACA_DSCR(r13) + ld r0, PACA_DSCR_DEFAULT(r13) mtspr SPRN_DSCR, r0 blr diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S index 10554df..109794b 100644 --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S @@ -283,7 +283,7 @@ kvm_start_guest: kvm_secondary_got_guest: /* Set HSTATE_DSCR(r13) to something sensible */ - ld r6, PACA_DSCR(r13) + ld r6, PACA_DSCR_DEFAULT(r13) std r6, HSTATE_DSCR(r13) bl kvmppc_hv_entry -- 1.9.3 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH V2 09/12] selftests, powerpc: Add test for DSCR value inheritence across fork
This patch adds a test to verify that the changed DSCR value inside
any process would be inherited to it's child process across the fork
system call.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 3 +-
.../selftests/powerpc/dscr/dscr_inherit_test.c | 96 ++
2 files changed, 98 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index ae865d8..81239e2 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,4 +1,5 @@
-PROGS := dscr_default_test dscr_explicit_test dscr_user_test
+PROGS := dscr_default_test dscr_explicit_test dscr_user_test \
+dscr_inherit_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c
new file mode 100644
index 000..f1add77
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c
@@ -0,0 +1,96 @@
+/*
+ * POWER Data Stream Control Register (DSCR) fork test
+ *
+ * This testcase modifies the DSCR using mtspr, forks and then
+ * verifies that the child process has the correct changed DSCR
+ * value using mfspr.
+ *
+ * When using the privilege state SPR, the instructions such as
+ * mfspr or mtspr are priviledged and the kernel emulates them
+ * for us. Instructions using problem state SPR can be exuecuted
+ * directly without any emulation if the HW supports them. Else
+ * they also get emulated by the kernel.
+ *
+ * Copyright (C) 2012 Anton Blanchard an...@au.ibm.com, IBM
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include dscr.h
+
+int test_body(void)
+{
+ unsigned long i, dscr = 0;
+ pid_t pid;
+
+ srand(getpid());
+ set_dscr(dscr);
+
+ for (i = 0; i COUNT; i++) {
+ unsigned long cur_dscr, cur_dscr_usr;
+
+ dscr++;
+ if (dscr DSCR_MAX)
+ dscr = 0;
+
+ if (i % 2 == 0)
+ set_dscr_usr(dscr);
+ else
+ set_dscr(dscr);
+
+ /*
+* XXX: Force a context switch out so that DSCR
+* current value is copied into the thread struct
+* which is required for the child to inherit the
+* changed value.
+*/
+ sleep(1);
+
+ pid = fork();
+ if (pid == -1) {
+ perror(fork() failed\n);
+ exit(1);
+ } else if (pid) {
+ int status;
+
+ if (waitpid(pid, status, 0) == -1) {
+ perror(waitpid() failed\n);
+ exit(1);
+ }
+
+ if (!WIFEXITED(status)) {
+ fprintf(stderr, Child didn't exit cleanly\n);
+ exit(1);
+ }
+
+ if (WEXITSTATUS(status) != 0) {
+ fprintf(stderr, Child didn't exit cleanly\n);
+ return 1;
+ }
+ } else {
+ cur_dscr = get_dscr();
+ if (cur_dscr != dscr) {
+ fprintf(stderr, Kernel DSCR should be %ld
+ but is %ld\n, dscr, cur_dscr);
+ exit(1);
+ }
+
+ cur_dscr_usr = get_dscr_usr();
+ if (cur_dscr_usr != dscr) {
+ fprintf(stderr, User DSCR should be %ld
+ but is %ld\n, dscr, cur_dscr_usr);
+ exit(1);
+ }
+ exit(0);
+ }
+ }
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(test_body, dscr_inherit_test);
+}
--
1.9.3
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[PATCH V2 10/12] selftests, powerpc: Add test for DSCR inheritence across fork exec
This patch adds a test case to verify that the changed DSCR value
inside any process would be inherited to it's child across the fork
and exec system call.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 2 +-
.../powerpc/dscr/dscr_inherit_exec_test.c | 118 +
2 files changed, 119 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index 81239e2..4e84309 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,5 +1,5 @@
PROGS := dscr_default_test dscr_explicit_test dscr_user_test \
-dscr_inherit_test
+dscr_inherit_test dscr_inherit_exec_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c
new file mode 100644
index 000..5ff3849
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c
@@ -0,0 +1,118 @@
+/*
+ * POWER Data Stream Control Register (DSCR) fork exec test
+ *
+ * This testcase modifies the DSCR using mtspr, forks execs and
+ * verifies that the child is using the changed DSCR using mfspr.
+ *
+ * When using the privilege state SPR, the instructions such as
+ * mfspr or mtspr are priviledged and the kernel emulates them
+ * for us. Instructions using problem state SPR can be exuecuted
+ * directly without any emulation if the HW supports them. Else
+ * they also get emulated by the kernel.
+ *
+ * Copyright (C) 2012 Anton Blanchard an...@au.ibm.com, IBM
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include dscr.h
+
+static char prog[LEN_MAX];
+
+static void do_exec(unsigned long parent_dscr)
+{
+ unsigned long cur_dscr, cur_dscr_usr;
+
+ cur_dscr = get_dscr();
+ cur_dscr_usr = get_dscr_usr();
+
+ if (cur_dscr != parent_dscr) {
+ fprintf(stderr, Parent DSCR %ld was not inherited
+ over exec (kernel value)\n, parent_dscr);
+ exit(1);
+ }
+
+ if (cur_dscr_usr != parent_dscr) {
+ fprintf(stderr, Parent DSCR %ld was not inherited
+ over exec (user value)\n, parent_dscr);
+ exit(1);
+ }
+ exit(0);
+}
+
+int test_body(void)
+{
+ unsigned long i, dscr = 0;
+ pid_t pid;
+
+ for (i = 0; i COUNT; i++) {
+ dscr++;
+ if (dscr DSCR_MAX)
+ dscr = 0;
+
+ if (dscr == get_default_dscr())
+ continue;
+
+ if (i % 2 == 0)
+ set_dscr_usr(dscr);
+ else
+ set_dscr(dscr);
+
+ /*
+* XXX: Force a context switch out so that DSCR
+* current value is copied into the thread struct
+* which is required for the child to inherit the
+* changed value.
+*/
+ sleep(1);
+
+ pid = fork();
+ if (pid == -1) {
+ perror(fork() failed\n);
+ exit(1);
+ } else if (pid) {
+ int status;
+
+ if (waitpid(pid, status, 0) == -1) {
+ perror(waitpid() failed\n);
+ exit(1);
+ }
+
+ if (!WIFEXITED(status)) {
+ fprintf(stderr, Child didn't exit cleanly\n);
+ exit(1);
+ }
+
+ if (WEXITSTATUS(status) != 0) {
+ fprintf(stderr, Child didn't exit cleanly\n);
+ return 1;
+ }
+ } else {
+ char dscr_str[16];
+
+ sprintf(dscr_str, %ld, dscr);
+ execlp(prog, prog, exec, dscr_str, NULL);
+ exit(1);
+ }
+ }
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ if (argc == 3 !strcmp(argv[1], exec)) {
+ unsigned long parent_dscr;
+
+ parent_dscr = atoi(argv[2]);
+ do_exec(parent_dscr);
+ } else if (argc != 1) {
+ fprintf(stderr, Usage: %s\n, argv[0]);
+ exit(1);
+ }
+
+ strncpy(prog, argv[0],
[PATCH V2 02/12] powerpc, process: Remove the unused extern dscr_default
The process context switch code no longer uses dscr_default variable
from the sysfs.c file. The variable became unused when we started
storing the CPU specific DSCR value in the PACA structure instead.
This patch just removes this extern declaration. It was originally
added by the following commit.
efcac658: powerpc: Per process DSCR + some fixes (try#4)
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/kernel/process.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index b4cc7be..fe3f682 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1112,8 +1112,6 @@ static void setup_ksp_vsid(struct task_struct *p,
unsigned long sp)
/*
* Copy a thread..
*/
-extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
-
int copy_thread(unsigned long clone_flags, unsigned long usp,
unsigned long arg, struct task_struct *p)
{
--
1.9.3
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[PATCH V2 05/12] documentation, powerpc: Add documentation for DSCR support
This patch adds a new documentation file explaining the DSCR support on powerpc platforms. This explains DSCR related data structure, code paths and also available user interfaces. Any further functional changes to the DSCR support in the kernel should definitely update the documentation here. Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com --- Documentation/powerpc/00-INDEX | 2 + Documentation/powerpc/dscr.txt | 83 ++ 2 files changed, 85 insertions(+) create mode 100644 Documentation/powerpc/dscr.txt diff --git a/Documentation/powerpc/00-INDEX b/Documentation/powerpc/00-INDEX index 6fd0e8b..9dc845c 100644 --- a/Documentation/powerpc/00-INDEX +++ b/Documentation/powerpc/00-INDEX @@ -30,3 +30,5 @@ ptrace.txt - Information on the ptrace interfaces for hardware debug registers. transactional_memory.txt - Overview of the Power8 transactional memory support. +dscr.txt + - Overview DSCR (Data Stream Control Register) support. diff --git a/Documentation/powerpc/dscr.txt b/Documentation/powerpc/dscr.txt new file mode 100644 index 000..1ff4400 --- /dev/null +++ b/Documentation/powerpc/dscr.txt @@ -0,0 +1,83 @@ + DSCR (Data Stream Control Register) + + +DSCR register in powerpc allows user to have some control of prefetch of data +stream in the processor. Please refer to the ISA documents or related manual +for more detailed information regarding how to use this DSCR to attain this +control of the pefetches . This document here provides an overview of kernel +support for DSCR, related kernel objects, it's functionalities and exported +user interface. + +(A) Data Structures: + + (1) thread_struct: + dscr/* Thread DSCR value */ + dscr_inherit/* Thread has changed default DSCR */ + + (2) PACA: + dscr_default/* per-CPU DSCR default value */ + + (3) sysfs.c: + dscr_default/* System DSCR default value */ + +(B) Scheduler Changes: + + Scheduler will write the per-CPU DSCR default which is stored in the + CPU's PACA value into the register if the thread has dscr_inherit value + cleared which means that it has not changed the default DSCR till now. + If the dscr_inherit value is set which means that it has changed the + default DSCR value, scheduler will write the changed value which will + now be contained in thread struct's dscr into the register instead of + the per-CPU default PACA based DSCR value. + + NOTE: Please note here that the system wide global DSCR value never + gets used directly in the scheduler process context switch at all. + +(C) SYSFS Interface: + + Global DSCR default:/sys/devices/system/cpu/dscr_default + CPU specific DSCR default: /sys/devices/system/cpu/cpuN/dscr + + Changing the global DSCR default in the sysfs will change all the CPU + specific DSCR defaults immediately in their PACA structures. Again if + the current process has the dscr_inherit clear, it also writes the new + value into every CPU's DSCR register right away and updates the current + thread's DSCR value as well. + + Changing the CPU specif DSCR default value in the sysfs does exactly + the same thing as above but unlike the global one above, it just changes + stuff for that particular CPU instead for all the CPUs on the system. + +(D) User Space Instructions: + + The DSCR register can be accessed in the user space using any of these + two SPR numbers available for that purpose. + + (1) Problem state SPR: 0x03(Un-privileged, POWER8 only) + (2) Privileged state SPR: 0x11(Privileged) + + Accessing DSCR through privileged SPR number (0x11) from user space + works, as it is emulated following an illegal instruction exception + inside the kernel. Both mfspr and mtspr instructions are emulated. + + Accessing DSCR through user level SPR (0x03) from user space will first + create a facility unavailable exception. Inside this exception handler + all mfspr isntruction based read attempts will get emulated and returned + where as the first mtspr instruction based write attempts will enable + the DSCR facility for the next time around (both for read and write) by + setting DSCR facility in the FSCR register. + +(E) Specifics about 'dscr_inherit': + + The thread struct element 'dscr_inherit' represents whether the thread + in question has attempted and changed the DSCR itself using any of the + following methods. This element signifies whether the thread wants to + use the CPU default DSCR value or its own changed DSCR value in the + kernel. + + (1) mtspr instruction (SPR number 0x03) + (2)
[PATCH V2 06/12] selftests, powerpc: Add test for system wide DSCR default
This patch adds a test case for the system wide DSCR default
value, which when changed through it's sysfs interface must
be visible to all threads reading DSCR either through the
privilege state SPR or the problem state SPR. The DSCR value
change should be immediate as well.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/Makefile | 2 +-
tools/testing/selftests/powerpc/dscr/Makefile | 17 +++
tools/testing/selftests/powerpc/dscr/dscr.h| 120
.../selftests/powerpc/dscr/dscr_default_test.c | 121 +
4 files changed, 259 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/dscr/Makefile
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr.h
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_default_test.c
diff --git a/tools/testing/selftests/powerpc/Makefile
b/tools/testing/selftests/powerpc/Makefile
index f6ff90a..1318883 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -13,7 +13,7 @@ CFLAGS := -Wall -O2 -flto -Wall -Werror
-DGIT_VERSION='$(GIT_VERSION)' -I$(CUR
export CC CFLAGS
-TARGETS = pmu copyloops mm tm primitives
+TARGETS = pmu copyloops mm tm primitives dscr
endif
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
new file mode 100644
index 000..0aa90ab
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -0,0 +1,17 @@
+PROGS := dscr_default_test
+
+CFLAGS := $(CFLAGS) -lpthread
+
+all: $(PROGS)
+
+$(PROGS): ../harness.c
+
+run_tests: all
+ @-for PROG in $(PROGS); do \
+ ./$$PROG; \
+ done;
+
+clean:
+ rm -f $(PROGS) *.o
+
+.PHONY: all run_tests clean
diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h
b/tools/testing/selftests/powerpc/dscr/dscr.h
new file mode 100644
index 000..2e6535b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -0,0 +1,120 @@
+/*
+ * POWER Data Stream Control Register (DSCR)
+ *
+ * This header file contains helper functions and macros
+ * required for all the DSCR related test cases.
+ *
+ * Copyright (C) 2012 Anton Blanchard an...@au.ibm.com, IBM
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef _SELFTESTS_POWERPC_DSCR_DSCR_H
+#define _SELFTESTS_POWERPC_DSCR_DSCR_H
+
+#include unistd.h
+#include stdio.h
+#include stdlib.h
+#include string.h
+#include fcntl.h
+#include dirent.h
+#include pthread.h
+#include sched.h
+#include sys/types.h
+#include sys/stat.h
+#include sys/wait.h
+
+#include utils.h
+
+#define SPRN_DSCR 0x11/* Privilege state SPR */
+#define SPRN_DSCR_USR 0x03/* Problem state SPR */
+#define THREADS100 /* Max threads */
+#define COUNT 100 /* Max iterations */
+#define DSCR_MAX 16 /* Max DSCR value */
+#define LEN_MAX100 /* Max name length */
+
+#define DSCR_DEFAULT /sys/devices/system/cpu/dscr_default
+#define CPU_PATH /sys/devices/system/cpu/
+
+#define rmb() asm volatile(lwsync:::memory)
+#define wmb() asm volatile(lwsync:::memory)
+
+#define ACCESS_ONCE(x) (*(volatile typeof(x) *)(x))
+
+/* Prilvilege state DSCR access */
+inline unsigned long get_dscr(void)
+{
+ unsigned long ret;
+
+ asm volatile(mfspr %0,%1 : =r (ret): i (SPRN_DSCR));
+
+ return ret;
+}
+
+inline void set_dscr(unsigned long val)
+{
+ asm volatile(mtspr %1,%0 : : r (val), i (SPRN_DSCR));
+}
+
+/* Problem state DSCR access */
+inline unsigned long get_dscr_usr(void)
+{
+ unsigned long ret;
+
+ asm volatile(mfspr %0,%1 : =r (ret): i (SPRN_DSCR_USR));
+
+ return ret;
+}
+
+inline void set_dscr_usr(unsigned long val)
+{
+ asm volatile(mtspr %1,%0 : : r (val), i (SPRN_DSCR_USR));
+}
+
+/* Default DSCR access */
+unsigned long get_default_dscr(void)
+{
+ int fd = -1;
+ char buf[16];
+ unsigned long val;
+
+ if (fd == -1) {
+ fd = open(DSCR_DEFAULT, O_RDONLY);
+ if (fd == -1) {
+ perror(open() failed\n);
+ exit(1);
+ }
+ }
+ memset(buf, 0, sizeof(buf));
+ lseek(fd, 0, SEEK_SET);
+ read(fd, buf, sizeof(buf));
+ sscanf(buf, %lx, val);
+ close(fd);
+ return val;
+}
+
+void set_default_dscr(unsigned long val)
+{
+ int fd = -1;
+ char buf[16];
+
+ if (fd == -1) {
+ fd = open(DSCR_DEFAULT, O_RDWR);
+ if (fd == -1) {
+ perror(open() failed\n);
+ exit(1);
+ }
[PATCH V2 11/12] selftests, powerpc: Add test for all DSCR sysfs interfaces
This test continuously updates the system wide DSCR default value
in the sysfs interface and makes sure that the same is reflected
across all the sysfs interfaces for each individual CPUs present
on the system.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 3 +-
.../selftests/powerpc/dscr/dscr_sysfs_test.c | 89 ++
2 files changed, 91 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index 4e84309..fada526 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,5 +1,6 @@
PROGS := dscr_default_test dscr_explicit_test dscr_user_test \
-dscr_inherit_test dscr_inherit_exec_test
+dscr_inherit_test dscr_inherit_exec_test \
+dscr_sysfs_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c
new file mode 100644
index 000..3d11439
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c
@@ -0,0 +1,89 @@
+/*
+ * POWER Data Stream Control Register (DSCR) sysfs interface test
+ *
+ * This test updates to system wide DSCR default through the sysfs interface
+ * and then verifies that all the CPU specific DSCR defaults are updated as
+ * well verified from their sysfs interfaces.
+ *
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include dscr.h
+
+static int check_cpu_dscr_default(char *file, unsigned long val)
+{
+ char buf[10];
+ int fd, rc;
+
+ fd = open(file, O_RDWR);
+ if (fd == -1) {
+ perror(open() failed\n);
+ return 1;
+ }
+
+ rc = read(fd, buf, sizeof(buf));
+ if (rc == -1) {
+ perror(read() failed\n);
+ return 1;
+ }
+ close(fd);
+
+ buf[rc] = '\0';
+ if (strtol(buf, NULL, 16) != val) {
+ printf(DSCR match failed: %ld (system) %ld (cpu)\n,
+ val, strtol(buf, NULL, 16));
+ return 1;
+ }
+ return 0;
+}
+
+static int check_all_cpu_dscr_defaults(unsigned long val)
+{
+ DIR *sysfs;
+ struct dirent *dp;
+ char file[LEN_MAX];
+
+ sysfs = opendir(CPU_PATH);
+ if (!sysfs) {
+ perror(opendir() failed\n);
+ return 1;
+ }
+
+ while ((dp = readdir(sysfs))) {
+ if (!(dp-d_type DT_DIR))
+ continue;
+ if (!strcmp(dp-d_name, cpuidle))
+ continue;
+ if (!strstr(dp-d_name, cpu))
+ continue;
+
+ sprintf(file, %s%s/dscr, CPU_PATH, dp-d_name);
+ if (check_cpu_dscr_default(file, val))
+ return 1;
+ }
+ closedir(sysfs);
+ return 0;
+}
+
+int test_body(void)
+{
+ int i, j;
+
+ for (i = 0; i COUNT; i++) {
+ for (j = 0; j DSCR_MAX; j++) {
+ set_default_dscr(j);
+ if (check_all_cpu_dscr_defaults(j))
+ return 1;
+ }
+ }
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(test_body, dscr_sysfs_test);
+}
--
1.9.3
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[PATCH V2 12/12] selftests, powerpc: Add thread based stress test for DSCR sysfs interfaces
This patch adds a test to update the system wide DSCR value repeatedly
and then verifies that any thread on any given CPU on the system must
be able to see the same DSCR value whether its is being read through
the problem state based SPR or the privilege state based SPR.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 2 +-
.../powerpc/dscr/dscr_sysfs_thread_test.c | 114 +
2 files changed, 115 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/dscr/dscr_sysfs_thread_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index fada526..834ef88 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,6 +1,6 @@
PROGS := dscr_default_test dscr_explicit_test dscr_user_test \
dscr_inherit_test dscr_inherit_exec_test \
-dscr_sysfs_test
+dscr_sysfs_test dscr_sysfs_thread_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_sysfs_thread_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_sysfs_thread_test.c
new file mode 100644
index 000..95a4304
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_sysfs_thread_test.c
@@ -0,0 +1,114 @@
+/*
+ * POWER Data Stream Control Register (DSCR) sysfs thread test
+ *
+ * This test updates the system wide DSCR default value through
+ * sysfs interface which should then update all the CPU specific
+ * DSCR default values which must also be then visible to threads
+ * executing on individual CPUs on the system.
+ *
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#define _GNU_SOURCE
+#include dscr.h
+
+static pthread_mutex_t lock; /* Pthread lock */
+static cpu_set_t cpuset; /* Thread cpu set */
+static int target; /* Thread target cpu */
+static unsigned long *result; /* Thread exit status array */
+
+static void *test_thread_dscr(void *in)
+{
+ unsigned long cur_dscr, cur_dscr_usr;
+ unsigned long val = (unsigned long)in;
+
+ pthread_mutex_lock(lock);
+ target++;
+ if (target == sysconf(_SC_NPROCESSORS_ONLN))
+ target = 0;
+ CPU_ZERO(cpuset);
+ CPU_SET(target, cpuset);
+
+ if (sched_setaffinity(0, sizeof(cpuset), cpuset)) {
+ perror(sched_settarget_cpu() failed\n);
+ pthread_mutex_unlock(lock);
+ result[target] = 1;
+ pthread_exit(result[target]);
+ }
+ pthread_mutex_unlock(lock);
+
+ cur_dscr = get_dscr();
+ cur_dscr_usr = get_dscr_usr();
+
+ if (val != cur_dscr) {
+ printf([cpu %d] Kernel DSCR should be %ld but is %ld\n,
+ sched_getcpu(), val, cur_dscr);
+ result[target] = 1;
+ pthread_exit(result[target]);
+ }
+
+ if (val != cur_dscr_usr) {
+ printf([cpu %d] User DSCR should be %ld but is %ld\n,
+ sched_getcpu(), val, cur_dscr_usr);
+ result[target] = 1;
+ pthread_exit(result[target]);
+ }
+ result[target] = 0;
+ pthread_exit(result[target]);
+}
+
+static int check_cpu_dscr_thread(unsigned long val)
+{
+ pthread_t threads[sysconf(_SC_NPROCESSORS_ONLN)];
+ unsigned long *status[sysconf(_SC_NPROCESSORS_ONLN)];
+ unsigned long i;
+
+ for (i = 0; i sysconf(_SC_NPROCESSORS_ONLN); i++) {
+ if (pthread_create(threads[i], NULL,
+ test_thread_dscr, (void *)val)) {
+ perror(pthread_create() failed\n);
+ return 1;
+ }
+ }
+
+ for (i = 0; i sysconf(_SC_NPROCESSORS_ONLN); i++) {
+ if (pthread_join(threads[i], (void **)(status[i]))) {
+ perror(pthread_join() failed\n);
+ return 1;
+ }
+
+ if (*status[i]) {
+ printf( %ldth thread join failed with %ld\n,
+ i, *status[i]);
+ return 1;
+ }
+ }
+ return 0;
+}
+
+int test_body(void)
+{
+ int i, j;
+
+ result = malloc(sizeof(unsigned long) * sysconf(_SC_NPROCESSORS_ONLN));
+ pthread_mutex_init(lock, NULL);
+ target = 0;
+ for (i = 0; i COUNT; i++) {
+ for (j = 0; j DSCR_MAX; j++) {
+ set_default_dscr(j);
+ if
Re: [PATCH V2 09/12] selftests, powerpc: Add test for DSCR value inheritence across fork
On 01/13/2015 03:22 AM, Anshuman Khandual wrote:
This patch adds a test to verify that the changed DSCR value inside
any process would be inherited to it's child process across the fork
system call.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 3 +-
.../selftests/powerpc/dscr/dscr_inherit_test.c | 96
++
2 files changed, 98 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index ae865d8..81239e2 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,4 +1,5 @@
-PROGS := dscr_default_test dscr_explicit_test dscr_user_test
+PROGS := dscr_default_test dscr_explicit_test dscr_user_test \
+ dscr_inherit_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c
new file mode 100644
index 000..f1add77
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_inherit_test.c
@@ -0,0 +1,96 @@
+/*
+ * POWER Data Stream Control Register (DSCR) fork test
+ *
+ * This testcase modifies the DSCR using mtspr, forks and then
+ * verifies that the child process has the correct changed DSCR
+ * value using mfspr.
+ *
+ * When using the privilege state SPR, the instructions such as
+ * mfspr or mtspr are priviledged and the kernel emulates them
+ * for us. Instructions using problem state SPR can be exuecuted
+ * directly without any emulation if the HW supports them. Else
+ * they also get emulated by the kernel.
+ *
+ * Copyright (C) 2012 Anton Blanchard an...@au.ibm.com, IBM
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include dscr.h
+
+int test_body(void)
+{
+ unsigned long i, dscr = 0;
+ pid_t pid;
+
+ srand(getpid());
+ set_dscr(dscr);
+
+ for (i = 0; i COUNT; i++) {
+ unsigned long cur_dscr, cur_dscr_usr;
+
+ dscr++;
+ if (dscr DSCR_MAX)
+ dscr = 0;
+
+ if (i % 2 == 0)
+ set_dscr_usr(dscr);
+ else
+ set_dscr(dscr);
+
+ /*
+ * XXX: Force a context switch out so that DSCR
+ * current value is copied into the thread struct
+ * which is required for the child to inherit the
+ * changed value.
+ */
+ sleep(1);
+
+ pid = fork();
+ if (pid == -1) {
+ perror(fork() failed\n);
+ exit(1);
+ } else if (pid) {
+ int status;
+
+ if (waitpid(pid, status, 0) == -1) {
+ perror(waitpid() failed\n);
+ exit(1);
+ }
+
+ if (!WIFEXITED(status)) {
+ fprintf(stderr, Child didn't exit cleanly\n);
+ exit(1);
+ }
+
+ if (WEXITSTATUS(status) != 0) {
+ fprintf(stderr, Child didn't exit cleanly\n);
+ return 1;
+ }
+ } else {
+ cur_dscr = get_dscr();
+ if (cur_dscr != dscr) {
+ fprintf(stderr, Kernel DSCR should be %ld
+ but is %ld\n, dscr, cur_dscr);
+ exit(1);
+ }
+
+ cur_dscr_usr = get_dscr_usr();
+ if (cur_dscr_usr != dscr) {
+ fprintf(stderr, User DSCR should be %ld
+ but is %ld\n, dscr, cur_dscr_usr);
+ exit(1);
+ }
+ exit(0);
+ }
+ }
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(test_body, dscr_inherit_test);
+}
Could you please add a .gitignore for powerpc targets as we
discussed earlier. It can be separate patch.
Also, I would like to see the test results reports using
kselftest.h - it can be separate patch in the interest of
getting tests in.
Acked-by: Shuah Khan shua...@osg.samsung.com
Please take this through powerpc maintainer git.
thanks,
-- Shuah
--
Shuah Khan
Sr. Linux Kernel
Re: [PATCH V2 10/12] selftests, powerpc: Add test for DSCR inheritence across fork exec
On 01/13/2015 03:22 AM, Anshuman Khandual wrote:
This patch adds a test case to verify that the changed DSCR value
inside any process would be inherited to it's child across the fork
and exec system call.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 2 +-
.../powerpc/dscr/dscr_inherit_exec_test.c | 118
+
2 files changed, 119 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index 81239e2..4e84309 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,5 +1,5 @@
PROGS := dscr_default_test dscr_explicit_test dscr_user_test \
- dscr_inherit_test
+ dscr_inherit_test dscr_inherit_exec_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c
new file mode 100644
index 000..5ff3849
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_inherit_exec_test.c
@@ -0,0 +1,118 @@
+/*
+ * POWER Data Stream Control Register (DSCR) fork exec test
+ *
+ * This testcase modifies the DSCR using mtspr, forks execs and
+ * verifies that the child is using the changed DSCR using mfspr.
+ *
+ * When using the privilege state SPR, the instructions such as
+ * mfspr or mtspr are priviledged and the kernel emulates them
+ * for us. Instructions using problem state SPR can be exuecuted
+ * directly without any emulation if the HW supports them. Else
+ * they also get emulated by the kernel.
+ *
+ * Copyright (C) 2012 Anton Blanchard an...@au.ibm.com, IBM
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include dscr.h
+
+static char prog[LEN_MAX];
+
+static void do_exec(unsigned long parent_dscr)
+{
+ unsigned long cur_dscr, cur_dscr_usr;
+
+ cur_dscr = get_dscr();
+ cur_dscr_usr = get_dscr_usr();
+
+ if (cur_dscr != parent_dscr) {
+ fprintf(stderr, Parent DSCR %ld was not inherited
+ over exec (kernel value)\n, parent_dscr);
+ exit(1);
+ }
+
+ if (cur_dscr_usr != parent_dscr) {
+ fprintf(stderr, Parent DSCR %ld was not inherited
+ over exec (user value)\n, parent_dscr);
+ exit(1);
+ }
+ exit(0);
+}
+
+int test_body(void)
+{
+ unsigned long i, dscr = 0;
+ pid_t pid;
+
+ for (i = 0; i COUNT; i++) {
+ dscr++;
+ if (dscr DSCR_MAX)
+ dscr = 0;
+
+ if (dscr == get_default_dscr())
+ continue;
+
+ if (i % 2 == 0)
+ set_dscr_usr(dscr);
+ else
+ set_dscr(dscr);
+
+ /*
+ * XXX: Force a context switch out so that DSCR
+ * current value is copied into the thread struct
+ * which is required for the child to inherit the
+ * changed value.
+ */
+ sleep(1);
+
+ pid = fork();
+ if (pid == -1) {
+ perror(fork() failed\n);
+ exit(1);
+ } else if (pid) {
+ int status;
+
+ if (waitpid(pid, status, 0) == -1) {
+ perror(waitpid() failed\n);
+ exit(1);
+ }
+
+ if (!WIFEXITED(status)) {
+ fprintf(stderr, Child didn't exit cleanly\n);
+ exit(1);
+ }
+
+ if (WEXITSTATUS(status) != 0) {
+ fprintf(stderr, Child didn't exit cleanly\n);
+ return 1;
+ }
+ } else {
+ char dscr_str[16];
+
+ sprintf(dscr_str, %ld, dscr);
+ execlp(prog, prog, exec, dscr_str, NULL);
+ exit(1);
+ }
+ }
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ if (argc == 3 !strcmp(argv[1], exec)) {
+ unsigned long parent_dscr;
+
+ parent_dscr = atoi(argv[2]);
+ do_exec(parent_dscr);
+ } else if (argc != 1) {
+ fprintf(stderr, Usage: %s\n, argv[0]);
+
Re: [PATCH V2 06/12] selftests, powerpc: Add test for system wide DSCR default
On 01/13/2015 03:22 AM, Anshuman Khandual wrote:
This patch adds a test case for the system wide DSCR default
value, which when changed through it's sysfs interface must
be visible to all threads reading DSCR either through the
privilege state SPR or the problem state SPR. The DSCR value
change should be immediate as well.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/Makefile | 2 +-
tools/testing/selftests/powerpc/dscr/Makefile | 17 +++
tools/testing/selftests/powerpc/dscr/dscr.h| 120
.../selftests/powerpc/dscr/dscr_default_test.c | 121
+
4 files changed, 259 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/dscr/Makefile
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr.h
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_default_test.c
diff --git a/tools/testing/selftests/powerpc/Makefile
b/tools/testing/selftests/powerpc/Makefile
index f6ff90a..1318883 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -13,7 +13,7 @@ CFLAGS := -Wall -O2 -flto -Wall -Werror
-DGIT_VERSION='$(GIT_VERSION)' -I$(CUR
export CC CFLAGS
-TARGETS = pmu copyloops mm tm primitives
+TARGETS = pmu copyloops mm tm primitives dscr
endif
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
new file mode 100644
index 000..0aa90ab
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -0,0 +1,17 @@
+PROGS := dscr_default_test
+
+CFLAGS := $(CFLAGS) -lpthread
+
+all: $(PROGS)
+
+$(PROGS): ../harness.c
+
+run_tests: all
+ @-for PROG in $(PROGS); do \
+ ./$$PROG; \
+ done;
+
+clean:
+ rm -f $(PROGS) *.o
+
+.PHONY: all run_tests clean
diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h
b/tools/testing/selftests/powerpc/dscr/dscr.h
new file mode 100644
index 000..2e6535b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -0,0 +1,120 @@
+/*
+ * POWER Data Stream Control Register (DSCR)
+ *
+ * This header file contains helper functions and macros
+ * required for all the DSCR related test cases.
+ *
+ * Copyright (C) 2012 Anton Blanchard an...@au.ibm.com, IBM
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef _SELFTESTS_POWERPC_DSCR_DSCR_H
+#define _SELFTESTS_POWERPC_DSCR_DSCR_H
+
+#include unistd.h
+#include stdio.h
+#include stdlib.h
+#include string.h
+#include fcntl.h
+#include dirent.h
+#include pthread.h
+#include sched.h
+#include sys/types.h
+#include sys/stat.h
+#include sys/wait.h
+
+#include utils.h
+
+#define SPRN_DSCR0x11/* Privilege state SPR */
+#define SPRN_DSCR_USR0x03/* Problem state SPR */
+#define THREADS 100 /* Max threads */
+#define COUNT100 /* Max iterations */
+#define DSCR_MAX 16 /* Max DSCR value */
+#define LEN_MAX 100 /* Max name length */
+
+#define DSCR_DEFAULT /sys/devices/system/cpu/dscr_default
+#define CPU_PATH /sys/devices/system/cpu/
+
+#define rmb() asm volatile(lwsync:::memory)
+#define wmb() asm volatile(lwsync:::memory)
+
+#define ACCESS_ONCE(x) (*(volatile typeof(x) *)(x))
+
+/* Prilvilege state DSCR access */
+inline unsigned long get_dscr(void)
+{
+ unsigned long ret;
+
+ asm volatile(mfspr %0,%1 : =r (ret): i (SPRN_DSCR));
+
+ return ret;
+}
+
+inline void set_dscr(unsigned long val)
+{
+ asm volatile(mtspr %1,%0 : : r (val), i (SPRN_DSCR));
+}
+
+/* Problem state DSCR access */
+inline unsigned long get_dscr_usr(void)
+{
+ unsigned long ret;
+
+ asm volatile(mfspr %0,%1 : =r (ret): i (SPRN_DSCR_USR));
+
+ return ret;
+}
+
+inline void set_dscr_usr(unsigned long val)
+{
+ asm volatile(mtspr %1,%0 : : r (val), i (SPRN_DSCR_USR));
+}
+
+/* Default DSCR access */
+unsigned long get_default_dscr(void)
+{
+ int fd = -1;
+ char buf[16];
+ unsigned long val;
+
+ if (fd == -1) {
+ fd = open(DSCR_DEFAULT, O_RDONLY);
+ if (fd == -1) {
+ perror(open() failed\n);
+ exit(1);
+ }
+ }
+ memset(buf, 0, sizeof(buf));
+ lseek(fd, 0, SEEK_SET);
+ read(fd, buf, sizeof(buf));
+ sscanf(buf, %lx, val);
+ close(fd);
+ return val;
+}
+
+void set_default_dscr(unsigned long val)
+{
+ int fd = -1;
+ char buf[16];
+
+ if (fd == -1) {
+ fd =
Re: [PATCH V2 07/12] selftests, powerpc: Add test for explicitly changing DSCR value
On 01/13/2015 03:22 AM, Anshuman Khandual wrote:
This patch adds a test which modifies the DSCR using mtspr instruction
and verifies the change using mfspr instruction. It uses both the
privilege state SPR as well as the problem state SPR for the purpose.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 2 +-
.../selftests/powerpc/dscr/dscr_explicit_test.c| 72
++
2 files changed, 73 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index 0aa90ab..aede453 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,4 +1,4 @@
-PROGS := dscr_default_test
+PROGS := dscr_default_test dscr_explicit_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c
new file mode 100644
index 000..5c0b7c1
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_explicit_test.c
@@ -0,0 +1,72 @@
+/*
+ * POWER Data Stream Control Register (DSCR) explicit test
+ *
+ * This test modifies the DSCR value using mtspr instruction and
+ * verifies the change with mfspr instruction. It uses both the
+ * privilege state SPR and the problem state SPR for this purpose.
+ *
+ * When using the privilege state SPR, the instructions such as
+ * mfspr or mtspr are priviledged and the kernel emulates them
+ * for us. Instructions using problem state SPR can be exuecuted
+ * directly without any emulation if the HW supports them. Else
+ * they also get emulated by the kernel.
+ *
+ * Copyright (C) 2012 Anton Blanchard an...@au.ibm.com, IBM
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include dscr.h
+
+int test_body(void)
+{
+ unsigned long i, dscr = 0;
+
+ srand(getpid());
+ set_dscr(dscr);
+
+ for (i = 0; i COUNT; i++) {
+ unsigned long cur_dscr, cur_dscr_usr;
+ double ret = uniform_deviate(rand());
+
+ if (ret 0.001) {
+ dscr++;
+ if (dscr DSCR_MAX)
+ dscr = 0;
+
+ set_dscr(dscr);
+ }
+
+ cur_dscr = get_dscr();
+ if (cur_dscr != dscr) {
+ fprintf(stderr, Kernel DSCR should be %ld but
+ is %ld\n, dscr, cur_dscr);
+ return 1;
+ }
+
+ ret = uniform_deviate(rand());
+ if (ret 0.001) {
+ dscr++;
+ if (dscr DSCR_MAX)
+ dscr = 0;
+
+ set_dscr_usr(dscr);
+ }
+
+ cur_dscr_usr = get_dscr_usr();
+ if (cur_dscr_usr != dscr) {
+ fprintf(stderr, User DSCR should be %ld but
+ is %ld\n, dscr, cur_dscr_usr);
+ return 1;
+ }
+ }
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(test_body, dscr_explicit_test);
+}
Could you please add a .gitignore for powerpc targets as we
discussed earlier. It can be separate patch.
Also, I would like to see the test results reports using
kselftest.h - it can be separate patch in the interest of
getting tests in.
Acked-by: Shuah Khan shua...@osg.samsung.com
Please take this through powerpc maintainer git.
thanks,
-- Shuah
--
Shuah Khan
Sr. Linux Kernel Developer
Open Source Innovation Group
Samsung Research America (Silicon Valley)
shua...@osg.samsung.com | (970) 217-8978
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Re: [PATCH V2 08/12] selftests, powerpc: Add test for DSCR SPR numbers
On 01/13/2015 03:22 AM, Anshuman Khandual wrote:
This patch adds a test which verifies that the DSCR privilege and
problem state SPR read write accesses while making sure that the
results are always the same irrespective of which SPR number is
being used.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 2 +-
.../selftests/powerpc/dscr/dscr_user_test.c| 62
++
2 files changed, 63 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_user_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index aede453..ae865d8 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,4 +1,4 @@
-PROGS := dscr_default_test dscr_explicit_test
+PROGS := dscr_default_test dscr_explicit_test dscr_user_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_user_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_user_test.c
new file mode 100644
index 000..f25d68e
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_user_test.c
@@ -0,0 +1,62 @@
+/*
+ * POWER Data Stream Control Register (DSCR) SPR test
+ *
+ * This test modifies the DSCR value through both the SPR number
+ * based mtspr instruction and then makes sure that the same is
+ * reflected through mfspr instruction using either of the SPR
+ * numbers.
+ *
+ * When using the privilege state SPR, the instructions such as
+ * mfspr or mtspr are priviledged and the kernel emulates them
+ * for us. Instructions using problem state SPR can be exuecuted
+ * directly without any emulation if the HW supports them. Else
+ * they also get emulated by the kernel.
+ *
+ * Copyright (C) 2013 Anton Blanchard an...@au.ibm.com, IBM
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include dscr.h
+
+static int check_dscr(char *str)
+{
+ unsigned long cur_dscr, cur_dscr_usr;
+
+ cur_dscr = get_dscr();
+ cur_dscr_usr = get_dscr_usr();
+ if (cur_dscr != cur_dscr_usr) {
+ printf(%s set, kernel get %lx != user get %lx\n,
+ str, cur_dscr, cur_dscr_usr);
+ return 1;
+ }
+ return 0;
+}
+
+int test_body(void)
+{
+ int i;
+
+ check_dscr();
+
+ for (i = 0; i COUNT; i++) {
+ set_dscr(i);
+ if (check_dscr(kernel))
+ return 1;
+ }
+
+ for (i = 0; i COUNT; i++) {
+ set_dscr_usr(i);
+ if (check_dscr(user))
+ return 1;
+ }
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(test_body, dscr_user_test);
+}
Could you please add a .gitignore for powerpc targets as we
discussed earlier. It can be separate patch.
Also, I would like to see the test results reports using
kselftest.h - it can be separate patch in the interest of
getting tests in.
Acked-by: Shuah Khan shua...@osg.samsung.com
Please take this through powerpc maintainer git.
thanks,
-- Shuah
--
Shuah Khan
Sr. Linux Kernel Developer
Open Source Innovation Group
Samsung Research America (Silicon Valley)
shua...@osg.samsung.com | (970) 217-8978
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Re: [PATCH V2 11/12] selftests, powerpc: Add test for all DSCR sysfs interfaces
On 01/13/2015 03:22 AM, Anshuman Khandual wrote:
This test continuously updates the system wide DSCR default value
in the sysfs interface and makes sure that the same is reflected
across all the sysfs interfaces for each individual CPUs present
on the system.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 3 +-
.../selftests/powerpc/dscr/dscr_sysfs_test.c | 89
++
2 files changed, 91 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index 4e84309..fada526 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,5 +1,6 @@
PROGS := dscr_default_test dscr_explicit_test dscr_user_test \
- dscr_inherit_test dscr_inherit_exec_test
+ dscr_inherit_test dscr_inherit_exec_test \
+ dscr_sysfs_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c
new file mode 100644
index 000..3d11439
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c
@@ -0,0 +1,89 @@
+/*
+ * POWER Data Stream Control Register (DSCR) sysfs interface test
+ *
+ * This test updates to system wide DSCR default through the sysfs interface
+ * and then verifies that all the CPU specific DSCR defaults are updated as
+ * well verified from their sysfs interfaces.
+ *
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include dscr.h
+
+static int check_cpu_dscr_default(char *file, unsigned long val)
+{
+ char buf[10];
+ int fd, rc;
+
+ fd = open(file, O_RDWR);
+ if (fd == -1) {
+ perror(open() failed\n);
+ return 1;
+ }
+
+ rc = read(fd, buf, sizeof(buf));
+ if (rc == -1) {
+ perror(read() failed\n);
+ return 1;
+ }
+ close(fd);
+
+ buf[rc] = '\0';
+ if (strtol(buf, NULL, 16) != val) {
+ printf(DSCR match failed: %ld (system) %ld (cpu)\n,
+ val, strtol(buf, NULL, 16));
+ return 1;
+ }
+ return 0;
+}
+
+static int check_all_cpu_dscr_defaults(unsigned long val)
+{
+ DIR *sysfs;
+ struct dirent *dp;
+ char file[LEN_MAX];
+
+ sysfs = opendir(CPU_PATH);
+ if (!sysfs) {
+ perror(opendir() failed\n);
+ return 1;
+ }
+
+ while ((dp = readdir(sysfs))) {
+ if (!(dp-d_type DT_DIR))
+ continue;
+ if (!strcmp(dp-d_name, cpuidle))
+ continue;
+ if (!strstr(dp-d_name, cpu))
+ continue;
+
+ sprintf(file, %s%s/dscr, CPU_PATH, dp-d_name);
+ if (check_cpu_dscr_default(file, val))
+ return 1;
+ }
+ closedir(sysfs);
+ return 0;
+}
+
+int test_body(void)
+{
+ int i, j;
+
+ for (i = 0; i COUNT; i++) {
+ for (j = 0; j DSCR_MAX; j++) {
+ set_default_dscr(j);
+ if (check_all_cpu_dscr_defaults(j))
+ return 1;
+ }
+ }
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(test_body, dscr_sysfs_test);
+}
Could you please add a .gitignore for powerpc targets as we
discussed earlier. It can be separate patch.
Also, I would like to see the test results reports using
kselftest.h - it can be separate patch in the interest of
getting tests in.
Acked-by: Shuah Khan shua...@osg.samsung.com
Please take this through powerpc maintainer git.
thanks,
-- Shuah
--
Shuah Khan
Sr. Linux Kernel Developer
Open Source Innovation Group
Samsung Research America (Silicon Valley)
shua...@osg.samsung.com | (970) 217-8978
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Re: [PATCH V2 12/12] selftests, powerpc: Add thread based stress test for DSCR sysfs interfaces
On 01/13/2015 03:22 AM, Anshuman Khandual wrote:
This patch adds a test to update the system wide DSCR value repeatedly
and then verifies that any thread on any given CPU on the system must
be able to see the same DSCR value whether its is being read through
the problem state based SPR or the privilege state based SPR.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
tools/testing/selftests/powerpc/dscr/Makefile | 2 +-
.../powerpc/dscr/dscr_sysfs_thread_test.c | 114
+
2 files changed, 115 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/dscr/dscr_sysfs_thread_test.c
diff --git a/tools/testing/selftests/powerpc/dscr/Makefile
b/tools/testing/selftests/powerpc/dscr/Makefile
index fada526..834ef88 100644
--- a/tools/testing/selftests/powerpc/dscr/Makefile
+++ b/tools/testing/selftests/powerpc/dscr/Makefile
@@ -1,6 +1,6 @@
PROGS := dscr_default_test dscr_explicit_test dscr_user_test \
dscr_inherit_test dscr_inherit_exec_test \
- dscr_sysfs_test
+ dscr_sysfs_test dscr_sysfs_thread_test
CFLAGS := $(CFLAGS) -lpthread
diff --git a/tools/testing/selftests/powerpc/dscr/dscr_sysfs_thread_test.c
b/tools/testing/selftests/powerpc/dscr/dscr_sysfs_thread_test.c
new file mode 100644
index 000..95a4304
--- /dev/null
+++ b/tools/testing/selftests/powerpc/dscr/dscr_sysfs_thread_test.c
@@ -0,0 +1,114 @@
+/*
+ * POWER Data Stream Control Register (DSCR) sysfs thread test
+ *
+ * This test updates the system wide DSCR default value through
+ * sysfs interface which should then update all the CPU specific
+ * DSCR default values which must also be then visible to threads
+ * executing on individual CPUs on the system.
+ *
+ * Copyright (C) 2015 Anshuman Khandual khand...@linux.vnet.ibm.com, IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#define _GNU_SOURCE
+#include dscr.h
+
+static pthread_mutex_t lock; /* Pthread lock */
+static cpu_set_t cpuset; /* Thread cpu set */
+static int target; /* Thread target cpu */
+static unsigned long *result;/* Thread exit status array */
+
+static void *test_thread_dscr(void *in)
+{
+ unsigned long cur_dscr, cur_dscr_usr;
+ unsigned long val = (unsigned long)in;
+
+ pthread_mutex_lock(lock);
+ target++;
+ if (target == sysconf(_SC_NPROCESSORS_ONLN))
+ target = 0;
+ CPU_ZERO(cpuset);
+ CPU_SET(target, cpuset);
+
+ if (sched_setaffinity(0, sizeof(cpuset), cpuset)) {
+ perror(sched_settarget_cpu() failed\n);
+ pthread_mutex_unlock(lock);
+ result[target] = 1;
+ pthread_exit(result[target]);
+ }
+ pthread_mutex_unlock(lock);
+
+ cur_dscr = get_dscr();
+ cur_dscr_usr = get_dscr_usr();
+
+ if (val != cur_dscr) {
+ printf([cpu %d] Kernel DSCR should be %ld but is %ld\n,
+ sched_getcpu(), val, cur_dscr);
+ result[target] = 1;
+ pthread_exit(result[target]);
+ }
+
+ if (val != cur_dscr_usr) {
+ printf([cpu %d] User DSCR should be %ld but is %ld\n,
+ sched_getcpu(), val, cur_dscr_usr);
+ result[target] = 1;
+ pthread_exit(result[target]);
+ }
+ result[target] = 0;
+ pthread_exit(result[target]);
+}
+
+static int check_cpu_dscr_thread(unsigned long val)
+{
+ pthread_t threads[sysconf(_SC_NPROCESSORS_ONLN)];
+ unsigned long *status[sysconf(_SC_NPROCESSORS_ONLN)];
+ unsigned long i;
+
+ for (i = 0; i sysconf(_SC_NPROCESSORS_ONLN); i++) {
+ if (pthread_create(threads[i], NULL,
+ test_thread_dscr, (void *)val)) {
+ perror(pthread_create() failed\n);
+ return 1;
+ }
+ }
+
+ for (i = 0; i sysconf(_SC_NPROCESSORS_ONLN); i++) {
+ if (pthread_join(threads[i], (void **)(status[i]))) {
+ perror(pthread_join() failed\n);
+ return 1;
+ }
+
+ if (*status[i]) {
+ printf( %ldth thread join failed with %ld\n,
+ i, *status[i]);
+ return 1;
+ }
+ }
+ return 0;
+}
+
+int test_body(void)
+{
+ int i, j;
+
+ result = malloc(sizeof(unsigned long) * sysconf(_SC_NPROCESSORS_ONLN));
+ pthread_mutex_init(lock, NULL);
+ target = 0;
+ for (i = 0; i COUNT; i++) {
+ for (j = 0; j DSCR_MAX; j++) {
+
Re: [PATCH V2 06/12] selftests, powerpc: Add test for system wide DSCR default
On Tue, 2015-01-13 at 08:22 -0700, Shuah Khan wrote: On 01/13/2015 03:22 AM, Anshuman Khandual wrote: This patch adds a test case for the system wide DSCR default value, which when changed through it's sysfs interface must be visible to all threads reading DSCR either through the privilege state SPR or the problem state SPR. The DSCR value change should be immediate as well. Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com --- tools/testing/selftests/powerpc/Makefile | 2 +- tools/testing/selftests/powerpc/dscr/Makefile | 17 +++ tools/testing/selftests/powerpc/dscr/dscr.h| 120 .../selftests/powerpc/dscr/dscr_default_test.c | 121 + 4 files changed, 259 insertions(+), 1 deletion(-) create mode 100644 tools/testing/selftests/powerpc/dscr/Makefile create mode 100644 tools/testing/selftests/powerpc/dscr/dscr.h create mode 100644 tools/testing/selftests/powerpc/dscr/dscr_default_test.c Could you please add a .gitignore for powerpc targets as we discussed earlier. It can be separate patch. I can do that. Also, I would like to see the test results reports using kselftest.h - it can be separate patch in the interest of getting tests in. Sorry but kselftest.h doesn't do anything useful for us. We have existing test reporting that uses the subunit protocol. I'm happy to convert that to TAP, or some other well defined output format, but not to something ad-hoc like kselftest.h currently provides. cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] selftests/powerpc: Add .gitignore for powerpc selftests
Signed-off-by: Michael Ellerman m...@ellerman.id.au --- .../testing/selftests/powerpc/copyloops/.gitignore | 4 tools/testing/selftests/powerpc/mm/.gitignore | 1 + tools/testing/selftests/powerpc/pmu/.gitignore | 3 +++ tools/testing/selftests/powerpc/pmu/ebb/.gitignore | 22 ++ .../selftests/powerpc/primitives/.gitignore| 1 + tools/testing/selftests/powerpc/tm/.gitignore | 1 + 6 files changed, 32 insertions(+) create mode 100644 tools/testing/selftests/powerpc/copyloops/.gitignore create mode 100644 tools/testing/selftests/powerpc/mm/.gitignore create mode 100644 tools/testing/selftests/powerpc/pmu/.gitignore create mode 100644 tools/testing/selftests/powerpc/pmu/ebb/.gitignore create mode 100644 tools/testing/selftests/powerpc/primitives/.gitignore create mode 100644 tools/testing/selftests/powerpc/tm/.gitignore diff --git a/tools/testing/selftests/powerpc/copyloops/.gitignore b/tools/testing/selftests/powerpc/copyloops/.gitignore new file mode 100644 index ..25a192f62c4d --- /dev/null +++ b/tools/testing/selftests/powerpc/copyloops/.gitignore @@ -0,0 +1,4 @@ +copyuser_64 +copyuser_power7 +memcpy_64 +memcpy_power7 diff --git a/tools/testing/selftests/powerpc/mm/.gitignore b/tools/testing/selftests/powerpc/mm/.gitignore new file mode 100644 index ..156f4e89c2f1 --- /dev/null +++ b/tools/testing/selftests/powerpc/mm/.gitignore @@ -0,0 +1 @@ +hugetlb_vs_thp_test diff --git a/tools/testing/selftests/powerpc/pmu/.gitignore b/tools/testing/selftests/powerpc/pmu/.gitignore new file mode 100644 index ..e748f336eed3 --- /dev/null +++ b/tools/testing/selftests/powerpc/pmu/.gitignore @@ -0,0 +1,3 @@ +count_instructions +l3_bank_test +per_event_excludes diff --git a/tools/testing/selftests/powerpc/pmu/ebb/.gitignore b/tools/testing/selftests/powerpc/pmu/ebb/.gitignore new file mode 100644 index ..5967ff34c167 --- /dev/null +++ b/tools/testing/selftests/powerpc/pmu/ebb/.gitignore @@ -0,0 +1,22 @@ +back_to_back_ebbs_test +close_clears_pmcc_test +cpu_event_pinned_vs_ebb_test +cpu_event_vs_ebb_test +cycles_test +cycles_with_freeze_test +cycles_with_mmcr2_test +ebb_on_child_test +ebb_on_willing_child_test +ebb_vs_cpu_event_test +event_attributes_test +fork_cleanup_test +instruction_count_test +lost_exception_test +multi_counter_test +multi_ebb_procs_test +no_handler_test +pmae_handling_test +pmc56_overflow_test +reg_access_test +task_event_pinned_vs_ebb_test +task_event_vs_ebb_test diff --git a/tools/testing/selftests/powerpc/primitives/.gitignore b/tools/testing/selftests/powerpc/primitives/.gitignore new file mode 100644 index ..4cc4e31bed1d --- /dev/null +++ b/tools/testing/selftests/powerpc/primitives/.gitignore @@ -0,0 +1 @@ +load_unaligned_zeropad diff --git a/tools/testing/selftests/powerpc/tm/.gitignore b/tools/testing/selftests/powerpc/tm/.gitignore new file mode 100644 index ..33d02cc54a3e --- /dev/null +++ b/tools/testing/selftests/powerpc/tm/.gitignore @@ -0,0 +1 @@ +tm-resched-dscr -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] selftests/powerpc: Add .gitignore for powerpc selftests
Please add a commit log. On 01/13/2015 04:49 PM, Michael Ellerman wrote: Signed-off-by: Michael Ellerman m...@ellerman.id.au --- .../testing/selftests/powerpc/copyloops/.gitignore | 4 tools/testing/selftests/powerpc/mm/.gitignore | 1 + tools/testing/selftests/powerpc/pmu/.gitignore | 3 +++ tools/testing/selftests/powerpc/pmu/ebb/.gitignore | 22 ++ .../selftests/powerpc/primitives/.gitignore| 1 + tools/testing/selftests/powerpc/tm/.gitignore | 1 + 6 files changed, 32 insertions(+) create mode 100644 tools/testing/selftests/powerpc/copyloops/.gitignore create mode 100644 tools/testing/selftests/powerpc/mm/.gitignore create mode 100644 tools/testing/selftests/powerpc/pmu/.gitignore create mode 100644 tools/testing/selftests/powerpc/pmu/ebb/.gitignore create mode 100644 tools/testing/selftests/powerpc/primitives/.gitignore create mode 100644 tools/testing/selftests/powerpc/tm/.gitignore Please create a single .gitignore for all targets right under tools/testing/selftests/powerpc instead of multiple .gitignore files. thanks, -- Shuah -- Shuah Khan Sr. Linux Kernel Developer Open Source Innovation Group Samsung Research America (Silicon Valley) shua...@osg.samsung.com | (970) 217-8978 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
