[PATCH V2] tick/broadcast: Make movement of broadcast hrtimer robust against hotplug
Today if the cpu handling broadcasting of wakeups goes offline, the job of broadcasting is handed over to another cpu in the CPU_DEAD phase. The CPU_DEAD notifiers are run only after the offline cpu sets its state as CPU_DEAD. Meanwhile, the kthread doing the offline is scheduled out while waiting for this transition by queuing a timer. This is fatal because if the cpu on which this kthread was running has no other work queued on it, it can re-enter deep idle state, since it sees that a broadcast cpu still exists. However the broadcast wakeup will never come since the cpu which was handling it is offline, and the cpu on which the kthread doing the hotplug operation was running never wakes up to see this because its in deep idle state. Fix this by setting the broadcast timer to a max value so as to force the cpus entering deep idle states henceforth to freshly nominate the broadcast cpu. More importantly this has to be done in the CPU_DYING phase so that it is visible to all cpus right after exiting stop_machine, which is when they can re-enter idle. This ensures that handover of the broadcast duty falls in place on offline of the broadcast cpu, without having to do it explicitly. It fixes the bug reported here: http://linuxppc.10917.n7.nabble.com/offlining-cpus-breakage-td88619.html Signed-off-by: Preeti U Murthy pre...@linux.vnet.ibm.com --- Changes from V1: https://lkml.org/lkml/2015/1/19/168 1. Modified the Changelog kernel/time/clockevents.c|2 +- kernel/time/tick-broadcast.c |4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c index 5544990..f3907c9 100644 --- a/kernel/time/clockevents.c +++ b/kernel/time/clockevents.c @@ -568,6 +568,7 @@ int clockevents_notify(unsigned long reason, void *arg) case CLOCK_EVT_NOTIFY_CPU_DYING: tick_handover_do_timer(arg); + tick_shutdown_broadcast_oneshot(arg); break; case CLOCK_EVT_NOTIFY_SUSPEND: @@ -580,7 +581,6 @@ int clockevents_notify(unsigned long reason, void *arg) break; case CLOCK_EVT_NOTIFY_CPU_DEAD: - tick_shutdown_broadcast_oneshot(arg); tick_shutdown_broadcast(arg); tick_shutdown(arg); /* diff --git a/kernel/time/tick-broadcast.c b/kernel/time/tick-broadcast.c index 066f0ec..e9c1d9b 100644 --- a/kernel/time/tick-broadcast.c +++ b/kernel/time/tick-broadcast.c @@ -675,8 +675,8 @@ static void broadcast_move_bc(int deadcpu) if (!bc || !broadcast_needs_cpu(bc, deadcpu)) return; - /* This moves the broadcast assignment to this cpu */ - clockevents_program_event(bc, bc-next_event, 1); + /* This allows fresh nomination of broadcast cpu */ + bc-next_event.tv64 = KTIME_MAX; } /* ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH] powerpc/dts: Update platform PLL node
Regaeds,
Igal Liberman.
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, January 20, 2015 9:44 AM
To: Liberman Igal-B31950
Cc: linuxppc-dev@lists.ozlabs.org; Medve Emilian-EMMEDVE1
Subject: Re: [PATCH] powerpc/dts: Update platform PLL node
On Mon, 2015-01-12 at 08:00 +0200, Igal.Liberman wrote:
From: Igal Liberman igal.liber...@freescale.com
Signed-off-by: Igal Liberman igal.liber...@freescale.com
Change-Id: I92d020651237041d3767aa35e9345439714f9831
---
arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
Please explain this more. Was it just wrong before? Is this for a new chip?
If
the latter, what effect does this have on existing chips?
It wasn't wrong, however it was missing some clocking options which might be
used by some hardware accelerators available in T/B devices.
I need this options for FMan, however it might be used for other accelerators
too.
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
index 48e0b6e..7e1f074 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-clockgen2.dtsi
@@ -49,14 +49,16 @@ global-utilities@e1000 {
reg = 0x800 0x4;
compatible = fsl,qoriq-core-pll-2.0;
clocks = sysclk;
- clock-output-names = pll0, pll0-div2, pll0-div4;
+ clock-output-names = pll0, pll0-div2, pll0-div3,
+ pll0-div4;
You're changing the meaning of existing clock index 2.
Yes, however this platform PLL is a new work which is not yet used, so we
aren't breaking any functionality.
-Scott
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Re: [PATCH] powerpc/pseries: Avoid context switch in EEH reset if required
On Mon, 2015-01-19 at 09:47 +1100, Gavin Shan wrote:
On pseries platform, the EEH reset backend pseries_eeh_reset() can
be called in atomic context as follows. For this case, we should
call udelay() instead of msleep() to avoid context switching.
drivers/scsi/ipr.c::ipr_reset_slot_reset_done()
drivers/pci/pci.c::pci_set_pcie_reset_state()
arch/powerpc/kernel/eeh.c::pcibios_set_pcie_reset_state()
arch/powerpc/platforms/pseries/eeh_pseries.c::pseries_eeh_reset()
It's not acceptable to introduce multi-millisecond delays at interrupt
time. In fact, we should generally not use udelay in such context.
I understand that this is an exceptional error handling case but it's
still not right.
Are there many other users of pci_set_pcie_reset_state() at interrupt
time ? Can we have a discussion with the PCI folks as to whether that
should be legal or not ?
I'm tempted to require that it's made illegal.
Ben.
Signed-off-by: Gavin Shan gws...@linux.vnet.ibm.com
Tested-by: Wen Xiongwenxi...@linux.vnet.ibm.com
---
arch/powerpc/platforms/pseries/eeh_pseries.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c
b/arch/powerpc/platforms/pseries/eeh_pseries.c
index a6c7e19..67623a3 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -503,8 +503,7 @@ static int pseries_eeh_get_state(struct eeh_pe *pe, int
*state)
*/
static int pseries_eeh_reset(struct eeh_pe *pe, int option)
{
- int config_addr;
- int ret;
+ int config_addr, delay, ret;
/* Figure out PE address */
config_addr = pe-config_addr;
@@ -528,9 +527,14 @@ static int pseries_eeh_reset(struct eeh_pe *pe, int
option)
/* We need reset hold or settlement delay */
if (option == EEH_RESET_FUNDAMENTAL ||
option == EEH_RESET_HOT)
- msleep(EEH_PE_RST_HOLD_TIME);
+ delay = EEH_PE_RST_HOLD_TIME;
+ else
+ delay = EEH_PE_RST_SETTLE_TIME;
+
+ if (in_atomic())
+ udelay(delay * 1000);
else
- msleep(EEH_PE_RST_SETTLE_TIME);
+ msleep(delay);
return ret;
}
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[PATCH v2 01/11] powerpc/8xx: remove remaining unnecessary code in FixupDAR
Since commit 33fb845a6f01 (powerpc/8xx: Don't use MD_TWC for walk), MD_EPN and MD_TWC are not writen anymore in FixupDAR so saving r3 has become useless. Signed-off-by: Christophe Leroy christophe.le...@c-s.fr --- v2: no change arch/powerpc/kernel/head_8xx.S | 6 -- 1 file changed, 6 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 3d4b8ee..79b8a23 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -532,9 +532,6 @@ DARFixed:/* Return from dcbx instruction bug workaround */ /* define if you don't want to use self modifying code */ #define NO_SELF_MODIFYING_CODE FixupDAR:/* Entry point for dcbx workaround. */ -#ifdef CONFIG_8xx_CPU6 - mtspr SPRN_DAR, r3 -#endif mtspr SPRN_SPRG_SCRATCH2, r10 /* fetch instruction from memory. */ mfspr r10, SPRN_SRR0 @@ -551,9 +548,6 @@ FixupDAR:/* Entry point for dcbx workaround. */ /* Extract level 2 index */ rlwinm r11, r11, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29 lwzxr11, r10, r11 /* Get the pte */ -#ifdef CONFIG_8xx_CPU6 - mfspr r3, SPRN_DAR -#endif /* concat physical page address(r11) and page offset(r10) */ mfspr r10, SPRN_SRR0 rlwimi r11, r10, 0, 32 - PAGE_SHIFT, 31 -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 03/11] powerpc32: Use kmem_cache memory for PGDIR
When pages are not 4K, PGDIR table is allocated with kmalloc(). In order to
optimise TLB handlers, aligned memory is needed. kmalloc() doesn't provide
aligned memory blocks, so lets use a kmem_cache pool instead.
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr
---
v2: changed to apply cleanly to linux-next (due to patch ab090dc)
arch/powerpc/include/asm/pgtable-ppc32.h | 4
arch/powerpc/mm/pgtable_32.c | 16 ++--
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h
b/arch/powerpc/include/asm/pgtable-ppc32.h
index c718bfd..affc703 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -341,10 +341,14 @@ static inline void __ptep_set_access_flags(pte_t *ptep,
pte_t entry)
#define __pte_to_swp_entry(pte)((swp_entry_t) { pte_val(pte)
3 })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val 3 })
+#ifndef CONFIG_PPC_4K_PAGES
+void pgtable_cache_init(void);
+#else
/*
* No page table caches to initialise
*/
#define pgtable_cache_init() do { } while (0)
+#endif
extern int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep,
pmd_t **pmdp);
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 50fad38..c06599f 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -73,13 +73,25 @@ extern unsigned long p_mapped_by_tlbcam(phys_addr_t pa);
#define PGDIR_ORDER(32 + PGD_T_LOG2 - PGDIR_SHIFT)
+#ifndef CONFIG_PPC_4K_PAGES
+static struct kmem_cache *pgtable_cache;
+
+void pgtable_cache_init(void)
+{
+ pgtable_cache = kmem_cache_create(PGDIR cache, 1 PGDIR_ORDER,
+ 1 PGDIR_ORDER, 0, NULL);
+ if (pgtable_cache == NULL)
+ panic(Couldn't allocate pgtable caches);
+}
+#endif
+
pgd_t *pgd_alloc(struct mm_struct *mm)
{
pgd_t *ret;
/* pgdir take page or two with 4K pages and a page fraction otherwise */
#ifndef CONFIG_PPC_4K_PAGES
- ret = kzalloc(1 PGDIR_ORDER, GFP_KERNEL);
+ ret = kmem_cache_alloc(pgtable_cache, GFP_KERNEL | __GFP_ZERO);
#else
ret = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO,
PGDIR_ORDER - PAGE_SHIFT);
@@ -90,7 +102,7 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
void pgd_free(struct mm_struct *mm, pgd_t *pgd)
{
#ifndef CONFIG_PPC_4K_PAGES
- kfree((void *)pgd);
+ kmem_cache_free(pgtable_cache, (void *)pgd);
#else
free_pages((unsigned long)pgd, PGDIR_ORDER - PAGE_SHIFT);
#endif
--
2.1.0
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Re: [PATCH V2] tick/broadcast: Make movement of broadcast hrtimer robust against hotplug
On Tue, 20 Jan 2015, Preeti U Murthy wrote: --- a/kernel/time/tick-broadcast.c +++ b/kernel/time/tick-broadcast.c @@ -675,8 +675,8 @@ static void broadcast_move_bc(int deadcpu) if (!bc || !broadcast_needs_cpu(bc, deadcpu)) return; - /* This moves the broadcast assignment to this cpu */ - clockevents_program_event(bc, bc-next_event, 1); + /* This allows fresh nomination of broadcast cpu */ This comment should explain WHY this enforces the move of the broadcast to a different cpu. 'Allows' is rather ambiguous. + bc-next_event.tv64 = KTIME_MAX; Thanks, tglx ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 1/8] clk: ppc-corenet: Fix checkpatch type PARENTHESIS_ALIGNMENT
CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
+ rc = of_property_read_string_index(np, clock-output-names,
+ 0, clk_name);
CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
+ pr_err(Could not register clock provider for node:%s\n,
+np-name);
CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
+ rc = of_property_read_string_index(np, clock-output-names,
+ i, clk_name);
CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
+ pr_err(Could not register clk provider for node:%s\n,
+np-name);
Signed-off-by: Emil Medve emilian.me...@freescale.com
---
drivers/clk/clk-ppc-corenet.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index bf0fe56..7cb8f23 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -110,7 +110,7 @@ static void __init core_mux_init(struct device_node *np)
cmux_clk-flags = CLKSEL_ADJUST;
rc = of_property_read_string_index(np, clock-output-names,
- 0, clk_name);
+ 0, clk_name);
if (rc) {
pr_err(%s: read clock names error\n, np-name);
goto err_clk;
@@ -132,7 +132,7 @@ static void __init core_mux_init(struct device_node *np)
rc = of_clk_add_provider(np, of_clk_src_simple_get, clk);
if (rc) {
pr_err(Could not register clock provider for node:%s\n,
-np-name);
+ np-name);
goto err_clk;
}
goto err_name;
@@ -198,7 +198,7 @@ static void __init core_pll_init(struct device_node *np)
for (i = 0; i count; i++) {
rc = of_property_read_string_index(np, clock-output-names,
- i, clk_name);
+ i, clk_name);
if (rc) {
pr_err(%s: could not get clock names\n, np-name);
goto err_cell;
@@ -230,7 +230,7 @@ static void __init core_pll_init(struct device_node *np)
rc = of_clk_add_provider(np, of_clk_src_onecell_get, onecell_data);
if (rc) {
pr_err(Could not register clk provider for node:%s\n,
-np-name);
+ np-name);
goto err_cell;
}
--
2.2.2
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[PATCH 8/8] clk: ppc-corenet: Add support for the platform PLL
Change-Id: Iac11ed95f274485a86d2c11f32a3dc502bcd020f
Signed-off-by: Emil Medve emilian.me...@freescale.com
---
drivers/clk/clk-ppc-corenet.c | 85 +++
1 file changed, 85 insertions(+)
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index 91816b1..ff425e1 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -7,6 +7,9 @@
*
* clock driver for Freescale PowerPC corenet SoCs.
*/
+
+#define pr_fmt(fmt) KBUILD_MODNAME : fmt
+
#include linux/clk-provider.h
#include linux/io.h
#include linux/kernel.h
@@ -261,9 +264,91 @@ static void __init sysclk_init(struct device_node *node)
of_clk_add_provider(np, of_clk_src_simple_get, clk);
}
+static void __init pltfrm_pll_init(struct device_node *np)
+{
+ void __iomem *base;
+ uint32_t mult;
+ const char *parent_name, *clk_name;
+ int i, _errno;
+ struct clk_onecell_data *cod;
+
+ base = of_iomap(np, 0);
+ if (!base) {
+ pr_err(%s(): %s: of_iomap() failed\n, __func__, np-name);
+ return;
+ }
+
+ /* Get the multiple of PLL */
+ mult = ioread32be(base);
+
+ iounmap(base);
+
+ /* Check if this PLL is disabled */
+ if (mult PLL_KILL) {
+ pr_debug(%s(): %s: Disabled\n, __func__, np-name);
+ return;
+ }
+ mult = (mult GENMASK(6, 1)) 1;
+
+ parent_name = of_clk_get_parent_name(np, 0);
+ if (!parent_name) {
+ pr_err(%s(): %s: of_clk_get_parent_name() failed\n,
+ __func__, np-name);
+ return;
+ }
+
+ i = of_property_count_strings(np, clock-output-names);
+ if (i 0) {
+ pr_err(%s(): %s: of_property_count_strings(clock-output-names)
= %d\n,
+ __func__, np-name, i);
+ return;
+ }
+
+ cod = kmalloc(sizeof(*cod) + i * sizeof(struct clk *), GFP_KERNEL);
+ if (!cod)
+ return;
+ cod-clks = (struct clk **)(cod + 1);
+ cod-clk_num = i;
+
+ for (i = 0; i cod-clk_num; i++) {
+ _errno = of_property_read_string_index(np, clock-output-names,
+ i, clk_name);
+ if (_errno 0) {
+ pr_err(%s(): %s:
of_property_read_string_index(clock-output-names) = %d\n,
+ __func__, np-name, _errno);
+ goto return_clk_unregister;
+ }
+
+ cod-clks[i] = clk_register_fixed_factor(NULL, clk_name,
+ parent_name, 0, mult, 1 + i);
+ if (IS_ERR(cod-clks[i])) {
+ pr_err(%s(): %s: clk_register_fixed_factor(%s) =
%ld\n,
+ __func__, np-name,
+ clk_name, PTR_ERR(cod-clks[i]));
+ goto return_clk_unregister;
+ }
+ }
+
+ _errno = of_clk_add_provider(np, of_clk_src_onecell_get, cod);
+ if (_errno 0) {
+ pr_err(%s(): %s: of_clk_add_provider() = %d\n,
+ __func__, np-name, _errno);
+ goto return_clk_unregister;
+ }
+
+ return;
+
+return_clk_unregister:
+ while (--i = 0)
+ clk_unregister(cod-clks[i]);
+ kfree(cod);
+}
+
CLK_OF_DECLARE(qoriq_sysclk_1, fsl,qoriq-sysclk-1.0, sysclk_init);
CLK_OF_DECLARE(qoriq_sysclk_2, fsl,qoriq-sysclk-2.0, sysclk_init);
CLK_OF_DECLARE(qoriq_core_pll_1, fsl,qoriq-core-pll-1.0, core_pll_init);
CLK_OF_DECLARE(qoriq_core_pll_2, fsl,qoriq-core-pll-2.0, core_pll_init);
CLK_OF_DECLARE(qoriq_core_mux_1, fsl,qoriq-core-mux-1.0, core_mux_init);
CLK_OF_DECLARE(qoriq_core_mux_2, fsl,qoriq-core-mux-2.0, core_mux_init);
+CLK_OF_DECLARE(qoriq_pltfrm_pll_1, fsl,qoriq-platform-pll-1.0,
pltfrm_pll_init);
+CLK_OF_DECLARE(qoriq_pltfrm_pll_2, fsl,qoriq-platform-pll-2.0,
pltfrm_pll_init);
--
2.2.2
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[PATCH v2 05/11] powerpc/8xx: Optimise access to swapper_pg_dir
All accessed to PGD entries are done via 0(r11). By using lower part of swapper_pg_dir as load index to r11, we can remove the ori instruction. Signed-off-by: Christophe Leroy christophe.le...@c-s.fr --- v2: fixed/added comments to explain what is the real content of M_TW arch/powerpc/kernel/head_8xx.S | 35 +++ 1 file changed, 19 insertions(+), 16 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index ae05f28..a485ad7 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -319,16 +319,15 @@ InstructionTLBMiss: * pin the first 8MB of kernel memory */ andis. r11, r10, 0x8000/* Address = 0x8000 */ #endif - mfspr r11, SPRN_M_TW /* Get level 1 table base address */ + mfspr r11, SPRN_M_TW /* Get level 1 table */ #ifdef CONFIG_MODULES beq 3f - lis r11, (swapper_pg_dir-PAGE_OFFSET)@h - ori r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l + lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 3: #endif /* Insert level 1 index */ rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 - lwz r11, 0(r11) /* Get the level 1 entry */ + lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */ /* Load the MI_TWC with the attributes for this segment. */ MTSPR_CPU6(SPRN_MI_TWC, r11, r3)/* Set segment attributes */ @@ -374,14 +373,13 @@ DataStoreTLBMiss: * kernel page tables. */ andis. r11, r10, 0x8000 - mfspr r11, SPRN_M_TW /* Get level 1 table base address */ + mfspr r11, SPRN_M_TW /* Get level 1 table */ beq 3f - lis r11, (swapper_pg_dir-PAGE_OFFSET)@h - ori r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l + lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 3: /* Insert level 1 index */ rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 - lwz r11, 0(r11) /* Get the level 1 entry */ + lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */ /* We have a pte table, so load fetch the pte from the table. */ @@ -509,13 +507,12 @@ FixupDAR:/* Entry point for dcbx workaround. */ /* fetch instruction from memory. */ mfspr r10, SPRN_SRR0 andis. r11, r10, 0x8000/* Address = 0x8000 */ - mfspr r11, SPRN_M_TW /* Get level 1 table base address */ - beq-3f /* Branch if user space */ - lis r11, (swapper_pg_dir-PAGE_OFFSET)@h - ori r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l + mfspr r11, SPRN_M_TW /* Get level 1 table */ + beq 3f + lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha /* Insert level 1 index */ 3: rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 - lwz r11, 0(r11) /* Get the level 1 entry */ + lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */ rlwinm r11, r11,0,0,19 /* Extract page descriptor page address */ /* Insert level 2 index */ rlwimi r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29 @@ -670,8 +667,7 @@ start_here: * init's THREAD like the context switch code does, but this is * easier..until someone changes init's static structures. */ - lis r6, swapper_pg_dir@h - ori r6, r6, swapper_pg_dir@l + lis r6, swapper_pg_dir@ha tophys(r6,r6) #ifdef CONFIG_8xx_CPU6 lis r4, cpu6_errata_word@h @@ -850,6 +846,13 @@ _GLOBAL(set_context) stw r4, 0x4(r5) #endif + /* Register M_TW will contain base address of level 1 table minus the +* lower part of the kernel PGDIR base address, so that all accesses to +* level 1 table are done relative to lower part of kernel PGDIR base +* address. +*/ + li r5, (swapper_pg_dir-PAGE_OFFSET)@l + sub r4, r4, r5 #ifdef CONFIG_8xx_CPU6 lis r6, cpu6_errata_word@h ori r6, r6, cpu6_errata_word@l @@ -857,7 +860,7 @@ _GLOBAL(set_context) li r7, 0x3f80 stw r7, 12(r6) lwz r7, 12(r6) -mtspr SPRN_M_TW, r4 /* Update MMU base address */ + mtspr SPRN_M_TW, r4 /* Update pointeur to level 1 table */ li r7, 0x3380 stw r7, 12(r6) lwz r7, 12(r6) -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH V3] tick/broadcast: Make movement of broadcast hrtimer robust against hotplug
Today if the cpu handling broadcasting of wakeups goes offline, the job of broadcasting is handed over to another cpu in the CPU_DEAD phase. The CPU_DEAD notifiers are run only after the offline cpu sets its state as CPU_DEAD. Meanwhile, the kthread doing the offline is scheduled out while waiting for this transition by queuing a timer. This is fatal because if the cpu on which this kthread was running has no other work queued on it, it can re-enter deep idle state, since it sees that a broadcast cpu still exists. However the broadcast wakeup will never come since the cpu which was handling it is offline, and the cpu on which the kthread doing the hotplug operation was running never wakes up to see this because its in deep idle state. Fix this by setting the broadcast timer to a max value so as to force the cpus entering deep idle states henceforth to freshly nominate the broadcast cpu. More importantly this has to be done in the CPU_DYING phase so that it is visible to all cpus right after exiting stop_machine, which is when they can re-enter idle. This ensures that handover of the broadcast duty falls in place on offline of the broadcast cpu, without having to do it explicitly. It fixes the bug reported here: http://linuxppc.10917.n7.nabble.com/offlining-cpus-breakage-td88619.html Signed-off-by: Preeti U Murthy pre...@linux.vnet.ibm.com --- Changes from previous versions: 1. Modification to the changelog 2. Clarified the comments kernel/time/clockevents.c|2 +- kernel/time/tick-broadcast.c |7 +-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c index 5544990..f3907c9 100644 --- a/kernel/time/clockevents.c +++ b/kernel/time/clockevents.c @@ -568,6 +568,7 @@ int clockevents_notify(unsigned long reason, void *arg) case CLOCK_EVT_NOTIFY_CPU_DYING: tick_handover_do_timer(arg); + tick_shutdown_broadcast_oneshot(arg); break; case CLOCK_EVT_NOTIFY_SUSPEND: @@ -580,7 +581,6 @@ int clockevents_notify(unsigned long reason, void *arg) break; case CLOCK_EVT_NOTIFY_CPU_DEAD: - tick_shutdown_broadcast_oneshot(arg); tick_shutdown_broadcast(arg); tick_shutdown(arg); /* diff --git a/kernel/time/tick-broadcast.c b/kernel/time/tick-broadcast.c index 066f0ec..f983983 100644 --- a/kernel/time/tick-broadcast.c +++ b/kernel/time/tick-broadcast.c @@ -675,8 +675,11 @@ static void broadcast_move_bc(int deadcpu) if (!bc || !broadcast_needs_cpu(bc, deadcpu)) return; - /* This moves the broadcast assignment to this cpu */ - clockevents_program_event(bc, bc-next_event, 1); + /* Since a cpu with the earliest wakeup is nominated as the +* standby cpu, the next cpu to invoke BROADCAST_ENTER +* will now automatically take up the duty of broadcasting. +*/ + bc-next_event.tv64 = KTIME_MAX; } /* ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 07/11] powerpc/8xx: macro for handling CPU15 errata
Le 20/01/2015 12:09, David Laight a écrit : From Christophe Leroy Having a macro will help keep clear code. It might remove an #if but it doesn't really help. All it means is that anyone reading the code has to hunt for the definition before proceeding. Some comment about what (and why) the extra code is needed might help. The main reason is because of patch 09/11 where we have to duplicate this code. I prefer to just duplicate one line rather than duplicate the whole code (especially because in v1 of the PATCHset, it was duplicated twice): -DO_8xx_CPU15(r11, r10) [...] #ifdef CONFIG_MODULES [...] +DO_8xx_CPU15(r10, r11) [...] +#else +mfsprr10, SPRN_SRR0/* Get effective address of fault */ +DO_8xx_CPU15(r11, r10) Is this approach wrong ? ... + +#ifdef CONFIG_8xx_CPU15 +#define DO_8xx_CPU15(tmp, addr)\ + additmp, addr, PAGE_SIZE; \ + tlbie tmp;\ + additmp, addr, PAGE_SIZE; \ You've even transcribed this incorrectly. Oops Clearly not tested :-) Indeed it's been tested, but tests can only show that the code is not worth than before. This code is there to fix a chip errata which (almost?) never happens. In my production version, I have not activated this errata, and he have never seen the problem on any of the more than 200 boards that have run for at least 4 years. Christophe David + tlbie tmp +#else +#define DO_8xx_CPU15(tmp, addr) +#endif + InstructionTLBMiss: #ifdef CONFIG_8xx_CPU6 mtspr SPRN_DAR, r3 @@ -304,12 +315,7 @@ InstructionTLBMiss: EXCEPTION_PROLOG_0 mtspr SPRN_SPRG_SCRATCH2, r10 mfspr r10, SPRN_SRR0 /* Get effective address of fault */ -#ifdef CONFIG_8xx_CPU15 - addir11, r10, PAGE_SIZE - tlbie r11 - addir11, r10, -PAGE_SIZE - tlbie r11 -#endif + DO_8xx_CPU15(r11, r10) /* If we are faulting a kernel address, we have to use the * kernel page tables. -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 07/11] powerpc/8xx: macro for handling CPU15 errata
Having a macro will help keep clear code. Signed-off-by: Christophe Leroy christophe.le...@c-s.fr --- v2: no change arch/powerpc/kernel/head_8xx.S | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index a1571b3..065896f 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -297,6 +297,17 @@ SystemCall: * We have to use the MD_xxx registers for the tablewalk because the * equivalent MI_xxx registers only perform the attribute functions. */ + +#ifdef CONFIG_8xx_CPU15 +#define DO_8xx_CPU15(tmp, addr)\ + additmp, addr, PAGE_SIZE; \ + tlbie tmp;\ + additmp, addr, PAGE_SIZE; \ + tlbie tmp +#else +#define DO_8xx_CPU15(tmp, addr) +#endif + InstructionTLBMiss: #ifdef CONFIG_8xx_CPU6 mtspr SPRN_DAR, r3 @@ -304,12 +315,7 @@ InstructionTLBMiss: EXCEPTION_PROLOG_0 mtspr SPRN_SPRG_SCRATCH2, r10 mfspr r10, SPRN_SRR0 /* Get effective address of fault */ -#ifdef CONFIG_8xx_CPU15 - addir11, r10, PAGE_SIZE - tlbie r11 - addir11, r10, -PAGE_SIZE - tlbie r11 -#endif + DO_8xx_CPU15(r11, r10) /* If we are faulting a kernel address, we have to use the * kernel page tables. -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 2/8] clk: ppc-corenet: Fix checkpatch type ALLOC_WITH_MULTIPLY
WARNING:ALLOC_WITH_MULTIPLY: Prefer kcalloc over kzalloc with multiply
+ subclks = kzalloc(sizeof(struct clk *) * count, GFP_KERNEL);
Signed-off-by: Emil Medve emilian.me...@freescale.com
---
drivers/clk/clk-ppc-corenet.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index 7cb8f23..efa74aa 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -85,7 +85,7 @@ static void __init core_mux_init(struct device_node *np)
pr_err(%s: get clock count error\n, np-name);
return;
}
- parent_names = kzalloc((sizeof(char *) * count), GFP_KERNEL);
+ parent_names = kcalloc(count, sizeof(char *), GFP_KERNEL);
if (!parent_names) {
pr_err(%s: could not allocate parent_names\n, __func__);
return;
@@ -184,7 +184,7 @@ static void __init core_pll_init(struct device_node *np)
/* output clock number per PLL */
clocks_per_pll = count;
- subclks = kzalloc(sizeof(struct clk *) * count, GFP_KERNEL);
+ subclks = kcalloc(count, sizeof(struct clk *), GFP_KERNEL);
if (!subclks) {
pr_err(%s: could not allocate subclks\n, __func__);
goto err_map;
--
2.2.2
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[PATCH 5/8] clk: ppc-corenet: Make local symbol 'static'
drivers/clk/clk-ppc-corenet.c:63:22: warning: symbol 'cmux_ops' was not
declared. Should it be static?
Signed-off-by: Emil Medve emilian.me...@freescale.com
---
drivers/clk/clk-ppc-corenet.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index 6a9dbaa..d84a7f0 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -57,7 +57,7 @@ static u8 cmux_get_parent(struct clk_hw *hw)
return clksel;
}
-const struct clk_ops cmux_ops = {
+static const struct clk_ops cmux_ops = {
.get_parent = cmux_get_parent,
.set_parent = cmux_set_parent,
};
--
2.2.2
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[PATCH 4/8] clk: ppc-corenet: Fix checkpatch type OOM_MESSAGE
WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
+ if (!parent_names) {
+ pr_err(%s: could not allocate parent_names\n, __func__);
WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
+ if (!cmux_clk) {
+ pr_err(%s: could not allocate cmux_clk\n, __func__);
WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
+ if (!subclks) {
+ pr_err(%s: could not allocate subclks\n, __func__);
WARNING:OOM_MESSAGE: Possible unnecessary 'out of memory' message
+ if (!onecell_data) {
+ pr_err(%s: could not allocate onecell_data\n, __func__);
Signed-off-by: Emil Medve emilian.me...@freescale.com
---
drivers/clk/clk-ppc-corenet.c | 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index a439f52..6a9dbaa 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -86,19 +86,16 @@ static void __init core_mux_init(struct device_node *np)
return;
}
parent_names = kcalloc(count, sizeof(char *), GFP_KERNEL);
- if (!parent_names) {
- pr_err(%s: could not allocate parent_names\n, __func__);
+ if (!parent_names)
return;
- }
for (i = 0; i count; i++)
parent_names[i] = of_clk_get_parent_name(np, i);
cmux_clk = kzalloc(sizeof(*cmux_clk), GFP_KERNEL);
- if (!cmux_clk) {
- pr_err(%s: could not allocate cmux_clk\n, __func__);
+ if (!cmux_clk)
goto err_name;
- }
+
cmux_clk-reg = of_iomap(np, 0);
if (!cmux_clk-reg) {
pr_err(%s: could not map register\n, __func__);
@@ -185,16 +182,12 @@ static void __init core_pll_init(struct device_node *np)
clocks_per_pll = count;
subclks = kcalloc(count, sizeof(struct clk *), GFP_KERNEL);
- if (!subclks) {
- pr_err(%s: could not allocate subclks\n, __func__);
+ if (!subclks)
goto err_map;
- }
onecell_data = kzalloc(sizeof(*onecell_data), GFP_KERNEL);
- if (!onecell_data) {
- pr_err(%s: could not allocate onecell_data\n, __func__);
+ if (!onecell_data)
goto err_clks;
- }
for (i = 0; i count; i++) {
rc = of_property_read_string_index(np, clock-output-names,
--
2.2.2
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Re: [PATCH] i2c: drop ancient protection against sysfs refcounting issues
Right, and I'm not saying it should be, just move the existing logic into the release callback, and the code flow should be the same and we don't end up with an empty release callback. But as Russell says, even if we don't have the empty callback, we still create the problem shown by DEBUG_KOBJECT_RELEASE which wasn't there before? IMHO there are two possibilities here: 1. leave it as-is, where we ensure that the remainder of i2c_del_adapter does not complete until the release callback has been called. 2. fix it properly by taking (eg) the netdev approach to i2c_adapter, or an alternative solution which results in decoupling the lifetime of the struct device from the i2c_adapter. Either of these would be much better than removing the completion and then moving a chunk of code to make it look safer than it actually is and thereby introducing potential use-after-free bugs. I agree. As much as I'd love option 2) I don't see that on the horizon. So, let's keep things as they are. What probably makes sense is to update the comment with something like this? I took the liberty and used some wording from Russell: diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c index e227dff62a85..1c89a08fae2a 100644 --- a/drivers/i2c/i2c-core.c +++ b/drivers/i2c/i2c-core.c @@ -1778,11 +1778,14 @@ void i2c_del_adapter(struct i2c_adapter *adap) /* device name is gone after device_unregister */ dev_dbg(adap-dev, adapter [%s] unregistered\n, adap-name); - /* clean up the sysfs representation */ + /* wait until all references to the device are gone +* +* FIXME: This is old code and should ideally be replaced by an +* alternative which results in decoupling the lifetime of the struct +* device from the i2c_adapter, like spi or netdev do. +*/ init_completion(adap-dev_released); device_unregister(adap-dev); - - /* wait for sysfs to drop all references */ wait_for_completion(adap-dev_released); /* free bus id */ Thanks for all the input, it is very much appreciated! signature.asc Description: Digital signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc/mm: Add trace point for tracking hash pte fault
This enables us to understand how many hash fault we are taking
when running benchmarks.
For ex:
-bash-4.2# ./perf stat -e powerpc:hash_fault -e page-faults /tmp/ebizzy.ppc64
-S 30 -P -n 1000
...
Performance counter stats for '/tmp/ebizzy.ppc64 -S 30 -P -n 1000':
1,10,04,075 powerpc:hash_fault
1,10,03,429 page-faults
30.865978991 seconds time elapsed
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/trace.h | 21 +
arch/powerpc/mm/hash_utils_64.c | 2 ++
2 files changed, 23 insertions(+)
diff --git a/arch/powerpc/include/asm/trace.h b/arch/powerpc/include/asm/trace.h
index c15da6073cb8..ded56b183888 100644
--- a/arch/powerpc/include/asm/trace.h
+++ b/arch/powerpc/include/asm/trace.h
@@ -142,8 +142,29 @@ TRACE_EVENT_FN(opal_exit,
opal_tracepoint_regfunc, opal_tracepoint_unregfunc
);
+
#endif
+TRACE_EVENT(hash_fault,
+
+ TP_PROTO(unsigned long addr, unsigned long access, unsigned long
trap),
+ TP_ARGS(addr, access, trap),
+ TP_STRUCT__entry(
+ __field(unsigned long, addr)
+ __field(unsigned long, access)
+ __field(unsigned long, trap)
+ ),
+
+ TP_fast_assign(
+ __entry-addr = addr;
+ __entry-access = access;
+ __entry-trap = trap;
+ ),
+
+ TP_printk(hash fault with addr 0x%lx and access = 0x%lx trap =
0x%lx,
+ __entry-addr, __entry-access, __entry-trap)
+);
+
#endif /* _TRACE_POWERPC_H */
#undef TRACE_INCLUDE_PATH
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 2c2022d16059..7e88470a876f 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -57,6 +57,7 @@
#include asm/fadump.h
#include asm/firmware.h
#include asm/tm.h
+#include asm/trace.h
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
@@ -1004,6 +1005,7 @@ int hash_page_mm(struct mm_struct *mm, unsigned long ea,
DBG_LOW(hash_page(ea=%016lx, access=%lx, trap=%lx\n,
ea, access, trap);
+ trace_hash_fault(ea, access, trap);
/* Get region vsid */
switch (REGION_ID(ea)) {
--
2.1.0
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Re: cpuidle/powernv: Read target_residency value of idle states from DT if available
On 01/20/2015 11:15 AM, Michael Ellerman wrote:
On Mon, 2015-19-01 at 11:32:51 UTC, Preeti U Murthy wrote:
The device tree now exposes the residency values for different idle states.
Read
these values instead of calculating residency from the latency values. The
values
exposed in the DT are validated for optimal power efficiency. However to
maintain
compatibility with the older firmware code which does not expose residency
values, use default values as a fallback mechanism. While at it, clump
the common parts of device tree parsing into one chunk.
Signed-off-by: Preeti U Murthy pre...@linux.vnet.ibm.com
---
drivers/cpuidle/cpuidle-powernv.c | 39
-
1 file changed, 25 insertions(+), 14 deletions(-)
diff --git a/drivers/cpuidle/cpuidle-powernv.c
b/drivers/cpuidle/cpuidle-powernv.c
index 2726663..9e732e1 100644
--- a/drivers/cpuidle/cpuidle-powernv.c
+++ b/drivers/cpuidle/cpuidle-powernv.c
@@ -162,7 +162,8 @@ static int powernv_add_idle_states(void)
int dt_idle_states;
const __be32 *idle_state_flags;
const __be32 *idle_state_latency;
-u32 len_flags, flags, latency_ns;
+const __be32 *idle_state_residency;
+u32 len_flags, flags, latency_ns, residency_ns;
int i;
/* Currently we have snooze statically defined */
@@ -186,14 +187,21 @@ static int powernv_add_idle_states(void)
return nr_idle_states;
}
+idle_state_residency = of_get_property(power_mgt,
+ibm,cpu-idle-state-residency-ns, NULL);
+if (!idle_state_residency) {
+pr_warn(DT-PowerMgmt: missing
ibm,cpu-idle-state-residency-ns\n);
+pr_warn(Falling back to default values\n);
+}
This would be better done with something like:
rc = of_read_property_u32(power_mgt, ibm,cpu-idle-state-residency-ns,
residency_ns);
if (!rc) {
pr_info(cpuidle-powernv: missing
ibm,cpu-idle-state-residency-ns\n);
residency_ns = 30;
}
This looks like a better API, but the default residency values are different
for each idle state. So perhaps a patch like the below ?
--Start Patch--
From: Preeti U Murthy pre...@linux.vnet.ibm.com
---
drivers/cpuidle/cpuidle-powernv.c | 54 +++--
1 file changed, 33 insertions(+), 21 deletions(-)
diff --git a/drivers/cpuidle/cpuidle-powernv.c
b/drivers/cpuidle/cpuidle-powernv.c
index aedec09..2031560 100644
--- a/drivers/cpuidle/cpuidle-powernv.c
+++ b/drivers/cpuidle/cpuidle-powernv.c
@@ -13,6 +13,7 @@
#include linux/notifier.h
#include linux/clockchips.h
#include linux/of.h
+#include linux/slab.h
#include asm/machdep.h
#include asm/firmware.h
@@ -159,9 +160,9 @@ static int powernv_add_idle_states(void)
int nr_idle_states = 1; /* Snooze */
int dt_idle_states;
const __be32 *idle_state_flags;
- const __be32 *idle_state_latency;
- u32 len_flags, flags, latency_ns;
- int i;
+ u32 len_flags, flags;
+ u32 *latency_ns, *residency_ns;
+ int i, rc;
/* Currently we have snooze statically defined */
@@ -177,34 +178,39 @@ static int powernv_add_idle_states(void)
return nr_idle_states;
}
- idle_state_latency = of_get_property(power_mgt,
- ibm,cpu-idle-state-latencies-ns, NULL);
- if (!idle_state_latency) {
+ dt_idle_states = len_flags / sizeof(u32);
+
+ latency_ns = kzalloc(sizeof(*latency_ns) * dt_idle_states, GFP_KERNEL);
+ rc = of_property_read_u32(power_mgt,
+ ibm,cpu-idle-state-latencies-ns, latency_ns);
+ if (rc) {
pr_warn(DT-PowerMgmt: missing
ibm,cpu-idle-state-latencies-ns\n);
return nr_idle_states;
}
- dt_idle_states = len_flags / sizeof(u32);
+ residency_ns = kzalloc(sizeof(*residency_ns) * dt_idle_states,
GFP_KERNEL);
+ rc = of_property_read_u32(power_mgt,
+ ibm,cpu-idle-state-residency-ns, residency_ns);
+ if (rc) {
+ pr_warn(DT-PowerMgmt: missing
ibm,cpu-idle-state-residency-ns\n);
+ pr_warn(Falling back to default values\n);
+ }
+
for (i = 0; i dt_idle_states; i++) {
flags = be32_to_cpu(idle_state_flags[i]);
-
- /* Cpuidle accepts exit_latency in us and we estimate
-* target residency to be 10x exit_latency
+ /*
+* Cpuidle accepts exit_latency and target_residency in us.
+* Use default target_residency values if f/w does not expose
it.
*/
- latency_ns = be32_to_cpu(idle_state_latency[i]);
if (flags OPAL_PM_NAP_ENABLED) {
/* Add NAP state */
strcpy(powernv_states[nr_idle_states].name,
Re: [PATCH] idle/tick-broadcast: Exit cpu idle poll loop when cleared from tick_broadcast_force_mask
On Mon, 19 Jan 2015, Preeti U Murthy wrote: An idle cpu enters cpu_idle_poll() if it is set in the tick_broadcast_force_mask. This is so that it does not incur the overhead of entering idle states when it is expected to be woken up anytime then through a broadcast IPI. The condition that forces an exit out of the idle polling is the check on setting of the TIF_NEED_RESCHED flag for the idle thread. When the broadcast IPI does arrive, it is not guarenteed that the handler sets the TIF_NEED_RESCHED flag. Hence although the cpu is cleared in the tick_broadcast_force_mask, it continues to loop in cpu_idle_poll unnecessarily wasting power. Hence exit the idle poll loop if the tick_broadcast_force_mask gets cleared and enter idle states. Of course if the cpu has entered cpu_idle_poll() on being asked to poll explicitly, it continues to poll till it is asked to reschedule. Signed-off-by: Preeti U Murthy pre...@linux.vnet.ibm.com --- kernel/sched/idle.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/kernel/sched/idle.c b/kernel/sched/idle.c index c47fce7..aaf1c1d 100644 --- a/kernel/sched/idle.c +++ b/kernel/sched/idle.c @@ -47,7 +47,8 @@ static inline int cpu_idle_poll(void) rcu_idle_enter(); trace_cpu_idle_rcuidle(0, smp_processor_id()); local_irq_enable(); - while (!tif_need_resched()) + while (!tif_need_resched() + (cpu_idle_force_poll || tick_check_broadcast_expired())) You explain the tick_check_broadcast_expired() bit, but what about the cpu_idle_force_poll part? Thanks, tglx ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 10/11] powerpc/8xx: Use SPRG2 instead of DAR for saving r3
We now have SPRG2 available as in it not used anymore for saving CR, so we don't need to crash DAR anymore for saving r3 for CPU6 ERRATA handling. Signed-off-by: Christophe Leroy christophe.le...@c-s.fr --- v2: no change arch/powerpc/kernel/head_8xx.S | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index e803ad0..ead6448 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -309,7 +309,7 @@ SystemCall: InstructionTLBMiss: #ifdef CONFIG_8xx_CPU6 - mtspr SPRN_DAR, r3 + mtspr SPRN_SPRG_SCRATCH2, r3 #endif EXCEPTION_PROLOG_0 @@ -362,8 +362,7 @@ InstructionTLBMiss: /* Restore registers */ #ifdef CONFIG_8xx_CPU6 - mfspr r3, SPRN_DAR - mtspr SPRN_DAR, r11 /* Tag DAR */ + mfspr r3, SPRN_SPRG_SCRATCH2 #endif EXCEPTION_EPILOG_0 rfi @@ -371,7 +370,7 @@ InstructionTLBMiss: . = 0x1200 DataStoreTLBMiss: #ifdef CONFIG_8xx_CPU6 - mtspr SPRN_DAR, r3 + mtspr SPRN_SPRG_SCRATCH2, r3 #endif EXCEPTION_PROLOG_0 mfcrr10 @@ -441,7 +440,7 @@ DataStoreTLBMiss: /* Restore registers */ #ifdef CONFIG_8xx_CPU6 - mfspr r3, SPRN_DAR + mfspr r3, SPRN_SPRG_SCRATCH2 #endif mtspr SPRN_DAR, r11 /* Tag DAR */ EXCEPTION_EPILOG_0 -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 08/11] powerpc/8xx: Handle CR out of exception PROLOG/EPILOG
In order to be able to reduce scope during which CR is saved, we take CR saving/restoring out of exception PROLOG and EPILOG Signed-off-by: Christophe Leroy christophe.le...@c-s.fr --- v2: no change arch/powerpc/kernel/head_8xx.S | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 065896f..27a9997 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -116,13 +116,13 @@ turn_on_mmu: */ #define EXCEPTION_PROLOG \ EXCEPTION_PROLOG_0; \ + mfcrr10;\ EXCEPTION_PROLOG_1; \ EXCEPTION_PROLOG_2 #define EXCEPTION_PROLOG_0 \ mtspr SPRN_SPRG_SCRATCH0,r10; \ - mtspr SPRN_SPRG_SCRATCH1,r11; \ - mfcrr10 + mtspr SPRN_SPRG_SCRATCH1,r11 #define EXCEPTION_PROLOG_1 \ mfspr r11,SPRN_SRR1; /* check whether user or kernel */ \ @@ -162,7 +162,6 @@ turn_on_mmu: * Exception exit code. */ #define EXCEPTION_EPILOG_0 \ - mtcrr10;\ mfspr r10,SPRN_SPRG_SCRATCH0; \ mfspr r11,SPRN_SPRG_SCRATCH1 @@ -313,6 +312,7 @@ InstructionTLBMiss: mtspr SPRN_DAR, r3 #endif EXCEPTION_PROLOG_0 + mfcrr10 mtspr SPRN_SPRG_SCRATCH2, r10 mfspr r10, SPRN_SRR0 /* Get effective address of fault */ DO_8xx_CPU15(r11, r10) @@ -363,6 +363,7 @@ InstructionTLBMiss: mtspr SPRN_DAR, r11 /* Tag DAR */ #endif mfspr r10, SPRN_SPRG_SCRATCH2 + mtcrr10 EXCEPTION_EPILOG_0 rfi @@ -372,6 +373,7 @@ DataStoreTLBMiss: mtspr SPRN_DAR, r3 #endif EXCEPTION_PROLOG_0 + mfcrr10 mtspr SPRN_SPRG_SCRATCH2, r10 mfspr r10, SPRN_MD_EPN @@ -440,6 +442,7 @@ DataStoreTLBMiss: #endif mtspr SPRN_DAR, r11 /* Tag DAR */ mfspr r10, SPRN_SPRG_SCRATCH2 + mtcrr10 EXCEPTION_EPILOG_0 rfi @@ -465,6 +468,7 @@ InstructionTLBError: . = 0x1400 DataTLBError: EXCEPTION_PROLOG_0 + mfcrr10 mfspr r11, SPRN_DAR cmpwi cr0, r11, RPN_PATTERN -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 3/8] clk: ppc-corenet: Fix checkpatch type ALLOC_SIZEOF_STRUCT
CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*cmux_clk)...) over
kzalloc(sizeof(struct cmux_clk)...)
+ cmux_clk = kzalloc(sizeof(struct cmux_clk), GFP_KERNEL);
CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*onecell_data)...) over
kzalloc(sizeof(struct clk_onecell_data)...)
+ onecell_data = kzalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
Signed-off-by: Emil Medve emilian.me...@freescale.com
---
drivers/clk/clk-ppc-corenet.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index efa74aa..a439f52 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -94,7 +94,7 @@ static void __init core_mux_init(struct device_node *np)
for (i = 0; i count; i++)
parent_names[i] = of_clk_get_parent_name(np, i);
- cmux_clk = kzalloc(sizeof(struct cmux_clk), GFP_KERNEL);
+ cmux_clk = kzalloc(sizeof(*cmux_clk), GFP_KERNEL);
if (!cmux_clk) {
pr_err(%s: could not allocate cmux_clk\n, __func__);
goto err_name;
@@ -190,7 +190,7 @@ static void __init core_pll_init(struct device_node *np)
goto err_map;
}
- onecell_data = kzalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
+ onecell_data = kzalloc(sizeof(*onecell_data), GFP_KERNEL);
if (!onecell_data) {
pr_err(%s: could not allocate onecell_data\n, __func__);
goto err_clks;
--
2.2.2
___
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[PATCH 0/8] clk: ppc-corenet: Add support for the platform PLL
These patches are based on: http://patchwork.ozlabs.org/patch/417297 http://patchwork.ozlabs.org/patch/417295 http://patchwork.ozlabs.org/patch/417292 The first 5 patches below are checkpatch/static analysis fixes Emil Medve (8): clk: ppc-corenet: Fix checkpatch type PARENTHESIS_ALIGNMENT clk: ppc-corenet: Fix checkpatch type ALLOC_WITH_MULTIPLY clk: ppc-corenet: Fix checkpatch type ALLOC_SIZEOF_STRUCT clk: ppc-corenet: Fix checkpatch type OOM_MESSAGE clk: ppc-corenet: Make local symbol 'static' clk: ppc-corenet: Replace kzalloc() with kmalloc() powerpc/corenet: Enable CLK_PPC_CORENET clk: ppc-corenet: Add support for the platform PLL arch/powerpc/configs/corenet32_smp_defconfig | 1 + arch/powerpc/configs/corenet64_smp_defconfig | 1 + drivers/clk/clk-ppc-corenet.c| 120 ++- 3 files changed, 101 insertions(+), 21 deletions(-) -- 2.2.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 00/11] powerpc8xx: Further optimisation of TLB handling
This patchset provides a further optimisation of TLB handling in the 8xx. Main changes are based on: - Using processor handling of PGD/PTE Validity bits instead of testing ourselves the entries validity - Aligning PGD address to allow direct bit manipulation - Not saving registers like CR when not needed It also adds support to any TASK_SIZE Patchset: 01 - powerpc/8xx: remove remaining unnecessary code in FixupDAR 02 - powerpc/8xx: remove tests on PGDIR entry validity 03 - powerpc32: Use kmem_cache memory for PGDIR 04 - powerpc/8xx: Take benefit of aligned PGDIR 05 - powerpc/8xx: Optimise access to swapper_pg_dir 06 - powerpc/8xx: Remove duplicated code in set_context() 07 - powerpc/8xx: macro for handling CPU15 errata 08 - powerpc/8xx: Handle CR out of exception PROLOG/EPILOG 09 - powerpc/8xx: dont save CR in SCRATCH registers 10 - powerpc/8xx: Use SPRG2 instead of DAR for saving r3 11 - powerpc/8xx: Add support for TASK_SIZE greater than 0x8000 All changes have been successfully tested on MPC885 Signed-off-by: Christophe Leroy christophe.le...@c-s.fr Tested-by: Christophe Leroy christophe.le...@c-s.fr --- arch/powerpc/include/asm/pgtable-ppc32.h | 4 + arch/powerpc/kernel/head_8xx.S | 197 +++ arch/powerpc/mm/pgtable_32.c | 16 ++- 3 files changed, 111 insertions(+), 106 deletions(-) ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 09/11] powerpc/8xx: dont save CR in SCRATCH registers
CR only needs to be preserved when checking if we are handling a kernel address. So we can preserve CR in a register: - In ITLBMiss, check is done only when CONFIG_MODULES is defined. Otherwise we don't need to do anything at all with CR. - We use r10, then we reload SRR0/MD_EPN into r10 when CR is restored Signed-off-by: Christophe Leroy christophe.le...@c-s.fr --- v2: removed the CPU6 specific handling of CR which was saving (only) 1 cycle but was making the code more difficult to maintain due to too many different cases arch/powerpc/kernel/head_8xx.S | 29 +++-- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 27a9997..e803ad0 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -312,10 +312,6 @@ InstructionTLBMiss: mtspr SPRN_DAR, r3 #endif EXCEPTION_PROLOG_0 - mfcrr10 - mtspr SPRN_SPRG_SCRATCH2, r10 - mfspr r10, SPRN_SRR0 /* Get effective address of fault */ - DO_8xx_CPU15(r11, r10) /* If we are faulting a kernel address, we have to use the * kernel page tables. @@ -323,13 +319,20 @@ InstructionTLBMiss: #ifdef CONFIG_MODULES /* Only modules will cause ITLB Misses as we always * pin the first 8MB of kernel memory */ - andis. r11, r10, 0x8000/* Address = 0x8000 */ -#endif + mfspr r11, SPRN_SRR0 /* Get effective address of fault */ + DO_8xx_CPU15(r10, r11) + mfcrr10 + andis. r11, r11, 0x8000/* Address = 0x8000 */ mfspr r11, SPRN_M_TW /* Get level 1 table */ -#ifdef CONFIG_MODULES beq 3f lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 3: + mtcrr10 + mfspr r10, SPRN_SRR0 /* Get effective address of fault */ +#else + mfspr r10, SPRN_SRR0 /* Get effective address of fault */ + DO_8xx_CPU15(r11, r10) + mfspr r11, SPRN_M_TW /* Get level 1 table base address */ #endif /* Insert level 1 index */ rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 @@ -362,8 +365,6 @@ InstructionTLBMiss: mfspr r3, SPRN_DAR mtspr SPRN_DAR, r11 /* Tag DAR */ #endif - mfspr r10, SPRN_SPRG_SCRATCH2 - mtcrr10 EXCEPTION_EPILOG_0 rfi @@ -374,17 +375,19 @@ DataStoreTLBMiss: #endif EXCEPTION_PROLOG_0 mfcrr10 - mtspr SPRN_SPRG_SCRATCH2, r10 - mfspr r10, SPRN_MD_EPN /* If we are faulting a kernel address, we have to use the * kernel page tables. */ - andis. r11, r10, 0x8000 + mfspr r11, SPRN_MD_EPN + andis. r11, r11, 0x8000 mfspr r11, SPRN_M_TW /* Get level 1 table */ beq 3f lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 3: + mtcrr10 + mfspr r10, SPRN_MD_EPN + /* Insert level 1 index */ rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the level 1 entry */ @@ -441,8 +444,6 @@ DataStoreTLBMiss: mfspr r3, SPRN_DAR #endif mtspr SPRN_DAR, r11 /* Tag DAR */ - mfspr r10, SPRN_SPRG_SCRATCH2 - mtcrr10 EXCEPTION_EPILOG_0 rfi -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 11/11] powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000
By default, TASK_SIZE is set to 0x8000 for PPC_8xx, which is most likely sufficient for most cases. However, kernel configuration allows to set TASK_SIZE to another value, so the 8xx shall handle it. Signed-off-by: Christophe Leroy christophe.le...@c-s.fr --- v2: no change arch/powerpc/kernel/head_8xx.S | 25 +++-- 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index ead6448..92a6456 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -48,6 +48,19 @@ mtspr spr, reg #endif +/* Macro to test if an address is a kernel address */ +#if CONFIG_TASK_SIZE = 0x8000 +#define IS_KERNEL(tmp, addr) \ + andis. tmp, addr, 0x8000 /* Address = 0x8000 */ +#define BRANCH_UNLESS_KERNEL(label)beq label +#else +#define IS_KERNEL(tmp, addr) \ + rlwinm tmp, addr, 16, 16, 31; \ + cmpli cr0, tmp, PAGE_OFFSET 16 +#define BRANCH_UNLESS_KERNEL(label)blt label +#endif + + /* * Value for the bits that have fixed value in RPN entries. * Also used for tagging DAR for DTLBerror. @@ -322,9 +335,9 @@ InstructionTLBMiss: mfspr r11, SPRN_SRR0 /* Get effective address of fault */ DO_8xx_CPU15(r10, r11) mfcrr10 - andis. r11, r11, 0x8000/* Address = 0x8000 */ + IS_KERNEL(r11, r11) mfspr r11, SPRN_M_TW /* Get level 1 table */ - beq 3f + BRANCH_UNLESS_KERNEL(3f) lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 3: mtcrr10 @@ -379,9 +392,9 @@ DataStoreTLBMiss: * kernel page tables. */ mfspr r11, SPRN_MD_EPN - andis. r11, r11, 0x8000 + IS_KERNEL(r11, r11) mfspr r11, SPRN_M_TW /* Get level 1 table */ - beq 3f + BRANCH_UNLESS_KERNEL(3f) lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 3: mtcrr10 @@ -516,9 +529,9 @@ FixupDAR:/* Entry point for dcbx workaround. */ mtspr SPRN_SPRG_SCRATCH2, r10 /* fetch instruction from memory. */ mfspr r10, SPRN_SRR0 - andis. r11, r10, 0x8000/* Address = 0x8000 */ + IS_KERNEL(r11, r10) mfspr r11, SPRN_M_TW /* Get level 1 table */ - beq 3f + BRANCH_UNLESS_KERNEL(3f) lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha /* Insert level 1 index */ 3: rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 7/8] powerpc/corenet: Enable CLK_PPC_CORENET
Change-Id: I1a80ad7b9f6854791bd270b746f93a91439155a6 Signed-off-by: Emil Medve emilian.me...@freescale.com --- arch/powerpc/configs/corenet32_smp_defconfig | 1 + arch/powerpc/configs/corenet64_smp_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig index 611efe9..93c38d2 100644 --- a/arch/powerpc/configs/corenet32_smp_defconfig +++ b/arch/powerpc/configs/corenet32_smp_defconfig @@ -147,6 +147,7 @@ CONFIG_STAGING=y CONFIG_MEMORY=y CONFIG_VIRT_DRIVERS=y CONFIG_FSL_HV_MANAGER=y +CONFIG_CLK_PPC_CORENET=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig index be24a18..b9d75ae 100644 --- a/arch/powerpc/configs/corenet64_smp_defconfig +++ b/arch/powerpc/configs/corenet64_smp_defconfig @@ -119,6 +119,7 @@ CONFIG_VIRT_DRIVERS=y CONFIG_FSL_HV_MANAGER=y CONFIG_FSL_CORENET_CF=y CONFIG_MEMORY=y +CONFIG_CLK_PPC_CORENET=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y CONFIG_ISO9660_FS=m -- 2.2.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 06/11] powerpc/8xx: Remove duplicated code in set_context()
Signed-off-by: Christophe Leroy christophe.le...@c-s.fr --- v2: no change arch/powerpc/kernel/head_8xx.S | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index a485ad7..a1571b3 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -853,23 +853,21 @@ _GLOBAL(set_context) */ li r5, (swapper_pg_dir-PAGE_OFFSET)@l sub r4, r4, r5 + tophys (r4, r4) #ifdef CONFIG_8xx_CPU6 lis r6, cpu6_errata_word@h ori r6, r6, cpu6_errata_word@l - tophys (r4, r4) li r7, 0x3f80 stw r7, 12(r6) lwz r7, 12(r6) +#endif mtspr SPRN_M_TW, r4 /* Update pointeur to level 1 table */ +#ifdef CONFIG_8xx_CPU6 li r7, 0x3380 stw r7, 12(r6) lwz r7, 12(r6) -mtspr SPRN_M_CASID, r3 /* Update context */ -#else -mtspr SPRN_M_CASID,r3/* Update context */ - tophys (r4, r4) - mtspr SPRN_M_TW, r4 /* and pgd */ #endif + mtspr SPRN_M_CASID, r3/* Update context */ SYNC blr -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 04/11] powerpc/8xx: Take benefit of aligned PGDIR
L1 base address is now aligned so we can insert L1 index into r11 directly and then preserve r10 Signed-off-by: Christophe Leroy christophe.le...@c-s.fr --- v2: no change arch/powerpc/kernel/head_8xx.S | 34 +++--- 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 2c329f1..ae05f28 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -326,16 +326,15 @@ InstructionTLBMiss: ori r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l 3: #endif - /* Extract level 1 index */ - rlwinm r10, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 - lwzxr11, r10, r11 /* Get the level 1 entry */ - rlwinm r10, r11,0,0,19 /* Extract page descriptor page address */ + /* Insert level 1 index */ + rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 + lwz r11, 0(r11) /* Get the level 1 entry */ /* Load the MI_TWC with the attributes for this segment. */ MTSPR_CPU6(SPRN_MI_TWC, r11, r3)/* Set segment attributes */ - mfspr r11, SPRN_SRR0 /* Get effective address of fault */ + rlwinm r11, r11,0,0,19 /* Extract page descriptor page address */ /* Extract level 2 index */ - rlwinm r11, r11, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29 + rlwinm r10, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29 lwzxr10, r10, r11 /* Get the pte */ #ifdef CONFIG_SWAP @@ -380,13 +379,12 @@ DataStoreTLBMiss: lis r11, (swapper_pg_dir-PAGE_OFFSET)@h ori r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l 3: - /* Extract level 1 index */ - rlwinm r10, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 - lwzxr11, r10, r11 /* Get the level 1 entry */ + /* Insert level 1 index */ + rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 + lwz r11, 0(r11) /* Get the level 1 entry */ /* We have a pte table, so load fetch the pte from the table. */ - mfspr r10, SPRN_MD_EPN/* Get address of fault */ /* Extract level 2 index */ rlwinm r10, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29 rlwimi r10, r11, 0, 0, 32 - PAGE_SHIFT - 1 /* Add level 2 base */ @@ -515,16 +513,14 @@ FixupDAR:/* Entry point for dcbx workaround. */ beq-3f /* Branch if user space */ lis r11, (swapper_pg_dir-PAGE_OFFSET)@h ori r11, r11, (swapper_pg_dir-PAGE_OFFSET)@l - /* Extract level 1 index */ -3: rlwinm r10, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 - lwzxr11, r10, r11 /* Get the level 1 entry */ - rlwinm r10, r11,0,0,19 /* Extract page descriptor page address */ - mfspr r11, SPRN_SRR0 /* Get effective address of fault */ - /* Extract level 2 index */ - rlwinm r11, r11, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29 - lwzxr11, r10, r11 /* Get the pte */ + /* Insert level 1 index */ +3: rlwimi r11, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 + lwz r11, 0(r11) /* Get the level 1 entry */ + rlwinm r11, r11,0,0,19 /* Extract page descriptor page address */ + /* Insert level 2 index */ + rlwimi r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29 + lwz r11, 0(r11) /* Get the pte */ /* concat physical page address(r11) and page offset(r10) */ - mfspr r10, SPRN_SRR0 rlwimi r11, r10, 0, 32 - PAGE_SHIFT, 31 lwz r11,0(r11) /* Check if it really is a dcbx instruction. */ -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 02/11] powerpc/8xx: remove tests on PGDIR entry validity
Kernel MMU handling code handles validity of entries via _PMD_PRESENT which corresponds to V bit in MD_TWC and MI_TWC. When the V bit is not set, MPC8xx triggers TLBError exception. So we don't have to check that and branch ourself to TLBError. We can set TLB entries with non present entries, remove all those tests and let the 8xx handle it. This reduce the number of cycle when the entries are valid which is the case most of the time, and doesn't significantly increase the time for handling invalid entries. Signed-off-by: Christophe Leroy christophe.le...@c-s.fr --- v2: no change arch/powerpc/kernel/head_8xx.S | 41 - 1 file changed, 8 insertions(+), 33 deletions(-) diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 79b8a23..2c329f1 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -329,12 +329,9 @@ InstructionTLBMiss: /* Extract level 1 index */ rlwinm r10, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 lwzxr11, r10, r11 /* Get the level 1 entry */ - rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */ - beq 2f /* If zero, don't try to find a pte */ + rlwinm r10, r11,0,0,19 /* Extract page descriptor page address */ - /* We have a pte table, so load the MI_TWC with the attributes -* for this segment. -*/ + /* Load the MI_TWC with the attributes for this segment. */ MTSPR_CPU6(SPRN_MI_TWC, r11, r3)/* Set segment attributes */ mfspr r11, SPRN_SRR0 /* Get effective address of fault */ /* Extract level 2 index */ @@ -342,13 +339,11 @@ InstructionTLBMiss: lwzxr10, r10, r11 /* Get the pte */ #ifdef CONFIG_SWAP - andi. r11, r10, _PAGE_ACCESSED | _PAGE_PRESENT - cmpwi cr0, r11, _PAGE_ACCESSED | _PAGE_PRESENT - li r11, RPN_PATTERN - bne-cr0, 2f -#else - li r11, RPN_PATTERN + rlwinm r11, r10, 32-5, _PAGE_PRESENT + and r11, r11, r10 + rlwimi r10, r11, 0, _PAGE_PRESENT #endif + li r11, RPN_PATTERN /* The Linux PTE won't go exactly into the MMU TLB. * Software indicator bits 21 and 28 must be clear. * Software indicator bits 24, 25, 26, and 27 must be @@ -366,21 +361,6 @@ InstructionTLBMiss: mfspr r10, SPRN_SPRG_SCRATCH2 EXCEPTION_EPILOG_0 rfi -2: - mfspr r10, SPRN_SRR1 - /* clear all error bits as TLB Miss -* sets a few unconditionally - */ - rlwinm r10, r10, 0, 0x - mtspr SPRN_SRR1, r10 - - /* Restore registers */ -#ifdef CONFIG_8xx_CPU6 - mfspr r3, SPRN_DAR - mtspr SPRN_DAR, r11 /* Tag DAR */ -#endif - mfspr r10, SPRN_SPRG_SCRATCH2 - b InstructionTLBError1 . = 0x1200 DataStoreTLBMiss: @@ -403,8 +383,6 @@ DataStoreTLBMiss: /* Extract level 1 index */ rlwinm r10, r10, 32 - ((PAGE_SHIFT - 2) 1), (PAGE_SHIFT - 2) 1, 29 lwzxr11, r10, r11 /* Get the level 1 entry */ - rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */ - beq 2f /* If zero, don't try to find a pte */ /* We have a pte table, so load fetch the pte from the table. */ @@ -450,7 +428,7 @@ DataStoreTLBMiss: * set. All other Linux PTE bits control the behavior * of the MMU. */ -2: li r11, RPN_PATTERN + li r11, RPN_PATTERN rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */ MTSPR_CPU6(SPRN_MD_RPN, r10, r3)/* Update TLB entry */ @@ -469,10 +447,7 @@ DataStoreTLBMiss: */ . = 0x1300 InstructionTLBError: - EXCEPTION_PROLOG_0 -InstructionTLBError1: - EXCEPTION_PROLOG_1 - EXCEPTION_PROLOG_2 + EXCEPTION_PROLOG mr r4,r12 mr r5,r9 andis. r10,r5,0x4000 -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] i2c: drop ancient protection against sysfs refcounting issues
On Tue, Jan 20, 2015 at 03:12:56PM +0800, Greg Kroah-Hartman wrote:
On Tue, Jan 20, 2015 at 08:05:20AM +0100, Lars-Peter Clausen wrote:
On 01/20/2015 02:41 AM, Greg Kroah-Hartman wrote:
On Mon, Jan 19, 2015 at 11:04:27PM +, Russell King - ARM Linux wrote:
On Tue, Jan 20, 2015 at 03:01:42AM +0800, Greg Kroah-Hartman wrote:
On Mon, Jan 19, 2015 at 07:55:56PM +0100, Wolfram Sang wrote:
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 39d25a8cb1ad..15cc5902cf89 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -41,7 +41,6 @@
#include linux/of_device.h
#include linux/of_irq.h
#include linux/clk/clk-conf.h
-#include linux/completion.h
#include linux/hardirq.h
#include linux/irqflags.h
#include linux/rwsem.h
@@ -1184,8 +1183,7 @@ EXPORT_SYMBOL_GPL(i2c_new_dummy);
static void i2c_adapter_dev_release(struct device *dev)
{
- struct i2c_adapter *adap = to_i2c_adapter(dev);
- complete(adap-dev_released);
+ /* empty, but the driver core insists we need a release
function */
Yeah, it does, but I hate to see this in real code as something is
probably wrong with it if it happens.
Please move the rest of 'i2c_del_adapter' into the release function
(what was after the wait_for_completion() call), and then all should be
fine.
Are you sure about that? Some drivers do this, eg,
i2c_del_adapter(drv_data-adapter);
free_irq(drv_data-irq, drv_data);
where drv_data was allocated using devm_kzalloc(), and so will be
released when the -remove callback (which calls the above
i2c_del_adapter()) returns... freeing the embedded device struct.
But that will fail today if the memory is freed in i2c_del_adapter(), so
there shouldn't be any change in logic here.
Or am I missing something obvious?
The memory is not freed in i2c_del_adapter().
Right, and I'm not saying it should be, just move the existing logic
into the release callback, and the code flow should be the same and we
don't end up with an empty release callback.
IMHO there are two possibilities here:
1. leave it as-is, where we ensure that the remainder of i2c_del_adapter
does not complete until the release callback has been called.
2. fix it properly by taking (eg) the netdev approach to i2c_adapter,
or an alternative solution which results in decoupling the lifetime
of the struct device from the i2c_adapter.
Either of these would be much better than removing the completion and
then moving a chunk of code to make it look safer than it actually is
and thereby introducing potential use-after-free bugs.
--
FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up
according to speedtest.net.
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[PATCH 6/8] clk: ppc-corenet: Replace kzalloc() with kmalloc()
Where the memset() is not necessary Signed-off-by: Emil Medve emilian.me...@freescale.com --- drivers/clk/clk-ppc-corenet.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c index d84a7f0..91816b1 100644 --- a/drivers/clk/clk-ppc-corenet.c +++ b/drivers/clk/clk-ppc-corenet.c @@ -185,7 +185,7 @@ static void __init core_pll_init(struct device_node *np) if (!subclks) goto err_map; - onecell_data = kzalloc(sizeof(*onecell_data), GFP_KERNEL); + onecell_data = kmalloc(sizeof(*onecell_data), GFP_KERNEL); if (!onecell_data) goto err_clks; -- 2.2.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH v2 07/11] powerpc/8xx: macro for handling CPU15 errata
From Christophe Leroy Having a macro will help keep clear code. It might remove an #if but it doesn't really help. All it means is that anyone reading the code has to hunt for the definition before proceeding. Some comment about what (and why) the extra code is needed might help. ... + +#ifdef CONFIG_8xx_CPU15 +#define DO_8xx_CPU15(tmp, addr) \ + additmp, addr, PAGE_SIZE; \ + tlbie tmp;\ + additmp, addr, PAGE_SIZE; \ You've even transcribed this incorrectly. Clearly not tested :-) David + tlbie tmp +#else +#define DO_8xx_CPU15(tmp, addr) +#endif + InstructionTLBMiss: #ifdef CONFIG_8xx_CPU6 mtspr SPRN_DAR, r3 @@ -304,12 +315,7 @@ InstructionTLBMiss: EXCEPTION_PROLOG_0 mtspr SPRN_SPRG_SCRATCH2, r10 mfspr r10, SPRN_SRR0 /* Get effective address of fault */ -#ifdef CONFIG_8xx_CPU15 - addir11, r10, PAGE_SIZE - tlbie r11 - addir11, r10, -PAGE_SIZE - tlbie r11 -#endif + DO_8xx_CPU15(r11, r10) /* If we are faulting a kernel address, we have to use the * kernel page tables. -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] idle/tick-broadcast: Exit cpu idle poll loop when cleared from tick_broadcast_force_mask
On 01/20/2015 04:51 PM, Thomas Gleixner wrote: On Mon, 19 Jan 2015, Preeti U Murthy wrote: An idle cpu enters cpu_idle_poll() if it is set in the tick_broadcast_force_mask. This is so that it does not incur the overhead of entering idle states when it is expected to be woken up anytime then through a broadcast IPI. The condition that forces an exit out of the idle polling is the check on setting of the TIF_NEED_RESCHED flag for the idle thread. When the broadcast IPI does arrive, it is not guarenteed that the handler sets the TIF_NEED_RESCHED flag. Hence although the cpu is cleared in the tick_broadcast_force_mask, it continues to loop in cpu_idle_poll unnecessarily wasting power. Hence exit the idle poll loop if the tick_broadcast_force_mask gets cleared and enter idle states. Of course if the cpu has entered cpu_idle_poll() on being asked to poll explicitly, it continues to poll till it is asked to reschedule. Signed-off-by: Preeti U Murthy pre...@linux.vnet.ibm.com --- kernel/sched/idle.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/kernel/sched/idle.c b/kernel/sched/idle.c index c47fce7..aaf1c1d 100644 --- a/kernel/sched/idle.c +++ b/kernel/sched/idle.c @@ -47,7 +47,8 @@ static inline int cpu_idle_poll(void) rcu_idle_enter(); trace_cpu_idle_rcuidle(0, smp_processor_id()); local_irq_enable(); -while (!tif_need_resched()) +while (!tif_need_resched() +(cpu_idle_force_poll || tick_check_broadcast_expired())) You explain the tick_check_broadcast_expired() bit, but what about the cpu_idle_force_poll part? The last few lines which say Of course if the cpu has entered cpu_idle_poll() on being asked to poll explicitly, it continues to poll till it is asked to reschedule explains the cpu_idle_force_poll part. Perhaps I should s/poll explicitly/do cpu_idle_force_poll ? Regards Preeti U Murthy Thanks, tglx ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH v2 07/11] powerpc/8xx: macro for handling CPU15 errata
From: leroy Le 20/01/2015 12:09, David Laight a écrit : From Christophe Leroy Having a macro will help keep clear code. It might remove an #if but it doesn't really help. All it means is that anyone reading the code has to hunt for the definition before proceeding. Some comment about what (and why) the extra code is needed might help. The main reason is because of patch 09/11 where we have to duplicate this code. I prefer to just duplicate one line rather than duplicate the whole code (especially because in v1 of the PATCHset, it was duplicated twice): -DO_8xx_CPU15(r11, r10) [...] #ifdef CONFIG_MODULES [...] +DO_8xx_CPU15(r10, r11) [...] +#else +mfsprr10, SPRN_SRR0/* Get effective address of fault */ +DO_8xx_CPU15(r11, r10) Is this approach wrong ? I'd call it something that infers 'invalidate adjacent pages' and then mention that this is needed due to a cpu errata. David ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
PowerMac G5 Quad Issue reporting
Hello all LinuxPPc Developer, need to report a issue that im facing from kernel 3.16 and up. The fans of powermac g5 quad start boosting like a turbo jet after the system is been loaded and up. Usually this become after about 30-60 seconds when the system is loaded. This issue start with Xorg loaded or only in teminal system (gdm3 not loaded) This issue come with system load with minimum cpu usage 5% and less too. During the closing of the system (reboot) the fans goes in right silents mode. I had been tested and compiled the kernel with all the modules of fan controls for Apple G5 without a positive result. Kernel tested 3.16.ctk2 (debian wheezy 7.8), 3.18.3 and 3.19.rc5 Im using Debian Wheezy 7.6 (up 7.8) PPC on Quad G5 (970mp) Nvidia 7800gtx and RadeonHD 6570 Dont face this issue with old kernels version 3.10.65 and pre (didnt test the 3.12 and 3.14) Need to report to Michel D. from amd.com . The RadeonHD 6570 now is working on PowerMac G5 too look like the Xorg bigendian issue related Evergreen / Northern is been fixed ;-) Thanks alot for your jobs guys Hope soon i will able to help in X5000 hardware too PPC Rulez ... and sorry for my perfect english Luigi Burdo ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
How long am I allowed to disable preemption? (was How to make use of SPE instructions?)
Von: Scott Wood [scottw...@freescale.com]
Gesendet: Dienstag, 20. Januar 2015 08:38
An: Markus Stockhausen
Cc: Michael Ellerman; linuxppc-dev@lists.ozlabs.org
Betreff: Re: AW: How to make use of SPE instructions?
...
I did some tests with the tcrypt module and I get a hashing speed of
~ 46MByte/s for 2K data chunks. Stock module gives 29MByte/s. In
other words ~22,000 hashes per second. Overhead of the tcrypt data
feeder of around 10% included. That are worst case 46us per hash and
therefore 46us inside a non preemptive task.
...
It's OK if the worst case is really 46 us, but if you can find a way to
break it up a bit without affecting throughput too much, I'd do so.
Hi Scott (and all),
with your answer I'm a bit confused about disabling preemption inside the
kernel right now. I understand that the interval between preempt_disable()
and preempt_enable() should not take too long. But when I look at other
kernel hash crypto modules I see that nobody really cares about that. Take
sha256_ssse3_update() in sha256_ssse3_glue.c for example. It runs
kernel_fpu_begin();
res = __sha256_ssse3_update(desc, data, len, partial);
kernel_fpu_end();
The kernel_fpu_xxx() enables/disables preemption like I need to do.
Nevertheless parameter len can be any number of bytes. Just take
reasonable parameters of 256K of input data, a 3GHz core and 13
cycles/byte of SHA256 throughput. That will be a 1ms timeframe.
Can I rely on that implementation, or do I have to take special care
because I'm only programming for a single core CPU?
With your advice I would place a enable/disable preemption call after
1K of processed data. But wil that be sufficient if I only reeanble it
for a short timeframe like this:
do {
disable_preemption()
... calc hashes for 1K of data with 16.000 CPU cycles (or 20us) ...
enable_preemption()
while (dataleft0);
Markus
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[alsa-devel][PATCH 0/3] Add master mode, tmd and right-j mode support
Add sai master mode support. Add tdm slots support. Add Right-J mode support. Zidan Wang (3): SoC: fsl_sai: add sai master mode support ASoC: fsl_sai: Add support for tdm slots operation ASoC: fsl_sai: Add support for Right-J mode sound/soc/fsl/fsl_sai.c | 164 sound/soc/fsl/fsl_sai.h | 13 +++- 2 files changed, 164 insertions(+), 13 deletions(-) -- 1.9.1 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[alsa-devel][PATCH 1/3] SoC: fsl_sai: add sai master mode support
When sai works on master mode, set its bit clock and frame clock.
SAI has 4 MCLK source, bus clock, MCLK1, MCLK2 and MCLK3. fsl_sai_set_bclk
will select proper MCLK source, then calculate and set the bit clock divider.
After fsl_sai_set_bclk, enable the selected mclk in hw_params(), and add
hw_free() to disable the mclk.
Signed-off-by: Zidan Wang zidan.w...@freescale.com
---
sound/soc/fsl/fsl_sai.c | 110 +++-
sound/soc/fsl/fsl_sai.h | 9 +++-
2 files changed, 115 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index ec79c3d..499cbd9 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -251,12 +251,14 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai
*cpu_dai,
val_cr4 |= FSL_SAI_CR4_FSD_MSTR;
break;
case SND_SOC_DAIFMT_CBM_CFM:
+ sai-is_slave_mode = true;
break;
case SND_SOC_DAIFMT_CBS_CFM:
val_cr2 |= FSL_SAI_CR2_BCD_MSTR;
break;
case SND_SOC_DAIFMT_CBM_CFS:
val_cr4 |= FSL_SAI_CR4_FSD_MSTR;
+ sai-is_slave_mode = true;
break;
default:
return -EINVAL;
@@ -288,6 +290,75 @@ static int fsl_sai_set_dai_fmt(struct snd_soc_dai
*cpu_dai, unsigned int fmt)
return ret;
}
+static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)
+{
+ struct fsl_sai *sai = snd_soc_dai_get_drvdata(dai);
+ unsigned long clk_rate;
+ u32 savediv = 0, ratio, savesub = freq;
+ u32 id;
+ int ret = 0;
+
+ /* Don't apply to slave mode */
+ if (sai-is_slave_mode)
+ return 0;
+
+ for (id = 0; id FSL_SAI_MCLK_MAX; id++) {
+ clk_rate = clk_get_rate(sai-mclk_clk[id]);
+ if (!clk_rate)
+ continue;
+
+ ratio = clk_rate / freq;
+
+ ret = clk_rate - ratio * freq;
+
+ /* Drop the source that can not be divided
+* into the required rate
+* */
+ if (ret != 0 clk_rate / ret 1000)
+ continue;
+
+ dev_dbg(dai-dev, ratio %d for freq %dHz based on clock
%ldHz\n,
+ ratio, freq, clk_rate);
+
+ if (ratio % 2 == 0 ratio = 2 ratio = 512)
+ ratio /= 2;
+ else
+ continue;
+
+ if (ret savesub) {
+ savediv = ratio;
+ sai-mclk_id = id;
+ savesub = ret;
+ }
+
+ if (ret == 0)
+ break;
+ }
+
+ if (savediv == 0) {
+ dev_err(dai-dev, failed to derive required %cx rate: %d\n,
+ tx ? 'T' : 'R', freq);
+ return -EINVAL;
+ }
+
+ if ((tx sai-synchronous[TX]) || (!tx !sai-synchronous[RX])) {
+ regmap_update_bits(sai-regmap, FSL_SAI_RCR2,
+ FSL_SAI_CR2_MSEL_MASK, FSL_SAI_CR2_MSEL(sai-mclk_id));
+ regmap_update_bits(sai-regmap, FSL_SAI_RCR2,
+ FSL_SAI_CR2_DIV_MASK, savediv - 1);
+ } else {
+ regmap_update_bits(sai-regmap, FSL_SAI_TCR2,
+ FSL_SAI_CR2_MSEL_MASK, FSL_SAI_CR2_MSEL(sai-mclk_id));
+ regmap_update_bits(sai-regmap, FSL_SAI_TCR2,
+ FSL_SAI_CR2_DIV_MASK, savediv - 1);
+ }
+
+ dev_dbg(dai-dev, best fit: clock id=%d, div=%d, deviation =%d\n,
+ sai-mclk_id, savediv, savesub);
+
+ return 0;
+}
+
static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *cpu_dai)
@@ -297,6 +368,24 @@ static int fsl_sai_hw_params(struct snd_pcm_substream
*substream,
unsigned int channels = params_channels(params);
u32 word_width = snd_pcm_format_width(params_format(params));
u32 val_cr4 = 0, val_cr5 = 0;
+ int ret;
+
+ if (!sai-is_slave_mode) {
+ ret = fsl_sai_set_bclk(cpu_dai, tx,
+ 2 * word_width * params_rate(params));
+ if (ret)
+ return ret;
+
+ /* Do not enable the clock if it is already enabled */
+ if (!(sai-mclk_streams BIT(substream-stream))) {
+ ret = clk_prepare_enable(sai-mclk_clk[sai-mclk_id]);
+ if (ret)
+ return ret;
+
+ sai-mclk_streams |= BIT(substream-stream);
+ }
+
+ }
if (!sai-is_dsp_mode)
val_cr4 |= FSL_SAI_CR4_SYWD(word_width);
@@ -322,6 +411,21 @@ static int fsl_sai_hw_params(struct snd_pcm_substream
*substream,
return 0;
}
+static
[alsa-devel][PATCH 2/3] ASoC: fsl_sai: Add support for tdm slots operation
slots and slot width is set from set_dai_tdm_slot in machine driver.
We should calculate the actual slots per channel using slots/channels.
When using tdm slots, we should generate bclk depends channels, slots
and slot width. And there may be unused BCLK cycles before each LRCLK
transition.
Set TCR2 WNW bit to slot width and TCR4 FRSZ bit to slots * channels to
configure frame Length. And it is no need to set TCR4 SYWD to set frame
sync length for sai slave mode, so just do it when it is sai master mode.
Signed-off-by: Zidan Wang zidan.w...@freescale.com
---
sound/soc/fsl/fsl_sai.c | 46 +-
sound/soc/fsl/fsl_sai.h | 3 +++
2 files changed, 40 insertions(+), 9 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 499cbd9..4c5040d 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -115,6 +115,17 @@ out:
return IRQ_HANDLED;
}
+static int fsl_sai_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask,
+ u32 rx_mask, int slots, int slot_width)
+{
+ struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
+
+ sai-slots = slots;
+ sai-slot_width = slot_width;
+
+ return 0;
+}
+
static int fsl_sai_set_dai_sysclk_tr(struct snd_soc_dai *cpu_dai,
int clk_id, unsigned int freq, int fsl_dir)
{
@@ -369,10 +380,25 @@ static int fsl_sai_hw_params(struct snd_pcm_substream
*substream,
u32 word_width = snd_pcm_format_width(params_format(params));
u32 val_cr4 = 0, val_cr5 = 0;
int ret;
+ u32 bclk;
+
+ if (channels == 1)
+ channels = 2;
+
+ if (!sai-slots || sai-slots % channels)
+ sai-slots = channels;
+
+ sai-slots = sai-slots / channels;
+
+ if (sai-slot_width word_width || sai-is_dsp_mode)
+ sai-slot_width = word_width;
if (!sai-is_slave_mode) {
- ret = fsl_sai_set_bclk(cpu_dai, tx,
- 2 * word_width * params_rate(params));
+ bclk = snd_soc_calc_bclk(params_rate(params), sai-slot_width,
+ channels, sai-slots);
+
+ ret = fsl_sai_set_bclk(cpu_dai, tx, bclk);
+
if (ret)
return ret;
@@ -385,20 +411,19 @@ static int fsl_sai_hw_params(struct snd_pcm_substream
*substream,
sai-mclk_streams |= BIT(substream-stream);
}
+ if (!sai-is_dsp_mode)
+ val_cr4 |= FSL_SAI_CR4_SYWD(sai-slot_width);
}
- if (!sai-is_dsp_mode)
- val_cr4 |= FSL_SAI_CR4_SYWD(word_width);
-
- val_cr5 |= FSL_SAI_CR5_WNW(word_width);
- val_cr5 |= FSL_SAI_CR5_W0W(word_width);
+ val_cr5 |= FSL_SAI_CR5_WNW(sai-slot_width);
+ val_cr5 |= FSL_SAI_CR5_W0W(sai-slot_width);
if (sai-is_lsb_first)
val_cr5 |= FSL_SAI_CR5_FBT(0);
else
val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1);
- val_cr4 |= FSL_SAI_CR4_FRSZ(channels);
+ val_cr4 |= FSL_SAI_CR4_FRSZ(sai-slots * channels);
regmap_update_bits(sai-regmap, FSL_SAI_xCR4(tx),
FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
@@ -406,7 +431,9 @@ static int fsl_sai_hw_params(struct snd_pcm_substream
*substream,
regmap_update_bits(sai-regmap, FSL_SAI_xCR5(tx),
FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
FSL_SAI_CR5_FBT_MASK, val_cr5);
- regmap_write(sai-regmap, FSL_SAI_xMR(tx), ~0UL - ((1 channels) -
1));
+
+ regmap_write(sai-regmap, FSL_SAI_xMR(tx),
+~0UL - ((1 params_channels(params) * sai-slots) - 1));
return 0;
}
@@ -531,6 +558,7 @@ static void fsl_sai_shutdown(struct snd_pcm_substream
*substream,
static const struct snd_soc_dai_ops fsl_sai_pcm_dai_ops = {
.set_sysclk = fsl_sai_set_dai_sysclk,
.set_fmt= fsl_sai_set_dai_fmt,
+ .set_tdm_slot = fsl_sai_set_dai_tdm_slot,
.hw_params = fsl_sai_hw_params,
.hw_free= fsl_sai_hw_free,
.trigger= fsl_sai_trigger,
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 2d8c830..111dfce 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -140,6 +140,9 @@ struct fsl_sai {
bool sai_on_imx;
bool synchronous[2];
+ unsigned int slots;
+ unsigned int slot_width;
+
unsigned int mclk_id;
unsigned int mclk_streams;
struct snd_dmaengine_dai_dma_data dma_params_rx;
--
1.9.1
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[alsa-devel][PATCH 3/3] ASoC: fsl_sai: Add support for Right-J mode
Add Right-J mode and set TCR5 FBT bit to let data right justify.
Signed-off-by: Zidan Wang zidan.w...@freescale.com
---
sound/soc/fsl/fsl_sai.c | 14 +++---
sound/soc/fsl/fsl_sai.h | 1 +
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 4c5040d..19cd6f3 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -228,7 +228,11 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai
*cpu_dai,
sai-is_dsp_mode = true;
break;
case SND_SOC_DAIFMT_RIGHT_J:
- /* To be done */
+ /* Frame high, one word length for frame sync */
+ val_cr2 |= FSL_SAI_CR2_BCP;
+ sai-is_right_j_mode = true;
+ break;
+
default:
return -EINVAL;
}
@@ -418,9 +422,13 @@ static int fsl_sai_hw_params(struct snd_pcm_substream
*substream,
val_cr5 |= FSL_SAI_CR5_WNW(sai-slot_width);
val_cr5 |= FSL_SAI_CR5_W0W(sai-slot_width);
- if (sai-is_lsb_first)
+ if (sai-is_lsb_first sai-is_right_j_mode)
val_cr5 |= FSL_SAI_CR5_FBT(0);
- else
+ else if (sai-is_lsb_first !sai-is_right_j_mode)
+ val_cr5 |= FSL_SAI_CR5_FBT(sai-slot_width - word_width);
+ else if (!sai-is_lsb_first sai-is_right_j_mode)
+ val_cr5 |= FSL_SAI_CR5_FBT(sai-slot_width - 1);
+ else if (!sai-is_lsb_first !sai-is_right_j_mode)
val_cr5 |= FSL_SAI_CR5_FBT(word_width - 1);
val_cr4 |= FSL_SAI_CR4_FRSZ(sai-slots * channels);
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 111dfce..e220940 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -137,6 +137,7 @@ struct fsl_sai {
bool is_lsb_first;
bool is_slave_mode;
bool is_dsp_mode;
+ bool is_right_j_mode;
bool sai_on_imx;
bool synchronous[2];
--
1.9.1
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[PATCH] clk: ppc-corenet: Add support for the FMD clock
From: Igal Liberman igal.liber...@freescale.com
Signed-off-by: Igal Liberman igal.liber...@freescale.com
This patch is based on https://patchwork.ozlabs.org/patch/430966/
---
drivers/clk/clk-ppc-corenet.c | 250 +
1 file changed, 250 insertions(+)
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index ff425e1..dcde0e6 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -18,6 +18,7 @@
#include linux/of_platform.h
#include linux/of.h
#include linux/slab.h
+#include asm/fsl_guts.h
struct cmux_clk {
struct clk_hw hw;
@@ -144,6 +145,254 @@ err_name:
kfree(parent_names);
}
+/* Table for matching compatible strings, for device tree
+ * guts node, for QorIQ SOCs.
+ * fsl,qoriq-device-config-2.0 corresponds to T4 B4
+ * SOCs. For the older SOCs fsl,qoriq-device-config-1.0
+ * string would be used.
+ */
+
+static const struct of_device_id guts_device_ids[] = {
+ { .compatible = fsl,qoriq-device-config-1.0, },
+ { .compatible = fsl,qoriq-device-config-2.0, },
+};
+
+/* P2, P3, P4, P5 */
+#define FM1_CLK_SEL_SHIFT 30
+#define FM1_CLK_SELBIT(FM1_CLK_SEL_SHIFT)
+#define FM2_CLK_SEL_SHIFT 29
+#define FM2_CLK_SELBIT(FM2_CLK_SEL_SHIFT)
+#define HWA_ASYNC_DIV_SHIFT26
+#define HWA_ASYNC_DIV BIT(HWA_ASYNC_DIV_SHIFT)
+
+/* B4, T2 */
+#define HWA_CGA_M1_CLK_SEL_SHIFT 29
+#define HWA_CGA_M1_CLK_SEL (BIT(HWA_CGA_M1_CLK_SEL_SHIFT + 2) |\
+BIT(HWA_CGA_M1_CLK_SEL_SHIFT + 1) |\
+BIT(HWA_CGA_M1_CLK_SEL_SHIFT))
+
+/* T4240 */
+#define HWA_CGB_M1_CLK_SEL_SHIFT 26
+#define HWA_CGB_M1_CLK_SEL (BIT(HWA_CGB_M1_CLK_SEL_SHIFT + 2) |\
+BIT(HWA_CGB_M1_CLK_SEL_SHIFT + 1) |\
+BIT(HWA_CGB_M1_CLK_SEL_SHIFT))
+#define HWA_CGB_M2_CLK_SEL_SHIFT 3
+#define HWA_CGB_M2_CLK_SEL (BIT(HWA_CGB_M2_CLK_SEL_SHIFT + 2) |\
+BIT(HWA_CGB_M2_CLK_SEL_SHIFT + 1) |\
+BIT(HWA_CGB_M2_CLK_SEL_SHIFT))
+
+static u8 get_fm_clk_parent(struct clk_hw *hw)
+{
+ struct ccsr_guts __iomem *guts_regs = NULL;
+ struct device_node *guts;
+ uint32_t reg = 0;
+ int clk_src = 0;
+ int fm_clk_select = -EINVAL;
+ int fm_id = 0;
+
+ guts = of_find_matching_node(NULL, guts_device_ids);
+ if (!guts) {
+ pr_err(could not find GUTS node\n);
+ return -EINVAL;
+ }
+
+ guts_regs = of_iomap(guts, 0);
+ of_node_put(guts);
+ if (!guts_regs) {
+ pr_err(ioremap of GUTS node failed\n);
+ return -EINVAL;
+ }
+
+ if (!strcmp(__clk_get_name(hw-clk), fm1-clk))
+ fm_id = 1;
+
+ /* The FM clock provider is SoC dependent and it's determened by the
+* reset configuration word (RCW). We need to map the RCW options to
+* the order of the providers in the device tree.
+* This code makes assumptions about the clock provider order:
+* In the P family:
+* 0 - platform clock/2
+* 1 - PLLx /2
+* 2 - PLLx /4 (if possible).
+* In B/T family:
+* The same order in which the clock providers are described in
+* the Reference Manual, starting from 0.
+*
+* In a case of only one possible provider, the index is 0.
+*/
+
+ if (of_device_is_compatible(guts, fsl,p1023-guts) ||
+ of_device_is_compatible(guts, fsl,t1040-device-config))
+ /* P1023 and T1040 have only one optional clock source */
+ fm_clk_select = 0;
+ else if (of_device_is_compatible(guts, fsl,p2041-device-config) ||
+of_device_is_compatible(guts, fsl,p3041-device-config) ||
+of_device_is_compatible(guts, fsl,p4080-device-config)) {
+ /* Read RCW*/
+ reg = in_be32(guts_regs-rcwsr[7]);
+
+ /* Check bit 225 or bit 226 (FM2, P4080)
+* 0 - The clock source is Platform PLL /2
+* 1 - The clock source is PLL2 /2 (P2, P3) or PLL3 /2 (P4)
+*
+* Bit 225 represents FM1, Bit 226 represents FM2
+*/
+ if (fm_id == 0)
+ fm_clk_select = (reg FM1_CLK_SEL)
+ FM1_CLK_SEL_SHIFT;
+ else
+ fm_clk_select = (reg FM2_CLK_SEL)
+ FM2_CLK_SEL_SHIFT;
+ } else if (of_device_is_compatible(guts, fsl,p5020-device-config) ||
+ of_device_is_compatible(guts, fsl,p5040-device-config)) {
+
PowerMac G5 Quad Issue reporting
Hello all LinuxPPc Developer, need to report a issue that im facing from kernel 3.16 and up. The fans of powermac g5 quad start boosting like a turbo jet after the system is been loaded and up. Usually this become after about 30-60 seconds when the system is loaded. This issue start with Xorg loaded or only in teminal system (gdm3 not loaded) This issue come with system load with minimum cpu usage 5% and less too. During the closing of the system (reboot) the fans goes in right silents mode. I had been tested and compiled the kernel with all the modules of fan controls for Apple G5 without a positive result. Kernel tested 3.16.ctk2 (debian wheezy 7.8), 3.18.3 and 3.19.rc5 Im using Debian Wheezy 7.6 (up 7.8) PPC on Quad G5 (970mp) Nvidia 7800gtx and RadeonHD 6570 Dont face this issue with old kernels version 3.10.65 and pre (didnt test the 3.12 and 3.14) Need to report to Michel D. from amd.com . The RadeonHD 6570 now is working on PowerMac G5 too look like the Xorg bigendian issue related Evergreen / Northern is been fixed ;-) Thanks alot for your jobs guys Hope soon i will able to help in X5000 hardware too PPC Rulez ... and sorry for my perfect english Luigi Burdo ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH V2 06/12] selftests, powerpc: Add test for system wide DSCR default
On Wed, Jan 14, 2015 at 10:44:31AM +1100, Michael Ellerman wrote: Also, I would like to see the test results reports using kselftest.h - it can be separate patch in the interest of getting tests in. Sorry but kselftest.h doesn't do anything useful for us. We have existing test reporting that uses the subunit protocol. I'm happy to convert that to TAP, or some other well defined output format, but not to something ad-hoc like kselftest.h currently provides. Something TAP-alike would also help reduce some of the spew from tests that are going to fail. eg, running execveat tests on a kernel that doesn't implement that syscall currently spews around 20 lines of [FAIL]. Adding something to the beginning of the test to set plan() accordingly if it detects -ENOSYS could make that output a little cleaner. That other projects (like jenkins, bug trackers etc) could consume the output of the test runs would be a nice bonus. I only recently started looking at kselftests and was surprised at the amount of variance we have in the way of printing 'Ok' '[OK]' 'ok...' etc. Dave ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/pseries: Avoid context switch in EEH reset if required
On Wed, Jan 21, 2015 at 09:56:07AM +1100, Gavin Shan wrote:
On Tue, Jan 20, 2015 at 10:28:16AM +0100, Benjamin Herrenschmidt wrote:
On Mon, 2015-01-19 at 09:47 +1100, Gavin Shan wrote:
On pseries platform, the EEH reset backend pseries_eeh_reset() can
be called in atomic context as follows. For this case, we should
call udelay() instead of msleep() to avoid context switching.
drivers/scsi/ipr.c::ipr_reset_slot_reset_done()
drivers/pci/pci.c::pci_set_pcie_reset_state()
arch/powerpc/kernel/eeh.c::pcibios_set_pcie_reset_state()
arch/powerpc/platforms/pseries/eeh_pseries.c::pseries_eeh_reset()
It's not acceptable to introduce multi-millisecond delays at interrupt
time. In fact, we should generally not use udelay in such context.
I understand that this is an exceptional error handling case but it's
still not right.
Yes, I agree it's unsafe to udelay for multi-milliseconds as the queued
works in atomic context is expected to be completed as soon as possible.
Are there many other users of pci_set_pcie_reset_state() at interrupt
time ? Can we have a discussion with the PCI folks as to whether that
should be legal or not ?
I'm tempted to require that it's made illegal.
Currently, there are 2 drivers calling this function: IPR and misc/genwqe.
Also, VFIO would call this function for IBM and Mellanox adapters in PowerKVM
repository. For now, IPR driver is the only one call this function in atomic
context.
Sure, I'll send one email to confirm with PCI folks. I guess it's illegal
to call pci_set_pcie_reset_state() in atomic context. If it's the case,
I'm afraid Wendy has to change IPR driver to replace the reset timer with
something else (e.g. workqueue).
Another way is to drop the hold/settle delays for pcibios_set_pcie_reset_state()
and IPR relies on the timer interval to cover them. Wendy, could you please
let me know if it would work for you or not?
Start reset timer;
Timer expires, assert the reset. Restart the timer with assert delay;
Timer expires, deassert the reset. Restart the timer with settle delay;
Timer expires, ready for subsequent works;
Thanks,
Gavin
Ben.
Signed-off-by: Gavin Shan gws...@linux.vnet.ibm.com
Tested-by: Wen Xiongwenxi...@linux.vnet.ibm.com
---
arch/powerpc/platforms/pseries/eeh_pseries.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c
b/arch/powerpc/platforms/pseries/eeh_pseries.c
index a6c7e19..67623a3 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -503,8 +503,7 @@ static int pseries_eeh_get_state(struct eeh_pe *pe, int
*state)
*/
static int pseries_eeh_reset(struct eeh_pe *pe, int option)
{
- int config_addr;
- int ret;
+ int config_addr, delay, ret;
/* Figure out PE address */
config_addr = pe-config_addr;
@@ -528,9 +527,14 @@ static int pseries_eeh_reset(struct eeh_pe *pe, int
option)
/* We need reset hold or settlement delay */
if (option == EEH_RESET_FUNDAMENTAL ||
option == EEH_RESET_HOT)
- msleep(EEH_PE_RST_HOLD_TIME);
+ delay = EEH_PE_RST_HOLD_TIME;
+ else
+ delay = EEH_PE_RST_SETTLE_TIME;
+
+ if (in_atomic())
+ udelay(delay * 1000);
else
- msleep(EEH_PE_RST_SETTLE_TIME);
+ msleep(delay);
return ret;
}
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[PATCH 2/2] powerpc/powernv: Skip registering log region when CONFIG_PRINTK=n
When CONFIG_PRINTK=n, log_buf_addr_get() returns NULL and log_buf_len_get() return 0. Check for these return values and skip registering the dump buffer. Signed-off-by: Pranith Kumar bobby.pr...@gmail.com CC: Michael Ellerman m...@ellerman.id.au --- arch/powerpc/platforms/powernv/opal.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c index f10b9ec..1db119f0 100644 --- a/arch/powerpc/platforms/powernv/opal.c +++ b/arch/powerpc/platforms/powernv/opal.c @@ -667,7 +667,13 @@ static void __init opal_dump_region_init(void) /* Register kernel log buffer */ addr = log_buf_addr_get(); + if (addr == NULL) + return; + size = log_buf_len_get(); + if (size == 0) + return; + rc = opal_register_dump_region(OPAL_DUMP_REGION_LOG_BUF, __pa(addr), size); /* Don't warn if this is just an older OPAL that doesn't -- 1.9.1 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc/perf: fix fsl_emb_pmu_start to write correct pmc value
PMCs on PowerPC increases towards 0x8000 and triggers an overflow
interrupt when the msb is set to collect a sample. Therefore, to setup
for the next sample collection, pmu_start should set the pmc value to
0x8000 - left instead of left which incorrectly delays the next
overflow interrupt. Same as commit 9a45a9407c69 (powerpc/perf:
power_pmu_start restores incorrect values, breaking frequency events)
for book3s.
Signed-off-by: Tom Huynh tom.hu...@freescale.com
---
arch/powerpc/perf/core-fsl-emb.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/core-fsl-emb.c b/arch/powerpc/perf/core-fsl-emb.c
index 4acaea0..e9fe904 100644
--- a/arch/powerpc/perf/core-fsl-emb.c
+++ b/arch/powerpc/perf/core-fsl-emb.c
@@ -389,6 +389,7 @@ static void fsl_emb_pmu_del(struct perf_event *event, int
flags)
static void fsl_emb_pmu_start(struct perf_event *event, int ef_flags)
{
unsigned long flags;
+ unsigned long val;
s64 left;
if (event-hw.idx 0 || !event-hw.sample_period)
@@ -405,7 +406,10 @@ static void fsl_emb_pmu_start(struct perf_event *event,
int ef_flags)
event-hw.state = 0;
left = local64_read(event-hw.period_left);
- write_pmc(event-hw.idx, left);
+ val = 0;
+ if (left 0x8000L)
+ val = 0x8000L - left;
+ write_pmc(event-hw.idx, val);
perf_event_update_userpage(event);
perf_pmu_enable(event-pmu);
--
1.9.1
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Re: [PATCH 2/2] mm: fix undefined reference to `.kernel_map_pages' on PPC builds
On Tue, Jan 20, 2015 at 02:02:00PM -0600, Kim Phillips wrote: It's possible to configure DEBUG_PAGEALLOC without PAGE_POISONING on ppc. Fix building the generic kernel_map_pages() implementation in this case: LD init/built-in.o mm/built-in.o: In function `free_pages_prepare': mm/page_alloc.c:770: undefined reference to `.kernel_map_pages' mm/built-in.o: In function `prep_new_page': mm/page_alloc.c:933: undefined reference to `.kernel_map_pages' mm/built-in.o: In function `map_pages': mm/compaction.c:61: undefined reference to `.kernel_map_pages' make: *** [vmlinux] Error 1 Signed-off-by: Kim Phillips kim.phill...@freescale.com --- mm/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/mm/Makefile b/mm/Makefile index 4bf586e..2956467 100644 --- a/mm/Makefile +++ b/mm/Makefile @@ -46,6 +46,7 @@ obj-$(CONFIG_SLOB) += slob.o obj-$(CONFIG_MMU_NOTIFIER) += mmu_notifier.o obj-$(CONFIG_KSM) += ksm.o obj-$(CONFIG_PAGE_POISONING) += debug-pagealloc.o +obj-$(CONFIG_DEBUG_PAGEALLOC) += debug-pagealloc.o Does it work correctly to list the same object file twice? Doesn't seem like it would. Shouldn't this do something like the following instead: ifneq ($(CONFIG_DEBUG_PAGEALLOC)$(CONFIG_PAGE_POISONING),) obj-y += debug-pagealloc.o endif ? obj-$(CONFIG_SLAB) += slab.o obj-$(CONFIG_SLUB) += slub.o obj-$(CONFIG_KMEMCHECK) += kmemcheck.o -- 2.2.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/fsl_pci: Fix pci stack build bug with FRAME_WARN
On Tue, 2015-01-20 at 14:03 -0600, Kim Phillips wrote:
Fix this:
CC arch/powerpc/sysdev/fsl_pci.o
arch/powerpc/sysdev/fsl_pci.c: In function 'fsl_pcie_check_link':
arch/powerpc/sysdev/fsl_pci.c:91:1: error: the frame size of 1360 bytes is
larger than 1024 bytes [-Werror=frame-larger-than=]
when configuring FRAME_WARN, by converting the allocation from the
stack to the heap. We use GFP_ATOMIC since this function can be
called with interrupts disabled.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
arch/powerpc/sysdev/fsl_pci.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 6455c1e..635d743 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -69,11 +69,13 @@ static int fsl_pcie_check_link(struct pci_controller
*hose)
if (hose-indirect_type PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK) {
if (hose-ops-read == fsl_indirect_read_config) {
- struct pci_bus bus;
- bus.number = hose-first_busno;
- bus.sysdata = hose;
- bus.ops = hose-ops;
- indirect_read_config(bus, 0, PCIE_LTSSM, 4, val);
+ struct pci_bus *bus;
+ bus = kmalloc(sizeof(*bus), GFP_ATOMIC);
+ bus-number = hose-first_busno;
Missing check for allocation failure.
Do we not have a real struct pci_bus we can use here? Or refactor
indirect_read_config() to take hose and bus number instead?
If putting a pci_bus struct on the stack is no longer OK, then
fake_pci_bus() should be fixed as well. I wonder if GCC is allocating
separate pci_bus structs on the stack for this one and the one that
early_read_config_dword() uses...
-Scott
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Re: [PATCH 2/2] mm: fix undefined reference to `.kernel_map_pages' on PPC builds
On Tue, 20 Jan 2015 15:01:50 -0800 j...@joshtriplett.org wrote: On Tue, Jan 20, 2015 at 02:02:00PM -0600, Kim Phillips wrote: It's possible to configure DEBUG_PAGEALLOC without PAGE_POISONING on ppc. Fix building the generic kernel_map_pages() implementation in this case: LD init/built-in.o mm/built-in.o: In function `free_pages_prepare': mm/page_alloc.c:770: undefined reference to `.kernel_map_pages' mm/built-in.o: In function `prep_new_page': mm/page_alloc.c:933: undefined reference to `.kernel_map_pages' mm/built-in.o: In function `map_pages': mm/compaction.c:61: undefined reference to `.kernel_map_pages' make: *** [vmlinux] Error 1 Signed-off-by: Kim Phillips kim.phill...@freescale.com --- mm/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/mm/Makefile b/mm/Makefile index 4bf586e..2956467 100644 --- a/mm/Makefile +++ b/mm/Makefile @@ -46,6 +46,7 @@ obj-$(CONFIG_SLOB) += slob.o obj-$(CONFIG_MMU_NOTIFIER) += mmu_notifier.o obj-$(CONFIG_KSM) += ksm.o obj-$(CONFIG_PAGE_POISONING) += debug-pagealloc.o +obj-$(CONFIG_DEBUG_PAGEALLOC) += debug-pagealloc.o Does it work correctly to list the same object file twice? Doesn't seem like it would. Shouldn't this do something like the following instead: ifneq ($(CONFIG_DEBUG_PAGEALLOC)$(CONFIG_PAGE_POISONING),) obj-y += debug-pagealloc.o endif I expect it's a Kconfig problem. DEBUG_PAGEALLOC should be selecting PAGE_POISONING. config DEBUG_PAGEALLOC bool Debug page memory allocations depends on DEBUG_KERNEL depends on !HIBERNATION || ARCH_SUPPORTS_DEBUG_PAGEALLOC !PPC !SPARC depends on !KMEMCHECK select PAGE_EXTENSION select PAGE_POISONING if !ARCH_SUPPORTS_DEBUG_PAGEALLOC Culprits cc'ed! ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/pseries: Avoid context switch in EEH reset if required
On Tue, Jan 20, 2015 at 10:28:16AM +0100, Benjamin Herrenschmidt wrote:
On Mon, 2015-01-19 at 09:47 +1100, Gavin Shan wrote:
On pseries platform, the EEH reset backend pseries_eeh_reset() can
be called in atomic context as follows. For this case, we should
call udelay() instead of msleep() to avoid context switching.
drivers/scsi/ipr.c::ipr_reset_slot_reset_done()
drivers/pci/pci.c::pci_set_pcie_reset_state()
arch/powerpc/kernel/eeh.c::pcibios_set_pcie_reset_state()
arch/powerpc/platforms/pseries/eeh_pseries.c::pseries_eeh_reset()
It's not acceptable to introduce multi-millisecond delays at interrupt
time. In fact, we should generally not use udelay in such context.
I understand that this is an exceptional error handling case but it's
still not right.
Yes, I agree it's unsafe to udelay for multi-milliseconds as the queued
works in atomic context is expected to be completed as soon as possible.
Are there many other users of pci_set_pcie_reset_state() at interrupt
time ? Can we have a discussion with the PCI folks as to whether that
should be legal or not ?
I'm tempted to require that it's made illegal.
Currently, there are 2 drivers calling this function: IPR and misc/genwqe.
Also, VFIO would call this function for IBM and Mellanox adapters in PowerKVM
repository. For now, IPR driver is the only one call this function in atomic
context.
Sure, I'll send one email to confirm with PCI folks. I guess it's illegal
to call pci_set_pcie_reset_state() in atomic context. If it's the case,
I'm afraid Wendy has to change IPR driver to replace the reset timer with
something else (e.g. workqueue).
Thanks,
Gavin
Ben.
Signed-off-by: Gavin Shan gws...@linux.vnet.ibm.com
Tested-by: Wen Xiongwenxi...@linux.vnet.ibm.com
---
arch/powerpc/platforms/pseries/eeh_pseries.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c
b/arch/powerpc/platforms/pseries/eeh_pseries.c
index a6c7e19..67623a3 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -503,8 +503,7 @@ static int pseries_eeh_get_state(struct eeh_pe *pe, int
*state)
*/
static int pseries_eeh_reset(struct eeh_pe *pe, int option)
{
-int config_addr;
-int ret;
+int config_addr, delay, ret;
/* Figure out PE address */
config_addr = pe-config_addr;
@@ -528,9 +527,14 @@ static int pseries_eeh_reset(struct eeh_pe *pe, int
option)
/* We need reset hold or settlement delay */
if (option == EEH_RESET_FUNDAMENTAL ||
option == EEH_RESET_HOT)
-msleep(EEH_PE_RST_HOLD_TIME);
+delay = EEH_PE_RST_HOLD_TIME;
+else
+delay = EEH_PE_RST_SETTLE_TIME;
+
+if (in_atomic())
+udelay(delay * 1000);
else
-msleep(EEH_PE_RST_SETTLE_TIME);
+msleep(delay);
return ret;
}
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Re: [alsa-devel] [PATCH 0/3] Add master mode, tmd and right-j mode support
Hi Zidan, On Tue, Jan 20, 2015 at 10:21 AM, Zidan Wang zidan.w...@freescale.com wrote: Add sai master mode support. Add tdm slots support. Add Right-J mode support. Zidan Wang (3): SoC: fsl_sai: add sai master mode support ASoC: fsl_sai: Add support for tdm slots operation ASoC: fsl_sai: Add support for Right-J mode sound/soc/fsl/fsl_sai.c | 164 sound/soc/fsl/fsl_sai.h | 13 +++- 2 files changed, 164 insertions(+), 13 deletions(-) Not related to your series, but do you have a patch for imx6sx-sdb.dts that adds sai support? In the FSL version they use 'fsl,sdma-event-remap' property to specify the SAI sdma channels, but this is not present in mainline? How are you dealing with it? ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/mm: Add trace point for tracking hash pte fault
On Tue, 2015-01-20 at 17:05 +0530, Aneesh Kumar K.V wrote: This enables us to understand how many hash fault we are taking when running benchmarks. For ex: -bash-4.2# ./perf stat -e powerpc:hash_fault -e page-faults /tmp/ebizzy.ppc64 -S 30 -P -n 1000 ... Performance counter stats for '/tmp/ebizzy.ppc64 -S 30 -P -n 1000': 1,10,04,075 powerpc:hash_fault 1,10,03,429 page-faults 30.865978991 seconds time elapsed Looks good. Can you attach some test results that show it's not hurting performance when it's disabled. cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/pseries: fix endian problems with LE migration
On Wed, 2015-01-21 at 13:32 +1100, Cyril Bur wrote: The need to handle ibm,suspend_me specially from within ppc_rtas has left an endian bug exposed as rtas_ibm_suspend_me actually performs HCALLs and should have its params in CPU endian. That needs a much better explanation. Key points: - ppc_rtas() is a syscall, which takes arguments in BE - ibm,suspend-me is not a real RTAS call and is handled specially in there - ibm,suspend-me is actually implemented by an hcall - there is currently a bug on LE, because rtas_ibm_suspend_me() takes the ppc_rtas() args and feeds them directly to the hcall Have ppc_rtas send the params correctly and also interpret the result correctly. That's a second bug which you should also mention above. Removed the convoluted use of the rtas_args struct to pass params to rtas_ibm_suspend_me in favour of passing what it needs directly. Signed-off-by: Cyril Bur cyril...@gmail.com --- This patch has been tested with KVM both LE and BE and on PowerVM both LE and BE. Under QEMU/KVM the migration happens without touching the these code pathes. For PowerVM there is no obvious regression on BE and the LE code path now provides the correct parameters to the hypervisor Fold that into the changelog, it's worth remembering. cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 17/30] PCI/powerpc: Rename pcibios_root_bridge_prepare()
Pcibios_root_bridge_prepare() in powerpc is used
to set root bus speed. Rename it to
pcibios_set_root_bus_speed() for better readability.
Signed-off-by: Yijing Wang wangyij...@huawei.com
CC: Benjamin Herrenschmidt b...@kernel.crashing.org
CC: linuxppc-dev@lists.ozlabs.org
---
arch/powerpc/include/asm/machdep.h |2 +-
arch/powerpc/kernel/pci-common.c |6 +++---
arch/powerpc/platforms/pseries/pci.c |2 +-
arch/powerpc/platforms/pseries/pseries.h |2 +-
arch/powerpc/platforms/pseries/setup.c |2 +-
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/include/asm/machdep.h
b/arch/powerpc/include/asm/machdep.h
index c8175a3..8e7f2a8 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -129,7 +129,7 @@ struct machdep_calls {
void(*pcibios_fixup)(void);
int (*pci_probe_mode)(struct pci_bus *);
void(*pci_irq_fixup)(struct pci_dev *dev);
- int (*pcibios_root_bridge_prepare)(struct pci_host_bridge
+ int (*pcibios_set_root_bus_speed)(struct pci_host_bridge
*bridge);
/* To setup PHBs when using automatic OF platform driver for PCI */
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 927c3dd..c11bfed 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -769,9 +769,9 @@ int pci_proc_domain(struct pci_bus *bus)
int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
{
- if (ppc_md.pcibios_root_bridge_prepare)
- return ppc_md.pcibios_root_bridge_prepare(bridge);
-
+ if (ppc_md.pcibios_set_root_bus_speed)
+ return ppc_md.pcibios_set_root_bus_speed(bridge);
+
return 0;
}
diff --git a/arch/powerpc/platforms/pseries/pci.c
b/arch/powerpc/platforms/pseries/pci.c
index fe16a50..af685d6 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -110,7 +110,7 @@ static void fixup_winbond_82c105(struct pci_dev* dev)
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
fixup_winbond_82c105);
-int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
+int pseries_set_root_bus_speed(struct pci_host_bridge *bridge)
{
struct device_node *dn, *pdn;
struct pci_bus *bus;
diff --git a/arch/powerpc/platforms/pseries/pseries.h
b/arch/powerpc/platforms/pseries/pseries.h
index 1796c54..5d0be3a 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -63,7 +63,7 @@ extern int dlpar_detach_node(struct device_node *);
/* PCI root bridge prepare function override for pseries */
struct pci_host_bridge;
-int pseries_root_bridge_prepare(struct pci_host_bridge *bridge);
+int pseries_set_root_bus_speed(struct pci_host_bridge *bridge);
unsigned long pseries_memory_block_size(void);
diff --git a/arch/powerpc/platforms/pseries/setup.c
b/arch/powerpc/platforms/pseries/setup.c
index e445b67..b196c0d 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -496,7 +496,7 @@ static void __init pSeries_setup_arch(void)
ppc_md.enable_pmcs = power4_enable_pmcs;
}
- ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
+ ppc_md.pcibios_set_root_bus_speed = pseries_set_root_bus_speed;
if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
long rc;
--
1.7.1
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[PATCH v2 18/30] PCI/powerpc: Use pci_scan_root_bridge() for simplicity
Now we could use pci_scan_root_bridge() to scan
pci buses, provide powerpc specific pci_host_bridge_ops.
Suggested-by: Arnd Bergmann a...@arndb.de
Signed-off-by: Yijing Wang wangyij...@huawei.com
CC: Benjamin Herrenschmidt b...@kernel.crashing.org
CC: linuxppc-dev@lists.ozlabs.org
---
arch/powerpc/include/asm/machdep.h |2 +-
arch/powerpc/kernel/pci-common.c | 63 +-
arch/powerpc/platforms/pseries/pci.c |8 ++--
arch/powerpc/platforms/pseries/pseries.h |2 +-
4 files changed, 42 insertions(+), 33 deletions(-)
diff --git a/arch/powerpc/include/asm/machdep.h
b/arch/powerpc/include/asm/machdep.h
index 8e7f2a8..b811d12 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -129,7 +129,7 @@ struct machdep_calls {
void(*pcibios_fixup)(void);
int (*pci_probe_mode)(struct pci_bus *);
void(*pci_irq_fixup)(struct pci_dev *dev);
- int (*pcibios_set_root_bus_speed)(struct pci_host_bridge
+ void(*pcibios_set_root_bus_speed)(struct pci_host_bridge
*bridge);
/* To setup PHBs when using automatic OF platform driver for PCI */
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index c11bfed..1f44df9 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -767,14 +767,33 @@ int pci_proc_domain(struct pci_bus *bus)
return 1;
}
-int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
+static void pci_host_bridge_set_root_bus_speed(
+ struct pci_host_bridge *bridge)
{
if (ppc_md.pcibios_set_root_bus_speed)
- return ppc_md.pcibios_set_root_bus_speed(bridge);
-
- return 0;
+ ppc_md.pcibios_set_root_bus_speed(bridge);
}
+static void pci_host_bridge_of_scan_bus(struct pci_host_bridge *host)
+{
+ int mode = PCI_PROBE_NORMAL;
+ struct pci_bus *bus = host-bus;
+ struct pci_controller *hose = dev_get_drvdata(host-dev);
+
+ /* Get probe mode and perform scan */
+ if (hose-dn ppc_md.pci_probe_mode)
+ mode = ppc_md.pci_probe_mode(bus);
+
+ pr_debug(probe mode: %d\n, mode);
+ if (mode == PCI_PROBE_DEVTREE)
+ of_scan_bus(hose-dn, bus);
+
+ if (mode == PCI_PROBE_NORMAL) {
+ pci_bus_update_busn_res_end(bus, 255);
+ hose-last_busno = pci_scan_child_bus(bus);
+ pci_bus_update_busn_res_end(bus, hose-last_busno);
+ }
+}
/* This header fixup will do the resource fixup for all devices as they are
* probed, but not for bridge ranges
*/
@@ -1577,6 +1596,11 @@ struct device_node *pcibios_get_phb_of_node(struct
pci_bus *bus)
return of_node_get(hose-dn);
}
+static struct pci_host_bridge_ops phb_ops = {
+ .phb_set_root_bus_speed = pci_host_bridge_set_root_bus_speed,
+ .phb_of_scan_bus = pci_host_bridge_of_scan_bus,
+};
+
/**
* pci_scan_phb - Given a pci_controller, setup and scan the PCI bus
* @hose: Pointer to the PCI host controller instance structure
@@ -1584,9 +1608,8 @@ struct device_node *pcibios_get_phb_of_node(struct
pci_bus *bus)
void pcibios_scan_phb(struct pci_controller *hose)
{
LIST_HEAD(resources);
- struct pci_bus *bus;
+ struct pci_host_bridge *host;
struct device_node *node = hose-dn;
- int mode;
pr_debug(PCI: Scanning PHB %s\n, of_node_full_name(node));
@@ -1602,30 +1625,16 @@ void pcibios_scan_phb(struct pci_controller *hose)
pci_add_resource(resources, hose-busn);
/* Create an empty bus for the toplevel */
- bus = pci_create_root_bus(hose-parent,
+ host = pci_scan_root_bridge(hose-parent,
PCI_DOMBUS(hose-global_number, hose-first_busno),
- hose-ops, hose, resources);
- if (bus == NULL) {
- pr_err(Failed to create bus for PCI domain %04x\n,
+ hose-ops, hose, resources, phb_ops);
+ if (host == NULL) {
+ pr_err(Failed to create host bridge for PCI domain %04x\n,
hose-global_number);
pci_free_resource_list(resources);
return;
}
- hose-bus = bus;
-
- /* Get probe mode and perform scan */
- mode = PCI_PROBE_NORMAL;
- if (node ppc_md.pci_probe_mode)
- mode = ppc_md.pci_probe_mode(bus);
- pr_debug(probe mode: %d\n, mode);
- if (mode == PCI_PROBE_DEVTREE)
- of_scan_bus(node, bus);
-
- if (mode == PCI_PROBE_NORMAL) {
- pci_bus_update_busn_res_end(bus, 255);
- hose-last_busno = pci_scan_child_bus(bus);
- pci_bus_update_busn_res_end(bus, hose-last_busno);
- }
+ hose-bus = host-bus;
/* Platform gets a chance to do some
[PATCH] powerpc/pseries: fix endian problems with LE migration
The need to handle ibm,suspend_me specially from within ppc_rtas has left an
endian bug exposed as rtas_ibm_suspend_me actually performs HCALLs and should
have its params in CPU endian.
Have ppc_rtas send the params correctly and also interpret the result
correctly.
Removed the convoluted use of the rtas_args struct to pass params to
rtas_ibm_suspend_me in favour of passing what it needs directly.
Signed-off-by: Cyril Bur cyril...@gmail.com
---
This patch has been tested with KVM both LE and BE and on PowerVM both LE and
BE. Under QEMU/KVM the migration happens without touching the these code
pathes.
For PowerVM there is no obvious regression on BE and the LE code path now
provides the correct parameters to the hypervisor
---
arch/powerpc/include/asm/rtas.h | 2 +-
arch/powerpc/kernel/rtas.c| 22 +++---
arch/powerpc/platforms/pseries/mobility.c | 22 ++
3 files changed, 22 insertions(+), 24 deletions(-)
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index b390f55..2e23e92 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -327,7 +327,7 @@ extern int rtas_suspend_cpu(struct rtas_suspend_me_data
*data);
extern int rtas_suspend_last_cpu(struct rtas_suspend_me_data *data);
extern int rtas_online_cpus_mask(cpumask_var_t cpus);
extern int rtas_offline_cpus_mask(cpumask_var_t cpus);
-extern int rtas_ibm_suspend_me(struct rtas_args *);
+extern int rtas_ibm_suspend_me(u64 handle, int *vasi_return);
struct rtc_time;
extern unsigned long rtas_get_boot_time(void);
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 4af905e..21c45a2 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -897,7 +897,7 @@ int rtas_offline_cpus_mask(cpumask_var_t cpus)
}
EXPORT_SYMBOL(rtas_offline_cpus_mask);
-int rtas_ibm_suspend_me(struct rtas_args *args)
+int rtas_ibm_suspend_me(u64 handle, int *vasi_return)
{
long state;
long rc;
@@ -911,8 +911,7 @@ int rtas_ibm_suspend_me(struct rtas_args *args)
return -ENOSYS;
/* Make sure the state is valid */
- rc = plpar_hcall(H_VASI_STATE, retbuf,
-((u64)args-args[0] 32) | args-args[1]);
+ rc = plpar_hcall(H_VASI_STATE, retbuf, handle);
state = retbuf[0];
@@ -920,12 +919,12 @@ int rtas_ibm_suspend_me(struct rtas_args *args)
printk(KERN_ERR rtas_ibm_suspend_me: vasi_state returned
%ld\n,rc);
return rc;
} else if (state == H_VASI_ENABLED) {
- args-args[args-nargs] = RTAS_NOT_SUSPENDABLE;
+ *vasi_return = RTAS_NOT_SUSPENDABLE;
return 0;
} else if (state != H_VASI_SUSPENDING) {
printk(KERN_ERR rtas_ibm_suspend_me: vasi_state returned state
%ld\n,
state);
- args-args[args-nargs] = -1;
+ *vasi_return = -1;
return 0;
}
@@ -973,7 +972,7 @@ out:
return atomic_read(data.error);
}
#else /* CONFIG_PPC_PSERIES */
-int rtas_ibm_suspend_me(struct rtas_args *args)
+int rtas_ibm_suspend_me(u64 handle, int *vasi_return)
{
return -ENOSYS;
}
@@ -1053,7 +1052,16 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
/* Need to handle ibm,suspend_me call specially */
if (token == ibm_suspend_me_token) {
- rc = rtas_ibm_suspend_me(args);
+
+ /*
+* rtas_ibm_suspend_me assumes args are in cpu endian, or at
least the
+* hcall within it requires it.
+*/
+ int vasi_rc = 0;
+ u64 handle = ((u64)be32_to_cpu(args.args[0]) 32)
+ | be32_to_cpu(args.args[1]);
+ rc = rtas_ibm_suspend_me(handle, vasi_rc);
+ args.rets[0] = cpu_to_be32(vasi_rc);
if (rc)
return rc;
goto copy_return;
diff --git a/arch/powerpc/platforms/pseries/mobility.c
b/arch/powerpc/platforms/pseries/mobility.c
index e7cb6d4..90cf3dc 100644
--- a/arch/powerpc/platforms/pseries/mobility.c
+++ b/arch/powerpc/platforms/pseries/mobility.c
@@ -316,34 +316,24 @@ void post_mobility_fixup(void)
static ssize_t migrate_store(struct class *class, struct class_attribute *attr,
const char *buf, size_t count)
{
- struct rtas_args args;
u64 streamid;
int rc;
+ int vasi_rc = 0;
rc = kstrtou64(buf, 0, streamid);
if (rc)
return rc;
- memset(args, 0, sizeof(args));
- args.token = rtas_token(ibm,suspend-me);
- args.nargs = 2;
- args.nret = 1;
-
- args.args[0] = streamid 32 ;
- args.args[1] = streamid 0x;
- args.rets = args.args[args.nargs];
-
do {
- args.rets[0] = 0;
- rc =
[PATCH 2/2] powerpc: Add ppc64 hard lockup detector support
The hard lockup detector uses a PMU event as a periodic NMI to
detect if we are stuck (where stuck means no timer interrupts have
occurred).
Ben's rework of the ppc64 soft disable code has made ppc64 PMU
exceptions a partial NMI. They can get disabled if an external
interrupt comes in, but otherwise PMU interrupts will fire in
interrupt disabled regions.
We disable the hard lockup detector by default for a few reasons:
- It breaks userspace event based branches on POWER8.
- It is likely to produce false positives on KVM guests.
- Since PMCs can only count to 2^31, counting cycles means we might
take multiple PMU exceptions per second per hardware thread even
if our hard lockup timeout is 10 seconds.
It can be enabled via a boot option, or via procfs.
Signed-off-by: Anton Blanchard an...@samba.org
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/include/asm/nmi.h | 4
arch/powerpc/kernel/setup_64.c | 20
3 files changed, 25 insertions(+)
create mode 100644 arch/powerpc/include/asm/nmi.h
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a2a168e..f6f4734 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -152,6 +152,7 @@ config PPC
select DCACHE_WORD_ACCESS if PPC64 CPU_LITTLE_ENDIAN
select NO_BOOTMEM
select HAVE_GENERIC_RCU_GUP
+ select HAVE_PERF_EVENTS_NMI if PPC64
config GENERIC_CSUM
def_bool CPU_LITTLE_ENDIAN
diff --git a/arch/powerpc/include/asm/nmi.h b/arch/powerpc/include/asm/nmi.h
new file mode 100644
index 000..ff1ccb3
--- /dev/null
+++ b/arch/powerpc/include/asm/nmi.h
@@ -0,0 +1,4 @@
+#ifndef _ASM_NMI_H
+#define _ASM_NMI_H
+
+#endif /* _ASM_NMI_H */
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 300be7d..ae39ec6 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -37,6 +37,7 @@
#include linux/memblock.h
#include linux/hugetlb.h
#include linux/memory.h
+#include linux/nmi.h
#include asm/io.h
#include asm/kdump.h
@@ -779,3 +780,22 @@ unsigned long memory_block_size_bytes(void)
struct ppc_pci_io ppc_pci_io;
EXPORT_SYMBOL(ppc_pci_io);
#endif
+
+#ifdef CONFIG_HARDLOCKUP_DETECTOR
+u64 hw_nmi_get_sample_period(int watchdog_thresh)
+{
+ return ppc_proc_freq * watchdog_thresh;
+}
+
+/*
+ * The hardlockup detector breaks PMU event based branches and is likely
+ * to get false positives in KVM guests, so disable it by default.
+ */
+static int __init disable_hardlockup_detector(void)
+{
+ watchdog_enable_hardlockup_detector(false);
+
+ return 0;
+}
+early_initcall(disable_hardlockup_detector);
+#endif
--
2.1.0
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[PATCH 1/2] oprofile: Add HAVE_OPROFILE_NMI_TIMER
HAVE_PERF_EVENTS_NMI is used for two things - the oprofile NMI timer and the hardlockup detector. Create HAVE_OPROFILE_NMI_TIMER so an architecture can select them separately. On ppc64 we want to add the hardlockup detector, but not the oprofile NMI timer fallback. Signed-off-by: Anton Blanchard an...@samba.org --- arch/Kconfig | 5 - arch/x86/Kconfig | 1 + 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/Kconfig b/arch/Kconfig index 05d7a8a..3d50e42 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -30,9 +30,12 @@ config OPROFILE_EVENT_MULTIPLEX config HAVE_OPROFILE bool +config HAVE_OPROFILE_NMI_TIMER + bool + config OPROFILE_NMI_TIMER def_bool y - depends on PERF_EVENTS HAVE_PERF_EVENTS_NMI + depends on PERF_EVENTS HAVE_OPROFILE_NMI_TIMER config KPROBES bool Kprobes diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index ba397bd..98d9c72 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -138,6 +138,7 @@ config X86 select HAVE_ACPI_APEI_NMI if ACPI select ACPI_LEGACY_TABLES_LOOKUP if ACPI select X86_FEATURE_NAMES if PROC_FS + select HAVE_OPROFILE_NMI_TIMER config INSTRUCTION_DECODER def_bool y -- 2.1.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 07/30] PCI: Pass PCI domain number combined with root bus number
Now we could pass PCI domain combined with bus number
in u32 argu. Because in arm/arm64, PCI domain number
is assigned by pci_bus_assign_domain_nr(). So we leave
pci_scan_root_bus() and pci_create_root_bus() in arm/arm64
unchanged. A new function pci_host_assign_domain_nr()
will be introduced for arm/arm64 to assign domain number
in later patch.
Signed-off-by: Yijing Wang wangyij...@huawei.com
CC: Richard Henderson r...@twiddle.net
CC: Ivan Kokshaysky i...@jurassic.park.msu.ru
CC: Matt Turner matts...@gmail.com
CC: Tony Luck tony.l...@intel.com
CC: Fenghua Yu fenghua...@intel.com
CC: Michal Simek mon...@monstr.eu
CC: Ralf Baechle r...@linux-mips.org
CC: Benjamin Herrenschmidt b...@kernel.crashing.org
CC: Paul Mackerras pau...@samba.org
CC: Michael Ellerman m...@ellerman.id.au
CC: Sebastian Ott seb...@linux.vnet.ibm.com
CC: Gerald Schaefer gerald.schae...@de.ibm.com
CC: David S. Miller da...@davemloft.net
CC: Chris Metcalf cmetc...@ezchip.com
CC: Thomas Gleixner t...@linutronix.de
CC: Konrad Rzeszutek Wilk konrad.w...@oracle.com
CC: linux-al...@vger.kernel.org
CC: linux-ker...@vger.kernel.org
CC: linux-i...@vger.kernel.org
CC: linux-m...@linux-mips.org
CC: linuxppc-dev@lists.ozlabs.org
CC: linux-s...@vger.kernel.org
CC: linux...@vger.kernel.org
CC: sparcli...@vger.kernel.org
CC: xen-de...@lists.xenproject.org
---
arch/alpha/kernel/pci.c |5 +++--
arch/alpha/kernel/sys_nautilus.c |3 ++-
arch/ia64/pci/pci.c |4 ++--
arch/ia64/sn/kernel/io_init.c|5 +++--
arch/microblaze/pci/pci-common.c |5 +++--
arch/mips/pci/pci.c |4 ++--
arch/powerpc/kernel/pci-common.c |5 +++--
arch/s390/pci/pci.c |5 +++--
arch/sh/drivers/pci/pci.c|5 +++--
arch/sparc/kernel/pci.c |5 +++--
arch/tile/kernel/pci.c |4 ++--
arch/tile/kernel/pci_gx.c|5 +++--
arch/x86/pci/acpi.c |6 +++---
arch/x86/pci/common.c|3 ++-
drivers/pci/xen-pcifront.c |5 +++--
15 files changed, 40 insertions(+), 29 deletions(-)
diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c
index 97f9730..b15f9f2 100644
--- a/arch/alpha/kernel/pci.c
+++ b/arch/alpha/kernel/pci.c
@@ -332,8 +332,9 @@ common_init_pci(void)
pci_add_resource_offset(resources, hose-mem_space,
hose-mem_space-start);
- bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
- hose, resources);
+ bus = pci_scan_root_bus(NULL,
+ PCI_DOMBUS(hose-index, next_busno),
alpha_mv.pci_ops,
+ hose, resources);
if (bus)
pci_bus_add_devices(bus);
hose-bus = bus;
diff --git a/arch/alpha/kernel/sys_nautilus.c b/arch/alpha/kernel/sys_nautilus.c
index 2c864bb..f7bfdf3 100644
--- a/arch/alpha/kernel/sys_nautilus.c
+++ b/arch/alpha/kernel/sys_nautilus.c
@@ -206,7 +206,8 @@ nautilus_init_pci(void)
unsigned long memtop = max_low_pfn PAGE_SHIFT;
/* Scan our single hose. */
- bus = pci_scan_bus_legacy(0, alpha_mv.pci_ops, hose);
+ bus = pci_scan_bus_legacy(PCI_DOMBUS(hose-index, 0),
+ alpha_mv.pci_ops, hose);
hose-bus = bus;
pcibios_claim_one_bus(bus);
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 291a582..e457015 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -465,8 +465,8 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root
*root)
* should handle the case here, but it appears that IA64 hasn't
* such quirk. So we just ignore the case now.
*/
- pbus = pci_create_root_bus(NULL, bus, pci_root_ops, controller,
- info-resources);
+ pbus = pci_create_root_bus(NULL, PCI_DOMBUS(domain, bus),
+ pci_root_ops, controller, info-resources);
if (!pbus) {
pci_free_resource_list(info-resources);
__release_pci_root_info(info);
diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c
index 63b43a6..bcdc5b8 100644
--- a/arch/ia64/sn/kernel/io_init.c
+++ b/arch/ia64/sn/kernel/io_init.c
@@ -266,8 +266,9 @@ sn_pci_controller_fixup(int segment, int busnum, struct
pci_bus *bus)
pci_add_resource_offset(resources, res[1],
prom_bussoft_ptr-bs_legacy_mem);
- bus = pci_scan_root_bus(NULL, busnum, pci_root_ops, controller,
- resources);
+ bus = pci_scan_root_bus(NULL,
+ PCI_DOMBUS(controller-segment, busnum),
+ pci_root_ops, controller, resources);
if (bus == NULL) {
kfree(res);
kfree(controller);
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 009b271..890bd36
Re: [alsa-devel][PATCH 1/3] SoC: fsl_sai: add sai master mode support
On Tue, Jan 20, 2015 at 08:21:18PM +0800, Zidan Wang wrote:
+static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)
+ if ((tx sai-synchronous[TX]) || (!tx !sai-synchronous[RX])) {
+ regmap_update_bits(sai-regmap, FSL_SAI_RCR2,
+ FSL_SAI_CR2_MSEL_MASK, FSL_SAI_CR2_MSEL(sai-mclk_id));
+ regmap_update_bits(sai-regmap, FSL_SAI_RCR2,
+ FSL_SAI_CR2_DIV_MASK, savediv - 1);
Hmm...the case should be a bit more complicated here IMO.
tx sai-synchronous[TX] means the playback in synchronous
mode (TX following RX). What if the recording has been already
activated with an MSEL setting at this point? Then the playback
stream, as a secondary stream, will overwrite MSEL of the first
stream -- Record. Same would happen to the DIV configuration.
@@ -297,6 +368,24 @@ static int fsl_sai_hw_params(struct snd_pcm_substream
*substream,
unsigned int channels = params_channels(params);
u32 word_width = snd_pcm_format_width(params_format(params));
u32 val_cr4 = 0, val_cr5 = 0;
+ int ret;
+
+ if (!sai-is_slave_mode) {
+ ret = fsl_sai_set_bclk(cpu_dai, tx,
+ 2 * word_width * params_rate(params));
+ if (ret)
+ return ret;
+
+ /* Do not enable the clock if it is already enabled */
It actually doesn't matter to enable the clock again since it
purely increaes its count. But we do need a protection for MSEL
overwritten issue resulted from the fsl_sai_set_bclk() call.
@@ -133,10 +135,13 @@ struct fsl_sai {
struct clk *mclk_clk[FSL_SAI_MCLK_MAX];
bool is_lsb_first;
+ bool is_slave_mode;
bool is_dsp_mode;
bool sai_on_imx;
bool synchronous[2];
+ unsigned int mclk_id;
+ unsigned int mclk_streams;
Besides, I doubt that only one property of mclk_id can content
Asynchronous Mode -- TX and RX can fetch their clocks from
different MCLK sources.
Nicolin
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Re: [PATCH 0/8] clk: ppc-corenet: Add support for the platform PLL
Hello Yuan-Tian, On 01/20/2015 07:40 PM, Tang Yuantian-B29983 wrote: Hi Emil, Thanks for fixing those warnings. The patch set you based on is merged. I sent another two patches and one of them got merged. You probably need to rebase your patches. My patch link: http://patchwork.ozlabs.org/patch/429257/ I'll rebase on top of this and resubmit Cheers, http://patchwork.ozlabs.org/patch/429258/ Thanks, Yuantian -Original Message- From: Emil Medve [mailto:emilian.me...@freescale.com] Sent: Tuesday, January 20, 2015 6:09 PM To: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; mturque...@linaro.org; haoke...@gmail.com; Tang Yuantian-B29983 Cc: Medve Emilian-EMMEDVE1 Subject: [PATCH 0/8] clk: ppc-corenet: Add support for the platform PLL These patches are based on: http://patchwork.ozlabs.org/patch/417297 http://patchwork.ozlabs.org/patch/417295 http://patchwork.ozlabs.org/patch/417292 The first 5 patches below are checkpatch/static analysis fixes Emil Medve (8): clk: ppc-corenet: Fix checkpatch type PARENTHESIS_ALIGNMENT clk: ppc-corenet: Fix checkpatch type ALLOC_WITH_MULTIPLY clk: ppc-corenet: Fix checkpatch type ALLOC_SIZEOF_STRUCT clk: ppc-corenet: Fix checkpatch type OOM_MESSAGE clk: ppc-corenet: Make local symbol 'static' clk: ppc-corenet: Replace kzalloc() with kmalloc() powerpc/corenet: Enable CLK_PPC_CORENET clk: ppc-corenet: Add support for the platform PLL arch/powerpc/configs/corenet32_smp_defconfig | 1 + arch/powerpc/configs/corenet64_smp_defconfig | 1 + drivers/clk/clk-ppc-corenet.c| 120 ++- 3 files changed, 101 insertions(+), 21 deletions(-) -- 2.2.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 1/2] powerpc: Add 64bit optimised memcmp
I noticed ksm spending quite a lot of time in memcmp on a large KVM box. The current memcmp loop is very unoptimised - byte at a time compares with no loop unrolling. We can do much much better. Optimise the loop in a few ways: - Unroll the byte at a time loop - For large (at least 32 byte) comparisons that are also 8 byte aligned, use an unrolled modulo scheduled loop using 8 byte loads. This is similar to our glibc memcmp. A simple microbenchmark testing 1000 iterations of an 8192 byte memcmp was used to measure the performance: baseline: 29.93 s modified:1.70 s Just over 17x faster. v2: Incorporated some suggestions from Segher: - Use andi. instead of rdlicl. - Convert bdnzt eq, to bdnz. It's just duplicating the earlier compare and was a relic from a previous version. - Don't use cr5, we have plans to use that CR field for fast local atomics. Signed-off-by: Anton Blanchard an...@samba.org --- arch/powerpc/lib/Makefile| 3 +- arch/powerpc/lib/memcmp_64.S | 233 +++ arch/powerpc/lib/string.S| 2 + 3 files changed, 237 insertions(+), 1 deletion(-) create mode 100644 arch/powerpc/lib/memcmp_64.S diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 1b01159..5526156 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -15,7 +15,8 @@ obj-$(CONFIG_PPC32) += div64.o copy_32.o obj-$(CONFIG_PPC64)+= copypage_64.o copyuser_64.o \ usercopy_64.o mem_64.o hweight_64.o \ - copyuser_power7.o string_64.o copypage_power7.o + copyuser_power7.o string_64.o copypage_power7.o \ + memcmp_64.o ifeq ($(CONFIG_GENERIC_CSUM),) obj-y += checksum_$(CONFIG_WORD_SIZE).o obj-$(CONFIG_PPC64)+= checksum_wrappers_64.o diff --git a/arch/powerpc/lib/memcmp_64.S b/arch/powerpc/lib/memcmp_64.S new file mode 100644 index 000..8953d23 --- /dev/null +++ b/arch/powerpc/lib/memcmp_64.S @@ -0,0 +1,233 @@ +/* + * Author: Anton Blanchard an...@au.ibm.com + * Copyright 2015 IBM Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#include asm/ppc_asm.h + +#define off8 r6 +#define off16 r7 +#define off24 r8 + +#define rA r9 +#define rB r10 +#define rC r11 +#define rD r27 +#define rE r28 +#define rF r29 +#define rG r30 +#define rH r31 + +#ifdef __LITTLE_ENDIAN__ +#define LD ldbrx +#else +#define LD ldx +#endif + +_GLOBAL(memcmp) + cmpdi cr1,r5,0 + + /* Use the short loop if both strings are not 8B aligned */ + or r6,r3,r4 + andi. r6,r6,7 + + /* Use the short loop if length is less than 32B */ + cmpdi cr6,r5,31 + + beq cr1,.Lzero + bne .Lshort + bgt cr6,.Llong + +.Lshort: + mtctr r5 + +1: lbz rA,0(r3) + lbz rB,0(r4) + subf. rC,rB,rA + bne .Lnon_zero + bdz .Lzero + + lbz rA,1(r3) + lbz rB,1(r4) + subf. rC,rB,rA + bne .Lnon_zero + bdz .Lzero + + lbz rA,2(r3) + lbz rB,2(r4) + subf. rC,rB,rA + bne .Lnon_zero + bdz .Lzero + + lbz rA,3(r3) + lbz rB,3(r4) + subf. rC,rB,rA + bne .Lnon_zero + + addir3,r3,4 + addir4,r4,4 + + bdnz1b + +.Lzero: + li r3,0 + blr + +.Lnon_zero: + mr r3,rC + blr + +.Llong: + li off8,8 + li off16,16 + li off24,24 + + std r31,-8(r1) + std r30,-16(r1) + std r29,-24(r1) + std r28,-32(r1) + std r27,-40(r1) + + srdir0,r5,5 + mtctr r0 + andi. r5,r5,31 + + LD rA,0,r3 + LD rB,0,r4 + + LD rC,off8,r3 + LD rD,off8,r4 + + LD rE,off16,r3 + LD rF,off16,r4 + + LD rG,off24,r3 + LD rH,off24,r4 + cmpld cr0,rA,rB + + addir3,r3,32 + addir4,r4,32 + + bdz .Lfirst32 + + LD rA,0,r3 + LD rB,0,r4 + cmpld cr1,rC,rD + + LD rC,off8,r3 + LD rD,off8,r4 + cmpld cr6,rE,rF + + LD rE,off16,r3 + LD rF,off16,r4 + cmpld cr7,rG,rH + bne cr0,.LcmpAB + + LD rG,off24,r3 + LD rH,off24,r4 + cmpld cr0,rA,rB + bne cr1,.LcmpCD + + addir3,r3,32 + addir4,r4,32 + + bdz .Lsecond32 + + .balign 16 + +1: LD rA,0,r3 + LD rB,0,r4 + cmpld cr1,rC,rD + bne cr6,.LcmpEF + + LD rC,off8,r3 +
[PATCH 2/2] powerpc: Add memcmp testcase
Add a testcase for the new ppc64 memcmp.
Signed-off-by: Anton Blanchard an...@samba.org
---
.../testing/selftests/powerpc/stringloops/Makefile | 21 +
.../selftests/powerpc/stringloops/asm/ppc_asm.h| 7 ++
.../selftests/powerpc/stringloops/memcmp_64.S | 1 +
.../selftests/powerpc/stringloops/test_memcmp.c| 103 +
4 files changed, 132 insertions(+)
create mode 100644 tools/testing/selftests/powerpc/stringloops/Makefile
create mode 100644 tools/testing/selftests/powerpc/stringloops/asm/ppc_asm.h
create mode 12 tools/testing/selftests/powerpc/stringloops/memcmp_64.S
create mode 100644 tools/testing/selftests/powerpc/stringloops/test_memcmp.c
diff --git a/tools/testing/selftests/powerpc/stringloops/Makefile
b/tools/testing/selftests/powerpc/stringloops/Makefile
new file mode 100644
index 000..159a299
--- /dev/null
+++ b/tools/testing/selftests/powerpc/stringloops/Makefile
@@ -0,0 +1,21 @@
+# The loops are all 64-bit code
+CFLAGS += -m64
+CFLAGS += -I$(CURDIR)
+CFLAGS += -D SELFTEST
+
+PROGS := test_memcmp
+EXTRA_SOURCES := memcmp_64.S ../harness.c
+
+all: $(PROGS)
+
+$(PROGS): $(EXTRA_SOURCES)
+
+run_tests: all
+ @-for PROG in $(PROGS); do \
+ ./$$PROG; \
+ done;
+
+clean:
+ rm -f $(PROGS) *.o
+
+.PHONY: all run_tests clean
diff --git a/tools/testing/selftests/powerpc/stringloops/asm/ppc_asm.h
b/tools/testing/selftests/powerpc/stringloops/asm/ppc_asm.h
new file mode 100644
index 000..11bece8
--- /dev/null
+++ b/tools/testing/selftests/powerpc/stringloops/asm/ppc_asm.h
@@ -0,0 +1,7 @@
+#include ppc-asm.h
+
+#ifndef r1
+#define r1 sp
+#endif
+
+#define _GLOBAL(A) FUNC_START(test_ ## A)
diff --git a/tools/testing/selftests/powerpc/stringloops/memcmp_64.S
b/tools/testing/selftests/powerpc/stringloops/memcmp_64.S
new file mode 12
index 000..9bc87e4
--- /dev/null
+++ b/tools/testing/selftests/powerpc/stringloops/memcmp_64.S
@@ -0,0 +1 @@
+../../../../../arch/powerpc/lib/memcmp_64.S
\ No newline at end of file
diff --git a/tools/testing/selftests/powerpc/stringloops/test_memcmp.c
b/tools/testing/selftests/powerpc/stringloops/test_memcmp.c
new file mode 100644
index 000..17417dd
--- /dev/null
+++ b/tools/testing/selftests/powerpc/stringloops/test_memcmp.c
@@ -0,0 +1,103 @@
+#include malloc.h
+#include stdlib.h
+#include string.h
+#include ../utils.h
+
+#define SIZE 256
+#define ITERATIONS 1
+
+int test_memcmp(const void *s1, const void *s2, size_t n);
+
+/* test all offsets and lengths */
+static void test_one(char *s1, char *s2)
+{
+ unsigned long offset, size;
+
+ for (offset = 0; offset SIZE; offset++) {
+ for (size = 0; size (SIZE-offset); size++) {
+ int x, y;
+ unsigned long i;
+
+ y = memcmp(s1+offset, s2+offset, size);
+ x = test_memcmp(s1+offset, s2+offset, size);
+
+ if (((x ^ y) 0) /* Trick to compare sign */
+ ((x | y) != 0)) { /* check for zero */
+ printf(memcmp returned %d, should have
returned %d (offset %ld size %ld)\n, x, y, offset, size);
+
+ for (i = offset; i offset+size; i++)
+ printf(%02x , s1[i]);
+ printf(\n);
+
+ for (i = offset; i offset+size; i++)
+ printf(%02x , s2[i]);
+ printf(\n);
+ abort();
+ }
+ }
+ }
+}
+
+static int testcase(void)
+{
+ char *s1;
+ char *s2;
+ unsigned long i;
+
+ s1 = memalign(128, SIZE);
+ if (!s1) {
+ perror(memalign);
+ exit(1);
+ }
+
+ s2 = memalign(128, SIZE);
+ if (!s2) {
+ perror(memalign);
+ exit(1);
+ }
+
+ srandom(1);
+
+ for (i = 0; i ITERATIONS; i++) {
+ unsigned long j;
+ unsigned long change;
+
+ for (j = 0; j SIZE; j++)
+ s1[j] = random();
+
+ memcpy(s2, s1, SIZE);
+
+ /* change one byte */
+ change = random() % SIZE;
+ s2[change] = random() 0xff;
+
+ test_one(s1, s2);
+ }
+
+ srandom(1);
+
+ for (i = 0; i ITERATIONS; i++) {
+ unsigned long j;
+ unsigned long change;
+
+ for (j = 0; j SIZE; j++)
+ s1[j] = random();
+
+ memcpy(s2, s1, SIZE);
+
+ /* change multiple bytes, 1/8 of total */
+ for (j = 0; j SIZE / 8; j++) {
+ change = random() % SIZE;
+ s2[change] = random() 0xff;
+ }
+
+ test_one(s1, s2);
+ }
+
+
RE: [PATCH 0/8] clk: ppc-corenet: Add support for the platform PLL
Hi Emil, Thanks for fixing those warnings. The patch set you based on is merged. I sent another two patches and one of them got merged. You probably need to rebase your patches. My patch link: http://patchwork.ozlabs.org/patch/429257/ http://patchwork.ozlabs.org/patch/429258/ Thanks, Yuantian -Original Message- From: Emil Medve [mailto:emilian.me...@freescale.com] Sent: Tuesday, January 20, 2015 6:09 PM To: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; mturque...@linaro.org; haoke...@gmail.com; Tang Yuantian-B29983 Cc: Medve Emilian-EMMEDVE1 Subject: [PATCH 0/8] clk: ppc-corenet: Add support for the platform PLL These patches are based on: http://patchwork.ozlabs.org/patch/417297 http://patchwork.ozlabs.org/patch/417295 http://patchwork.ozlabs.org/patch/417292 The first 5 patches below are checkpatch/static analysis fixes Emil Medve (8): clk: ppc-corenet: Fix checkpatch type PARENTHESIS_ALIGNMENT clk: ppc-corenet: Fix checkpatch type ALLOC_WITH_MULTIPLY clk: ppc-corenet: Fix checkpatch type ALLOC_SIZEOF_STRUCT clk: ppc-corenet: Fix checkpatch type OOM_MESSAGE clk: ppc-corenet: Make local symbol 'static' clk: ppc-corenet: Replace kzalloc() with kmalloc() powerpc/corenet: Enable CLK_PPC_CORENET clk: ppc-corenet: Add support for the platform PLL arch/powerpc/configs/corenet32_smp_defconfig | 1 + arch/powerpc/configs/corenet64_smp_defconfig | 1 + drivers/clk/clk-ppc-corenet.c| 120 ++- 3 files changed, 101 insertions(+), 21 deletions(-) -- 2.2.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 2/2] powerpc/powernv: Skip registering log region when CONFIG_PRINTK=n
Pranith Kumar bobby.pr...@gmail.com writes: When CONFIG_PRINTK=n, log_buf_addr_get() returns NULL and log_buf_len_get() return 0. Check for these return values and skip registering the dump buffer. Signed-off-by: Pranith Kumar bobby.pr...@gmail.com CC: Michael Ellerman m...@ellerman.id.au (investigating what would occur on systems with current firmware..) Looking at hw/fsp/fsp-mdst-table.c in skiboot it appears that we'd end up logging an error log about being passed the size 0 and return OPAL_PARAMETER back to Linux. While harmless, this is, naturally, not awesome to log an error about being unable to grab kernel log on crash every time you boot. Reviewed-by: Stewart Smith stew...@linux.vnet.ibm.com --- arch/powerpc/platforms/powernv/opal.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c index f10b9ec..1db119f0 100644 --- a/arch/powerpc/platforms/powernv/opal.c +++ b/arch/powerpc/platforms/powernv/opal.c @@ -667,7 +667,13 @@ static void __init opal_dump_region_init(void) /* Register kernel log buffer */ addr = log_buf_addr_get(); + if (addr == NULL) + return; + size = log_buf_len_get(); + if (size == 0) + return; + rc = opal_register_dump_region(OPAL_DUMP_REGION_LOG_BUF, __pa(addr), size); /* Don't warn if this is just an older OPAL that doesn't -- 1.9.1 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH V2 06/12] selftests, powerpc: Add test for system wide DSCR default
On Tue, 2015-01-20 at 16:40 -0500, Dave Jones wrote: On Wed, Jan 14, 2015 at 10:44:31AM +1100, Michael Ellerman wrote: Also, I would like to see the test results reports using kselftest.h - it can be separate patch in the interest of getting tests in. Sorry but kselftest.h doesn't do anything useful for us. We have existing test reporting that uses the subunit protocol. I'm happy to convert that to TAP, or some other well defined output format, but not to something ad-hoc like kselftest.h currently provides. Something TAP-alike would also help reduce some of the spew from tests that are going to fail. Possibly :) eg, running execveat tests on a kernel that doesn't implement that syscall currently spews around 20 lines of [FAIL]. Adding something to the beginning of the test to set plan() accordingly if it detects -ENOSYS could make that output a little cleaner. Yeah I'm a bit dubious about plan, it often ends up being a pain to calculate correctly and so it's either missing or wrong. The execveat test probably just needs an initial test that looks for ENOSYS and bails entirely. I'll write a patch. That other projects (like jenkins, bug trackers etc) could consume the output of the test runs would be a nice bonus. I only recently started looking at kselftests and was surprised at the amount of variance we have in the way of printing 'Ok' '[OK]' 'ok...' etc. Variance in output is annoying, but putting up too many barriers to entry for new tests is even less desirable IMHO. Our preference should always be for more tests in the tree, and we can clean up the output/reporting later. cheers ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 8/8] clk: ppc-corenet: Add support for the platform PLL
Which platform are you trying to use this on? Can this be initialized by core
pll function core_pll_init()?
I just saw most of this function is silimar to the core_pll_init().
Thanks,
Yuantian
-Original Message-
From: Emil Medve [mailto:emilian.me...@freescale.com]
Sent: Tuesday, January 20, 2015 6:10 PM
To: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; mturque...@linaro.org;
haoke...@gmail.com; Tang Yuantian-B29983
Cc: Medve Emilian-EMMEDVE1
Subject: [PATCH 8/8] clk: ppc-corenet: Add support for the platform PLL
Change-Id: Iac11ed95f274485a86d2c11f32a3dc502bcd020f
Signed-off-by: Emil Medve emilian.me...@freescale.com
---
drivers/clk/clk-ppc-corenet.c | 85
+++
1 file changed, 85 insertions(+)
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index
91816b1..ff425e1 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -7,6 +7,9 @@
*
* clock driver for Freescale PowerPC corenet SoCs.
*/
+
+#define pr_fmt(fmt) KBUILD_MODNAME : fmt
+
#include linux/clk-provider.h
#include linux/io.h
#include linux/kernel.h
@@ -261,9 +264,91 @@ static void __init sysclk_init(struct device_node *node)
of_clk_add_provider(np, of_clk_src_simple_get, clk); }
+static void __init pltfrm_pll_init(struct device_node *np) {
+ void __iomem *base;
+ uint32_t mult;
+ const char *parent_name, *clk_name;
+ int i, _errno;
+ struct clk_onecell_data *cod;
+
+ base = of_iomap(np, 0);
+ if (!base) {
+ pr_err(%s(): %s: of_iomap() failed\n, __func__, np-name);
+ return;
+ }
+
+ /* Get the multiple of PLL */
+ mult = ioread32be(base);
+
+ iounmap(base);
+
+ /* Check if this PLL is disabled */
+ if (mult PLL_KILL) {
+ pr_debug(%s(): %s: Disabled\n, __func__, np-name);
+ return;
+ }
+ mult = (mult GENMASK(6, 1)) 1;
+
+ parent_name = of_clk_get_parent_name(np, 0);
+ if (!parent_name) {
+ pr_err(%s(): %s: of_clk_get_parent_name() failed\n,
+__func__, np-name);
+ return;
+ }
+
+ i = of_property_count_strings(np, clock-output-names);
+ if (i 0) {
+ pr_err(%s(): %s: of_property_count_strings(clock-output-names)
= %d\n,
+__func__, np-name, i);
+ return;
+ }
+
+ cod = kmalloc(sizeof(*cod) + i * sizeof(struct clk *), GFP_KERNEL);
+ if (!cod)
+ return;
+ cod-clks = (struct clk **)(cod + 1);
+ cod-clk_num = i;
+
+ for (i = 0; i cod-clk_num; i++) {
+ _errno = of_property_read_string_index(np, clock-output-names,
+i, clk_name);
+ if (_errno 0) {
+ pr_err(%s(): %s:
of_property_read_string_index(clock-output-names) = %d\n,
+__func__, np-name, _errno);
+ goto return_clk_unregister;
+ }
+
+ cod-clks[i] = clk_register_fixed_factor(NULL, clk_name,
+parent_name, 0, mult, 1 + i);
+ if (IS_ERR(cod-clks[i])) {
+ pr_err(%s(): %s: clk_register_fixed_factor(%s) =
%ld\n,
+__func__, np-name,
+clk_name, PTR_ERR(cod-clks[i]));
+ goto return_clk_unregister;
+ }
+ }
+
+ _errno = of_clk_add_provider(np, of_clk_src_onecell_get, cod);
+ if (_errno 0) {
+ pr_err(%s(): %s: of_clk_add_provider() = %d\n,
+__func__, np-name, _errno);
+ goto return_clk_unregister;
+ }
+
+ return;
+
+return_clk_unregister:
+ while (--i = 0)
+ clk_unregister(cod-clks[i]);
+ kfree(cod);
+}
+
CLK_OF_DECLARE(qoriq_sysclk_1, fsl,qoriq-sysclk-1.0, sysclk_init);
CLK_OF_DECLARE(qoriq_sysclk_2, fsl,qoriq-sysclk-2.0, sysclk_init);
CLK_OF_DECLARE(qoriq_core_pll_1, fsl,qoriq-core-pll-1.0, core_pll_init);
CLK_OF_DECLARE(qoriq_core_pll_2, fsl,qoriq-core-pll-2.0, core_pll_init);
CLK_OF_DECLARE(qoriq_core_mux_1, fsl,qoriq-core-mux-1.0, core_mux_init);
CLK_OF_DECLARE(qoriq_core_mux_2, fsl,qoriq-core-mux-2.0, core_mux_init);
+CLK_OF_DECLARE(qoriq_pltfrm_pll_1, fsl,qoriq-platform-pll-1.0,
+pltfrm_pll_init); CLK_OF_DECLARE(qoriq_pltfrm_pll_2,
+fsl,qoriq-platform-pll-2.0, pltfrm_pll_init);
--
2.2.2
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Re: [alsa-devel] [PATCH 0/3] Add master mode, tmd and right-j mode support
On Tue, Jan 20, 2015 at 11:15:54PM -0200, Fabio Estevam wrote: Not related to your series, but do you have a patch for imx6sx-sdb.dts that adds sai support? In the FSL version they use 'fsl,sdma-event-remap' property to specify the SAI sdma channels, but this is not present in mainline? How are you dealing with it? I think he must have those patches applied to his own local branch as I do :) I was quite hesitating to send them because the SDMA one doesn't look flawless, plus I don't know SDMA owner's plan for upstream. Nicolin ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: PowerMac G5 Quad Issue reporting
On 20.01.2015 20:52, luigi burdo wrote: Hello all LinuxPPc Developer, need to report a issue that im facing from kernel 3.16 and up. The fans of powermac g5 quad start boosting like a turbo jet after the system is been loaded and up. Usually this become after about 30-60 seconds when the system is loaded. You need to load the i2c_powermac kernel module. Need to report to Michel D. from amd.com . The RadeonHD 6570 now is working on PowerMac G5 too look like the Xorg bigendian issue related Evergreen / Northern is been fixed ;-) Xorg itself has always been working, only OpenGL can be problematic. Have you verified r600_dri.so is used for that? -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 2/2] mm: fix undefined reference to `.kernel_map_pages' on PPC builds
It's possible to configure DEBUG_PAGEALLOC without PAGE_POISONING on ppc. Fix building the generic kernel_map_pages() implementation in this case: LD init/built-in.o mm/built-in.o: In function `free_pages_prepare': mm/page_alloc.c:770: undefined reference to `.kernel_map_pages' mm/built-in.o: In function `prep_new_page': mm/page_alloc.c:933: undefined reference to `.kernel_map_pages' mm/built-in.o: In function `map_pages': mm/compaction.c:61: undefined reference to `.kernel_map_pages' make: *** [vmlinux] Error 1 Signed-off-by: Kim Phillips kim.phill...@freescale.com --- mm/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/mm/Makefile b/mm/Makefile index 4bf586e..2956467 100644 --- a/mm/Makefile +++ b/mm/Makefile @@ -46,6 +46,7 @@ obj-$(CONFIG_SLOB) += slob.o obj-$(CONFIG_MMU_NOTIFIER) += mmu_notifier.o obj-$(CONFIG_KSM) += ksm.o obj-$(CONFIG_PAGE_POISONING) += debug-pagealloc.o +obj-$(CONFIG_DEBUG_PAGEALLOC) += debug-pagealloc.o obj-$(CONFIG_SLAB) += slab.o obj-$(CONFIG_SLUB) += slub.o obj-$(CONFIG_KMEMCHECK) += kmemcheck.o -- 2.2.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc/fsl_pci: Fix pci stack build bug with FRAME_WARN
Fix this:
CC arch/powerpc/sysdev/fsl_pci.o
arch/powerpc/sysdev/fsl_pci.c: In function 'fsl_pcie_check_link':
arch/powerpc/sysdev/fsl_pci.c:91:1: error: the frame size of 1360 bytes is
larger than 1024 bytes [-Werror=frame-larger-than=]
when configuring FRAME_WARN, by converting the allocation from the
stack to the heap. We use GFP_ATOMIC since this function can be
called with interrupts disabled.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
arch/powerpc/sysdev/fsl_pci.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 6455c1e..635d743 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -69,11 +69,13 @@ static int fsl_pcie_check_link(struct pci_controller *hose)
if (hose-indirect_type PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK) {
if (hose-ops-read == fsl_indirect_read_config) {
- struct pci_bus bus;
- bus.number = hose-first_busno;
- bus.sysdata = hose;
- bus.ops = hose-ops;
- indirect_read_config(bus, 0, PCIE_LTSSM, 4, val);
+ struct pci_bus *bus;
+ bus = kmalloc(sizeof(*bus), GFP_ATOMIC);
+ bus-number = hose-first_busno;
+ bus-sysdata = hose;
+ bus-ops = hose-ops;
+ indirect_read_config(bus, 0, PCIE_LTSSM, 4, val);
+ kfree(bus);
} else
early_read_config_dword(hose, 0, 0, PCIE_LTSSM, val);
if (val PCIE_LTSSM_L0)
--
2.2.2
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