Re: [PATCH v6 11/37] cxlflash: Refine host/device attributes

[Tomas Henzl]

On 21.10.2015 22:12, Matthew R. Ochs wrote:
> Implement the following suggestions and add two new attributes
> to allow for debugging the port LUN table.
>
>  - use scnprintf() instead of snprintf()
>  - use DEVICE_ATTR_RO and DEVICE_ATTR_RW
>
> Suggested-by: Shane Seymour 
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 15/37] cxlflash: Fix host link up event handling

[Tomas Henzl]

On 21.10.2015 22:13, Matthew R. Ochs wrote:
> Following a link up event, the LUNs available to the host may
> have changed. Without rescanning the host, the LUN topology is
> unknown to the user. In such a state, the user would be unable
> to locate provisioned resources.
>
> To remedy, the host should be rescanned after a link up event.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 14/37] cxlflash: Fix location of setting resid

[Tomas Henzl]

On 21.10.2015 22:13, Matthew R. Ochs wrote:
> The resid is incorrectly set which can lead to unnecessary retry
> attempts by the stack. This is due to resid _always_ being set
> using a value returned from the adapter. Instead, the value
> should only be interpreted and set when in an underrun scenario.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 22/37] cxlflash: Remove unnecessary scsi_block_requests

[Tomas Henzl]

On 21.10.2015 22:14, Matthew R. Ochs wrote:
> The host reset handler is called with I/O already blocked, thus
> there is no need to explicitly block and unblock I/O in the handler.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 25/37] cxlflash: Fix to prevent EEH recovery failure

[Tomas Henzl]

On 21.10.2015 22:14, Matthew R. Ochs wrote:
> The process_sense() routine can perform a read capacity which
> can take some time to complete. If an EEH occurs while waiting
> on the read capacity, the EEH handler will wait to obtain the
> context's mutex in order to put the context in an error state.
> The EEH handler will sit and wait until the context is free,
> but this wait can potentially last forever (deadlock) if the
> scsi_execute() that performs the read capacity experiences a
> timeout and calls into the reset callback. When that occurs,
> the reset callback sees that the device is already being reset
> and waits for the reset to complete. This leaves two threads
> waiting on the other.
>
> To address this issue, make the context unavailable to new,
> non-system owned threads and release the context while calling
> into process_sense(). After returning from process_sense() the
> context mutex is reacquired and the context is made available
> again. The context can be safely moved to the error state if
> needed during the unavailable window as no other threads will
> hold its reference.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Daniel Axtens 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 18/37] cxlflash: Fix AFU version access/storage and add check

[Tomas Henzl]

On 21.10.2015 22:14, Matthew R. Ochs wrote:
> The AFU version is stored as a non-terminated string of bytes within
> a 64-bit little-endian register. Presently the value is read directly
> (no MMIO accessor) and is stored in a buffer that is not big enough
> to contain a NULL terminator. Additionally the version obtained is not
> evaluated against a known value to prevent usage with unsupported AFUs.
> All of these deficiencies can lead to a variety of problems.
>
> To remedy, use the correct MMIO accessor to read the version value into
> a null-terminated buffer and add a check to prevent an incompatible AFU
> from being used with this driver.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Daniel Axtens 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 21/37] cxlflash: Correct behavior in device reset handler following EEH

[Tomas Henzl]

On 21.10.2015 22:14, Matthew R. Ochs wrote:
> When the device reset handler is entered while a reset operation
> is taking place, the handler exits without actually sending a
> reset (TMF) to the targeted device. This behavior is incorrect
> as the device is not reset. Further complicating matters is the
> fact that a success is returned even when the TMF was not sent.
>
> To fix, the state is rechecked after coming out of the reset
> state. When the state is normal, a TMF will be sent out.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 26/37] cxlflash: Correct spelling, grammar, and alignment mistakes

[Tomas Henzl]

On 21.10.2015 22:15, Matthew R. Ochs wrote:
> There are several spelling and grammar mistakes throughout the
> driver. Additionally there are a handful of places where there
> are extra lines and unnecessary variables/statements. These are
> a nuisance and pollute the driver.
>
> Fix spelling and grammar issues. Update some comments for clarity and
> consistency. Remove extra lines and a few unneeded variables/statements.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Andrew Donnellan 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 34/37] cxlflash: Fix to escalate to LINK_RESET on login timeout

[Tomas Henzl]

On 21.10.2015 22:16, Matthew R. Ochs wrote:
> From: Manoj Kumar 
>
> A 'login timed out' asynchronous error interrupt is generated if no
> response is seen to a FLOGI within 2 seconds.  If the time out error
> is not escalated to a LINK_RESET the port will not be available for
> use. This fix provides the required escalation.
>
> Signed-off-by: Manoj N. Kumar 
> Acked-by: Matthew R. Ochs 
> Reviewed-by: Brian King 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 16/37] cxlflash: Fix async interrupt bypass logic

[Tomas Henzl]

On 21.10.2015 22:13, Matthew R. Ochs wrote:
> A bug was introduced earlier in the development cycle when cleaning
> up logic statements. Instead of skipping bits that are not set, set
> bits are skipped, causing async interrupts to not be handled correctly.
>
> To fix, simply add back in the proper evaluation for an unset bit.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 19/37] cxlflash: Correct usage of scsi_host_put()

[Tomas Henzl]

On 21.10.2015 22:14, Matthew R. Ochs wrote:
> Currently, scsi_host_put() is being called prematurely in the
> remove path and is missing entirely in an error cleanup path.
> The former can lead to memory being freed too early with
> subsequent access potentially corrupting data whilst the former
> would result in a memory leak.
>
> Move the usage on remove to be the last cleanup action taken
> and introduce a call to scsi_host_put() in the one initialization
> error path that does not use remove to cleanup.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 23/37] cxlflash: Fix function prolog parameters and return codes

[Tomas Henzl]

On 21.10.2015 22:14, Matthew R. Ochs wrote:
> Several function prologs have incorrect parameter names and return
> code descriptions. This can lead to confusion when reviewing the
> source and creates inaccurate documentation.
>
> To remedy, update the function prologs to properly reflect parameter
> names and return codes.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Andrew Donnellan 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 29/37] cxlflash: Fix to double the delay each time

[Tomas Henzl]

On 21.10.2015 22:15, Matthew R. Ochs wrote:
> From: Manoj Kumar 
>
> The operator used to double the master context response delay
> is incorrect and does not result in delay doubling.
>
> To fix, use a left shift instead of the XOR operator.
>
> Reported-by: Tomas Henzl 
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Andrew Donnellan 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 32/37] cxlflash: Fix to avoid potential deadlock on EEH

[Tomas Henzl]

On 21.10.2015 22:15, Matthew R. Ochs wrote:
> Ioctl threads that use scsi_execute() can run for an excessive amount
> of time due to the fact that they have lengthy timeouts and retry logic
> built in. Under normal operation this is not an issue. However, once EEH
> enters the picture, a long execution time coupled with the possibility
> that a timeout can trigger entry to the driver via registered reset
> callbacks becomes a liability.
>
> In particular, a deadlock can occur when an EEH event is encountered
> while in running in scsi_execute(). As part of the recovery, the EEH
> handler drains all currently running ioctls, waiting until they have
> completed before proceeding with a reset. As the scsi_execute()'s are
> situated on the ioctl path, the EEH handler will wait until they (and
> the remainder of the ioctl handler they're associated with) have
> completed. Normally this would not be much of an issue aside from the
> longer recovery period. Unfortunately, the scsi_execute() triggers a
> reset when it times out. The reset handler will see that the device is
> already being reset and wait until that reset completed. This creates
> a condition where the EEH handler becomes stuck, infinitely waiting for
> the ioctl thread to complete.
>
> To avoid this behavior, temporarily unmark the scsi_execute() threads
> as an ioctl thread by releasing the ioctl read semaphore. This allows
> the EEH handler to proceed with a recovery while the thread is still
> running. Once the scsi_execute() returns, the ioctl read semaphore is
> reacquired and the adapter state is rechecked in case it changed while
> inside of scsi_execute(). The state check will wait if the adapter is
> still being recovered or returns a failure if the recovery failed. In
> the event that the adapter reset failed, the failure is simply returned
> as the ioctl would be unable to continue.
>
> Reported-by: Brian King 
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Daniel Axtens 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 12/37] cxlflash: Fix to avoid spamming the kernel log

[Tomas Henzl]

On 21.10.2015 22:13, Matthew R. Ochs wrote:
> During run-time the driver can be very chatty and spam the system
> kernel log. Various print statements can be limited and/or moved
> to development-only mode. Additionally, numerous prints can be
> converted to trace the corresponding device. Lastly, one spelling
> correction was made: 'entra' to 'extra'.
>
> The following changes were made:
>  - pr_debug to pr_devel
>  - pr_debug to pr_debug_ratelimited
>  - pr_err to dev_err
>  - pr_debug to dev_dbg
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Andrew Donnellan 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 17/37] cxlflash: Remove dual port online dependency

[Tomas Henzl]

On 21.10.2015 22:13, Matthew R. Ochs wrote:
> At present, both ports must be online for the device to
> configure properly. Remove this dependency and the unnecessary
> internal LUN override logic as well. Additionally, as a refactoring
> measure, change the return code variable name to match that used
> throughout the driver.
>
> With this change, the card will be able to configure even when the
> link is down. At some later point when the link is transitioned to
> 'up', a link state change interrupt will trigger the port configuration.
> Note that despite its void-like behavior, the function was left with a
> return code for right now in case its behavior needs to be altered again
> in the near future based on testing.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Daniel Axtens 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 20/37] cxlflash: Fix to prevent workq from accessing freed memory

[Tomas Henzl]

On 21.10.2015 22:14, Matthew R. Ochs wrote:
> The workq can process work in parallel with a remove event, leading
> to a condition where the workq handler can access freed memory.
>
> To remedy, the workq should be terminated prior to freeing memory. Move
> the termination call earlier in remove and use cancel_work_sync() instead
> of flush_work() as there is not a need to process any scheduled work when
> shutting down.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 24/37] cxlflash: Fix MMIO and endianness errors

[Tomas Henzl]

On 21.10.2015 22:14, Matthew R. Ochs wrote:
> Sparse uncovered several errors with MMIO operations (accessing
> directly) and handling endianness. These can cause issues when
> running in different environments.
>
> Introduce __iomem and proper endianness tags/swaps where
> appropriate to make driver sparse clean.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Andrew Donnellan 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 30/37] cxlflash: Fix to avoid corrupting adapter fops

[Tomas Henzl]

On 21.10.2015 22:15, Matthew R. Ochs wrote:
> The fops owned by the adapter can be corrupted in certain scenarios,
> opening a window where certain fops are temporarily NULLed before being
> reset to their proper value. This can potentially lead software to make
> incorrect decisions, leaving the user with the inability to function as
> intended.
>
> An example of this behavior can be observed when there are a number of
> users with a high rate of turn around (attach to LUN, perform an I/O,
> detach from LUN, repeat). Every so often a user is given a valid
> context and adapter file descriptor, but the file associated with the
> descriptor lacks the correct read permission bit (FMODE_CAN_READ) and
> thus the read system call bails before calling the valid read fop.
>
> Background:
>
> The fops is stored in the adapter structure to provide the ability to
> lookup the adapter structure from within the fop handler. CXL services
> use the file's private_data and at present, the CXL context does not
> have a private section. In an effort to limit areas of the cxlflash
> driver with code specific the superpipe function, a design choice was
> made to keep the details of the fops situated away from the legacy
> portions of the driver. This drove the behavior that the adapter fops
> is set at the beginning of the disk attach ioctl handler when there
> are no users present.
>
> The corruption that this fix remedies is due to the fact that the fops
> is initially defaulted to values found within a static structure. When
> the fops is handed down to the CXL services later in the attach path,
> certain services are patched. The fops structure remains correct until
> the user count drops to 0 and the fops is reset, triggering the process
> to repeat again. The user counts are tightly coupled with the creation
> and deletion of the user context. If multiple users perform a disk
> attach at the same time, when the user count is currently 0, some users
> can be in the middle of obtaining a file descriptor and have not yet
> reached the context creation code that [in addition to creating the
> context] increments the user count. Subsequent users coming in to
> perform the attach see that the user count is still 0, and reinitialize
> the fops, temporarily removing the patched fops. The users that are in
> the middle obtaining their file descriptor may then receive an invalid
> descriptor.
>
> The fix simply removes the user count altogether and moves the fops
> initialization to probe time such that it is only performed one time
> for the life of the adapter. In the future, if the CXL services adopt
> a private member for their context, that could be used to store the
> adapter structure reference and cxlflash could revert to a model that
> does not require an embedded fops.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Andrew Donnellan 
> Reviewed-by: Daniel Axtens 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 33/37] cxlflash: Fix to avoid leaving dangling interrupt resources

[Tomas Henzl]

On 21.10.2015 22:16, Matthew R. Ochs wrote:
> When running with an unsupported AFU, the cxlflash driver fails
> the probe. When the driver is removed, the following Oops is
> encountered on a show_interrupts() thread:
>
> Call Trace:
> [c01fba5a7a10] [0003] 0x3 (unreliable)
> [c01fba5a7a60] [c053dcf4] vsnprintf+0x204/0x4c0
> [c01fba5a7ae0] [c030045c] seq_vprintf+0x5c/0xd0
> [c01fba5a7b20] [c030051c] seq_printf+0x4c/0x60
> [c01fba5a7b50] [c013e140] show_interrupts+0x370/0x4f0
> [c01fba5a7c10] [c02ff898] seq_read+0xe8/0x530
> [c01fba5a7ca0] [c035d5c0] proc_reg_read+0xb0/0x110
> [c01fba5a7cf0] [c02ca74c] __vfs_read+0x6c/0x180
> [c01fba5a7d90] [c02cb464] vfs_read+0xa4/0x1c0
> [c01fba5a7de0] [c02cc51c] SyS_read+0x6c/0x110
> [c01fba5a7e30] [c0009204] system_call+0x38/0xb4
>
> The Oops is due to not cleaning up correctly on the unsupported
> AFU error path, leaving various allocated and registered resources.
> In this case, interrupts are in a semi-allocated/registered state,
> which the show_interrupts() thread attempts to use.
>
> To fix, the cleanup logic in init_afu() is consolidated to error
> gates at the bottom of the function and the appropriate goto is
> added to each error path. As a mini side fix while refactoring
> in this routine, the else statement following the AFU version
> evaluation is eliminated as it is not needed.
>
> Signed-off-by: Matthew R. Ochs 
> Acked-by: Manoj Kumar 
> Reviewed-by: Andrew Donnellan 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 13/37] cxlflash: Fix to avoid stall while waiting on TMF

[Tomas Henzl]

On 21.10.2015 22:13, Matthew R. Ochs wrote:
> Borrowing the TMF waitq's spinlock causes a stall condition when
> waiting for the TMF to complete. To remedy, introduce our own spin
> lock to serialize TMF and use the appropriate wait services.
>
> Also add a timeout while waiting for a TMF completion. When a TMF
> times out, report back a failure such that a bigger hammer reset
> can occur.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 27/37] cxlflash: Fix to prevent stale AFU RRQ

[Tomas Henzl]

On 21.10.2015 22:15, Matthew R. Ochs wrote:
> Following an adapter reset, the AFU RRQ that resides in host memory
> holds stale data. This can lead to a condition where the RRQ interrupt
> handler tries to process stale entries and/or endlessly loops due to an
> out of sync generation bit.
>
> To fix, the AFU RRQ in host memory needs to be cleared after each reset.
>
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Daniel Axtens 

Reviewed-by: Tomas Henzl 

Tomas

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Re: [PATCH v6 31/37] cxlflash: Correct trace string

[Tomas Henzl]

On 21.10.2015 22:15, Matthew R. Ochs wrote:
> The trace following the failure of alloc_mem() incorrectly identifies
> which function failed. This can lead to misdiagnosing a failure.
>
> Fix the string to correctly indicate that alloc_mem() failed.
>
> Reported-by: Brian King 
> Signed-off-by: Matthew R. Ochs 
> Signed-off-by: Manoj N. Kumar 
> Reviewed-by: Brian King 
> Reviewed-by: Andrew Donnellan 

Reviewed-by: Tomas Henzl 

Tomas

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[PATCH] powerpc/pseries: Verify CPU doesn't exist before adding

[Nathan Fontenot]

When DLPAR adding a CPU we should verify that the CPU does not already
exist. Failure to do so can generate a kernel oops;

[9.465585] kernel BUG at arch/powerpc/platforms/pseries/dlpar.c:382!
[9.465796] Oops: Exception in kernel mode, sig: 5 [#1]

This oops can be generated by causing a probe to be performed on a cpu
by writing to the sysfs cpu probe file (/sys/devices/system/cpu/probe).
This patch adds a check for the existence of cpu prior to probing the cpu
so userspace doing the wrong thing won't trigger a BUG_ON().

Signed-off-by: Nathan Fontenot 
---
 arch/powerpc/platforms/pseries/dlpar.c |   43 +---
 1 file changed, 39 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/dlpar.c 
b/arch/powerpc/platforms/pseries/dlpar.c
index f244dcb..fe6320d 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -381,6 +381,32 @@ out:
 
 }
 
+static bool dlpar_cpu_exists(struct device_node *parent, u32 drc_index)
+{
+   struct device_node *child = NULL;
+   u32 my_drc_index;
+   bool found;
+   int rc;
+
+   /* Assume cpu doesn't exist */
+   found = false;
+
+   for_each_child_of_node(parent, child) {
+   rc = of_property_read_u32(child, "ibm,my-drc-index",
+ _drc_index);
+   if (rc)
+   continue;
+
+   if (my_drc_index == drc_index) {
+   of_node_put(child);
+   found = true;
+   break;
+   }
+   }
+
+   return found;
+}
+
 static ssize_t dlpar_cpu_probe(const char *buf, size_t count)
 {
struct device_node *dn, *parent;
@@ -391,14 +417,23 @@ static ssize_t dlpar_cpu_probe(const char *buf, size_t 
count)
if (rc)
return -EINVAL;
 
-   rc = dlpar_acquire_drc(drc_index);
-   if (rc)
-   return -EINVAL;
-
parent = of_find_node_by_path("/cpus");
if (!parent)
return -ENODEV;
 
+   if (dlpar_cpu_exists(parent, drc_index)) {
+   of_node_put(parent);
+   printk(KERN_WARNING "CPU with drc index %x already exists\n",
+  drc_index);
+   return -EINVAL;
+   }
+
+   rc = dlpar_acquire_drc(drc_index);
+   if (rc) {
+   of_node_put(parent);
+   return -EINVAL;
+   }
+
dn = dlpar_configure_connector(cpu_to_be32(drc_index), parent);
of_node_put(parent);
if (!dn) {

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Re: [PATCH V4 00/31] powerpc/mm: Update page table format for book3s 64

[Denis Kirjanov]

On 10/23/15, Aneesh Kumar K.V  wrote:
> Denis Kirjanov  writes:
>
>> On 10/17/15, Aneesh Kumar K.V  wrote:
>>> Hi All,
>>>
>>> This patch series attempt to update book3s 64 linux page table format to
>>> make it more flexible. Our current pte format is very restrictive and we
>>> overload multiple pte bits. This is due to the non-availability of free
>>> bits
>>> in pte_t. We use pte_t to track the validity of 4K subpages. This patch
>>> series free up pte_t of 11 bits by moving 4K subpage tracking to the
>>> lower half of PTE page. The pte format is updated such that we have a
>>> better method for identifying a pte entry at pmd level. This will also
>>> enable
>>> us to implement hugetlb migration(not yet done in this series).
>>
>> Hi, what tree does this apply to?
>>
>
> linux-powerpc tree -next branch
>
> https://git.kernel.org/cgit/linux/kernel/git/powerpc/linux.git/

Ok, but I'm getting the following error after applying the first patch
from your series:

error: patch failed: arch/powerpc/include/asm/pgalloc-64.h:166
error: arch/powerpc/include/asm/pgalloc-64.h: patch does not apply
error: arch/powerpc/mm/hash64_64k.c: No such file or directory

kda@hydra ~/devel/linux $ git branch
  master
* next
kda@hydra ~/devel/linux $ git remote show origin
* remote origin
  Fetch URL: git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
  Push  URL: git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git

Or am I missing something?

>
> -aneesh
>
>
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Re: [PATCH] powerpc/eeh: eeh_pci_enable(): fix checking of post-request state

[Gavin Shan]

On Fri, Oct 23, 2015 at 05:19:46PM +1100, Andrew Donnellan wrote:
>In eeh_pci_enable(), after making the request to set the new options, we
>call eeh_ops->wait_state() to check that the request finished successfully.
>
>At the moment, if eeh_ops->wait_state() returns 0, we return 0 without
>checking that it reflects the expected outcome. This can lead to callers
>further up the chain incorrectly assuming the slot has been successfully
>unfrozen and continuing to attempt recovery.
>
>On powernv, this will occur if pnv_eeh_get_pe_state() or
>pnv_eeh_get_phb_state() return 0, which in turn occurs if the relevant OPAL
>call returns OPAL_EEH_STOPPED_MMIO_DMA_FREEZE or
>OPAL_EEH_PHB_ERROR respectively.
>
>On pseries, this will occur if pseries_eeh_get_state() returns 0, which in
>turn occurs if RTAS reports that the PE is in the MMIO Stopped and DMA
>Stopped states.
>
>Obviously, none of these cases represent a successful completion of a
>request to thaw MMIO or DMA.
>
>Fix the check so that a wait_state() return value of 0 won't be considered
>successful for the EEH_OPT_THAW_MMIO or EEH_OPT_THAW_DMA cases.
>
>Cc: Gavin Shan 
>Signed-off-by: Andrew Donnellan 

Acked-by: Gavin Shan 

Thanks,
Gavin

>---
> arch/powerpc/kernel/eeh.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
>index 40e4d4a..d757e7c 100644
>--- a/arch/powerpc/kernel/eeh.c
>+++ b/arch/powerpc/kernel/eeh.c
>@@ -677,7 +677,7 @@ int eeh_pci_enable(struct eeh_pe *pe, int function)
>   /* Check if the request is finished successfully */
>   if (active_flag) {
>   rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
>-  if (rc <= 0)
>+  if (rc < 0)
>   return rc;
>
>   if (rc & active_flag)
>-- 
>Andrew Donnellan  Software Engineer, OzLabs
>andrew.donnel...@au1.ibm.com  Australia Development Lab, Canberra
>+61 2 6201 8874 (work)IBM Australia Limited
>

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Re: [PATCH V4 00/31] powerpc/mm: Update page table format for book3s 64

[Aneesh Kumar K.V]

Denis Kirjanov  writes:

> On 10/17/15, Aneesh Kumar K.V  wrote:
>> Hi All,
>>
>> This patch series attempt to update book3s 64 linux page table format to
>> make it more flexible. Our current pte format is very restrictive and we
>> overload multiple pte bits. This is due to the non-availability of free bits
>> in pte_t. We use pte_t to track the validity of 4K subpages. This patch
>> series free up pte_t of 11 bits by moving 4K subpage tracking to the
>> lower half of PTE page. The pte format is updated such that we have a
>> better method for identifying a pte entry at pmd level. This will also
>> enable
>> us to implement hugetlb migration(not yet done in this series).
>
> Hi, what tree does this apply to?
>

linux-powerpc tree -next branch

https://git.kernel.org/cgit/linux/kernel/git/powerpc/linux.git/

-aneesh

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[PATCH] powerpc/eeh: eeh_pci_enable(): fix checking of post-request state

[Andrew Donnellan]

In eeh_pci_enable(), after making the request to set the new options, we
call eeh_ops->wait_state() to check that the request finished successfully.

At the moment, if eeh_ops->wait_state() returns 0, we return 0 without
checking that it reflects the expected outcome. This can lead to callers
further up the chain incorrectly assuming the slot has been successfully
unfrozen and continuing to attempt recovery.

On powernv, this will occur if pnv_eeh_get_pe_state() or
pnv_eeh_get_phb_state() return 0, which in turn occurs if the relevant OPAL
call returns OPAL_EEH_STOPPED_MMIO_DMA_FREEZE or
OPAL_EEH_PHB_ERROR respectively.

On pseries, this will occur if pseries_eeh_get_state() returns 0, which in
turn occurs if RTAS reports that the PE is in the MMIO Stopped and DMA
Stopped states.

Obviously, none of these cases represent a successful completion of a
request to thaw MMIO or DMA.

Fix the check so that a wait_state() return value of 0 won't be considered
successful for the EEH_OPT_THAW_MMIO or EEH_OPT_THAW_DMA cases.

Cc: Gavin Shan 
Signed-off-by: Andrew Donnellan 
---
 arch/powerpc/kernel/eeh.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 40e4d4a..d757e7c 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -677,7 +677,7 @@ int eeh_pci_enable(struct eeh_pe *pe, int function)
/* Check if the request is finished successfully */
if (active_flag) {
rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
-   if (rc <= 0)
+   if (rc < 0)
return rc;
 
if (rc & active_flag)
-- 
Andrew Donnellan  Software Engineer, OzLabs
andrew.donnel...@au1.ibm.com  Australia Development Lab, Canberra
+61 2 6201 8874 (work)IBM Australia Limited

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[PATCH 0/5 v3] Fix NVMe driver support on Power with 32-bit DMA

[Nishanth Aravamudan]

We received a bug report recently when DDW (64-bit direct DMA on Power)
is not enabled for NVMe devices. In that case, we fall back to 32-bit
DMA via the IOMMU, which is always done via 4K TCEs (Translation Control
Entries).

The NVMe device driver, though, assumes that the DMA alignment for the
PRP entries will match the device's page size, and that the DMA aligment
matches the kernel's page aligment. On Power, the the IOMMU page size,
as mentioned above, can be 4K, while the device can have a page size of
8K, while the kernel has a page size of 64K. This eventually trips the
BUG_ON in nvme_setup_prps(), as we have a 'dma_len' that is a multiple
of 4K but not 8K (e.g., 0xF000).

In this particular case, and generally, we want to use the IOMMU's page
size for the default device page size, rather than the kernel's page
size.

This series consists of five patches:

1) add a generic dma_get_page_shift implementation that just returns
PAGE_SHIFT
2) override the generic implementation on Power to use the IOMMU table's
page shift if available
3) allow further specific overriding on power with machdep platform
overrides
4) use the machdep override on pseries, as the DDW code puts the TCE
shift in a special property and there is no IOMMU table available
5) move some sparc code around to make IOMMU_PAGE_SHIFT available in
include/asm
6) override the generic implementation on sparce to use IOMMU_PAGE_SHIFT
7) leverage the new API in the NVMe driver

With these patches, a NVMe device survives our internal hardware
exerciser; the kernel BUGs within a few seconds without the patch.

 arch/powerpc/include/asm/dma-mapping.h |  3 +++
 arch/powerpc/include/asm/machdep.h |  3 ++-
 arch/powerpc/kernel/dma.c  | 11 +++
 arch/powerpc/platforms/pseries/iommu.c | 36 

 arch/sparc/include/asm/dma-mapping.h   |  8 
 arch/sparc/include/asm/iommu_common.h  | 51 
+++
 arch/sparc/kernel/iommu.c  |  2 +-
 arch/sparc/kernel/iommu_common.h   | 51 
---
 arch/sparc/kernel/pci_psycho.c |  2 +-
 arch/sparc/kernel/pci_sabre.c  |  2 +-
 arch/sparc/kernel/pci_schizo.c |  2 +-
 arch/sparc/kernel/pci_sun4v.c  |  2 +-
 arch/sparc/kernel/psycho_common.c  |  2 +-
 arch/sparc/kernel/sbus.c   |  3 +--
 drivers/block/nvme-core.c  |  3 ++-
 include/linux/dma-mapping.h|  7 +++
 16 files changed, 127 insertions(+), 61 deletions(-)

v1 -> v2:
  Based upon feedback from Christoph Hellwig, rather than using an
  arch-specific hack, expose the DMA page shift via a generic DMA API and
  override it on Power as needed.
v2 -> v3:
  Based upon feedback from Christoph Hellwig, put the generic
  implementation in include/linux/dma-mapping.h, since not all archs use
  include/asm-generic/dma-mapping-common.h.
  Add sparc implementation, as that arch seems to have a different IOMMU
  page size.

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Re: [PATCH v12 4/6] QE/CPM: move muram management functions to qe_common

[Scott Wood]

On Fri, 2015-10-23 at 02:45 -0500, Zhao Qiang-B45475 wrote:
> On Fri, 2015-10-23 at 11:10 AM, Wood Scott-B07421  
> wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, October 23, 2015 11:10 AM
> > To: Zhao Qiang-B45475 
> > Cc: linux-ker...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> > lau...@codeaurora.org; Xie Xiaobo-R63061 ;
> > b...@kernel.crashing.org; Li Yang-Leo-R58472 ;
> > pau...@samba.org
> > Subject: Re: [PATCH v12 4/6] QE/CPM: move muram management functions to
> > qe_common
> > 
> > On Wed, 2015-10-14 at 15:16 +0800, Zhao Qiang wrote:
> > > QE and CPM have the same muram, they use the same management
> > > functions. Now QE support both ARM and PowerPC, it is necessary to
> > > move QE to "driver/soc", so move the muram management functions from
> > > cpm_common to qe_common for preparing to move QE code to "driver/soc"
> > > 
> > > Signed-off-by: Zhao Qiang 
> > > ---
> > > Changes for v2:
> > >   - no changes
> > > Changes for v3:
> > >   - no changes
> > > Changes for v4:
> > >   - no changes
> > > Changes for v5:
> > >   - no changes
> > > Changes for v6:
> > >   - using genalloc instead rheap to manage QE MURAM
> > >   - remove qe_reset from platform file, using
> > >   - subsys_initcall to call qe_init function.
> > > Changes for v7:
> > >   - move this patch from 3/3 to 2/3
> > >   - convert cpm with genalloc
> > >   - check for gen_pool allocation failure Changes for v8:
> > >   - rebase
> > >   - move BD_SC_* macro instead of copy Changes for v9:
> > >   - doesn't modify CPM, add a new patch to modify.
> > >   - rebase
> > > Changes for v10:
> > >   - rebase
> > > Changes for v11:
> > >   - remove renaming
> > >   - delete removing qe_reset and delete adding qe_init.
> > > Changes for v12:
> > >   - SPI_FSL_CPM depends on QE-MURAM, select QUICC_ENGINE for it.
> > 
> > Why is the SPI change part of this patch?  Why is it even part of this 
> > patchset,
> > rather than an independent patch sent to the SPI list and maintainer?  If 
> > it's tied
> > to other changes you're making, explain that.  As is, there is zero 
> > mention of
> > the SPI change in the part of the e-mail that will become the git 
> > changelog.
> > 
> This SPI_FSL_CPM is cpm-spi, it is part of CPM.

So then why are you selecting QUICC_ENGINE?  And again, what does it have to 
do with this patch?

-Scott

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Re: [PATCH 0/5 v3] Fix NVMe driver support on Power with 32-bit DMA

[Nishanth Aravamudan]

[Sorry, subject should have been 0/7!]

On 23.10.2015 [13:54:20 -0700], Nishanth Aravamudan wrote:
> We received a bug report recently when DDW (64-bit direct DMA on Power)
> is not enabled for NVMe devices. In that case, we fall back to 32-bit
> DMA via the IOMMU, which is always done via 4K TCEs (Translation Control
> Entries).
> 
> The NVMe device driver, though, assumes that the DMA alignment for the
> PRP entries will match the device's page size, and that the DMA aligment
> matches the kernel's page aligment. On Power, the the IOMMU page size,
> as mentioned above, can be 4K, while the device can have a page size of
> 8K, while the kernel has a page size of 64K. This eventually trips the
> BUG_ON in nvme_setup_prps(), as we have a 'dma_len' that is a multiple
> of 4K but not 8K (e.g., 0xF000).
> 
> In this particular case, and generally, we want to use the IOMMU's page
> size for the default device page size, rather than the kernel's page
> size.
> 
> This series consists of five patches:
> 
> 1) add a generic dma_get_page_shift implementation that just returns
> PAGE_SHIFT
> 2) override the generic implementation on Power to use the IOMMU table's
> page shift if available
> 3) allow further specific overriding on power with machdep platform
> overrides
> 4) use the machdep override on pseries, as the DDW code puts the TCE
> shift in a special property and there is no IOMMU table available
> 5) move some sparc code around to make IOMMU_PAGE_SHIFT available in
> include/asm
> 6) override the generic implementation on sparce to use IOMMU_PAGE_SHIFT
> 7) leverage the new API in the NVMe driver
> 
> With these patches, a NVMe device survives our internal hardware
> exerciser; the kernel BUGs within a few seconds without the patch.
> 
>  arch/powerpc/include/asm/dma-mapping.h |  3 +++
>  arch/powerpc/include/asm/machdep.h |  3 ++-
>  arch/powerpc/kernel/dma.c  | 11 +++
>  arch/powerpc/platforms/pseries/iommu.c | 36 
> 
>  arch/sparc/include/asm/dma-mapping.h   |  8 
>  arch/sparc/include/asm/iommu_common.h  | 51 
> +++
>  arch/sparc/kernel/iommu.c  |  2 +-
>  arch/sparc/kernel/iommu_common.h   | 51 
> ---
>  arch/sparc/kernel/pci_psycho.c |  2 +-
>  arch/sparc/kernel/pci_sabre.c  |  2 +-
>  arch/sparc/kernel/pci_schizo.c |  2 +-
>  arch/sparc/kernel/pci_sun4v.c  |  2 +-
>  arch/sparc/kernel/psycho_common.c  |  2 +-
>  arch/sparc/kernel/sbus.c   |  3 +--
>  drivers/block/nvme-core.c  |  3 ++-
>  include/linux/dma-mapping.h|  7 +++
>  16 files changed, 127 insertions(+), 61 deletions(-)
> 
> v1 -> v2:
>   Based upon feedback from Christoph Hellwig, rather than using an
>   arch-specific hack, expose the DMA page shift via a generic DMA API and
>   override it on Power as needed.
> v2 -> v3:
>   Based upon feedback from Christoph Hellwig, put the generic
>   implementation in include/linux/dma-mapping.h, since not all archs use
>   include/asm-generic/dma-mapping-common.h.
>   Add sparc implementation, as that arch seems to have a different IOMMU
>   page size.

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[PATCH 7/7 v2] drivers/nvme: default to the IOMMU page size

[Nishanth Aravamudan]

We received a bug report recently when DDW (64-bit direct DMA on Power)
is not enabled for NVMe devices. In that case, we fall back to 32-bit
DMA via the IOMMU, which is always done via 4K TCEs (Translation Control
Entries).

The NVMe device driver, though, assumes that the DMA alignment for the
PRP entries will match the device's page size, and that the DMA aligment
matches the kernel's page aligment. On Power, the the IOMMU page size,
as mentioned above, can be 4K, while the device can have a page size of
8K, while the kernel has a page size of 64K. This eventually trips the
BUG_ON in nvme_setup_prps(), as we have a 'dma_len' that is a multiple
of 4K but not 8K (e.g., 0xF000).

In this particular case of page sizes, we clearly want to use the
IOMMU's page size in the driver. And generally, the NVMe driver in this
function should be using the IOMMU's page size for the default device
page size, rather than the kernel's page size.

With this patch, a NVMe device survives our internal hardware
exerciser; the kernel BUGs within a few seconds without the patch.

Signed-off-by: Nishanth Aravamudan 

---
v1 -> v2:
  Based upon feedback from Christoph Hellwig, implement the IOMMU page
  size lookup as a generic DMA API, rather than an architecture-specific
  hack.

 drivers/block/nvme-core.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/block/nvme-core.c b/drivers/block/nvme-core.c
index 6f04771..5a79106 100644
--- a/drivers/block/nvme-core.c
+++ b/drivers/block/nvme-core.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1711,7 +1712,7 @@ static int nvme_configure_admin_queue(struct nvme_dev 
*dev)
u32 aqa;
u64 cap = readq(>bar->cap);
struct nvme_queue *nvmeq;
-   unsigned page_shift = PAGE_SHIFT;
+   unsigned page_shift = dma_get_page_shift(dev->dev);
unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
 
-- 
1.9.1

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Re: [PATCH v12 6/6] QE: Move QE from arch/powerpc to drivers/soc

[Scott Wood]

On Fri, 2015-10-23 at 02:49 -0500, Zhao Qiang-B45475 wrote:
> On Fri, Oct 23, 2015 at 11:20 AM, Wood Scott-B07421  > wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, October 23, 2015 11:20 AM
> > To: Zhao Qiang-B45475 
> > Cc: linux-ker...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> > lau...@codeaurora.org; Xie Xiaobo-R63061 ;
> > b...@kernel.crashing.org; Li Yang-Leo-R58472 ;
> > pau...@samba.org
> > Subject: Re: [PATCH v12 6/6] QE: Move QE from arch/powerpc to drivers/soc
> > 
> > On Wed, Oct 14, 2015 at 03:16:08PM +0800, Zhao Qiang wrote:
> > 
> > 
> > > diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig
> > > b/drivers/soc/fsl/qe/Kconfig similarity index 50% copy from
> > > arch/powerpc/sysdev/qe_lib/Kconfig
> > > copy to drivers/soc/fsl/qe/Kconfig
> > > index 3c25199..283fe0d 100644
> > > --- a/arch/powerpc/sysdev/qe_lib/Kconfig
> > > +++ b/drivers/soc/fsl/qe/Kconfig
> > > @@ -2,6 +2,17 @@
> > >  # QE Communication options
> > >  #
> > > 
> > > +config QUICC_ENGINE
> > > + bool "Freescale QUICC Engine (QE) Support"
> > > + depends on FSL_SOC && PPC32
> > > + select GENERIC_ALLOCATOR
> > > + select CRC32
> > > + help
> > > +   The QUICC Engine (QE) is a new generation of communications
> > > +   coprocessors on Freescale embedded CPUs (akin to CPM in older
> > chips).
> > > +   Selecting this option means that you wish to build a kernel
> > > +   for a machine with a QE coprocessor.
> > > +
> > >  config UCC_SLOW
> > >   bool
> > >   default y if SERIAL_QE
> > > @@ -19,9 +30,3 @@ config UCC_FAST
> > >  config UCC
> > >   bool
> > >   default y if UCC_FAST || UCC_SLOW
> > > -
> > > -config QE_USB
> > > - bool
> > > - default y if USB_FSL_QE
> > > - help
> > > -   QE USB Controller support
> > 
> > Why did some config symbols get moved and others not?
> 
> Because QE_USB should be putted under drivers/usb,
> It is independent of this patchset.

If it's independent of this patchset then don't put it in this patchset.  
Move all the QE stuff to drivers/soc and then later if something belongs 
somewhere else, have a separate patch move it there.

-Scott

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[PATCH 2/7 v2] powerpc/dma-mapping: override dma_get_page_shift

[Nishanth Aravamudan]

On Power, the kernel's page size can differ from the IOMMU's page size,
so we need to override the generic implementation, which always returns
the kernel's page size. Lookup the IOMMU's page size from struct
iommu_table, if available. Fallback to the kernel's page size,
otherwise.

Signed-off-by: Nishanth Aravamudan 
---
 arch/powerpc/include/asm/dma-mapping.h | 3 +++
 arch/powerpc/kernel/dma.c  | 9 +
 2 files changed, 12 insertions(+)

diff --git a/arch/powerpc/include/asm/dma-mapping.h 
b/arch/powerpc/include/asm/dma-mapping.h
index 7f522c0..c5638f4 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -125,6 +125,9 @@ static inline void set_dma_offset(struct device *dev, 
dma_addr_t off)
 #define HAVE_ARCH_DMA_SET_MASK 1
 extern int dma_set_mask(struct device *dev, u64 dma_mask);
 
+#define HAVE_ARCH_DMA_GET_PAGE_SHIFT 1
+extern unsigned long dma_get_page_shift(struct device *dev);
+
 #include 
 
 extern int __dma_set_mask(struct device *dev, u64 dma_mask);
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 59503ed..e805af2 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -335,6 +335,15 @@ int dma_set_mask(struct device *dev, u64 dma_mask)
 }
 EXPORT_SYMBOL(dma_set_mask);
 
+unsigned long dma_get_page_shift(struct device *dev)
+{
+   struct iommu_table *tbl = get_iommu_table_base(dev);
+   if (tbl)
+   return tbl->it_page_shift;
+   return PAGE_SHIFT;
+}
+EXPORT_SYMBOL(dma_get_page_shift);
+
 u64 __dma_get_required_mask(struct device *dev)
 {
struct dma_map_ops *dma_ops = get_dma_ops(dev);
-- 
1.9.1

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Re: [PATCH 5/7] [RFC PATCH 5/7] sparc: rename kernel/iommu_common.h -> include/asm/iommu_common.h

[Nishanth Aravamudan]

[Apologies for the subject line, should just have the [RFC PATCH 5/7]]

On 23.10.2015 [14:00:08 -0700], Nishanth Aravamudan wrote:
> In order to cleanly expose the desired IOMMU page shift via the new
> dma_get_page_shift API, we need to have the sparc constants available in
> a more typical location. There should be no functional impact to this
> move, but it is untested.
> 
> Signed-off-by: Nishanth Aravamudan 
> ---
>  arch/sparc/include/asm/iommu_common.h | 51 
> +++
>  arch/sparc/kernel/iommu.c |  2 +-
>  arch/sparc/kernel/iommu_common.h  | 51 
> ---
>  arch/sparc/kernel/pci_psycho.c|  2 +-
>  arch/sparc/kernel/pci_sabre.c |  2 +-
>  arch/sparc/kernel/pci_schizo.c|  2 +-
>  arch/sparc/kernel/pci_sun4v.c |  2 +-
>  arch/sparc/kernel/psycho_common.c |  2 +-
>  arch/sparc/kernel/sbus.c  |  3 +--
>  9 files changed, 58 insertions(+), 59 deletions(-)
>  create mode 100644 arch/sparc/include/asm/iommu_common.h
>  delete mode 100644 arch/sparc/kernel/iommu_common.h
> 
> diff --git a/arch/sparc/include/asm/iommu_common.h 
> b/arch/sparc/include/asm/iommu_common.h
> new file mode 100644
> index 000..b40cec2
> --- /dev/null
> +++ b/arch/sparc/include/asm/iommu_common.h
> @@ -0,0 +1,51 @@
> +/* iommu_common.h: UltraSparc SBUS/PCI common iommu declarations.
> + *
> + * Copyright (C) 1999, 2008 David S. Miller (da...@davemloft.net)
> + */
> +
> +#ifndef _IOMMU_COMMON_H
> +#define _IOMMU_COMMON_H
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +/*
> + * These give mapping size of each iommu pte/tlb.
> + */
> +#define IO_PAGE_SHIFT13
> +#define IO_PAGE_SIZE (1UL << IO_PAGE_SHIFT)
> +#define IO_PAGE_MASK (~(IO_PAGE_SIZE-1))
> +#define IO_PAGE_ALIGN(addr)  ALIGN(addr, IO_PAGE_SIZE)
> +
> +#define IO_TSB_ENTRIES   (128*1024)
> +#define IO_TSB_SIZE  (IO_TSB_ENTRIES * 8)
> +
> +/*
> + * This is the hardwired shift in the iotlb tag/data parts.
> + */
> +#define IOMMU_PAGE_SHIFT 13
> +
> +#define SG_ENT_PHYS_ADDRESS(SG)  (__pa(sg_virt((SG
> +
> +static inline int is_span_boundary(unsigned long entry,
> +unsigned long shift,
> +unsigned long boundary_size,
> +struct scatterlist *outs,
> +struct scatterlist *sg)
> +{
> + unsigned long paddr = SG_ENT_PHYS_ADDRESS(outs);
> + int nr = iommu_num_pages(paddr, outs->dma_length + sg->length,
> +  IO_PAGE_SIZE);
> +
> + return iommu_is_span_boundary(entry, nr, shift, boundary_size);
> +}
> +
> +#endif /* _IOMMU_COMMON_H */
> diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c
> index 5320689..f9b6077 100644
> --- a/arch/sparc/kernel/iommu.c
> +++ b/arch/sparc/kernel/iommu.c
> @@ -20,8 +20,8 @@
>  #endif
>  
>  #include 
> +#include 
>  
> -#include "iommu_common.h"
>  #include "kernel.h"
>  
>  #define STC_CTXMATCH_ADDR(STC, CTX)  \
> diff --git a/arch/sparc/kernel/iommu_common.h 
> b/arch/sparc/kernel/iommu_common.h
> deleted file mode 100644
> index b40cec2..000
> --- a/arch/sparc/kernel/iommu_common.h
> +++ /dev/null
> @@ -1,51 +0,0 @@
> -/* iommu_common.h: UltraSparc SBUS/PCI common iommu declarations.
> - *
> - * Copyright (C) 1999, 2008 David S. Miller (da...@davemloft.net)
> - */
> -
> -#ifndef _IOMMU_COMMON_H
> -#define _IOMMU_COMMON_H
> -
> -#include 
> -#include 
> -#include 
> -#include 
> -#include 
> -#include 
> -#include 
> -#include 
> -
> -#include 
> -
> -/*
> - * These give mapping size of each iommu pte/tlb.
> - */
> -#define IO_PAGE_SHIFT13
> -#define IO_PAGE_SIZE (1UL << IO_PAGE_SHIFT)
> -#define IO_PAGE_MASK (~(IO_PAGE_SIZE-1))
> -#define IO_PAGE_ALIGN(addr)  ALIGN(addr, IO_PAGE_SIZE)
> -
> -#define IO_TSB_ENTRIES   (128*1024)
> -#define IO_TSB_SIZE  (IO_TSB_ENTRIES * 8)
> -
> -/*
> - * This is the hardwired shift in the iotlb tag/data parts.
> - */
> -#define IOMMU_PAGE_SHIFT 13
> -
> -#define SG_ENT_PHYS_ADDRESS(SG)  (__pa(sg_virt((SG
> -
> -static inline int is_span_boundary(unsigned long entry,
> -unsigned long shift,
> -unsigned long boundary_size,
> -struct scatterlist *outs,
> -struct scatterlist *sg)
> -{
> - unsigned long paddr = SG_ENT_PHYS_ADDRESS(outs);
> - int nr = iommu_num_pages(paddr, outs->dma_length + sg->length,
> -  IO_PAGE_SIZE);
> -
> - return iommu_is_span_boundary(entry, nr, shift, boundary_size);
> -}
> -
> -#endif 

[PATCH 3/7 v2] powerpc/dma: implement per-platform dma_get_page_shift

[Nishanth Aravamudan]

The IOMMU page size is not always stored in struct iommu on Power.
Specifically if a device is configured for DDW (Dynamic DMA Windows aka.
64-bit direct DMA), the used TCE (Translation Control Entry) size is
stored in a special device property created at run-time by the DDW
configuration code. DDW is a pseries-specific feature, so allow
platforms to override the implementation of dma_get_page_shift if
desired.

Signed-off-by: Nishanth Aravamudan 
---
 arch/powerpc/include/asm/machdep.h | 3 ++-
 arch/powerpc/kernel/dma.c  | 2 ++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/machdep.h 
b/arch/powerpc/include/asm/machdep.h
index 3f191f5..9dd03cf 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -83,9 +83,10 @@ struct machdep_calls {
 #endif
 #endif /* CONFIG_PPC64 */
 
-   /* Platform set_dma_mask and dma_get_required_mask overrides */
+   /* Platform overrides */
int (*dma_set_mask)(struct device *dev, u64 dma_mask);
u64 (*dma_get_required_mask)(struct device *dev);
+   unsigned long   (*dma_get_page_shift)(struct device *dev);
 
int (*probe)(void);
void(*setup_arch)(void); /* Optional, may be NULL */
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index e805af2..c363896 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -338,6 +338,8 @@ EXPORT_SYMBOL(dma_set_mask);
 unsigned long dma_get_page_shift(struct device *dev)
 {
struct iommu_table *tbl = get_iommu_table_base(dev);
+   if (ppc_md.dma_get_page_shift)
+   return ppc_md.dma_get_page_shift(dev);
if (tbl)
return tbl->it_page_shift;
return PAGE_SHIFT;
-- 
1.9.1

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[PATCH 1/7 v3] dma-mapping: add generic dma_get_page_shift API

[Nishanth Aravamudan]

Drivers like NVMe need to be able to determine the page size used for
DMA transfers. Add a new API that defaults to return PAGE_SHIFT on all
architectures.

Signed-off-by: Nishanth Aravamudan 

---
v1 -> v2:
  Based upon feedback from Christoph Hellwig, implement the IOMMU page
  size lookup as a generic DMA API, rather than an architecture-specific
  hack.
v2 -> v3:
  Based upon feedback from Christoph Hellwig that not all architectures
  have moved to dma-mapping-common.h, so move the #ifdef and default to
  linux/dma-mapping.h.
---
 include/linux/dma-mapping.h | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index ac07ff0..7eaba8d 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -95,6 +95,13 @@ static inline u64 dma_get_mask(struct device *dev)
return DMA_BIT_MASK(32);
 }
 
+#ifndef HAVE_ARCH_DMA_GET_PAGE_SHIFT
+static inline unsigned long dma_get_page_shift(struct device *dev)
+{
+   return PAGE_SHIFT;
+}
+#endif
+
 #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
 int dma_set_coherent_mask(struct device *dev, u64 mask);
 #else
-- 
1.9.1

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Re: [PATCH v12 3/6] CPM/QE: use genalloc to manage CPM/QE muram

[Scott Wood]

Don't send HTML e-mail.

On Fri, 2015-10-23 at 02:06 -0500, Zhao Qiang-B45475 wrote:
> On Fri, 2015-10-23 at 11:00 AM, Wood Scott-B07421  
> wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Friday, October 23, 2015 11:00 AM
> > To: Zhao Qiang-B45475 
> > Cc: linux-ker...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> > lau...@codeaurora.org; Xie Xiaobo-R63061 ;
> > b...@kernel.crashing.org; Li Yang-Leo-R58472 ;
> > pau...@samba.org
> > Subject: Re: [PATCH v12 3/6] CPM/QE: use genalloc to manage CPM/QE muram
> >
> > On Wed, 2015-10-14 at 15:16 +0800, Zhao Qiang wrote:
> > > -/**
> > > +/*
> > >   * cpm_muram_alloc - allocate the requested size worth of multi-user 
> ram
> > >   * @size: number of bytes to allocate
> > >   * @align: requested alignment, in bytes @@ -141,59 +151,102 @@ out:
> > >   */
> > >  unsigned long cpm_muram_alloc(unsigned long size, unsigned long
> > > align)  {
> > > - unsigned long start;
> > >   unsigned long flags;
> > > -
> > > + unsigned long start;
> > > + static struct genpool_data_align muram_pool_data;
> > >   spin_lock_irqsave(_muram_lock, flags);
> > > - cpm_muram_info.alignment = align;
> > > - start = rh_alloc(_muram_info, size, "commproc");
> > > - memset(cpm_muram_addr(start), 0, size);
> > > + muram_pool_data.align = align;
> > > + gen_pool_set_algo(muram_pool, gen_pool_first_fit_align,
> > > +   _pool_data);
> > > + start = cpm_muram_alloc_common(size, _pool_data);
> > >   spin_unlock_irqrestore(_muram_lock, flags);
> > > -
> > >   return start;
> > >  }
> > >  EXPORT_SYMBOL(cpm_muram_alloc);
> >
> > Why is muram_pool_data static?  Why is it being passed to
> > gen_pool_set_algo()? 
> Cpm_muram use both align algo and fixed algo, so we need to set 
> corresponding algo and
> Algo data.

The data gets passed in via gen_pool_alloc_data().  The point was to allow it 
to be on the caller's stack, not a long-lived data structure shared by all 
callers and needing synchronization.

> >The whole reason we're adding gen_pool_alloc_data()
> > is to avoid that.  Do we need gen_pool_alloc_algo() too?
>  
> We add gen_pool_alloc_data() to pass data to algo, because align algo and 
> fixed algo,
> Because align and fixed algos need specific data.

And my point is that because of that, it seems like we need a version that 
accepts an algorithm as well.

-Scott

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[PATCH 4/7 v2] pseries/iommu: implement DDW-aware dma_get_page_shift

[Nishanth Aravamudan]

When DDW (Dynamic DMA Windows) are present for a device, we have stored
the TCE (Translation Control Entry) size in a special device tree
property. Check if we have enabled DDW for the device and return the TCE
size from that property if present. If the property isn't present,
fallback to looking the value up in struct iommu_table. If we don't find
a iommu_table, fallback to the kernel's page size.

Signed-off-by: Nishanth Aravamudan 
---
 arch/powerpc/platforms/pseries/iommu.c | 36 ++
 1 file changed, 36 insertions(+)

diff --git a/arch/powerpc/platforms/pseries/iommu.c 
b/arch/powerpc/platforms/pseries/iommu.c
index 0946b98..1bf6471 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -1292,6 +1292,40 @@ static u64 dma_get_required_mask_pSeriesLP(struct device 
*dev)
return dma_iommu_ops.get_required_mask(dev);
 }
 
+static unsigned long dma_get_page_shift_pSeriesLP(struct device *dev)
+{
+   struct iommu_table *tbl;
+
+   if (!disable_ddw && dev_is_pci(dev)) {
+   struct pci_dev *pdev = to_pci_dev(dev);
+   struct device_node *dn;
+
+   dn = pci_device_to_OF_node(pdev);
+
+   /* search upwards for ibm,dma-window */
+   for (; dn && PCI_DN(dn) && !PCI_DN(dn)->table_group;
+   dn = dn->parent)
+   if (of_get_property(dn, "ibm,dma-window", NULL))
+   break;
+   /*
+* if there is a DDW configuration, the TCE shift is stored in
+* the property
+*/
+   if (dn && PCI_DN(dn)) {
+   const struct dynamic_dma_window_prop *direct64 =
+   of_get_property(dn, DIRECT64_PROPNAME, NULL);
+   if (direct64)
+   return be32_to_cpu(direct64->tce_shift);
+   }
+   }
+
+   tbl = get_iommu_table_base(dev);
+   if (tbl)
+   return tbl->it_page_shift;
+
+   return PAGE_SHIFT;
+}
+
 #else  /* CONFIG_PCI */
 #define pci_dma_bus_setup_pSeries  NULL
 #define pci_dma_dev_setup_pSeries  NULL
@@ -1299,6 +1333,7 @@ static u64 dma_get_required_mask_pSeriesLP(struct device 
*dev)
 #define pci_dma_dev_setup_pSeriesLPNULL
 #define dma_set_mask_pSeriesLP NULL
 #define dma_get_required_mask_pSeriesLPNULL
+#define dma_get_page_shift_pSeriesLP   NULL
 #endif /* !CONFIG_PCI */
 
 static int iommu_mem_notifier(struct notifier_block *nb, unsigned long action,
@@ -1395,6 +1430,7 @@ void iommu_init_early_pSeries(void)
pseries_pci_controller_ops.dma_dev_setup = 
pci_dma_dev_setup_pSeriesLP;
ppc_md.dma_set_mask = dma_set_mask_pSeriesLP;
ppc_md.dma_get_required_mask = dma_get_required_mask_pSeriesLP;
+   ppc_md.dma_get_page_shift = dma_get_page_shift_pSeriesLP;
} else {
pseries_pci_controller_ops.dma_bus_setup = 
pci_dma_bus_setup_pSeries;
pseries_pci_controller_ops.dma_dev_setup = 
pci_dma_dev_setup_pSeries;
-- 
1.9.1

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[RFC PATCH 6/7] sparc/dma-mapping: override dma_get_page_shift

[Nishanth Aravamudan]

On sparc, the kernel's page size differs from the IOMMU's page size, so
override the generic implementation, which always returns the kernel's
page size, and return IOMMU_PAGE_SHIFT instead.

Signed-off-by: Nishanth Aravamudan 

---
I know very little about sparc, so please correct me if this patch is
invalid.

 arch/sparc/include/asm/dma-mapping.h | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/sparc/include/asm/dma-mapping.h 
b/arch/sparc/include/asm/dma-mapping.h
index a21da59..76ba470 100644
--- a/arch/sparc/include/asm/dma-mapping.h
+++ b/arch/sparc/include/asm/dma-mapping.h
@@ -52,6 +52,14 @@ static inline int dma_set_mask(struct device *dev, u64 mask)
return -EINVAL;
 }
 
+/* for IOMMU_PAGE_SHIFT */
+#include 
+#define HAVE_ARCH_DMA_GET_PAGE_SHIFT 1
+static inline unsigned long dma_get_page_shift(struct device *dev)
+{
+   return IOMMU_PAGE_SHIFT;
+}
+
 #include 
 
 #endif
-- 
1.9.1

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[PATCH 5/7] [RFC PATCH 5/7] sparc: rename kernel/iommu_common.h -> include/asm/iommu_common.h

[Nishanth Aravamudan]

In order to cleanly expose the desired IOMMU page shift via the new
dma_get_page_shift API, we need to have the sparc constants available in
a more typical location. There should be no functional impact to this
move, but it is untested.

Signed-off-by: Nishanth Aravamudan 
---
 arch/sparc/include/asm/iommu_common.h | 51 +++
 arch/sparc/kernel/iommu.c |  2 +-
 arch/sparc/kernel/iommu_common.h  | 51 ---
 arch/sparc/kernel/pci_psycho.c|  2 +-
 arch/sparc/kernel/pci_sabre.c |  2 +-
 arch/sparc/kernel/pci_schizo.c|  2 +-
 arch/sparc/kernel/pci_sun4v.c |  2 +-
 arch/sparc/kernel/psycho_common.c |  2 +-
 arch/sparc/kernel/sbus.c  |  3 +--
 9 files changed, 58 insertions(+), 59 deletions(-)
 create mode 100644 arch/sparc/include/asm/iommu_common.h
 delete mode 100644 arch/sparc/kernel/iommu_common.h

diff --git a/arch/sparc/include/asm/iommu_common.h 
b/arch/sparc/include/asm/iommu_common.h
new file mode 100644
index 000..b40cec2
--- /dev/null
+++ b/arch/sparc/include/asm/iommu_common.h
@@ -0,0 +1,51 @@
+/* iommu_common.h: UltraSparc SBUS/PCI common iommu declarations.
+ *
+ * Copyright (C) 1999, 2008 David S. Miller (da...@davemloft.net)
+ */
+
+#ifndef _IOMMU_COMMON_H
+#define _IOMMU_COMMON_H
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+/*
+ * These give mapping size of each iommu pte/tlb.
+ */
+#define IO_PAGE_SHIFT  13
+#define IO_PAGE_SIZE   (1UL << IO_PAGE_SHIFT)
+#define IO_PAGE_MASK   (~(IO_PAGE_SIZE-1))
+#define IO_PAGE_ALIGN(addr)ALIGN(addr, IO_PAGE_SIZE)
+
+#define IO_TSB_ENTRIES (128*1024)
+#define IO_TSB_SIZE(IO_TSB_ENTRIES * 8)
+
+/*
+ * This is the hardwired shift in the iotlb tag/data parts.
+ */
+#define IOMMU_PAGE_SHIFT   13
+
+#define SG_ENT_PHYS_ADDRESS(SG)(__pa(sg_virt((SG
+
+static inline int is_span_boundary(unsigned long entry,
+  unsigned long shift,
+  unsigned long boundary_size,
+  struct scatterlist *outs,
+  struct scatterlist *sg)
+{
+   unsigned long paddr = SG_ENT_PHYS_ADDRESS(outs);
+   int nr = iommu_num_pages(paddr, outs->dma_length + sg->length,
+IO_PAGE_SIZE);
+
+   return iommu_is_span_boundary(entry, nr, shift, boundary_size);
+}
+
+#endif /* _IOMMU_COMMON_H */
diff --git a/arch/sparc/kernel/iommu.c b/arch/sparc/kernel/iommu.c
index 5320689..f9b6077 100644
--- a/arch/sparc/kernel/iommu.c
+++ b/arch/sparc/kernel/iommu.c
@@ -20,8 +20,8 @@
 #endif
 
 #include 
+#include 
 
-#include "iommu_common.h"
 #include "kernel.h"
 
 #define STC_CTXMATCH_ADDR(STC, CTX)\
diff --git a/arch/sparc/kernel/iommu_common.h b/arch/sparc/kernel/iommu_common.h
deleted file mode 100644
index b40cec2..000
--- a/arch/sparc/kernel/iommu_common.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/* iommu_common.h: UltraSparc SBUS/PCI common iommu declarations.
- *
- * Copyright (C) 1999, 2008 David S. Miller (da...@davemloft.net)
- */
-
-#ifndef _IOMMU_COMMON_H
-#define _IOMMU_COMMON_H
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-
-/*
- * These give mapping size of each iommu pte/tlb.
- */
-#define IO_PAGE_SHIFT  13
-#define IO_PAGE_SIZE   (1UL << IO_PAGE_SHIFT)
-#define IO_PAGE_MASK   (~(IO_PAGE_SIZE-1))
-#define IO_PAGE_ALIGN(addr)ALIGN(addr, IO_PAGE_SIZE)
-
-#define IO_TSB_ENTRIES (128*1024)
-#define IO_TSB_SIZE(IO_TSB_ENTRIES * 8)
-
-/*
- * This is the hardwired shift in the iotlb tag/data parts.
- */
-#define IOMMU_PAGE_SHIFT   13
-
-#define SG_ENT_PHYS_ADDRESS(SG)(__pa(sg_virt((SG
-
-static inline int is_span_boundary(unsigned long entry,
-  unsigned long shift,
-  unsigned long boundary_size,
-  struct scatterlist *outs,
-  struct scatterlist *sg)
-{
-   unsigned long paddr = SG_ENT_PHYS_ADDRESS(outs);
-   int nr = iommu_num_pages(paddr, outs->dma_length + sg->length,
-IO_PAGE_SIZE);
-
-   return iommu_is_span_boundary(entry, nr, shift, boundary_size);
-}
-
-#endif /* _IOMMU_COMMON_H */
diff --git a/arch/sparc/kernel/pci_psycho.c b/arch/sparc/kernel/pci_psycho.c
index 7dce27b..332fd6f 100644
--- a/arch/sparc/kernel/pci_psycho.c
+++ b/arch/sparc/kernel/pci_psycho.c
@@ -15,13 +15,13 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 
 #include "pci_impl.h"
-#include "iommu_common.h"
 #include "psycho_common.h"
 
 #define DRIVER_NAME 

Re: [PATCH v3 0/5] clk: qoriq: Move chip-specific knowledge into driver

[Scott Wood]

On Sat, 2015-09-19 at 23:29 -0500, Scott Wood wrote:
> The existing device tree bindings are error-prone and inflexible. 
> Correct the mistake by moving the knowledge into the driver, which has
> more flexibility in describing the quirks of each chip.  This leaves the
> device tree to its proper role of identifying a programming interface
> rather than describing its individual registers.
> 
> For more detail, see the commit message of patch 2.
> 
> As there are both ARM and PPC patches that depend on this patchset, I'm
> requesting ACKs from clk and cpufreq in order to put this into a topic
> branch that both ARM and PPC can pull.
> 
> Scott Wood (5):
>   powerpc/fsl: Move fsl_guts.h out of arch/powerpc
>   clk: qoriq: Move chip-specific knowledge into driver
>   clk: qoriq: Add ls2080a support.
>   clk: Add consumer APIs for discovering possible parent clocks
>   cpufreq: qoriq: Don't look at clock implementation details

I've applied the first three patches plus 
http://patchwork.ozlabs.org/patch/534739/ to the clock branch of 
scottwood/linux.git to be used as a basis for PPC and ARM device tree patches.

Note that there is a trivial merge conflict with commit 
4a7748c3d6419bb8178748 ("clk: Allow drivers to build if COMPILE_TEST is 
enabled").  Another option is for these patches to go via the clk tree, and 
the device tree patches will ust go separately.  This would result in 
intermediate commits where the device tree contains clock information that 
the clock driver can't handle, but it would be resolved by -rc1 -- and it 
seems that one of the ARM device tree patches ("dts/ls2080a: Update DTSI to 
add support of various peripherals") was already merged without waiting for 
the clock driver patch.  I could still wait until next merge window to rip 
out the legacy stuff from existing device trees, so it would only affect new 
functionality.

Patch 4 is still waiting for an ack from Russell King, but it appears that 
patch 5 (which depends on patch 4) can probably wait until the next merge 
window.  Without those patches, qoriq-cpufreq should still mostly work, as 
long as the old device trees are used.  Patches 4 and 5 will be needed to 
make qoriq-cpufreq continue to work with device trees using the new binding.

-Scott

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RE: [PATCH v12 6/6] QE: Move QE from arch/powerpc to drivers/soc

[Zhao Qiang]

On Fri, Oct 23, 2015 at 11:20 AM, Wood Scott-B07421  
wrote:
> -Original Message-
> From: Wood Scott-B07421
> Sent: Friday, October 23, 2015 11:20 AM
> To: Zhao Qiang-B45475 
> Cc: linux-ker...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> lau...@codeaurora.org; Xie Xiaobo-R63061 ;
> b...@kernel.crashing.org; Li Yang-Leo-R58472 ;
> pau...@samba.org
> Subject: Re: [PATCH v12 6/6] QE: Move QE from arch/powerpc to drivers/soc
> 
> On Wed, Oct 14, 2015 at 03:16:08PM +0800, Zhao Qiang wrote:
> 
> 
> > diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig
> > b/drivers/soc/fsl/qe/Kconfig similarity index 50% copy from
> > arch/powerpc/sysdev/qe_lib/Kconfig
> > copy to drivers/soc/fsl/qe/Kconfig
> > index 3c25199..283fe0d 100644
> > --- a/arch/powerpc/sysdev/qe_lib/Kconfig
> > +++ b/drivers/soc/fsl/qe/Kconfig
> > @@ -2,6 +2,17 @@
> >  # QE Communication options
> >  #
> >
> > +config QUICC_ENGINE
> > +   bool "Freescale QUICC Engine (QE) Support"
> > +   depends on FSL_SOC && PPC32
> > +   select GENERIC_ALLOCATOR
> > +   select CRC32
> > +   help
> > + The QUICC Engine (QE) is a new generation of communications
> > + coprocessors on Freescale embedded CPUs (akin to CPM in older
> chips).
> > + Selecting this option means that you wish to build a kernel
> > + for a machine with a QE coprocessor.
> > +
> >  config UCC_SLOW
> > bool
> > default y if SERIAL_QE
> > @@ -19,9 +30,3 @@ config UCC_FAST
> >  config UCC
> > bool
> > default y if UCC_FAST || UCC_SLOW
> > -
> > -config QE_USB
> > -   bool
> > -   default y if USB_FSL_QE
> > -   help
> > - QE USB Controller support
> 
> Why did some config symbols get moved and others not?

Because QE_USB should be putted under drivers/usb,
It is independent of this patchset.

-Zhao
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RE: [PATCH v12 4/6] QE/CPM: move muram management functions to qe_common

[Zhao Qiang]

On Fri, 2015-10-23 at 11:10 AM, Wood Scott-B07421  
wrote:
> -Original Message-
> From: Wood Scott-B07421
> Sent: Friday, October 23, 2015 11:10 AM
> To: Zhao Qiang-B45475 
> Cc: linux-ker...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> lau...@codeaurora.org; Xie Xiaobo-R63061 ;
> b...@kernel.crashing.org; Li Yang-Leo-R58472 ;
> pau...@samba.org
> Subject: Re: [PATCH v12 4/6] QE/CPM: move muram management functions to
> qe_common
> 
> On Wed, 2015-10-14 at 15:16 +0800, Zhao Qiang wrote:
> > QE and CPM have the same muram, they use the same management
> > functions. Now QE support both ARM and PowerPC, it is necessary to
> > move QE to "driver/soc", so move the muram management functions from
> > cpm_common to qe_common for preparing to move QE code to "driver/soc"
> >
> > Signed-off-by: Zhao Qiang 
> > ---
> > Changes for v2:
> >   - no changes
> > Changes for v3:
> >   - no changes
> > Changes for v4:
> >   - no changes
> > Changes for v5:
> >   - no changes
> > Changes for v6:
> >   - using genalloc instead rheap to manage QE MURAM
> >   - remove qe_reset from platform file, using
> >   - subsys_initcall to call qe_init function.
> > Changes for v7:
> >   - move this patch from 3/3 to 2/3
> >   - convert cpm with genalloc
> >   - check for gen_pool allocation failure Changes for v8:
> >   - rebase
> >   - move BD_SC_* macro instead of copy Changes for v9:
> >   - doesn't modify CPM, add a new patch to modify.
> >   - rebase
> > Changes for v10:
> >   - rebase
> > Changes for v11:
> >   - remove renaming
> >   - delete removing qe_reset and delete adding qe_init.
> > Changes for v12:
> >   - SPI_FSL_CPM depends on QE-MURAM, select QUICC_ENGINE for it.
> 
> Why is the SPI change part of this patch?  Why is it even part of this 
> patchset,
> rather than an independent patch sent to the SPI list and maintainer?  If 
> it's tied
> to other changes you're making, explain that.  As is, there is zero mention of
> the SPI change in the part of the e-mail that will become the git changelog.
> 
This SPI_FSL_CPM is cpm-spi, it is part of CPM.

-Zhao
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Re: Time to remove platforms/cell?

[Marc Dietrich]

Am Freitag, 23. Oktober 2015, 12:54:56 schrieb Michael Ellerman:
> On Thu, 2015-10-22 at 12:15 -0700, Geoff Levand wrote:
> > Hi,
> > 
> > On Fri, 2015-10-09 at 23:13 +0200, Marc Dietrich wrote:
> > > Am Freitag, 9. Oktober 2015, 10:45:42 schrieb Geoff Levand:
> > > > With the 4.2-rc4 kernel, kexec seems to work when CONFIG_SPU_FS=n.
> > > > 
> > > >  I
> > > > 
> > > > have not tried with petitboot release white-09.09.01-15.56 yet though.
> > > 
> > > I guess you mean 4.3-rc4. Still no luck with CONFIG_SPU_FS=n. No output
> > > even with direct calling kexec. Can you put a working kernel/initrd to
> > > some place so I can try this?
> > 
> > I did some more work on this, but still did not find out what the problem
> > is.  Kexec from 4.3 -> 4.3 works, but with the white-09.09.01-15.56
> > 
> > petitboot (2.6.30.9) -> 4.3 gets a kernel panic:
> >  -> early_setup(), dt_ptr: 0x7fff000
> > 
> > Kernel panic - not syncing: BUG: Failed verifying flat device tree, bad
> > version?
> > 
> > I'll look at it some more as I find time.
> 
> That says that the device tree firmware gave you (ie. from kexec), is using
> an old version of the device tree format.
> 
> I can't remember off the top of my head which version you need, but
> basically newer kernels require a newer device tree format. So your kexec
> might be too old?

that reminds me about a different question. I said before that I use plain 
vmlinux for the kernel image. This works at least with 2.6.35 (the newest 
kernel I got booting so far). But I also saw that a device tree is being 
compiled and linked with the kernel to produce a dt image in 
arch/powerpc/boot. Is it possible that newer kernels require a device tree?

Marc


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