[PATCH 10/41] powerpc: Add comment explaining the purpose of setup_kdump_trampoline()

[Benjamin Herrenschmidt]

Anything in early_setup() needs to be justified to be there, in
this case, we need the trampolines before we can take exceptions
and thus before we turn on the MMU.

Also remove a pretty meaningless and misplaced debug message

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup_64.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index e1b2e6f..a641753 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -276,10 +276,11 @@ void __init early_setup(unsigned long dt_ptr)
/* Probe the machine type */
probe_machine();
 
+   /* Setup the trampolines from the lowmem exception vectors
+* to the kdump kernel when not using a relocatable kernel.
+*/
setup_kdump_trampoline();
 
-   DBG("Found, Initializing memory management...\n");
-
/* Initialize the hash table or TLB handling */
early_init_mmu();
 
-- 
2.7.4

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[PATCH 26/41] powerpc/85xx/ge_imp3a: Don't use the flat device-tree after boot

[Benjamin Herrenschmidt]

ge_imp3a_pic_init() is called way beyond the unflattening of
the tree, it shouldn't be using of_flat_dt_*

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/platforms/85xx/ge_imp3a.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/ge_imp3a.c 
b/arch/powerpc/platforms/85xx/ge_imp3a.c
index 11790e0..55eefef 100644
--- a/arch/powerpc/platforms/85xx/ge_imp3a.c
+++ b/arch/powerpc/platforms/85xx/ge_imp3a.c
@@ -47,9 +47,8 @@ void __init ge_imp3a_pic_init(void)
struct mpic *mpic;
struct device_node *np;
struct device_node *cascade_node = NULL;
-   unsigned long root = of_get_flat_dt_root();
 
-   if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
+   if (of_machine_is_compatible("fsl,MPC8572DS-CAMP")) {
mpic = mpic_alloc(NULL, 0,
MPIC_NO_RESET |
MPIC_BIG_ENDIAN |
-- 
2.7.4

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[PATCH 27/41] powerpc/85xx/mpc85xx_ds: Don't use the flat device-tree after boot

[Benjamin Herrenschmidt]

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/platforms/85xx/mpc85xx_ds.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c 
b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index f858306..64a7e8c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -66,9 +66,7 @@ void __init mpc85xx_ds_pic_init(void)
struct device_node *cascade_node = NULL;
int cascade_irq;
 #endif
-   unsigned long root = of_get_flat_dt_root();
-
-   if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
+   if (of_machine_is_compatible("fsl,MPC8572DS-CAMP")) {
mpic = mpic_alloc(NULL, 0,
MPIC_NO_RESET |
MPIC_BIG_ENDIAN |
-- 
2.7.4

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Re: [2/2] tty/hvc: Use opal irqchip interface if available

[Michael Ellerman]

On Tue, 2016-28-06 at 03:11:39 UTC, Sam Mendoza-Jonas wrote:
> diff --git a/drivers/tty/hvc/hvc_opal.c b/drivers/tty/hvc/hvc_opal.c
> index b7cd0ae..8c53f5b 100644
> --- a/drivers/tty/hvc/hvc_opal.c
> +++ b/drivers/tty/hvc/hvc_opal.c
> @@ -214,7 +216,15 @@ static int hvc_opal_probe(struct platform_device *dev)
>   dev->dev.of_node->full_name,
>   boot ? " (boot console)" : "");
>  
> - irq = opal_event_request(ilog2(OPAL_EVENT_CONSOLE_INPUT));
> + rc = of_property_read_u32(dev->dev.of_node, "interrupts", );
> + if (rc) {
> + pr_info("hvc%d: No interrupts property, using OPAL event\n",
> + termno);
> + irq = opal_event_request(ilog2(OPAL_EVENT_CONSOLE_INPUT));
> + } else {
> + irq = irq_of_parse_and_map(dev->dev.of_node, 0);
> + }

That seems a bit backward.

Shouldn't we try irq_of_parse_and_map() and if that fails, then we go back to
opal_event_request() ?

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[PATCH 3/3] spapr: Set ibm, pa-features HTM from KVM_CAP_PPC_HTM

[Sam Bobroff]

Advertise HTM support in ibm, pa-features if KVM indicates support when
queried via a new capability (KVM_CAP_PPC_HTM).

If KVM returns false for the capability (which may indicate that the
host kernel doesn't support the capability itself) attempt to
determine availability using a fallback method based on KVM being
KVM-HV and HTM being available to the QEMU process.

Signed-off-by: Sam Bobroff 
---
 hw/ppc/spapr.c   |  3 ++-
 target-ppc/kvm.c | 27 +++
 target-ppc/kvm_ppc.h |  6 ++
 3 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 704aae7..e229532 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -606,6 +606,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, 
int offset,
 uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq()
 : SPAPR_TIMEBASE_FREQ;
 uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 10;
+uint8_t htm = (kvm_enabled() && kvmppc_get_htm_support(env)) ? 0x80 : 0x00;
 uint32_t page_sizes_prop[64];
 size_t page_sizes_prop_size;
 uint32_t vcpus_per_socket = smp_threads * smp_cores;
@@ -635,7 +636,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, 
int offset,
 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
-0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
+0x80, 0x00, 0x80, 0x00, 0x00 | htm, 0x00 };
 uint8_t *pa_features;
 size_t pa_size;
 
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index 884d564..f94ce3b 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -20,6 +20,7 @@
 #include 
 
 #include 
+#include "elf.h"
 
 #include "qemu-common.h"
 #include "qemu/error-report.h"
@@ -1976,6 +1977,32 @@ uint32_t kvmppc_get_dfp(void)
 return kvmppc_read_int_cpu_dt("ibm,dfp");
 }
 
+bool kvmppc_get_htm_support(CPUPPCState *env)
+{
+PowerPCCPU *cpu = ppc_env_get_cpu(env);
+CPUState *cs = CPU(cpu);
+
+
+if (kvm_vm_check_extension(cs->kvm_state, KVM_CAP_PPC_HTM)) {
+return true;
+}
+/*
+ * Fallback test for host kernels that don't yet support KVM_CAP_PPC_HTM.
+ * This will be unnecessary when KVM_API_VERSION is incremented (to 13 or
+ * above) because that will remove the ambiguity between the host kernel
+ * lacking support for KVM_CAP_PPC_HTM and it having support but reporting
+ * HTM as unavailable (both of which return 0, above).
+ */
+if (kvm_vm_check_extension(cs->kvm_state, KVM_CAP_PPC_GET_PVINFO)) {
+/* Assume this means PR KVM, so no TM. */
+return false;
+} else {
+/* Assume this means HV KVM, propagate whatever host userspace sees. */
+unsigned long hwcap2 = qemu_getauxval(AT_HWCAP2);
+return !!(hwcap2 & PPC_FEATURE2_HAS_HTM);
+}
+}
+
 static int kvmppc_get_pvinfo(CPUPPCState *env, struct kvm_ppc_pvinfo *pvinfo)
  {
  PowerPCCPU *cpu = ppc_env_get_cpu(env);
diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
index 20bfb59..b01c717 100644
--- a/target-ppc/kvm_ppc.h
+++ b/target-ppc/kvm_ppc.h
@@ -17,6 +17,7 @@ uint32_t kvmppc_get_tbfreq(void);
 uint64_t kvmppc_get_clockfreq(void);
 uint32_t kvmppc_get_vmx(void);
 uint32_t kvmppc_get_dfp(void);
+bool kvmppc_get_htm_support(CPUPPCState *env);
 bool kvmppc_get_host_model(char **buf);
 bool kvmppc_get_host_serial(char **buf);
 int kvmppc_get_hasidle(CPUPPCState *env);
@@ -90,6 +91,11 @@ static inline uint32_t kvmppc_get_dfp(void)
 return 0;
 }
 
+static inline bool kvmppc_get_htm_support(KVMState *kvm_state)
+{
+return false;
+}
+
 static inline int kvmppc_get_hasidle(CPUPPCState *env)
 {
 return 0;
-- 
2.1.0

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[PATCH 0/3] Rework spapr: Better handling of ibm, pa-features TM bit

[Sam Bobroff]

Hi David,

Anton asked me to have a look at this, so here is an attempt at a
re-implementation of his: "spapr: Better handling of ibm, pa-features TM bit"
addressing your comments and those from Paul Mackerras.  I've broken the
patch into one to unconditionally disable the HTM bit in pa-features and a
second one to set it conditionally based on a (new) KVM capability. It requires
a small patch to KVM to support the capability, presumably something like this:

diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 02416fe..4a8ddab 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -588,6 +588,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
r = 1;
break;
 #endif
+   case KVM_CAP_PPC_HTM:
+   r = cpu_has_feature(CPU_FTR_TM);
+   break;
default:
r = 0;
break;

Adding a new capability requires changing linux/kvm.h but I believe we can
avoid incrementing KVM_API_VERSION at this stage since kernels that don't yet
support it will simply return false. However, due to the ambiguity of that
result I've included Anton's initial fallback approach to be used in that case.
Once the API version is incremented (and support for the capability is
guaranteed) the ambiguity would be gone and we should be able to remove the
fallback. As long as that happens before KVM PR supports HTM, this should
address Paul's concern about using the PVINFO capability to discover KVM-HV.

Note: I'm not sure how to handle the change to linux/kvm.h, I've included the
patch here because it's needed to compile, but I suspect it needs to go via the
kernel. Let's see if this part looks good first.

Note also: I've changed TM to HTM where possible in an attempt to be consistent.


Sam Bobroff (3):
  spapr: Disable ibm, pa-features HTM bit
  Add KVM_CAP_PPC_HTM to linux/kvm.h
  spapr: Set ibm, pa-features HTM from KVM_CAP_PPC_HTM

 hw/ppc/spapr.c|  3 ++-
 linux-headers/linux/kvm.h |  1 +
 target-ppc/kvm.c  | 27 +++
 target-ppc/kvm_ppc.h  |  6 ++
 4 files changed, 36 insertions(+), 1 deletion(-)

-- 
2.1.0

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[PATCH 2/3] Add KVM_CAP_PPC_HTM to linux/kvm.h

[Sam Bobroff]

Signed-off-by: Sam Bobroff 
---
 linux-headers/linux/kvm.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index e60e21b..37cb3e8 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -866,6 +866,7 @@ struct kvm_ppc_smmu_info {
 #define KVM_CAP_ARM_PMU_V3 126
 #define KVM_CAP_VCPU_ATTRIBUTES 127
 #define KVM_CAP_MAX_VCPU_ID 128
+#define KVM_CAP_PPC_HTM 129
 
 #ifdef KVM_CAP_IRQ_ROUTING
 
-- 
2.1.0

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[PATCH 1/3] spapr: Disable ibm, pa-features HTM bit

[Sam Bobroff]

There are a few issues with our handling of the ibm,pa-features
HTM bit:

- We don't support transactional memory in PR KVM, so don't tell
  the OS that we do.

- In full emulation we have a minimal implementation of HTM that always
  fails, so for performance reasons lets not tell the OS that we
  support it either.

- In HV KVM mode, we should mirror the host HTM enabled state by
  checking a KVM capability or looking at the AT_HWCAP2 bit.

For now unconditionally disable it by removing HTM from the
pa-features bits.  It will be re-enabled in a subsequent patch
specifically for HV KVM.

Signed-off-by: Sam Bobroff 
---
 hw/ppc/spapr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 78ebd9e..704aae7 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -635,7 +635,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, 
int offset,
 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
-0x80, 0x00, 0x80, 0x00, 0x80, 0x00 };
+0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
 uint8_t *pa_features;
 size_t pa_size;
 
-- 
2.1.0

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Re: [v2,1/2] refactor code parsing size based on memory range

[Michael Ellerman]

> On 06/24/2016 10:56 AM, Michael Ellerman wrote:
>> On Wed, 2016-22-06 at 19:25:26 UTC, Hari Bathini wrote:
...
> While the code is moved to kernel/params.c file, there is no change in logic
> for crashkernel parameter parsing as the moved code is invoked with function
> calls at appropriate places.

Are you sure that's true?

The old code would return -EINVAL from parse_crashkernel_mem() for any
error, regardless of whether it had already parsed some of the string.

eg:

>>> diff --git a/kernel/kexec_core.c b/kernel/kexec_core.c
>>> index 56b3ed0..d43f5cc 100644
>>> --- a/kernel/kexec_core.c
>>> +++ b/kernel/kexec_core.c
>>> @@ -1083,59 +1083,9 @@ static int __init parse_crashkernel_mem(char 
>>> *cmdline,
>>> char *cur = cmdline, *tmp;
>>>   
>>> /* for each entry of the comma-separated list */
>>> -   do {
>>> -   unsigned long long start, end = ULLONG_MAX, size;
>>> -
>>> -   /* get the start of the range */
>>> -   start = memparse(cur, );
>>> -   if (cur == tmp) {
>>> -   pr_warn("crashkernel: Memory value expected\n");
>>> -   return -EINVAL;
>>> -   }
>>> -   cur = tmp;
>>> -   if (*cur != '-') {
>>> -   pr_warn("crashkernel: '-' expected\n");
>>> -   return -EINVAL;
>>> -   }
>>> -   cur++;
>>> -
>>> -   /* if no ':' is here, than we read the end */
>>> -   if (*cur != ':') {
>>> -   end = memparse(cur, );
>>> -   if (cur == tmp) {
>>> -   pr_warn("crashkernel: Memory value expected\n");
>>> -   return -EINVAL;
>>> -   }

So eg, if I give it "128M-foo" it will modify cur, and then error out here ^

You've changed that to:

>>> +   *crash_size = parse_mem_range_size("crashkernel", , system_ram);
>>> +   if (cur == cmdline)
>>> +   return -EINVAL;

Which only returns EINVAL if cur is not modified at all.

And looking below:

>>> diff --git a/kernel/params.c b/kernel/params.c
>>> index a6d6149..84e40ae 100644
>>> --- a/kernel/params.c
>>> +++ b/kernel/params.c
...
>>> +unsigned long long __init parse_mem_range_size(const char *param,
>>> +  char **str,
>>> +  unsigned long long system_ram)
>>> +{
>>> +   char *cur = *str, *tmp;
>>> +   unsigned long long mem_size = 0;
>>> +
>>> +   /* for each entry of the comma-separated list */
>>> +   do {
>>> +   unsigned long long start, end = ULLONG_MAX, size;
>>> +
>>> +   /* get the start of the range */
>>> +   start = memparse(cur, );
>>> +   if (cur == tmp) {
>>> +   printk(KERN_INFO "%s: Memory value expected\n", param);
>>> +   return mem_size;
>>> +   }
>>> +   cur = tmp;
>>> +   if (*cur != '-') {
>>> +   printk(KERN_INFO "%s: '-' expected\n", param);
>>> +   return mem_size;
>>> +   }
>>> +   cur++;
>>> +
>>> +   /* if no ':' is here, than we read the end */
>>> +   if (*cur != ':') {
>>> +   end = memparse(cur, );
>>> +   if (cur == tmp) {
>>> +   printk(KERN_INFO "%s: Memory value expected\n",
>>> +   param);
>>> +   return mem_size;

If we error out here for example, we have modified cur, so the code above
*won't* return EINVAL.

Which looks like a behaviour change to me?

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Re: [PATCH 36/41] powerpc: Re-order setup_panic()

[Benjamin Herrenschmidt]

On Tue, 2016-07-05 at 15:04 +1000, Benjamin Herrenschmidt wrote:
> Do it right after probe_machine() since it's about testing ppc_md,
> and put the test in the common code.

Ignore the second copy of that patch,  they are identical, my SSH
tunnel broke down half way through sending the series.

Cheers,
Ben.

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Re: [PATCH] powerpc/pci: Fix build with PCI_IOV=y and EEH=n

[Benjamin Herrenschmidt]

On Tue, 2016-07-05 at 14:30 +1000, Russell Currey wrote:
> On Tue, 2016-07-05 at 14:13 +1000, Michael Ellerman wrote:
> > Despite attempting to fix this in commit fb36e9073693
> ("powerpc/pci: Fix
> > SRIOV not building without EEH enabled"), the build is still broken
> when
> > PCI_IOV=y and EEH=n (eg. g5_defconfig with PCI_IOV=y):
> > 
> >   arch/powerpc/kernel/pci_dn.c: In function ‘remove_dev_pci_data’:
> >   arch/powerpc/kernel/pci_dn.c:230:18: error: unused variable
> ‘edev’
> > 
> > Signed-off-by: Michael Ellerman 
> > ---
> 
> Mistakes were made.

The fix [PATCH 40/41] powerpc/pci: Fix build of Book3E/64 without EEH
in my series should subsume this... provided I didnt screw up that is
:-)

Cheers,
Ben.

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[PATCH 41/41] powerpc: Fix build with CONFIG_MEMORY_HOTPLUG on some configs

[Benjamin Herrenschmidt]

For memory hotplug to work, the MMU code needs to provide the functions
create_section_mapping() and remove_section_mapping() to respectively
map and unmap portions of the linear mapping.

At the moment only hash64 provides these, so we provide weak stubs that
just error out. This fixes the build with configurations such as 64-bit
BookE with CONFIG_MEMORY_HOTPLUG enabled.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/mm/mem.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 2fd57fa..b0b8f25 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -116,6 +116,16 @@ int memory_add_physaddr_to_nid(u64 start)
 }
 #endif
 
+int __weak create_section_mapping(unsigned long start, unsigned long end)
+{
+   return -ENODEV;
+}
+
+int __weak remove_section_mapping(unsigned long start, unsigned long end)
+{
+   return -ENODEV;
+}
+
 int arch_add_memory(int nid, u64 start, u64 size, bool for_device)
 {
struct pglist_data *pgdata;
-- 
2.7.4

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[PATCH 40/41] powerpc/pci: Fix build of Book3E/64 without EEH

[Benjamin Herrenschmidt]

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/pci_dn.c | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index ecdccce..4fc6ede 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -31,6 +31,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /*
  * The function is used to find the firmware data of one
@@ -181,7 +182,6 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
 {
 #ifdef CONFIG_PCI_IOV
struct pci_dn *parent, *pdn;
-   struct eeh_dev *edev;
int i;
 
/* Only support IOV for now */
@@ -199,6 +199,8 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
return NULL;
 
for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) {
+   struct eeh_dev *edev __maybe_unused;
+
pdn = add_one_dev_pci_data(parent, NULL, i,
   pci_iov_virtfn_bus(pdev, i),
   pci_iov_virtfn_devfn(pdev, i));
@@ -209,10 +211,12 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
}
 
/* Create the EEH device for the VF */
+#ifdef CONFIG_EEH
eeh_dev_init(pdn, pci_bus_to_host(pdev->bus));
edev = pdn_to_eeh_dev(pdn);
BUG_ON(!edev);
edev->physfn = pdev;
+#endif /* CONFIG_EEH */
}
 #endif /* CONFIG_PCI_IOV */
 
@@ -224,7 +228,6 @@ void remove_dev_pci_data(struct pci_dev *pdev)
 #ifdef CONFIG_PCI_IOV
struct pci_dn *parent;
struct pci_dn *pdn, *tmp;
-   struct eeh_dev *edev;
int i;
 
/*
@@ -260,18 +263,22 @@ void remove_dev_pci_data(struct pci_dev *pdev)
 * a batch mode.
 */
for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) {
+   struct eeh_dev *edev __maybe_unused;
+
list_for_each_entry_safe(pdn, tmp,
>child_list, list) {
if (pdn->busno != pci_iov_virtfn_bus(pdev, i) ||
pdn->devfn != pci_iov_virtfn_devfn(pdev, i))
continue;
 
+#ifdef CONFIG_EEH
/* Release EEH device for the VF */
edev = pdn_to_eeh_dev(pdn);
if (edev) {
pdn->edev = NULL;
kfree(edev);
}
+#endif
 
if (!list_empty(>list))
list_del(>list);
-- 
2.7.4

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[PATCH 39/41] powerpc/mm: Fix build of Book3E/64 with 64K pages

[Benjamin Herrenschmidt]

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/include/asm/nohash/64/pgtable-64k.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/include/asm/nohash/64/pgtable-64k.h 
b/arch/powerpc/include/asm/nohash/64/pgtable-64k.h
index 570fb30..9083245 100644
--- a/arch/powerpc/include/asm/nohash/64/pgtable-64k.h
+++ b/arch/powerpc/include/asm/nohash/64/pgtable-64k.h
@@ -23,6 +23,7 @@
 #ifndef __ASSEMBLY__
 #define PTE_TABLE_SIZE PTE_FRAG_SIZE
 #define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE)
+#define PUD_TABLE_SIZE (0)
 #define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE)
 #endif /* __ASSEMBLY__ */
 
-- 
2.7.4

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[PATCH 38/41] powerpc: Merge 32-bit and 64-bit setup_arch()

[Benjamin Herrenschmidt]

There is little enough differences now. Use a few __weak stubs
for functions that may not be around in order to avoid too many
ifdefs.

Signed-off-by: Benjamin Herrenschmidt 
---

v2. Fix include problems with kvm_ppc.h on some CPU archs
v3. Give up on fixing include problems and move the prototype
of kvm_cma_reserve() to a different file instead
---
 arch/powerpc/include/asm/kvm_ppc.h |   4 -
 arch/powerpc/include/asm/setup.h   |  11 ++
 arch/powerpc/kernel/setup-common.c | 205 +
 arch/powerpc/kernel/setup_32.c |  65 +---
 arch/powerpc/kernel/setup_64.c | 178 ++--
 5 files changed, 228 insertions(+), 235 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index 2544eda..bad829a 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -395,7 +395,6 @@ void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid);
 struct openpic;
 
 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
-extern void kvm_cma_reserve(void) __init;
 static inline void kvmppc_set_xics_phys(int cpu, unsigned long addr)
 {
paca[cpu].kvm_hstate.xics_phys = addr;
@@ -425,9 +424,6 @@ extern void kvm_hv_vm_deactivated(void);
 extern bool kvm_hv_mode_active(void);
 
 #else
-static inline void __init kvm_cma_reserve(void)
-{}
-
 static inline void kvmppc_set_xics_phys(int cpu, unsigned long addr)
 {}
 
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index 1ba25c8..983615b 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -19,6 +19,10 @@ extern unsigned long reloc_offset(void);
 extern unsigned long add_reloc_offset(unsigned long);
 extern void reloc_got2(unsigned long);
 
+extern void initialize_cache_info(void);
+extern void irqstack_early_init(void);
+extern void emergency_stack_init(void);
+
 #ifdef CONFIG_PPC32
 #define PTRRELOC(x)((typeof(x)) add_reloc_offset((unsigned long)(x)))
 #else
@@ -42,6 +46,13 @@ static inline void pseries_big_endian_exceptions(void) {}
 static inline void pseries_little_endian_exceptions(void) {}
 #endif /* CONFIG_PPC_PSERIES */
 
+/* Having this in kvm_ppc.h makes include dependencies too
+ * tricky to solve for setup-common.c so have it here with
+ * along with a weak stub instead.
+ */
+extern void kvm_cma_reserve(void);
+
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* _ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/kernel/setup-common.c 
b/arch/powerpc/kernel/setup-common.c
index d0256a3..ea74f9a 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -35,6 +35,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -61,6 +62,10 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
+#include 
 
 #ifdef DEBUG
 #include 
@@ -757,3 +762,203 @@ void arch_setup_pdev_archdata(struct platform_device 
*pdev)
pdev->dev.dma_mask = >archdata.dma_mask;
set_dma_ops(>dev, _direct_ops);
 }
+
+static __init void print_system_info(void)
+{
+   pr_info("-\n");
+#ifdef CONFIG_PPC_STD_MMU_64
+   pr_info("ppc64_pft_size= 0x%llx\n", ppc64_pft_size);
+#endif
+#ifdef CONFIG_PPC_STD_MMU_32
+   pr_info("Hash_size = 0x%lx\n", Hash_size);
+#endif
+   pr_info("phys_mem_size = 0x%llx\n",
+   (unsigned long long)memblock_phys_mem_size());
+
+   pr_info("dcache_bsize  = 0x%x\n", dcache_bsize);
+   pr_info("icache_bsize  = 0x%x\n", icache_bsize);
+   if (ucache_bsize != 0)
+   pr_info("ucache_bsize  = 0x%x\n", ucache_bsize);
+
+   pr_info("cpu_features  = 0x%016lx\n", cur_cpu_spec->cpu_features);
+   pr_info("  possible= 0x%016lx\n",
+   (unsigned long)CPU_FTRS_POSSIBLE);
+   pr_info("  always  = 0x%016lx\n",
+   (unsigned long)CPU_FTRS_ALWAYS);
+   pr_info("cpu_user_features = 0x%08x 0x%08x\n",
+   cur_cpu_spec->cpu_user_features,
+   cur_cpu_spec->cpu_user_features2);
+   pr_info("mmu_features  = 0x%08x\n", cur_cpu_spec->mmu_features);
+#ifdef CONFIG_PPC64
+   pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
+#endif
+
+#ifdef CONFIG_PPC_STD_MMU_64
+   if (htab_address)
+   pr_info("htab_address  = 0x%p\n", htab_address);
+   if (htab_hash_mask)
+   pr_info("htab_hash_mask= 0x%lx\n", htab_hash_mask);
+#endif
+#ifdef CONFIG_PPC_STD_MMU_32
+   if (Hash)
+   pr_info("Hash  = 0x%p\n", Hash);
+   if (Hash_mask)
+   pr_info("Hash_mask = 0x%lx\n", Hash_mask);
+#endif
+
+   if (PHYSICAL_START > 0)
+   pr_info("physical_start= 0x%llx\n",
+  (unsigned long long)PHYSICAL_START);
+   

[PATCH 37/41] powerpc/64: Make a few boot functions __init

[Benjamin Herrenschmidt]

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup_64.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index bb1b65e..46787d9 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -198,7 +198,7 @@ early_param("smt-enabled", early_smt_enabled);
 #endif /* CONFIG_SMP */
 
 /** Fix up paca fields required for the boot cpu */
-static void fixup_boot_paca(void)
+static void __init fixup_boot_paca(void)
 {
/* The boot cpu is started */
get_paca()->cpu_start = 1;
@@ -206,7 +206,7 @@ static void fixup_boot_paca(void)
get_paca()->data_offset = 0;
 }
 
-static void configure_exceptions(void)
+static void __init configure_exceptions(void)
 {
/* Setup the trampolines from the lowmem exception vectors
 * to the kdump kernel when not using a relocatable kernel.
@@ -515,7 +515,7 @@ static __init void print_system_info(void)
  * used to allocate interrupt or emergency stacks for which our
  * exception entry path doesn't deal with being interrupted.
  */
-static u64 safe_stack_limit(void)
+static __init u64 safe_stack_limit(void)
 {
 #ifdef CONFIG_PPC_BOOK3E
/* Freescale BookE bolts the entire linear mapping */
-- 
2.7.4

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[PATCH 36/41] powerpc: Re-order setup_panic()

[Benjamin Herrenschmidt]

Do it right after probe_machine() since it's about testing ppc_md,
and put the test in the common code.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup-common.c | 2 ++
 arch/powerpc/kernel/setup_32.c | 5 ++---
 arch/powerpc/kernel/setup_64.c | 5 ++---
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/kernel/setup-common.c 
b/arch/powerpc/kernel/setup-common.c
index 7e85fac..d0256a3 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -687,6 +687,8 @@ static struct notifier_block ppc_panic_block = {
 
 void __init setup_panic(void)
 {
+   if (!ppc_md.panic)
+   return;
atomic_notifier_chain_register(_notifier_list, _panic_block);
 }
 
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 58674b6..6247a3a 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -277,6 +277,8 @@ void __init setup_arch(char **cmdline_p)
 
probe_machine();
 
+   setup_panic();
+
setup_power_save();
 
find_legacy_serial_ports();
@@ -288,9 +290,6 @@ void __init setup_arch(char **cmdline_p)
 
xmon_setup();
 
-   if (ppc_md.panic)
-   setup_panic();
-
init_mm.start_code = (unsigned long)_stext;
init_mm.end_code = (unsigned long) _etext;
init_mm.end_data = (unsigned long) _edata;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 46faafe..bb1b65e 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -647,6 +647,8 @@ void __init setup_arch(char **cmdline_p)
/* Probe the machine type */
probe_machine();
 
+   setup_panic();
+
/*
 * We can discover serial ports now since the above did setup the
 * hash table management for us, thus ioremap works. We do that early
@@ -695,9 +697,6 @@ void __init setup_arch(char **cmdline_p)
 */
reserve_hugetlb_gpages();
 
-   if (ppc_md.panic)
-   setup_panic();
-
klp_init_thread_info(_thread_info);
 
init_mm.start_code = (unsigned long)_stext;
-- 
2.7.4

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Re: [PATCH 2/2] qe/ic: refactor qe_ic to simplify

[Jason Cooper]

Hi Zhao Qiang,

Same comment as previous patch regarding the subject line.

On Tue, Jul 05, 2016 at 09:46:59AM +0800, Zhao Qiang wrote:
> there are init_qe_ic_sysfs and qeic_of_init, refactor
> them.

Same comment from previous patch about commit log.

> 
> Signed-off-by: Zhao Qiang 
> ---
>  drivers/irqchip/qe_ic.c| 83 
> +-
>  include/soc/fsl/qe/qe_ic.h |  7 
>  2 files changed, 45 insertions(+), 45 deletions(-)
> 
> diff --git a/drivers/irqchip/qe_ic.c b/drivers/irqchip/qe_ic.c
> index f7f9a81..46652c0 100644
> --- a/drivers/irqchip/qe_ic.c
> +++ b/drivers/irqchip/qe_ic.c
> @@ -317,27 +317,35 @@ unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)
>   return irq_linear_revmap(qe_ic->irqhost, irq);
>  }
>  
> -void __init qe_ic_init(struct device_node *node, unsigned int flags,
> -void (*low_handler)(struct irq_desc *desc),
> -void (*high_handler)(struct irq_desc *desc))
> +static int __init qe_ic_init(unsigned int flags)
>  {
> + struct device_node *node;
>   struct qe_ic *qe_ic;
>   struct resource res;
> - u32 temp = 0, ret, high_active = 0;
> + u32 temp = 0, high_active = 0;
> + int ret = 0;
> +
> + node = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
> + if (!node)
> + return -ENODEV;
>  
>   ret = of_address_to_resource(node, 0, );
> - if (ret)
> - return;
> + if (ret) {
> + ret = -ENODEV;
> + goto err_put_node;
> + }
>  
>   qe_ic = kzalloc(sizeof(*qe_ic), GFP_KERNEL);
> - if (qe_ic == NULL)
> - return;
> + if (qe_ic == NULL) {
> + ret = -ENOMEM;
> + goto err_put_node;
> + }
>  
>   qe_ic->irqhost = irq_domain_add_linear(node, NR_QE_IC_INTS,
>  _ic_host_ops, qe_ic);
>   if (qe_ic->irqhost == NULL) {
> - kfree(qe_ic);
> - return;
> + ret = -ENOMEM;
> + goto err_free_qe_ic;
>   }
>  
>   qe_ic->regs = ioremap(res.start, resource_size());
> @@ -348,9 +356,9 @@ void __init qe_ic_init(struct device_node *node, unsigned 
> int flags,
>   qe_ic->virq_low = irq_of_parse_and_map(node, 1);
>  
>   if (qe_ic->virq_low == NO_IRQ) {
> - printk(KERN_ERR "Failed to map QE_IC low IRQ\n");
> - kfree(qe_ic);
> - return;
> + pr_err("Failed to map QE_IC low IRQ\n");
> + ret = -ENOMEM;
> + goto err_domain_remove;
>   }
>  
>   /* default priority scheme is grouped. If spread mode is*/
> @@ -377,13 +385,23 @@ void __init qe_ic_init(struct device_node *node, 
> unsigned int flags,
>   qe_ic_write(qe_ic->regs, QEIC_CICR, temp);
>  
>   irq_set_handler_data(qe_ic->virq_low, qe_ic);
> - irq_set_chained_handler(qe_ic->virq_low, low_handler);
> + irq_set_chained_handler(qe_ic->virq_low, qe_ic_cascade_low_mpic);
>  
>   if (qe_ic->virq_high != NO_IRQ &&
>   qe_ic->virq_high != qe_ic->virq_low) {
>   irq_set_handler_data(qe_ic->virq_high, qe_ic);
> - irq_set_chained_handler(qe_ic->virq_high, high_handler);
> + irq_set_chained_handler(qe_ic->virq_high,
> + qe_ic_cascade_high_mpic);
>   }
> + return ret;

of_node_put(node)?  Explicitly return success?

> +
> +err_domain_remove:
> + irq_domain_remove(qe_ic->irqhost);
> +err_free_qe_ic:
> + kfree(qe_ic);
> +err_put_node:
> + of_node_put(node);
> + return ret;
>  }
>  
>  void qe_ic_set_highest_priority(unsigned int virq, int high)
> @@ -490,37 +508,26 @@ static struct device device_qe_ic = {
>   .bus = _ic_subsys,
>  };
>  
> -static int __init init_qe_ic_sysfs(void)
> +static int __init init_qe_ic(void)
>  {
> - int rc;
> + int ret;
>  
> - printk(KERN_DEBUG "Registering qe_ic with sysfs...\n");
> + ret = qe_ic_init(0);

Sorry, build machine is down atm.  How was qe_ic_init() called
previously?  Is that removed?

> + if (ret)
> + return ret;
>  
> - rc = subsys_system_register(_ic_subsys, NULL);
> - if (rc) {
> - printk(KERN_ERR "Failed registering qe_ic sys class\n");
> + ret = subsys_system_register(_ic_subsys, NULL);
> + if (ret) {
> + pr_err("Failed registering qe_ic sys class\n");
>   return -ENODEV;
>   }
> - rc = device_register(_qe_ic);
> - if (rc) {
> - printk(KERN_ERR "Failed registering qe_ic sys device\n");
> + ret = device_register(_qe_ic);
> + if (ret) {
> + pr_err("Failed registering qe_ic sys device\n");
>   return -ENODEV;
>   }
> - return 0;
> -}
>  
> -static int __init qeic_of_init(void)
> -{
> - struct device_node *np;
> -
> - np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
> - if (np) {
> -

[PATCH 36/41] powerpc: Re-order setup_panic()

[Benjamin Herrenschmidt]

Do it right after probe_machine() since it's about testing ppc_md,
and put the test in the common code.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup-common.c | 2 ++
 arch/powerpc/kernel/setup_32.c | 5 ++---
 arch/powerpc/kernel/setup_64.c | 5 ++---
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/kernel/setup-common.c 
b/arch/powerpc/kernel/setup-common.c
index 7e85fac..d0256a3 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -687,6 +687,8 @@ static struct notifier_block ppc_panic_block = {
 
 void __init setup_panic(void)
 {
+   if (!ppc_md.panic)
+   return;
atomic_notifier_chain_register(_notifier_list, _panic_block);
 }
 
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 58674b6..6247a3a 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -277,6 +277,8 @@ void __init setup_arch(char **cmdline_p)
 
probe_machine();
 
+   setup_panic();
+
setup_power_save();
 
find_legacy_serial_ports();
@@ -288,9 +290,6 @@ void __init setup_arch(char **cmdline_p)
 
xmon_setup();
 
-   if (ppc_md.panic)
-   setup_panic();
-
init_mm.start_code = (unsigned long)_stext;
init_mm.end_code = (unsigned long) _etext;
init_mm.end_data = (unsigned long) _edata;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 46faafe..bb1b65e 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -647,6 +647,8 @@ void __init setup_arch(char **cmdline_p)
/* Probe the machine type */
probe_machine();
 
+   setup_panic();
+
/*
 * We can discover serial ports now since the above did setup the
 * hash table management for us, thus ioremap works. We do that early
@@ -695,9 +697,6 @@ void __init setup_arch(char **cmdline_p)
 */
reserve_hugetlb_gpages();
 
-   if (ppc_md.panic)
-   setup_panic();
-
klp_init_thread_info(_thread_info);
 
init_mm.start_code = (unsigned long)_stext;
-- 
2.7.4

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[PATCH 35/41] powerpc: Re-order the call to smp_setup_cpu_maps()

[Benjamin Herrenschmidt]

It makes more sense to do it before intializing xmon() as xmon might
use the info in there. We do want to register the console early
though in case we want some functioning printk's in the cpu map setup.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup_32.c | 4 ++--
 arch/powerpc/kernel/setup_64.c | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 5457911..58674b6 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -281,11 +281,11 @@ void __init setup_arch(char **cmdline_p)
 
find_legacy_serial_ports();
 
-   smp_setup_cpu_maps();
-
/* Register early console */
register_early_udbg_console();
 
+   smp_setup_cpu_maps();
+
xmon_setup();
 
if (ppc_md.panic)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 8ee24dc..46faafe 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -659,12 +659,13 @@ void __init setup_arch(char **cmdline_p)
 */
register_early_udbg_console();
 
+   smp_setup_cpu_maps();
+
/*
 * Initialize xmon
 */
xmon_setup();
 
-   smp_setup_cpu_maps();
check_smt_enabled();
setup_tlb_core_data();
 
-- 
2.7.4

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[PATCH 29/41] powerpc: Move 32-bit probe() machine to later in the boot process

[Benjamin Herrenschmidt]

This converts all the 32-bit platforms to use the expanded device-tree
which is a pretty mechanical change. Unlike 64-bit, the 32-bit kernel
didn't rely on platform initializations to setup the MMU since it
sets it up entirely before probe_machine() so the move has comparatively
less consequences though it's a bigger patch.

Signed-off-by: Benjamin Herrenschmidt 
---

v2. Fix typos
v3. Fix more typos
---
 arch/powerpc/kernel/setup_32.c| 35 +++-
 arch/powerpc/platforms/40x/ep405.c|  4 +--
 arch/powerpc/platforms/40x/ppc40x_simple.c|  2 +-
 arch/powerpc/platforms/40x/virtex.c   |  4 +--
 arch/powerpc/platforms/40x/walnut.c   |  4 +--
 arch/powerpc/platforms/44x/canyonlands.c  |  5 ++-
 arch/powerpc/platforms/44x/ebony.c|  4 +--
 arch/powerpc/platforms/44x/iss4xx.c   |  4 +--
 arch/powerpc/platforms/44x/ppc44x_simple.c|  3 +-
 arch/powerpc/platforms/44x/ppc476.c   |  6 ++--
 arch/powerpc/platforms/44x/sam440ep.c |  4 +--
 arch/powerpc/platforms/44x/virtex.c   |  4 +--
 arch/powerpc/platforms/44x/warp.c |  4 +--
 arch/powerpc/platforms/512x/mpc5121_ads.c |  4 +--
 arch/powerpc/platforms/512x/mpc512x_generic.c |  2 +-
 arch/powerpc/platforms/512x/pdm360ng.c|  4 +--
 arch/powerpc/platforms/52xx/efika.c   |  3 +-
 arch/powerpc/platforms/52xx/lite5200.c|  2 +-
 arch/powerpc/platforms/52xx/media5200.c   |  2 +-
 arch/powerpc/platforms/52xx/mpc5200_simple.c  |  2 +-
 arch/powerpc/platforms/82xx/ep8248e.c |  3 +-
 arch/powerpc/platforms/82xx/km82xx.c  |  3 +-
 arch/powerpc/platforms/82xx/mpc8272_ads.c |  3 +-
 arch/powerpc/platforms/82xx/pq2fads.c |  3 +-
 arch/powerpc/platforms/83xx/asp834x.c |  3 +-
 arch/powerpc/platforms/83xx/km83xx.c  |  3 +-
 arch/powerpc/platforms/83xx/mpc830x_rdb.c |  2 +-
 arch/powerpc/platforms/83xx/mpc831x_rdb.c |  2 +-
 arch/powerpc/platforms/83xx/mpc832x_mds.c |  4 +--
 arch/powerpc/platforms/83xx/mpc832x_rdb.c |  4 +--
 arch/powerpc/platforms/83xx/mpc834x_itx.c |  4 +--
 arch/powerpc/platforms/83xx/mpc834x_mds.c |  4 +--
 arch/powerpc/platforms/83xx/mpc836x_mds.c |  4 +--
 arch/powerpc/platforms/83xx/mpc836x_rdk.c |  4 +--
 arch/powerpc/platforms/83xx/mpc837x_mds.c |  4 +--
 arch/powerpc/platforms/83xx/mpc837x_rdb.c |  2 +-
 arch/powerpc/platforms/83xx/sbc834x.c |  4 +--
 arch/powerpc/platforms/85xx/bsc913x_qds.c |  4 +--
 arch/powerpc/platforms/85xx/bsc913x_rdb.c |  4 +--
 arch/powerpc/platforms/85xx/c293pcie.c|  4 +--
 arch/powerpc/platforms/85xx/corenet_generic.c |  5 ++-
 arch/powerpc/platforms/85xx/ge_imp3a.c|  4 +--
 arch/powerpc/platforms/85xx/ksi8560.c |  4 +--
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |  4 +--
 arch/powerpc/platforms/85xx/mpc85xx_ads.c |  4 +--
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |  4 +--
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  | 12 ++-
 arch/powerpc/platforms/85xx/mpc85xx_mds.c | 12 ++-
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 40 ++-
 arch/powerpc/platforms/85xx/mvme2500.c|  4 +--
 arch/powerpc/platforms/85xx/p1010rdb.c|  6 ++--
 arch/powerpc/platforms/85xx/p1022_ds.c|  4 +--
 arch/powerpc/platforms/85xx/p1022_rdk.c   |  4 +--
 arch/powerpc/platforms/85xx/p1023_rdb.c   |  4 +--
 arch/powerpc/platforms/85xx/ppa8548.c |  4 +--
 arch/powerpc/platforms/85xx/qemu_e500.c   |  4 +--
 arch/powerpc/platforms/85xx/sbc8548.c |  4 +--
 arch/powerpc/platforms/85xx/socrates.c|  4 +--
 arch/powerpc/platforms/85xx/stx_gp3.c |  4 +--
 arch/powerpc/platforms/85xx/tqm85xx.c |  2 +-
 arch/powerpc/platforms/85xx/twr_p102x.c   |  4 +--
 arch/powerpc/platforms/85xx/xes_mpc85xx.c | 12 ++-
 arch/powerpc/platforms/86xx/gef_ppc9a.c   |  4 +--
 arch/powerpc/platforms/86xx/gef_sbc310.c  |  4 +--
 arch/powerpc/platforms/86xx/gef_sbc610.c  |  4 +--
 arch/powerpc/platforms/86xx/mpc8610_hpcd.c|  4 +--
 arch/powerpc/platforms/86xx/mpc86xx_hpcn.c|  6 ++--
 arch/powerpc/platforms/86xx/sbc8641d.c|  4 +--
 arch/powerpc/platforms/8xx/adder875.c |  3 +-
 arch/powerpc/platforms/8xx/ep88xc.c   |  3 +-
 arch/powerpc/platforms/8xx/mpc86xads_setup.c  |  3 +-
 arch/powerpc/platforms/8xx/mpc885ads_setup.c  |  3 +-
 arch/powerpc/platforms/8xx/tqm8xx_setup.c |  4 +--
 arch/powerpc/platforms/amigaone/setup.c   |  4 +--
 arch/powerpc/platforms/embedded6xx/c2k.c  |  4 +--
 

[PATCH 32/41] powerpc/64: Move setting of {i, d}cache_bsize to initialize_cache_info()

[Benjamin Herrenschmidt]

Also remove the completely osbolete comment. We *do* look in the
device-tree.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup_64.c | 13 -
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index d8f5f48..16e9ce7 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -471,6 +471,10 @@ static void __init initialize_cache_info(void)
}
}
 
+   /* For use by binfmt_elf */
+   dcache_bsize = ppc64_caches.dline_size;
+   icache_bsize = ppc64_caches.iline_size;
+
DBG(" <- initialize_cache_info()\n");
 }
 
@@ -691,15 +695,6 @@ void __init setup_arch(char **cmdline_p)
 {
*cmdline_p = boot_command_line;
 
-   /*
-* Set cache line size based on type of cpu as a default.
-* Systems with OF can look in the properties on the cpu node(s)
-* for a possibly more accurate value.
-*/
-   dcache_bsize = ppc64_caches.dline_size;
-   icache_bsize = ppc64_caches.iline_size;
-
-
/* Reserve large chunks of memory for use by CMA for KVM */
kvm_cma_reserve();
 
-- 
2.7.4

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[PATCH 30/41] powerpc: Get rid of ppc_md.init_early()

[Benjamin Herrenschmidt]

It is now called right after platform probe, so the probe function
can just do the job.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/include/asm/machdep.h|  1 -
 arch/powerpc/kernel/setup_32.c|  3 ---
 arch/powerpc/kernel/setup_64.c|  8 
 arch/powerpc/platforms/512x/mpc5121_ads.c |  8 ++--
 arch/powerpc/platforms/512x/mpc512x_generic.c |  8 ++--
 arch/powerpc/platforms/512x/pdm360ng.c|  8 ++--
 arch/powerpc/platforms/chrp/setup.c   |  5 +++--
 arch/powerpc/platforms/embedded6xx/c2k.c  |  4 +++-
 arch/powerpc/platforms/embedded6xx/gamecube.c |  8 ++--
 arch/powerpc/platforms/embedded6xx/wii.c  |  8 ++--
 arch/powerpc/platforms/maple/setup.c  | 15 ++-
 arch/powerpc/platforms/pasemi/setup.c |  8 ++--
 arch/powerpc/platforms/powermac/setup.c   |  5 +++--
 arch/powerpc/platforms/powernv/setup.c|  5 +++--
 arch/powerpc/platforms/pseries/setup.c|  9 +
 15 files changed, 43 insertions(+), 60 deletions(-)

diff --git a/arch/powerpc/include/asm/machdep.h 
b/arch/powerpc/include/asm/machdep.h
index 62b1461..29bc9a3 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -53,7 +53,6 @@ struct machdep_calls {
 
int (*probe)(void);
void(*setup_arch)(void); /* Optional, may be NULL */
-   void(*init_early)(void);
/* Optional, may be NULL. */
void(*show_cpuinfo)(struct seq_file *m);
void(*show_percpuinfo)(struct seq_file *m, int i);
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index e7bb4e7..22347e87 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -263,9 +263,6 @@ void __init setup_arch(char **cmdline_p)
 
setup_power_save();
 
-   if (ppc_md.init_early)
-   ppc_md.init_early();
-
find_legacy_serial_ports();
 
smp_setup_cpu_maps();
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index cefe985..a49cb17 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -509,14 +509,6 @@ void __init setup_system(void)
/* Probe the machine type */
probe_machine();
 
-   /*
-* Do some platform specific early initializations, that includes
-* setting up the hash table pointers. It also sets up some 
interrupt-mapping
-* related options that will be used by finish_device_tree()
-*/
-   if (ppc_md.init_early)
-   ppc_md.init_early();
-
/*
 * We can discover serial ports now since the above did setup the
 * hash table management for us, thus ioremap works. We do that early
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c 
b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 4e03f04..f65d503 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -57,7 +57,12 @@ static void __init mpc5121_ads_init_IRQ(void)
  */
 static int __init mpc5121_ads_probe(void)
 {
-   return of_machine_is_compatible("fsl,mpc5121ads");
+   if (!of_machine_is_compatible("fsl,mpc5121ads"))
+   return 0;
+
+   mpc512x_init_early();
+
+   return 1;
 }
 
 define_machine(mpc5121_ads) {
@@ -65,7 +70,6 @@ define_machine(mpc5121_ads) {
.probe  = mpc5121_ads_probe,
.setup_arch = mpc5121_ads_setup_arch,
.init   = mpc512x_init,
-   .init_early = mpc512x_init_early,
.init_IRQ   = mpc5121_ads_init_IRQ,
.get_irq= ipic_get_irq,
.calibrate_decr = generic_calibrate_decr,
diff --git a/arch/powerpc/platforms/512x/mpc512x_generic.c 
b/arch/powerpc/platforms/512x/mpc512x_generic.c
index 87eba17..bf884d3 100644
--- a/arch/powerpc/platforms/512x/mpc512x_generic.c
+++ b/arch/powerpc/platforms/512x/mpc512x_generic.c
@@ -38,14 +38,18 @@ static const char * const board[] __initconst = {
  */
 static int __init mpc512x_generic_probe(void)
 {
-   return of_device_compatible_match(of_root, board);
+   if (!of_device_compatible_match(of_root, board))
+   return 0;
+
+   mpc512x_init_early();
+
+   return 1;
 }
 
 define_machine(mpc512x_generic) {
.name   = "MPC512x generic",
.probe  = mpc512x_generic_probe,
.init   = mpc512x_init,
-   .init_early = mpc512x_init_early,
.setup_arch = mpc512x_setup_arch,
.init_IRQ   = mpc512x_init_IRQ,
.get_irq= ipic_get_irq,
diff --git a/arch/powerpc/platforms/512x/pdm360ng.c 
b/arch/powerpc/platforms/512x/pdm360ng.c
index f9cad19..dc81f05 100644
--- 

[PATCH 25/41] powerpc/cell: Don't use flat device-tree after boot

[Benjamin Herrenschmidt]

Some bit of SPU code was using the FDT rather than the expanded
device-tree. Fix it.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/platforms/cell/spu_manage.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/powerpc/platforms/cell/spu_manage.c 
b/arch/powerpc/platforms/cell/spu_manage.c
index c3327f3..21b4bfb 100644
--- a/arch/powerpc/platforms/cell/spu_manage.c
+++ b/arch/powerpc/platforms/cell/spu_manage.c
@@ -535,8 +535,7 @@ static int __init init_affinity(void)
if (of_has_vicinity()) {
init_affinity_fw();
} else {
-   long root = of_get_flat_dt_root();
-   if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
+   if (of_machine_is_compatible("IBM,CPBW-1.0"))
init_affinity_qs20_harcoded();
else
printk("No affinity configuration found\n");
-- 
2.7.4

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[PATCH 28/41] powerpc/85xx/mpc85xx_rdb: Don't use the flat device-tree after boot

[Benjamin Herrenschmidt]

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c 
b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 3f4dad1..761e504 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -47,13 +47,12 @@
 void __init mpc85xx_rdb_pic_init(void)
 {
struct mpic *mpic;
-   unsigned long root = of_get_flat_dt_root();
 
 #ifdef CONFIG_QUICC_ENGINE
struct device_node *np;
 #endif
 
-   if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
+   if (of_machine_is_compatible("fsl,MPC85XXRDB-CAMP")) {
mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
-- 
2.7.4

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[PATCH 24/41] powerpc: Move 64-bit probe_machine() to later in the boot process

[Benjamin Herrenschmidt]

We no long need the machine type that early, so we can move probe_machine()
to after the device-tree has been expanded. This will allow further
consolidation.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup_64.c  | 6 +++---
 arch/powerpc/platforms/cell/setup.c | 6 ++
 arch/powerpc/platforms/maple/setup.c| 6 ++
 arch/powerpc/platforms/pasemi/setup.c   | 6 ++
 arch/powerpc/platforms/powermac/setup.c | 6 ++
 arch/powerpc/platforms/powernv/setup.c  | 4 +---
 arch/powerpc/platforms/ps3/setup.c  | 6 ++
 arch/powerpc/platforms/pseries/setup.c  | 7 +++
 8 files changed, 21 insertions(+), 26 deletions(-)

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 978c48c..cefe985 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -300,9 +300,6 @@ void __init early_setup(unsigned long dt_ptr)
setup_paca([boot_cpuid]);
fixup_boot_paca();
 
-   /* Probe the machine type */
-   probe_machine();
-
/* Configure exception handlers. This include setting up trampolines
 * if needed, setting exception endian mode, etc...
 */
@@ -509,6 +506,9 @@ void __init setup_system(void)
 */
check_for_initrd();
 
+   /* Probe the machine type */
+   probe_machine();
+
/*
 * Do some platform specific early initializations, that includes
 * setting up the hash table pointers. It also sets up some 
interrupt-mapping
diff --git a/arch/powerpc/platforms/cell/setup.c 
b/arch/powerpc/platforms/cell/setup.c
index e342f78..d3543e6 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -255,10 +255,8 @@ static void __init cell_setup_arch(void)
 
 static int __init cell_probe(void)
 {
-   unsigned long root = of_get_flat_dt_root();
-
-   if (!of_flat_dt_is_compatible(root, "IBM,CBEA") &&
-   !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
+   if (!of_machine_is_compatible("IBM,CBEA") &&
+   !of_machine_is_compatible("IBM,CPBW-1.0"))
return 0;
 
pm_power_off = rtas_power_off;
diff --git a/arch/powerpc/platforms/maple/setup.c 
b/arch/powerpc/platforms/maple/setup.c
index a56828c..a1ecbc9 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -298,10 +298,8 @@ static void __init maple_progress(char *s, unsigned short 
hex)
  */
 static int __init maple_probe(void)
 {
-   unsigned long root = of_get_flat_dt_root();
-
-   if (!of_flat_dt_is_compatible(root, "Momentum,Maple") &&
-   !of_flat_dt_is_compatible(root, "Momentum,Apache"))
+   if (!of_machine_is_compatible("Momentum,Maple") &&
+   !of_machine_is_compatible("Momentum,Apache"))
return 0;
 
pm_power_off = maple_power_off;
diff --git a/arch/powerpc/platforms/pasemi/setup.c 
b/arch/powerpc/platforms/pasemi/setup.c
index 9a881be..8f5e291 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -420,10 +420,8 @@ machine_device_initcall(pasemi, pasemi_publish_devices);
  */
 static int __init pas_probe(void)
 {
-   unsigned long root = of_get_flat_dt_root();
-
-   if (!of_flat_dt_is_compatible(root, "PA6T-1682M") &&
-   !of_flat_dt_is_compatible(root, "pasemi,pwrficient"))
+   if (!of_machine_is_compatible("PA6T-1682M") &&
+   !of_machine_is_compatible("pasemi,pwrficient"))
return 0;
 
return 1;
diff --git a/arch/powerpc/platforms/powermac/setup.c 
b/arch/powerpc/platforms/powermac/setup.c
index 1e42104..128ce76 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -588,11 +588,17 @@ console_initcall(check_pmac_serial_console);
  */
 static int __init pmac_probe(void)
 {
+#ifdef CONFIG_PPC32
unsigned long root = of_get_flat_dt_root();
 
if (!of_flat_dt_is_compatible(root, "Power Macintosh") &&
!of_flat_dt_is_compatible(root, "MacRISC"))
return 0;
+#else
+   if (!of_machine_is_compatible("Power Macintosh") &&
+   !of_machine_is_compatible("MacRISC"))
+   return 0;
+#endif
 
 #ifdef CONFIG_PPC32
/* isa_io_base gets set in pmac_pci_init */
diff --git a/arch/powerpc/platforms/powernv/setup.c 
b/arch/powerpc/platforms/powernv/setup.c
index 15e3b8b..ed99177 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -268,9 +268,7 @@ static void __init pnv_setup_machdep_opal(void)
 
 static int __init pnv_probe(void)
 {
-   unsigned long root = of_get_flat_dt_root();
-
-   if (!of_flat_dt_is_compatible(root, "ibm,powernv"))
+   if (!of_machine_is_compatible("ibm,powernv"))
return 0;
 
if (firmware_has_feature(FW_FEATURE_OPAL))
diff --git a/arch/powerpc/platforms/ps3/setup.c 

[PATCH 21/41] powerpc/pmac: Remove spurrious machine type test

[Benjamin Herrenschmidt]

pmac_declare_of_platform_devices() is already a machine initcall, thus
it won't be called on a non-powermac machine. Testing for chrp there
is pointless.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/platforms/powermac/setup.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/powerpc/platforms/powermac/setup.c 
b/arch/powerpc/platforms/powermac/setup.c
index 5801889..1e42104 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -482,9 +482,6 @@ static int __init pmac_declare_of_platform_devices(void)
 {
struct device_node *np;
 
-   if (machine_is(chrp))
-   return -1;
-
np = of_find_node_by_name(NULL, "valkyrie");
if (np) {
of_platform_device_create(np, "valkyrie", NULL);
-- 
2.7.4

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[PATCH 19/41] powerpc: Don't test for machine type in smp_setup_cpu_maps()

[Benjamin Herrenschmidt]

The subsequent test for RTAS along with the LPAR test are sufficient

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup-common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/setup-common.c 
b/arch/powerpc/kernel/setup-common.c
index 8ca79b7..2a3564c 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -494,7 +494,7 @@ void __init smp_setup_cpu_maps(void)
 * On pSeries LPAR, we need to know how many cpus
 * could possibly be added to this partition.
 */
-   if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
+   if (firmware_has_feature(FW_FEATURE_LPAR) &&
(dn = of_find_node_by_path("/rtas"))) {
int num_addr_cell, num_size_cell, maxcpus;
const __be32 *ireg;
-- 
2.7.4

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[PATCH 15/41] powerpc/64: Move MMU backend selection out of platform code

[Benjamin Herrenschmidt]

We move it into early_mmu_init() based on firmware features. For PS3,
we have to move the setting of these into early_init_devtree().

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/include/asm/ps3.h  |  2 ++
 arch/powerpc/kernel/prom.c  |  7 +++
 arch/powerpc/mm/hash_utils_64.c | 14 ++
 arch/powerpc/mm/pgtable-radix.c |  1 +
 arch/powerpc/platforms/cell/setup.c |  1 -
 arch/powerpc/platforms/maple/setup.c|  1 -
 arch/powerpc/platforms/pasemi/setup.c   |  2 --
 arch/powerpc/platforms/powermac/setup.c |  4 
 arch/powerpc/platforms/powernv/setup.c  |  5 -
 arch/powerpc/platforms/ps3/setup.c  | 15 +--
 arch/powerpc/platforms/pseries/setup.c  |  7 ---
 11 files changed, 33 insertions(+), 26 deletions(-)

diff --git a/arch/powerpc/include/asm/ps3.h b/arch/powerpc/include/asm/ps3.h
index a1bc7e7..a19f831 100644
--- a/arch/powerpc/include/asm/ps3.h
+++ b/arch/powerpc/include/asm/ps3.h
@@ -526,4 +526,6 @@ void ps3_sync_irq(int node);
 u32 ps3_get_hw_thread_id(int cpu);
 u64 ps3_get_spe_id(void *arg);
 
+void ps3_early_mm_init(void);
+
 #endif
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index d10e786..5d59f11 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -748,6 +748,13 @@ void __init early_init_devtree(void *params)
/* Now try to figure out if we are running on LPAR */
of_scan_flat_dt(pseries_probe_fw_features, NULL);
 #endif
+
+#ifdef CONFIG_PPC_PS3
+   /* Identify PS3 firmware */
+   if (of_flat_dt_is_compatible(of_get_flat_dt_root(), "sony,ps3"))
+   powerpc_firmware_features |= FW_FEATURE_PS3_POSSIBLE;
+#endif
+
DBG(" <- early_init_devtree()\n");
 }
 
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 2bea864..839e1ad 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -58,6 +58,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -854,6 +855,11 @@ static void __init htab_initialize(void)
 #undef KB
 #undef MB
 
+void __init __weak hpte_init_lpar(void)
+{
+   panic("FW_FEATURE_LPAR set but no LPAR support compiled\n");
+}
+
 void __init hash__early_init_mmu(void)
 {
/*
@@ -886,6 +892,14 @@ void __init hash__early_init_mmu(void)
vmemmap = (struct page *)H_VMEMMAP_BASE;
ioremap_bot = IOREMAP_BASE;
 
+   /* Select appropriate backend */
+   if (firmware_has_feature(FW_FEATURE_PS3_LV1))
+   ps3_early_mm_init();
+   else if (firmware_has_feature(FW_FEATURE_LPAR))
+   hpte_init_lpar();
+   else
+   hpte_init_native();
+
/* Initialize the MMU Hash table and create the linear mapping
 * of memory. Has to be done before SLB initialization as this is
 * currently where the page size encoding is obtained.
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index c939e6e..6624b7b 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -339,6 +339,7 @@ void __init radix__early_init_mmu(void)
 
radix_init_page_sizes();
if (!firmware_has_feature(FW_FEATURE_LPAR)) {
+   radix_init_native();
lpcr = mfspr(SPRN_LPCR);
mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
radix_init_partition_table();
diff --git a/arch/powerpc/platforms/cell/setup.c 
b/arch/powerpc/platforms/cell/setup.c
index 36cff28..e342f78 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -261,7 +261,6 @@ static int __init cell_probe(void)
!of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
return 0;
 
-   hpte_init_native();
pm_power_off = rtas_power_off;
 
return 1;
diff --git a/arch/powerpc/platforms/maple/setup.c 
b/arch/powerpc/platforms/maple/setup.c
index 3cd625d..a56828c 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -304,7 +304,6 @@ static int __init maple_probe(void)
!of_flat_dt_is_compatible(root, "Momentum,Apache"))
return 0;
 
-   hpte_init_native();
pm_power_off = maple_power_off;
 
return 1;
diff --git a/arch/powerpc/platforms/pasemi/setup.c 
b/arch/powerpc/platforms/pasemi/setup.c
index d71b2c7..7605bc6 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -426,8 +426,6 @@ static int __init pas_probe(void)
!of_flat_dt_is_compatible(root, "pasemi,pwrficient"))
return 0;
 
-   hpte_init_native();
-
alloc_iobmap_l2();
 
return 1;
diff --git a/arch/powerpc/platforms/powermac/setup.c 
b/arch/powerpc/platforms/powermac/setup.c
index 43d02c2..5801889 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ 

[PATCH 17/41] powerpc/mm/hash: Don't use machine_is() early during boot

[Benjamin Herrenschmidt]

Use the device-tree instead as we'll be moving probe_machine()
out of early_setup

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/mm/hash_utils_64.c | 25 -
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 839e1ad..a261e44 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -34,6 +34,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -731,7 +732,7 @@ static void __init htab_initialize(void)
unsigned long table;
unsigned long pteg_count;
unsigned long prot;
-   unsigned long base = 0, size = 0, limit;
+   unsigned long base = 0, size = 0;
struct memblock_region *reg;
 
DBG(" -> htab_initialize()\n");
@@ -757,7 +758,8 @@ static void __init htab_initialize(void)
 
htab_hash_mask = pteg_count - 1;
 
-   if (firmware_has_feature(FW_FEATURE_LPAR)) {
+   if (firmware_has_feature(FW_FEATURE_LPAR) ||
+   firmware_has_feature(FW_FEATURE_PS3_LV1)) {
/* Using a hypervisor which owns the htab */
htab_address = NULL;
_SDR1 = 0; 
@@ -772,16 +774,21 @@ static void __init htab_initialize(void)
ppc_md.hpte_clear_all();
 #endif
} else {
-   /* Find storage for the HPT.  Must be contiguous in
-* the absolute address space. On cell we want it to be
-* in the first 2 Gig so we can use it for IOMMU hacks.
+   unsigned long limit = MEMBLOCK_ALLOC_ANYWHERE;
+
+#ifdef CONFIG_PPC_CELL
+   /* Cell may require the hash table down low when using the
+* Axon IOMMU in order to fit the dynamic region over it, see
+* comments in cell/iommu.c
 */
-   if (machine_is(cell))
+   if (fdt_subnode_offset(initial_boot_params, 0, "axon") > 0) {
limit = 0x8000;
-   else
-   limit = MEMBLOCK_ALLOC_ANYWHERE;
+   pr_info("Hash table forced below 2G for Axon IOMMU\n");
+   }
+#endif /* CONFIG_PPC_CELL */
 
-   table = memblock_alloc_base(htab_size_bytes, htab_size_bytes, 
limit);
+   table = memblock_alloc_base(htab_size_bytes, htab_size_bytes,
+   limit);
 
DBG("Hash table allocated at %lx, size: %lx\n", table,
htab_size_bytes);
-- 
2.7.4

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[PATCH 18/41] powerpc/rtas: Don't test for machine type in rtas_initialize()

[Benjamin Herrenschmidt]

The test is unnecessary, the FW_FEATURE_LPAR is sufficient as there
exist no other LPAR type that has RTAS.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/rtas.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 28736ff..030a4d5 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -1174,7 +1174,7 @@ void __init rtas_initialize(void)
 * the stop-self token if any
 */
 #ifdef CONFIG_PPC64
-   if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR)) {
+   if (firmware_has_feature(FW_FEATURE_LPAR)) {
rtas_region = min(ppc64_rma_size, RTAS_INSTANTIATE_MAX);
ibm_suspend_me_token = rtas_token("ibm,suspend-me");
}
-- 
2.7.4

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[PATCH 13/41] powerpc: Put exception configuration in a common place

[Benjamin Herrenschmidt]

The various calls to establish exception endianness and AIL are
now done from a single point using already established CPU and FW
feature bits to decide what to do.

Signed-off-by: Benjamin Herrenschmidt 
---

v3: Rework a bit, move error handling in the functions themselves
and fix a few more cases of compile failures on odd configs
---
 arch/powerpc/include/asm/hvcall.h  | 11 
 arch/powerpc/include/asm/opal.h|  1 +
 arch/powerpc/include/asm/setup.h   | 12 +
 arch/powerpc/kernel/setup_64.c | 55 ++--
 arch/powerpc/kvm/book3s_pr.c   |  6 +--
 arch/powerpc/platforms/powernv/opal.c  | 13 ++---
 arch/powerpc/platforms/pseries/lpar.c  | 20 +---
 arch/powerpc/platforms/pseries/setup.c | 92 --
 8 files changed, 107 insertions(+), 103 deletions(-)

diff --git a/arch/powerpc/include/asm/hvcall.h 
b/arch/powerpc/include/asm/hvcall.h
index 0bc9c28..708edeb 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -431,17 +431,6 @@ static inline unsigned long cmo_get_page_size(void)
 {
return CMO_PageSize;
 }
-
-extern long pSeries_enable_reloc_on_exc(void);
-extern long pSeries_disable_reloc_on_exc(void);
-
-extern long pseries_big_endian_exceptions(void);
-
-#else
-
-#define pSeries_enable_reloc_on_exc()  do {} while (0)
-#define pSeries_disable_reloc_on_exc() do {} while (0)
-
 #endif /* CONFIG_PPC_PSERIES */
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 9d86c66..6135816 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -215,6 +215,7 @@ extern int early_init_dt_scan_opal(unsigned long node, 
const char *uname,
   int depth, void *data);
 extern int early_init_dt_scan_recoverable_ranges(unsigned long node,
 const char *uname, int depth, void *data);
+extern void opal_configure_cores(void);
 
 extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
 extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index fa0687e..1ba25c8 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -30,6 +30,18 @@ void initmem_init(void);
 void setup_panic(void);
 #define ARCH_PANIC_TIMEOUT 180
 
+#ifdef CONFIG_PPC_PSERIES
+extern void pseries_enable_reloc_on_exc(void);
+extern void pseries_disable_reloc_on_exc(void);
+extern void pseries_big_endian_exceptions(void);
+extern void pseries_little_endian_exceptions(void);
+#else
+static inline void pseries_enable_reloc_on_exc(void) {}
+static inline void pseries_disable_reloc_on_exc(void) {}
+static inline void pseries_big_endian_exceptions(void) {}
+static inline void pseries_little_endian_exceptions(void) {}
+#endif /* CONFIG_PPC_PSERIES */
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* _ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index a641753..978c48c 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -69,6 +69,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -205,21 +206,47 @@ static void fixup_boot_paca(void)
get_paca()->data_offset = 0;
 }
 
+static void configure_exceptions(void)
+{
+   /* Setup the trampolines from the lowmem exception vectors
+* to the kdump kernel when not using a relocatable kernel.
+*/
+   setup_kdump_trampoline();
+
+   /* Under a PAPR hypervisor, we need hypercalls */
+   if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
+   /* Enable AIL if possible */
+   pseries_enable_reloc_on_exc();
+
+   /*
+* Tell the hypervisor that we want our exceptions to
+* be taken in little endian mode.
+*
+* We don't call this for big endian as our calling convention
+* makes us always enter in BE, and the call may fail under
+* some circumstances with kdump.
+*/
+#ifdef __LITTLE_ENDIAN__
+   pseries_little_endian_exceptions();
+#endif
+   } else {
+   /* Set endian mode using OPAL */
+   if (firmware_has_feature(FW_FEATURE_OPAL))
+   opal_configure_cores();
+
+   /* Enable AIL if supported, and we are in hypervisor mode */
+   if (cpu_has_feature(CPU_FTR_HVMODE) &&
+   cpu_has_feature(CPU_FTR_ARCH_207S)) {
+   unsigned long lpcr = mfspr(SPRN_LPCR);
+   mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
+   }
+   }
+}
+
 static void cpu_ready_for_interrupts(void)
 {
/* Set IR and DR in PACA MSR */
get_paca()->kernel_msr = MSR_KERNEL;

[PATCH 07/41] powerpc: Move 64-bit memory reserves to setup_arch()

[Benjamin Herrenschmidt]

There is really no need to do them that early, early_setup() runs
before MMU is on, we should do the strict minimum there to get the
MMU going.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup_64.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index e79cf1b..bcc95ac 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -296,16 +296,6 @@ void __init early_setup(unsigned long dt_ptr)
 */
cpu_ready_for_interrupts();
 
-   /* Reserve large chunks of memory for use by CMA for KVM */
-   kvm_cma_reserve();
-
-   /*
-* Reserve any gigantic pages requested on the command line.
-* memblock needs to have been initialized by the time this is
-* called since this will reserve memory.
-*/
-   reserve_hugetlb_gpages();
-
DBG(" <- early_setup()\n");
 
 #ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX
@@ -688,6 +678,17 @@ void __init setup_arch(char **cmdline_p)
dcache_bsize = ppc64_caches.dline_size;
icache_bsize = ppc64_caches.iline_size;
 
+
+   /* Reserve large chunks of memory for use by CMA for KVM */
+   kvm_cma_reserve();
+
+   /*
+* Reserve any gigantic pages requested on the command line.
+* memblock needs to have been initialized by the time this is
+* called since this will reserve memory.
+*/
+   reserve_hugetlb_gpages();
+
if (ppc_md.panic)
setup_panic();
 
@@ -712,7 +713,6 @@ void __init setup_arch(char **cmdline_p)
 #ifdef CONFIG_DUMMY_CONSOLE
conswitchp = _con;
 #endif
-
if (ppc_md.setup_arch)
ppc_md.setup_arch();
 
-- 
2.7.4

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[PATCH 09/41] powerpc: Update obsolete comments in setup_32.c about entry conditions

[Benjamin Herrenschmidt]

early_init() is called in-place before kernel relocation and using
whatever MMU setup exists at the point the kernel is entered.

machine_init() is called after relocation and after some initial
mapping of PAGE_OFFSET has been established (typically using BATs
on 6xx/7xx/7xxx processors or some form of bolted TLB on others).

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup_32.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 34e61d68..3f0aca2 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -61,9 +61,7 @@ int icache_bsize;
 int ucache_bsize;
 
 /*
- * We're called here very early in the boot.  We determine the machine
- * type and call the appropriate low-level setup functions.
- *  -- Cort 
+ * We're called here very early in the boot.
  *
  * Note that the kernel may be running at an address which is different
  * from the address that it was linked at, so we must use RELOC/PTRRELOC
@@ -91,6 +89,10 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
 
 
 /*
+ * This is run before start_kernel(), the kernel has been relocated
+ * and we are running with enough of the MMU enabled to have our
+ * proper kernel virtual addresses
+ *
  * Find out what kind of machine we're on and save any data we need
  * from the early boot process (devtree is copied on pmac by prom_init()).
  * This is called very early on the boot process, after a minimal
-- 
2.7.4

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[PATCH 08/41] powerpc: Move epapr_paravirt_early_init() to early_init_devtree()

[Benjamin Herrenschmidt]

The function is called by both 32-bit and 64-bit early setup right
after early_init_devtree(). All it does is run yet another early
DT parser which is precisely what early_init_devtree() is about,
so move it in there.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/prom.c | 2 ++
 arch/powerpc/kernel/setup_32.c | 3 ---
 arch/powerpc/kernel/setup_64.c | 3 ---
 3 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 946e34f..48434be 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -56,6 +56,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -739,6 +740,7 @@ void __init early_init_devtree(void *params)
/* Scan and build the list of machine check recoverable ranges */
of_scan_flat_dt(early_init_dt_scan_recoverable_ranges, NULL);
 #endif
+   epapr_paravirt_early_init();
 
DBG(" <- early_init_devtree()\n");
 }
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 3d06fab..34e61d68 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -37,7 +37,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 #define DBG(fmt...)
@@ -110,8 +109,6 @@ notrace void __init machine_init(u64 dt_ptr)
/* Do some early initialization based on the flat device tree */
early_init_devtree(__va(dt_ptr));
 
-   epapr_paravirt_early_init();
-
early_init_mmu();
 
probe_machine();
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index bcc95ac..e1b2e6f 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -68,7 +68,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 #ifdef DEBUG
@@ -270,8 +269,6 @@ void __init early_setup(unsigned long dt_ptr)
 */
early_init_devtree(__va(dt_ptr));
 
-   epapr_paravirt_early_init();
-
/* Now we know the logical id of our boot cpu, setup the paca. */
setup_paca([boot_cpuid]);
fixup_boot_paca();
-- 
2.7.4

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[PATCH 03/41] powerpc/prom_init: PTRRELOC is not needed

[Benjamin Herrenschmidt]

There's one line of code still using PTRRELOC in prom_init, it
shouldn't be necessary since that code is relocatable. Take it
out.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/prom_init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 6ee4b72..54e450c 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -1980,7 +1980,7 @@ static void __init prom_check_displays(void)
break;
 
 #ifdef CONFIG_LOGO_LINUX_CLUT224
-   clut = PTRRELOC(logo_linux_clut224.clut);
+   clut = logo_linux_clut224.clut;
for (i = 0; i < logo_linux_clut224.clutsize; i++, clut += 3)
if (prom_set_color(ih, i + 32, clut[0], clut[1],
   clut[2]) != 0)
-- 
2.7.4

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[PATCH 06/41] powerpc: Move 64-bit feature fixup earlier

[Benjamin Herrenschmidt]

Make it part of early_setup() as we really want the feature fixups
to be applied before we turn on the MMU since they can have an impact
on the various assembly path related to MMU management and interrupts.

This makes 64-bit match what 32-bit does.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup_64.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 996bed2..e79cf1b 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -286,6 +286,9 @@ void __init early_setup(unsigned long dt_ptr)
/* Initialize the hash table or TLB handling */
early_init_mmu();
 
+   /* Apply all the dynamic patching */
+   apply_feature_fixups();
+
/*
 * At this point, we can let interrupts switch to virtual mode
 * (the MMU has been setup), so adjust the MSR in the PACA to
@@ -468,8 +471,6 @@ void __init setup_system(void)
 {
DBG(" -> setup_system()\n");
 
-   apply_feature_fixups();
-
/*
 * Unflatten the device-tree passed by prom_init or kexec
 */
-- 
2.7.4

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[PATCH 05/41] powerpc: Factor do_feature_fixup calls

[Benjamin Herrenschmidt]

32 and 64-bit do a similar set of calls early on, we move it all to
a single common function to make the boot code more readable.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/include/asm/feature-fixups.h |  4 
 arch/powerpc/include/asm/synch.h  |  1 -
 arch/powerpc/kernel/setup_32.c| 17 ++---
 arch/powerpc/kernel/setup_64.c| 13 +
 arch/powerpc/lib/feature-fixups.c | 31 +--
 5 files changed, 36 insertions(+), 30 deletions(-)

diff --git a/arch/powerpc/include/asm/feature-fixups.h 
b/arch/powerpc/include/asm/feature-fixups.h
index 9a67a38..57fec8a 100644
--- a/arch/powerpc/include/asm/feature-fixups.h
+++ b/arch/powerpc/include/asm/feature-fixups.h
@@ -184,4 +184,8 @@ label##3:   \
FTR_ENTRY_OFFSET label##1b-label##3b;   \
.popsection;
 
+#ifndef __ASSEMBLY__
+void apply_feature_fixups(void);
+#endif
+
 #endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */
diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h
index c508686..78efe8d 100644
--- a/arch/powerpc/include/asm/synch.h
+++ b/arch/powerpc/include/asm/synch.h
@@ -13,7 +13,6 @@
 extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;
 extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
 void *fixup_end);
-extern void do_final_fixups(void);
 
 static inline void eieio(void)
 {
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index d544fa3..3d06fab 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -73,7 +73,6 @@ int ucache_bsize;
 notrace unsigned long __init early_init(unsigned long dt_ptr)
 {
unsigned long offset = reloc_offset();
-   struct cpu_spec *spec;
 
/* First zero the BSS -- use memset_io, some platforms don't have
 * caches on yet */
@@ -84,21 +83,9 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
 * Identify the CPU type and fix up code sections
 * that depend on which cpu we have.
 */
-   spec = identify_cpu(offset, mfspr(SPRN_PVR));
+   identify_cpu(offset, mfspr(SPRN_PVR));
 
-   do_feature_fixups(spec->cpu_features,
- PTRRELOC(&__start___ftr_fixup),
- PTRRELOC(&__stop___ftr_fixup));
-
-   do_feature_fixups(spec->mmu_features,
- PTRRELOC(&__start___mmu_ftr_fixup),
- PTRRELOC(&__stop___mmu_ftr_fixup));
-
-   do_lwsync_fixups(spec->cpu_features,
-PTRRELOC(&__start___lwsync_fixup),
-PTRRELOC(&__stop___lwsync_fixup));
-
-   do_final_fixups();
+   apply_feature_fixups();
 
return KERNELBASE + offset;
 }
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 96d4a2b..996bed2 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -468,18 +468,7 @@ void __init setup_system(void)
 {
DBG(" -> setup_system()\n");
 
-   /* Apply the CPUs-specific and firmware specific fixups to kernel
-* text (nop out sections not relevant to this CPU or this firmware)
-*/
-   do_feature_fixups(cur_cpu_spec->cpu_features,
- &__start___ftr_fixup, &__stop___ftr_fixup);
-   do_feature_fixups(cur_cpu_spec->mmu_features,
- &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
-   do_feature_fixups(powerpc_firmware_features,
- &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
-   do_lwsync_fixups(cur_cpu_spec->cpu_features,
-&__start___lwsync_fixup, &__stop___lwsync_fixup);
-   do_final_fixups();
+   apply_feature_fixups();
 
/*
 * Unflatten the device-tree passed by prom_init or kexec
diff --git a/arch/powerpc/lib/feature-fixups.c 
b/arch/powerpc/lib/feature-fixups.c
index 7ce3870..d0c72aa 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -20,7 +20,8 @@
 #include 
 #include 
 #include 
-
+#include 
+#include 
 
 struct fixup_entry {
unsigned long   mask;
@@ -130,7 +131,7 @@ void do_lwsync_fixups(unsigned long value, void 
*fixup_start, void *fixup_end)
}
 }
 
-void do_final_fixups(void)
+static void do_final_fixups(void)
 {
 #if defined(CONFIG_PPC64) && defined(CONFIG_RELOCATABLE)
int *src, *dest;
@@ -151,6 +152,32 @@ void do_final_fixups(void)
 #endif
 }
 
+void apply_feature_fixups(void)
+{
+   struct cpu_spec *spec = *PTRRELOC(_cpu_spec);
+
+   /* Apply the CPUs-specific and firmware specific fixups to kernel
+* text (nop out sections not relevant to this CPU or this firmware)
+*/
+   do_feature_fixups(spec->cpu_features,
+ PTRRELOC(&__start___ftr_fixup),
+  

[PATCH 04/41] powerpc: Make PTRRELOC() 32-bit only

[Benjamin Herrenschmidt]

PTRRELOC is only used by 32-bit code since on 32-bit systems, early_init
can be run with relocation off and running at an offset. Define it to
identity on 64-bit

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/include/asm/setup.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index e9d384c..fa0687e 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -19,7 +19,11 @@ extern unsigned long reloc_offset(void);
 extern unsigned long add_reloc_offset(unsigned long);
 extern void reloc_got2(unsigned long);
 
+#ifdef CONFIG_PPC32
 #define PTRRELOC(x)((typeof(x)) add_reloc_offset((unsigned long)(x)))
+#else
+#define PTRRELOC(x)(x)
+#endif
 
 void check_for_initrd(void);
 void initmem_init(void);
-- 
2.7.4

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[PATCH 01/41] dt: Add of_device_compatible_match()

[Benjamin Herrenschmidt]

This provides an equivalent of of_fdt_match() for non-flat trees.

This is more practical than matching an array of of_device_id structs
when converting a bunch of existing users of of_fdt_match().

Signed-off-by: Benjamin Herrenschmidt 
---
 drivers/of/base.c  | 22 ++
 include/linux/of.h |  2 ++
 2 files changed, 24 insertions(+)

diff --git a/drivers/of/base.c b/drivers/of/base.c
index ebf84e3..429c594 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -493,6 +493,28 @@ int of_device_is_compatible(const struct device_node 
*device,
 }
 EXPORT_SYMBOL(of_device_is_compatible);
 
+/** Checks if the device is compatible with any of the entries in
+ *  a NULL terminated array of strings. Returns the best match
+ *  score or 0.
+ */
+int of_device_compatible_match(struct device_node *device,
+  const char *const *compat)
+{
+   unsigned int tmp, score = 0;
+
+   if (!compat)
+   return 0;
+
+   while (*compat) {
+   tmp = of_device_is_compatible(device, *compat);
+   if (tmp && (score == 0 || (tmp < score)))
+   score = tmp;
+   compat++;
+   }
+
+   return score;
+}
+
 /**
  * of_machine_is_compatible - Test root of device tree for a given compatible 
value
  * @compat: compatible string to look for in root node's compatible property.
diff --git a/include/linux/of.h b/include/linux/of.h
index 74eb28c..33c184d 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -324,6 +324,8 @@ extern int of_property_read_string_helper(const struct 
device_node *np,
  const char **out_strs, size_t sz, 
int index);
 extern int of_device_is_compatible(const struct device_node *device,
   const char *);
+extern int of_device_compatible_match(struct device_node *device,
+ const char *const *compat);
 extern bool of_device_is_available(const struct device_node *device);
 extern bool of_device_is_big_endian(const struct device_node *device);
 extern const void *of_get_property(const struct device_node *node,
-- 
2.7.4

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[PATCH 02/41] drm: Fix broken use of _PAGE_NO_CACHE on powerpc

[Benjamin Herrenschmidt]

That constant no longer exist. Use the proper accessor instead

Signed-off-by: Benjamin Herrenschmidt 
---
 drivers/gpu/drm/drm_memory.c  | 2 +-
 drivers/gpu/drm/drm_scatter.c | 2 +-
 drivers/gpu/drm/drm_vm.c  | 4 ++--
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/drm_memory.c b/drivers/gpu/drm/drm_memory.c
index 87a8cb7..fc0ebd2 100644
--- a/drivers/gpu/drm/drm_memory.c
+++ b/drivers/gpu/drm/drm_memory.c
@@ -44,7 +44,7 @@
 # include 
 #else
 # ifdef __powerpc__
-#  define PAGE_AGP __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
+#  define PAGE_AGP pgprot_noncached_wc(PAGE_KERNEL)
 # else
 #  define PAGE_AGP PAGE_KERNEL
 # endif
diff --git a/drivers/gpu/drm/drm_scatter.c b/drivers/gpu/drm/drm_scatter.c
index 4f0f3b3..bf70431 100644
--- a/drivers/gpu/drm/drm_scatter.c
+++ b/drivers/gpu/drm/drm_scatter.c
@@ -41,7 +41,7 @@
 static inline void *drm_vmalloc_dma(unsigned long size)
 {
 #if defined(__powerpc__) && defined(CONFIG_NOT_COHERENT_CACHE)
-   return __vmalloc(size, GFP_KERNEL, PAGE_KERNEL | _PAGE_NO_CACHE);
+   return __vmalloc(size, GFP_KERNEL, pgprot_noncached_wc(PAGE_KERNEL));
 #else
return vmalloc_32(size);
 #endif
diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c
index ac9f4b3..7e9f642 100644
--- a/drivers/gpu/drm/drm_vm.c
+++ b/drivers/gpu/drm/drm_vm.c
@@ -80,7 +80,7 @@ static pgprot_t drm_dma_prot(uint32_t map_type, struct 
vm_area_struct *vma)
pgprot_t tmp = vm_get_page_prot(vma->vm_flags);
 
 #if defined(__powerpc__) && defined(CONFIG_NOT_COHERENT_CACHE)
-   tmp |= _PAGE_NO_CACHE;
+   tmp = pgprot_noncached_wc(tmp);
 #endif
return tmp;
 }
@@ -593,7 +593,7 @@ static int drm_mmap_locked(struct file *filp, struct 
vm_area_struct *vma)
 * pages and mappings in fault()
 */
 #if defined(__powerpc__)
-   pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
+   vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 #endif
vma->vm_ops = _vm_ops;
break;
-- 
2.7.4

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[PATCH v2 00/41] Reorganize setup code and merge 32 and 64-bit setup_arch()

[Benjamin Herrenschmidt]

This series reorganizes the setup code, moving probe_machine() later than
when it's currently done, and sync'ing 32-bit and 64-bit enough to merge
their implementations of setup_arch(). We get rid of ppc64 setup_system()
which is subsumed by the new setup_arch().

Note: The first 2 patches could go separately. The first one is a pre
requisite for the ppc32 move of probe_machine(). The second one a general
bug fix for recent kernels which I included here so my test kernels
could build but the rest of the series doesn't depend on it.

Finally I added a few more random build fixes at the end.


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Re: [PATCH] powerpc/pci: Fix build with PCI_IOV=y and EEH=n

[Russell Currey]

On Tue, 2016-07-05 at 14:13 +1000, Michael Ellerman wrote:
> Despite attempting to fix this in commit fb36e9073693 ("powerpc/pci: Fix
> SRIOV not building without EEH enabled"), the build is still broken when
> PCI_IOV=y and EEH=n (eg. g5_defconfig with PCI_IOV=y):
> 
>   arch/powerpc/kernel/pci_dn.c: In function ‘remove_dev_pci_data’:
>   arch/powerpc/kernel/pci_dn.c:230:18: error: unused variable ‘edev’
> 
> Signed-off-by: Michael Ellerman 
> ---

Mistakes were made.

Acked-by: Russell Currey 
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Re: [PATCH 1/2] qe/ic: move qe_ic_init from platforms to irqchip

[Jason Cooper]

Hi Zhao Qiang,

Please reword your subject line to conform to the standard in irqchip
(since that's where the code is added).  Also, please adjust the subject
line to express *why* the change is being made.

On Tue, Jul 05, 2016 at 09:46:58AM +0800, Zhao Qiang wrote:
> The codes of qe_ic_init in platforms are redundant,
> move them to qe_ic under irqchip

This needs to be a lot more clear.  How is backwards compatibility
preserved?  Why is lookup by type "qeic" dropped?  In short, please
explain everything that looks funny so we don't have to guess.

> Signed-off-by: Zhao Qiang 
> ---
>  arch/powerpc/platforms/83xx/misc.c| 15 ---
>  arch/powerpc/platforms/85xx/corenet_generic.c |  9 -
>  arch/powerpc/platforms/85xx/mpc85xx_mds.c | 14 --
>  arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 16 
>  arch/powerpc/platforms/85xx/twr_p102x.c   | 14 --
>  drivers/irqchip/qe_ic.c   | 14 ++
>  6 files changed, 14 insertions(+), 68 deletions(-)
> 
> diff --git a/arch/powerpc/platforms/83xx/misc.c 
> b/arch/powerpc/platforms/83xx/misc.c
> index 7e923ca..9431fc7 100644
> --- a/arch/powerpc/platforms/83xx/misc.c
> +++ b/arch/powerpc/platforms/83xx/misc.c
> @@ -93,24 +93,9 @@ void __init mpc83xx_ipic_init_IRQ(void)
>  }
>  
>  #ifdef CONFIG_QUICC_ENGINE
> -void __init mpc83xx_qe_init_IRQ(void)
> -{
> - struct device_node *np;
> -
> - np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
> - if (!np) {
> - np = of_find_node_by_type(NULL, "qeic");
> - if (!np)
> - return;
> - }

This block isn't preserved in the irqchip driver.  Why not?

> - qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
> - of_node_put(np);
> -}
> -
>  void __init mpc83xx_ipic_and_qe_init_IRQ(void)
>  {
>   mpc83xx_ipic_init_IRQ();
> - mpc83xx_qe_init_IRQ();
>  }
>  #endif /* CONFIG_QUICC_ENGINE */
>  
> diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c 
> b/arch/powerpc/platforms/85xx/corenet_generic.c
> index a2b0bc8..526fc2b 100644
> --- a/arch/powerpc/platforms/85xx/corenet_generic.c
> +++ b/arch/powerpc/platforms/85xx/corenet_generic.c
> @@ -41,8 +41,6 @@ void __init corenet_gen_pic_init(void)
>   unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
>   MPIC_NO_RESET;
>  
> - struct device_node *np;
> -
>   if (ppc_md.get_irq == mpic_get_coreint_irq)
>   flags |= MPIC_ENABLE_COREINT;
>  
> @@ -50,13 +48,6 @@ void __init corenet_gen_pic_init(void)
>   BUG_ON(mpic == NULL);
>  
>   mpic_init(mpic);
> -
> - np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
> - if (np) {
> - qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
> - qe_ic_cascade_high_mpic);
> - of_node_put(np);
> - }
>  }
>  
>  /*
> diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c 
> b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
> index f61cbe2..7ae4901 100644
> --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
> +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
> @@ -279,20 +279,6 @@ static void __init mpc85xx_mds_qeic_init(void)
>   of_node_put(np);
>   return;
>   }
> -
> - np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
> - if (!np) {
> - np = of_find_node_by_type(NULL, "qeic");
> - if (!np)
> - return;
> - }
> -
> - if (machine_is(p1021_mds))
> - qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
> - qe_ic_cascade_high_mpic);
> - else
> - qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);

This block is also not preserved.  Nor explained in the commit log.  Is
it really ok to drop it?  If so, why?

> - of_node_put(np);
>  }
>  #else
>  static void __init mpc85xx_mds_qe_init(void) { }
> diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c 
> b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
> index 3f4dad1..779f54f 100644
> --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
> +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
> @@ -49,10 +49,6 @@ void __init mpc85xx_rdb_pic_init(void)
>   struct mpic *mpic;
>   unsigned long root = of_get_flat_dt_root();
>  
> -#ifdef CONFIG_QUICC_ENGINE
> - struct device_node *np;
> -#endif
> -
>   if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
>   mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
>   MPIC_BIG_ENDIAN |
> @@ -67,18 +63,6 @@ void __init mpc85xx_rdb_pic_init(void)
>  
>   BUG_ON(mpic == NULL);
>   mpic_init(mpic);
> -
> -#ifdef CONFIG_QUICC_ENGINE
> - np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
> - if (np) {
> - qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
> - qe_ic_cascade_high_mpic);
> - of_node_put(np);
> -
> - } else
> -   

[PATCH 2/2] qe/ic: refactor qe_ic to simplify

[Zhao Qiang]

there are init_qe_ic_sysfs and qeic_of_init, refactor
them.

Signed-off-by: Zhao Qiang 
---
 drivers/irqchip/qe_ic.c| 83 +-
 include/soc/fsl/qe/qe_ic.h |  7 
 2 files changed, 45 insertions(+), 45 deletions(-)

diff --git a/drivers/irqchip/qe_ic.c b/drivers/irqchip/qe_ic.c
index f7f9a81..46652c0 100644
--- a/drivers/irqchip/qe_ic.c
+++ b/drivers/irqchip/qe_ic.c
@@ -317,27 +317,35 @@ unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)
return irq_linear_revmap(qe_ic->irqhost, irq);
 }
 
-void __init qe_ic_init(struct device_node *node, unsigned int flags,
-  void (*low_handler)(struct irq_desc *desc),
-  void (*high_handler)(struct irq_desc *desc))
+static int __init qe_ic_init(unsigned int flags)
 {
+   struct device_node *node;
struct qe_ic *qe_ic;
struct resource res;
-   u32 temp = 0, ret, high_active = 0;
+   u32 temp = 0, high_active = 0;
+   int ret = 0;
+
+   node = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+   if (!node)
+   return -ENODEV;
 
ret = of_address_to_resource(node, 0, );
-   if (ret)
-   return;
+   if (ret) {
+   ret = -ENODEV;
+   goto err_put_node;
+   }
 
qe_ic = kzalloc(sizeof(*qe_ic), GFP_KERNEL);
-   if (qe_ic == NULL)
-   return;
+   if (qe_ic == NULL) {
+   ret = -ENOMEM;
+   goto err_put_node;
+   }
 
qe_ic->irqhost = irq_domain_add_linear(node, NR_QE_IC_INTS,
   _ic_host_ops, qe_ic);
if (qe_ic->irqhost == NULL) {
-   kfree(qe_ic);
-   return;
+   ret = -ENOMEM;
+   goto err_free_qe_ic;
}
 
qe_ic->regs = ioremap(res.start, resource_size());
@@ -348,9 +356,9 @@ void __init qe_ic_init(struct device_node *node, unsigned 
int flags,
qe_ic->virq_low = irq_of_parse_and_map(node, 1);
 
if (qe_ic->virq_low == NO_IRQ) {
-   printk(KERN_ERR "Failed to map QE_IC low IRQ\n");
-   kfree(qe_ic);
-   return;
+   pr_err("Failed to map QE_IC low IRQ\n");
+   ret = -ENOMEM;
+   goto err_domain_remove;
}
 
/* default priority scheme is grouped. If spread mode is*/
@@ -377,13 +385,23 @@ void __init qe_ic_init(struct device_node *node, unsigned 
int flags,
qe_ic_write(qe_ic->regs, QEIC_CICR, temp);
 
irq_set_handler_data(qe_ic->virq_low, qe_ic);
-   irq_set_chained_handler(qe_ic->virq_low, low_handler);
+   irq_set_chained_handler(qe_ic->virq_low, qe_ic_cascade_low_mpic);
 
if (qe_ic->virq_high != NO_IRQ &&
qe_ic->virq_high != qe_ic->virq_low) {
irq_set_handler_data(qe_ic->virq_high, qe_ic);
-   irq_set_chained_handler(qe_ic->virq_high, high_handler);
+   irq_set_chained_handler(qe_ic->virq_high,
+   qe_ic_cascade_high_mpic);
}
+   return ret;
+
+err_domain_remove:
+   irq_domain_remove(qe_ic->irqhost);
+err_free_qe_ic:
+   kfree(qe_ic);
+err_put_node:
+   of_node_put(node);
+   return ret;
 }
 
 void qe_ic_set_highest_priority(unsigned int virq, int high)
@@ -490,37 +508,26 @@ static struct device device_qe_ic = {
.bus = _ic_subsys,
 };
 
-static int __init init_qe_ic_sysfs(void)
+static int __init init_qe_ic(void)
 {
-   int rc;
+   int ret;
 
-   printk(KERN_DEBUG "Registering qe_ic with sysfs...\n");
+   ret = qe_ic_init(0);
+   if (ret)
+   return ret;
 
-   rc = subsys_system_register(_ic_subsys, NULL);
-   if (rc) {
-   printk(KERN_ERR "Failed registering qe_ic sys class\n");
+   ret = subsys_system_register(_ic_subsys, NULL);
+   if (ret) {
+   pr_err("Failed registering qe_ic sys class\n");
return -ENODEV;
}
-   rc = device_register(_qe_ic);
-   if (rc) {
-   printk(KERN_ERR "Failed registering qe_ic sys device\n");
+   ret = device_register(_qe_ic);
+   if (ret) {
+   pr_err("Failed registering qe_ic sys device\n");
return -ENODEV;
}
-   return 0;
-}
 
-static int __init qeic_of_init(void)
-{
-   struct device_node *np;
-
-   np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
-   if (np) {
-   qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
-  qe_ic_cascade_high_mpic);
-   of_node_put(np);
-   }
return 0;
 }
 
-subsys_initcall(qeic_of_init);
-subsys_initcall(init_qe_ic_sysfs);
+subsys_initcall(init_qe_ic);
diff --git a/include/soc/fsl/qe/qe_ic.h b/include/soc/fsl/qe/qe_ic.h
index 1e155ca..6113699 100644
--- a/include/soc/fsl/qe/qe_ic.h
+++ b/include/soc/fsl/qe/qe_ic.h
@@ -58,16 

[PATCH] powerpc/pci: Fix build with PCI_IOV=y and EEH=n

[Michael Ellerman]

Despite attempting to fix this in commit fb36e9073693 ("powerpc/pci: Fix
SRIOV not building without EEH enabled"), the build is still broken when
PCI_IOV=y and EEH=n (eg. g5_defconfig with PCI_IOV=y):

  arch/powerpc/kernel/pci_dn.c: In function ‘remove_dev_pci_data’:
  arch/powerpc/kernel/pci_dn.c:230:18: error: unused variable ‘edev’

Signed-off-by: Michael Ellerman 
---
 arch/powerpc/kernel/pci_dn.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index bfe60a1e70d9..e056c9e7b474 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -227,7 +227,9 @@ void remove_dev_pci_data(struct pci_dev *pdev)
 #ifdef CONFIG_PCI_IOV
struct pci_dn *parent;
struct pci_dn *pdn, *tmp;
+#ifdef CONFIG_EEH
struct eeh_dev *edev;
+#endif
int i;
 
/*
-- 
2.7.4

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Re: [PATCH v2] cxl: Refine slice error debug messages

[Ian Munsie]

I agree with Mikey - this needs a description. But otherwise it looks
good to me, and I'll be happy if it stops any more AFU developers from
reporting their bugs to us, so happy to add this now:

Acked-by: Ian Munsie 

Excerpts from Philippe Bergheaud's message of 2016-07-04 17:07:36 +0200:
> Signed-off-by: Philippe Bergheaud 
> ---
> Changes since v1:
>   - Rebased on Ian's patch
> "cxl: Abstract the differences between the PSL and XSL"
> 
>  drivers/misc/cxl/cxl.h| 15 +++
>  drivers/misc/cxl/guest.c  |  9 ++---
>  drivers/misc/cxl/irq.c| 29 +
>  drivers/misc/cxl/native.c | 12 +++-
>  4 files changed, 57 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
> index 7745252..d928a8c 100644
> --- a/drivers/misc/cxl/cxl.h
> +++ b/drivers/misc/cxl/cxl.h
> @@ -188,6 +188,18 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An = {0x0A0};
>  #define CXL_PSL_ID_An_F(1ull << (63-31))
>  #define CXL_PSL_ID_An_L(1ull << (63-30))
>  
> +/** CXL_PSL_SERR_An /
> +#define CXL_PSL_SERR_An_afuto(1ull << (63-0))
> +#define CXL_PSL_SERR_An_afudis(1ull << (63-1))
> +#define CXL_PSL_SERR_An_afuov(1ull << (63-2))
> +#define CXL_PSL_SERR_An_badsrc(1ull << (63-3))
> +#define CXL_PSL_SERR_An_badctx(1ull << (63-4))
> +#define CXL_PSL_SERR_An_llcmdis(1ull << (63-5))
> +#define CXL_PSL_SERR_An_llcmdto(1ull << (63-6))
> +#define CXL_PSL_SERR_An_afupar(1ull << (63-7))
> +#define CXL_PSL_SERR_An_afudup(1ull << (63-8))
> +#define CXL_PSL_SERR_An_AE(1ull << (63-30))
> +
>  /** CXL_PSL_SCNTL_An 
> /
>  #define CXL_PSL_SCNTL_An_CR  (0x1ull << (63-15))
>  /* Programming Modes: */
> @@ -905,4 +917,7 @@ extern const struct cxl_backend_ops *cxl_ops;
>  
>  /* check if the given pci_dev is on the the cxl vphb bus */
>  bool cxl_pci_is_vphb_device(struct pci_dev *dev);
> +
> +/* decode AFU error bits in the PSL register PSL_SERR_An */
> +void cxl_afu_decode_psl_serr(struct cxl_afu *afu, u64 serr);
>  #endif
> diff --git a/drivers/misc/cxl/guest.c b/drivers/misc/cxl/guest.c
> index bc8d0b9..d516d0a 100644
> --- a/drivers/misc/cxl/guest.c
> +++ b/drivers/misc/cxl/guest.c
> @@ -196,15 +196,18 @@ static irqreturn_t guest_slice_irq_err(int irq, void 
> *data)
>  {
>  struct cxl_afu *afu = data;
>  int rc;
> -u64 serr;
> +u64 serr, afu_error, dsisr;
>  
> -WARN(irq, "CXL SLICE ERROR interrupt %i\n", irq);
>  rc = cxl_h_get_fn_error_interrupt(afu->guest->handle, );
>  if (rc) {
>  dev_crit(>dev, "Couldn't read PSL_SERR_An: %d\n", rc);
>  return IRQ_HANDLED;
>  }
> -dev_crit(>dev, "PSL_SERR_An: 0x%.16llx\n", serr);
> +afu_error = cxl_p2n_read(afu, CXL_AFU_ERR_An);
> +dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An);
> +cxl_afu_decode_psl_serr(afu, serr);
> +dev_crit(>dev, "AFU_ERR_An: 0x%.16llx\n", afu_error);
> +dev_crit(>dev, "PSL_DSISR_An: 0x%.16llx\n", dsisr);
>  
>  rc = cxl_h_ack_fn_error_interrupt(afu->guest->handle, serr);
>  if (rc)
> diff --git a/drivers/misc/cxl/irq.c b/drivers/misc/cxl/irq.c
> index 8def455..40fffe4 100644
> --- a/drivers/misc/cxl/irq.c
> +++ b/drivers/misc/cxl/irq.c
> @@ -374,3 +374,32 @@ void afu_release_irqs(struct cxl_context *ctx, void 
> *cookie)
>  
>  ctx->irq_count = 0;
>  }
> +
> +void cxl_afu_decode_psl_serr(struct cxl_afu *afu, u64 serr)
> +{
> +dev_crit(>dev,
> + "PSL Slice error received. Check AFU for root cause.\n");
> +dev_crit(>dev, "PSL_SERR_An: 0x%016llx\n", serr);
> +if (serr & CXL_PSL_SERR_An_afuto)
> +dev_crit(>dev, "AFU MMIO Timeout\n");
> +if (serr & CXL_PSL_SERR_An_afudis)
> +dev_crit(>dev,
> + "MMIO targeted Accelerator that was not enabled\n");
> +if (serr & CXL_PSL_SERR_An_afuov)
> +dev_crit(>dev, "AFU CTAG Overflow\n");
> +if (serr & CXL_PSL_SERR_An_badsrc)
> +dev_crit(>dev, "Bad Interrupt Source\n");
> +if (serr & CXL_PSL_SERR_An_badctx)
> +dev_crit(>dev, "Bad Context Handle\n");
> +if (serr & CXL_PSL_SERR_An_llcmdis)
> +dev_crit(>dev, "LLCMD to Disabled AFU\n");
> +if (serr & CXL_PSL_SERR_An_llcmdto)
> +dev_crit(>dev, "LLCMD Timeout to AFU\n");
> +if (serr & CXL_PSL_SERR_An_afupar)
> +dev_crit(>dev, "AFU MMIO Parity Error\n");
> +if (serr & CXL_PSL_SERR_An_afudup)
> +dev_crit(>dev, "AFU MMIO Duplicate CTAG Error\n");
> +if (serr & CXL_PSL_SERR_An_AE)
> +dev_crit(>dev,
> + "AFU asserted JDONE with JERROR in AFU Directed Mode\n");
> +}
> diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
> index d867326..c4d8815 100644
> --- a/drivers/misc/cxl/native.c
> +++ b/drivers/misc/cxl/native.c
> @@ -767,7 +767,7 @@ void 

Re: [PATCH 5/6] powerpc/perf: Power9 PMU support

[Madhavan Srinivasan]

On Tuesday 05 July 2016 06:30 AM, Michael Neuling wrote:
> On Sun, 2016-06-26 at 23:07 +0530, Madhavan Srinivasan wrote:
>
> There is still identical code here between power8 and power9. Any reason
> you can't merge these too?  The two bhrb functions seem to be the same.
In PowerISA v3.0, more bhrb filtering modes are added. And if made common,
we need to have checks for these new filtering mode which can be avoided.
Yes, right now its the same code, but will post the power9 bhrb filtering
mode patches soon.

Maddy

>
> Mikey
>
>> This patch adds base enablement for the power9 PMU.
>>
>> Signed-off-by: Madhavan Srinivasan 
>> ---
>>  arch/powerpc/perf/Makefile |   2 +-
>>  arch/powerpc/perf/power9-pmu.c | 271 
>> +
>>  2 files changed, 272 insertions(+), 1 deletion(-)
>>  create mode 100644 arch/powerpc/perf/power9-pmu.c
>>
>> diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
>> index 92f8ea46238b..f102d5370101 100644
>> --- a/arch/powerpc/perf/Makefile
>> +++ b/arch/powerpc/perf/Makefile
>> @@ -5,7 +5,7 @@ obj-$(CONFIG_PERF_EVENTS)+= callchain.o perf_regs.o
>>  obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o bhrb.o
>>  obj64-$(CONFIG_PPC_PERF_CTRS)   += power4-pmu.o ppc970-pmu.o 
>> power5-pmu.o \
>> power5+-pmu.o power6-pmu.o power7-pmu.o \
>> -   isa207-common.o power8-pmu.o
>> +   isa207-common.o power8-pmu.o power9-pmu.o
>>  obj32-$(CONFIG_PPC_PERF_CTRS)   += mpc7450-pmu.o
>>  
>>  obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
>> diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c
>> new file mode 100644
>> index ..a2798b5915b9
>> --- /dev/null
>> +++ b/arch/powerpc/perf/power9-pmu.c
>> @@ -0,0 +1,271 @@
>> +/*
>> + * Performance counter support for POWER9 processors.
>> + *
>> + * Copyright 2009 Paul Mackerras, IBM Corporation.
>> + * Copyright 2013 Michael Ellerman, IBM Corporation.
>> + * Copyright 2016 Madhavan Srinivasan, IBM Corporation.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * as published by the Free Software Foundation; either version
>> + * 2 of the License, or later version.
>> + */
>> +
>> +#define pr_fmt(fmt) "power9-pmu: " fmt
>> +
>> +#include "isa207-common.h"
>> +
>> +/*
>> + * Some power9 event codes.
>> + */
>> +#define EVENT(_name, _code) _name = _code,
>> +
>> +enum {
>> +#include "power9-events-list.h"
>> +};
>> +
>> +#undef EVENT
>> +
>> +/* MMCRA IFM bits - POWER9 */
>> +#define POWER9_MMCRA_IFM1   0x4000UL
>> +#define POWER9_MMCRA_IFM2   0x8000UL
>> +#define POWER9_MMCRA_IFM3   0xC000UL
>> +
>> +
>> +PMU_FORMAT_ATTR(event,  "config:0-49");
>> +PMU_FORMAT_ATTR(pmcxsel,"config:0-7");
>> +PMU_FORMAT_ATTR(mark,   "config:8");
>> +PMU_FORMAT_ATTR(combine,"config:11");
>> +PMU_FORMAT_ATTR(unit,   "config:12-15");
>> +PMU_FORMAT_ATTR(pmc,"config:16-19");
>> +PMU_FORMAT_ATTR(cache_sel,  "config:20-23");
>> +PMU_FORMAT_ATTR(sample_mode,"config:24-28");
>> +PMU_FORMAT_ATTR(thresh_sel, "config:29-31");
>> +PMU_FORMAT_ATTR(thresh_stop,"config:32-35");
>> +PMU_FORMAT_ATTR(thresh_start,   "config:36-39");
>> +PMU_FORMAT_ATTR(thresh_cmp, "config:40-49");
>> +
>> +static struct attribute *power9_pmu_format_attr[] = {
>> +_attr_event.attr,
>> +_attr_pmcxsel.attr,
>> +_attr_mark.attr,
>> +_attr_combine.attr,
>> +_attr_unit.attr,
>> +_attr_pmc.attr,
>> +_attr_cache_sel.attr,
>> +_attr_sample_mode.attr,
>> +_attr_thresh_sel.attr,
>> +_attr_thresh_stop.attr,
>> +_attr_thresh_start.attr,
>> +_attr_thresh_cmp.attr,
>> +NULL,
>> +};
>> +
>> +struct attribute_group power9_pmu_format_group = {
>> +.name = "format",
>> +.attrs = power9_pmu_format_attr,
>> +};
>> +
>> +static const struct attribute_group *power9_pmu_attr_groups[] = {
>> +_pmu_format_group,
>> +NULL,
>> +};
>> +
>> +static int power9_generic_events[] = {
>> +[PERF_COUNT_HW_CPU_CYCLES] =PM_CYC,
>> +[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =   PM_ICT_NOSLOT_CYC,
>> +[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =PM_CMPLU_STALL,
>> +[PERF_COUNT_HW_INSTRUCTIONS] =  PM_INST_CMPL,
>> +[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] =   PM_BRU_CMPL,
>> +[PERF_COUNT_HW_BRANCH_MISSES] = PM_BR_MPRED_CMPL,
>> +[PERF_COUNT_HW_CACHE_REFERENCES] =  PM_LD_REF_L1,
>> +[PERF_COUNT_HW_CACHE_MISSES] =  PM_LD_MISS_L1_FIN,
>> +};
>> +
>> +static u64 power9_bhrb_filter_map(u64 branch_sample_type)
>> +{
>> +u64 pmu_bhrb_filter = 0;
>> +
>> +/* BHRB and regular PMU events share the same privilege state
>> + 

Re: [PATCH] powerpc: fix oops in pcibios_release_device() after pcibios_free_controller()

[Benjamin Herrenschmidt]

On Mon, 2016-07-04 at 22:44 -0300, Mauricio Faria de Oliveira wrote:
> It's possible to hit an oops/crash if pcibios_release_device() accesses the
> phb struct and it had been freed earlier -- by pcibios_free_controller() --
> as the memory it pointed to can be reused.
> 
> If after reuse 'phb->controller_ops.release_device' is non-NULL it will be
> called, but it points to an invalid location (that function pointer is not
> set anywhere in the code, so if it's non-NULL, that's not correct), and so
> it hits an oops and the system crashes.
> 
> The solution is to verify whether 'phb' is still in 'hose_list' before any
> access to it in pcibios_release_device() -- as it is removed from the list
> by pcibios_free_controller() -- and ensure it cannot be used after kfree().
> 
> That problem can happen with the pSeries platform's DLPAR remove operation
> if references to devices are held until after the pcibios_free_controller()
> function runs, and then released - exercising pcibios_release_device() path.

Have you considered instead adding a kref to the PHB and only freeing
it when all devices have been freed ? Or it's too hard to tract device
creation ?

Ben.

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[PATCH 1/2] qe/ic: move qe_ic_init from platforms to irqchip

[Zhao Qiang]

The codes of qe_ic_init in platforms are redundant,
move them to qe_ic under irqchip

Signed-off-by: Zhao Qiang 
---
 arch/powerpc/platforms/83xx/misc.c| 15 ---
 arch/powerpc/platforms/85xx/corenet_generic.c |  9 -
 arch/powerpc/platforms/85xx/mpc85xx_mds.c | 14 --
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 16 
 arch/powerpc/platforms/85xx/twr_p102x.c   | 14 --
 drivers/irqchip/qe_ic.c   | 14 ++
 6 files changed, 14 insertions(+), 68 deletions(-)

diff --git a/arch/powerpc/platforms/83xx/misc.c 
b/arch/powerpc/platforms/83xx/misc.c
index 7e923ca..9431fc7 100644
--- a/arch/powerpc/platforms/83xx/misc.c
+++ b/arch/powerpc/platforms/83xx/misc.c
@@ -93,24 +93,9 @@ void __init mpc83xx_ipic_init_IRQ(void)
 }
 
 #ifdef CONFIG_QUICC_ENGINE
-void __init mpc83xx_qe_init_IRQ(void)
-{
-   struct device_node *np;
-
-   np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
-   if (!np) {
-   np = of_find_node_by_type(NULL, "qeic");
-   if (!np)
-   return;
-   }
-   qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
-   of_node_put(np);
-}
-
 void __init mpc83xx_ipic_and_qe_init_IRQ(void)
 {
mpc83xx_ipic_init_IRQ();
-   mpc83xx_qe_init_IRQ();
 }
 #endif /* CONFIG_QUICC_ENGINE */
 
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c 
b/arch/powerpc/platforms/85xx/corenet_generic.c
index a2b0bc8..526fc2b 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -41,8 +41,6 @@ void __init corenet_gen_pic_init(void)
unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
MPIC_NO_RESET;
 
-   struct device_node *np;
-
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
 
@@ -50,13 +48,6 @@ void __init corenet_gen_pic_init(void)
BUG_ON(mpic == NULL);
 
mpic_init(mpic);
-
-   np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
-   if (np) {
-   qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
-   qe_ic_cascade_high_mpic);
-   of_node_put(np);
-   }
 }
 
 /*
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c 
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index f61cbe2..7ae4901 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -279,20 +279,6 @@ static void __init mpc85xx_mds_qeic_init(void)
of_node_put(np);
return;
}
-
-   np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
-   if (!np) {
-   np = of_find_node_by_type(NULL, "qeic");
-   if (!np)
-   return;
-   }
-
-   if (machine_is(p1021_mds))
-   qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
-   qe_ic_cascade_high_mpic);
-   else
-   qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);
-   of_node_put(np);
 }
 #else
 static void __init mpc85xx_mds_qe_init(void) { }
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c 
b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 3f4dad1..779f54f 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -49,10 +49,6 @@ void __init mpc85xx_rdb_pic_init(void)
struct mpic *mpic;
unsigned long root = of_get_flat_dt_root();
 
-#ifdef CONFIG_QUICC_ENGINE
-   struct device_node *np;
-#endif
-
if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
MPIC_BIG_ENDIAN |
@@ -67,18 +63,6 @@ void __init mpc85xx_rdb_pic_init(void)
 
BUG_ON(mpic == NULL);
mpic_init(mpic);
-
-#ifdef CONFIG_QUICC_ENGINE
-   np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
-   if (np) {
-   qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
-   qe_ic_cascade_high_mpic);
-   of_node_put(np);
-
-   } else
-   pr_err("%s: Could not find qe-ic node\n", __func__);
-#endif
-
 }
 
 /*
diff --git a/arch/powerpc/platforms/85xx/twr_p102x.c 
b/arch/powerpc/platforms/85xx/twr_p102x.c
index 71bc255..603e244 100644
--- a/arch/powerpc/platforms/85xx/twr_p102x.c
+++ b/arch/powerpc/platforms/85xx/twr_p102x.c
@@ -35,26 +35,12 @@ static void __init twr_p1025_pic_init(void)
 {
struct mpic *mpic;
 
-#ifdef CONFIG_QUICC_ENGINE
-   struct device_node *np;
-#endif
-
mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC  ");
 
BUG_ON(mpic == NULL);
mpic_init(mpic);
-
-#ifdef CONFIG_QUICC_ENGINE
-   np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
-   if (np) {
-

Re: [PATCH 5/6] powerpc/perf: Power9 PMU support

[Michael Neuling]

On Sun, 2016-06-26 at 23:07 +0530, Madhavan Srinivasan wrote:
> 


There is still identical code here between power8 and power9. Any reason
you can't merge these too?  The two bhrb functions seem to be the same.

Mikey

> This patch adds base enablement for the power9 PMU.
> 
> Signed-off-by: Madhavan Srinivasan 
> ---
>  arch/powerpc/perf/Makefile |   2 +-
>  arch/powerpc/perf/power9-pmu.c | 271 
> +
>  2 files changed, 272 insertions(+), 1 deletion(-)
>  create mode 100644 arch/powerpc/perf/power9-pmu.c
> 
> diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
> index 92f8ea46238b..f102d5370101 100644
> --- a/arch/powerpc/perf/Makefile
> +++ b/arch/powerpc/perf/Makefile
> @@ -5,7 +5,7 @@ obj-$(CONFIG_PERF_EVENTS) += callchain.o perf_regs.o
>  obj-$(CONFIG_PPC_PERF_CTRS)  += core-book3s.o bhrb.o
>  obj64-$(CONFIG_PPC_PERF_CTRS)+= power4-pmu.o ppc970-pmu.o 
> power5-pmu.o \
>      power5+-pmu.o power6-pmu.o power7-pmu.o \
> -    isa207-common.o power8-pmu.o
> +    isa207-common.o power8-pmu.o power9-pmu.o
>  obj32-$(CONFIG_PPC_PERF_CTRS)+= mpc7450-pmu.o
>  
>  obj-$(CONFIG_FSL_EMB_PERF_EVENT) += core-fsl-emb.o
> diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c
> new file mode 100644
> index ..a2798b5915b9
> --- /dev/null
> +++ b/arch/powerpc/perf/power9-pmu.c
> @@ -0,0 +1,271 @@
> +/*
> + * Performance counter support for POWER9 processors.
> + *
> + * Copyright 2009 Paul Mackerras, IBM Corporation.
> + * Copyright 2013 Michael Ellerman, IBM Corporation.
> + * Copyright 2016 Madhavan Srinivasan, IBM Corporation.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or later version.
> + */
> +
> +#define pr_fmt(fmt)  "power9-pmu: " fmt
> +
> +#include "isa207-common.h"
> +
> +/*
> + * Some power9 event codes.
> + */
> +#define EVENT(_name, _code)  _name = _code,
> +
> +enum {
> +#include "power9-events-list.h"
> +};
> +
> +#undef EVENT
> +
> +/* MMCRA IFM bits - POWER9 */
> +#define POWER9_MMCRA_IFM10x4000UL
> +#define POWER9_MMCRA_IFM20x8000UL
> +#define POWER9_MMCRA_IFM30xC000UL
> +
> +
> +PMU_FORMAT_ATTR(event,   "config:0-49");
> +PMU_FORMAT_ATTR(pmcxsel, "config:0-7");
> +PMU_FORMAT_ATTR(mark,"config:8");
> +PMU_FORMAT_ATTR(combine, "config:11");
> +PMU_FORMAT_ATTR(unit,"config:12-15");
> +PMU_FORMAT_ATTR(pmc, "config:16-19");
> +PMU_FORMAT_ATTR(cache_sel,   "config:20-23");
> +PMU_FORMAT_ATTR(sample_mode, "config:24-28");
> +PMU_FORMAT_ATTR(thresh_sel,  "config:29-31");
> +PMU_FORMAT_ATTR(thresh_stop, "config:32-35");
> +PMU_FORMAT_ATTR(thresh_start,"config:36-39");
> +PMU_FORMAT_ATTR(thresh_cmp,  "config:40-49");
> +
> +static struct attribute *power9_pmu_format_attr[] = {
> + _attr_event.attr,
> + _attr_pmcxsel.attr,
> + _attr_mark.attr,
> + _attr_combine.attr,
> + _attr_unit.attr,
> + _attr_pmc.attr,
> + _attr_cache_sel.attr,
> + _attr_sample_mode.attr,
> + _attr_thresh_sel.attr,
> + _attr_thresh_stop.attr,
> + _attr_thresh_start.attr,
> + _attr_thresh_cmp.attr,
> + NULL,
> +};
> +
> +struct attribute_group power9_pmu_format_group = {
> + .name = "format",
> + .attrs = power9_pmu_format_attr,
> +};
> +
> +static const struct attribute_group *power9_pmu_attr_groups[] = {
> + _pmu_format_group,
> + NULL,
> +};
> +
> +static int power9_generic_events[] = {
> + [PERF_COUNT_HW_CPU_CYCLES] =PM_CYC,
> + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =   PM_ICT_NOSLOT_CYC,
> + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =PM_CMPLU_STALL,
> + [PERF_COUNT_HW_INSTRUCTIONS] =  PM_INST_CMPL,
> + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] =   PM_BRU_CMPL,
> + [PERF_COUNT_HW_BRANCH_MISSES] = PM_BR_MPRED_CMPL,
> + [PERF_COUNT_HW_CACHE_REFERENCES] =  PM_LD_REF_L1,
> + [PERF_COUNT_HW_CACHE_MISSES] =  PM_LD_MISS_L1_FIN,
> +};
> +
> +static u64 power9_bhrb_filter_map(u64 branch_sample_type)
> +{
> + u64 pmu_bhrb_filter = 0;
> +
> + /* BHRB and regular PMU events share the same privilege state
> +  * filter configuration. BHRB is always recorded along with a
> +  * regular PMU event. As the privilege state filter is handled
> +  * in the basic PMC configuration of the accompanying regular
> +  * PMU event, we ignore any separate BHRB specific request.
> +  */
> +
> + /* No branch filter requested */
> + if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY)
> + 

Re: [PATCH 04/14] cxl: Move cxl_afu_get / cxl_afu_put to base

[Andrew Donnellan]

On 04/07/16 23:22, Ian Munsie wrote:

From: Ian Munsie 

The Mellanox CX4 uses a model where the AFU is one physical function of
the device, and is used by other peer physical functions of the same
device. This will require those other devices to grab a reference on the
AFU when they are initialised to make sure that it does not go away
during their lifetime.

Move the AFU refcount functions to base.c so they can be called from
the PHB code.

Signed-off-by: Ian Munsie 


Reviewed-by: Andrew Donnellan 

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Re: [PATCH V2] powerpc/mm: Add validation for platform reserved memory ranges

[Michael Ellerman]

Anshuman Khandual  writes:

> For partition running on PHYP, there can be a adjunct partition
> which shares the virtual address range with the operating system.
> Virtual address ranges which can be used by the adjunct partition
> are communicated with virtual device node of the device tree with
> a property known as "ibm,reserved-virtual-addresses". This patch
> introduces a new function named 'validate_reserved_va_range' which
> is called  during initialization to validate that these reserved
> virtual address ranges do not overlap with the address ranges used
> by the kernel for all supported memory contexts. This helps prevent
> the possibility of getting return codes similar to H_RESOURCE for
> H_PROTECT hcalls for conflicting HPTE entries.

Have you tested this? The endian conversions look wrong to me.

> diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
> index ba59d59..b47f667 100644
> --- a/arch/powerpc/mm/hash_utils_64.c
> +++ b/arch/powerpc/mm/hash_utils_64.c
> @@ -1564,3 +1564,80 @@ void setup_initial_memory_limit(phys_addr_t 
> first_memblock_base,
>   /* Finally limit subsequent allocations */
>   memblock_set_current_limit(ppc64_rma_size);
>  }
> +
> +/*
> + * PAPR says that each reserved virtual address range record
> + * contains three be32 elements which is of toal 12 bytes.
> + * First two be32 elements contain the abbreviated virtual
> + * address (high order 32 bits and low order 32 bits that
> + * generate the abbreviated virtual address of 64 bits which
> + * need to be concatenated with 24 bits of 0 at the end) and
> + * the third be32 element contains the size of the reserved
> + * virtual address range as number of consecutive 4K pages.
> + */
> +struct reserved_va_record {
> + __be32  high_addr;
> + __be32  low_addr;
> + __be32  nr_pages_4K;
> +};

Here you define those fields as __be32.

> +/*
> + * Linux uses 65 bits (CONTEXT_BITS + ESID_BITS + SID_SHIFT)
> + * of virtual address. As reserved virtual address comes in
> + * as an abbreviated form (64 bits) from the device tree, we
> + * will use a partial address bit mask (65 >> 24) to match it
> + * for simplicity.
> + */
> +#define RVA_LESS_BITS24
> +#define LINUX_VA_BITS(CONTEXT_BITS + ESID_BITS + SID_SHIFT)
> +#define PARTIAL_LINUX_VA_MASK((1ULL << (LINUX_VA_BITS - 
> RVA_LESS_BITS)) - 1)
> +
> +static int __init validate_reserved_va_range(void)
> +{
> + struct reserved_va_record rva;
> + struct device_node *np;
> + int records, ret, i;
> + __be64 vaddr;
> +
> + np = of_find_node_by_name(NULL, "vdevice");
> + if (!np)
> + return -ENODEV;
> +
> + records = of_property_count_elems_of_size(np,
> + "ibm,reserved-virtual-addresses",
> + sizeof(struct reserved_va_record));
> + if (records < 0)
> + return records;
> +
> + for (i = 0; i < records; i++) {
> + ret = of_property_read_u32_index(np,
> + "ibm,reserved-virtual-addresses",
> + 3 * i, _addr);

But then here you use of_property_read_u32_index(), which does the
endian conversion (to CPU endian) for you.

> + ret = of_property_read_u32_index(np,
> + "ibm,reserved-virtual-addresses",
> + 3 * i + 1, _addr);

> + ret = of_property_read_u32_index(np,
> + "ibm,reserved-virtual-addresses",
> + 3 * i + 2, _pages_4K);

So now all the values in rva are CPU endian.

> + vaddr =  rva.high_addr;
> + vaddr =  (vaddr << 32) | rva.low_addr;
> + if (vaddr & cpu_to_be64(~PARTIAL_LINUX_VA_MASK))
> + continue;

But then here you do the comparison against a __be64 value.

I know I told you to use "properly endian-annotated struct", but you
stil need to use the right conversions in the right places.

I think the best option is to use of_property_read_u32_array() and just
read the three 32 values into a CPU endian struct.

cheers
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[PATCH] powerpc: fix oops in pcibios_release_device() after pcibios_free_controller()

[Mauricio Faria de Oliveira]

It's possible to hit an oops/crash if pcibios_release_device() accesses the
phb struct and it had been freed earlier -- by pcibios_free_controller() --
as the memory it pointed to can be reused.

If after reuse 'phb->controller_ops.release_device' is non-NULL it will be
called, but it points to an invalid location (that function pointer is not
set anywhere in the code, so if it's non-NULL, that's not correct), and so
it hits an oops and the system crashes.

The solution is to verify whether 'phb' is still in 'hose_list' before any
access to it in pcibios_release_device() -- as it is removed from the list
by pcibios_free_controller() -- and ensure it cannot be used after kfree().

That problem can happen with the pSeries platform's DLPAR remove operation
if references to devices are held until after the pcibios_free_controller()
function runs, and then released - exercising pcibios_release_device() path.

It's been seen in multipath configurations during the removal/add of fibre
channel adapters, which may lead to tasks blocked for IO (thus holding the
references to devices) until adapters reappear later on, then hitting oops.

It can be synthesized simply w/ 'cat >/dev/sdX' for one or two devices, as
demonstrated below (with a quirk to set phb->controller_ops.release_device
to 0x0123456789abcdef before kfree() on pcibios_free_controller() and some
printk() debug calls for clarity):

# drmgr -w 5 -d 1 -c phb -s 'PHB 33' -r# need to remove and re-add
# drmgr -w 5 -d 1 -c phb -s 'PHB 33' -a# so phb->is_dynamic is true.

# cat >/dev/sdz & pid=$!

# drmgr -w 5 -d 1 -c phb -s 'PHB 33' -r
<...>
pci_bus 0002:01: busn_res: [bus 01-ff] is released
pcibios_free_controller() phb = c001f72ccc00
pcibios_free_controller QUIRK! ptr = 0123456789abcdef
rpadlpar_io: slot PHB 33 removed

# kill -9 $pid
pcibios_release_device() phb = c001f72ccc00
Unable to handle kernel paging request for instruction fetch
Faulting instruction address: 0x123456789abcdef
Oops: Kernel access of bad area, sig: 11 [#1]
<...>
CPU: 23 PID: 14878 Comm: cat Tainted: GW   4.7.0-rc6 #2
<...>
NIP [0123456789abcdef] 0x123456789abcdef
LR [c003f0a0] pcibios_release_device+0x70/0x90
Call Trace:
[c001fa45b5a0] [c003f07c] pcibios_release_device+0x4c/0x90 
(unreliable)
[c001fa45b610] [c04e66b0] pci_release_dev+0x50/0xa0
[c001fa45b640] [c0582d48] device_release+0x58/0xf0
[c001fa45b6c0] [c04aeb58] kobject_cleanup+0x78/0xe0
[c001fa45b700] [c0583374] put_device+0x24/0x40
[c001fa45b720] [c05d61c8] scsi_host_dev_release+0x138/0x1c0
[c001fa45b760] [c0582d48] device_release+0x58/0xf0
[c001fa45b7e0] [c04aeb58] kobject_cleanup+0x78/0xe0
[c001fa45b820] [c0583374] put_device+0x24/0x40
[c001fa45b840] [c05f38d4] fc_rport_dev_release+0x24/0x50
[c001fa45b870] [c0582d48] device_release+0x58/0xf0
[c001fa45b8f0] [c04aeb58] kobject_cleanup+0x78/0xe0
[c001fa45b930] [c0583374] put_device+0x24/0x40
[c001fa45b950] [c05e0c20] scsi_target_dev_release+0x30/0x50
[c001fa45b980] [c0582d48] device_release+0x58/0xf0
[c001fa45ba00] [c04aeb58] kobject_cleanup+0x78/0xe0
[c001fa45ba40] [c0583374] put_device+0x24/0x40
[c001fa45ba60] [c05e4cb8] 
scsi_device_dev_release_usercontext+0x178/0x1b0
[c001fa45bac0] [c00cac34] execute_in_process_context+0x94/0xb0
[c001fa45bae0] [c05e4b24] scsi_device_dev_release+0x24/0x40
[c001fa45bb00] [c0582d48] device_release+0x58/0xf0
[c001fa45bb80] [c04aeb58] kobject_cleanup+0x78/0xe0
[c001fa45bbc0] [c0583374] put_device+0x24/0x40
[c001fa45bbe0] [c05d3f08] scsi_device_put+0x38/0x50
[c001fa45bc10] [c062dba0] scsi_disk_put+0x50/0x80
[c001fa45bc50] [c02ca378] __blkdev_put+0x2f8/0x340
[c001fa45bd40] [c02ca588] blkdev_close+0x28/0x40
[c001fa45bd60] [c027e9ec] __fput+0xbc/0x260
[c001fa45bdb0] [c00d1280] task_work_run+0xf0/0x130
[c001fa45be00] [c00172a4] do_notify_resume+0x84/0x90
[c001fa45be30] [c0009844] ret_from_except_lite+0x70/0x74
Instruction dump:
       
       
---[ end trace fc3730d9babb2e31 ]---

With the patch applied:

# drmgr -w 5 -d 1 -c phb -s 'PHB 33' -r
<...>
pci_bus 0001:01: busn_res: [bus 01-ff] is released
pcibios_free_controller() phb = c001dea2d400
pcibios_free_controller QUIRK! ptr = 0123456789abcdef
rpadlpar_io: slot PHB 33 removed

# kill -9 $pid
pcibios_release_device() 

[PATCH v2] powerpc/mm: Add a parameter to disable 1TB segs

[Oliver O'Halloran]

This patch adds the kernel command line parameter "no_tb_segs" which
forces the kernel to use 256MB rather than 1TB segments. Forcing the use
of 256MB segments makes it considerably easier to test code that depends
on an SLB miss occurring.

Suggested-by: Michael Neuling 
Suggested-by: Michael Ellerman 
Signed-off-by: Oliver O'Halloran 
---
Changes in from v1:
Renamed parameter from "no_tb_segs" to "disable_1tb_segments"
Added kernel-parameters.txt entry

 Documentation/kernel-parameters.txt |  6 ++
 arch/powerpc/mm/hash_utils_64.c | 15 +++
 2 files changed, 21 insertions(+)

diff --git a/Documentation/kernel-parameters.txt 
b/Documentation/kernel-parameters.txt
index 4640ea2dce9b..3be08fda82dd 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -920,6 +920,12 @@ bytes respectively. Such letter suffixes can also be 
entirely omitted.
dhash_entries=  [KNL]
Set number of hash buckets for dentry cache.
 
+   disable_1tb_segments [PPC]
+   Disables the use of 1TB hash page table segments. This
+   causes the kernel to fall back to 256MB segments which
+   can be useful when debugging issues that require an SLB
+   miss to occur.
+
disable=[IPV6]
See Documentation/networking/ipv6.txt.
 
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 5b22ba0b58bc..7e6d38e01645 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -321,6 +321,15 @@ int htab_remove_mapping(unsigned long vstart, unsigned 
long vend,
return ret;
 }
 
+static bool disable_1tb_segments = false;
+
+static int __init parse_disable_1tb_segments(char *p)
+{
+   disable_1tb_segments = true;
+   return 0;
+}
+early_param("disable_1tb_segments", parse_disable_1tb_segments);
+
 static int __init htab_dt_scan_seg_sizes(unsigned long node,
 const char *uname, int depth,
 void *data)
@@ -339,6 +348,12 @@ static int __init htab_dt_scan_seg_sizes(unsigned long 
node,
for (; size >= 4; size -= 4, ++prop) {
if (be32_to_cpu(prop[0]) == 40) {
DBG("1T segment support detected\n");
+
+   if (disable_1tb_segments) {
+   DBG("1T segments disabled by command line\n");
+   break;
+   }
+
cur_cpu_spec->mmu_features |= MMU_FTR_1T_SEGMENT;
return 1;
}
-- 
2.5.5

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Re: [PATCH v3 3/4] perf annotate: add powerpc support

[Ravi Bangoria]

Hi Michael,

On Friday 01 July 2016 02:13 PM, Ravi Bangoria wrote:

Thanks Michael for your suggestion.

On Thursday 30 June 2016 11:51 AM, Michael Ellerman wrote:

On Thu, 2016-06-30 at 11:44 +0530, Ravi Bangoria wrote:

diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c
index 36a5825..b87eac7 100644
--- a/tools/perf/util/annotate.c
+++ b/tools/perf/util/annotate.c
@@ -476,6 +481,125 @@ static int ins__cmp(const void *a, const void *b)

...

+
+static struct ins *ins__find_powerpc(const char *name)
+{
+int i;
+struct ins *ins;
+struct ins_ops *ops;
+static struct instructions_powerpc head;
+static bool list_initialized;
+
+/*
+ * - Interested only if instruction starts with 'b'.
+ * - Few start with 'b', but aren't branch instructions.
+ * - Let's also ignore instructions involving 'ctr' and
+ *   'tar' since target branch addresses for those can't
+ *   be determined statically.
+ */
+if (name[0] != 'b' ||
+!strncmp(name, "bcd", 3)   ||
+!strncmp(name, "brinc", 5) ||
+!strncmp(name, "bper", 4)  ||
+strstr(name, "ctr")||
+strstr(name, "tar"))
+return NULL;
It would be good if 'bctr' was at least recognised as a branch, even 
if we

can't determine the target. They are very common.


We can not show arrow for this since we don't know the target location.
can you please suggest how you intends perf to display bctr?

bctr can be classified into two variants -- 'bctr' and 'bctrl'.

'bctr' will be considered as jump instruction but jump__parse() won't
be able to find any target location and hence it will set target to
UINT64_MAX which transform 'bctr' to 'bctr UINT64_MAX'. This
looks misleading.

bctrl will be considered as call instruction but call_parse() won't
be able to find any target function and hence it won't show any
navigation arrow for this instruction. Which is same as filter it
beforehand.

It doesn't look like we have the opcode handy here? Could we get it 
somehow?

That would make this a *lot* more robust.


objdump prints machine code, but I don't know how difficult that would
be to parse to get opcode.


Perf uses  --no-show-raw with objdump and hence objdump output does not
show opcodes. So change in current  objdump output may requires changes
in current parsing logic. Additionally I need to change tui as well to show
opcodes. This looks quite more work.

And this patchset is about enabling annotate for cross arch. So if you 
really

need opcode with perf anotate, can we do it separately?

Please let me know your thoughts.

-Ravi



-Ravi


cheers





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Re: [RFC] arm64: kexec_file_load support

[Dave Young]

On 07/04/16 at 03:58pm, AKASHI Takahiro wrote:
> Hi,
> 
> On Fri, Jul 01, 2016 at 12:46:31PM -0300, Thiago Jung Bauermann wrote:
> > Am Freitag, 01 Juli 2016, 14:11:12 schrieb AKASHI Takahiro:
> > > I'm not sure whether there is any demand for kexec_file_load
> > > support on arm64, but anyhow I'm working on this and now
> > > my early prototype code does work fine.
> > 
> > It is necessary if you want to support loading only signed kernels, and 
> > also 
> > if you want IMA to measure the kernel in its event log.
> > 
> > > There is, however, one essential issue:
> > > While arm64 kernel requires a device tree blob to be set up
> > > correctly at boot time, the current system call API doesn't
> > > have this parameter.
> > > int kexec_file_load(int kernel_fd, int initrd_fd,
> > > unsigned long cmdline_len, const char
> > > *cmdline_ptr, unsigned long flags);
> > > 
> > > Should we invent a new system call, like kexec_file_load2,
> > > and, if so, what kind of interface would be desired?
> > 
> > I'm facing the same issue on powerpc. What I'm doing is taking the device 
> > tree that was used to boot the current kernel and modifying it as necessary 
> > to pass it to the next kernel.
> 
> That is exactly what I do.
> 
> > I agree that it would be better if we could have a system call where a 
> > custom device tree could be passed. One suggestion is:
> 
> For powerpc, you might be able to use dtbImage instead of Image
> without changing the kernel interfaces.
> > 
> > kexec_file_load2(int fds[], int fd_types[], int nr_fds,
> >  unsigned long cmdline_len, const char *cmdline_ptr,
> > unsigned long flags);
> 
> You don't want to simply add one more argument, i.e. dtb_fd, don't you.
> 
> I prefer a slightly-simpler interface:
> struct kexec_file_fd {
> enum kexec_file_type;
> int fd;
> }
> 
> int kexec_file_load2(struct kexec_file_fd[], int nr_fds, int flags);
> 
> Or if you want to keep the compatibility with the existing system call,
> 
> int kexec_file_load(int kernel_fd, int initrd_fd,
> unsigned long cmdline_len, const char *cmdline_ptr,
> unsigned long flags,
> int struct kexec_file_fd[], int nr_fds);
> 
> Here SYSCALL_DEFINE7() have to be defined, and I'm not sure that we will not
> have a problem in adding a system call with more than 6 arguments.
> 
> > Where fds is an array with nr_fds file descriptors and fd_types is an array 
> > specifying what each fd in fds is. So for example, if fds[i] is the kernel, 
> > then fd_types[i] would have the value KEXEC_FILE_KERNEL_FD. If fds[i] is 
> > the 
> > device tree blob, fd_types[i], would have the value KEXEC_FILE_DTB and so 
> > on. That way, the syscall can be extended for an arbitrary number and types 
> > of segments that have to be loaded, just like kexec_load.
> > 
> > Another option is to have a struct:
> > 
> > kexec_file_load2(struct kexec_file_params *params, unsigned long params_sz);
> 
> Wow, we can add any number of new parameters with this interface.
> 
> Thanks,
> -Takahiro AKASHI
> 
> > Where:
> > 
> > struct kexec_file_params {
> > int version;/* allows struct to be extended in the future */
> > int fds[];
> > int fd_types[];
> > int nr_fds;
> > unsigned long cmdline_len;
> > const char *cmdline_ptr;
> > unsigned long flags;
> > };
> > 
> > This is even more flexible.

I would like to vote for this one, and use kexec_file_fd fds[] in the struct 
 
Thanks
Dave
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Re: [PATCH 12/14] PCI/hotplug: pnv_php: export symbols and move struct types needed by cxl

[Andrew Donnellan]

On 05/07/16 10:03, Gavin Shan wrote:

Andrew/Ian, it seems HOTPLUG_PCI_POWERNV_BASE isn't defined and we needn't it.


Argh, thanks for picking that up! I removed that option and all its 
occurrences in the code based on your earlier private feedback but 
forgot to drop this.


Will fix in V2.

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andrew.donnel...@au1.ibm.com  IBM Australia Limited

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Re: [PATCH v3 2/9] kexec_file: Generalize kexec_add_buffer.

[Dave Young]

On 07/01/16 at 05:31pm, Thiago Jung Bauermann wrote:
> Am Freitag, 01 Juli 2016, 17:02:23 schrieb Thiago Jung Bauermann:
> > Am Freitag, 01 Juli 2016, 14:36:02 schrieb Dave Young:
> > > On 07/01/16 at 02:51pm, Thiago Jung Bauermann wrote:
> > > > Am Donnerstag, 30 Juni 2016, 17:43:57 schrieb Dave Young:
> > > > > On 06/30/16 at 01:42pm, Thiago Jung Bauermann wrote:
> > > > > > Am Donnerstag, 30 Juni 2016, 12:49:44 schrieb Thiago Jung Bauermann:
> > > > I understand that this is all somewhat subjective, so if you still
> > > > disagree with my points I can provide a patch set implementing the
> > > > change above.
> > > 
> > > I still feel it should be changed if more callbacks being introduced,
> > > though you can regard it is internal api, like above comment we do not
> > > need to assign them seperately, the member values can be assigned
> > > from the beginning.
> > 
> > Ok, I'll implement the changes and submit a v4. Thanks for your review.
> 
> Sorry for creating more email traffic, but it'll be better if I ask this 
> before I change all other places in the code. Is the code below what you
> have in mind?

Thanks for the update, almost except a nitpick :)

> 
> In particular, this version doesn't do the memset(, 0, sizeof(buf))
> that the previous code I sent earlier did. Is that ok?
> 
> @@ -643,13 +632,14 @@ static int __kexec_load_purgatory(struct kimage *image, 
> unsigned long min,
> unsigned long max, int top_down)
>  {
>   struct purgatory_info *pi = >purgatory_info;
> - unsigned long align, buf_align, bss_align, buf_sz, bss_sz, bss_pad;
> - unsigned long memsz, entry, load_addr, curr_load_addr, bss_addr, offset;
> + unsigned long align, bss_align, bss_sz, bss_pad;
> + unsigned long entry, load_addr, curr_load_addr, bss_addr, offset;
>   unsigned char *buf_addr, *src;
>   int i, ret = 0, entry_sidx = -1;
>   const Elf_Shdr *sechdrs_c;
>   Elf_Shdr *sechdrs = NULL;
> - void *purgatory_buf = NULL;
> + struct kexec_buf buf = { .image = image, .buf_min = min,
> + .buf_max = max, .top_down = top_down };
>  
>   /*
>* sechdrs_c points to section headers in purgatory and are read
> @@ -715,9 +705,9 @@ static int __kexec_load_purgatory(struct kimage *image, 
> unsigned long min,
>   }
>  
>   /* Determine how much memory is needed to load relocatable object. */
> - buf_align = 1;
> + buf.buf_align = 1;
>   bss_align = 1;
> - buf_sz = 0;
> + buf.bufsz = 0;
>   bss_sz = 0;

Above chunk can go to the initializatioin of struct kexec buf ealier.

>  
>   for (i = 0; i < pi->ehdr->e_shnum; i++) {
> @@ -726,10 +716,10 @@ static int __kexec_load_purgatory(struct kimage *image, 
> unsigned long min,
>  
>   align = sechdrs[i].sh_addralign;
>   if (sechdrs[i].sh_type != SHT_NOBITS) {
> - if (buf_align < align)
> - buf_align = align;
> - buf_sz = ALIGN(buf_sz, align);
> - buf_sz += sechdrs[i].sh_size;
> + if (buf.buf_align < align)
> + buf.buf_align = align;
> + buf.bufsz = ALIGN(buf.bufsz, align);
> + buf.bufsz += sechdrs[i].sh_size;
>   } else {
>   /* bss section */
>   if (bss_align < align)
> @@ -741,32 +731,31 @@ static int __kexec_load_purgatory(struct kimage *image, 
> unsigned long min,
>  
>   /* Determine the bss padding required to align bss properly */
>   bss_pad = 0;
> - if (buf_sz & (bss_align - 1))
> - bss_pad = bss_align - (buf_sz & (bss_align - 1));
> + if (buf.bufsz & (bss_align - 1))
> + bss_pad = bss_align - (buf.bufsz & (bss_align - 1));
>  
> - memsz = buf_sz + bss_pad + bss_sz;
> + buf.memsz = buf.bufsz + bss_pad + bss_sz;
>  
>   /* Allocate buffer for purgatory */
> - purgatory_buf = vzalloc(buf_sz);
> - if (!purgatory_buf) {
> + buf.buffer = vzalloc(buf.bufsz);
> + if (!buf.buffer) {
>   ret = -ENOMEM;
>   goto out;
>   }
>  
> - if (buf_align < bss_align)
> - buf_align = bss_align;
> + if (buf.buf_align < bss_align)
> + buf.buf_align = bss_align;
>  
>   /* Add buffer to segment list */
> - ret = kexec_add_buffer(image, purgatory_buf, buf_sz, memsz,
> - buf_align, min, max, top_down,
> - >purgatory_load_addr);
> + ret = kexec_add_buffer();
>   if (ret)
>   goto out;
> + pi->purgatory_load_addr = buf.mem;
>  
>   /* Load SHF_ALLOC sections */
> - buf_addr = purgatory_buf;
> + buf_addr = buf.buffer;
>   load_addr = curr_load_addr = pi->purgatory_load_addr;
> - bss_addr = load_addr + buf_sz + bss_pad;
> + bss_addr = load_addr + buf.bufsz + bss_pad;
>  

Re: powerpc/mm: Add a parameter to disable 1TB segs

[oliver]

On Tue, Jul 5, 2016 at 10:24 AM, Michael Neuling  wrote:
> On Mon, 2016-07-04 at 16:09 +1000, Michael Ellerman wrote:
>> On Mon, 2016-04-07 at 00:44:04 UTC, Oliver O'Halloran wrote:
>> >
>> > This patch adds the kernel command line parameter "no_tb_segs" which
>> > forces the kernel to use 256MB rather than 1TB segments. Forcing the
>> > use
>> > of 256MB segments makes it considerably easier to test code that
>> > depends
>> > on an SLB miss occurring.
>> That's a fairly awful name :)
>>
>> Can you call it "disable_1T_segments" ?
>>
>>
>> It should also be mentioned in Documentation/kernel-parameters.txt, with
>> emphasis that it's a debug option and powerpc only.
>
> To that end, should we add "powerpc_" at the start of the option?

I don't think it's necessary. There are annotations in
kernel-parameters.txt that indicate what options are arch specific and
it looks like none of the existing architecture specific options are
prefixed.

>
> Mikey
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Re: powerpc/mm: Add a parameter to disable 1TB segs

[Michael Neuling]

On Mon, 2016-07-04 at 16:09 +1000, Michael Ellerman wrote:
> On Mon, 2016-04-07 at 00:44:04 UTC, Oliver O'Halloran wrote:
> > 
> > This patch adds the kernel command line parameter "no_tb_segs" which
> > forces the kernel to use 256MB rather than 1TB segments. Forcing the
> > use
> > of 256MB segments makes it considerably easier to test code that
> > depends
> > on an SLB miss occurring.
> That's a fairly awful name :)
> 
> Can you call it "disable_1T_segments" ?
> 
> 
> It should also be mentioned in Documentation/kernel-parameters.txt, with
> emphasis that it's a debug option and powerpc only.

To that end, should we add "powerpc_" at the start of the option?

Mikey
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Re: [PATCH 12/14] PCI/hotplug: pnv_php: export symbols and move struct types needed by cxl

[Gavin Shan]

On Mon, Jul 04, 2016 at 11:22:10PM +1000, Ian Munsie wrote:
>From: Andrew Donnellan 
>
>The cxl driver will use infrastructure from pnv_php to handle device tree
>updates when switching bi-modal CAPI cards into CAPI mode.
>
>To enable this, export pnv_php_find_slot() and
>pnv_php_set_slot_power_state(), and add corresponding declarations, as well
>as the definition of struct pnv_php_slot, to asm/pnv-pci.h.
>
>Cc: Gavin Shan 
>Cc: linux-...@vger.kernel.org
>Cc: Bjorn Helgaas 
>Signed-off-by: Andrew Donnellan 
>Acked-by: Gavin Shan 
>---

.../...

>diff --git a/drivers/pci/hotplug/Kconfig b/drivers/pci/hotplug/Kconfig
>index aadce45..b719a72 100644
>--- a/drivers/pci/hotplug/Kconfig
>+++ b/drivers/pci/hotplug/Kconfig
>@@ -117,6 +117,7 @@ config HOTPLUG_PCI_POWERNV
>   tristate "PowerPC PowerNV PCI Hotplug driver"
>   depends on PPC_POWERNV && EEH
>   select OF_DYNAMIC
>+  select HOTPLUG_PCI_POWERNV_BASE
>   help
> Say Y here if you run PowerPC PowerNV platform that supports
> PCI Hotplug

Andrew/Ian, it seems HOTPLUG_PCI_POWERNV_BASE isn't defined and we needn't it.

Thanks,
Gavin

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Re: [PATCH v2] cxl: Refine slice error debug messages

[Michael Neuling]

This needs a description.  How are you "refining it?

Mikey


On Mon, 2016-07-04 at 17:07 +0200, Philippe Bergheaud wrote:
> Signed-off-by: Philippe Bergheaud 
> ---
> Changes since v1:
>   - Rebased on Ian's patch
> "cxl: Abstract the differences between the PSL and XSL"
> 
>  drivers/misc/cxl/cxl.h| 15 +++
>  drivers/misc/cxl/guest.c  |  9 ++---
>  drivers/misc/cxl/irq.c| 29 +
>  drivers/misc/cxl/native.c | 12 +++-
>  4 files changed, 57 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
> index 7745252..d928a8c 100644
> --- a/drivers/misc/cxl/cxl.h
> +++ b/drivers/misc/cxl/cxl.h
> @@ -188,6 +188,18 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An =
> {0x0A0};
>  #define CXL_PSL_ID_An_F  (1ull << (63-31))
>  #define CXL_PSL_ID_An_L  (1ull << (63-30))
>  
> +/** CXL_PSL_SERR_An
> /
> +#define CXL_PSL_SERR_An_afuto(1ull << (63-0))
> +#define CXL_PSL_SERR_An_afudis   (1ull << (63-1))
> +#define CXL_PSL_SERR_An_afuov(1ull << (63-2))
> +#define CXL_PSL_SERR_An_badsrc   (1ull << (63-3))
> +#define CXL_PSL_SERR_An_badctx   (1ull << (63-4))
> +#define CXL_PSL_SERR_An_llcmdis  (1ull << (63-5))
> +#define CXL_PSL_SERR_An_llcmdto  (1ull << (63-6))
> +#define CXL_PSL_SERR_An_afupar   (1ull << (63-7))
> +#define CXL_PSL_SERR_An_afudup   (1ull << (63-8))
> +#define CXL_PSL_SERR_An_AE   (1ull << (63-30))
> +
>  /** CXL_PSL_SCNTL_An
> /
>  #define CXL_PSL_SCNTL_An_CR  (0x1ull << (63-15))
>  /* Programming Modes: */
> @@ -905,4 +917,7 @@ extern const struct cxl_backend_ops *cxl_ops;
>  
>  /* check if the given pci_dev is on the the cxl vphb bus */
>  bool cxl_pci_is_vphb_device(struct pci_dev *dev);
> +
> +/* decode AFU error bits in the PSL register PSL_SERR_An */
> +void cxl_afu_decode_psl_serr(struct cxl_afu *afu, u64 serr);
>  #endif
> diff --git a/drivers/misc/cxl/guest.c b/drivers/misc/cxl/guest.c
> index bc8d0b9..d516d0a 100644
> --- a/drivers/misc/cxl/guest.c
> +++ b/drivers/misc/cxl/guest.c
> @@ -196,15 +196,18 @@ static irqreturn_t guest_slice_irq_err(int irq,
> void *data)
>  {
>   struct cxl_afu *afu = data;
>   int rc;
> - u64 serr;
> + u64 serr, afu_error, dsisr;
>  
> - WARN(irq, "CXL SLICE ERROR interrupt %i\n", irq);
>   rc = cxl_h_get_fn_error_interrupt(afu->guest->handle, );
>   if (rc) {
>   dev_crit(>dev, "Couldn't read PSL_SERR_An: %d\n",
> rc);
>   return IRQ_HANDLED;
>   }
> - dev_crit(>dev, "PSL_SERR_An: 0x%.16llx\n", serr);
> + afu_error = cxl_p2n_read(afu, CXL_AFU_ERR_An);
> + dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An);
> + cxl_afu_decode_psl_serr(afu, serr);
> + dev_crit(>dev, "AFU_ERR_An: 0x%.16llx\n", afu_error);
> + dev_crit(>dev, "PSL_DSISR_An: 0x%.16llx\n", dsisr);
>  
>   rc = cxl_h_ack_fn_error_interrupt(afu->guest->handle, serr);
>   if (rc)
> diff --git a/drivers/misc/cxl/irq.c b/drivers/misc/cxl/irq.c
> index 8def455..40fffe4 100644
> --- a/drivers/misc/cxl/irq.c
> +++ b/drivers/misc/cxl/irq.c
> @@ -374,3 +374,32 @@ void afu_release_irqs(struct cxl_context *ctx, void
> *cookie)
>  
>   ctx->irq_count = 0;
>  }
> +
> +void cxl_afu_decode_psl_serr(struct cxl_afu *afu, u64 serr)
> +{
> + dev_crit(>dev,
> +  "PSL Slice error received. Check AFU for root
> cause.\n");
> + dev_crit(>dev, "PSL_SERR_An: 0x%016llx\n", serr);
> + if (serr & CXL_PSL_SERR_An_afuto)
> + dev_crit(>dev, "AFU MMIO Timeout\n");
> + if (serr & CXL_PSL_SERR_An_afudis)
> + dev_crit(>dev,
> +  "MMIO targeted Accelerator that was not
> enabled\n");
> + if (serr & CXL_PSL_SERR_An_afuov)
> + dev_crit(>dev, "AFU CTAG Overflow\n");
> + if (serr & CXL_PSL_SERR_An_badsrc)
> + dev_crit(>dev, "Bad Interrupt Source\n");
> + if (serr & CXL_PSL_SERR_An_badctx)
> + dev_crit(>dev, "Bad Context Handle\n");
> + if (serr & CXL_PSL_SERR_An_llcmdis)
> + dev_crit(>dev, "LLCMD to Disabled AFU\n");
> + if (serr & CXL_PSL_SERR_An_llcmdto)
> + dev_crit(>dev, "LLCMD Timeout to AFU\n");
> + if (serr & CXL_PSL_SERR_An_afupar)
> + dev_crit(>dev, "AFU MMIO Parity Error\n");
> + if (serr & CXL_PSL_SERR_An_afudup)
> + dev_crit(>dev, "AFU MMIO Duplicate CTAG Error\n");
> + if (serr & CXL_PSL_SERR_An_AE)
> + dev_crit(>dev,
> +  "AFU asserted JDONE with JERROR in AFU Directed
> Mode\n");
> +}
> diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
> index d867326..c4d8815 100644
> --- a/drivers/misc/cxl/native.c
> +++ b/drivers/misc/cxl/native.c
> @@ -767,7 +767,7 @@ void cxl_native_psl_irq_dump_regs(struct cxl_context
> *ctx)
>    

Re: [PATCH] perf/core: Fix the mask in perf_output_sample_regs

[Arnaldo Carvalho de Melo]

Em Mon, Jul 04, 2016 at 10:19:06AM +0300, Yury Norov escreveu:
> On Sun, Jul 03, 2016 at 11:31:58PM +0530, Madhavan Srinivasan wrote:
> > When decoding the perf_regs mask in perf_output_sample_regs(),
> > we loop through the mask using find_first_bit and find_next_bit functions.
> > While the exisitng code works fine in most of the case,
> > the logic is broken for 32bit kernel (Big Endian).
> > When reading u64 mask using (u32 *)()[0], find_*_bit() assumes it gets
> > lower 32bits of u64 but instead gets upper 32bits which is wrong.
> > Proposed fix is to swap the words of the u64 to handle this case.
> > This is _not_ endianness swap.
> 
> 
> In fact, it's broken for 32-bit LE as well if mask is zero and next
> word on stack is not zero. The rest is OK.
> 
> Reviewed-by: Yury Norov 

Waiting a bit for more acks, as IIRC several other people had comments
on this patch, ok?

- Arnaldo
 
> > 
> > Suggested-by: Yury Norov 
> > Cc: Yury Norov 
> > Cc: Peter Zijlstra 
> > Cc: Ingo Molnar 
> > Cc: Arnaldo Carvalho de Melo 
> > Cc: Alexander Shishkin 
> > Cc: Jiri Olsa 
> > Cc: Michael Ellerman 
> > Signed-off-by: Madhavan Srinivasan 
> > ---
> >  include/linux/bitmap.h |  2 ++
> >  kernel/events/core.c   |  4 +++-
> >  lib/bitmap.c   | 19 +++
> >  3 files changed, 24 insertions(+), 1 deletion(-)
> > 
> > diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
> > index e9b0b9ab07e5..d95b422db183 100644
> > --- a/include/linux/bitmap.h
> > +++ b/include/linux/bitmap.h
> > @@ -188,6 +188,8 @@ extern int bitmap_print_to_pagebuf(bool list, char *buf,
> >  #define small_const_nbits(nbits) \
> > (__builtin_constant_p(nbits) && (nbits) <= BITS_PER_LONG)
> >  
> > +extern void bitmap_from_u64(unsigned long *dst, u64 mask);
> > +
> >  static inline void bitmap_zero(unsigned long *dst, unsigned int nbits)
> >  {
> > if (small_const_nbits(nbits))
> > diff --git a/kernel/events/core.c b/kernel/events/core.c
> > index 9c51ec3f0f44..613fec95ea4c 100644
> > --- a/kernel/events/core.c
> > +++ b/kernel/events/core.c
> > @@ -5205,8 +5205,10 @@ perf_output_sample_regs(struct perf_output_handle 
> > *handle,
> > struct pt_regs *regs, u64 mask)
> >  {
> > int bit;
> > +   DECLARE_BITMAP(_mask, 64);
> >  
> > -   for_each_set_bit(bit, (const unsigned long *) ,
> > +   bitmap_from_u64(_mask, mask);
> > +   for_each_set_bit(bit, _mask,
> >  sizeof(mask) * BITS_PER_BYTE) {
> > u64 val;
> >  
> > diff --git a/lib/bitmap.c b/lib/bitmap.c
> > index c66da508cbf7..522f1b4c6078 100644
> > --- a/lib/bitmap.c
> > +++ b/lib/bitmap.c
> > @@ -1170,3 +1170,22 @@ void bitmap_copy_le(unsigned long *dst, const 
> > unsigned long *src, unsigned int n
> >  }
> >  EXPORT_SYMBOL(bitmap_copy_le);
> >  #endif
> > +
> > +/*
> > + * bitmap_from_u64 - Check and swap words within u64.
> > + *  @mask: source bitmap
> > + *  @dst:  destination bitmap
> > + *
> > + * In 32bit Big Endian kernel, when using (u32 *)()[*]
> > + * to read u64 mask, we will get wrong word.
> > + * That is "(u32 *)()[0]" gets upper 32 bits,
> > + * but expected could be lower 32bits of u64.
> > + */
> > +void bitmap_from_u64(unsigned long *dst, u64 mask)
> > +{
> > +   dst[0] = mask & ULONG_MAX;
> > +
> > +   if (sizeof(mask) > sizeof(unsigned long))
> > +   dst[1] = mask >> 32;
> > +}
> > +EXPORT_SYMBOL(bitmap_from_u64);
> > -- 
> > 1.9.1
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Re: [PATCH v2] cxl: Refine slice error debug messages

[Frederic Barrat]

Le 04/07/2016 17:07, Philippe Bergheaud a écrit :

Signed-off-by: Philippe Bergheaud
---
Changes since v1:
   - Rebased on Ian's patch
 "cxl: Abstract the differences between the PSL and XSL"


Thanks!

Reviewed-by: Frederic Barrat 

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RE: [PATCH][v2] driver/memory: Update dependency of IFC for Layerscape

[Raghav Dogra]

Scott uses the updated email id  and is already added.

Regards,
Raghav 

> -Original Message-
> From: Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org]
> Sent: Monday, July 04, 2016 3:19 PM
> To: Boris Brezillon ; Raghav Dogra
> ; Paul Mackerras ; Michael
> Ellerman ; Scott Wood 
> Cc: linux-...@lists.infradead.org; Prabhakar Kushwaha
> ; Yang-Leo Li ;
> o...@buserror.net; computersforpe...@gmail.com; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH][v2] driver/memory: Update dependency of IFC for
> Layerscape
> 
> On Mon, 2016-07-04 at 11:29 +0200, Boris Brezillon wrote:
> > +PPC maintainers.
> 
> + Scott for FSL stuff
> 
> > Hi Raghav,
> >
> > Since you're touching powerpc drivers, the least you could do is add
> > ppc maintainers in Cc, so that they can ack/review your patch...
> >
> > On Fri, 1 Jul 2016 21:32:30 +0530
> > Raghav Dogra  wrote:
> >
> > > This patch enables IFC NAND support on ARM layerscape platform.
> > > It fixes the dependency to enable NAND. The include files are being
> > > modified to ensure complilation for both PowerPC and ARM
> > > architectures.
> >
> > Still think this could be separated in 2 commits:
> > - the first one getting rid of the asm/prom.h inclusion
> > - the second one changing the Kconfig dependency
> >
> > >
> > > Signed-off-by: Raghav Dogra 
> > > ---
> > > Applicable to git://git.infradead.org/l2-mtd.git
> > >
> > > Changes for v2: updated commit description
> > >
> > >  drivers/memory/Kconfig   | 2 +-
> > >  drivers/memory/fsl_ifc.c | 4 +++-
> > >  drivers/mtd/nand/Kconfig | 2 +-
> > >  3 files changed, 5 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig index
> > > 81ddb17..5645705 100644
> > > --- a/drivers/memory/Kconfig
> > > +++ b/drivers/memory/Kconfig
> > > @@ -104,7 +104,7 @@ config FSL_CORENET_CF
> > >
> > >  config FSL_IFC
> > >   bool
> > > - depends on FSL_SOC
> > > + depends on FSL_SOC || ARCH_LAYERSCAPE
> > >
> > >  config JZ4780_NEMC
> > >   bool "Ingenic JZ4780 SoC NEMC driver"
> > > diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c
> > > index 904b4af..1b182b1 100644
> > > --- a/drivers/memory/fsl_ifc.c
> > > +++ b/drivers/memory/fsl_ifc.c
> > > @@ -31,7 +31,9 @@
> > >  #include 
> > >  #include 
> > >  #include 
> > > -#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > >
> > >  struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev;
> > >  EXPORT_SYMBOL(fsl_ifc_ctrl_dev);
> > > diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> > > index f05e0e9..eace3ef 100644
> > > --- a/drivers/mtd/nand/Kconfig
> > > +++ b/drivers/mtd/nand/Kconfig
> > > @@ -438,7 +438,7 @@ config MTD_NAND_FSL_ELBC
> > >
> > >  config MTD_NAND_FSL_IFC
> > >   tristate "NAND support for Freescale IFC controller"
> > > - depends on MTD_NAND && FSL_SOC
> > > + depends on MTD_NAND && (FSL_SOC || ARCH_LAYERSCAPE)
> > >   select FSL_IFC
> > >   select MEMORY
> > >   help
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[PATCH v2] cxl: Refine slice error debug messages

[Philippe Bergheaud]

Signed-off-by: Philippe Bergheaud 
---
Changes since v1:
  - Rebased on Ian's patch
"cxl: Abstract the differences between the PSL and XSL"

 drivers/misc/cxl/cxl.h| 15 +++
 drivers/misc/cxl/guest.c  |  9 ++---
 drivers/misc/cxl/irq.c| 29 +
 drivers/misc/cxl/native.c | 12 +++-
 4 files changed, 57 insertions(+), 8 deletions(-)

diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index 7745252..d928a8c 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -188,6 +188,18 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An = {0x0A0};
 #define CXL_PSL_ID_An_F(1ull << (63-31))
 #define CXL_PSL_ID_An_L(1ull << (63-30))
 
+/** CXL_PSL_SERR_An /
+#define CXL_PSL_SERR_An_afuto  (1ull << (63-0))
+#define CXL_PSL_SERR_An_afudis (1ull << (63-1))
+#define CXL_PSL_SERR_An_afuov  (1ull << (63-2))
+#define CXL_PSL_SERR_An_badsrc (1ull << (63-3))
+#define CXL_PSL_SERR_An_badctx (1ull << (63-4))
+#define CXL_PSL_SERR_An_llcmdis(1ull << (63-5))
+#define CXL_PSL_SERR_An_llcmdto(1ull << (63-6))
+#define CXL_PSL_SERR_An_afupar (1ull << (63-7))
+#define CXL_PSL_SERR_An_afudup (1ull << (63-8))
+#define CXL_PSL_SERR_An_AE (1ull << (63-30))
+
 /** CXL_PSL_SCNTL_An /
 #define CXL_PSL_SCNTL_An_CR  (0x1ull << (63-15))
 /* Programming Modes: */
@@ -905,4 +917,7 @@ extern const struct cxl_backend_ops *cxl_ops;
 
 /* check if the given pci_dev is on the the cxl vphb bus */
 bool cxl_pci_is_vphb_device(struct pci_dev *dev);
+
+/* decode AFU error bits in the PSL register PSL_SERR_An */
+void cxl_afu_decode_psl_serr(struct cxl_afu *afu, u64 serr);
 #endif
diff --git a/drivers/misc/cxl/guest.c b/drivers/misc/cxl/guest.c
index bc8d0b9..d516d0a 100644
--- a/drivers/misc/cxl/guest.c
+++ b/drivers/misc/cxl/guest.c
@@ -196,15 +196,18 @@ static irqreturn_t guest_slice_irq_err(int irq, void 
*data)
 {
struct cxl_afu *afu = data;
int rc;
-   u64 serr;
+   u64 serr, afu_error, dsisr;
 
-   WARN(irq, "CXL SLICE ERROR interrupt %i\n", irq);
rc = cxl_h_get_fn_error_interrupt(afu->guest->handle, );
if (rc) {
dev_crit(>dev, "Couldn't read PSL_SERR_An: %d\n", rc);
return IRQ_HANDLED;
}
-   dev_crit(>dev, "PSL_SERR_An: 0x%.16llx\n", serr);
+   afu_error = cxl_p2n_read(afu, CXL_AFU_ERR_An);
+   dsisr = cxl_p2n_read(afu, CXL_PSL_DSISR_An);
+   cxl_afu_decode_psl_serr(afu, serr);
+   dev_crit(>dev, "AFU_ERR_An: 0x%.16llx\n", afu_error);
+   dev_crit(>dev, "PSL_DSISR_An: 0x%.16llx\n", dsisr);
 
rc = cxl_h_ack_fn_error_interrupt(afu->guest->handle, serr);
if (rc)
diff --git a/drivers/misc/cxl/irq.c b/drivers/misc/cxl/irq.c
index 8def455..40fffe4 100644
--- a/drivers/misc/cxl/irq.c
+++ b/drivers/misc/cxl/irq.c
@@ -374,3 +374,32 @@ void afu_release_irqs(struct cxl_context *ctx, void 
*cookie)
 
ctx->irq_count = 0;
 }
+
+void cxl_afu_decode_psl_serr(struct cxl_afu *afu, u64 serr)
+{
+   dev_crit(>dev,
+"PSL Slice error received. Check AFU for root cause.\n");
+   dev_crit(>dev, "PSL_SERR_An: 0x%016llx\n", serr);
+   if (serr & CXL_PSL_SERR_An_afuto)
+   dev_crit(>dev, "AFU MMIO Timeout\n");
+   if (serr & CXL_PSL_SERR_An_afudis)
+   dev_crit(>dev,
+"MMIO targeted Accelerator that was not enabled\n");
+   if (serr & CXL_PSL_SERR_An_afuov)
+   dev_crit(>dev, "AFU CTAG Overflow\n");
+   if (serr & CXL_PSL_SERR_An_badsrc)
+   dev_crit(>dev, "Bad Interrupt Source\n");
+   if (serr & CXL_PSL_SERR_An_badctx)
+   dev_crit(>dev, "Bad Context Handle\n");
+   if (serr & CXL_PSL_SERR_An_llcmdis)
+   dev_crit(>dev, "LLCMD to Disabled AFU\n");
+   if (serr & CXL_PSL_SERR_An_llcmdto)
+   dev_crit(>dev, "LLCMD Timeout to AFU\n");
+   if (serr & CXL_PSL_SERR_An_afupar)
+   dev_crit(>dev, "AFU MMIO Parity Error\n");
+   if (serr & CXL_PSL_SERR_An_afudup)
+   dev_crit(>dev, "AFU MMIO Duplicate CTAG Error\n");
+   if (serr & CXL_PSL_SERR_An_AE)
+   dev_crit(>dev,
+"AFU asserted JDONE with JERROR in AFU Directed 
Mode\n");
+}
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index d867326..c4d8815 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -767,7 +767,7 @@ void cxl_native_psl_irq_dump_regs(struct cxl_context *ctx)
dev_crit(>afu->dev, "PSL_FIR2: 0x%016llx\n", fir2);
if (ctx->afu->adapter->native->sl_ops->register_serr_irq) {
serr = cxl_p1n_read(ctx->afu, CXL_PSL_SERR_An);
-   dev_crit(>afu->dev, "PSL_SERR_An: 0x%016llx\n", serr);
+   

[PATCH 10/14] cxl: Add support for interrupts on the Mellanox CX4

[Ian Munsie]

From: Ian Munsie 

The Mellanox CX4 in cxl mode uses a hybrid interrupt model, where
interrupts are routed from the networking hardware to the XSL using the
MSIX table, and from there will be transformed back into an MSIX
interrupt using the cxl style interrupts (i.e. using IVTE entries and
ranges to map a PE and AFU interrupt number to an MSIX address).

We want to hide the implementation details of cxl interrupts as much as
possible. To this end, we use a special version of the MSI setup &
teardown routines in the PHB while in cxl mode to allocate the cxl
interrupts and configure the IVTE entries in the process element.

This function does not configure the MSIX table - the CX4 card uses a
custom format in that table and it would not be appropriate to fill that
out in generic code. The rest of the functionality is similar to the
"Full MSI-X mode" described in the CAIA, and this could be easily
extended to support other adapters that use that mode in the future.

The interrupts will be associated with the default context. If the
maximum number of interrupts per context has been limited (e.g. by the
mlx5 driver), it will automatically allocate additional kernel contexts
to associate extra interrupts as required. These contexts will be
started using the same WED that was used to start the default context.

Signed-off-by: Ian Munsie 
---
 arch/powerpc/platforms/powernv/pci-cxl.c  | 84 +++
 arch/powerpc/platforms/powernv/pci-ioda.c |  4 ++
 arch/powerpc/platforms/powernv/pci.h  |  2 +
 drivers/misc/cxl/api.c| 71 ++
 drivers/misc/cxl/base.c   | 31 
 drivers/misc/cxl/cxl.h|  4 ++
 drivers/misc/cxl/main.c   |  2 +
 include/misc/cxl-base.h   |  4 ++
 8 files changed, 202 insertions(+)

diff --git a/arch/powerpc/platforms/powernv/pci-cxl.c 
b/arch/powerpc/platforms/powernv/pci-cxl.c
index 2f386f5..1559ca2 100644
--- a/arch/powerpc/platforms/powernv/pci-cxl.c
+++ b/arch/powerpc/platforms/powernv/pci-cxl.c
@@ -8,6 +8,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -273,3 +274,86 @@ void pnv_cxl_disable_device(struct pci_dev *dev)
cxl_pci_disable_device(dev);
cxl_afu_put(afu);
 }
+
+/*
+ * This is a special version of pnv_setup_msi_irqs for cards in cxl mode. This
+ * function handles setting up the IVTE entries for the XSL to use.
+ *
+ * We are currently not filling out the MSIX table, since the only currently
+ * supported adapter (CX4) uses a custom MSIX table format in cxl mode and it
+ * is up to their driver to fill that out. In the future we may fill out the
+ * MSIX table (and change the IVTE entries to be an index to the MSIX table)
+ * for adapters implementing the Full MSI-X mode described in the CAIA.
+ */
+int pnv_cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
+{
+   struct pci_controller *hose = pci_bus_to_host(pdev->bus);
+   struct pnv_phb *phb = hose->private_data;
+   struct msi_desc *entry;
+   struct cxl_context *ctx = NULL;
+   unsigned int virq;
+   int hwirq;
+   int afu_irq = 0;
+   int rc;
+
+   if (WARN_ON(!phb) || !phb->msi_bmp.bitmap)
+   return -ENODEV;
+
+   if (pdev->no_64bit_msi && !phb->msi32_support)
+   return -ENODEV;
+
+   rc = cxl_cx4_setup_msi_irqs(pdev, nvec, type);
+   if (rc)
+   return rc;
+
+   for_each_pci_msi_entry(entry, pdev) {
+   if (!entry->msi_attrib.is_64 && !phb->msi32_support) {
+   pr_warn("%s: Supports only 64-bit MSIs\n",
+   pci_name(pdev));
+   return -ENXIO;
+   }
+
+   hwirq = cxl_next_msi_hwirq(pdev, , _irq);
+   if (WARN_ON(hwirq < 0))
+   return hwirq;
+
+   virq = irq_create_mapping(NULL, hwirq);
+   if (virq == NO_IRQ) {
+   pr_warn("%s: Failed to map cxl mode MSI to linux irq\n",
+   pci_name(pdev));
+   return -ENOMEM;
+   }
+
+   rc = pnv_cxl_ioda_msi_setup(pdev, hwirq, virq);
+   if (rc) {
+   pr_warn("%s: Failed to setup cxl mode MSI\n", 
pci_name(pdev));
+   irq_dispose_mapping(virq);
+   return rc;
+   }
+
+   irq_set_msi_desc(virq, entry);
+   }
+
+   return 0;
+}
+
+void pnv_cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev)
+{
+   struct pci_controller *hose = pci_bus_to_host(pdev->bus);
+   struct pnv_phb *phb = hose->private_data;
+   struct msi_desc *entry;
+   irq_hw_number_t hwirq;
+
+   if (WARN_ON(!phb))
+   return;
+
+   for_each_pci_msi_entry(entry, pdev) {
+   if (entry->irq == NO_IRQ)
+   

[PATCH 04/14] cxl: Move cxl_afu_get / cxl_afu_put to base

[Ian Munsie]

From: Ian Munsie 

The Mellanox CX4 uses a model where the AFU is one physical function of
the device, and is used by other peer physical functions of the same
device. This will require those other devices to grab a reference on the
AFU when they are initialised to make sure that it does not go away
during their lifetime.

Move the AFU refcount functions to base.c so they can be called from
the PHB code.

Signed-off-by: Ian Munsie 
---
 drivers/misc/cxl/base.c | 13 +
 drivers/misc/cxl/cxl.h  | 12 
 include/misc/cxl-base.h |  4 
 3 files changed, 17 insertions(+), 12 deletions(-)

diff --git a/drivers/misc/cxl/base.c b/drivers/misc/cxl/base.c
index 9b90ec6..c35a52f 100644
--- a/drivers/misc/cxl/base.c
+++ b/drivers/misc/cxl/base.c
@@ -54,6 +54,19 @@ static inline void cxl_calls_put(struct cxl_calls *calls) { }
 
 #endif /* CONFIG_CXL_MODULE */
 
+/* AFU refcount management */
+struct cxl_afu *cxl_afu_get(struct cxl_afu *afu)
+{
+   return (get_device(>dev) == NULL) ? NULL : afu;
+}
+EXPORT_SYMBOL_GPL(cxl_afu_get);
+
+void cxl_afu_put(struct cxl_afu *afu)
+{
+   put_device(>dev);
+}
+EXPORT_SYMBOL_GPL(cxl_afu_put);
+
 void cxl_slbia(struct mm_struct *mm)
 {
struct cxl_calls *calls;
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index aafffa8..9e2621e 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -428,18 +428,6 @@ struct cxl_afu {
bool enabled;
 };
 
-/* AFU refcount management */
-static inline struct cxl_afu *cxl_afu_get(struct cxl_afu *afu)
-{
-
-   return (get_device(>dev) == NULL) ? NULL : afu;
-}
-
-static inline void  cxl_afu_put(struct cxl_afu *afu)
-{
-   put_device(>dev);
-}
-
 
 struct cxl_irq_name {
struct list_head list;
diff --git a/include/misc/cxl-base.h b/include/misc/cxl-base.h
index 5ae9625..f53808f 100644
--- a/include/misc/cxl-base.h
+++ b/include/misc/cxl-base.h
@@ -36,11 +36,15 @@ static inline void cxl_ctx_put(void)
atomic_dec(_use_count);
 }
 
+struct cxl_afu *cxl_afu_get(struct cxl_afu *afu);
+void cxl_afu_put(struct cxl_afu *afu);
 void cxl_slbia(struct mm_struct *mm);
 
 #else /* CONFIG_CXL_BASE */
 
 static inline bool cxl_ctx_in_use(void) { return false; }
+static inline struct cxl_afu *cxl_afu_get(struct cxl_afu *afu) { return NULL; }
+static inline void cxl_afu_put(struct cxl_afu *afu) {}
 static inline void cxl_slbia(struct mm_struct *mm) {}
 
 #endif /* CONFIG_CXL_BASE */
-- 
2.8.1

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[PATCH 02/14] cxl: Add cxl_slot_is_supported API

[Ian Munsie]

From: Ian Munsie 

This extends the check that the adapter is in a CAPI capable slot so
that it may be called by external users in the kernel API. This will be
used by the upcoming Mellanox CX4 support, which needs to know ahead of
time if the card can be switched to cxl mode so that it can leave it in
PCI mode if it is not.

This API takes a parameter to check if CAPP DMA mode is supported, which
it currently only allows on P8NVL systems, since that mode currently has
issues accessing memory < 4GB on P8, and we cannot realistically avoid
that.

This API does not currently check if a CAPP unit is available (i.e. not
already assigned to another PHB) on P8. Doing so would be racy since it
is assigned on a first come first serve basis, and so long as CAPP DMA
mode is not supported on P8 we don't need this, since the only
anticipated user of this API requires CAPP DMA mode.

Cc: Philippe Bergheaud 
Signed-off-by: Ian Munsie 
---
 drivers/misc/cxl/pci.c | 37 +
 include/misc/cxl.h | 15 +++
 2 files changed, 52 insertions(+)

diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 3a5f980..9530280 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1426,6 +1426,43 @@ static int cxl_slot_is_switched(struct pci_dev *dev)
return (depth > CXL_MAX_PCIEX_PARENT);
 }
 
+bool cxl_slot_is_supported(struct pci_dev *dev, int flags)
+{
+   if (!cpu_has_feature(CPU_FTR_HVMODE))
+   return false;
+
+   if ((flags & CXL_SLOT_FLAG_DMA) && (!pvr_version_is(PVR_POWER8NVL))) {
+   /*
+* CAPP DMA mode is technically supported on regular P8, but
+* will EEH if the card attempts to acccess memory < 4GB, which
+* we cannot realistically avoid. We might be able to work
+* around the issue, but until then return unsupported:
+*/
+   return false;
+   }
+
+   if (cxl_slot_is_switched(dev))
+   return false;
+
+   /*
+* XXX: This gets a little tricky on regular P8 (not POWER8NVL) since
+* the CAPP can be connected to PHB 0, 1 or 2 on a first come first
+* served basis, which is racy to check from here. If we need to
+* support this in future we might need to consider having this
+* function effectively reserve it ahead of time.
+*
+* Currently, the only user of this API is the Mellanox CX4, which is
+* only supported on P8NVL due to the above mentioned limitation of
+* CAPP DMA mode and therefore does not need to worry about thi. If the
+* issue with CAPP DMA mode is later worked around on P8 we might need
+* to revisit this.
+*/
+
+   return true;
+}
+EXPORT_SYMBOL_GPL(cxl_slot_is_supported);
+
+
 static int cxl_probe(struct pci_dev *dev, const struct pci_device_id *id)
 {
struct cxl *adapter;
diff --git a/include/misc/cxl.h b/include/misc/cxl.h
index b6d040f..dd9eebb 100644
--- a/include/misc/cxl.h
+++ b/include/misc/cxl.h
@@ -24,6 +24,21 @@
  * generic PCI API. This API is agnostic to the actual AFU.
  */
 
+#define CXL_SLOT_FLAG_DMA 0x1
+
+/*
+ * Checks if the given card is in a cxl capable slot. Pass CXL_SLOT_FLAG_DMA if
+ * the card requires CAPP DMA mode to also check if the system supports it.
+ * This is intended to be used by bi-modal devices to determine if they can use
+ * cxl mode or if they should continue running in PCI mode.
+ *
+ * Note that this only checks if the slot is cxl capable - it does not
+ * currently check if the CAPP is currently available for chips where it can be
+ * assigned to different PHBs on a first come first serve basis (i.e. P8)
+ */
+bool cxl_slot_is_supported(struct pci_dev *dev, int flags);
+
+
 /* Get the AFU associated with a pci_dev */
 struct cxl_afu *cxl_pci_to_afu(struct pci_dev *dev);
 
-- 
2.8.1

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[PATCH 14/14] cxl: Add cxl_check_and_switch_mode() API to switch bi-modal cards

[Ian Munsie]

From: Andrew Donnellan 

Add a new API, cxl_check_and_switch_mode() to allow for switching of
bi-modal CAPI cards, such as the Mellanox CX-4 network card.

When a driver requests to switch a card to CAPI mode, use PCI hotplug
infrastructure to remove all PCI devices underneath the slot. We then write
an updated mode control register to the CAPI VSEC, hot reset the card, and
reprobe the card.

As the card may present a different set of PCI devices after the mode
switch, use the infrastructure provided by the pnv_php driver and the OPAL
PCI slot management facilities to ensure that:

  * the old devices are removed from both the OPAL and Linux device trees
  * the new devices are probed by OPAL and added to the OPAL device tree
  * the new devices are added to the Linux device tree and probed through
the regular PCI device probe path

As such, introduce a new option, CONFIG_CXL_BIMODAL, with a dependency on
the pnv_php driver.

Refactor existing code that touches the mode control register in the
regular single mode case into a new function, setup_cxl_protocol_area().

Co-authored-by: Ian Munsie 
Cc: Gavin Shan 
Signed-off-by: Andrew Donnellan 
Reviewed-by: Gavin Shan 
---
 drivers/misc/cxl/Kconfig |   8 ++
 drivers/misc/cxl/pci.c   | 234 +++
 include/misc/cxl.h   |  25 +
 3 files changed, 249 insertions(+), 18 deletions(-)

diff --git a/drivers/misc/cxl/Kconfig b/drivers/misc/cxl/Kconfig
index 560412c..6859723 100644
--- a/drivers/misc/cxl/Kconfig
+++ b/drivers/misc/cxl/Kconfig
@@ -38,3 +38,11 @@ config CXL
  CAPI adapters are found in POWER8 based systems.
 
  If unsure, say N.
+
+config CXL_BIMODAL
+   bool "Support for bi-modal CAPI cards"
+   depends on HOTPLUG_PCI_POWERNV = y && CXL || HOTPLUG_PCI_POWERNV = m && 
CXL = m
+   default y
+   help
+ Select this option to enable support for bi-modal CAPI cards, such as
+ the Mellanox CX-4.
\ No newline at end of file
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 090eee8..63abd26 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -55,6 +55,8 @@
pci_read_config_byte(dev, vsec + 0xa, dest)
 #define CXL_WRITE_VSEC_MODE_CONTROL(dev, vsec, val) \
pci_write_config_byte(dev, vsec + 0xa, val)
+#define CXL_WRITE_VSEC_MODE_CONTROL_BUS(bus, devfn, vsec, val) \
+   pci_bus_write_config_byte(bus, devfn, vsec + 0xa, val)
 #define CXL_VSEC_PROTOCOL_MASK   0xe0
 #define CXL_VSEC_PROTOCOL_1024TB 0x80
 #define CXL_VSEC_PROTOCOL_512TB  0x40
@@ -614,36 +616,232 @@ static int setup_cxl_bars(struct pci_dev *dev)
return 0;
 }
 
-/* pciex node: ibm,opal-m64-window = <0x3d058 0x0 0x3d058 0x0 0x8 0x0>; */
-static int switch_card_to_cxl(struct pci_dev *dev)
-{
+#ifdef CONFIG_CXL_BIMODAL
+
+struct cxl_switch_work {
+   struct pci_dev *dev;
+   struct work_struct work;
int vsec;
+   int mode;
+};
+
+static void switch_card_to_cxl(struct work_struct *work)
+{
+   struct cxl_switch_work *switch_work =
+   container_of(work, struct cxl_switch_work, work);
+   struct pci_dev *dev = switch_work->dev;
+   struct pci_bus *bus = dev->bus;
+   struct pci_controller *hose = pci_bus_to_host(bus);
+   struct pci_dev *bridge;
+   struct pnv_php_slot *php_slot;
+   unsigned int devfn;
u8 val;
int rc;
 
-   dev_info(>dev, "switch card to CXL\n");
+   dev_info(>dev, "cxl: Preparing for mode switch...\n");
+   bridge = list_first_entry_or_null(>bus->devices, struct pci_dev,
+ bus_list);
+   if (!bridge) {
+   dev_WARN(>dev, "cxl: Couldn't find root port!\n");
+   goto err_free_work;
+   }
 
-   if (!(vsec = find_cxl_vsec(dev))) {
-   dev_err(>dev, "ABORTING: CXL VSEC not found!\n");
+   php_slot = pnv_php_find_slot(pci_device_to_OF_node(bridge));
+   if (!php_slot) {
+   dev_err(>dev, "cxl: Failed to find slot hotplug "
+  "information. You may need to upgrade "
+  "skiboot. Aborting.\n");
+   pci_dev_put(dev);
+   goto err_free_work;
+   }
+
+   rc = CXL_READ_VSEC_MODE_CONTROL(dev, switch_work->vsec, );
+   if (rc) {
+   dev_err(>dev, "cxl: Failed to read CAPI mode control: 
%i\n", rc);
+   pci_dev_put(dev);
+   goto err_free_work;
+   }
+   devfn = dev->devfn;
+   pci_dev_put(dev);
+
+   dev_dbg(>dev, "cxl: Removing PCI devices from kernel\n");
+   pci_lock_rescan_remove();
+   pci_hp_remove_devices(bridge->subordinate);
+   pci_unlock_rescan_remove();
+
+   /* Switch the CXL protocol on the card */
+   if (switch_work->mode == 

[PATCH 13/14] PCI/hotplug: pnv_php: handle OPAL_PCI_SLOT_OFFLINE power state

[Ian Munsie]

From: Andrew Donnellan 

When calling pnv_php_set_slot_power_state() with state ==
OPAL_PCI_SLOT_OFFLINE, remove devices from the device tree as if we're
dealing with OPAL_PCI_SLOT_POWER_OFF.

Cc: Gavin Shan 
Cc: linux-...@vger.kernel.org
Cc: Bjorn Helgaas 
Signed-off-by: Andrew Donnellan 
Acked-by: Gavin Shan 
---
 drivers/pci/hotplug/pnv_php.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/hotplug/pnv_php.c b/drivers/pci/hotplug/pnv_php.c
index 2d2f704..e6245b0 100644
--- a/drivers/pci/hotplug/pnv_php.c
+++ b/drivers/pci/hotplug/pnv_php.c
@@ -317,7 +317,7 @@ int pnv_php_set_slot_power_state(struct hotplug_slot *slot,
return ret;
}
 
-   if (state == OPAL_PCI_SLOT_POWER_OFF)
+   if (state == OPAL_PCI_SLOT_POWER_OFF || state == OPAL_PCI_SLOT_OFFLINE)
pnv_php_rmv_devtree(php_slot);
else
ret = pnv_php_add_devtree(php_slot);
-- 
2.8.1

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[PATCH 12/14] PCI/hotplug: pnv_php: export symbols and move struct types needed by cxl

[Ian Munsie]

From: Andrew Donnellan 

The cxl driver will use infrastructure from pnv_php to handle device tree
updates when switching bi-modal CAPI cards into CAPI mode.

To enable this, export pnv_php_find_slot() and
pnv_php_set_slot_power_state(), and add corresponding declarations, as well
as the definition of struct pnv_php_slot, to asm/pnv-pci.h.

Cc: Gavin Shan 
Cc: linux-...@vger.kernel.org
Cc: Bjorn Helgaas 
Signed-off-by: Andrew Donnellan 
Acked-by: Gavin Shan 
---
 arch/powerpc/include/asm/pnv-pci.h | 28 
 drivers/pci/hotplug/Kconfig|  1 +
 drivers/pci/hotplug/pnv_php.c  | 32 +---
 3 files changed, 34 insertions(+), 27 deletions(-)

diff --git a/arch/powerpc/include/asm/pnv-pci.h 
b/arch/powerpc/include/asm/pnv-pci.h
index c47097f..0cbd813 100644
--- a/arch/powerpc/include/asm/pnv-pci.h
+++ b/arch/powerpc/include/asm/pnv-pci.h
@@ -11,6 +11,7 @@
 #define _ASM_PNV_PCI_H
 
 #include 
+#include 
 #include 
 #include 
 
@@ -47,4 +48,31 @@ void pnv_cxl_phb_set_peer_afu(struct pci_dev *dev, struct 
cxl_afu *afu);
 
 #endif
 
+struct pnv_php_slot {
+   struct hotplug_slot slot;
+   struct hotplug_slot_infoslot_info;
+   uint64_tid;
+   char*name;
+   int slot_no;
+   struct kref kref;
+#define PNV_PHP_STATE_INITIALIZED  0
+#define PNV_PHP_STATE_REGISTERED   1
+#define PNV_PHP_STATE_POPULATED2
+#define PNV_PHP_STATE_OFFLINE  3
+   int state;
+   struct device_node  *dn;
+   struct pci_dev  *pdev;
+   struct pci_bus  *bus;
+   boolpower_state_check;
+   void*fdt;
+   void*dt;
+   struct of_changeset ocs;
+   struct pnv_php_slot *parent;
+   struct list_headchildren;
+   struct list_headlink;
+};
+extern struct pnv_php_slot *pnv_php_find_slot(struct device_node *dn);
+extern int pnv_php_set_slot_power_state(struct hotplug_slot *slot,
+   uint8_t state);
+
 #endif
diff --git a/drivers/pci/hotplug/Kconfig b/drivers/pci/hotplug/Kconfig
index aadce45..b719a72 100644
--- a/drivers/pci/hotplug/Kconfig
+++ b/drivers/pci/hotplug/Kconfig
@@ -117,6 +117,7 @@ config HOTPLUG_PCI_POWERNV
tristate "PowerPC PowerNV PCI Hotplug driver"
depends on PPC_POWERNV && EEH
select OF_DYNAMIC
+   select HOTPLUG_PCI_POWERNV_BASE
help
  Say Y here if you run PowerPC PowerNV platform that supports
  PCI Hotplug
diff --git a/drivers/pci/hotplug/pnv_php.c b/drivers/pci/hotplug/pnv_php.c
index 6086db6..2d2f704 100644
--- a/drivers/pci/hotplug/pnv_php.c
+++ b/drivers/pci/hotplug/pnv_php.c
@@ -22,30 +22,6 @@
 #define DRIVER_AUTHOR  "Gavin Shan, IBM Corporation"
 #define DRIVER_DESC"PowerPC PowerNV PCI Hotplug Driver"
 
-struct pnv_php_slot {
-   struct hotplug_slot slot;
-   struct hotplug_slot_infoslot_info;
-   uint64_tid;
-   char*name;
-   int slot_no;
-   struct kref kref;
-#define PNV_PHP_STATE_INITIALIZED  0
-#define PNV_PHP_STATE_REGISTERED   1
-#define PNV_PHP_STATE_POPULATED2
-#define PNV_PHP_STATE_OFFLINE  3
-   int state;
-   struct device_node  *dn;
-   struct pci_dev  *pdev;
-   struct pci_bus  *bus;
-   boolpower_state_check;
-   void*fdt;
-   void*dt;
-   struct of_changeset ocs;
-   struct pnv_php_slot *parent;
-   struct list_headchildren;
-   struct list_headlink;
-};
-
 static LIST_HEAD(pnv_php_slot_list);
 static DEFINE_SPINLOCK(pnv_php_lock);
 
@@ -91,7 +67,7 @@ static struct pnv_php_slot *pnv_php_match(struct device_node 
*dn,
return NULL;
 }
 
-static struct pnv_php_slot *pnv_php_find_slot(struct device_node *dn)
+struct pnv_php_slot *pnv_php_find_slot(struct device_node *dn)
 {
struct pnv_php_slot *php_slot, *tmp;
unsigned long flags;
@@ -108,6 +84,7 @@ static struct pnv_php_slot *pnv_php_find_slot(struct 
device_node *dn)
 
return NULL;
 }
+EXPORT_SYMBOL_GPL(pnv_php_find_slot);
 
 /*
  * Remove pdn for all children of the indicated device node.
@@ -316,8 +293,8 @@ out:
return ret;
 }
 
-static int pnv_php_set_slot_power_state(struct hotplug_slot 

[PATCH 11/14] cxl: Workaround PE=0 hardware limitation in Mellanox CX4

[Ian Munsie]

From: Ian Munsie 

The CX4 card cannot cope with a context with PE=0 due to a hardware
limitation, resulting in:

[   34.166577] command failed, status limits exceeded(0x8), syndrome 0x5a7939
[   34.166580] mlx5_core :01:00.1: Failed allocating uar, aborting

Since the kernel API allocates a default context very early during
device init that will almost certainly get Process Element ID 0 there is
no easy way for us to extend the API to allow the Mellanox to inform us
of this limitation ahead of time.

Instead, work around the issue by extending the XSL structure to include
a minimum PE to allocate. Although the bug is not in the XSL, it is the
easiest place to work around this limitation given that the CX4 is
currently the only card that uses an XSL.

Signed-off-by: Ian Munsie 
---
 drivers/misc/cxl/context.c | 3 ++-
 drivers/misc/cxl/cxl.h | 1 +
 drivers/misc/cxl/pci.c | 1 +
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/cxl/context.c b/drivers/misc/cxl/context.c
index 2616cddb..bdee9a0 100644
--- a/drivers/misc/cxl/context.c
+++ b/drivers/misc/cxl/context.c
@@ -90,7 +90,8 @@ int cxl_context_init(struct cxl_context *ctx, struct cxl_afu 
*afu, bool master,
 */
mutex_lock(>contexts_lock);
idr_preload(GFP_KERNEL);
-   i = idr_alloc(>afu->contexts_idr, ctx, 0,
+   i = idr_alloc(>afu->contexts_idr, ctx,
+ ctx->afu->adapter->native->sl_ops->min_pe,
  ctx->afu->num_procs, GFP_NOWAIT);
idr_preload_end();
mutex_unlock(>contexts_lock);
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index 078b268..19b132f 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -549,6 +549,7 @@ struct cxl_service_layer_ops {
u64 (*timebase_read)(struct cxl *adapter);
int capi_mode;
bool needs_reset_before_disable;
+   int min_pe;
 };
 
 struct cxl_native {
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 02242be..090eee8 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1321,6 +1321,7 @@ static const struct cxl_service_layer_ops xsl_ops = {
.write_timebase_ctrl = write_timebase_ctrl_xsl,
.timebase_read = timebase_read_xsl,
.capi_mode = OPAL_PHB_CAPI_MODE_DMA,
+   .min_pe = 1, /* Workaround for Mellanox CX4 HW bug */
 };
 
 static void set_sl_ops(struct cxl *adapter, struct pci_dev *dev)
-- 
2.8.1

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[PATCH 09/14] cxl: Add preliminary workaround for CX4 interrupt limitation

[Ian Munsie]

From: Ian Munsie 

The Mellanox CX4 has a hardware limitation where only 4 bits of the
AFU interrupt number can be passed to the XSL when sending an interrupt,
limiting it to only 15 interrupts per context (AFU interrupt number 0 is
invalid).

In order to overcome this, we will allocate additional contexts linked
to the default context as extra address space for the extra interrupts -
this will be implemented in the next patch.

This patch adds the preliminary support to allow this, by way of adding
a linked list in the context structure that we use to keep track of the
contexts dedicated to interrupts, and an API to simultaneously iterate
over the related context structures, AFU interrupt numbers and hardware
interrupt numbers. The point of using a single API to iterate these is
to hide some of the details of the iteration from external code, and to
reduce the number of APIs that need to be exported via base.c to allow
built in code to call.

Signed-off-by: Ian Munsie 
---
 drivers/misc/cxl/api.c | 15 +++
 drivers/misc/cxl/base.c| 17 +
 drivers/misc/cxl/context.c |  1 +
 drivers/misc/cxl/cxl.h | 10 ++
 drivers/misc/cxl/main.c|  1 +
 include/misc/cxl.h |  9 +
 6 files changed, 53 insertions(+)

diff --git a/drivers/misc/cxl/api.c b/drivers/misc/cxl/api.c
index 1e2c0d9..f02a859 100644
--- a/drivers/misc/cxl/api.c
+++ b/drivers/misc/cxl/api.c
@@ -97,6 +97,21 @@ static irq_hw_number_t cxl_find_afu_irq(struct cxl_context 
*ctx, int num)
return 0;
 }
 
+int _cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int 
*afu_irq)
+{
+   if (*ctx == NULL || *afu_irq == 0) {
+   *afu_irq = 1;
+   *ctx = cxl_get_context(pdev);
+   } else {
+   (*afu_irq)++;
+   if (*afu_irq > cxl_get_max_irqs_per_process(pdev)) {
+   *ctx = list_next_entry(*ctx, extra_irq_contexts);
+   *afu_irq = 1;
+   }
+   }
+   return cxl_find_afu_irq(*ctx, *afu_irq);
+}
+/* Exported via cxl_base */
 
 int cxl_set_priv(struct cxl_context *ctx, void *priv)
 {
diff --git a/drivers/misc/cxl/base.c b/drivers/misc/cxl/base.c
index af20b34..0f89ea9 100644
--- a/drivers/misc/cxl/base.c
+++ b/drivers/misc/cxl/base.c
@@ -141,6 +141,23 @@ void cxl_pci_disable_device(struct pci_dev *dev)
 }
 EXPORT_SYMBOL_GPL(cxl_pci_disable_device);
 
+int cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int 
*afu_irq)
+{
+   int ret;
+   struct cxl_calls *calls;
+
+   calls = cxl_calls_get();
+   if (!calls)
+   return -EBUSY;
+
+   ret = calls->cxl_next_msi_hwirq(pdev, ctx, afu_irq);
+
+   cxl_calls_put(calls);
+
+   return ret;
+}
+EXPORT_SYMBOL_GPL(cxl_next_msi_hwirq);
+
 static int __init cxl_base_init(void)
 {
struct device_node *np = NULL;
diff --git a/drivers/misc/cxl/context.c b/drivers/misc/cxl/context.c
index edbb99e..2616cddb 100644
--- a/drivers/misc/cxl/context.c
+++ b/drivers/misc/cxl/context.c
@@ -68,6 +68,7 @@ int cxl_context_init(struct cxl_context *ctx, struct cxl_afu 
*afu, bool master,
ctx->pending_afu_err = false;
 
INIT_LIST_HEAD(>irq_names);
+   INIT_LIST_HEAD(>extra_irq_contexts);
 
/*
 * When we have to destroy all contexts in cxl_context_detach_all() we
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index c94b54f..67464c9 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -525,6 +525,14 @@ struct cxl_context {
atomic_t afu_driver_events;
 
struct rcu_head rcu;
+
+   /*
+* Only used when more interrupts are allocated via
+* pci_enable_msix_range than are supported in the default context, to
+* use additional contexts to overcome the limitation. i.e. Mellanox
+* CX4 only:
+*/
+   struct list_head extra_irq_contexts;
 };
 
 struct cxl_service_layer_ops {
@@ -710,11 +718,13 @@ ssize_t cxl_pci_afu_read_err_buffer(struct cxl_afu *afu, 
char *buf,
 /* Internal functions wrapped in cxl_base to allow PHB to call them */
 bool _cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu 
*afu);
 void _cxl_pci_disable_device(struct pci_dev *dev);
+int _cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int 
*afu_irq);
 
 struct cxl_calls {
void (*cxl_slbia)(struct mm_struct *mm);
bool (*cxl_pci_associate_default_context)(struct pci_dev *dev, struct 
cxl_afu *afu);
void (*cxl_pci_disable_device)(struct pci_dev *dev);
+   int (*cxl_next_msi_hwirq)(struct pci_dev *pdev, struct cxl_context 
**ctx, int *afu_irq);
 
struct module *owner;
 };
diff --git a/drivers/misc/cxl/main.c b/drivers/misc/cxl/main.c
index 4e5474b..66fac71 100644
--- a/drivers/misc/cxl/main.c
+++ b/drivers/misc/cxl/main.c
@@ -112,6 +112,7 @@ static struct cxl_calls cxl_calls = {

[PATCH 08/14] cxl: Add kernel APIs to get & set the max irqs per context

[Ian Munsie]

From: Ian Munsie 

These APIs will be used by the Mellanox CX4 support. While they function
standalone to configure existing behaviour, their primary purpose is to
allow the Mellanox driver to inform the cxl driver of a hardware
limitation, which will be used in a future patch.

Signed-off-by: Ian Munsie 
---
 drivers/misc/cxl/api.c | 27 +++
 include/misc/cxl.h | 10 ++
 2 files changed, 37 insertions(+)

diff --git a/drivers/misc/cxl/api.c b/drivers/misc/cxl/api.c
index 6a030bf..1e2c0d9 100644
--- a/drivers/misc/cxl/api.c
+++ b/drivers/misc/cxl/api.c
@@ -447,3 +447,30 @@ ssize_t cxl_read_adapter_vpd(struct pci_dev *dev, void 
*buf, size_t count)
return cxl_ops->read_adapter_vpd(afu->adapter, buf, count);
 }
 EXPORT_SYMBOL_GPL(cxl_read_adapter_vpd);
+
+int cxl_set_max_irqs_per_process(struct pci_dev *dev, int irqs)
+{
+   struct cxl_afu *afu = cxl_pci_to_afu(dev);
+   if (IS_ERR(afu))
+   return -ENODEV;
+
+   if (irqs > afu->adapter->user_irqs)
+   return -EINVAL;
+
+   /* Limit user_irqs to prevent the user increasing this via sysfs */
+   afu->adapter->user_irqs = irqs;
+   afu->irqs_max = irqs;
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(cxl_set_max_irqs_per_process);
+
+int cxl_get_max_irqs_per_process(struct pci_dev *dev)
+{
+   struct cxl_afu *afu = cxl_pci_to_afu(dev);
+   if (IS_ERR(afu))
+   return -ENODEV;
+
+   return afu->irqs_max;
+}
+EXPORT_SYMBOL_GPL(cxl_get_max_irqs_per_process);
diff --git a/include/misc/cxl.h b/include/misc/cxl.h
index dd9eebb..fc07ed4 100644
--- a/include/misc/cxl.h
+++ b/include/misc/cxl.h
@@ -166,6 +166,16 @@ void cxl_psa_unmap(void __iomem *addr);
 /*  Get the process element for this context */
 int cxl_process_element(struct cxl_context *ctx);
 
+/*
+ * Limit the number of interrupts that a single context can allocate via
+ * cxl_start_work. If using the api with a real phb, this may be used to
+ * request that additional default contexts be created when allocating
+ * interrupts via pci_enable_msix_range. These will be set to the same running
+ * state as the default context, and if that is running it will reuse the
+ * parameters previously passed to cxl_start_context for the default context.
+ */
+int cxl_set_max_irqs_per_process(struct pci_dev *dev, int irqs);
+int cxl_get_max_irqs_per_process(struct pci_dev *dev);
 
 /*
  * These calls allow drivers to create their own file descriptors and make them
-- 
2.8.1

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[PATCH 07/14] cxl: Add support for using the kernel API with a real PHB

[Ian Munsie]

From: Ian Munsie 

This hooks up support for using the kernel API with a real PHB. After
the AFU initialisation has completed it calls into the PHB code to pass
it the AFU that will be used by other peer physical functions on the
adapter.

The cxl_pci_to_afu API is extended to work with peer PCI devices,
retrieving the peer AFU from the PHB. This API may also now return an
error if it is called on a PCI device that is not associated with either
a cxl vPHB or a peer PCI device to an AFU, and this error is propagated
down.

Signed-off-by: Ian Munsie 
---
 drivers/misc/cxl/api.c  |  5 +
 drivers/misc/cxl/pci.c  |  6 ++
 drivers/misc/cxl/vphb.c | 16 ++--
 3 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/cxl/api.c b/drivers/misc/cxl/api.c
index 7707055..6a030bf 100644
--- a/drivers/misc/cxl/api.c
+++ b/drivers/misc/cxl/api.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "cxl.h"
 
@@ -24,6 +25,8 @@ struct cxl_context *cxl_dev_context_init(struct pci_dev *dev)
int rc;
 
afu = cxl_pci_to_afu(dev);
+   if (IS_ERR(afu))
+   return ERR_CAST(afu);
 
ctx = cxl_context_alloc();
if (IS_ERR(ctx)) {
@@ -438,6 +441,8 @@ EXPORT_SYMBOL_GPL(cxl_perst_reloads_same_image);
 ssize_t cxl_read_adapter_vpd(struct pci_dev *dev, void *buf, size_t count)
 {
struct cxl_afu *afu = cxl_pci_to_afu(dev);
+   if (IS_ERR(afu))
+   return -ENODEV;
 
return cxl_ops->read_adapter_vpd(afu->adapter, buf, count);
 }
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 6c0597d..02242be 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1502,6 +1502,9 @@ static int cxl_probe(struct pci_dev *dev, const struct 
pci_device_id *id)
dev_err(>dev, "AFU %i failed to start: %i\n", 
slice, rc);
}
 
+   if (pnv_pci_on_cxl_phb(dev) && adapter->slices >= 1)
+   pnv_cxl_phb_set_peer_afu(dev, adapter->afu[0]);
+
return 0;
 }
 
@@ -1572,6 +1575,9 @@ static pci_ers_result_t cxl_pci_error_detected(struct 
pci_dev *pdev,
 */
for (i = 0; i < adapter->slices; i++) {
afu = adapter->afu[i];
+   /* Only participate in EEH if we are on a virtual PHB */
+   if (afu->phb == NULL)
+   return PCI_ERS_RESULT_NONE;
cxl_vphb_error_detected(afu, state);
}
return PCI_ERS_RESULT_DISCONNECT;
diff --git a/drivers/misc/cxl/vphb.c b/drivers/misc/cxl/vphb.c
index c5b9c201..08e8db7 100644
--- a/drivers/misc/cxl/vphb.c
+++ b/drivers/misc/cxl/vphb.c
@@ -9,6 +9,7 @@
 
 #include 
 #include 
+#include 
 #include "cxl.h"
 
 static int cxl_dma_set_mask(struct pci_dev *pdev, u64 dma_mask)
@@ -280,13 +281,18 @@ void cxl_pci_vphb_remove(struct cxl_afu *afu)
pcibios_free_controller(phb);
 }
 
+static bool _cxl_pci_is_vphb_device(struct pci_controller *phb)
+{
+   return (phb->ops == _pcie_pci_ops);
+}
+
 bool cxl_pci_is_vphb_device(struct pci_dev *dev)
 {
struct pci_controller *phb;
 
phb = pci_bus_to_host(dev->bus);
 
-   return (phb->ops == _pcie_pci_ops);
+   return _cxl_pci_is_vphb_device(phb);
 }
 
 struct cxl_afu *cxl_pci_to_afu(struct pci_dev *dev)
@@ -295,7 +301,13 @@ struct cxl_afu *cxl_pci_to_afu(struct pci_dev *dev)
 
phb = pci_bus_to_host(dev->bus);
 
-   return (struct cxl_afu *)phb->private_data;
+   if (_cxl_pci_is_vphb_device(phb))
+   return (struct cxl_afu *)phb->private_data;
+
+   if (pnv_pci_on_cxl_phb(dev))
+   return pnv_cxl_phb_to_afu(phb);
+
+   return ERR_PTR(-ENODEV);
 }
 EXPORT_SYMBOL_GPL(cxl_pci_to_afu);
 
-- 
2.8.1

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[PATCH 06/14] powerpc/powernv: Add support for the cxl kernel api on the real phb

[Ian Munsie]

From: Ian Munsie 

This adds support for the peer model of the cxl kernel api to the
PowerNV PHB, and exports APIs to enable the mode, check if a PCI device
is attached to a PHB in this mode, and to set and get the peer AFU for
this mode.

The cxl driver will enable this mode for supported cards by calling
pnv_cxl_enable_phb_kernel_api(). This will set a flag in the PHB to note
that this mode is enabled, and switch out it's controller_ops for the
cxl version.

The cxl version of the controller_ops struct implements it's own
versions of the enable_device_hook and release_device to handle
refcounting on the peer AFU and to allocate a default context for the
device.

Once enabled, the cxl kernel API may not be disabled on a PHB. Currently
there is no safe way to disable cxl mode short of a reboot, so until
that changes there is no reason to support the disable path.

Signed-off-by: Ian Munsie 
---
 arch/powerpc/include/asm/pnv-pci.h|   7 ++
 arch/powerpc/platforms/powernv/pci-cxl.c  | 112 ++
 arch/powerpc/platforms/powernv/pci-ioda.c |  22 +-
 arch/powerpc/platforms/powernv/pci.h  |  16 +
 4 files changed, 154 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/include/asm/pnv-pci.h 
b/arch/powerpc/include/asm/pnv-pci.h
index 791db1b..c47097f 100644
--- a/arch/powerpc/include/asm/pnv-pci.h
+++ b/arch/powerpc/include/asm/pnv-pci.h
@@ -38,6 +38,13 @@ int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs,
   struct pci_dev *dev, int num);
 void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs,
  struct pci_dev *dev);
+
+/* Support for the cxl kernel api on the real PHB (instead of vPHB) */
+int pnv_cxl_enable_phb_kernel_api(struct pci_controller *hose, bool enable);
+bool pnv_pci_on_cxl_phb(struct pci_dev *dev);
+struct cxl_afu *pnv_cxl_phb_to_afu(struct pci_controller *hose);
+void pnv_cxl_phb_set_peer_afu(struct pci_dev *dev, struct cxl_afu *afu);
+
 #endif
 
 #endif
diff --git a/arch/powerpc/platforms/powernv/pci-cxl.c 
b/arch/powerpc/platforms/powernv/pci-cxl.c
index ea8171f..2f386f5 100644
--- a/arch/powerpc/platforms/powernv/pci-cxl.c
+++ b/arch/powerpc/platforms/powernv/pci-cxl.c
@@ -7,8 +7,11 @@
  * 2 of the License, or (at your option) any later version.
  */
 
+#include 
+#include 
 #include 
 #include 
+#include 
 
 #include "pci.h"
 
@@ -161,3 +164,112 @@ int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned 
int hwirq,
return 0;
 }
 EXPORT_SYMBOL(pnv_cxl_ioda_msi_setup);
+
+/*
+ * Sets flags and switches the controller ops to enable the cxl kernel api.
+ * Original the cxl kernel API operated on a virtual PHB, but certain cards
+ * such as the Mellanox CX4 use a peer model instead and for these cards the
+ * cxl kernel api will operate on the real PHB.
+ */
+int pnv_cxl_enable_phb_kernel_api(struct pci_controller *hose, bool enable)
+{
+   struct pnv_phb *phb = hose->private_data;
+   struct module *cxl_module;
+
+   if (!enable) {
+   /*
+* Once cxl mode is enabled on the PHB, there is currently no
+* known safe method to disable it again, and trying risks a
+* checkstop. If we can find a way to safely disable cxl mode
+* in the future we can revisit this, but for now the only sane
+* thing to do is to refuse to disable cxl mode:
+*/
+   return -EPERM;
+   }
+
+   /*
+* Hold a reference to the cxl module since several PHB operations now
+* depend on it, and it would be insane to allow it to be removed so
+* long as we are in this mode (and since we can't safely disable this
+* mode once enabled...).
+*/
+   mutex_lock(_mutex);
+   cxl_module = find_module("cxl");
+   if (cxl_module)
+   __module_get(cxl_module);
+   mutex_unlock(_mutex);
+   if (!cxl_module)
+   return -ENODEV;
+
+   phb->flags |= PNV_PHB_FLAG_CXL;
+   hose->controller_ops = pnv_cxl_cx4_ioda_controller_ops;
+
+   return 0;
+}
+EXPORT_SYMBOL(pnv_cxl_enable_phb_kernel_api);
+
+bool pnv_pci_on_cxl_phb(struct pci_dev *dev)
+{
+   struct pci_controller *hose = pci_bus_to_host(dev->bus);
+   struct pnv_phb *phb = hose->private_data;
+
+   return !!(phb->flags & PNV_PHB_FLAG_CXL);
+}
+EXPORT_SYMBOL(pnv_pci_on_cxl_phb);
+
+struct cxl_afu *pnv_cxl_phb_to_afu(struct pci_controller *hose)
+{
+   struct pnv_phb *phb = hose->private_data;
+
+   return (struct cxl_afu *)phb->cxl_afu;
+}
+EXPORT_SYMBOL_GPL(pnv_cxl_phb_to_afu);
+
+void pnv_cxl_phb_set_peer_afu(struct pci_dev *dev, struct cxl_afu *afu)
+{
+   struct pci_controller *hose = pci_bus_to_host(dev->bus);
+   struct pnv_phb *phb = hose->private_data;
+
+   phb->cxl_afu = afu;
+}
+EXPORT_SYMBOL_GPL(pnv_cxl_phb_set_peer_afu);
+
+bool 

[PATCH 05/14] cxl: Allow a default context to be associated with an external pci_dev

[Ian Munsie]

From: Ian Munsie 

The cxl kernel API has a concept of a default context associated with
each PCI device under the virtual PHB. The Mellanox CX4 will also use
the cxl kernel API, but it does not use a virtual PHB - rather, the AFU
appears as a physical function as a peer to the networking functions.

In order to allow the kernel API to work with those networking
functions, we will need to associate a default context with them as
well. To this end, refactor the corresponding code to do this in vphb.c
and export it so that it can be called from the PHB code.

Signed-off-by: Ian Munsie 
---
 drivers/misc/cxl/base.c | 35 +++
 drivers/misc/cxl/cxl.h  |  6 ++
 drivers/misc/cxl/main.c |  2 ++
 drivers/misc/cxl/vphb.c | 37 +++--
 include/misc/cxl-base.h |  6 ++
 5 files changed, 72 insertions(+), 14 deletions(-)

diff --git a/drivers/misc/cxl/base.c b/drivers/misc/cxl/base.c
index c35a52f..af20b34 100644
--- a/drivers/misc/cxl/base.c
+++ b/drivers/misc/cxl/base.c
@@ -106,6 +106,41 @@ int cxl_update_properties(struct device_node *dn,
 }
 EXPORT_SYMBOL_GPL(cxl_update_properties);
 
+/*
+ * API calls into the driver that may be called from the PHB code and must be
+ * built in.
+ */
+bool cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu 
*afu)
+{
+   bool ret;
+   struct cxl_calls *calls;
+
+   calls = cxl_calls_get();
+   if (!calls)
+   return false;
+
+   ret = calls->cxl_pci_associate_default_context(dev, afu);
+
+   cxl_calls_put(calls);
+
+   return ret;
+}
+EXPORT_SYMBOL_GPL(cxl_pci_associate_default_context);
+
+void cxl_pci_disable_device(struct pci_dev *dev)
+{
+   struct cxl_calls *calls;
+
+   calls = cxl_calls_get();
+   if (!calls)
+   return;
+
+   calls->cxl_pci_disable_device(dev);
+
+   cxl_calls_put(calls);
+}
+EXPORT_SYMBOL_GPL(cxl_pci_disable_device);
+
 static int __init cxl_base_init(void)
 {
struct device_node *np = NULL;
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index 9e2621e..c94b54f 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -707,9 +707,15 @@ static inline u64 cxl_p2n_read(struct cxl_afu *afu, 
cxl_p2n_reg_t reg)
 ssize_t cxl_pci_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
loff_t off, size_t count);
 
+/* Internal functions wrapped in cxl_base to allow PHB to call them */
+bool _cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu 
*afu);
+void _cxl_pci_disable_device(struct pci_dev *dev);
 
 struct cxl_calls {
void (*cxl_slbia)(struct mm_struct *mm);
+   bool (*cxl_pci_associate_default_context)(struct pci_dev *dev, struct 
cxl_afu *afu);
+   void (*cxl_pci_disable_device)(struct pci_dev *dev);
+
struct module *owner;
 };
 int register_cxl_calls(struct cxl_calls *calls);
diff --git a/drivers/misc/cxl/main.c b/drivers/misc/cxl/main.c
index ae68c32..4e5474b 100644
--- a/drivers/misc/cxl/main.c
+++ b/drivers/misc/cxl/main.c
@@ -110,6 +110,8 @@ static inline void cxl_slbia_core(struct mm_struct *mm)
 
 static struct cxl_calls cxl_calls = {
.cxl_slbia = cxl_slbia_core,
+   .cxl_pci_associate_default_context = _cxl_pci_associate_default_context,
+   .cxl_pci_disable_device = _cxl_pci_disable_device,
.owner = THIS_MODULE,
 };
 
diff --git a/drivers/misc/cxl/vphb.c b/drivers/misc/cxl/vphb.c
index 012b6aa..c5b9c201 100644
--- a/drivers/misc/cxl/vphb.c
+++ b/drivers/misc/cxl/vphb.c
@@ -40,11 +40,28 @@ static void cxl_teardown_msi_irqs(struct pci_dev *pdev)
 */
 }
 
+bool _cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu 
*afu)
+{
+   struct cxl_context *ctx;
+
+   /*
+* Allocate a context to do cxl things too. This is used for interrupts
+* in the peer model using a real phb, and if we eventually do DMA ops
+* in the virtual phb, we'll need a default context to attach them to.
+*/
+   ctx = cxl_dev_context_init(dev);
+   if (!ctx)
+   return false;
+   dev->dev.archdata.cxl_ctx = ctx;
+
+   return (cxl_ops->afu_check_and_enable(afu) == 0);
+}
+/* exported via cxl_base */
+
 static bool cxl_pci_enable_device_hook(struct pci_dev *dev)
 {
struct pci_controller *phb;
struct cxl_afu *afu;
-   struct cxl_context *ctx;
 
phb = pci_bus_to_host(dev->bus);
afu = (struct cxl_afu *)phb->private_data;
@@ -57,19 +74,10 @@ static bool cxl_pci_enable_device_hook(struct pci_dev *dev)
set_dma_ops(>dev, _direct_ops);
set_dma_offset(>dev, PAGE_OFFSET);
 
-   /*
-* Allocate a context to do cxl things too.  If we eventually do real
-* DMA ops, we'll need a default context to attach them to
-*/
-   ctx = cxl_dev_context_init(dev);
-   if (!ctx)
-   return false;
-   

[PATCH 03/14] cxl: Enable bus mastering for devices using CAPP DMA mode

[Ian Munsie]

From: Ian Munsie 

Devices that use CAPP DMA mode (such as the Mellanox CX4) require bus
master to be enabled in order for the CAPI traffic to flow. This should
be harmless to enable for other cxl devices, so unconditionally enable
it in the adapter init flow.

Signed-off-by: Ian Munsie 
---
 drivers/misc/cxl/pci.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 9530280..6c0597d 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1264,6 +1264,9 @@ static int cxl_configure_adapter(struct cxl *adapter, 
struct pci_dev *dev)
if ((rc = adapter->native->sl_ops->adapter_regs_init(adapter, dev)))
goto err;
 
+   /* Required for devices using CAPP DMA mode, harmless for others */
+   pci_set_master(dev);
+
if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode)))
goto err;
 
-- 
2.8.1

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[PATCH 01/14] powerpc/powernv: Split cxl code out into a separate file

[Ian Munsie]

From: Ian Munsie 

The support for using the Mellanox CX4 in cxl mode will require
additions to the PHB code. In preparation for this, move the existing
cxl code out of pci-ioda.c into a separate pci-cxl.c file to keep things
more organised.

Signed-off-by: Ian Munsie 
---
 arch/powerpc/platforms/powernv/Makefile   |   1 +
 arch/powerpc/platforms/powernv/pci-cxl.c  | 163 ++
 arch/powerpc/platforms/powernv/pci-ioda.c | 159 +
 arch/powerpc/platforms/powernv/pci.h  |   6 ++
 4 files changed, 173 insertions(+), 156 deletions(-)
 create mode 100644 arch/powerpc/platforms/powernv/pci-cxl.c

diff --git a/arch/powerpc/platforms/powernv/Makefile 
b/arch/powerpc/platforms/powernv/Makefile
index cd9711e..b5d98cb 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -6,6 +6,7 @@ obj-y   += opal-kmsg.o
 
 obj-$(CONFIG_SMP)  += smp.o subcore.o subcore-asm.o
 obj-$(CONFIG_PCI)  += pci.o pci-ioda.o npu-dma.o
+obj-$(CONFIG_CXL_BASE) += pci-cxl.o
 obj-$(CONFIG_EEH)  += eeh-powernv.o
 obj-$(CONFIG_PPC_SCOM) += opal-xscom.o
 obj-$(CONFIG_MEMORY_FAILURE)   += opal-memory-errors.o
diff --git a/arch/powerpc/platforms/powernv/pci-cxl.c 
b/arch/powerpc/platforms/powernv/pci-cxl.c
new file mode 100644
index 000..ea8171f
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/pci-cxl.c
@@ -0,0 +1,163 @@
+/*
+ * Copyright 2015 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include 
+#include 
+
+#include "pci.h"
+
+struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev)
+{
+   struct pci_controller *hose = pci_bus_to_host(dev->bus);
+
+   return of_node_get(hose->dn);
+}
+EXPORT_SYMBOL(pnv_pci_get_phb_node);
+
+int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode)
+{
+   struct pci_controller *hose = pci_bus_to_host(dev->bus);
+   struct pnv_phb *phb = hose->private_data;
+   struct pnv_ioda_pe *pe;
+   int rc;
+
+   pe = pnv_ioda_get_pe(dev);
+   if (!pe)
+   return -ENODEV;
+
+   pe_info(pe, "Switching PHB to CXL\n");
+
+   rc = opal_pci_set_phb_cxl_mode(phb->opal_id, mode, pe->pe_number);
+   if (rc == OPAL_UNSUPPORTED)
+   dev_err(>dev, "Required cxl mode not supported by firmware 
- update skiboot\n");
+   else if (rc)
+   dev_err(>dev, "opal_pci_set_phb_cxl_mode failed: %i\n", 
rc);
+
+   return rc;
+}
+EXPORT_SYMBOL(pnv_phb_to_cxl_mode);
+
+/* Find PHB for cxl dev and allocate MSI hwirqs?
+ * Returns the absolute hardware IRQ number
+ */
+int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num)
+{
+   struct pci_controller *hose = pci_bus_to_host(dev->bus);
+   struct pnv_phb *phb = hose->private_data;
+   int hwirq = msi_bitmap_alloc_hwirqs(>msi_bmp, num);
+
+   if (hwirq < 0) {
+   dev_warn(>dev, "Failed to find a free MSI\n");
+   return -ENOSPC;
+   }
+
+   return phb->msi_base + hwirq;
+}
+EXPORT_SYMBOL(pnv_cxl_alloc_hwirqs);
+
+void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num)
+{
+   struct pci_controller *hose = pci_bus_to_host(dev->bus);
+   struct pnv_phb *phb = hose->private_data;
+
+   msi_bitmap_free_hwirqs(>msi_bmp, hwirq - phb->msi_base, num);
+}
+EXPORT_SYMBOL(pnv_cxl_release_hwirqs);
+
+void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs,
+ struct pci_dev *dev)
+{
+   struct pci_controller *hose = pci_bus_to_host(dev->bus);
+   struct pnv_phb *phb = hose->private_data;
+   int i, hwirq;
+
+   for (i = 1; i < CXL_IRQ_RANGES; i++) {
+   if (!irqs->range[i])
+   continue;
+   pr_devel("cxl release irq range 0x%x: offset: 0x%lx  limit: 
%ld\n",
+i, irqs->offset[i],
+irqs->range[i]);
+   hwirq = irqs->offset[i] - phb->msi_base;
+   msi_bitmap_free_hwirqs(>msi_bmp, hwirq,
+  irqs->range[i]);
+   }
+}
+EXPORT_SYMBOL(pnv_cxl_release_hwirq_ranges);
+
+int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs,
+  struct pci_dev *dev, int num)
+{
+   struct pci_controller *hose = pci_bus_to_host(dev->bus);
+   struct pnv_phb *phb = hose->private_data;
+   int i, hwirq, try;
+
+   memset(irqs, 0, sizeof(struct cxl_irq_ranges));
+
+   /* 0 is reserved for the multiplexed PSL DSI interrupt */
+   for (i = 1; i < CXL_IRQ_RANGES && num; i++) {
+   try = num;
+   while (try) {
+   hwirq = msi_bitmap_alloc_hwirqs(>msi_bmp, try);
+   

powerpc / cxl: Add support for the Mellanox CX4 in cxl mode

[Ian Munsie]

This series adds support for the Mellanox CX4 network adapter operating in cxl
mode to the cxl driver and the PowerNV PHB code. The Mellanox developers will
submit a separate patch series that makes use of this in the mlx5 driver.

The CX4 card can operate in either pci mode, or cxl mode. In cxl mode, memory
accesses from the card go through the XSL (Translation Service Layer,
essentially a stripped down version of the Power Service Layer), allowing it to
transparently access unpinned memory with the cxl driver handling faulting in
pages as necessary, etc. Most of the support for the XSL is already upstream,
though this series does include a bug fix to enable bus mastering for this
(patch 3).

Patch 2 in this series provides an API which the mlx5 driver can query to check
if it is in a cxl capable slot. The card will come up in pci mode, and the mlx5
driver can choose to switch it to cxl mode, wherein it will reappear with an
additional physical function representing the XSL that the cxl driver will bind
to. Patches 12-14 add support for switching the card's mode, including using
the PCI hotplug support to re-enumerate the device tree and re-probind the
card.

Unlike previous users of the cxl kernel API where we used a virtual PHB and
exposed PCI devices under it, the Mellanox CX4 uses a peer model where cxl
binds to one of the physical functions of the card and the mlx5_core driver
binds to the other networking physical functions. Patches 6 and 7 add support
for using the cxl kernel API with the real PHB to enable this peer model.
Patches 4 and 5 are prepatory patches exposing some APIs that the PHB will need
to call.

While in cxl mode, interrupts from the CX4 are a little unusual - they are
neither pci interrupts, nor cxl interrutps, but rather a hybrid of the two. The
interrupts are passed from the networking hardware to the XSL using a custom
format in the MSIX table, and from there are treated as cxl interrupts. These
are configured mostly transparently using the standard msix APIs - the PHB
handles allocating and configuring the cxl interrupts, associating them with
the default context, and the mlx5 driver handles filling out the MSIX table
with their custom format (not included in this series). See patch 10.

Additionally, the CX4 has a hard limitation of the number of interrupts that
can be associated with a given context, so to overcome this patches 8 and 9
expose an API to allow the mlx5 driver to inform us of the limit, and the
interrupt allocation code in patch 10 will allocate additional contexts to
associate these with.

Patch 1 is a prepatory cleanup patch to reorganise cxl code in arch/powerpc
into a separate file.

Patch 11 is a workaround for a hardware limitation in the CX4 where a context
with PE=0 cannot be used.

Note that patch 2 depends on "cxl: Ignore CAPI adapters misplaced in switched
slot" by Philippe Bergheaud:
http://patchwork.ozlabs.org/patch/642920/

Additionally, the following stand-alone patches related to the CX4 are also
pending on the mainling list, but are *not* dependencies of this series:
- cxl: Fix bug where AFU disable operation had no effect
- cxl: Workaround XSL bug that does not clear the RA bit after a reset
- cxl: Fix NULL pointer dereference on kernel contexts with no AFU interrupts

The entire series is bisectable.

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Re: [PATCH] cxl: remove dead Kconfig options

[Ian Munsie]

Acked-by: Ian Munsie 

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Re: [PATCH v5] cpuidle: Fix last_residency division

[Rafael J. Wysocki]

On Mon, Jul 4, 2016 at 8:10 AM, Balbir Singh  wrote:
>
>
> On 02/07/16 00:24, Shreyas B. Prabhu wrote:
>> Snooze is a poll idle state in powernv and pseries platforms. Snooze
>> has a timeout so that if a cpu stays in snooze for more than target
>> residency of the next available idle state, then it would exit thereby
>> giving chance to the cpuidle governor to re-evaluate and
>> promote the cpu to a deeper idle state. Therefore whenever snooze exits
>> due to this timeout, its last_residency will be target_residency of next
>> deeper state.
>>
>> commit e93e59ce5b85 ("cpuidle: Replace ktime_get() with local_clock()")
>> changed the math around last_residency calculation. Specifically, while
>> converting last_residency value from nanoseconds to microseconds it does
>> right shift by 10. Due to this, in snooze timeout exit scenarios
>> last_residency calculated is roughly 2.3% less than target_residency of
>> next available state. This pattern is picked up get_typical_interval()
>> in the menu governor and therefore expected_interval in menu_select() is
>> frequently less than the target_residency of any state but snooze.
>>
>> Due to this we are entering snooze at a higher rate, thereby affecting
>> the single thread performance.
>>
>> Fix this by using precise division via ktime_us_delta.
>>
>> Reported-by: Anton Blanchard 
>> Bisected-by: Shilpasri G Bhat 
>> Signed-off-by: Shreyas B. Prabhu 
>> ---
>
> This looks so much cleaner :)
>
> Acked-by: Balbir Singh 

Patch applied, thanks!
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Re: [PATCH 6/6] powerpc/sparse: Make ppc_md.{halt, restart} __noreturn

[kbuild test robot]

Hi,

[auto build test WARNING on powerpc/next]
[also build test WARNING on v4.7-rc6 next-20160701]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Daniel-Axtens/powerpc-kvm-Clarify-__user-annotations/20160704-152727
base:   https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-allyesconfig (attached as .config)
compiler: powerpc-linux-gnu-gcc (Debian 5.3.1-8) 5.3.1 20160205
reproduce:
wget 
https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
 -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=powerpc 

All warnings (new ones prefixed by >>):

   arch/powerpc/platforms/powermac/setup.c: In function 'pmac_power_off':
>> arch/powerpc/platforms/powermac/setup.c:449:1: warning: 'noreturn' function 
>> does return
}
^
   arch/powerpc/platforms/powermac/setup.c: In function 'pmac_restart':
   arch/powerpc/platforms/powermac/setup.c:433:1: warning: 'noreturn' function 
does return
}
^

vim +/noreturn +449 arch/powerpc/platforms/powermac/setup.c

14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 433  }
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 434  
4e1324ee arch/powerpc/platforms/powermac/setup.c  Daniel Axtens  2016-07-04 
 435  static void __noreturn pmac_power_off(void)
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 436  {
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 437switch (sys_ctrler) {
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 438case SYS_CTRLER_CUDA:
35499c01 arch/powerpc/platforms/powermac/setup.c  Paul Mackerras 2005-10-22 
 439cuda_shutdown();
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 440break;
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 441case SYS_CTRLER_PMU:
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 442pmu_shutdown();
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 443break;
35499c01 arch/powerpc/platforms/powermac/setup.c  Paul Mackerras 2005-10-22 
 444case SYS_CTRLER_SMU:
35499c01 arch/powerpc/platforms/powermac/setup.c  Paul Mackerras 2005-10-22 
 445smu_shutdown();
35499c01 arch/powerpc/platforms/powermac/setup.c  Paul Mackerras 2005-10-22 
 446break;
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 447default: ;
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 448}
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
@449  }
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 450  
4e1324ee arch/powerpc/platforms/powermac/setup.c  Daniel Axtens  2016-07-04 
 451  static void __noreturn
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 452  pmac_halt(void)
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 453  {
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 454pmac_power_off();
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 455  }
14cf11af arch/powerpc/platforms/powermac/pmac_setup.c Paul Mackerras 2005-09-26 
 456  
35499c01 arch/powerpc/platforms/powermac/setup.c  Paul Mackerras 2005-10-22 
 457  /* 

:: The code at line 449 was first introduced by commit
:: 14cf11af6cf608eb8c23e989ddb17a715ddce109 powerpc: Merge enough to start 
building in arch/powerpc.

:: TO: Paul Mackerras <pau...@samba.org>
:: CC: Paul Mackerras <pau...@samba.org>

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data
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Re: [PATCH][v2] driver/memory: Update dependency of IFC for Layerscape

[Benjamin Herrenschmidt]

On Mon, 2016-07-04 at 11:29 +0200, Boris Brezillon wrote:
> +PPC maintainers.

+ Scott for FSL stuff

> Hi Raghav,
>
> Since you're touching powerpc drivers, the least you could do is add
> ppc maintainers in Cc, so that they can ack/review your patch...
> 
> On Fri, 1 Jul 2016 21:32:30 +0530
> Raghav Dogra  wrote:
> 
> > This patch enables IFC NAND support on ARM layerscape platform.
> > It fixes the dependency to enable NAND. The include files are being
> > modified
> > to ensure complilation for both PowerPC and ARM architectures.
> 
> Still think this could be separated in 2 commits:
> - the first one getting rid of the asm/prom.h inclusion
> - the second one changing the Kconfig dependency
> 
> > 
> > Signed-off-by: Raghav Dogra 
> > ---
> > Applicable to git://git.infradead.org/l2-mtd.git
> > 
> > Changes for v2: updated commit description
> > 
> >  drivers/memory/Kconfig   | 2 +-
> >  drivers/memory/fsl_ifc.c | 4 +++-
> >  drivers/mtd/nand/Kconfig | 2 +-
> >  3 files changed, 5 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
> > index 81ddb17..5645705 100644
> > --- a/drivers/memory/Kconfig
> > +++ b/drivers/memory/Kconfig
> > @@ -104,7 +104,7 @@ config FSL_CORENET_CF
> >  
> >  config FSL_IFC
> >     bool
> > -   depends on FSL_SOC
> > +   depends on FSL_SOC || ARCH_LAYERSCAPE
> >  
> >  config JZ4780_NEMC
> >     bool "Ingenic JZ4780 SoC NEMC driver"
> > diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c
> > index 904b4af..1b182b1 100644
> > --- a/drivers/memory/fsl_ifc.c
> > +++ b/drivers/memory/fsl_ifc.c
> > @@ -31,7 +31,9 @@
> >  #include 
> >  #include 
> >  #include 
> > -#include 
> > +#include 
> > +#include 
> > +#include 
> >  
> >  struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev;
> >  EXPORT_SYMBOL(fsl_ifc_ctrl_dev);
> > diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> > index f05e0e9..eace3ef 100644
> > --- a/drivers/mtd/nand/Kconfig
> > +++ b/drivers/mtd/nand/Kconfig
> > @@ -438,7 +438,7 @@ config MTD_NAND_FSL_ELBC
> >  
> >  config MTD_NAND_FSL_IFC
> >     tristate "NAND support for Freescale IFC controller"
> > -   depends on MTD_NAND && FSL_SOC
> > +   depends on MTD_NAND && (FSL_SOC || ARCH_LAYERSCAPE)
> >     select FSL_IFC
> >     select MEMORY
> >     help
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Re: [PATCH] powerpc/opal: Wake up kopald polling thread before waiting for events

[Michael Neuling]

On Mon, 2016-07-04 at 14:51 +1000, Benjamin Herrenschmidt wrote:
> On some environments (prototype machines, some simulators, etc...)
> there is no functional interrupt source to signal completion, so
> we rely on the fairly slow OPAL heartbeat.
> 
> In a number of cases, the calls complete very quickly or even
> immediately. We've observed that it helps a lot to wakeup the OPAL
> heartbeat thread before waiting for event in those cases, it will
> call OPAL immediately to collect completions for anything that
> finished fast enough.
> 
> Signed-off-by: Benjamin Herrenschmidt 

Without this using drivers/mtd/devices/powernv_flash.c on mambo is
impossible.  Feels like it's at least 1000x faster.

Acked-By: Michael Neuling 

> ---
>  arch/powerpc/include/asm/opal.h |  2 ++
>  arch/powerpc/platforms/powernv/opal-async.c |  5 +
>  arch/powerpc/platforms/powernv/opal.c   | 12 ++--
>  3 files changed, 17 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/opal.h
> b/arch/powerpc/include/asm/opal.h
> index 6135816..0c76bc0 100644
> --- a/arch/powerpc/include/asm/opal.h
> +++ b/arch/powerpc/include/asm/opal.h
> @@ -277,6 +277,8 @@ extern int opal_error_code(int rc);
>  
>  ssize_t opal_msglog_copy(char *to, loff_t pos, size_t count);
>  
> +void opal_wake_poller(void);
> +
>  #endif /* __ASSEMBLY__ */
>  
>  #endif /* _ASM_POWERPC_OPAL_H */
> diff --git a/arch/powerpc/platforms/powernv/opal-async.c
> b/arch/powerpc/platforms/powernv/opal-async.c
> index bdc8c0c..83bebee 100644
> --- a/arch/powerpc/platforms/powernv/opal-async.c
> +++ b/arch/powerpc/platforms/powernv/opal-async.c
> @@ -117,6 +117,11 @@ int opal_async_wait_response(uint64_t token, struct
> opal_msg *msg)
>   return -EINVAL;
>   }
>  
> + /* Wakeup the poller before we wait for events to speed things
> +  * up on platforms or simulators where the interrupts aren't
> +  * functional.
> +  */
> + opal_wake_poller();
>   wait_event(opal_async_wait, test_bit(token,
> opal_async_complete_map));
>   memcpy(msg, _async_responses[token], sizeof(*msg));
>  
> diff --git a/arch/powerpc/platforms/powernv/opal.c
> b/arch/powerpc/platforms/powernv/opal.c
> index 802f3b7..7f13302 100644
> --- a/arch/powerpc/platforms/powernv/opal.c
> +++ b/arch/powerpc/platforms/powernv/opal.c
> @@ -55,6 +55,7 @@ struct device_node *opal_node;
>  static DEFINE_SPINLOCK(opal_write_lock);
>  static struct atomic_notifier_head
> opal_msg_notifier_head[OPAL_MSG_TYPE_MAX];
>  static uint32_t opal_heartbeat;
> +static struct task_struct *kopald_tsk;
>  
>  void opal_configure_cores(void)
>  {
> @@ -650,6 +651,7 @@ static void opal_i2c_create_devs(void)
>  
>  static int kopald(void *unused)
>  {
> + unsigned long timeout = msecs_to_jiffies(opal_heartbeat) + 1;
>   __be64 events;
>  
>   set_freezable();
> @@ -657,12 +659,18 @@ static int kopald(void *unused)
>   try_to_freeze();
>   opal_poll_events();
>   opal_handle_events(be64_to_cpu(events));
> - msleep_interruptible(opal_heartbeat);
> + schedule_timeout_interruptible(timeout);
>   } while (!kthread_should_stop());
>  
>   return 0;
>  }
>  
> +void opal_wake_poller(void)
> +{
> + if (kopald_tsk)
> + wake_up_process(kopald_tsk);
> +}
> +
>  static void opal_init_heartbeat(void)
>  {
>   /* Old firwmware, we assume the HVC heartbeat is sufficient */
> @@ -671,7 +679,7 @@ static void opal_init_heartbeat(void)
>   opal_heartbeat = 0;
>  
>   if (opal_heartbeat)
> - kthread_run(kopald, NULL, "kopald");
> + kopald_tsk = kthread_run(kopald, NULL, "kopald");
>  }
>  
>  static int __init opal_init(void)
> 
> 
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Re: [PATCH][v2] driver/memory: Update dependency of IFC for Layerscape

[Boris Brezillon]

+PPC maintainers.

Hi Raghav,

Since you're touching powerpc drivers, the least you could do is add
ppc maintainers in Cc, so that they can ack/review your patch...

On Fri, 1 Jul 2016 21:32:30 +0530
Raghav Dogra  wrote:

> This patch enables IFC NAND support on ARM layerscape platform.
> It fixes the dependency to enable NAND. The include files are being modified
> to ensure complilation for both PowerPC and ARM architectures.

Still think this could be separated in 2 commits:
- the first one getting rid of the asm/prom.h inclusion
- the second one changing the Kconfig dependency

> 
> Signed-off-by: Raghav Dogra 
> ---
> Applicable to git://git.infradead.org/l2-mtd.git
> 
> Changes for v2: updated commit description
> 
>  drivers/memory/Kconfig   | 2 +-
>  drivers/memory/fsl_ifc.c | 4 +++-
>  drivers/mtd/nand/Kconfig | 2 +-
>  3 files changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
> index 81ddb17..5645705 100644
> --- a/drivers/memory/Kconfig
> +++ b/drivers/memory/Kconfig
> @@ -104,7 +104,7 @@ config FSL_CORENET_CF
>  
>  config FSL_IFC
>   bool
> - depends on FSL_SOC
> + depends on FSL_SOC || ARCH_LAYERSCAPE
>  
>  config JZ4780_NEMC
>   bool "Ingenic JZ4780 SoC NEMC driver"
> diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c
> index 904b4af..1b182b1 100644
> --- a/drivers/memory/fsl_ifc.c
> +++ b/drivers/memory/fsl_ifc.c
> @@ -31,7 +31,9 @@
>  #include 
>  #include 
>  #include 
> -#include 
> +#include 
> +#include 
> +#include 
>  
>  struct fsl_ifc_ctrl *fsl_ifc_ctrl_dev;
>  EXPORT_SYMBOL(fsl_ifc_ctrl_dev);
> diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
> index f05e0e9..eace3ef 100644
> --- a/drivers/mtd/nand/Kconfig
> +++ b/drivers/mtd/nand/Kconfig
> @@ -438,7 +438,7 @@ config MTD_NAND_FSL_ELBC
>  
>  config MTD_NAND_FSL_IFC
>   tristate "NAND support for Freescale IFC controller"
> - depends on MTD_NAND && FSL_SOC
> + depends on MTD_NAND && (FSL_SOC || ARCH_LAYERSCAPE)
>   select FSL_IFC
>   select MEMORY
>   help

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Re: [PATCH] perf/core: Fix the mask in perf_output_sample_regs

[Yury Norov]

On Sun, Jul 03, 2016 at 11:31:58PM +0530, Madhavan Srinivasan wrote:
> When decoding the perf_regs mask in perf_output_sample_regs(),
> we loop through the mask using find_first_bit and find_next_bit functions.
> While the exisitng code works fine in most of the case,
> the logic is broken for 32bit kernel (Big Endian).
> When reading u64 mask using (u32 *)()[0], find_*_bit() assumes it gets
> lower 32bits of u64 but instead gets upper 32bits which is wrong.
> Proposed fix is to swap the words of the u64 to handle this case.
> This is _not_ endianness swap.


In fact, it's broken for 32-bit LE as well if mask is zero and next
word on stack is not zero. The rest is OK.

Reviewed-by: Yury Norov 

> 
> Suggested-by: Yury Norov 
> Cc: Yury Norov 
> Cc: Peter Zijlstra 
> Cc: Ingo Molnar 
> Cc: Arnaldo Carvalho de Melo 
> Cc: Alexander Shishkin 
> Cc: Jiri Olsa 
> Cc: Michael Ellerman 
> Signed-off-by: Madhavan Srinivasan 
> ---
>  include/linux/bitmap.h |  2 ++
>  kernel/events/core.c   |  4 +++-
>  lib/bitmap.c   | 19 +++
>  3 files changed, 24 insertions(+), 1 deletion(-)
> 
> diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
> index e9b0b9ab07e5..d95b422db183 100644
> --- a/include/linux/bitmap.h
> +++ b/include/linux/bitmap.h
> @@ -188,6 +188,8 @@ extern int bitmap_print_to_pagebuf(bool list, char *buf,
>  #define small_const_nbits(nbits) \
>   (__builtin_constant_p(nbits) && (nbits) <= BITS_PER_LONG)
>  
> +extern void bitmap_from_u64(unsigned long *dst, u64 mask);
> +
>  static inline void bitmap_zero(unsigned long *dst, unsigned int nbits)
>  {
>   if (small_const_nbits(nbits))
> diff --git a/kernel/events/core.c b/kernel/events/core.c
> index 9c51ec3f0f44..613fec95ea4c 100644
> --- a/kernel/events/core.c
> +++ b/kernel/events/core.c
> @@ -5205,8 +5205,10 @@ perf_output_sample_regs(struct perf_output_handle 
> *handle,
>   struct pt_regs *regs, u64 mask)
>  {
>   int bit;
> + DECLARE_BITMAP(_mask, 64);
>  
> - for_each_set_bit(bit, (const unsigned long *) ,
> + bitmap_from_u64(_mask, mask);
> + for_each_set_bit(bit, _mask,
>sizeof(mask) * BITS_PER_BYTE) {
>   u64 val;
>  
> diff --git a/lib/bitmap.c b/lib/bitmap.c
> index c66da508cbf7..522f1b4c6078 100644
> --- a/lib/bitmap.c
> +++ b/lib/bitmap.c
> @@ -1170,3 +1170,22 @@ void bitmap_copy_le(unsigned long *dst, const unsigned 
> long *src, unsigned int n
>  }
>  EXPORT_SYMBOL(bitmap_copy_le);
>  #endif
> +
> +/*
> + * bitmap_from_u64 - Check and swap words within u64.
> + *  @mask: source bitmap
> + *  @dst:  destination bitmap
> + *
> + * In 32bit Big Endian kernel, when using (u32 *)()[*]
> + * to read u64 mask, we will get wrong word.
> + * That is "(u32 *)()[0]" gets upper 32 bits,
> + * but expected could be lower 32bits of u64.
> + */
> +void bitmap_from_u64(unsigned long *dst, u64 mask)
> +{
> + dst[0] = mask & ULONG_MAX;
> +
> + if (sizeof(mask) > sizeof(unsigned long))
> + dst[1] = mask >> 32;
> +}
> +EXPORT_SYMBOL(bitmap_from_u64);
> -- 
> 1.9.1
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Re: powerpc/opal: Wake up kopald polling thread before waiting for events

[Benjamin Herrenschmidt]

On Mon, 2016-07-04 at 16:11 +1000, Michael Ellerman wrote:
> On Mon, 2016-04-07 at 04:51:44 UTC, Benjamin Herrenschmidt wrote:
> > On some environments (prototype machines, some simulators, etc...)
> > there is no functional interrupt source to signal completion, so
> > we rely on the fairly slow OPAL heartbeat.
> > 
> > In a number of cases, the calls complete very quickly or even
> > immediately. We've observed that it helps a lot to wakeup the OPAL
> > heartbeat thread before waiting for event in those cases, it will
> > call OPAL immediately to collect completions for anything that
> > finished fast enough.
> 
> Any performance/jitter impact on normal systems?

Not that I can think of.

Cheers,
Ben.

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Re: [PATCH 5/6] powerpc/sparse: Pass endianness to sparse

[Arnd Bergmann]

On Monday, July 4, 2016 5:09:41 PM CEST Daniel Axtens wrote:
> ---
>  arch/powerpc/Makefile | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
> index 709a22a3e824..8617c71c3bdb 100644
> --- a/arch/powerpc/Makefile
> +++ b/arch/powerpc/Makefile
> @@ -181,6 +181,11 @@ KBUILD_CFLAGS  += -pipe -Iarch/$(ARCH) $(CFLAGS-y)
>  CPP= $(CC) -E $(KBUILD_CFLAGS)
>  
>  CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__ 
> -D__powerpc$(CONFIG_WORD_SIZE)__
> +ifdef CONFIG_CPU_BIG_ENDIAN
> +CHECKFLAGS += -D__BIG_ENDIAN__
> +else
> +CHECKFLAGS += -D__LITTLE_ENDIAN__
> +endif
>  
>  KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o

Looks good, thanks!

I've taken a short look at the other patches in the series too and found
a few minor glitches, the rest looks good to me.

Arnd

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Re: [PATCH 4/6] powerpc/kernel: Clean up some sparse warnings

[Arnd Bergmann]

On Monday, July 4, 2016 5:09:40 PM CEST Daniel Axtens wrote:
> diff --git a/arch/powerpc/kernel/io.c b/arch/powerpc/kernel/io.c
> index 2a2b4aeab80f..3f70b7dccee8 100644
> --- a/arch/powerpc/kernel/io.c
> +++ b/arch/powerpc/kernel/io.c
> @@ -37,7 +37,7 @@ void _insb(const volatile u8 __iomem *port, void *buf, long 
> count)
>   return;
>   asm volatile("sync");
>   do {
> - tmp = *port;
> + tmp = *(u8 __force *)port;
>   eieio();
>   *tbuf++ = tmp;
>   } while (--count != 0);

Here the "volatile" is actually meaningful, you should keep it and
just add "__force" in addition.

> @@ -47,13 +47,13 @@ EXPORT_SYMBOL(_insb);
>  
>  void _outsb(volatile u8 __iomem *port, const void *buf, long count)
>  {
> - const u8 *tbuf = buf;
> + const u8 __force *tbuf = buf;
>  
>   if (unlikely(count <= 0))
>   return;
>   asm volatile("sync");
>   do {
> - *port = *tbuf++;
> + *(volatile u8 __force *)port = *tbuf++;
>   } while (--count != 0);
>   asm volatile("sync");
>  }

like you correctly do here.

> @@ -68,7 +68,7 @@ void _insw_ns(const volatile u16 __iomem *port, void *buf, 
> long count)
>   return;
>   asm volatile("sync");
>   do {
> - tmp = *port;
> + tmp = *(u16 __force *)port;
>   eieio();
>   *tbuf++ = tmp;
>   } while (--count != 0);

+volatile

> @@ -99,7 +99,7 @@ void _insl_ns(const volatile u32 __iomem *port, void *buf, 
> long count)
>   return;
>   asm volatile("sync");
>   do {
> - tmp = *port;
> + tmp = *(u32 __force *)port;
>   eieio();
>   *tbuf++ = tmp;
>   } while (--count != 0);

+volatile


Arnd
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Re: [PATCH 3/6] powerpc/xics: Fully qualify cast to silence sparse

[Arnd Bergmann]

On Monday, July 4, 2016 5:09:39 PM CEST Daniel Axtens wrote:
> Make the cast fully line up with what out_rm8 expects.
> 
> Signed-off-by: Daniel Axtens 
> ---
>  arch/powerpc/sysdev/xics/icp-native.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/powerpc/sysdev/xics/icp-native.c 
> b/arch/powerpc/sysdev/xics/icp-native.c
> index afdf62f2a695..e9cffb06cc01 100644
> --- a/arch/powerpc/sysdev/xics/icp-native.c
> +++ b/arch/powerpc/sysdev/xics/icp-native.c
> @@ -176,7 +176,7 @@ void icp_native_cause_ipi_rm(int cpu)
>  * causing the IPI.
>  */
> xics_phys = paca[cpu].kvm_hstate.xics_phys;
> -   out_rm8((u8 *)(xics_phys + XICS_MFRR), IPI_PRIORITY);
> +   out_rm8((volatile u8 __iomem *)(xics_phys + XICS_MFRR), IPI_PRIORITY);
>  }

We don't normally mark pointers as 'volatile' when passing them
to the MMIO accessors. The reason that they take a volatile argument
is mainly to avoid a warning for drivers that for historic reasons
use volatile pointers intead of __iomem pointers.

Arnd
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Re: [PATCH 5/6] powerpc/sparse: Pass endianness to sparse

[Andrew Donnellan]

On 04/07/16 17:09, Daniel Axtens wrote:

Explicitly give sparse an endianness in the Makefile, so that it
doesn't get confused.

Normally we have #ifdef one and #else the other, so it doesn't usually
matter, but we have been bitten by it before, and indeed this patch
fixes a number of sparse errors.

Suggested-by: Arnd Bergmann 
Signed-off-by: Daniel Axtens 


Reviewed-by: Andrew Donnellan 

--
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andrew.donnel...@au1.ibm.com  IBM Australia Limited

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Re: [PATCH 3/6] powerpc/xics: Fully qualify cast to silence sparse

[Andrew Donnellan]

On 04/07/16 17:09, Daniel Axtens wrote:

Make the cast fully line up with what out_rm8 expects.

Signed-off-by: Daniel Axtens 


Reviewed-by: Andrew Donnellan 

--
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andrew.donnel...@au1.ibm.com  IBM Australia Limited

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Re: [PATCH 1/6] powerpc/kvm: Clarify __user annotations

[Andrew Donnellan]

On 04/07/16 17:09, Daniel Axtens wrote:

kvmppc_h_put_tce_indirect labels a u64 pointer as __user. It also
labelled the u64 where get_user puts the result as __user. This isn't
a pointer and so doesn't need to be labelled __user.

Split the u64 value definition onto a new line to make it clear that
it doesn't get the annotation.

Signed-off-by: Daniel Axtens 


Reviewed-by: Andrew Donnellan 

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[PATCH] cxl: remove dead Kconfig options

[Andrew Donnellan]

Remove the CXL_KERNEL_API and CXL_EEH Kconfig options, as they were only
needed to coordinate the merging of the cxlflash driver. Also remove the
stub implementation of cxl_perst_reloads_same_image() in cxlflash which is
only used if CXL_EEH isn't defined (i.e. never).

Suggested-by: Ian Munsie 
Signed-off-by: Andrew Donnellan 

---

Applies on top of powerpc#next
---
 drivers/misc/cxl/Kconfig | 10 --
 drivers/scsi/cxlflash/main.h |  4 
 2 files changed, 14 deletions(-)

diff --git a/drivers/misc/cxl/Kconfig b/drivers/misc/cxl/Kconfig
index 560412c..0cb10cf 100644
--- a/drivers/misc/cxl/Kconfig
+++ b/drivers/misc/cxl/Kconfig
@@ -7,14 +7,6 @@ config CXL_BASE
default n
select PPC_COPRO_BASE
 
-config CXL_KERNEL_API
-   bool
-   default n
-
-config CXL_EEH
-   bool
-   default n
-
 config CXL_AFU_DRIVER_OPS
bool
default n
@@ -23,8 +15,6 @@ config CXL
tristate "Support for IBM Coherent Accelerators (CXL)"
depends on PPC_POWERNV && PCI_MSI && EEH
select CXL_BASE
-   select CXL_KERNEL_API
-   select CXL_EEH
select CXL_AFU_DRIVER_OPS
default m
help
diff --git a/drivers/scsi/cxlflash/main.h b/drivers/scsi/cxlflash/main.h
index eb9d8f7..a893408 100644
--- a/drivers/scsi/cxlflash/main.h
+++ b/drivers/scsi/cxlflash/main.h
@@ -100,8 +100,4 @@ struct asyc_intr_info {
 #define SCAN_HOST  0x04
 };
 
-#ifndef CONFIG_CXL_EEH
-#define cxl_perst_reloads_same_image(_a, _b) do { } while (0)
-#endif
-
 #endif /* _CXLFLASH_MAIN_H */
-- 
Andrew Donnellan  OzLabs, ADL Canberra
andrew.donnel...@au1.ibm.com  IBM Australia Limited

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[PATCH 6/6] powerpc/sparse: Make ppc_md.{halt, restart} __noreturn

[Daniel Axtens]

PowerNV marks it's halt and restart calls as __noreturn. However,
ppc_md does not have this annotation. Add the annotation to ppc_md,
and then to every halt/restart function that is missing it.

Additionally, I have verified that all of these functions do not
return. Occasionally I have added a spin loop to be sure.

Signed-off-by: Daniel Axtens 
---
 arch/powerpc/include/asm/machdep.h|  4 ++--
 arch/powerpc/include/asm/mpc52xx.h|  2 +-
 arch/powerpc/include/asm/ppc4xx.h |  2 +-
 arch/powerpc/include/asm/rtas.h   |  4 ++--
 arch/powerpc/kernel/rtas.c|  4 ++--
 arch/powerpc/platforms/512x/mpc512x.h |  2 +-
 arch/powerpc/platforms/512x/mpc512x_shared.c  |  2 +-
 arch/powerpc/platforms/52xx/mpc52xx_common.c  |  3 +--
 arch/powerpc/platforms/82xx/pq2.c |  2 +-
 arch/powerpc/platforms/82xx/pq2.h |  2 +-
 arch/powerpc/platforms/83xx/misc.c|  2 +-
 arch/powerpc/platforms/83xx/mpc83xx.h |  2 +-
 arch/powerpc/platforms/85xx/ksi8560.c |  2 +-
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |  2 +-
 arch/powerpc/platforms/8xx/m8xx_setup.c   |  2 +-
 arch/powerpc/platforms/8xx/mpc8xx.h   |  2 +-
 arch/powerpc/platforms/amigaone/setup.c   |  2 +-
 arch/powerpc/platforms/chrp/setup.c   |  2 +-
 arch/powerpc/platforms/embedded6xx/c2k.c  |  2 +-
 arch/powerpc/platforms/embedded6xx/gamecube.c |  6 +++---
 arch/powerpc/platforms/embedded6xx/holly.c|  2 +-
 arch/powerpc/platforms/embedded6xx/linkstation.c  |  6 +++---
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |  2 +-
 arch/powerpc/platforms/embedded6xx/mvme5100.c |  2 +-
 arch/powerpc/platforms/embedded6xx/storcenter.c   |  2 +-
 arch/powerpc/platforms/embedded6xx/wii.c  |  6 +++---
 arch/powerpc/platforms/maple/setup.c  |  8 +---
 arch/powerpc/platforms/pasemi/setup.c |  2 +-
 arch/powerpc/platforms/powermac/setup.c   | 10 +-
 arch/powerpc/platforms/ps3/setup.c|  4 ++--
 arch/powerpc/sysdev/fsl_soc.c |  8 +---
 arch/powerpc/sysdev/fsl_soc.h |  6 +++---
 32 files changed, 56 insertions(+), 53 deletions(-)

diff --git a/arch/powerpc/include/asm/machdep.h 
b/arch/powerpc/include/asm/machdep.h
index 6bdcd0da9e21..a9af1bd6a51e 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -111,8 +111,8 @@ struct machdep_calls {
/* To setup PHBs when using automatic OF platform driver for PCI */
int (*pci_setup_phb)(struct pci_controller *host);
 
-   void(*restart)(char *cmd);
-   void(*halt)(void);
+   void __noreturn (*restart)(char *cmd);
+   void __noreturn (*halt)(void);
void(*panic)(char *str);
void(*cpu_die)(void);
 
diff --git a/arch/powerpc/include/asm/mpc52xx.h 
b/arch/powerpc/include/asm/mpc52xx.h
index 0acc7c7c28d1..e94cede14522 100644
--- a/arch/powerpc/include/asm/mpc52xx.h
+++ b/arch/powerpc/include/asm/mpc52xx.h
@@ -275,7 +275,7 @@ extern int mpc5200_psc_ac97_gpio_reset(int psc_number);
 extern void mpc52xx_map_common_devices(void);
 extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv);
 extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node);
-extern void mpc52xx_restart(char *cmd);
+extern void __noreturn mpc52xx_restart(char *cmd);
 
 /* mpc52xx_gpt.c */
 struct mpc52xx_gpt_priv;
diff --git a/arch/powerpc/include/asm/ppc4xx.h 
b/arch/powerpc/include/asm/ppc4xx.h
index 033039a80c42..610a5119ad8c 100644
--- a/arch/powerpc/include/asm/ppc4xx.h
+++ b/arch/powerpc/include/asm/ppc4xx.h
@@ -13,6 +13,6 @@
 #ifndef __ASM_POWERPC_PPC4xx_H__
 #define __ASM_POWERPC_PPC4xx_H__
 
-extern void ppc4xx_reset_system(char *cmd);
+extern void __noreturn ppc4xx_reset_system(char *cmd);
 
 #endif /* __ASM_POWERPC_PPC4xx_H__ */
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 51400baa8d48..fa3e3c4367bd 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -339,9 +339,9 @@ extern int rtas_service_present(const char *service);
 extern int rtas_call(int token, int, int, int *, ...);
 void rtas_call_unlocked(struct rtas_args *args, int token, int nargs,
int nret, ...);
-extern void rtas_restart(char *cmd);
+extern void __noreturn rtas_restart(char *cmd);
 extern void rtas_power_off(void);
-extern void rtas_halt(void);
+extern void __noreturn rtas_halt(void);
 extern void rtas_os_term(char *str);
 extern int rtas_get_sensor(int sensor, int index, int *state);
 extern int rtas_get_sensor_fast(int sensor, int index, int *state);
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 28736ff27fea..3cb6fae4a13c 100644
--- a/arch/powerpc/kernel/rtas.c

[PATCH 5/6] powerpc/sparse: Pass endianness to sparse

[Daniel Axtens]

Explicitly give sparse an endianness in the Makefile, so that it
doesn't get confused.

Normally we have #ifdef one and #else the other, so it doesn't usually
matter, but we have been bitten by it before, and indeed this patch
fixes a number of sparse errors.

Suggested-by: Arnd Bergmann 
Signed-off-by: Daniel Axtens 
---
 arch/powerpc/Makefile | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 709a22a3e824..8617c71c3bdb 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -181,6 +181,11 @@ KBUILD_CFLAGS  += -pipe -Iarch/$(ARCH) $(CFLAGS-y)
 CPP= $(CC) -E $(KBUILD_CFLAGS)
 
 CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__ 
-D__powerpc$(CONFIG_WORD_SIZE)__
+ifdef CONFIG_CPU_BIG_ENDIAN
+CHECKFLAGS += -D__BIG_ENDIAN__
+else
+CHECKFLAGS += -D__LITTLE_ENDIAN__
+endif
 
 KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
 
-- 
2.1.4

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[PATCH 4/6] powerpc/kernel: Clean up some sparse warnings

[Daniel Axtens]

In hw_breakpoint.c, mark a user NIP as __user before passing it to
__get_user_inatomic.

In process.c, 7b051f665c32 ("powerpc: Use probe_kernel_address in
show_instructions") changed a call from __get_user to
probe_kernel_address. The address space annotations for that are
different: it no longer takes a user pointer, but a kernel pointer:
the new type is simply void *.

(This sounds super dodgy: why is a user pointer now a kernel pointer?
It's not so bad - it was always supposed to be kernel
pointer. __get_user was used on a kernel address to avoid an OOPS
should the address be invalid. probe_kernel_address handles this case,
so there's now no monkeying around with address spaces.)

io.c contains macros for reading and writing from io devices. Sparse
complains about things moving between address spaces. This is what the
functions are designed to do, so tell sparse we know what we're doing
with __force.

Signed-off-by: Daniel Axtens 
---
 arch/powerpc/kernel/hw_breakpoint.c |  2 +-
 arch/powerpc/kernel/io.c| 16 
 arch/powerpc/kernel/process.c   |  2 +-
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/kernel/hw_breakpoint.c 
b/arch/powerpc/kernel/hw_breakpoint.c
index aec9a1b1d25b..e903a6b96b7f 100644
--- a/arch/powerpc/kernel/hw_breakpoint.c
+++ b/arch/powerpc/kernel/hw_breakpoint.c
@@ -264,7 +264,7 @@ int __kprobes hw_breakpoint_handler(struct die_args *args)
 
stepped = 0;
instr = 0;
-   if (!__get_user_inatomic(instr, (unsigned int *) regs->nip))
+   if (!__get_user_inatomic(instr, (unsigned int __user *) regs->nip))
stepped = emulate_step(regs, instr);
 
/*
diff --git a/arch/powerpc/kernel/io.c b/arch/powerpc/kernel/io.c
index 2a2b4aeab80f..3f70b7dccee8 100644
--- a/arch/powerpc/kernel/io.c
+++ b/arch/powerpc/kernel/io.c
@@ -37,7 +37,7 @@ void _insb(const volatile u8 __iomem *port, void *buf, long 
count)
return;
asm volatile("sync");
do {
-   tmp = *port;
+   tmp = *(u8 __force *)port;
eieio();
*tbuf++ = tmp;
} while (--count != 0);
@@ -47,13 +47,13 @@ EXPORT_SYMBOL(_insb);
 
 void _outsb(volatile u8 __iomem *port, const void *buf, long count)
 {
-   const u8 *tbuf = buf;
+   const u8 __force *tbuf = buf;
 
if (unlikely(count <= 0))
return;
asm volatile("sync");
do {
-   *port = *tbuf++;
+   *(volatile u8 __force *)port = *tbuf++;
} while (--count != 0);
asm volatile("sync");
 }
@@ -68,7 +68,7 @@ void _insw_ns(const volatile u16 __iomem *port, void *buf, 
long count)
return;
asm volatile("sync");
do {
-   tmp = *port;
+   tmp = *(u16 __force *)port;
eieio();
*tbuf++ = tmp;
} while (--count != 0);
@@ -78,13 +78,13 @@ EXPORT_SYMBOL(_insw_ns);
 
 void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count)
 {
-   const u16 *tbuf = buf;
+   const u16 __force *tbuf = buf;
 
if (unlikely(count <= 0))
return;
asm volatile("sync");
do {
-   *port = *tbuf++;
+   *(volatile u16 __force *)port = *tbuf++;
} while (--count != 0);
asm volatile("sync");
 }
@@ -99,7 +99,7 @@ void _insl_ns(const volatile u32 __iomem *port, void *buf, 
long count)
return;
asm volatile("sync");
do {
-   tmp = *port;
+   tmp = *(u32 __force *)port;
eieio();
*tbuf++ = tmp;
} while (--count != 0);
@@ -115,7 +115,7 @@ void _outsl_ns(volatile u32 __iomem *port, const void *buf, 
long count)
return;
asm volatile("sync");
do {
-   *port = *tbuf++;
+   *(volatile u32 __force *)port = *tbuf++;
} while (--count != 0);
asm volatile("sync");
 }
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index a8cca88e972f..9c775e97558b 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1194,7 +1194,7 @@ static void show_instructions(struct pt_regs *regs)
 #endif
 
if (!__kernel_text_address(pc) ||
-probe_kernel_address((unsigned int __user *)pc, instr)) {
+probe_kernel_address((void *)pc, instr)) {
printk(KERN_CONT " ");
} else {
if (regs->nip == pc)
-- 
2.1.4

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