Re: bootx_init.c:88: undefined reference to `__stack_chk_fail_local'

[Christophe LEROY]

Le 03/01/2017 à 16:25, Christian Kujau a écrit :

Hi,

when compiling v4.10-rc2 with CONFIG_CC_STACKPROTECTOR_STRONG=y, the
linker fails with:


+ ld -EB -m elf32ppc -Bstatic --build-id -X -o .tmp_vmlinux1 -T
./arch/powerpc/kernel/vmlinux.lds arch/powerpc/kernel/head_32.o
arch/powerpc/kernel/fpu.o arch/powerpc/kernel/vector.o
arch/powerpc/kernel/prom_init.o init/built-in.o --start-group
usr/built-in.o arch/powerpc/kernel/built-in.o arch/powerpc/mm/built-in.o
arch/powerpc/lib/built-in.o arch/powerpc/sysdev/built-in.o
arch/powerpc/platforms/built-in.o arch/powerpc/math-emu/built-in.o
arch/powerpc/crypto/built-in.o arch/powerpc/net/built-in.o
kernel/built-in.o certs/built-in.o mm/built-in.o fs/built-in.o
ipc/built-in.o security/built-in.o crypto/built-in.o block/built-in.o
lib/lib.a lib/built-in.o drivers/built-in.o sound/built-in.o
firmware/built-in.o net/built-in.o virt/built-in.o --end-group
arch/powerpc/platforms/built-in.o: In function `bootx_printf':
/usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:88: 
undefined reference to `__stack_chk_fail_local'
arch/powerpc/platforms/built-in.o: In function `bootx_add_display_props':
/usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:211: 
undefined reference to `__stack_chk_fail_local'
arch/powerpc/platforms/built-in.o: In function
`bootx_scan_dt_build_struct':
/usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:350: 
undefined reference to `__stack_chk_fail_local'
arch/powerpc/platforms/built-in.o: In function `bootx_init':
/usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:596: 
undefined reference to `__stack_chk_fail_local'
/usr/bin/ld.bfd.real: .tmp_vmlinux1: hidden symbol `__stack_chk_fail_local' 
isn't defined
/usr/bin/ld.bfd.real: final link failed: Bad value



$ ld --version | head -1
GNU ld (GNU Binutils for Debian) 2.25

$ gcc --version | head -1
gcc-4.9.real (Debian 4.9.2-10) 4.9.2


I'm regularly compiling userspace programs with -fstack-protector w/o
problems. I suspect it's either 6533b7c16ee5712041b4e324100550e02a9a5dda
("powerpc: Initial stack protector (-fstack-protector) support") or
902e06eb86cd62753974c249bd1dedae2825b430 ("powerpc/32: Change the stack
protector canary value per task") or both but I haven't started the
bisection yet.

Any other ideas?

Thanks,
Christian.



Using GCC 5.4.0, I don't have that issue. bootx_init.o only contains 
reference to __stack_chk_fail


Looking a bit over internet, some people have reported having 
encountered that issue due to old object files not properly cleaned.


Have you tried a 'make clean' or 'distclean' ?

Christophe

Re: [RESEND] cxl: Force psl data-cache flush during device shutdown

[Andrew Donnellan]

On 04/01/17 17:18, Vaibhav Jain wrote:

This change adds a force psl data cache flush during device shutdown
callback. This should reduce a possibility of psl holding a dirty
cache line while the CAPP is being reinitialized, which may result in
a UE [load/store] machine check error.

Signed-off-by: Vaibhav Jain 


Should this be cc: stable? (it does depend on aaa2245ed836 which only 
came in during 4.9)


Looks good.

Reviewed-by: Andrew Donnellan 




---
Resend: Fixed the author ident.
---
 drivers/misc/cxl/pci.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 80a87ab..73432e7 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1610,6 +1610,9 @@ static void cxl_pci_remove_adapter(struct cxl *adapter)
cxl_sysfs_adapter_remove(adapter);
cxl_debugfs_adapter_remove(adapter);

+   /* Flush adapter datacache as its about to be removed */
+   cxl_data_cache_flush(adapter);
+
cxl_deconfigure_adapter(adapter);

device_unregister(>dev);



--
Andrew Donnellan  OzLabs, ADL Canberra
andrew.donnel...@au1.ibm.com  IBM Australia Limited

[RESEND] cxl: Force psl data-cache flush during device shutdown

[Vaibhav Jain]

This change adds a force psl data cache flush during device shutdown
callback. This should reduce a possibility of psl holding a dirty
cache line while the CAPP is being reinitialized, which may result in
a UE [load/store] machine check error.

Signed-off-by: Vaibhav Jain 
---
Resend: Fixed the author ident.
---
 drivers/misc/cxl/pci.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 80a87ab..73432e7 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -1610,6 +1610,9 @@ static void cxl_pci_remove_adapter(struct cxl *adapter)
cxl_sysfs_adapter_remove(adapter);
cxl_debugfs_adapter_remove(adapter);
 
+   /* Flush adapter datacache as its about to be removed */
+   cxl_data_cache_flush(adapter);
+
cxl_deconfigure_adapter(adapter);
 
device_unregister(>dev);
-- 
2.9.3

Re: ext4 filesystem corruption with 4.10-rc2 on ppc64le

[Chandan Rajendra]

On Wednesday, January 04, 2017 04:18:08 PM Anton Blanchard wrote:
> Hi,
> 
> I'm consistently seeing ext4 filesystem corruption using a mainline
> kernel. It doesn't take much to trigger it - download a ppc64le Ubuntu
> cloud image, boot it in KVM and run:
> 
> sudo apt-get update
> sudo apt-get dist-upgrade
> sudo reboot
> 
> And it never makes it back up, dying with rather severe filesystem
> corruption.

Hi,

The patch at https://patchwork.kernel.org/patch/9488235/ should fix the
bug.

> 
> I've narrowed it down to:
> 
> 64e1c57fa474 ("ext4: Use clean_bdev_aliases() instead of iteration")
> e64855c6cfaa ("fs: Add helper to clean bdev aliases under a bh and use it")
> ce98321bf7d2 ("fs: Remove unmap_underlying_metadata")
> 
> Backing these patches out fixes the issue.
> 
> Anton
> --
> To unsubscribe from this list: send the line "unsubscribe linux-ext4" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 

-- 
chandan

ext4 filesystem corruption with 4.10-rc2 on ppc64le

[Anton Blanchard]

Hi,

I'm consistently seeing ext4 filesystem corruption using a mainline
kernel. It doesn't take much to trigger it - download a ppc64le Ubuntu
cloud image, boot it in KVM and run:

sudo apt-get update
sudo apt-get dist-upgrade
sudo reboot

And it never makes it back up, dying with rather severe filesystem
corruption.

I've narrowed it down to:

64e1c57fa474 ("ext4: Use clean_bdev_aliases() instead of iteration")
e64855c6cfaa ("fs: Add helper to clean bdev aliases under a bh and use it")
ce98321bf7d2 ("fs: Remove unmap_underlying_metadata")

Backing these patches out fixes the issue.

Anton

[PATCH 4/9] powerpc/64: Fix naming of cache block vs. cache line

[Benjamin Herrenschmidt]

In a number of places we called "cache line size" what is actually
the cache block size, which in the powerpc architecture, means the
effective size to use with cache management instructions (it can
be different from the actual cache line size).

We fix the naming across the board and properly retrieve both
pieces of information when available in the device-tree.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/include/asm/cache.h   | 12 ---
 arch/powerpc/include/asm/page_64.h |  4 +--
 arch/powerpc/kernel/align.c|  2 +-
 arch/powerpc/kernel/asm-offsets.c  | 12 +++
 arch/powerpc/kernel/misc_64.S  | 28 
 arch/powerpc/kernel/setup_64.c | 65 +-
 arch/powerpc/kernel/vdso.c | 10 +++---
 arch/powerpc/lib/copypage_64.S |  4 +--
 arch/powerpc/lib/string_64.S   |  6 ++--
 9 files changed, 75 insertions(+), 68 deletions(-)

diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index ffbafbf..c74ebc2 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -30,12 +30,14 @@
 struct ppc64_caches {
u32 dsize;  /* L1 d-cache size */
u32 dline_size; /* L1 d-cache line size */
-   u32 log_dline_size;
-   u32 dlines_per_page;
+   u32 dblock_size;/* L1 d-cache block size */
+   u32 log_dblock_size;
+   u32 dblocks_per_page;
u32 isize;  /* L1 i-cache size */
-   u32 iline_size; /* L1 i-cache line size */
-   u32 log_iline_size;
-   u32 ilines_per_page;
+   u32 iline_size; /* L1 d-cache line size */
+   u32 iblock_size;/* L1 i-cache block size */
+   u32 log_iblock_size;
+   u32 iblocks_per_page;
 };
 
 extern struct ppc64_caches ppc64_caches;
diff --git a/arch/powerpc/include/asm/page_64.h 
b/arch/powerpc/include/asm/page_64.h
index dd5f071..c50a666 100644
--- a/arch/powerpc/include/asm/page_64.h
+++ b/arch/powerpc/include/asm/page_64.h
@@ -47,14 +47,14 @@ static inline void clear_page(void *addr)
unsigned long iterations;
unsigned long onex, twox, fourx, eightx;
 
-   iterations = ppc64_caches.dlines_per_page / 8;
+   iterations = ppc64_caches.dblocks_per_page / 8;
 
/*
 * Some verisions of gcc use multiply instructions to
 * calculate the offsets so lets give it a hand to
 * do better.
 */
-   onex = ppc64_caches.dline_size;
+   onex = ppc64_caches.dblock_size;
twox = onex << 1;
fourx = onex << 2;
eightx = onex << 3;
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 033f338..a617751 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -204,7 +204,7 @@ static int emulate_dcbz(struct pt_regs *regs, unsigned char 
__user *addr)
int i, size;
 
 #ifdef __powerpc64__
-   size = ppc64_caches.dline_size;
+   size = ppc64_caches.dblock_size;
 #else
size = L1_CACHE_BYTES;
 #endif
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index b89d14c..e2a881f 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -160,12 +160,12 @@ int main(void)
DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
 
 #ifdef CONFIG_PPC64
-   DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
-   DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, 
log_dline_size));
-   DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, 
dlines_per_page));
-   DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
-   DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, 
log_iline_size));
-   DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, 
ilines_per_page));
+   DEFINE(DCACHEL1BLOCKSIZE, offsetof(struct ppc64_caches, dblock_size));
+   DEFINE(DCACHEL1LOGBLOCKSIZE, offsetof(struct ppc64_caches, 
log_dblock_size));
+   DEFINE(DCACHEL1BLOCKSPERPAGE, offsetof(struct ppc64_caches, 
dblocks_per_page));
+   DEFINE(ICACHEL1BLOCKSIZE, offsetof(struct ppc64_caches, iblock_size));
+   DEFINE(ICACHEL1LOGBLOCKSIZE, offsetof(struct ppc64_caches, 
log_iblock_size));
+   DEFINE(ICACHEL1BLOCKSPERPAGE, offsetof(struct ppc64_caches, 
iblocks_per_page));
/* paca */
DEFINE(PACA_SIZE, sizeof(struct paca_struct));
DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index cb19515..70bc6f1 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -79,12 +79,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
  * each other.
  */
ld  r10,PPC64_CACHES@toc(r2)
-   lwz r7,DCACHEL1LINESIZE(r10)/* 

[PATCH 5/9] powerpc/64: Retrieve number of L1 cache sets from device-tree

[Benjamin Herrenschmidt]

It will be used to calculate the associativity

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/include/asm/cache.h |  2 ++
 arch/powerpc/kernel/setup_64.c   | 27 +--
 2 files changed, 27 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index c74ebc2..ceb1244 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -33,11 +33,13 @@ struct ppc64_caches {
u32 dblock_size;/* L1 d-cache block size */
u32 log_dblock_size;
u32 dblocks_per_page;
+   u32 dsets;
u32 isize;  /* L1 i-cache size */
u32 iline_size; /* L1 d-cache line size */
u32 iblock_size;/* L1 i-cache block size */
u32 log_iblock_size;
u32 iblocks_per_page;
+   u32 isets;
 };
 
 extern struct ppc64_caches ppc64_caches;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index e7e5c1b..d36b6f4 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -404,14 +404,18 @@ void __init initialize_cache_info(void)
 * d-cache and i-cache sizes... -Peter
 */
if (num_cpus == 1) {
-   const __be32 *sizep, *lsizep, *bsizep;
-   u32 size, lsize, bsize;
+   const __be32 *sizep, *lsizep, *bsizep, *setsp;
+   u32 size, lsize, bsize, sets;
 
size = 0;
+   sets = -1u;
lsize = bsize = cur_cpu_spec->dcache_bsize;
sizep = of_get_property(np, "d-cache-size", NULL);
if (sizep != NULL)
size = be32_to_cpu(*sizep);
+   setsp = of_get_property(np, "d-cache-sets", NULL);
+   if (setsp != NULL)
+   sets = be32_to_cpu(*setsp);
bsizep = of_get_property(np, "d-cache-block-size",
 NULL);
lsizep = of_get_property(np, "d-cache-line-size",
@@ -427,17 +431,31 @@ void __init initialize_cache_info(void)
"sizep: %p, bsizep: %p, lsizep: %p\n",
sizep, bsizep, lsizep);
 
+   /* OF is weird .. it represents fully associative caches
+* as "1 way" which doesn't make much sense and doesn't
+* leave room for direct mapped. We'll assume that 0
+* in OF means direct mapped for that reason.
+*/
+   if (sets == 1)
+   sets = 0;
+   else if (sets == 0)
+   sets = 1;
ppc64_caches.dsize = size;
+   ppc64_caches.dsets = sets;
ppc64_caches.dline_size = lsize;
ppc64_caches.dblock_size = bsize;
ppc64_caches.log_dblock_size = __ilog2(bsize);
ppc64_caches.dblocks_per_page = PAGE_SIZE / bsize;
 
size = 0;
+   sets = -1u;
lsize = bsize = cur_cpu_spec->icache_bsize;
sizep = of_get_property(np, "i-cache-size", NULL);
if (sizep != NULL)
size = be32_to_cpu(*sizep);
+   setsp = of_get_property(np, "i-cache-sets", NULL);
+   if (setsp != NULL)
+   sets = be32_to_cpu(*setsp);
bsizep = of_get_property(np, "i-cache-block-size",
 NULL);
lsizep = of_get_property(np, "i-cache-line-size",
@@ -453,7 +471,12 @@ void __init initialize_cache_info(void)
"sizep: %p, bsizep: %p, lsizep: %p\n",
sizep, bsizep, lsizep);
 
+   if (sets == 1)
+   sets = 0;
+   else if (sets == 0)
+   sets = 1;
ppc64_caches.isize = size;
+   ppc64_caches.isets = sets;
ppc64_caches.iline_size = lsize;
ppc64_caches.iblock_size = bsize;
ppc64_caches.log_iblock_size = __ilog2(bsize);
-- 
2.9.3

[PATCH 6/9] powerpc/64: Clean up ppc64_caches using a struct per cache

[Benjamin Herrenschmidt]

We have two set of identical struct members for the I and D sides
and mostly identical bunches of code to parse the device-tree to
populate them. Instead make a ppc_cache_info structure with one
copy for I and one for D

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/include/asm/cache.h   |  24 ++---
 arch/powerpc/include/asm/page_64.h |   4 +-
 arch/powerpc/kernel/align.c|   2 +-
 arch/powerpc/kernel/asm-offsets.c  |  12 +--
 arch/powerpc/kernel/setup_64.c | 175 ++---
 arch/powerpc/kernel/vdso.c |  16 ++--
 6 files changed, 112 insertions(+), 121 deletions(-)

diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index ceb1244..ceb7376 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -27,19 +27,19 @@
 #defineSMP_CACHE_BYTES L1_CACHE_BYTES
 
 #if defined(__powerpc64__) && !defined(__ASSEMBLY__)
+
+struct ppc_cache_info {
+   u32 size;
+   u32 line_size;
+   u32 block_size; /* L1 only */
+   u32 log_block_size;
+   u32 blocks_per_page;
+   u32 sets;
+};
+
 struct ppc64_caches {
-   u32 dsize;  /* L1 d-cache size */
-   u32 dline_size; /* L1 d-cache line size */
-   u32 dblock_size;/* L1 d-cache block size */
-   u32 log_dblock_size;
-   u32 dblocks_per_page;
-   u32 dsets;
-   u32 isize;  /* L1 i-cache size */
-   u32 iline_size; /* L1 d-cache line size */
-   u32 iblock_size;/* L1 i-cache block size */
-   u32 log_iblock_size;
-   u32 iblocks_per_page;
-   u32 isets;
+   struct ppc_cache_info l1d;
+   struct ppc_cache_info l1i;
 };
 
 extern struct ppc64_caches ppc64_caches;
diff --git a/arch/powerpc/include/asm/page_64.h 
b/arch/powerpc/include/asm/page_64.h
index c50a666..3e83d2a 100644
--- a/arch/powerpc/include/asm/page_64.h
+++ b/arch/powerpc/include/asm/page_64.h
@@ -47,14 +47,14 @@ static inline void clear_page(void *addr)
unsigned long iterations;
unsigned long onex, twox, fourx, eightx;
 
-   iterations = ppc64_caches.dblocks_per_page / 8;
+   iterations = ppc64_caches.l1d.blocks_per_page / 8;
 
/*
 * Some verisions of gcc use multiply instructions to
 * calculate the offsets so lets give it a hand to
 * do better.
 */
-   onex = ppc64_caches.dblock_size;
+   onex = ppc64_caches.l1d.block_size;
twox = onex << 1;
fourx = onex << 2;
eightx = onex << 3;
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index a617751..7806211 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -204,7 +204,7 @@ static int emulate_dcbz(struct pt_regs *regs, unsigned char 
__user *addr)
int i, size;
 
 #ifdef __powerpc64__
-   size = ppc64_caches.dblock_size;
+   size = ppc64_caches.l1d.block_size;
 #else
size = L1_CACHE_BYTES;
 #endif
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index e2a881f..100261b 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -160,12 +160,12 @@ int main(void)
DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
 
 #ifdef CONFIG_PPC64
-   DEFINE(DCACHEL1BLOCKSIZE, offsetof(struct ppc64_caches, dblock_size));
-   DEFINE(DCACHEL1LOGBLOCKSIZE, offsetof(struct ppc64_caches, 
log_dblock_size));
-   DEFINE(DCACHEL1BLOCKSPERPAGE, offsetof(struct ppc64_caches, 
dblocks_per_page));
-   DEFINE(ICACHEL1BLOCKSIZE, offsetof(struct ppc64_caches, iblock_size));
-   DEFINE(ICACHEL1LOGBLOCKSIZE, offsetof(struct ppc64_caches, 
log_iblock_size));
-   DEFINE(ICACHEL1BLOCKSPERPAGE, offsetof(struct ppc64_caches, 
iblocks_per_page));
+   DEFINE(DCACHEL1BLOCKSIZE, offsetof(struct ppc64_caches, 
l1d.block_size));
+   DEFINE(DCACHEL1LOGBLOCKSIZE, offsetof(struct ppc64_caches, 
l1d.log_block_size));
+   DEFINE(DCACHEL1BLOCKSPERPAGE, offsetof(struct ppc64_caches, 
l1d.blocks_per_page));
+   DEFINE(ICACHEL1BLOCKSIZE, offsetof(struct ppc64_caches, 
l1i.block_size));
+   DEFINE(ICACHEL1LOGBLOCKSIZE, offsetof(struct ppc64_caches, 
l1i.log_block_size));
+   DEFINE(ICACHEL1BLOCKSPERPAGE, offsetof(struct ppc64_caches, 
l1i.blocks_per_page));
/* paca */
DEFINE(PACA_SIZE, sizeof(struct paca_struct));
DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index d36b6f4..e2946a7 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -78,10 +78,14 @@ int spinning_secondaries;
 u64 ppc64_pft_size;
 
 struct ppc64_caches ppc64_caches = {
-   .dblock_size = 0x40,
-   .log_dblock_size = 6,
-   .iblock_size = 0x40,
-   

[PATCH 7/9] powerpc/64: Add L2 and L3 cache shape info

[Benjamin Herrenschmidt]

Retrieved from device-tree when available

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/include/asm/cache.h |  2 ++
 arch/powerpc/kernel/setup_64.c   | 25 -
 2 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index ceb7376..3987bd9 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -40,6 +40,8 @@ struct ppc_cache_info {
 struct ppc64_caches {
struct ppc_cache_info l1d;
struct ppc_cache_info l1i;
+   struct ppc_cache_info l2;
+   struct ppc_cache_info l3;
 };
 
 extern struct ppc64_caches ppc64_caches;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index e2946a7..216e305 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -457,22 +457,37 @@ static bool __init parse_cache_info(struct device_node 
*np,
 
 void __init initialize_cache_info(void)
 {
-   struct device_node *np;
+   struct device_node *cpu, *l2, *l3 = NULL;
 
DBG(" -> initialize_cache_info()\n");
 
-   np  = of_find_node_by_type(NULL, "cpu");
+   cpu = of_find_node_by_type(NULL, "cpu");
 
/*
 * We're assuming *all* of the CPUs have the same
 * d-cache and i-cache sizes... -Peter
 */
-   if (np) {
-   if (!parse_cache_info(np, false, _caches.l1d))
+   if (cpu) {
+   if (!parse_cache_info(cpu, false, _caches.l1d))
DBG("Argh, can't find dcache properties !\n");
 
-   if (!parse_cache_info(np, true, _caches.l1i))
+   if (!parse_cache_info(cpu, true, _caches.l1i))
DBG("Argh, can't find icache properties !\n");
+
+   /* Try to find the L2 and L3 if any. Assume they are
+* unified and use the D-side properties
+*/
+   l2 = of_find_next_cache_node(cpu);
+   of_node_put(cpu);
+   if (l2) {
+   parse_cache_info(l2, false, _caches.l2);
+   l3 = of_find_next_cache_node(l2);
+   of_node_put(l2);
+   }
+   if (l3) {
+   parse_cache_info(l3, false, _caches.l3);
+   of_node_put(l3);
+   }
}
 
/* For use by binfmt_elf */
-- 
2.9.3

[PATCH 8/9] powerpc/64: Hard code cache geometry on POWER8

[Benjamin Herrenschmidt]

All shipping firmware versions have it wrong in the device-tree

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup_64.c | 52 +++---
 1 file changed, 49 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 216e305..b3c93d8 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -255,7 +255,7 @@ static void cpu_ready_for_interrupts(void)
 
 void __init early_setup(unsigned long dt_ptr)
 {
-   static __initdata struct paca_struct boot_paca;
+   static struct paca_struct boot_paca __initdata ;
 
/*  printk is _NOT_ safe to use here ! --- */
 
@@ -455,13 +455,59 @@ static bool __init parse_cache_info(struct device_node 
*np,
return success;
 }
 
+static void __init populate_p8_cache_info(void)
+{
+   static const struct ppc_cache_info p8_l1i __initconst  = {
+   .size = 0x8000,
+   .line_size = 128,
+   .block_size = 128,
+   .log_block_size = 7,
+   .blocks_per_page = PAGE_SIZE / 128,
+   .sets = 32
+   };
+   static const struct ppc_cache_info p8_l1d __initconst  = {
+   .size = 0x1,
+   .line_size = 128,
+   .block_size = 128,
+   .log_block_size = 7,
+   .blocks_per_page = PAGE_SIZE / 128,
+   .sets = 64
+   };
+   static const struct ppc_cache_info p8_l2 __initconst  = {
+   .size = 0x8,
+   .line_size = 128,
+   .sets = 512
+   };
+   static const struct ppc_cache_info p8_l3 __initconst  = {
+   .size = 0x80,
+   .line_size = 128,
+   .sets = 8192
+   };
+   ppc64_caches.l1i = p8_l1i;
+   ppc64_caches.l1d = p8_l1d;
+   ppc64_caches.l2 = p8_l2;
+   ppc64_caches.l3 = p8_l3;
+}
+
 void __init initialize_cache_info(void)
 {
-   struct device_node *cpu, *l2, *l3 = NULL;
+   struct device_node *cpu = NULL, *l2, *l3 = NULL;
+   u32 pvr;
 
DBG(" -> initialize_cache_info()\n");
 
-   cpu = of_find_node_by_type(NULL, "cpu");
+   /*
+* All shipping POWER8 machines have a firmware bug that
+* puts incorrect information in the device-tree. This will
+* be (hopefully) fixed for future chips but for now hard
+* code the values if we are running on one of these
+*/
+   pvr = PVR_VER(mfspr(SPRN_PVR));
+   if (pvr == PVR_POWER8 || pvr == PVR_POWER8E ||
+   pvr == PVR_POWER8NVL)
+   populate_p8_cache_info();
+   else
+   cpu = of_find_node_by_type(NULL, "cpu");
 
/*
 * We're assuming *all* of the CPUs have the same
-- 
2.9.3

[PATCH 9/9] powerpc: A new cache shape aux vectors

[Benjamin Herrenschmidt]

The definition is loosely based on sh and alpha, modified to
accomodate larger associativity and cache size for future-proofing.

We currently set all the values to -1 which indicates that the
information isn't available.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/include/asm/cache.h   |  1 +
 arch/powerpc/include/asm/elf.h | 17 -
 arch/powerpc/include/uapi/asm/auxvec.h | 33 -
 arch/powerpc/kernel/setup-common.c |  5 -
 arch/powerpc/kernel/setup_64.c |  4 
 5 files changed, 57 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 3987bd9..1557d26 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -35,6 +35,7 @@ struct ppc_cache_info {
u32 log_block_size;
u32 blocks_per_page;
u32 sets;
+   u32 assoc;
 };
 
 struct ppc64_caches {
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index 730c27e..27dece6 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -108,13 +108,17 @@ do {  
\
  */
 # define elf_read_implies_exec(ex, exec_stk) (is_32bit_task() ? \
(exec_stk == EXSTACK_DEFAULT) : 0)
-#else 
+#else
 # define elf_read_implies_exec(ex, exec_stk) (exec_stk == EXSTACK_DEFAULT)
 #endif /* __powerpc64__ */
 
 extern int dcache_bsize;
 extern int icache_bsize;
 extern int ucache_bsize;
+extern long il1cache_shape;
+extern long dl1cache_shape;
+extern long l2cache_shape;
+extern long l3cache_shape;
 
 /* vDSO has arch_setup_additional_pages */
 #define ARCH_HAS_SETUP_ADDITIONAL_PAGES
@@ -136,6 +140,9 @@ extern int arch_setup_additional_pages(struct linux_binprm 
*bprm,
 
 #endif /* CONFIG_SPU_BASE */
 
+#define get_cache_shape(level) \
+   (ppc64_caches.level.assoc << 16 | ppc64_caches.level.line_size)
+
 /*
  * The requirements here are:
  * - keep the final alignment of sp (sp & 0xf)
@@ -156,6 +163,14 @@ do {   
\
NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);  \
NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);  \
VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);  \
+   NEW_AUX_ENT(AT_L1I_CACHESIZE, ppc64_caches.l1i.size);   \
+   NEW_AUX_ENT(AT_L1I_CACHESHAPE, get_cache_shape(l1i));   \
+   NEW_AUX_ENT(AT_L1D_CACHESIZE, ppc64_caches.l1i.size);   \
+   NEW_AUX_ENT(AT_L1D_CACHESHAPE, get_cache_shape(l1i));   \
+   NEW_AUX_ENT(AT_L2_CACHESIZE, ppc64_caches.l2.size); \
+   NEW_AUX_ENT(AT_L2_CACHESHAPE, get_cache_shape(l2)); \
+   NEW_AUX_ENT(AT_L3_CACHESIZE, ppc64_caches.l3.size); \
+   NEW_AUX_ENT(AT_L3_CACHESHAPE, get_cache_shape(l3)); \
 } while (0)
 
 #endif /* _ASM_POWERPC_ELF_H */
diff --git a/arch/powerpc/include/uapi/asm/auxvec.h 
b/arch/powerpc/include/uapi/asm/auxvec.h
index ce17d2c..79183d2 100644
--- a/arch/powerpc/include/uapi/asm/auxvec.h
+++ b/arch/powerpc/include/uapi/asm/auxvec.h
@@ -16,6 +16,37 @@
  */
 #define AT_SYSINFO_EHDR33
 
-#define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */
+/*
+ * AT_*CACHEBSIZE above represent the cache *block* size which is
+ * the size that is affected by the cache management instructions.
+ *
+ * It doesn't nececssarily matches the cache *line* size which is
+ * more of a performance tuning hint. Additionally the latter can
+ * be different for the different cache levels.
+ *
+ * The set of entries below represent more extensive information
+ * about the caches, in the form of two entry per cache type,
+ * one entry containing the cache size in bytes, and the other
+ * containing the cache line size in bytes in the bottom 16 bits
+ * and the cache associativity in the next 16 bits.
+ *
+ * The associativity is such that if N is the 16-bit value, the
+ * cache is N way set associative. A value if 0x means fully
+ * associative, a value of 1 means directly mapped.
+ *
+ * For all these fields, a value of 0 means that the information
+ * is not known.
+ */
+
+#define AT_L1I_CACHESIZE   40
+#define AT_L1I_CACHESHAPE  41
+#define AT_L1D_CACHESIZE   42
+#define AT_L1D_CACHESHAPE  43
+#define AT_L2_CACHESIZE44
+#define AT_L2_CACHESHAPE   45
+#define AT_L3_CACHESIZE46
+#define AT_L3_CACHESHAPE   47
+
+#define AT_VECTOR_SIZE_ARCH14 /* entries in ARCH_DLINFO */
 
 #endif
diff --git a/arch/powerpc/kernel/setup-common.c 
b/arch/powerpc/kernel/setup-common.c
index e0eeed4..cfa2a06 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -94,7 +94,10 @@ EXPORT_SYMBOL_GPL(boot_cpuid);
 int dcache_bsize;
 int icache_bsize;
 int 

[PATCH 3/9] powerpc: Remove obsolete comment about patching instructions

[Benjamin Herrenschmidt]

We don't patch instructions based on the cache lines or block
sizes these days.

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup_64.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 6263e0d..222bbb0 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -77,9 +77,6 @@
 int spinning_secondaries;
 u64 ppc64_pft_size;
 
-/* Pick defaults since we might want to patch instructions
- * before we've read this from the device tree.
- */
 struct ppc64_caches ppc64_caches = {
.dline_size = 0x40,
.log_dline_size = 6,
-- 
2.9.3

[PATCH 2/9] powerpc: Move {d, i, u}cache_bsize definitions to a common place

[Benjamin Herrenschmidt]

The variables are defined twice in setup_32.c and setup_64.c, do it
once in setup-common.c instead

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/kernel/setup-common.c | 9 +
 arch/powerpc/kernel/setup_32.c | 8 
 arch/powerpc/kernel/setup_64.c | 8 
 3 files changed, 9 insertions(+), 16 deletions(-)

diff --git a/arch/powerpc/kernel/setup-common.c 
b/arch/powerpc/kernel/setup-common.c
index dba265c..e0eeed4 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -87,6 +87,15 @@ EXPORT_SYMBOL(machine_id);
 int boot_cpuid = -1;
 EXPORT_SYMBOL_GPL(boot_cpuid);
 
+/*
+ * These are used in binfmt_elf.c to put aux entries on the stack
+ * for each elf executable being started.
+ */
+int dcache_bsize;
+int icache_bsize;
+int ucache_bsize;
+
+
 unsigned long klimit = (unsigned long) _end;
 
 /*
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 24ec3ea..3b81742 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -53,14 +53,6 @@ unsigned int DMA_MODE_READ;
 unsigned int DMA_MODE_WRITE;
 
 /*
- * These are used in binfmt_elf.c to put aux entries on the stack
- * for each elf executable being started.
- */
-int dcache_bsize;
-int icache_bsize;
-int ucache_bsize;
-
-/*
  * We're called here very early in the boot.
  *
  * Note that the kernel may be running at an address which is different
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 7ac8e6e..6263e0d 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -88,14 +88,6 @@ struct ppc64_caches ppc64_caches = {
 };
 EXPORT_SYMBOL_GPL(ppc64_caches);
 
-/*
- * These are used in binfmt_elf.c to put aux entries on the stack
- * for each elf executable being started.
- */
-int dcache_bsize;
-int icache_bsize;
-int ucache_bsize;
-
 #if defined(CONFIG_PPC_BOOK3E) && defined(CONFIG_SMP)
 void __init setup_tlb_core_data(void)
 {
-- 
2.9.3

[PATCH 1/9] powerpc: Move ARCH_DLINFO out of uapi

[Benjamin Herrenschmidt]

It's an kernel private macro, it doesn't belong there

Signed-off-by: Benjamin Herrenschmidt 
---
 arch/powerpc/include/asm/elf.h  | 22 ++
 arch/powerpc/include/uapi/asm/elf.h | 23 ---
 2 files changed, 22 insertions(+), 23 deletions(-)

diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index ee46ffe..730c27e 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -136,4 +136,26 @@ extern int arch_setup_additional_pages(struct linux_binprm 
*bprm,
 
 #endif /* CONFIG_SPU_BASE */
 
+/*
+ * The requirements here are:
+ * - keep the final alignment of sp (sp & 0xf)
+ * - make sure the 32-bit value at the first 16 byte aligned position of
+ *   AUXV is greater than 16 for glibc compatibility.
+ *   AT_IGNOREPPC is used for that.
+ * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
+ *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
+ * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
+ */
+#define ARCH_DLINFO\
+do {   \
+   /* Handle glibc compatibility. */   \
+   NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);\
+   NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);\
+   /* Cache size items */  \
+   NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);  \
+   NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);  \
+   NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);  \
+   VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);  \
+} while (0)
+
 #endif /* _ASM_POWERPC_ELF_H */
diff --git a/arch/powerpc/include/uapi/asm/elf.h 
b/arch/powerpc/include/uapi/asm/elf.h
index 3a9e44c..b2c6fdd 100644
--- a/arch/powerpc/include/uapi/asm/elf.h
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -162,29 +162,6 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
 typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
 #endif
 
-
-/*
- * The requirements here are:
- * - keep the final alignment of sp (sp & 0xf)
- * - make sure the 32-bit value at the first 16 byte aligned position of
- *   AUXV is greater than 16 for glibc compatibility.
- *   AT_IGNOREPPC is used for that.
- * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
- *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
- * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
- */
-#define ARCH_DLINFO\
-do {   \
-   /* Handle glibc compatibility. */   \
-   NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);\
-   NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);\
-   /* Cache size items */  \
-   NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);  \
-   NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);  \
-   NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);  \
-   VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);  \
-} while (0)
-
 /* PowerPC64 relocations defined by the ABIs */
 #define R_PPC64_NONER_PPC_NONE
 #define R_PPC64_ADDR32  R_PPC_ADDR32  /* 32bit absolute address.  */
-- 
2.9.3

Re: [PATCH v4 3/4] powerpc/mm: add radix__remove_section_mapping()

[Aneesh Kumar K.V]

Reza Arbab  writes:

> Tear down and free the four-level page tables of physical mappings
> during memory hotremove.
>
> Borrow the basic structure of remove_pagetable() and friends from the
> identically-named x86 functions. Simplify things a bit so locking and
> tlb flushing are only done in the outermost function.
>
> Memory must be offline to be removed, thus not in use. So there
> shouldn't be the sort of concurrent page walking activity here that
> might prompt us to use RCU.
>
> Signed-off-by: Reza Arbab 
> ---
>  arch/powerpc/include/asm/book3s/64/radix.h |   1 +
>  arch/powerpc/mm/pgtable-book3s64.c |   2 +-
>  arch/powerpc/mm/pgtable-radix.c| 149 
> +
>  3 files changed, 151 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/include/asm/book3s/64/radix.h 
> b/arch/powerpc/include/asm/book3s/64/radix.h
> index 43c2571..0032b66 100644
> --- a/arch/powerpc/include/asm/book3s/64/radix.h
> +++ b/arch/powerpc/include/asm/book3s/64/radix.h
> @@ -294,6 +294,7 @@ static inline unsigned long radix__get_tree_size(void)
>
>  #ifdef CONFIG_MEMORY_HOTPLUG
>  int radix__create_section_mapping(unsigned long start, unsigned long end);
> +int radix__remove_section_mapping(unsigned long start, unsigned long end);
>  #endif /* CONFIG_MEMORY_HOTPLUG */
>  #endif /* __ASSEMBLY__ */
>  #endif
> diff --git a/arch/powerpc/mm/pgtable-book3s64.c 
> b/arch/powerpc/mm/pgtable-book3s64.c
> index 2b13f6b..b798ff6 100644
> --- a/arch/powerpc/mm/pgtable-book3s64.c
> +++ b/arch/powerpc/mm/pgtable-book3s64.c
> @@ -139,7 +139,7 @@ int create_section_mapping(unsigned long start, unsigned 
> long end)
>  int remove_section_mapping(unsigned long start, unsigned long end)
>  {
>   if (radix_enabled())
> - return -ENODEV;
> + return radix__remove_section_mapping(start, end);
>
>   return hash__remove_section_mapping(start, end);
>  }
> diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
> index 3588895..f7a8e625 100644
> --- a/arch/powerpc/mm/pgtable-radix.c
> +++ b/arch/powerpc/mm/pgtable-radix.c
> @@ -457,10 +457,159 @@ void radix__setup_initial_memory_limit(phys_addr_t 
> first_memblock_base,
>  }
>
>  #ifdef CONFIG_MEMORY_HOTPLUG
> +static void free_pte_table(pte_t *pte_start, pmd_t *pmd)
> +{
> + pte_t *pte;
> + int i;
> +
> + for (i = 0; i < PTRS_PER_PTE; i++) {
> + pte = pte_start + i;
> + if (!pte_none(*pte))
> + return;
> + }
> +
> + pte_free_kernel(_mm, pte_start);
> + pmd_clear(pmd);
> +}
> +
> +static void free_pmd_table(pmd_t *pmd_start, pud_t *pud)
> +{
> + pmd_t *pmd;
> + int i;
> +
> + for (i = 0; i < PTRS_PER_PMD; i++) {
> + pmd = pmd_start + i;
> + if (!pmd_none(*pmd))
> + return;
> + }
> +
> + pmd_free(_mm, pmd_start);
> + pud_clear(pud);
> +}
> +
> +static void free_pud_table(pud_t *pud_start, pgd_t *pgd)
> +{
> + pud_t *pud;
> + int i;
> +
> + for (i = 0; i < PTRS_PER_PUD; i++) {
> + pud = pud_start + i;
> + if (!pud_none(*pud))
> + return;
> + }
> +
> + pud_free(_mm, pud_start);
> + pgd_clear(pgd);
> +}
> +
> +static void remove_pte_table(pte_t *pte_start, unsigned long addr,
> +  unsigned long end)
> +{
> + unsigned long next;
> + pte_t *pte;
> +
> + pte = pte_start + pte_index(addr);
> + for (; addr < end; addr = next, pte++) {
> + next = (addr + PAGE_SIZE) & PAGE_MASK;
> + if (next > end)
> + next = end;
> +
> + if (!pte_present(*pte))
> + continue;
> +
> + pte_clear(_mm, addr, pte);
> + }
> +}
> +
> +static void remove_pmd_table(pmd_t *pmd_start, unsigned long addr,
> +  unsigned long end)
> +{
> + unsigned long next;
> + pte_t *pte_base;
> + pmd_t *pmd;
> +
> + pmd = pmd_start + pmd_index(addr);
> + for (; addr < end; addr = next, pmd++) {
> + next = pmd_addr_end(addr, end);
> +
> + if (!pmd_present(*pmd))
> + continue;
> +
> + if (pmd_huge(*pmd)) {
> + pte_clear(_mm, addr, (pte_t *)pmd);
> + continue;
> + }
> +
> + pte_base = (pte_t *)pmd_page_vaddr(*pmd);
> + remove_pte_table(pte_base, addr, next);
> + free_pte_table(pte_base, pmd);
> + }
> +}
> +
> +static void remove_pud_table(pud_t *pud_start, unsigned long addr,
> +  unsigned long end)
> +{
> + unsigned long next;
> + pmd_t *pmd_base;
> + pud_t *pud;
> +
> + pud = pud_start + pud_index(addr);
> + for (; addr < end; addr = next, pud++) {
> + next = pud_addr_end(addr, end);
> +
> + if (!pud_present(*pud))
> 

Re: [PATCH v4 1/4] powerpc/mm: refactor radix physical page mapping

[Aneesh Kumar K.V]

Reza Arbab  writes:

> Move the page mapping code in radix_init_pgtable() into a separate
> function that will also be used for memory hotplug.
>
> The current goto loop progressively decreases its mapping size as it
> covers the tail of a range whose end is unaligned. Change this to a for
> loop which can do the same for both ends of the range.
>

We lost the below in the change.

pr_info("Mapping range 0x%lx - 0x%lx with 0x%lx\n",
(unsigned long)base, (unsigned long)end,
linear_page_size);


Is there a way to dump the range and the size with which we mapped that
range ?


> Signed-off-by: Reza Arbab 
> ---
>  arch/powerpc/mm/pgtable-radix.c | 69 
> ++---
>  1 file changed, 31 insertions(+), 38 deletions(-)
>
> diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
> index 623a0dc..5cee6d1 100644
> --- a/arch/powerpc/mm/pgtable-radix.c
> +++ b/arch/powerpc/mm/pgtable-radix.c
> @@ -107,54 +107,47 @@ int radix__map_kernel_page(unsigned long ea, unsigned 
> long pa,
>   return 0;
>  }
>
> +static int __meminit create_physical_mapping(unsigned long start,
> +  unsigned long end)
> +{
> + unsigned long mapping_size;
> +
> + start = _ALIGN_UP(start, PAGE_SIZE);
> + for (; start < end; start += mapping_size) {
> + unsigned long gap = end - start;
> + int rc;
> +
> + if (IS_ALIGNED(start, PUD_SIZE) && gap >= PUD_SIZE &&
> + mmu_psize_defs[MMU_PAGE_1G].shift)
> + mapping_size = PUD_SIZE;
> + else if (IS_ALIGNED(start, PMD_SIZE) && gap >= PMD_SIZE &&
> +  mmu_psize_defs[MMU_PAGE_2M].shift)
> + mapping_size = PMD_SIZE;
> + else
> + mapping_size = PAGE_SIZE;
> +
> + rc = radix__map_kernel_page((unsigned long)__va(start), start,
> + PAGE_KERNEL_X, mapping_size);
> + if (rc)
> + return rc;
> + }
> +
> + return 0;
> +}
> +
>  static void __init radix_init_pgtable(void)
>  {
> - int loop_count;
> - u64 base, end, start_addr;
>   unsigned long rts_field;
>   struct memblock_region *reg;
> - unsigned long linear_page_size;
>
>   /* We don't support slb for radix */
>   mmu_slb_size = 0;
>   /*
>* Create the linear mapping, using standard page size for now
>*/
> - loop_count = 0;
> - for_each_memblock(memory, reg) {
> -
> - start_addr = reg->base;
> -
> -redo:
> - if (loop_count < 1 && mmu_psize_defs[MMU_PAGE_1G].shift)
> - linear_page_size = PUD_SIZE;
> - else if (loop_count < 2 && mmu_psize_defs[MMU_PAGE_2M].shift)
> - linear_page_size = PMD_SIZE;
> - else
> - linear_page_size = PAGE_SIZE;
> -
> - base = _ALIGN_UP(start_addr, linear_page_size);
> - end = _ALIGN_DOWN(reg->base + reg->size, linear_page_size);
> -
> - pr_info("Mapping range 0x%lx - 0x%lx with 0x%lx\n",
> - (unsigned long)base, (unsigned long)end,
> - linear_page_size);
> -
> - while (base < end) {
> - radix__map_kernel_page((unsigned long)__va(base),
> -   base, PAGE_KERNEL_X,
> -   linear_page_size);
> - base += linear_page_size;
> - }
> - /*
> -  * map the rest using lower page size
> -  */
> - if (end < reg->base + reg->size) {
> - start_addr = end;
> - loop_count++;
> - goto redo;
> - }
> - }
> + for_each_memblock(memory, reg)
> + WARN_ON(create_physical_mapping(reg->base,
> + reg->base + reg->size));
>   /*
>* Allocate Partition table and process table for the
>* host.
> -- 
> 1.8.3.1

[PATCH] powerpc/mm/4k: don't allocate larger pmd page table for 4k

[Aneesh Kumar K.V]

We now support THP with both 64k and 4K page size configuration
for radix. (hash only support THP with 64K page size). Hence we
will have CONFIG_TRANSPARENT_HUGEPAGE enabled for both PPC_64K
and PPC_4K config. Since we only need large pmd page table
with hash configuration (to store the slot information
in the second half of the table) restrict the large pmd page table
to THP and 64K configs.

Signed-off-by: Aneesh Kumar K.V 
---
 arch/powerpc/include/asm/book3s/64/hash.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/book3s/64/hash.h 
b/arch/powerpc/include/asm/book3s/64/hash.h
index f61cad3de4e6..5ae0596aa7e0 100644
--- a/arch/powerpc/include/asm/book3s/64/hash.h
+++ b/arch/powerpc/include/asm/book3s/64/hash.h
@@ -33,9 +33,9 @@
 H_PUD_INDEX_SIZE + H_PGD_INDEX_SIZE + 
PAGE_SHIFT)
 #define H_PGTABLE_RANGE(ASM_CONST(1) << H_PGTABLE_EADDR_SIZE)
 
-#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+#if defined(CONFIG_TRANSPARENT_HUGEPAGE) &&  defined(CONFIG_PPC_64K_PAGES)
 /*
- * only with hash we need to use the second half of pmd page table
+ * only with hash 64k we need to use the second half of pmd page table
  * to store pointer to deposited pgtable_t
  */
 #define H_PMD_CACHE_INDEX  (H_PMD_INDEX_SIZE + 1)
-- 
2.10.2

Re: [PATCH] powerpc: fix pgtable pmd cache init

[Aneesh Kumar K.V]

Nicholas Piggin  writes:

> On Wed, 04 Jan 2017 07:34:41 +0530
> "Aneesh Kumar K.V"  wrote:
>
>> Nicholas Piggin  writes:
>> 
>> > Commit 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits")
>> > mixed up PMD_INDEX_SIZE and PMD_CACHE_INDEX a couple of times. This
>> > resulted in 64s/hash/4k configs to panic at boot with a false positive
>> > error check.
>> >
>> > Fix that and simplify error handling by moving the check to the caller.
>> >
>> > Fixes: 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits")
>> > Cc: Christophe Leroy 
>> > Cc: Aneesh Kumar K.V 
>> > Cc: Scott Wood 
>> > Cc: linuxppc-dev@lists.ozlabs.org
>> > Signed-off-by: Nicholas Piggin   
>> 
>> I did another fix here.
>> 
>> https://lkml.kernel.org/r/20161214043349.23677-1-aneesh.ku...@linux.vnet.ibm.com
>> 
>> But this patch makes it much simpler. Hence.
>> 
>> Reviewed-by: Aneesh Kumar K.V 
>> 
>> There is this hunk in the patch I did.
>
> Ah, I missed that. My patch just fixes the 9b081e10805cd bug, but this
> hunk looks like it should still go in as another patch. Will you resend
> it?
>

ok will do that.

-aneesh

Re: [PATCH] powerpc: fix pgtable pmd cache init

[Nicholas Piggin]

On Wed, 04 Jan 2017 07:34:41 +0530
"Aneesh Kumar K.V"  wrote:

> Nicholas Piggin  writes:
> 
> > Commit 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits")
> > mixed up PMD_INDEX_SIZE and PMD_CACHE_INDEX a couple of times. This
> > resulted in 64s/hash/4k configs to panic at boot with a false positive
> > error check.
> >
> > Fix that and simplify error handling by moving the check to the caller.
> >
> > Fixes: 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits")
> > Cc: Christophe Leroy 
> > Cc: Aneesh Kumar K.V 
> > Cc: Scott Wood 
> > Cc: linuxppc-dev@lists.ozlabs.org
> > Signed-off-by: Nicholas Piggin   
> 
> I did another fix here.
> 
> https://lkml.kernel.org/r/20161214043349.23677-1-aneesh.ku...@linux.vnet.ibm.com
> 
> But this patch makes it much simpler. Hence.
> 
> Reviewed-by: Aneesh Kumar K.V 
> 
> There is this hunk in the patch I did.

Ah, I missed that. My patch just fixes the 9b081e10805cd bug, but this
hunk looks like it should still go in as another patch. Will you resend
it?

Thanks,
Nick


> 
> --- a/arch/powerpc/include/asm/book3s/64/hash.h
> +++ b/arch/powerpc/include/asm/book3s/64/hash.h
> @@ -33,9 +33,9 @@
>H_PUD_INDEX_SIZE + H_PGD_INDEX_SIZE + 
> PAGE_SHIFT)
>  #define H_PGTABLE_RANGE  (ASM_CONST(1) << H_PGTABLE_EADDR_SIZE)
> 
> -#ifdef CONFIG_TRANSPARENT_HUGEPAGE
> +#if defined(CONFIG_TRANSPARENT_HUGEPAGE) &&  defined(CONFIG_PPC_64K_PAGES)
>  /*
> - * only with hash we need to use the second half of pmd page table
> + * only with hash 64k we need to use the second half of pmd page table
>   * to store pointer to deposited pgtable_t
>   */
>  #define H_PMD_CACHE_INDEX(H_PMD_INDEX_SIZE + 1)
> 

DEBUG_LOCKS_WARN_ON(1) / lockdep.c:3134 lockdep_init_map+0x1e8/0x1f0

[Christian Kujau]

Hi,

booting v4.10-rc2 on this PowerPC G4 machine prints the following early 
on, but then continues to boot and the machine is running fine so far:


BUG: key ef0ba7d0 not in .data!
DEBUG_LOCKS_WARN_ON(1)
[ cut here ]
WARNING: CPU: 0 PID: 1 at 
/usr/local/src/linux-git/kernel/locking/lockdep.c:3134 
lockdep_init_map+0x1e8/0x1f0
Modules linked in:
CPU: 0 PID: 1 Comm: swapper Not tainted 4.10.0-rc2 #4
task: ef04aa60 task.stack: ef042000
NIP: c005eb78 LR: c005eb78 CTR: 
REGS: ef043d70 TRAP: 0700   Not tainted  (4.10.0-rc2)
MSR: 02029032 
  CR: 4822  XER: 2000
GPR00: c005eb78 ef043e20 ef04aa60 0016 0001 c0068b24  0001 
GPR08:   4ead 00d6 2824  c00047f0  
GPR16:   c08b9280 effedfa0 c078d6ac c107 c078eddc c078ee14 
GPR24: c078ed24 c078ee24 0002 ef085a00  c08b ef0ba7d0 ef0ba7b4 
NIP [c005eb78] lockdep_init_map+0x1e8/0x1f0
LR [c005eb78] lockdep_init_map+0x1e8/0x1f0
Call Trace:
[ef043e20] [c005eb78] lockdep_init_map+0x1e8/0x1f0 (unreliable)
[ef043e40] [c083adb4] kw_i2c_add+0xc0/0x134
[ef043e60] [c083b29c] pmac_i2c_init+0x3b8/0x518
[ef043ea0] [c00040c0] do_one_initcall+0x40/0x174
[ef043f00] [c0834064] kernel_init_freeable+0x134/0x1cc
[ef043f30] [c0004808] kernel_init+0x18/0x110
[ef043f40] [c0010ad8] ret_from_kernel_thread+0x5c/0x64
Instruction dump:
4837259d 2f83 41befec0 3d20c08b 812953a0 2f89 409efeb0 3c60c079 
3c80c07b 3884b48c 3863f9e4 4860d52d <0fe0> 4bfffe94 9421ff70 7c0802a6 
---[ end trace 8a79d8041d87d000 ]---


Full dmesg and .config: http://nerdbynature.de/bits/4.10-rc2/


Thanks for listening,
Christian.
-- 
BOFH excuse #409:

The vulcan-death-grip ping has been applied.

Re: [PATCH] powerpc: fix pgtable pmd cache init

[Aneesh Kumar K.V]

Nicholas Piggin  writes:

> Commit 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits")
> mixed up PMD_INDEX_SIZE and PMD_CACHE_INDEX a couple of times. This
> resulted in 64s/hash/4k configs to panic at boot with a false positive
> error check.
>
> Fix that and simplify error handling by moving the check to the caller.
>
> Fixes: 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits")
> Cc: Christophe Leroy 
> Cc: Aneesh Kumar K.V 
> Cc: Scott Wood 
> Cc: linuxppc-dev@lists.ozlabs.org
> Signed-off-by: Nicholas Piggin 

I did another fix here.

https://lkml.kernel.org/r/20161214043349.23677-1-aneesh.ku...@linux.vnet.ibm.com

But this patch makes it much simpler. Hence.

Reviewed-by: Aneesh Kumar K.V 

There is this hunk in the patch I did.

--- a/arch/powerpc/include/asm/book3s/64/hash.h
+++ b/arch/powerpc/include/asm/book3s/64/hash.h
@@ -33,9 +33,9 @@
 H_PUD_INDEX_SIZE + H_PGD_INDEX_SIZE + 
PAGE_SHIFT)
 #define H_PGTABLE_RANGE(ASM_CONST(1) << H_PGTABLE_EADDR_SIZE)

-#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+#if defined(CONFIG_TRANSPARENT_HUGEPAGE) &&  defined(CONFIG_PPC_64K_PAGES)
 /*
- * only with hash we need to use the second half of pmd page table
+ * only with hash 64k we need to use the second half of pmd page table
  * to store pointer to deposited pgtable_t
  */
 #define H_PMD_CACHE_INDEX  (H_PMD_INDEX_SIZE + 1)

> ---
>  arch/powerpc/mm/hugetlbpage.c |  6 +-
>  arch/powerpc/mm/init-common.c | 11 +++
>  2 files changed, 4 insertions(+), 13 deletions(-)
>
> diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
> index 289df38fb7e0..f21f6b907d99 100644
> --- a/arch/powerpc/mm/hugetlbpage.c
> +++ b/arch/powerpc/mm/hugetlbpage.c
> @@ -810,12 +810,8 @@ static int __init hugetlbpage_init(void)
>* if we have pdshift and shift value same, we don't
>* use pgt cache for hugepd.
>*/
> - if (pdshift > shift) {
> + if (pdshift > shift)
>   pgtable_cache_add(pdshift - shift, NULL);
> - if (!PGT_CACHE(pdshift - shift))
> - panic("hugetlbpage_init(): could not create "
> -   "pgtable cache for %d bit pagesize\n", 
> shift);
> - }
>  #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
>   else if (!hugepte_cache) {
>   /*
> diff --git a/arch/powerpc/mm/init-common.c b/arch/powerpc/mm/init-common.c
> index a175cd82ae8c..1a3be5ae1d07 100644
> --- a/arch/powerpc/mm/init-common.c
> +++ b/arch/powerpc/mm/init-common.c
> @@ -80,6 +80,8 @@ void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
>   new = kmem_cache_create(name, table_size, align, 0, ctor);
>   kfree(name);
>   pgtable_cache[shift - 1] = new;
> + if (!new)
> + panic("Could not allocate pgtable cache for order %d", shift);
>   pr_debug("Allocated pgtable cache for order %d\n", shift);
>  }
>
> @@ -88,7 +90,7 @@ void pgtable_cache_init(void)
>  {
>   pgtable_cache_add(PGD_INDEX_SIZE, pgd_ctor);
>
> - if (PMD_INDEX_SIZE && !PGT_CACHE(PMD_INDEX_SIZE))
> + if (PMD_CACHE_INDEX && !PGT_CACHE(PMD_CACHE_INDEX))
>   pgtable_cache_add(PMD_CACHE_INDEX, pmd_ctor);
>   /*
>* In all current configs, when the PUD index exists it's the
> @@ -97,11 +99,4 @@ void pgtable_cache_init(void)
>*/
>   if (PUD_INDEX_SIZE && !PGT_CACHE(PUD_INDEX_SIZE))
>   pgtable_cache_add(PUD_INDEX_SIZE, pud_ctor);
> -
> - if (!PGT_CACHE(PGD_INDEX_SIZE))
> - panic("Couldn't allocate pgd cache");
> - if (PMD_INDEX_SIZE && !PGT_CACHE(PMD_INDEX_SIZE))
> - panic("Couldn't allocate pmd pgtable caches");
> - if (PUD_INDEX_SIZE && !PGT_CACHE(PUD_INDEX_SIZE))
> - panic("Couldn't allocate pud pgtable caches");
>  }
> -- 
> 2.11.0

[PATCH net-next 1/6] net/skbuff: add macros for VLAN_PRESENT bit

[Michał Mirosław]

Signed-off-by: Michał Mirosław 
---
 include/linux/skbuff.h | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index b53c0cfd417e..168c3e486bd4 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -768,6 +768,12 @@ struct sk_buff {
__u32   priority;
int skb_iif;
__u32   hash;
+#define PKT_VLAN_PRESENT_BIT   4   // CFI (12-th bit) in TCI
+#ifdef __BIG_ENDIAN
+#define PKT_VLAN_PRESENT_OFFSET()  offsetof(struct sk_buff, vlan_tci)
+#else
+#define PKT_VLAN_PRESENT_OFFSET()  (offsetof(struct sk_buff, vlan_tci) + 1)
+#endif
__be16  vlan_proto;
__u16   vlan_tci;
 #if defined(CONFIG_NET_RX_BUSY_POLL) || defined(CONFIG_XPS)
-- 
2.11.0

[PATCH net-next 4/6] net/bpf_jit: PPC: split VLAN_PRESENT bit handling from VLAN_TCI

[Michał Mirosław]

Signed-off-by: Michał Mirosław 
---
 arch/powerpc/net/bpf_jit_comp.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
index 7e706f36e364..22ae63fb9b7d 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -377,18 +377,19 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 
*image,
  hash));
break;
case BPF_ANC | SKF_AD_VLAN_TAG:
-   case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 
2);
-   BUILD_BUG_ON(VLAN_TAG_PRESENT != 0x1000);
 
PPC_LHZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
  vlan_tci));
-   if (code == (BPF_ANC | SKF_AD_VLAN_TAG)) {
-   PPC_ANDI(r_A, r_A, ~VLAN_TAG_PRESENT);
-   } else {
-   PPC_ANDI(r_A, r_A, VLAN_TAG_PRESENT);
-   PPC_SRWI(r_A, r_A, 12);
-   }
+#ifdef VLAN_TAG_PRESENT
+   PPC_ANDI(r_A, r_A, ~VLAN_TAG_PRESENT);
+#endif
+   break;
+   case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
+   PPC_LBZ_OFFS(r_A, r_skb, PKT_VLAN_PRESENT_OFFSET());
+   if (PKT_VLAN_PRESENT_BIT)
+   PPC_SRWI(r_A, r_A, PKT_VLAN_PRESENT_BIT);
+   PPC_ANDI(r_A, r_A, 1);
break;
case BPF_ANC | SKF_AD_QUEUE:
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
-- 
2.11.0

Re: [PATCH] powerpc/mm/hugetlb: Don't panic if we don't find the default huge page size

[Michael Neuling]

On Tue, 2016-12-13 at 19:34 +0530, Aneesh Kumar K.V wrote:
> generic hugetlbfs can handle that condition correctly. With HPAGE_SHIFT = 0
> we get
> [0.241333] hugetlbfs: disabling because there are no supported hugepage sizes
> 
> bash-4.2# echo 30 > /proc/sys/vm/nr_hugepages
> bash: echo: write error: Operation not supported
> 
> Fixes: "powerpc: get hugetlbpage handling more generic"
> Reported-by: Chris Smart 
> Signed-off-by: Aneesh Kumar K.V 

Acked-By: Michael Neuling 

> ---
>  arch/powerpc/mm/hugetlbpage.c | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
> index 289df38fb7e0..e46bbd716832 100644
> --- a/arch/powerpc/mm/hugetlbpage.c
> +++ b/arch/powerpc/mm/hugetlbpage.c
> @@ -852,9 +852,6 @@ static int __init hugetlbpage_init(void)
>   else if (mmu_psize_defs[MMU_PAGE_2M].shift)
>   HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_2M].shift;
>  #endif
> - else
> - panic("%s: Unable to set default huge page size\n",
> __func__);
> -
>   return 0;
>  }
>  

Re: bootx_init.c:88: undefined reference to `__stack_chk_fail_local'

[Christian Kujau]

On Wed, 4 Jan 2017, Benjamin Herrenschmidt wrote:
> On Tue, 2017-01-03 at 07:25 -0800, Christian Kujau wrote:
> > Hi,
> > 
> > when compiling v4.10-rc2 with CONFIG_CC_STACKPROTECTOR_STRONG=y, the 
> > linker fails with:
> 
> The way gcc implements the stack protector has some serious
> incompatibilities with the way the Linux kernel uses r13, I wouldn't
> even try until we sort that out...

Yeah, I noticed. While _compilation_ succeeded with 
CONFIG_CC_STACKPROTECTOR_REGULAR=y, the kernel panicked during boot with:

Kernel panic - not syning: stack-protector: Kernel stack is corrupted in: 
c0103894
CPU: 0 PID: 586 Comm: systemd Tainted: G  W 4.10.0-rc2 #3
Call Trace:
[ee949ca0] [c067d6cc] panic+0x114/0x268 (unreliable)
[ee949d00] [c002be80] print_tainted+0x0/0xcc
[ee949d10] [c0103894] path_openat+0x1014/0x1050
[ee949df0] [c01048dc] do_filp_open+0xac/0xfc
[ee949ea0] [c00f994c] do_open_execat+0x64/0x1bc
[ee949ee0] [c00fb0f8] do_execveat_common+0x24c/0x774
[ee949f30] [c00fb650] do_execve+0x30/0x40
[ee949f40] [c0010db0] ret_from_syscall+0x0/0x38
--- interrupt: c01 at 0x20403618
LR = 0x204037ac


(written down manually, hopefully w/o typos).

I'll disable the stack protector on this powerpc (G4) machine for now.

Thanks,
Christian.

> 
> Cheers,
> Ben.
> > 
> > 
> > + ld -EB -m elf32ppc -Bstatic --build-id -X -o .tmp_vmlinux1 -T 
> > ./arch/powerpc/kernel/vmlinux.lds arch/powerpc/kernel/head_32.o 
> > arch/powerpc/kernel/fpu.o arch/powerpc/kernel/vector.o 
> > arch/powerpc/kernel/prom_init.o init/built-in.o --start-group 
> > usr/built-in.o arch/powerpc/kernel/built-in.o arch/powerpc/mm/built-
> > in.o 
> > arch/powerpc/lib/built-in.o arch/powerpc/sysdev/built-in.o 
> > arch/powerpc/platforms/built-in.o arch/powerpc/math-emu/built-in.o 
> > arch/powerpc/crypto/built-in.o arch/powerpc/net/built-in.o 
> > kernel/built-in.o certs/built-in.o mm/built-in.o fs/built-in.o 
> > ipc/built-in.o security/built-in.o crypto/built-in.o block/built-
> > in.o 
> > lib/lib.a lib/built-in.o drivers/built-in.o sound/built-in.o 
> > firmware/built-in.o net/built-in.o virt/built-in.o --end-group
> > arch/powerpc/platforms/built-in.o: In function `bootx_printf':
> > /usr/local/src/linux-
> > git/arch/powerpc/platforms/powermac/bootx_init.c:88: undefined
> > reference to `__stack_chk_fail_local'
> > arch/powerpc/platforms/built-in.o: In function
> > `bootx_add_display_props':
> > /usr/local/src/linux-
> > git/arch/powerpc/platforms/powermac/bootx_init.c:211: undefined
> > reference to `__stack_chk_fail_local'
> > arch/powerpc/platforms/built-in.o: In function 
> > `bootx_scan_dt_build_struct':
> > /usr/local/src/linux-
> > git/arch/powerpc/platforms/powermac/bootx_init.c:350: undefined
> > reference to `__stack_chk_fail_local'
> > arch/powerpc/platforms/built-in.o: In function `bootx_init':
> > /usr/local/src/linux-
> > git/arch/powerpc/platforms/powermac/bootx_init.c:596: undefined
> > reference to `__stack_chk_fail_local'
> > /usr/bin/ld.bfd.real: .tmp_vmlinux1: hidden symbol
> > `__stack_chk_fail_local' isn't defined
> > /usr/bin/ld.bfd.real: final link failed: Bad value
> > 
> > 
> > 
> > $ ld --version | head -1
> > GNU ld (GNU Binutils for Debian) 2.25
> > 
> > $ gcc --version | head -1
> > gcc-4.9.real (Debian 4.9.2-10) 4.9.2
> > 
> > 
> > I'm regularly compiling userspace programs with -fstack-protector
> > w/o 
> > problems. I suspect it's either
> > 6533b7c16ee5712041b4e324100550e02a9a5dda 
> > ("powerpc: Initial stack protector (-fstack-protector) support") or 
> > 902e06eb86cd62753974c249bd1dedae2825b430 ("powerpc/32: Change the
> > stack 
> > protector canary value per task") or both but I haven't started the 
> > bisection yet.
> > 
> > Any other ideas?
> > 
> > Thanks,
> > Christian.
> 
> 

-- 
BOFH excuse #111:

The salesman drove over the CPU board.

Re: bootx_init.c:88: undefined reference to `__stack_chk_fail_local'

[Benjamin Herrenschmidt]

On Tue, 2017-01-03 at 07:25 -0800, Christian Kujau wrote:
> Hi,
> 
> when compiling v4.10-rc2 with CONFIG_CC_STACKPROTECTOR_STRONG=y, the 
> linker fails with:

The way gcc implements the stack protector has some serious
incompatibilities with the way the Linux kernel uses r13, I wouldn't
even try until we sort that out...

Cheers,
Ben.
> 
> 
> + ld -EB -m elf32ppc -Bstatic --build-id -X -o .tmp_vmlinux1 -T 
> ./arch/powerpc/kernel/vmlinux.lds arch/powerpc/kernel/head_32.o 
> arch/powerpc/kernel/fpu.o arch/powerpc/kernel/vector.o 
> arch/powerpc/kernel/prom_init.o init/built-in.o --start-group 
> usr/built-in.o arch/powerpc/kernel/built-in.o arch/powerpc/mm/built-
> in.o 
> arch/powerpc/lib/built-in.o arch/powerpc/sysdev/built-in.o 
> arch/powerpc/platforms/built-in.o arch/powerpc/math-emu/built-in.o 
> arch/powerpc/crypto/built-in.o arch/powerpc/net/built-in.o 
> kernel/built-in.o certs/built-in.o mm/built-in.o fs/built-in.o 
> ipc/built-in.o security/built-in.o crypto/built-in.o block/built-
> in.o 
> lib/lib.a lib/built-in.o drivers/built-in.o sound/built-in.o 
> firmware/built-in.o net/built-in.o virt/built-in.o --end-group
> arch/powerpc/platforms/built-in.o: In function `bootx_printf':
> /usr/local/src/linux-
> git/arch/powerpc/platforms/powermac/bootx_init.c:88: undefined
> reference to `__stack_chk_fail_local'
> arch/powerpc/platforms/built-in.o: In function
> `bootx_add_display_props':
> /usr/local/src/linux-
> git/arch/powerpc/platforms/powermac/bootx_init.c:211: undefined
> reference to `__stack_chk_fail_local'
> arch/powerpc/platforms/built-in.o: In function 
> `bootx_scan_dt_build_struct':
> /usr/local/src/linux-
> git/arch/powerpc/platforms/powermac/bootx_init.c:350: undefined
> reference to `__stack_chk_fail_local'
> arch/powerpc/platforms/built-in.o: In function `bootx_init':
> /usr/local/src/linux-
> git/arch/powerpc/platforms/powermac/bootx_init.c:596: undefined
> reference to `__stack_chk_fail_local'
> /usr/bin/ld.bfd.real: .tmp_vmlinux1: hidden symbol
> `__stack_chk_fail_local' isn't defined
> /usr/bin/ld.bfd.real: final link failed: Bad value
> 
> 
> 
> $ ld --version | head -1
> GNU ld (GNU Binutils for Debian) 2.25
> 
> $ gcc --version | head -1
> gcc-4.9.real (Debian 4.9.2-10) 4.9.2
> 
> 
> I'm regularly compiling userspace programs with -fstack-protector
> w/o 
> problems. I suspect it's either
> 6533b7c16ee5712041b4e324100550e02a9a5dda 
> ("powerpc: Initial stack protector (-fstack-protector) support") or 
> 902e06eb86cd62753974c249bd1dedae2825b430 ("powerpc/32: Change the
> stack 
> protector canary value per task") or both but I haven't started the 
> bisection yet.
> 
> Any other ideas?
> 
> Thanks,
> Christian.

Re: [alsa-devel] [PATCH] fsl_ssi: set fifo watermark to more reliable value

[Fabio Estevam]

On Tue, Jan 3, 2017 at 4:22 PM, Caleb Crome  wrote:
> From: Caleb Crome 
>
> The fsl_ssi fifo watermark is by default set to 2 free spaces (i.e.
> activate DMA on FIFO when only 2 spaces are left.)  This means the
> DMA must service the fifo within 2 audio samples, which is just not
> enough time  for many use cases with high data rate.  In many
> configurations the audio channel slips (causing l/r swap in stereo
> configurations, or channel slipping in multi-channel configurations).
>
> This patch gives more breathing room and allows the SSI to operate
> reliably by changing the fifio refill watermark to 8.
>
> There is no change in behavior for older chips (with an 8-deep fifo).
> Only the newer chips with a 15-deep fifo get the new behavior. I
> suspect a new fifo depth setting could be optimized on the older
> chips too, but I have not tested.
>
> Signed-off-by: Caleb Crome 

Reviewed-by: Fabio Estevam 

[PATCH net-next v2 21/27] net/bpf_jit: PPC: split VLAN_PRESENT bit handling from VLAN_TCI

[Michał Mirosław]

Signed-off-by: Michał Mirosław 
---
 arch/powerpc/net/bpf_jit_comp.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
index 7e706f36e364..22ae63fb9b7d 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -377,18 +377,19 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 
*image,
  hash));
break;
case BPF_ANC | SKF_AD_VLAN_TAG:
-   case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 
2);
-   BUILD_BUG_ON(VLAN_TAG_PRESENT != 0x1000);
 
PPC_LHZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
  vlan_tci));
-   if (code == (BPF_ANC | SKF_AD_VLAN_TAG)) {
-   PPC_ANDI(r_A, r_A, ~VLAN_TAG_PRESENT);
-   } else {
-   PPC_ANDI(r_A, r_A, VLAN_TAG_PRESENT);
-   PPC_SRWI(r_A, r_A, 12);
-   }
+#ifdef VLAN_TAG_PRESENT
+   PPC_ANDI(r_A, r_A, ~VLAN_TAG_PRESENT);
+#endif
+   break;
+   case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
+   PPC_LBZ_OFFS(r_A, r_skb, PKT_VLAN_PRESENT_OFFSET());
+   if (PKT_VLAN_PRESENT_BIT)
+   PPC_SRWI(r_A, r_A, PKT_VLAN_PRESENT_BIT);
+   PPC_ANDI(r_A, r_A, 1);
break;
case BPF_ANC | SKF_AD_QUEUE:
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
-- 
2.11.0

[PATCH net-next v2 18/27] net/skbuff: add macros for VLAN_PRESENT bit

[Michał Mirosław]

Signed-off-by: Michał Mirosław 
---
 include/linux/skbuff.h | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index b53c0cfd417e..168c3e486bd4 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -768,6 +768,12 @@ struct sk_buff {
__u32   priority;
int skb_iif;
__u32   hash;
+#define PKT_VLAN_PRESENT_BIT   4   // CFI (12-th bit) in TCI
+#ifdef __BIG_ENDIAN
+#define PKT_VLAN_PRESENT_OFFSET()  offsetof(struct sk_buff, vlan_tci)
+#else
+#define PKT_VLAN_PRESENT_OFFSET()  (offsetof(struct sk_buff, vlan_tci) + 1)
+#endif
__be16  vlan_proto;
__u16   vlan_tci;
 #if defined(CONFIG_NET_RX_BUSY_POLL) || defined(CONFIG_XPS)
-- 
2.11.0

[PATCH] fsl_ssi: set fifo watermark to more reliable value

[Caleb Crome]

From: Caleb Crome 

The fsl_ssi fifo watermark is by default set to 2 free spaces (i.e.
activate DMA on FIFO when only 2 spaces are left.)  This means the
DMA must service the fifo within 2 audio samples, which is just not
enough time  for many use cases with high data rate.  In many
configurations the audio channel slips (causing l/r swap in stereo
configurations, or channel slipping in multi-channel configurations).

This patch gives more breathing room and allows the SSI to operate
reliably by changing the fifio refill watermark to 8.

There is no change in behavior for older chips (with an 8-deep fifo).
Only the newer chips with a 15-deep fifo get the new behavior. I
suspect a new fifo depth setting could be optimized on the older
chips too, but I have not tested.

Signed-off-by: Caleb Crome 
---
 sound/soc/fsl/fsl_ssi.c | 74 +++--
 1 file changed, 53 insertions(+), 21 deletions(-)

diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index bedec4a..56245e6 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -224,6 +224,12 @@ struct fsl_ssi_soc_data {
  * @dbg_stats: Debugging statistics
  *
  * @soc: SoC specific data
+ *
+ * @fifo_watermark: the FIFO watermark setting.  Notifies DMA when
+ * there are @fifo_watermark or fewer words in TX fifo or
+ * @fifo_watermark or more empty words in RX fifo.
+ * @dma_maxburst: max number of words to transfer in one go.  So far,
+ * this is always the same as fifo_watermark.
  */
 struct fsl_ssi_private {
struct regmap *regs;
@@ -263,6 +269,9 @@ struct fsl_ssi_private {
 
const struct fsl_ssi_soc_data *soc;
struct device *dev;
+
+   u32 fifo_watermark;
+   u32 dma_maxburst;
 };
 
 /*
@@ -1051,21 +1060,7 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev,
regmap_write(regs, CCSR_SSI_SRCR, srcr);
regmap_write(regs, CCSR_SSI_SCR, scr);
 
-   /*
-* Set the watermark for transmit FIFI 0 and receive FIFO 0. We don't
-* use FIFO 1. We program the transmit water to signal a DMA transfer
-* if there are only two (or fewer) elements left in the FIFO. Two
-* elements equals one frame (left channel, right channel). This value,
-* however, depends on the depth of the transmit buffer.
-*
-* We set the watermark on the same level as the DMA burstsize.  For
-* fiq it is probably better to use the biggest possible watermark
-* size.
-*/
-   if (ssi_private->use_dma)
-   wm = ssi_private->fifo_depth - 2;
-   else
-   wm = ssi_private->fifo_depth;
+   wm = ssi_private->fifo_watermark;
 
regmap_write(regs, CCSR_SSI_SFCSR,
CCSR_SSI_SFCSR_TFWM0(wm) | CCSR_SSI_SFCSR_RFWM0(wm) |
@@ -1373,12 +1368,8 @@ static int fsl_ssi_imx_probe(struct platform_device 
*pdev,
dev_dbg(>dev, "could not get baud clock: %ld\n",
 PTR_ERR(ssi_private->baudclk));
 
-   /*
-* We have burstsize be "fifo_depth - 2" to match the SSI
-* watermark setting in fsl_ssi_startup().
-*/
-   ssi_private->dma_params_tx.maxburst = ssi_private->fifo_depth - 2;
-   ssi_private->dma_params_rx.maxburst = ssi_private->fifo_depth - 2;
+   ssi_private->dma_params_tx.maxburst = ssi_private->dma_maxburst;
+   ssi_private->dma_params_rx.maxburst = ssi_private->dma_maxburst;
ssi_private->dma_params_tx.addr = ssi_private->ssi_phys + CCSR_SSI_STX0;
ssi_private->dma_params_rx.addr = ssi_private->ssi_phys + CCSR_SSI_SRX0;
 
@@ -1543,6 +1534,47 @@ static int fsl_ssi_probe(struct platform_device *pdev)
 /* Older 8610 DTs didn't have the fifo-depth property */
ssi_private->fifo_depth = 8;
 
+   /*
+* Set the watermark for transmit FIFO 0 and receive FIFO 0. We don't
+* use FIFO 1 but set the watermark appropriately nontheless.
+* We program the transmit water to signal a DMA transfer
+* if there are N elements left in the FIFO. For chips with 15-deep
+* FIFOs, set watermark to 8.  This allows the SSI to operate at a
+* high data rate without channel slipping. Behavior is unchanged
+* for the older chips with a fifo depth of only 8.  A value of 4
+* might be appropriate for the older chips, but is left at
+* fifo_depth-2 until sombody has a chance to test.
+*
+* We set the watermark on the same level as the DMA burstsize.  For
+* fiq it is probably better to use the biggest possible watermark
+* size.
+*/
+   switch (ssi_private->fifo_depth) {
+   case 15:
+   /*
+* 2 samples is not enough when running at high data
+* rates (like 48kHz @ 16 bits/channel, 16 channels)
+* 8 seems to split things 

[PATCH v4 4/4] powerpc/mm: unstub radix__vmemmap_remove_mapping()

[Reza Arbab]

Use remove_pagetable() and friends for radix vmemmap removal.

We do not require the special-case handling of vmemmap done in the x86
versions of these functions. This is because vmemmap_free() has already
freed the mapped pages, and calls us with an aligned address range.

So, add a few failsafe WARNs, but otherwise the code to remove physical
mappings is already sufficient for vmemmap.

Signed-off-by: Reza Arbab 
---
 arch/powerpc/mm/pgtable-radix.c | 29 -
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index f7a8e625..bada0d9 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -517,6 +517,15 @@ static void remove_pte_table(pte_t *pte_start, unsigned 
long addr,
if (!pte_present(*pte))
continue;
 
+   if (!PAGE_ALIGNED(addr) || !PAGE_ALIGNED(next)) {
+   /*
+* The vmemmap_free() and remove_section_mapping()
+* codepaths call us with aligned addresses.
+*/
+   WARN_ONCE(1, "%s: unaligned range\n", __func__);
+   continue;
+   }
+
pte_clear(_mm, addr, pte);
}
 }
@@ -536,6 +545,12 @@ static void remove_pmd_table(pmd_t *pmd_start, unsigned 
long addr,
continue;
 
if (pmd_huge(*pmd)) {
+   if (!IS_ALIGNED(addr, PMD_SIZE) ||
+   !IS_ALIGNED(next, PMD_SIZE)) {
+   WARN_ONCE(1, "%s: unaligned range\n", __func__);
+   continue;
+   }
+
pte_clear(_mm, addr, (pte_t *)pmd);
continue;
}
@@ -561,6 +576,12 @@ static void remove_pud_table(pud_t *pud_start, unsigned 
long addr,
continue;
 
if (pud_huge(*pud)) {
+   if (!IS_ALIGNED(addr, PUD_SIZE) ||
+   !IS_ALIGNED(next, PUD_SIZE)) {
+   WARN_ONCE(1, "%s: unaligned range\n", __func__);
+   continue;
+   }
+
pte_clear(_mm, addr, (pte_t *)pud);
continue;
}
@@ -587,6 +608,12 @@ static void remove_pagetable(unsigned long start, unsigned 
long end)
continue;
 
if (pgd_huge(*pgd)) {
+   if (!IS_ALIGNED(addr, PGDIR_SIZE) ||
+   !IS_ALIGNED(next, PGDIR_SIZE)) {
+   WARN_ONCE(1, "%s: unaligned range\n", __func__);
+   continue;
+   }
+
pte_clear(_mm, addr, (pte_t *)pgd);
continue;
}
@@ -627,7 +654,7 @@ int __meminit radix__vmemmap_create_mapping(unsigned long 
start,
 #ifdef CONFIG_MEMORY_HOTPLUG
 void radix__vmemmap_remove_mapping(unsigned long start, unsigned long 
page_size)
 {
-   /* FIXME!! intel does more. We should free page tables mapping vmemmap 
? */
+   remove_pagetable(start, start + page_size);
 }
 #endif
 #endif
-- 
1.8.3.1

[PATCH v4 1/4] powerpc/mm: refactor radix physical page mapping

[Reza Arbab]

Move the page mapping code in radix_init_pgtable() into a separate
function that will also be used for memory hotplug.

The current goto loop progressively decreases its mapping size as it
covers the tail of a range whose end is unaligned. Change this to a for
loop which can do the same for both ends of the range.

Signed-off-by: Reza Arbab 
---
 arch/powerpc/mm/pgtable-radix.c | 69 ++---
 1 file changed, 31 insertions(+), 38 deletions(-)

diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index 623a0dc..5cee6d1 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -107,54 +107,47 @@ int radix__map_kernel_page(unsigned long ea, unsigned 
long pa,
return 0;
 }
 
+static int __meminit create_physical_mapping(unsigned long start,
+unsigned long end)
+{
+   unsigned long mapping_size;
+
+   start = _ALIGN_UP(start, PAGE_SIZE);
+   for (; start < end; start += mapping_size) {
+   unsigned long gap = end - start;
+   int rc;
+
+   if (IS_ALIGNED(start, PUD_SIZE) && gap >= PUD_SIZE &&
+   mmu_psize_defs[MMU_PAGE_1G].shift)
+   mapping_size = PUD_SIZE;
+   else if (IS_ALIGNED(start, PMD_SIZE) && gap >= PMD_SIZE &&
+mmu_psize_defs[MMU_PAGE_2M].shift)
+   mapping_size = PMD_SIZE;
+   else
+   mapping_size = PAGE_SIZE;
+
+   rc = radix__map_kernel_page((unsigned long)__va(start), start,
+   PAGE_KERNEL_X, mapping_size);
+   if (rc)
+   return rc;
+   }
+
+   return 0;
+}
+
 static void __init radix_init_pgtable(void)
 {
-   int loop_count;
-   u64 base, end, start_addr;
unsigned long rts_field;
struct memblock_region *reg;
-   unsigned long linear_page_size;
 
/* We don't support slb for radix */
mmu_slb_size = 0;
/*
 * Create the linear mapping, using standard page size for now
 */
-   loop_count = 0;
-   for_each_memblock(memory, reg) {
-
-   start_addr = reg->base;
-
-redo:
-   if (loop_count < 1 && mmu_psize_defs[MMU_PAGE_1G].shift)
-   linear_page_size = PUD_SIZE;
-   else if (loop_count < 2 && mmu_psize_defs[MMU_PAGE_2M].shift)
-   linear_page_size = PMD_SIZE;
-   else
-   linear_page_size = PAGE_SIZE;
-
-   base = _ALIGN_UP(start_addr, linear_page_size);
-   end = _ALIGN_DOWN(reg->base + reg->size, linear_page_size);
-
-   pr_info("Mapping range 0x%lx - 0x%lx with 0x%lx\n",
-   (unsigned long)base, (unsigned long)end,
-   linear_page_size);
-
-   while (base < end) {
-   radix__map_kernel_page((unsigned long)__va(base),
- base, PAGE_KERNEL_X,
- linear_page_size);
-   base += linear_page_size;
-   }
-   /*
-* map the rest using lower page size
-*/
-   if (end < reg->base + reg->size) {
-   start_addr = end;
-   loop_count++;
-   goto redo;
-   }
-   }
+   for_each_memblock(memory, reg)
+   WARN_ON(create_physical_mapping(reg->base,
+   reg->base + reg->size));
/*
 * Allocate Partition table and process table for the
 * host.
-- 
1.8.3.1

[PATCH v4 0/4] powerpc/mm: enable memory hotplug on radix

[Reza Arbab]

Do the plumbing needed for memory hotplug on systems using radix pagetables,
borrowing from existing vmemmap and x86 code.

This passes basic verification of plugging and removing memory, but this 
stuff is tricky and I'd appreciate extra scrutiny of the series for 
correctness--in particular, the adaptation of remove_pagetable() from x86.

/* changelog */

v4:
* Sent patch 1 as a standalone fix. This set still depends on it:
  
https://lkml.kernel.org/r/1483475991-16999-1-git-send-email-ar...@linux.vnet.ibm.com

* Extract a common function that can be used by both radix_init_pgtable() and
  radix__create_section_mapping().

* Reduce tlb flushing to one flush_tlb_kernel_range() per section, and do
  less granular locking of init_mm->page_table_lock.

v3:
* 
https://lkml.kernel.org/r/1481831443-22761-1-git-send-email-ar...@linux.vnet.ibm.com

* Port remove_pagetable() et al. from x86 for unmapping.

* [RFC] -> [PATCH]

v2:
* 
https://lkml.kernel.org/r/1471449083-15931-1-git-send-email-ar...@linux.vnet.ibm.com

* Do not simply fall through to vmemmap_{create,remove}_mapping(). As Aneesh
  and Michael pointed out, they are tied to CONFIG_SPARSEMEM_VMEMMAP and only
  did what I needed by luck anyway.

v1:
* 
https://lkml.kernel.org/r/1466699962-22412-1-git-send-email-ar...@linux.vnet.ibm.com

Reza Arbab (4):
  powerpc/mm: refactor radix physical page mapping
  powerpc/mm: add radix__create_section_mapping()
  powerpc/mm: add radix__remove_section_mapping()
  powerpc/mm: unstub radix__vmemmap_remove_mapping()

 arch/powerpc/include/asm/book3s/64/radix.h |   5 +
 arch/powerpc/mm/pgtable-book3s64.c |   4 +-
 arch/powerpc/mm/pgtable-radix.c| 254 -
 3 files changed, 222 insertions(+), 41 deletions(-)

-- 
1.8.3.1

[PATCH v4 3/4] powerpc/mm: add radix__remove_section_mapping()

[Reza Arbab]

Tear down and free the four-level page tables of physical mappings
during memory hotremove.

Borrow the basic structure of remove_pagetable() and friends from the
identically-named x86 functions. Simplify things a bit so locking and
tlb flushing are only done in the outermost function.

Memory must be offline to be removed, thus not in use. So there
shouldn't be the sort of concurrent page walking activity here that
might prompt us to use RCU.

Signed-off-by: Reza Arbab 
---
 arch/powerpc/include/asm/book3s/64/radix.h |   1 +
 arch/powerpc/mm/pgtable-book3s64.c |   2 +-
 arch/powerpc/mm/pgtable-radix.c| 149 +
 3 files changed, 151 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/book3s/64/radix.h 
b/arch/powerpc/include/asm/book3s/64/radix.h
index 43c2571..0032b66 100644
--- a/arch/powerpc/include/asm/book3s/64/radix.h
+++ b/arch/powerpc/include/asm/book3s/64/radix.h
@@ -294,6 +294,7 @@ static inline unsigned long radix__get_tree_size(void)
 
 #ifdef CONFIG_MEMORY_HOTPLUG
 int radix__create_section_mapping(unsigned long start, unsigned long end);
+int radix__remove_section_mapping(unsigned long start, unsigned long end);
 #endif /* CONFIG_MEMORY_HOTPLUG */
 #endif /* __ASSEMBLY__ */
 #endif
diff --git a/arch/powerpc/mm/pgtable-book3s64.c 
b/arch/powerpc/mm/pgtable-book3s64.c
index 2b13f6b..b798ff6 100644
--- a/arch/powerpc/mm/pgtable-book3s64.c
+++ b/arch/powerpc/mm/pgtable-book3s64.c
@@ -139,7 +139,7 @@ int create_section_mapping(unsigned long start, unsigned 
long end)
 int remove_section_mapping(unsigned long start, unsigned long end)
 {
if (radix_enabled())
-   return -ENODEV;
+   return radix__remove_section_mapping(start, end);
 
return hash__remove_section_mapping(start, end);
 }
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index 3588895..f7a8e625 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -457,10 +457,159 @@ void radix__setup_initial_memory_limit(phys_addr_t 
first_memblock_base,
 }
 
 #ifdef CONFIG_MEMORY_HOTPLUG
+static void free_pte_table(pte_t *pte_start, pmd_t *pmd)
+{
+   pte_t *pte;
+   int i;
+
+   for (i = 0; i < PTRS_PER_PTE; i++) {
+   pte = pte_start + i;
+   if (!pte_none(*pte))
+   return;
+   }
+
+   pte_free_kernel(_mm, pte_start);
+   pmd_clear(pmd);
+}
+
+static void free_pmd_table(pmd_t *pmd_start, pud_t *pud)
+{
+   pmd_t *pmd;
+   int i;
+
+   for (i = 0; i < PTRS_PER_PMD; i++) {
+   pmd = pmd_start + i;
+   if (!pmd_none(*pmd))
+   return;
+   }
+
+   pmd_free(_mm, pmd_start);
+   pud_clear(pud);
+}
+
+static void free_pud_table(pud_t *pud_start, pgd_t *pgd)
+{
+   pud_t *pud;
+   int i;
+
+   for (i = 0; i < PTRS_PER_PUD; i++) {
+   pud = pud_start + i;
+   if (!pud_none(*pud))
+   return;
+   }
+
+   pud_free(_mm, pud_start);
+   pgd_clear(pgd);
+}
+
+static void remove_pte_table(pte_t *pte_start, unsigned long addr,
+unsigned long end)
+{
+   unsigned long next;
+   pte_t *pte;
+
+   pte = pte_start + pte_index(addr);
+   for (; addr < end; addr = next, pte++) {
+   next = (addr + PAGE_SIZE) & PAGE_MASK;
+   if (next > end)
+   next = end;
+
+   if (!pte_present(*pte))
+   continue;
+
+   pte_clear(_mm, addr, pte);
+   }
+}
+
+static void remove_pmd_table(pmd_t *pmd_start, unsigned long addr,
+unsigned long end)
+{
+   unsigned long next;
+   pte_t *pte_base;
+   pmd_t *pmd;
+
+   pmd = pmd_start + pmd_index(addr);
+   for (; addr < end; addr = next, pmd++) {
+   next = pmd_addr_end(addr, end);
+
+   if (!pmd_present(*pmd))
+   continue;
+
+   if (pmd_huge(*pmd)) {
+   pte_clear(_mm, addr, (pte_t *)pmd);
+   continue;
+   }
+
+   pte_base = (pte_t *)pmd_page_vaddr(*pmd);
+   remove_pte_table(pte_base, addr, next);
+   free_pte_table(pte_base, pmd);
+   }
+}
+
+static void remove_pud_table(pud_t *pud_start, unsigned long addr,
+unsigned long end)
+{
+   unsigned long next;
+   pmd_t *pmd_base;
+   pud_t *pud;
+
+   pud = pud_start + pud_index(addr);
+   for (; addr < end; addr = next, pud++) {
+   next = pud_addr_end(addr, end);
+
+   if (!pud_present(*pud))
+   continue;
+
+   if (pud_huge(*pud)) {
+   pte_clear(_mm, addr, (pte_t *)pud);
+   continue;
+   }
+
+   pmd_base = 

[PATCH v4 2/4] powerpc/mm: add radix__create_section_mapping()

[Reza Arbab]

Wire up memory hotplug page mapping for radix. Share the mapping
function already used by radix_init_pgtable().

Signed-off-by: Reza Arbab 
---
 arch/powerpc/include/asm/book3s/64/radix.h | 4 
 arch/powerpc/mm/pgtable-book3s64.c | 2 +-
 arch/powerpc/mm/pgtable-radix.c| 7 +++
 3 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/book3s/64/radix.h 
b/arch/powerpc/include/asm/book3s/64/radix.h
index b4d1302..43c2571 100644
--- a/arch/powerpc/include/asm/book3s/64/radix.h
+++ b/arch/powerpc/include/asm/book3s/64/radix.h
@@ -291,5 +291,9 @@ static inline unsigned long radix__get_tree_size(void)
}
return rts_field;
 }
+
+#ifdef CONFIG_MEMORY_HOTPLUG
+int radix__create_section_mapping(unsigned long start, unsigned long end);
+#endif /* CONFIG_MEMORY_HOTPLUG */
 #endif /* __ASSEMBLY__ */
 #endif
diff --git a/arch/powerpc/mm/pgtable-book3s64.c 
b/arch/powerpc/mm/pgtable-book3s64.c
index 653ff6c..2b13f6b 100644
--- a/arch/powerpc/mm/pgtable-book3s64.c
+++ b/arch/powerpc/mm/pgtable-book3s64.c
@@ -131,7 +131,7 @@ void mmu_cleanup_all(void)
 int create_section_mapping(unsigned long start, unsigned long end)
 {
if (radix_enabled())
-   return -ENODEV;
+   return radix__create_section_mapping(start, end);
 
return hash__create_section_mapping(start, end);
 }
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index 5cee6d1..3588895 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -456,6 +456,13 @@ void radix__setup_initial_memory_limit(phys_addr_t 
first_memblock_base,
memblock_set_current_limit(first_memblock_base + first_memblock_size);
 }
 
+#ifdef CONFIG_MEMORY_HOTPLUG
+int __ref radix__create_section_mapping(unsigned long start, unsigned long end)
+{
+   return create_physical_mapping(start, end);
+}
+#endif /* CONFIG_MEMORY_HOTPLUG */
+
 #ifdef CONFIG_SPARSEMEM_VMEMMAP
 int __meminit radix__vmemmap_create_mapping(unsigned long start,
  unsigned long page_size,
-- 
1.8.3.1

[PATCH] powerpc/mm: fix memory hotplug BUG() on radix

[Reza Arbab]

Memory hotplug is leading to hash page table calls, even on radix:

...
arch_add_memory
create_section_mapping
htab_bolt_mapping
BUG_ON(!ppc_md.hpte_insert);

To fix, refactor {create,remove}_section_mapping() into hash__ and
radix__ variants. Leave the radix versions stubbed for now.

Reviewed-by: Aneesh Kumar K.V 
Acked-by: Balbir Singh 
Signed-off-by: Reza Arbab 
---
It was suggested that this fix be separated from the rest of the
set which implements the radix page mapping/unmapping.

 arch/powerpc/include/asm/book3s/64/hash.h |  5 +
 arch/powerpc/mm/hash_utils_64.c   |  4 ++--
 arch/powerpc/mm/pgtable-book3s64.c| 18 ++
 3 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/book3s/64/hash.h 
b/arch/powerpc/include/asm/book3s/64/hash.h
index f61cad3..dd90574 100644
--- a/arch/powerpc/include/asm/book3s/64/hash.h
+++ b/arch/powerpc/include/asm/book3s/64/hash.h
@@ -201,6 +201,11 @@ extern int __meminit hash__vmemmap_create_mapping(unsigned 
long start,
  unsigned long phys);
 extern void hash__vmemmap_remove_mapping(unsigned long start,
 unsigned long page_size);
+
+#ifdef CONFIG_MEMORY_HOTPLUG
+int hash__create_section_mapping(unsigned long start, unsigned long end);
+int hash__remove_section_mapping(unsigned long start, unsigned long end);
+#endif /* CONFIG_MEMORY_HOTPLUG */
 #endif /* !__ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_BOOK3S_64_HASH_H */
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index b9a062f..96a4fb7 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -743,7 +743,7 @@ static unsigned long __init htab_get_table_size(void)
 }
 
 #ifdef CONFIG_MEMORY_HOTPLUG
-int create_section_mapping(unsigned long start, unsigned long end)
+int hash__create_section_mapping(unsigned long start, unsigned long end)
 {
int rc = htab_bolt_mapping(start, end, __pa(start),
   pgprot_val(PAGE_KERNEL), mmu_linear_psize,
@@ -757,7 +757,7 @@ int create_section_mapping(unsigned long start, unsigned 
long end)
return rc;
 }
 
-int remove_section_mapping(unsigned long start, unsigned long end)
+int hash__remove_section_mapping(unsigned long start, unsigned long end)
 {
int rc = htab_remove_mapping(start, end, mmu_linear_psize,
 mmu_kernel_ssize);
diff --git a/arch/powerpc/mm/pgtable-book3s64.c 
b/arch/powerpc/mm/pgtable-book3s64.c
index ebf9782..653ff6c 100644
--- a/arch/powerpc/mm/pgtable-book3s64.c
+++ b/arch/powerpc/mm/pgtable-book3s64.c
@@ -126,3 +126,21 @@ void mmu_cleanup_all(void)
else if (mmu_hash_ops.hpte_clear_all)
mmu_hash_ops.hpte_clear_all();
 }
+
+#ifdef CONFIG_MEMORY_HOTPLUG
+int create_section_mapping(unsigned long start, unsigned long end)
+{
+   if (radix_enabled())
+   return -ENODEV;
+
+   return hash__create_section_mapping(start, end);
+}
+
+int remove_section_mapping(unsigned long start, unsigned long end)
+{
+   if (radix_enabled())
+   return -ENODEV;
+
+   return hash__remove_section_mapping(start, end);
+}
+#endif /* CONFIG_MEMORY_HOTPLUG */
-- 
1.8.3.1

Re: bootx_init.c:88: undefined reference to `__stack_chk_fail_local'

[Christian Kujau]

On Tue, 3 Jan 2017, Christian Kujau wrote:
> when compiling v4.10-rc2 with CONFIG_CC_STACKPROTECTOR_STRONG=y, the 
> linker fails with:

FWIW, compiling with CONFIG_CC_STACKPROTECTOR_REGULAR=y instead works 
just fine.

C.

> 
> 
> + ld -EB -m elf32ppc -Bstatic --build-id -X -o .tmp_vmlinux1 -T 
> ./arch/powerpc/kernel/vmlinux.lds arch/powerpc/kernel/head_32.o 
> arch/powerpc/kernel/fpu.o arch/powerpc/kernel/vector.o 
> arch/powerpc/kernel/prom_init.o init/built-in.o --start-group 
> usr/built-in.o arch/powerpc/kernel/built-in.o arch/powerpc/mm/built-in.o 
> arch/powerpc/lib/built-in.o arch/powerpc/sysdev/built-in.o 
> arch/powerpc/platforms/built-in.o arch/powerpc/math-emu/built-in.o 
> arch/powerpc/crypto/built-in.o arch/powerpc/net/built-in.o 
> kernel/built-in.o certs/built-in.o mm/built-in.o fs/built-in.o 
> ipc/built-in.o security/built-in.o crypto/built-in.o block/built-in.o 
> lib/lib.a lib/built-in.o drivers/built-in.o sound/built-in.o 
> firmware/built-in.o net/built-in.o virt/built-in.o --end-group
> arch/powerpc/platforms/built-in.o: In function `bootx_printf':
> /usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:88: 
> undefined reference to `__stack_chk_fail_local'
> arch/powerpc/platforms/built-in.o: In function `bootx_add_display_props':
> /usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:211: 
> undefined reference to `__stack_chk_fail_local'
> arch/powerpc/platforms/built-in.o: In function 
> `bootx_scan_dt_build_struct':
> /usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:350: 
> undefined reference to `__stack_chk_fail_local'
> arch/powerpc/platforms/built-in.o: In function `bootx_init':
> /usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:596: 
> undefined reference to `__stack_chk_fail_local'
> /usr/bin/ld.bfd.real: .tmp_vmlinux1: hidden symbol `__stack_chk_fail_local' 
> isn't defined
> /usr/bin/ld.bfd.real: final link failed: Bad value
> 
> 
> 
> $ ld --version | head -1
> GNU ld (GNU Binutils for Debian) 2.25
> 
> $ gcc --version | head -1
> gcc-4.9.real (Debian 4.9.2-10) 4.9.2
> 
> 
> I'm regularly compiling userspace programs with -fstack-protector w/o 
> problems. I suspect it's either 6533b7c16ee5712041b4e324100550e02a9a5dda 
> ("powerpc: Initial stack protector (-fstack-protector) support") or 
> 902e06eb86cd62753974c249bd1dedae2825b430 ("powerpc/32: Change the stack 
> protector canary value per task") or both but I haven't started the 
> bisection yet.
> 
> Any other ideas?
> 
> Thanks,
> Christian.
> -- 
> BOFH excuse #220:
> 
> Someone thought The Big Red Button was a light switch.
> 

-- 
BOFH excuse #413:

Cow-tippers tipped a cow onto the server.

[PATCH] powerpc: implement clear_bit_unlock_is_negative_byte()

[Nicholas Piggin]

Commit b91e1302ad9b8 ("mm: optimize PageWaiters bit use for
unlock_page()") added a special bitop function to speed up
unlock_page(). Implement this for powerpc.

This improves the unlock_page() core code from this:

li  9,1
lwsync
1:  ldarx   10,0,3,0
andc10,10,9
stdcx.  10,0,3
bne-1b
ori 2,2,0
ld  9,0(3)
andi.   10,9,0x80
beqlr
li  4,0
b   wake_up_page_bit

To this:

li  10,1
lwsync
1:  ldarx   9,0,3,0
andc9,9,10
stdcx.  9,0,3
bne-1b
andi.   10,9,0x80
beqlr
li  4,0
b   wake_up_page_bit

In a test of elapsed time for dd writing into 16GB of already-dirty
pagecache on a POWER8 with 4K pages, which has one unlock_page per 4kB
this patch reduced overhead by 1.1%:

N   Min   MaxMedian   AvgStddev
x  19 2.578 2.619 2.594 2.595 0.011
+  19 2.552 2.592 2.564 2.565 0.008
Difference at 95.0% confidence
-0.030  +/- 0.006
-1.142% +/- 0.243%

Signed-off-by: Nicholas Piggin 
---
 arch/powerpc/include/asm/bitops.h | 25 +
 1 file changed, 25 insertions(+)

diff --git a/arch/powerpc/include/asm/bitops.h 
b/arch/powerpc/include/asm/bitops.h
index 59abc620f8e8..9add12ee13dd 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -154,6 +154,31 @@ static __inline__ int test_and_change_bit(unsigned long nr,
return test_and_change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
 }
 
+static __inline__ unsigned long clear_bit_unlock_return_word(int nr,
+   volatile unsigned long *addr)
+{
+   unsigned long old, t;
+   unsigned long *p = (unsigned long *)addr + BIT_WORD(nr);
+   unsigned long mask = BIT_MASK(nr);
+
+   __asm__ __volatile__ (
+   PPC_RELEASE_BARRIER
+"1:"   PPC_LLARX(%0,0,%3,0) "\n"
+   "andc %1,%0,%2\n"
+   PPC405_ERR77(0,%3)
+   PPC_STLCX "%1,0,%3\n"
+   "bne- 1b\n"
+   : "=" (old), "=" (t)
+   : "r" (mask), "r" (p)
+   : "cc", "memory");
+
+   return old;
+}
+
+/* This is a special function for mm/filemap.c */
+#define clear_bit_unlock_is_negative_byte(nr, addr)\
+   (clear_bit_unlock_return_word(nr, addr) & BIT_MASK(PG_waiters))
+
 #include 
 
 static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr)
-- 
2.11.0

[PATCH] powerpc: fix pgtable pmd cache init

[Nicholas Piggin]

Commit 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits")
mixed up PMD_INDEX_SIZE and PMD_CACHE_INDEX a couple of times. This
resulted in 64s/hash/4k configs to panic at boot with a false positive
error check.

Fix that and simplify error handling by moving the check to the caller.

Fixes: 9b081e10805cd ("powerpc: port 64 bits pgtable_cache to 32 bits")
Cc: Christophe Leroy 
Cc: Aneesh Kumar K.V 
Cc: Scott Wood 
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Nicholas Piggin 
---
 arch/powerpc/mm/hugetlbpage.c |  6 +-
 arch/powerpc/mm/init-common.c | 11 +++
 2 files changed, 4 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 289df38fb7e0..f21f6b907d99 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -810,12 +810,8 @@ static int __init hugetlbpage_init(void)
 * if we have pdshift and shift value same, we don't
 * use pgt cache for hugepd.
 */
-   if (pdshift > shift) {
+   if (pdshift > shift)
pgtable_cache_add(pdshift - shift, NULL);
-   if (!PGT_CACHE(pdshift - shift))
-   panic("hugetlbpage_init(): could not create "
- "pgtable cache for %d bit pagesize\n", 
shift);
-   }
 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
else if (!hugepte_cache) {
/*
diff --git a/arch/powerpc/mm/init-common.c b/arch/powerpc/mm/init-common.c
index a175cd82ae8c..1a3be5ae1d07 100644
--- a/arch/powerpc/mm/init-common.c
+++ b/arch/powerpc/mm/init-common.c
@@ -80,6 +80,8 @@ void pgtable_cache_add(unsigned shift, void (*ctor)(void *))
new = kmem_cache_create(name, table_size, align, 0, ctor);
kfree(name);
pgtable_cache[shift - 1] = new;
+   if (!new)
+   panic("Could not allocate pgtable cache for order %d", shift);
pr_debug("Allocated pgtable cache for order %d\n", shift);
 }
 
@@ -88,7 +90,7 @@ void pgtable_cache_init(void)
 {
pgtable_cache_add(PGD_INDEX_SIZE, pgd_ctor);
 
-   if (PMD_INDEX_SIZE && !PGT_CACHE(PMD_INDEX_SIZE))
+   if (PMD_CACHE_INDEX && !PGT_CACHE(PMD_CACHE_INDEX))
pgtable_cache_add(PMD_CACHE_INDEX, pmd_ctor);
/*
 * In all current configs, when the PUD index exists it's the
@@ -97,11 +99,4 @@ void pgtable_cache_init(void)
 */
if (PUD_INDEX_SIZE && !PGT_CACHE(PUD_INDEX_SIZE))
pgtable_cache_add(PUD_INDEX_SIZE, pud_ctor);
-
-   if (!PGT_CACHE(PGD_INDEX_SIZE))
-   panic("Couldn't allocate pgd cache");
-   if (PMD_INDEX_SIZE && !PGT_CACHE(PMD_INDEX_SIZE))
-   panic("Couldn't allocate pmd pgtable caches");
-   if (PUD_INDEX_SIZE && !PGT_CACHE(PUD_INDEX_SIZE))
-   panic("Couldn't allocate pud pgtable caches");
 }
-- 
2.11.0

bootx_init.c:88: undefined reference to `__stack_chk_fail_local'

[Christian Kujau]

Hi,

when compiling v4.10-rc2 with CONFIG_CC_STACKPROTECTOR_STRONG=y, the 
linker fails with:


+ ld -EB -m elf32ppc -Bstatic --build-id -X -o .tmp_vmlinux1 -T 
./arch/powerpc/kernel/vmlinux.lds arch/powerpc/kernel/head_32.o 
arch/powerpc/kernel/fpu.o arch/powerpc/kernel/vector.o 
arch/powerpc/kernel/prom_init.o init/built-in.o --start-group 
usr/built-in.o arch/powerpc/kernel/built-in.o arch/powerpc/mm/built-in.o 
arch/powerpc/lib/built-in.o arch/powerpc/sysdev/built-in.o 
arch/powerpc/platforms/built-in.o arch/powerpc/math-emu/built-in.o 
arch/powerpc/crypto/built-in.o arch/powerpc/net/built-in.o 
kernel/built-in.o certs/built-in.o mm/built-in.o fs/built-in.o 
ipc/built-in.o security/built-in.o crypto/built-in.o block/built-in.o 
lib/lib.a lib/built-in.o drivers/built-in.o sound/built-in.o 
firmware/built-in.o net/built-in.o virt/built-in.o --end-group
arch/powerpc/platforms/built-in.o: In function `bootx_printf':
/usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:88: 
undefined reference to `__stack_chk_fail_local'
arch/powerpc/platforms/built-in.o: In function `bootx_add_display_props':
/usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:211: 
undefined reference to `__stack_chk_fail_local'
arch/powerpc/platforms/built-in.o: In function 
`bootx_scan_dt_build_struct':
/usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:350: 
undefined reference to `__stack_chk_fail_local'
arch/powerpc/platforms/built-in.o: In function `bootx_init':
/usr/local/src/linux-git/arch/powerpc/platforms/powermac/bootx_init.c:596: 
undefined reference to `__stack_chk_fail_local'
/usr/bin/ld.bfd.real: .tmp_vmlinux1: hidden symbol `__stack_chk_fail_local' 
isn't defined
/usr/bin/ld.bfd.real: final link failed: Bad value



$ ld --version | head -1
GNU ld (GNU Binutils for Debian) 2.25

$ gcc --version | head -1
gcc-4.9.real (Debian 4.9.2-10) 4.9.2


I'm regularly compiling userspace programs with -fstack-protector w/o 
problems. I suspect it's either 6533b7c16ee5712041b4e324100550e02a9a5dda 
("powerpc: Initial stack protector (-fstack-protector) support") or 
902e06eb86cd62753974c249bd1dedae2825b430 ("powerpc/32: Change the stack 
protector canary value per task") or both but I haven't started the 
bisection yet.

Any other ideas?

Thanks,
Christian.
-- 
BOFH excuse #220:

Someone thought The Big Red Button was a light switch.

Re: [PATCH V2] cpufreq: powernv: Add boost files to export ultra-turbo frequencies

[Viresh Kumar]

On 03-01-17, 16:36, Shilpasri G Bhat wrote:
> In P8+, Workload Optimized Frequency(WOF) provides the capability to
> boost the cpu frequency based on the utilization of the other cpus
> running in the chip. The On-Chip-Controller(OCC) firmware will control
> the achievability of these frequencies depending on the power headroom
> available in the chip. Currently the ultra-turbo frequencies provided
> by this feature are exported along with the turbo and sub-turbo
> frequencies as scaling_available_frequencies. This patch will export
> the ultra-turbo frequencies separately as scaling_boost_frequencies in
> WOF enabled systems. This patch will add the boost sysfs file which
> can be used to disable/enable ultra-turbo frequencies.
> 
> Signed-off-by: Shilpasri G Bhat 
> Reviewed-by: Gautham R. Shenoy 
> ---
> Changes from v1:
> - Print if WOF is enabled
> - s/clean_notifiers/cleanup_notifiers
> 
>  drivers/cpufreq/powernv-cpufreq.c | 50 
> ---
>  1 file changed, 47 insertions(+), 3 deletions(-)

Acked-by: Viresh Kumar 

-- 
viresh

[PATCH V2] cpufreq: powernv: Add boost files to export ultra-turbo frequencies

[Shilpasri G Bhat]

In P8+, Workload Optimized Frequency(WOF) provides the capability to
boost the cpu frequency based on the utilization of the other cpus
running in the chip. The On-Chip-Controller(OCC) firmware will control
the achievability of these frequencies depending on the power headroom
available in the chip. Currently the ultra-turbo frequencies provided
by this feature are exported along with the turbo and sub-turbo
frequencies as scaling_available_frequencies. This patch will export
the ultra-turbo frequencies separately as scaling_boost_frequencies in
WOF enabled systems. This patch will add the boost sysfs file which
can be used to disable/enable ultra-turbo frequencies.

Signed-off-by: Shilpasri G Bhat 
Reviewed-by: Gautham R. Shenoy 
---
Changes from v1:
- Print if WOF is enabled
- s/clean_notifiers/cleanup_notifiers

 drivers/cpufreq/powernv-cpufreq.c | 50 ---
 1 file changed, 47 insertions(+), 3 deletions(-)

diff --git a/drivers/cpufreq/powernv-cpufreq.c 
b/drivers/cpufreq/powernv-cpufreq.c
index 37671b5..3ff5160 100644
--- a/drivers/cpufreq/powernv-cpufreq.c
+++ b/drivers/cpufreq/powernv-cpufreq.c
@@ -144,6 +144,7 @@ enum throttle_reason_type {
unsigned int max;
unsigned int nominal;
unsigned int nr_pstates;
+   bool wof_enabled;
 } powernv_pstate_info;
 
 /* Use following macros for conversions between pstate_id and index */
@@ -203,6 +204,7 @@ static int init_powernv_pstates(void)
const __be32 *pstate_ids, *pstate_freqs;
u32 len_ids, len_freqs;
u32 pstate_min, pstate_max, pstate_nominal;
+   u32 pstate_turbo, pstate_ultra_turbo;
 
power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
if (!power_mgt) {
@@ -225,8 +227,29 @@ static int init_powernv_pstates(void)
pr_warn("ibm,pstate-nominal not found\n");
return -ENODEV;
}
+
+   if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo",
+_ultra_turbo)) {
+   powernv_pstate_info.wof_enabled = false;
+   goto next;
+   }
+
+   if (of_property_read_u32(power_mgt, "ibm,pstate-turbo",
+_turbo)) {
+   powernv_pstate_info.wof_enabled = false;
+   goto next;
+   }
+
+   if (pstate_turbo == pstate_ultra_turbo)
+   powernv_pstate_info.wof_enabled = false;
+   else
+   powernv_pstate_info.wof_enabled = true;
+
+next:
pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min,
pstate_nominal, pstate_max);
+   pr_info("Workload Optimized Frequency is %s in the platform\n",
+   (powernv_pstate_info.wof_enabled) ? "enabled" : "disabled");
 
pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", _ids);
if (!pstate_ids) {
@@ -268,6 +291,13 @@ static int init_powernv_pstates(void)
powernv_pstate_info.nominal = i;
else if (id == pstate_min)
powernv_pstate_info.min = i;
+
+   if (powernv_pstate_info.wof_enabled && id == pstate_turbo) {
+   int j;
+
+   for (j = i - 1; j >= (int)powernv_pstate_info.max; j--)
+   powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ;
+   }
}
 
/* End of list marker entry */
@@ -305,9 +335,12 @@ static ssize_t cpuinfo_nominal_freq_show(struct 
cpufreq_policy *policy,
 struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
__ATTR_RO(cpuinfo_nominal_freq);
 
+#define SCALING_BOOST_FREQS_ATTR_INDEX 2
+
 static struct freq_attr *powernv_cpu_freq_attr[] = {
_freq_attr_scaling_available_freqs,
_freq_attr_cpuinfo_nominal_freq,
+   _freq_attr_scaling_boost_freqs,
NULL,
 };
 
@@ -1013,11 +1046,22 @@ static int __init powernv_cpufreq_init(void)
register_reboot_notifier(_cpufreq_reboot_nb);
opal_message_notifier_register(OPAL_MSG_OCC, _cpufreq_opal_nb);
 
+   if (powernv_pstate_info.wof_enabled)
+   powernv_cpufreq_driver.boost_enabled = true;
+   else
+   powernv_cpu_freq_attr[SCALING_BOOST_FREQS_ATTR_INDEX] = NULL;
+
rc = cpufreq_register_driver(_cpufreq_driver);
-   if (!rc)
-   return 0;
+   if (rc) {
+   pr_info("Failed to register the cpufreq driver (%d)\n", rc);
+   goto cleanup_notifiers;
+   }
 
-   pr_info("Failed to register the cpufreq driver (%d)\n", rc);
+   if (powernv_pstate_info.wof_enabled)
+   cpufreq_enable_boost_support();
+
+   return 0;
+cleanup_notifiers:
unregister_all_notifiers();
clean_chip_info();
 out:
-- 
1.8.3.1

[PATCH] powerpc/perf: use MSR to report privilege level on P9 DD1

[Madhavan Srinivasan]

"use_siar" variable is primarily used for deciding the sampled address
and the privilege level to be reported for a sample. perf_read_regs()
function updates the "use_siar" and "regs->result" based on the pmu
flags along with other checks. To force the use of MSR to report the
privilege level and to use "regs->nip" to report the instruction pointer,
set "PPMU_NO_CONT_SAMPLING" flag and remove "PPMU_HAS_SIER" from the
ppmu->flags.

Signed-off-by: Madhavan Srinivasan 
---
 arch/powerpc/perf/power9-pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c
index a46ef29e50e7..06b7e8ebd29a 100644
--- a/arch/powerpc/perf/power9-pmu.c
+++ b/arch/powerpc/perf/power9-pmu.c
@@ -403,7 +403,7 @@ static struct power_pmu power9_isa207_pmu = {
.bhrb_filter_map= power9_bhrb_filter_map,
.get_constraint = isa207_get_constraint,
.disable_pmc= isa207_disable_pmc,
-   .flags  = PPMU_HAS_SIER | PPMU_ARCH_207S,
+   .flags  = PPMU_NO_CONT_SAMPLING | PPMU_ARCH_207S,
.n_generic  = ARRAY_SIZE(power9_generic_events),
.generic_events = power9_generic_events,
.cache_events   = _cache_events,
-- 
2.7.4