Re: [PATCH v2] powerpc: fix boot on BOOK3S_32 with CONFIG_STRICT_KERNEL_RWX

2017-11-22 Thread Christophe LEROY 



Le 22/11/2017 à 12:48, Michael Ellerman a écrit :

Christophe LEROY  writes:


Le 22/11/2017 à 00:07, Balbir Singh a écrit :

On Wed, Nov 22, 2017 at 1:28 AM, Christophe Leroy
 wrote:

On powerpc32, patch_instruction() is called by apply_feature_fixups()
which is called from early_init()

There is the following note in front of early_init():
   * Note that the kernel may be running at an address which is different
   * from the address that it was linked at, so we must use RELOC/PTRRELOC
   * to access static data (including strings).  -- paulus

Therefore, slab_is_available() cannot be called yet, and
text_poke_area must be addressed with PTRRELOC()

Fixes: 37bc3e5fd764f ("powerpc/lib/code-patching: Use alternate map
for patch_instruction()")
Reported-by: Meelis Roos 
Cc: Balbir Singh 
Signed-off-by: Christophe Leroy 
---
   v2: Added missing asm/setup.h

   arch/powerpc/lib/code-patching.c | 6 ++
   1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index c9de03e0c1f1..d469224c4ada 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -21,6 +21,7 @@
   #include 
   #include 
   #include 
+#include 

   static int __patch_instruction(unsigned int *addr, unsigned int instr)
   {
@@ -146,11 +147,8 @@ int patch_instruction(unsigned int *addr, unsigned int 
instr)
   * During early early boot patch_instruction is called
   * when text_poke_area is not ready, but we still need
   * to allow patching. We just do the plain old patching
-* We use slab_is_available and per cpu read * via this_cpu_read
-* of text_poke_area. Per-CPU areas might not be up early
-* this can create problems with just using this_cpu_read()
   */
-   if (!slab_is_available() || !this_cpu_read(text_poke_area))
+   if (!this_cpu_read(*PTRRELOC(_poke_area)))
  return __patch_instruction(addr, instr);


On ppc64, we call apply_feature_fixups() in early_setup() after we've
relocated ourselves. Sorry for missing the ppc32 case. I would like to
avoid PTRRELOC when unnecessary.


What do you suggest then ?

Some #ifdef PPC32 around that ?


No I don't think that improves anything.

I think the comment about per-cpu not being up is wrong, you'll just get
the static version of text_poke_area, which should be NULL. So we don't
need the slab_available() check anyway.

So I'll take this as-is.

Having said that I absolutely hate PTRRELOC, so if it starts spreading
we will have to come up with something less bug prone.


Would something like that be the solution ?

diff --git a/arch/powerpc/include/asm/code-patching.h 
b/arch/powerpc/include/asm/code-patching.h

index abef812de7f8..1c8dd340f5fc 100644
--- a/arch/powerpc/include/asm/code-patching.h
+++ b/arch/powerpc/include/asm/code-patching.h
@@ -30,7 +30,11 @@ unsigned int create_branch(const unsigned int *addr,
 unsigned int create_cond_branch(const unsigned int *addr,
unsigned long target, int flags);
 int patch_branch(unsigned int *addr, unsigned long target, int flags);
-int patch_instruction(unsigned int *addr, unsigned int instr);
+int patch_instruction_early(unsigned int *addr, unsigned int instr, 
bool early);

+static inline int patch_instruction(unsigned int *addr, unsigned int instr)
+{
+   return patch_instruction_early(addr, instr, false);
+}

 int instr_is_relative_branch(unsigned int instr);
 int instr_is_branch_to_addr(const unsigned int *instr, unsigned long 
addr);
diff --git a/arch/powerpc/lib/code-patching.c 
b/arch/powerpc/lib/code-patching.c

index d469224c4ada..84ebf9203e40 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -135,7 +135,7 @@ static inline int unmap_patch_area(unsigned long addr)
return 0;
 }

-int patch_instruction(unsigned int *addr, unsigned int instr)
+int patch_instruction_early(unsigned int *addr, unsigned int instr, 
bool early)

 {
int err;
unsigned int *dest = NULL;
@@ -148,7 +148,7 @@ int patch_instruction(unsigned int *addr, unsigned 
int instr)

 * when text_poke_area is not ready, but we still need
 * to allow patching. We just do the plain old patching
 */
-   if (!this_cpu_read(*PTRRELOC(_poke_area)))
+   if (early || !this_cpu_read(text_poke_area))
return __patch_instruction(addr, instr);

local_irq_save(flags);
@@ -182,13 +182,13 @@ int patch_instruction(unsigned int *addr, unsigned 
int instr)

 }
 #else /* !CONFIG_STRICT_KERNEL_RWX */

-int patch_instruction(unsigned int *addr, unsigned int instr)
+int patch_instruction_early(unsigned int *addr, unsigned int instr, 
bool early)

 {
return __patch_instruction(addr, instr);
 }

 #endif /* CONFIG_STRICT_KERNEL_RWX */

Re: [PATCH 1/2] ALSA: pcm: add SNDRV_PCM_FORMAT_{S, U}20_4

2017-11-22 Thread Takashi Sakamoto 

On Nov 23 2017 08:44, Maciej S. Szmigiero wrote:

On 23.11.2017 00:27, Takashi Sakamoto wrote:

On Nov 23 2017 04:17, Maciej S. Szmigiero wrote:

(..)

--- a/include/uapi/sound/asound.h
+++ b/include/uapi/sound/asound.h
@@ -236,7 +236,11 @@ typedef int __bitwise snd_pcm_format_t;
   #define    SNDRV_PCM_FORMAT_DSD_U32_LE    ((__force snd_pcm_format_t) 50) /* 
DSD, 4-byte samples DSD (x32), little endian */
   #define    SNDRV_PCM_FORMAT_DSD_U16_BE    ((__force snd_pcm_format_t) 51) /* 
DSD, 2-byte samples DSD (x16), big endian */
   #define    SNDRV_PCM_FORMAT_DSD_U32_BE    ((__force snd_pcm_format_t) 52) /* 
DSD, 4-byte samples DSD (x32), big endian */
-#define    SNDRV_PCM_FORMAT_LAST    SNDRV_PCM_FORMAT_DSD_U32_BE
+#define    SNDRV_PCM_FORMAT_S20_4LE    ((__force snd_pcm_format_t) 53)    /* 
in four bytes */
+#define    SNDRV_PCM_FORMAT_S20_4BE    ((__force snd_pcm_format_t) 54)    /* 
in four bytes */
+#define    SNDRV_PCM_FORMAT_U20_4LE    ((__force snd_pcm_format_t) 55)    /* 
in four bytes */
+#define    SNDRV_PCM_FORMAT_U20_4BE    ((__force snd_pcm_format_t) 56)    /* 
in four bytes */
+#define    SNDRV_PCM_FORMAT_LAST    SNDRV_PCM_FORMAT_U20_4BE


In my opinion, for this type of definition, it's better to declare 
left/right-adjusted or padding side. (Of course, silence definition is already 
a hint, however the lack of information forces developers to have a careful 
behaviour to handle entries on the list.
(I note that in current ALSA PCM interface there's no way to deliver 
MSB/LSB-first information about sample format.)


No other sound format includes this information in its name


You overlook comments in 'SNDRV_PCM_FORMAT_[U|S]24_[LE|BE]'. Let me 
refer to them [1]:


198 #define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6) /* 
low three bytes */
199 #define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7) /* 
low three bytes */
200 #define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) /* 
low three bytes */
201 #define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) /* 
low three bytes */


In your way, these types of format can be represented by 
'SNDRV_PCM_FORMAT_[U|S]24_4[LE|BE]', thus for playback direction they

mean:

```
#include 
#include 

uint32_t *buf;
uint32_t sample;
snd_pcm_format_t format;

sample = generate_a_sample();
(sample & ~0x00ff) /* invalid bits as sample */

if (format == SNDRV_PCM_FORMAT_[U|S]24_LE) {
  buf[0] = htole32(sample);
else
  buf[0] = htobe32(sample);

/* transfer content of the buf via ALSA kernel stuffs. */
```

The comments are good enough for application developers in an aspect of 
a position for padding.


In general, studying from the past is preferable behaviour to be genius, 
however accumulated history includes mistakes and defects. Just 
pretending the past is not so genius, without further consideration.


Actually additions of the rest of entries for PCM format were done 
without enough cares of what information they give to application 
developers. Adding new entries is easier than fixing and improving them 
once exposed. It's a reason that they're left what they're.


I wish you had enough care to assist applications developers. Without 
applications, drivers are worthless and just waste of code base.



so if we name
these formats SNDRV_PCM_FORMAT_{S, U}20LSB_4 they are going to have it
inconsistent with every other one

(I assume you meant to include such information in a format name?).

But information about whether this format is MSB or LSB justified can be
added in a comment so the situation is clear for other developers from
the definition without needing to read the actual processing code.


For consistency of the other entries, this is not so preferable, in my 
opinion. So I didn't suggest it and just noted.



Additionally, alsa-lib includes some codes related to the definition[1]. If 
you'd like to thing goes well out of ALSA SoC part, it's better to submit 
changes to the library as well.

[1] 
http://git.alsa-project.org/?p=alsa-lib.git;a=blob;f=src/pcm/pcm_misc.c;h=5420b1895713a3aec3624a5218794a7b49baf167;hb=HEAD


I have alsa-lib changes ready for these formats - they were needed to
test these patches, will post them when this is merged on the kernel
side (in case some changes are needed which affect both).


Please pay enough care when writing patch comment. Silence means 
nothing, at least for reviewers, even if you have good preparations.


[1] 
https://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git/tree/include/uapi/sound/asound.h?h=sound-4.15-rc1#n198



Regards

Takashi Sakamoto

Re: [PATCH v6 06/10] powerpc/lib/code-patching: Use alternate map for patch_instruction()

2017-11-22 Thread Christophe LEROY 



Le 03/07/2017 à 15:01, Michael Ellerman a écrit :

From: Balbir Singh 

This patch creates the window using text_poke_area, allocated via
get_vm_area(). text_poke_area is per CPU to avoid locking.
text_poke_area for each cpu is setup using late_initcall, prior to
setup of these alternate mapping areas, we continue to use direct
write to change/modify kernel text. With the ability to use alternate
mappings to write to kernel text, it provides us the freedom to then
turn text read-only and implement CONFIG_STRICT_KERNEL_RWX.

This code is CPU hotplug aware to ensure that the we have mappings for
any new cpus as they come online and tear down mappings for any CPUs
that go offline.

Signed-off-by: Balbir Singh 
Signed-off-by: Michael Ellerman 
---
  arch/powerpc/lib/code-patching.c | 171 ++-
  1 file changed, 167 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index 500b0f6a0b64..c9de03e0c1f1 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -12,23 +12,186 @@
  #include 
  #include 
  #include 
-#include 
-#include 
+#include 
+#include 
  #include 
  #include 
  
+#include 

+#include 
+#include 
+#include 
  
-int patch_instruction(unsigned int *addr, unsigned int instr)

+static int __patch_instruction(unsigned int *addr, unsigned int instr)
  {
int err;
  
  	__put_user_size(instr, addr, 4, err);

if (err)
return err;
-   asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (addr));
+
+   asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" :: "r" (addr));
+
+   return 0;
+}
+


[...]


+int patch_instruction(unsigned int *addr, unsigned int instr)
+{
+   int err;
+   unsigned int *dest = NULL;
+   unsigned long flags;
+   unsigned long text_poke_addr;
+   unsigned long kaddr = (unsigned long)addr;
+
+   /*
+* During early early boot patch_instruction is called
+* when text_poke_area is not ready, but we still need
+* to allow patching. We just do the plain old patching
+* We use slab_is_available and per cpu read * via this_cpu_read
+* of text_poke_area. Per-CPU areas might not be up early
+* this can create problems with just using this_cpu_read()
+*/
+   if (!slab_is_available() || !this_cpu_read(text_poke_area))
+   return __patch_instruction(addr, instr);
+
+   local_irq_save(flags);
+
+   text_poke_addr = (unsigned long)__this_cpu_read(text_poke_area)->addr;
+   if (map_patch_area(addr, text_poke_addr)) {
+   err = -1;
+   goto out;
+   }
+
+   dest = (unsigned int *)(text_poke_addr) +
+   ((kaddr & ~PAGE_MASK) / sizeof(unsigned int));
+
+   /*
+* We use __put_user_size so that we can handle faults while
+* writing to dest and return err to handle faults gracefully
+*/
+   __put_user_size(instr, dest, 4, err);
+   if (!err)
+   asm ("dcbst 0, %0; sync; icbi 0,%0; icbi 0,%1; sync; isync"
+   ::"r" (dest), "r"(addr));


Is the second icbi really needed since the alternative area is mapped 
with PAGE_KERNEL which is not executable ?

If we could avoid that, we could refactor this part as follows:

diff --git a/arch/powerpc/lib/code-patching.c 
b/arch/powerpc/lib/code-patching.c

index d469224c4ada..85031de43bb9 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -23,15 +23,17 @@
 #include 
 #include 

-static int __patch_instruction(unsigned int *addr, unsigned int instr)
+static int __patch_instruction(unsigned int *addr, unsigned int instr,
+  unsigned int *dest)
 {
int err;

-   __put_user_size(instr, addr, 4, err);
+   __put_user_size(instr, dest, 4, err);
if (err)
return err;

-   asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" :: "r" (addr));
+   asm ("dcbst 0, %0; sync; icbi 0,%1; sync; isync" :: "r" (dest),
+   "r" (addr));

return 0;
 }
@@ -149,7 +151,7 @@ int patch_instruction(unsigned int *addr, unsigned 
int instr)

 * to allow patching. We just do the plain old patching
 */
if (!this_cpu_read(*PTRRELOC(_poke_area)))
-   return __patch_instruction(addr, instr);
+   return __patch_instruction(addr, instr, addr);

local_irq_save(flags);

@@ -162,14 +164,7 @@ int patch_instruction(unsigned int *addr, unsigned 
int instr)

dest = (unsigned int *)(text_poke_addr) +
((kaddr & ~PAGE_MASK) / sizeof(unsigned int));

-   /*
-* We use __put_user_size so that we can handle faults while
-* writing to dest and return err to handle faults gracefully
-

Re: [PATCH kernel] vfio/spapr: Add trace points for map/unmap

2017-11-22 Thread Alexey Kardashevskiy 
On 17/11/17 17:58, Alexey Kardashevskiy wrote:
> On 17/11/17 11:13, Alex Williamson wrote:
>> On Tue, 14 Nov 2017 10:47:12 +1100
>> Alexey Kardashevskiy  wrote:
>>
>>> On 27/10/17 14:00, Alexey Kardashevskiy wrote:
 This adds trace_map/trace_unmap tracepoints to spapr driver. Type1 already
 uses these via the IOMMU API (iommu_map/__iommu_unmap).

 Signed-off-by: Alexey Kardashevskiy   
>>
>> Is this really legitimate to include tracepoints from a different
>> subsystem?>  The vfio type1 backend gets these trace points by virtue of
>> it actually using the IOMMU API, it doesn't call them itself.  I'm kind
>> of surprised these are actually available to be called from a module.
> 
> They are explicitly exported:
> 
> EXPORT_TRACEPOINT_SYMBOL_GPL(map);
> EXPORT_TRACEPOINT_SYMBOL_GPL(unmap);
> 
> I would think this is for things like drivers/vfio/vfio_iommu_spapr_tce.c ,
> why else?...
> 
> 
>> I suspect the way to do this is probably to define our own tracepoints
>> in the vfio/spapr backend or insert tracepoints into the IOMMU layers
>> that that code calls into rather than masquerading as tracepoints from
>> a different subsystem.  Right?
> 
> This makes sense too. But it is going to be just cut-n-paste and some
> confusion -
> /sys/kernel/debug/tracing/events/iommu/map will still be present but
> won't work and
> /sys/kernel/debug/tracing/events/vfio/vfio_iommu_spapr_tce/map will.
> 
> Judges? :)


Still nak? I discussed this locally, the conclusion was it is a matter of
taste and this proposal is not that disgusting. Thanks.


> 
> 
> 
>>  Thanks,
>>
>> Alex
>>
 ---

 Example:
  qemu-system-ppc-8655  [096]   724.662740: unmap:IOMMU: 
 iova=0x3000 size=4096 unmapped_size=4096
  qemu-system-ppc-8656  [104]   724.970912: map:  IOMMU: 
 iova=0x0800 paddr=0x7ffef7ff size=65536
 ---
  drivers/vfio/vfio_iommu_spapr_tce.c | 12 ++--
  1 file changed, 10 insertions(+), 2 deletions(-)

 diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c 
 b/drivers/vfio/vfio_iommu_spapr_tce.c
 index 63112c36ab2d..4531486c77c6 100644
 --- a/drivers/vfio/vfio_iommu_spapr_tce.c
 +++ b/drivers/vfio/vfio_iommu_spapr_tce.c
 @@ -22,6 +22,7 @@
  #include 
  #include 
  #include 
 +#include 
  
  #include 
  #include 
 @@ -502,17 +503,19 @@ static int tce_iommu_clear(struct tce_container 
 *container,
struct iommu_table *tbl,
unsigned long entry, unsigned long pages)
  {
 -  unsigned long oldhpa;
 +  unsigned long oldhpa, unmapped, firstentry = entry, totalpages = pages;
long ret;
enum dma_data_direction direction;
  
 -  for ( ; pages; --pages, ++entry) {
 +  for (unmapped = 0; pages; --pages, ++entry) {
direction = DMA_NONE;
oldhpa = 0;
ret = iommu_tce_xchg(tbl, entry, , );
if (ret)
continue;
  
 +  ++unmapped;
 +
if (direction == DMA_NONE)
continue;
  
 @@ -523,6 +526,9 @@ static int tce_iommu_clear(struct tce_container 
 *container,
  
tce_iommu_unuse_page(container, oldhpa);
}
 +  trace_unmap(firstentry << tbl->it_page_shift,
 +  totalpages << tbl->it_page_shift,
 +  unmapped << tbl->it_page_shift);
  
return 0;
  }
 @@ -965,6 +971,8 @@ static long tce_iommu_ioctl(void *iommu_data,
direction);
  
iommu_flush_tce(tbl);
 +  if (!ret)
 +  trace_map(param.iova, param.vaddr, param.size);
  
return ret;
}
   
>>>
>>>
>>
> 
> 


-- 
Alexey

Re: [PATCH v3] cxl: Check if vphb exists before iterating over AFU devices

2017-11-22 Thread Andrew Donnellan 

On 23/11/17 14:38, Vaibhav Jain wrote:

During an eeh a kernel-oops is reported if no vPHB is allocated to the
AFU. This happens as during AFU init, an error in creation of vPHB is
a non-fatal error. Hence afu->phb should always be checked for NULL
before iterating over it for the virtual AFU pci devices.

This patch fixes the kenel-oops by adding a NULL pointer check for
afu->phb before it is dereferenced.

Fixes: 9e8df8a2196("cxl: EEH support")
Cc: sta...@vger.kernel.org
Signed-off-by: Vaibhav Jain 


Thanks for fixing it!

Acked-by: Andrew Donnellan 


---
Changelog:

v3  -> Fixed a reverse NULL check [Fred]

Resend  -> Added the 'Fixes' info and marking the patch to stable tree [Mpe]

v2  -> Added the vphb NULL check to cxl_vphb_error_detected() [Andrew]
---
  drivers/misc/cxl/pci.c | 12 ++--
  1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index bb7fd3f4edab..19969ee86d6f 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -2083,6 +2083,9 @@ static pci_ers_result_t cxl_vphb_error_detected(struct 
cxl_afu *afu,
/* There should only be one entry, but go through the list
 * anyway
 */
+   if (afu->phb == NULL)
+   return result;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) {
if (!afu_dev->driver)
continue;
@@ -2124,8 +2127,7 @@ static pci_ers_result_t cxl_pci_error_detected(struct 
pci_dev *pdev,
 * Tell the AFU drivers; but we don't care what they
 * say, we're going away.
 */
-   if (afu->phb != NULL)
-   cxl_vphb_error_detected(afu, state);
+   cxl_vphb_error_detected(afu, state);
}
return PCI_ERS_RESULT_DISCONNECT;
}
@@ -2265,6 +2267,9 @@ static pci_ers_result_t cxl_pci_slot_reset(struct pci_dev 
*pdev)
if (cxl_afu_select_best_mode(afu))
goto err;

+   if (afu->phb == NULL)
+   continue;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) 
{
/* Reset the device context.
 * TODO: make this less disruptive
@@ -2327,6 +2332,9 @@ static void cxl_pci_resume(struct pci_dev *pdev)
for (i = 0; i < adapter->slices; i++) {
afu = adapter->afu[i];

+   if (afu->phb == NULL)
+   continue;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) 
{
if (afu_dev->driver && afu_dev->driver->err_handler &&
afu_dev->driver->err_handler->resume)



--
Andrew Donnellan  OzLabs, ADL Canberra
andrew.donnel...@au1.ibm.com  IBM Australia Limited

Re: [RESEND][PATCH v2] cxl: Check if vphb exists before iterating over AFU devices

2017-11-22 Thread Vaibhav Jain 
Frederic Barrat  writes:
>
> .. that one is more annoying.
> afu->phb == NULL?

Not sure how I missed that. Thanks for catching this Fred. I have sent a
v3 with the fix.

-- 
Vaibhav Jain 
Linux Technology Center, IBM India Pvt. Ltd.

[PATCH v3] cxl: Check if vphb exists before iterating over AFU devices

2017-11-22 Thread Vaibhav Jain 
During an eeh a kernel-oops is reported if no vPHB is allocated to the
AFU. This happens as during AFU init, an error in creation of vPHB is
a non-fatal error. Hence afu->phb should always be checked for NULL
before iterating over it for the virtual AFU pci devices.

This patch fixes the kenel-oops by adding a NULL pointer check for
afu->phb before it is dereferenced.

Fixes: 9e8df8a2196("cxl: EEH support")
Cc: sta...@vger.kernel.org
Signed-off-by: Vaibhav Jain 
---
Changelog:

v3  -> Fixed a reverse NULL check [Fred]

Resend  -> Added the 'Fixes' info and marking the patch to stable tree [Mpe]

v2  -> Added the vphb NULL check to cxl_vphb_error_detected() [Andrew]
---
 drivers/misc/cxl/pci.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index bb7fd3f4edab..19969ee86d6f 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -2083,6 +2083,9 @@ static pci_ers_result_t cxl_vphb_error_detected(struct 
cxl_afu *afu,
/* There should only be one entry, but go through the list
 * anyway
 */
+   if (afu->phb == NULL)
+   return result;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) {
if (!afu_dev->driver)
continue;
@@ -2124,8 +2127,7 @@ static pci_ers_result_t cxl_pci_error_detected(struct 
pci_dev *pdev,
 * Tell the AFU drivers; but we don't care what they
 * say, we're going away.
 */
-   if (afu->phb != NULL)
-   cxl_vphb_error_detected(afu, state);
+   cxl_vphb_error_detected(afu, state);
}
return PCI_ERS_RESULT_DISCONNECT;
}
@@ -2265,6 +2267,9 @@ static pci_ers_result_t cxl_pci_slot_reset(struct pci_dev 
*pdev)
if (cxl_afu_select_best_mode(afu))
goto err;
 
+   if (afu->phb == NULL)
+   continue;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) 
{
/* Reset the device context.
 * TODO: make this less disruptive
@@ -2327,6 +2332,9 @@ static void cxl_pci_resume(struct pci_dev *pdev)
for (i = 0; i < adapter->slices; i++) {
afu = adapter->afu[i];
 
+   if (afu->phb == NULL)
+   continue;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) 
{
if (afu_dev->driver && afu_dev->driver->err_handler &&
afu_dev->driver->err_handler->resume)
-- 
2.14.3

Re: [PATCH 1/2] ALSA: pcm: add SNDRV_PCM_FORMAT_{S, U}20_4

2017-11-22 Thread Takashi Sakamoto 

On Nov 23 2017 04:17, Maciej S. Szmigiero wrote:

This format is similar to existing SNDRV_PCM_FORMAT_{S,U}20_3 that keep
20-bit PCM samples in 3 bytes, however i.MX6 platform SSI FIFO does not
allow 3-byte accesses (including DMA) so a 4-byte format is needed for it.

Signed-off-by: Maciej S. Szmigiero 
---
  include/sound/pcm.h |  8 
  include/sound/soc-dai.h |  2 ++
  include/uapi/sound/asound.h | 10 +-
  sound/core/pcm_misc.c   | 16 
  4 files changed, 35 insertions(+), 1 deletion(-)

... >
diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h
index c227ccba60ae..69b661816491 100644
--- a/include/uapi/sound/asound.h
+++ b/include/uapi/sound/asound.h
@@ -236,7 +236,11 @@ typedef int __bitwise snd_pcm_format_t;
  #define   SNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50) 
/* DSD, 4-byte samples DSD (x32), little endian */
  #define   SNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51) 
/* DSD, 2-byte samples DSD (x16), big endian */
  #define   SNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52) 
/* DSD, 4-byte samples DSD (x32), big endian */
-#defineSNDRV_PCM_FORMAT_LAST   SNDRV_PCM_FORMAT_DSD_U32_BE
+#defineSNDRV_PCM_FORMAT_S20_4LE((__force snd_pcm_format_t) 53) 
/* in four bytes */
+#defineSNDRV_PCM_FORMAT_S20_4BE((__force snd_pcm_format_t) 54) 
/* in four bytes */
+#defineSNDRV_PCM_FORMAT_U20_4LE((__force snd_pcm_format_t) 55) 
/* in four bytes */
+#defineSNDRV_PCM_FORMAT_U20_4BE((__force snd_pcm_format_t) 56) 
/* in four bytes */
+#defineSNDRV_PCM_FORMAT_LAST   SNDRV_PCM_FORMAT_U20_4BE


In my opinion, for this type of definition, it's better to declare 
left/right-adjusted or padding side. (Of course, silence definition is 
already a hint, however the lack of information forces developers to 
have a careful behaviour to handle entries on the list.)


(I note that in current ALSA PCM interface there's no way to deliver 
MSB/LSB-first information about sample format.)


Additionally, alsa-lib includes some codes related to the definition[1]. 
If you'd like to thing goes well out of ALSA SoC part, it's better to 
submit changes to the library as well.


[1] 
http://git.alsa-project.org/?p=alsa-lib.git;a=blob;f=src/pcm/pcm_misc.c;h=5420b1895713a3aec3624a5218794a7b49baf167;hb=HEAD



Regards

Takashi Sakamoto

Re: [PATCH 1/2] ALSA: pcm: add SNDRV_PCM_FORMAT_{S, U}20_4

2017-11-22 Thread Maciej S. Szmigiero 
On 23.11.2017 00:27, Takashi Sakamoto wrote:
> On Nov 23 2017 04:17, Maciej S. Szmigiero wrote:
(..)
>> --- a/include/uapi/sound/asound.h
>> +++ b/include/uapi/sound/asound.h
>> @@ -236,7 +236,11 @@ typedef int __bitwise snd_pcm_format_t;
>>   #define    SNDRV_PCM_FORMAT_DSD_U32_LE    ((__force snd_pcm_format_t) 50) 
>> /* DSD, 4-byte samples DSD (x32), little endian */
>>   #define    SNDRV_PCM_FORMAT_DSD_U16_BE    ((__force snd_pcm_format_t) 51) 
>> /* DSD, 2-byte samples DSD (x16), big endian */
>>   #define    SNDRV_PCM_FORMAT_DSD_U32_BE    ((__force snd_pcm_format_t) 52) 
>> /* DSD, 4-byte samples DSD (x32), big endian */
>> -#define    SNDRV_PCM_FORMAT_LAST    SNDRV_PCM_FORMAT_DSD_U32_BE
>> +#define    SNDRV_PCM_FORMAT_S20_4LE    ((__force snd_pcm_format_t) 53)    
>> /* in four bytes */
>> +#define    SNDRV_PCM_FORMAT_S20_4BE    ((__force snd_pcm_format_t) 54)    
>> /* in four bytes */
>> +#define    SNDRV_PCM_FORMAT_U20_4LE    ((__force snd_pcm_format_t) 55)    
>> /* in four bytes */
>> +#define    SNDRV_PCM_FORMAT_U20_4BE    ((__force snd_pcm_format_t) 56)    
>> /* in four bytes */
>> +#define    SNDRV_PCM_FORMAT_LAST    SNDRV_PCM_FORMAT_U20_4BE
> 
> In my opinion, for this type of definition, it's better to declare 
> left/right-adjusted or padding side. (Of course, silence definition is 
> already a hint, however the lack of information forces developers to have a 
> careful behaviour to handle entries on the list.> (I note that in current 
> ALSA PCM interface there's no way to deliver MSB/LSB-first information about 
> sample format.)

No other sound format includes this information in its name so if we name
these formats SNDRV_PCM_FORMAT_{S, U}20LSB_4 they are going to have it
inconsistent with every other one (I assume you meant to include such
information in a format name?).

But information about whether this format is MSB or LSB justified can be
added in a comment so the situation is clear for other developers from
the definition without needing to read the actual processing code.

> Additionally, alsa-lib includes some codes related to the definition[1]. If 
> you'd like to thing goes well out of ALSA SoC part, it's better to submit 
> changes to the library as well.
> 
> [1] 
> http://git.alsa-project.org/?p=alsa-lib.git;a=blob;f=src/pcm/pcm_misc.c;h=5420b1895713a3aec3624a5218794a7b49baf167;hb=HEAD

I have alsa-lib changes ready for these formats - they were needed to
test these patches, will post them when this is merged on the kernel
side (in case some changes are needed which affect both).

> Regards
> 
> Takashi Sakamoto

Best regards,
Maciej Szmigiero

Re: [PATCH] powernv: Avoid calling trace tlbie in kexec path.

2017-11-22 Thread Balbir Singh 
On Thu, Nov 23, 2017 at 4:32 AM, Mahesh J Salgaonkar
 wrote:
> From: Mahesh Salgaonkar 
>
> Rebooting into a new kernel with kexec fails in trace_tlbie() which is
> called from native_hpte_clear(). This happens if the running kernel has
> CONFIG_LOCKDEP enabled. With lockdep enabled, the tracepoints always
> execute few RCU checks regardless of whether tracing is on or off.
> We are already in the last phase of kexec sequence in real mode with
> HILE_BE set. At this point the RCU check ends up in RCU_LOCKDEP_WARN and
> causes kexec to fail.
>

Effectively we can't enter the trace point code after we've set
HILE_BE.  Do we need
a fixes tag? Or is this a side-effect of a new generic change?

I think the right thing in the longer run might be to do a TRACE_EVENT_CONDITION
and have the condition do the right thing, but what you have for now is good.

Balbir Singh.

[PATCH V2 13/29] powerpc/powermac: deprecate pci_get_bus_and_slot()

2017-11-22 Thread Sinan Kaya 
pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
where a PCI device is present. This restricts the device drivers to be
reused for other domain numbers.

Getting ready to remove pci_get_bus_and_slot() function in favor of
pci_get_domain_bus_and_slot().

Hard-code the domain number as 0 to match the previous behavior.

Signed-off-by: Sinan Kaya 
---
 drivers/macintosh/via-pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c
index c4c2b3b..3e8b3b6 100644
--- a/drivers/macintosh/via-pmu.c
+++ b/drivers/macintosh/via-pmu.c
@@ -1799,7 +1799,7 @@ static int powerbook_sleep_grackle(void)
struct adb_request req;
struct pci_dev *grackle;
 
-   grackle = pci_get_bus_and_slot(0, 0);
+   grackle = pci_get_domain_bus_and_slot(0, 0, 0);
if (!grackle)
return -ENODEV;
 
-- 
1.9.1

[PATCH V2 02/29] powerpc/PCI: deprecate pci_get_bus_and_slot()

2017-11-22 Thread Sinan Kaya 
pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
where a PCI device is present. This restricts the device drivers to be
reused for other domain numbers.

Getting ready to remove pci_get_bus_and_slot() function in favor of
pci_get_domain_bus_and_slot().

Use pci_get_domain_bus_and_slot() with a domain number of 0 as the code
is not ready to consume multiple domains and existing code used domain
number 0.

Signed-off-by: Sinan Kaya 
---
 arch/powerpc/kernel/pci_32.c  | 3 ++-
 arch/powerpc/platforms/powermac/feature.c | 2 +-
 arch/powerpc/sysdev/mv64x60_pci.c | 4 ++--
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 1d817f4..85ad2f7 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -96,7 +96,8 @@
reg = of_get_property(node, "reg", NULL);
if (!reg)
continue;
-   dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
+   dev = pci_get_domain_bus_and_slot(0, pci_bus,
+ ((reg[0] >> 8) & 0xff));
if (!dev || !dev->subordinate) {
pci_dev_put(dev);
continue;
diff --git a/arch/powerpc/platforms/powermac/feature.c 
b/arch/powerpc/platforms/powermac/feature.c
index 9e3f39d..ed8b166 100644
--- a/arch/powerpc/platforms/powermac/feature.c
+++ b/arch/powerpc/platforms/powermac/feature.c
@@ -829,7 +829,7 @@ static long core99_scc_enable(struct device_node *node, 
long param, long value)
 
if (value) {
if (pci_device_from_OF_node(node, , ) == 0)
-   pdev = pci_get_bus_and_slot(pbus, pid);
+   pdev = pci_get_domain_bus_and_slot(0, pbus, pid);
if (pdev == NULL)
return 0;
rc = pci_enable_device(pdev);
diff --git a/arch/powerpc/sysdev/mv64x60_pci.c 
b/arch/powerpc/sysdev/mv64x60_pci.c
index d52b3b8..6fe9104 100644
--- a/arch/powerpc/sysdev/mv64x60_pci.c
+++ b/arch/powerpc/sysdev/mv64x60_pci.c
@@ -37,7 +37,7 @@ static ssize_t mv64x60_hs_reg_read(struct file *filp, struct 
kobject *kobj,
if (count < MV64X60_VAL_LEN_MAX)
return -EINVAL;
 
-   phb = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
+   phb = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
if (!phb)
return -ENODEV;
pci_read_config_dword(phb, MV64X60_PCICFG_CPCI_HOTSWAP, );
@@ -61,7 +61,7 @@ static ssize_t mv64x60_hs_reg_write(struct file *filp, struct 
kobject *kobj,
if (sscanf(buf, "%i", ) != 1)
return -EINVAL;
 
-   phb = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
+   phb = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
if (!phb)
return -ENODEV;
pci_write_config_dword(phb, MV64X60_PCICFG_CPCI_HOTSWAP, v);
-- 
1.9.1

Re: [PATCH v2 1/2] powerpc/pci: convert to use for_each_pci_bridge() helper

2017-11-22 Thread Bjorn Helgaas 
On Fri, Nov 10, 2017 at 07:52:29PM +0200, Andy Shevchenko wrote:
> ...which makes code slightly cleaner.
> 
> Requires: d43f59ce6c50 ("PCI: Add for_each_pci_bridge() helper")

Requires: 24a0c654d7d6 ("PCI: Add for_each_pci_bridge() helper")

(My fault, I rebased that commit before sending it to Linus.)

> Acked-by: Michael Ellerman 

These don't depend on anything in the PCI core, so they could go
either via my tree or the powerpc tree.  Since you acked this,
Michael, I corrected the SHA1 above and put these both on my pci/misc
branch.

If you pick them up, let me know and I'll drop them from my tree.

> Signed-off-by: Andy Shevchenko 
> ---
>  arch/powerpc/kernel/pci-hotplug.c | 7 ++-
>  arch/powerpc/kernel/pci_of_scan.c | 7 ++-
>  2 files changed, 4 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/powerpc/kernel/pci-hotplug.c 
> b/arch/powerpc/kernel/pci-hotplug.c
> index 2d71269e7dc1..741f47295188 100644
> --- a/arch/powerpc/kernel/pci-hotplug.c
> +++ b/arch/powerpc/kernel/pci-hotplug.c
> @@ -134,11 +134,8 @@ void pci_hp_add_devices(struct pci_bus *bus)
>   pcibios_setup_bus_devices(bus);
>   max = bus->busn_res.start;
>   for (pass = 0; pass < 2; pass++) {
> - list_for_each_entry(dev, >devices, bus_list) {
> - if (pci_is_bridge(dev))
> - max = pci_scan_bridge(bus, dev,
> -   max, pass);
> - }
> + for_each_pci_bridge(dev, bus)
> + max = pci_scan_bridge(bus, dev, max, pass);
>   }
>   }
>   pcibios_finish_adding_to_bus(bus);
> diff --git a/arch/powerpc/kernel/pci_of_scan.c 
> b/arch/powerpc/kernel/pci_of_scan.c
> index 0d790f8432d2..8bdaa2a6fa62 100644
> --- a/arch/powerpc/kernel/pci_of_scan.c
> +++ b/arch/powerpc/kernel/pci_of_scan.c
> @@ -369,11 +369,8 @@ static void __of_scan_bus(struct device_node *node, 
> struct pci_bus *bus,
>   pcibios_setup_bus_devices(bus);
>  
>   /* Now scan child busses */
> - list_for_each_entry(dev, >devices, bus_list) {
> - if (pci_is_bridge(dev)) {
> - of_scan_pci_bridge(dev);
> - }
> - }
> + for_each_pci_bridge(dev, bus)
> + of_scan_pci_bridge(dev);
>  }
>  
>  /**
> -- 
> 2.14.2
>

[PATCH 2/2] ASoC: fsl_ssi: add 20-bit sample format for AC'97 and use it for capture

2017-11-22 Thread Maciej S. Szmigiero 
When testing AC'97 capture on UDOO board (currently the only user of
fsl_ssi driver in the AC'97 mode) it become obvious that there is a massive
distortion above certain, small input signal.

This problem has been traced to silicon errata ERR003778:
"In AC97, 16-bit mode, received data is shifted by 4-bit locations" that
has "No fix scheduled".
This errata suggests a workaround of doing a 4-bit shift back in SDMA
script for this specific operation mode, however our SDMA scripts are
shared between various SoC peripherals so we can't really modify them.

There is a simple way to avoid this problem, however, that is to disallow
recording in 16-bit mode and only support it in AC'97-native 20-bit mode.
We have to use a 4-byte format for this since SSI FIFOs do not allow 3-byte
accesses (and these aren't supported by imx-sdma driver anyway).
With this change the capture distortion is gone.

We can also add this format as an additional one supported for playback,
using this opportunity to make sure that we use CPU-endian-native formats
in AC'97 mode as we already do in I2S mode.

There is no problem in using different bit widths in playback and capture
in AC'97 mode so allow this, too.

Signed-off-by: Maciej S. Szmigiero 
---
 sound/soc/fsl/fsl_ssi.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 20ef09e1a395..2aed089fdd76 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -1278,14 +1278,15 @@ static struct snd_soc_dai_driver fsl_ssi_ac97_dai = {
.channels_min = 2,
.channels_max = 2,
.rates = SNDRV_PCM_RATE_8000_48000,
-   .formats = SNDRV_PCM_FMTBIT_S16_LE,
+   .formats = SNDRV_PCM_FMTBIT_S16 | SNDRV_PCM_FMTBIT_S20_4,
},
.capture = {
.stream_name = "AC97 Capture",
.channels_min = 2,
.channels_max = 2,
.rates = SNDRV_PCM_RATE_48000,
-   .formats = SNDRV_PCM_FMTBIT_S16_LE,
+   /* 16-bit capture is broken (errata ERR003778) */
+   .formats = SNDRV_PCM_FMTBIT_S20_4,
},
.ops = _ssi_dai_ops,
 };
@@ -1557,11 +1558,12 @@ static int fsl_ssi_probe(struct platform_device *pdev)
 
/* Are the RX and the TX clocks locked? */
if (!of_find_property(np, "fsl,ssi-asynchronous", NULL)) {
-   if (!fsl_ssi_is_ac97(ssi_private))
+   if (!fsl_ssi_is_ac97(ssi_private)) {
ssi_private->cpu_dai_drv.symmetric_rates = 1;
+   ssi_private->cpu_dai_drv.symmetric_samplebits = 1;
+   }
 
ssi_private->cpu_dai_drv.symmetric_channels = 1;
-   ssi_private->cpu_dai_drv.symmetric_samplebits = 1;
}
 
/* Determine the FIFO depth. */

[PATCH 1/2] ALSA: pcm: add SNDRV_PCM_FORMAT_{S,U}20_4

2017-11-22 Thread Maciej S. Szmigiero 
This format is similar to existing SNDRV_PCM_FORMAT_{S,U}20_3 that keep
20-bit PCM samples in 3 bytes, however i.MX6 platform SSI FIFO does not
allow 3-byte accesses (including DMA) so a 4-byte format is needed for it.

Signed-off-by: Maciej S. Szmigiero 
---
 include/sound/pcm.h |  8 
 include/sound/soc-dai.h |  2 ++
 include/uapi/sound/asound.h | 10 +-
 sound/core/pcm_misc.c   | 16 
 4 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/include/sound/pcm.h b/include/sound/pcm.h
index 24febf9e177c..7ad2d3f0934f 100644
--- a/include/sound/pcm.h
+++ b/include/sound/pcm.h
@@ -191,6 +191,10 @@ struct snd_pcm_ops {
 #define SNDRV_PCM_FMTBIT_DSD_U32_LE_SNDRV_PCM_FMTBIT(DSD_U32_LE)
 #define SNDRV_PCM_FMTBIT_DSD_U16_BE_SNDRV_PCM_FMTBIT(DSD_U16_BE)
 #define SNDRV_PCM_FMTBIT_DSD_U32_BE_SNDRV_PCM_FMTBIT(DSD_U32_BE)
+#define SNDRV_PCM_FMTBIT_S20_4LE   _SNDRV_PCM_FMTBIT(S20_4LE)
+#define SNDRV_PCM_FMTBIT_U20_4LE   _SNDRV_PCM_FMTBIT(U20_4LE)
+#define SNDRV_PCM_FMTBIT_S20_4BE   _SNDRV_PCM_FMTBIT(S20_4BE)
+#define SNDRV_PCM_FMTBIT_U20_4BE   _SNDRV_PCM_FMTBIT(U20_4BE)
 
 #ifdef SNDRV_LITTLE_ENDIAN
 #define SNDRV_PCM_FMTBIT_S16   SNDRV_PCM_FMTBIT_S16_LE
@@ -202,6 +206,8 @@ struct snd_pcm_ops {
 #define SNDRV_PCM_FMTBIT_FLOAT SNDRV_PCM_FMTBIT_FLOAT_LE
 #define SNDRV_PCM_FMTBIT_FLOAT64   SNDRV_PCM_FMTBIT_FLOAT64_LE
 #define SNDRV_PCM_FMTBIT_IEC958_SUBFRAME SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE
+#define SNDRV_PCM_FMTBIT_S20_4 SNDRV_PCM_FMTBIT_S20_4LE
+#define SNDRV_PCM_FMTBIT_U20_4 SNDRV_PCM_FMTBIT_U20_4LE
 #endif
 #ifdef SNDRV_BIG_ENDIAN
 #define SNDRV_PCM_FMTBIT_S16   SNDRV_PCM_FMTBIT_S16_BE
@@ -213,6 +219,8 @@ struct snd_pcm_ops {
 #define SNDRV_PCM_FMTBIT_FLOAT SNDRV_PCM_FMTBIT_FLOAT_BE
 #define SNDRV_PCM_FMTBIT_FLOAT64   SNDRV_PCM_FMTBIT_FLOAT64_BE
 #define SNDRV_PCM_FMTBIT_IEC958_SUBFRAME SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE
+#define SNDRV_PCM_FMTBIT_S20_4 SNDRV_PCM_FMTBIT_S20_4BE
+#define SNDRV_PCM_FMTBIT_U20_4 SNDRV_PCM_FMTBIT_U20_4BE
 #endif
 
 struct snd_pcm_file {
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h
index 58acd00cae19..16aec0cc96f5 100644
--- a/include/sound/soc-dai.h
+++ b/include/sound/soc-dai.h
@@ -102,6 +102,8 @@ struct snd_compr_stream;
   SNDRV_PCM_FMTBIT_S16_BE |\
   SNDRV_PCM_FMTBIT_S20_3LE |\
   SNDRV_PCM_FMTBIT_S20_3BE |\
+  SNDRV_PCM_FMTBIT_S20_4LE |\
+  SNDRV_PCM_FMTBIT_S20_4BE |\
   SNDRV_PCM_FMTBIT_S24_3LE |\
   SNDRV_PCM_FMTBIT_S24_3BE |\
SNDRV_PCM_FMTBIT_S32_LE |\
diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h
index c227ccba60ae..69b661816491 100644
--- a/include/uapi/sound/asound.h
+++ b/include/uapi/sound/asound.h
@@ -236,7 +236,11 @@ typedef int __bitwise snd_pcm_format_t;
 #defineSNDRV_PCM_FORMAT_DSD_U32_LE ((__force snd_pcm_format_t) 50) 
/* DSD, 4-byte samples DSD (x32), little endian */
 #defineSNDRV_PCM_FORMAT_DSD_U16_BE ((__force snd_pcm_format_t) 51) 
/* DSD, 2-byte samples DSD (x16), big endian */
 #defineSNDRV_PCM_FORMAT_DSD_U32_BE ((__force snd_pcm_format_t) 52) 
/* DSD, 4-byte samples DSD (x32), big endian */
-#defineSNDRV_PCM_FORMAT_LAST   SNDRV_PCM_FORMAT_DSD_U32_BE
+#defineSNDRV_PCM_FORMAT_S20_4LE((__force snd_pcm_format_t) 53) 
/* in four bytes */
+#defineSNDRV_PCM_FORMAT_S20_4BE((__force snd_pcm_format_t) 54) 
/* in four bytes */
+#defineSNDRV_PCM_FORMAT_U20_4LE((__force snd_pcm_format_t) 55) 
/* in four bytes */
+#defineSNDRV_PCM_FORMAT_U20_4BE((__force snd_pcm_format_t) 56) 
/* in four bytes */
+#defineSNDRV_PCM_FORMAT_LAST   SNDRV_PCM_FORMAT_U20_4BE
 
 #ifdef SNDRV_LITTLE_ENDIAN
 #defineSNDRV_PCM_FORMAT_S16SNDRV_PCM_FORMAT_S16_LE
@@ -248,6 +252,8 @@ typedef int __bitwise snd_pcm_format_t;
 #defineSNDRV_PCM_FORMAT_FLOAT  SNDRV_PCM_FORMAT_FLOAT_LE
 #defineSNDRV_PCM_FORMAT_FLOAT64SNDRV_PCM_FORMAT_FLOAT64_LE
 #defineSNDRV_PCM_FORMAT_IEC958_SUBFRAME 
SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
+#defineSNDRV_PCM_FORMAT_S20_4  SNDRV_PCM_FORMAT_S20_4LE
+#defineSNDRV_PCM_FORMAT_U20_4  SNDRV_PCM_FORMAT_U20_4LE
 #endif
 #ifdef SNDRV_BIG_ENDIAN
 #defineSNDRV_PCM_FORMAT_S16SNDRV_PCM_FORMAT_S16_BE
@@ -259,6 +265,8 @@ typedef int __bitwise snd_pcm_format_t;
 #defineSNDRV_PCM_FORMAT_FLOAT  SNDRV_PCM_FORMAT_FLOAT_BE
 #defineSNDRV_PCM_FORMAT_FLOAT64SNDRV_PCM_FORMAT_FLOAT64_BE
 #defineSNDRV_PCM_FORMAT_IEC958_SUBFRAME 
SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
+#define

Re: [PATCH] powernv: Avoid calling trace tlbie in kexec path.

2017-11-22 Thread Naveen N. Rao 

Mahesh J Salgaonkar wrote:

From: Mahesh Salgaonkar 

Rebooting into a new kernel with kexec fails in trace_tlbie() which is
called from native_hpte_clear(). This happens if the running kernel has
CONFIG_LOCKDEP enabled. With lockdep enabled, the tracepoints always
execute few RCU checks regardless of whether tracing is on or off.
We are already in the last phase of kexec sequence in real mode with
HILE_BE set. At this point the RCU check ends up in RCU_LOCKDEP_WARN and
causes kexec to fail.

Fix this by not calling trace_tlbie() from native_hpte_clear().

Signed-off-by: Mahesh Salgaonkar 
Reported-by: Aneesh Kumar K.V 
Suggested-by: Michael Ellerman 
---
 arch/powerpc/mm/hash_native_64.c |   15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 3848af1..640cf56 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -47,7 +47,8 @@

 DEFINE_RAW_SPINLOCK(native_tlbie_lock);

-static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
+static inline unsigned long  ___tlbie(unsigned long vpn, int psize,
+   int apsize, int ssize)
 {
unsigned long va;
unsigned int penc;
@@ -100,7 +101,15 @@ static inline void __tlbie(unsigned long vpn, int psize, 
int apsize, int ssize)
 : "memory");
break;
}
-   trace_tlbie(0, 0, va, 0, 0, 0, 0);


Does it help if you use the _rcuidle variant instead, to turn off all 
rcu checks for tracing __tlbie()?

trace_tlbie_rcuidle(0, 0, va, 0, 0, 0, 0);


- Naveen

Boot new kernel on PS3

2017-11-22 Thread Geoff Levand 
Hi,

On 11/21/2017 12:41 PM, Kevin Yeske wrote:
> I have been working on trying to get a newer kernel and Ubuntu version 
> running on the PS3 within otherOS on a PS3 slim.

There was a breakage in the kernel ABI, and the old petitboot
bootloader (ps3-petitboot-09.11.30) cannot boot kernels newer
than v3.15.

If you want to boot a newer kernel you would need to write
the new kernel into flash memory.  If you have a fat model
with firmware 3.15 or lower, do this with  with ps3-flash-util.
Since you have a slim, you'll need to ask for help in the
hacker community.

If you want to try a new kernel I recommend you start with the
latest petitboot-dev branch (currently petitboot-dev-v4.13) from
my ps3-linux repo:

  https://git.kernel.org/pub/scm/linux/kernel/git/geoff/ps3-linux.git

Use the ps3_petitboot_nfs_defconfig as a start.

I've been working on an updated petitboot, but that will only work
with fat models with firmware 3.15 or lower.

-Geoff

[PATCH] powernv: Avoid calling trace tlbie in kexec path.

2017-11-22 Thread Mahesh J Salgaonkar 
From: Mahesh Salgaonkar 

Rebooting into a new kernel with kexec fails in trace_tlbie() which is
called from native_hpte_clear(). This happens if the running kernel has
CONFIG_LOCKDEP enabled. With lockdep enabled, the tracepoints always
execute few RCU checks regardless of whether tracing is on or off.
We are already in the last phase of kexec sequence in real mode with
HILE_BE set. At this point the RCU check ends up in RCU_LOCKDEP_WARN and
causes kexec to fail.

Fix this by not calling trace_tlbie() from native_hpte_clear().

Signed-off-by: Mahesh Salgaonkar 
Reported-by: Aneesh Kumar K.V 
Suggested-by: Michael Ellerman 
---
 arch/powerpc/mm/hash_native_64.c |   15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 3848af1..640cf56 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -47,7 +47,8 @@
 
 DEFINE_RAW_SPINLOCK(native_tlbie_lock);
 
-static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
+static inline unsigned long  ___tlbie(unsigned long vpn, int psize,
+   int apsize, int ssize)
 {
unsigned long va;
unsigned int penc;
@@ -100,7 +101,15 @@ static inline void __tlbie(unsigned long vpn, int psize, 
int apsize, int ssize)
 : "memory");
break;
}
-   trace_tlbie(0, 0, va, 0, 0, 0, 0);
+   return va;
+}
+
+static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
+{
+   unsigned long rb;
+
+   rb = ___tlbie(vpn, psize, apsize, ssize);
+   trace_tlbie(0, 0, rb, 0, 0, 0, 0);
 }
 
 static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int 
ssize)
@@ -652,7 +661,7 @@ static void native_hpte_clear(void)
if (hpte_v & HPTE_V_VALID) {
hpte_decode(hptep, slot, , , , );
hptep->v = 0;
-   __tlbie(vpn, psize, apsize, ssize);
+   ___tlbie(vpn, psize, apsize, ssize);
}
}

Re: [RESEND][PATCH v2] cxl: Check if vphb exists before iterating over AFU devices

2017-11-22 Thread Frederic Barrat 



Le 22/11/2017 à 13:17, Vaibhav Jain a écrit :

During an eeh a kernel-oops is reported if no vPHB to allocated to the


typo, "to allocated". Not important, but


AFU. This happens as during AFU init, an error in creation of vPHB is
a non-fatal error. Hence afu->phb should always be checked for NULL
before iterating over it for the virtual AFU pci devices.

This patch fixes the kenel-oops by adding a NULL pointer check for
afu->phb before it is dereferenced.

Fixes: 9e8df8a2196("cxl: EEH support")
Cc: sta...@vger.kernel.org
Signed-off-by: Vaibhav Jain 
---
Changelog:

Resend -> Added the 'Fixes' info and marking the patch to stable tree [Mpe]
v2 -> Added the vphb NULL check to cxl_vphb_error_detected() [Andrew]
---
  drivers/misc/cxl/pci.c | 12 ++--
  1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index bb7fd3f4edab..18773343ab3e 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -2083,6 +2083,9 @@ static pci_ers_result_t cxl_vphb_error_detected(struct 
cxl_afu *afu,
/* There should only be one entry, but go through the list
 * anyway
 */
+   if (afu->phb == NULL)
+   return result;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) {
if (!afu_dev->driver)
continue;
@@ -2124,8 +2127,7 @@ static pci_ers_result_t cxl_pci_error_detected(struct 
pci_dev *pdev,
 * Tell the AFU drivers; but we don't care what they
 * say, we're going away.
 */
-   if (afu->phb != NULL)
-   cxl_vphb_error_detected(afu, state);
+   cxl_vphb_error_detected(afu, state);
}
return PCI_ERS_RESULT_DISCONNECT;
}
@@ -2265,6 +2267,9 @@ static pci_ers_result_t cxl_pci_slot_reset(struct pci_dev 
*pdev)
if (cxl_afu_select_best_mode(afu))
goto err;

+   if (afu->phb == NULL)
+   continue;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) 
{
/* Reset the device context.
 * TODO: make this less disruptive
@@ -2327,6 +2332,9 @@ static void cxl_pci_resume(struct pci_dev *pdev)
for (i = 0; i < adapter->slices; i++) {
afu = adapter->afu[i];

+   if (afu->phb != NULL)
+   continue;
+


.. that one is more annoying.
afu->phb == NULL?

  Fred


list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) 
{
if (afu_dev->driver && afu_dev->driver->err_handler &&
afu_dev->driver->err_handler->resume)

Re: [RFC PATCH kernel] KVM: PPC: Book3S PR: Fix WIMG handling under pHyp

2017-11-22 Thread Alexander Graf 


On 22.11.17 04:42, Alexey Kardashevskiy wrote:
> 96df226 "KVM: PPC: Book3S PR: Preserve storage control bits" added WIMG
> bits preserving but it missed 2 special cases:
> - a magic page in kvmppc_mmu_book3s_64_xlate() and
> - guest real mode in kvmppc_handle_pagefault().
> 
> For these ptes WIMG were 0 and pHyp failed on these causing a guest to
> stop in the very beginning at NIP=0x100 (due to bd9166ffe
> "KVM: PPC: Book3S PR: Exit KVM on failed mapping").
> 
> This initializes WIMG to non-zero value HPTE_R_M. The value is chosen
> as (0x192 & HPTE_R_WIMG); 0x192 is a magic value from
> kvmppc_mmu_map_page().
> 
> Fixes: 96df226 "KVM: PPC: Book3S PR: Preserve storage control bits"
> Signed-off-by: Alexey Kardashevskiy 
> ---
> 
> This indeed fixes PR KVM + VFIO under pHyp but selection of HPTE_R_M
> is arguable.

This does indeed fix the breakage we've seen:

Tested-by: Ruediger Oertel 


Alex

[PATCH] powerpc/64s: Fix Power9 DD2.1 logic in DT CPU features

2017-11-22 Thread Michael Ellerman 
I got the logic wrong in the DT CPU features code when I added the
Power9 DD2.1 feature. We should be setting the bit if we detect a
DD2.1, not clearing it if we detect a DD2.0.

This code isn't actually exercised at the moment so nothing is
actually broken.

Fixes: 3ffa9d9e2a7c ("powerpc/64s: Fix Power9 DD2.0 workarounds by adding DD2.1 
feature")
Signed-off-by: Michael Ellerman 
---
 arch/powerpc/kernel/dt_cpu_ftrs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c 
b/arch/powerpc/kernel/dt_cpu_ftrs.c
index 602e0fde19b4..8bdc2f96c5d6 100644
--- a/arch/powerpc/kernel/dt_cpu_ftrs.c
+++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
@@ -735,8 +735,8 @@ static __init void cpufeatures_cpu_quirks(void)
 */
if ((version & 0xff00) == 0x004e0100)
cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD1;
-   else if ((version & 0xefff) == 0x004e0200)
-   cur_cpu_spec->cpu_features &= ~CPU_FTR_POWER9_DD2_1;
+   else if ((version & 0xefff) == 0x004e0201)
+   cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;
 }
 
 static void __init cpufeatures_setup_finished(void)
-- 
2.14.3

[RESEND][PATCH v2] cxl: Check if vphb exists before iterating over AFU devices

2017-11-22 Thread Vaibhav Jain 
During an eeh a kernel-oops is reported if no vPHB to allocated to the
AFU. This happens as during AFU init, an error in creation of vPHB is
a non-fatal error. Hence afu->phb should always be checked for NULL
before iterating over it for the virtual AFU pci devices.

This patch fixes the kenel-oops by adding a NULL pointer check for
afu->phb before it is dereferenced.

Fixes: 9e8df8a2196("cxl: EEH support")
Cc: sta...@vger.kernel.org
Signed-off-by: Vaibhav Jain 
---
Changelog:

Resend -> Added the 'Fixes' info and marking the patch to stable tree [Mpe]
v2 -> Added the vphb NULL check to cxl_vphb_error_detected() [Andrew]
---
 drivers/misc/cxl/pci.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index bb7fd3f4edab..18773343ab3e 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -2083,6 +2083,9 @@ static pci_ers_result_t cxl_vphb_error_detected(struct 
cxl_afu *afu,
/* There should only be one entry, but go through the list
 * anyway
 */
+   if (afu->phb == NULL)
+   return result;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) {
if (!afu_dev->driver)
continue;
@@ -2124,8 +2127,7 @@ static pci_ers_result_t cxl_pci_error_detected(struct 
pci_dev *pdev,
 * Tell the AFU drivers; but we don't care what they
 * say, we're going away.
 */
-   if (afu->phb != NULL)
-   cxl_vphb_error_detected(afu, state);
+   cxl_vphb_error_detected(afu, state);
}
return PCI_ERS_RESULT_DISCONNECT;
}
@@ -2265,6 +2267,9 @@ static pci_ers_result_t cxl_pci_slot_reset(struct pci_dev 
*pdev)
if (cxl_afu_select_best_mode(afu))
goto err;
 
+   if (afu->phb == NULL)
+   continue;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) 
{
/* Reset the device context.
 * TODO: make this less disruptive
@@ -2327,6 +2332,9 @@ static void cxl_pci_resume(struct pci_dev *pdev)
for (i = 0; i < adapter->slices; i++) {
afu = adapter->afu[i];
 
+   if (afu->phb != NULL)
+   continue;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) 
{
if (afu_dev->driver && afu_dev->driver->err_handler &&
afu_dev->driver->err_handler->resume)
-- 
2.14.3

Re: [PATCH v3 10/18] powerpc/vas, nx-842: Define and use chip_to_vas_id()

2017-11-22 Thread Michael Ellerman 
Josh Boyer  writes:

> On Tue, Nov 7, 2017 at 9:23 PM, Sukadev Bhattiprolu
>  wrote:
...
>> diff --git a/arch/powerpc/platforms/powernv/vas.c 
>> b/arch/powerpc/platforms/powernv/vas.c
>> index abb7090..cd9a733 100644
>> --- a/arch/powerpc/platforms/powernv/vas.c
>> +++ b/arch/powerpc/platforms/powernv/vas.c
>> @@ -123,6 +123,17 @@ struct vas_instance *find_vas_instance(int vasid)
>> return NULL;
>>  }
>>
>> +int chip_to_vas_id(int chipid)
>> +{
>> +   int cpu;
>> +
>> +   for_each_possible_cpu(cpu) {
>> +   if (cpu_to_chip_id(cpu) == chipid)
>> +   return per_cpu(cpu_vas_id, cpu);
>> +   }
>> +   return -1;
>> +}
>> +
>
> Likely need an EXPORT_SYMBOL here?

Yep.

>> diff --git a/drivers/crypto/nx/nx-842-powernv.c 
>> b/drivers/crypto/nx/nx-842-powernv.c
>> index 874ddf5..eb221ed 100644
>> --- a/drivers/crypto/nx/nx-842-powernv.c
>> +++ b/drivers/crypto/nx/nx-842-powernv.c
>
> Did anyone test this driver built as a module with this commit included?

Clearly not.

I build allmodconfig:

  http://kisskb.ellerman.id.au/kisskb/buildresult/13207275/

Which was green.

But that doesn't enable this driver because it depends on PPC_VAS, which
depends on PPC_64K_PAGES, and allmodconfig chooses 4K pages because
that's the default in Kconfig.

I've added a config with allmodconfig + 64K pages to catch this in
future:

  http://kisskb.ellerman.id.au/kisskb/buildresult/13213014/

And we should probably flip 64K pages to be the default for 64-bit
Book3S as well, all contemporary CPUs are designed for it.

cheers

Re: [PATCH v2] powerpc: fix boot on BOOK3S_32 with CONFIG_STRICT_KERNEL_RWX

2017-11-22 Thread Michael Ellerman 
Christophe Leroy  writes:

> On powerpc32, patch_instruction() is called by apply_feature_fixups()
> which is called from early_init()
>
> There is the following note in front of early_init():
>  * Note that the kernel may be running at an address which is different
>  * from the address that it was linked at, so we must use RELOC/PTRRELOC
>  * to access static data (including strings).  -- paulus
>
> Therefore, slab_is_available() cannot be called yet, and
> text_poke_area must be addressed with PTRRELOC()
>
> Fixes: 37bc3e5fd764f ("powerpc/lib/code-patching: Use alternate map
> for patch_instruction()")

I changed this to:

  Fixes: 95902e6c8864 ("powerpc/mm: Implement STRICT_KERNEL_RWX on PPC32")
  Cc: sta...@vger.kernel.org # v4.14+

Because although the code was added in 37bc3e5fd764f, at that point it
couldn't be enabled on 32-bit, so there was no bug.

I'm not saying as the author of 95902e6c8864 that the bug is your fault,
but that is the first commit where the bug actually existed for someone
to hit.

cheers

Re: [PATCH v2] powerpc: fix boot on BOOK3S_32 with CONFIG_STRICT_KERNEL_RWX

2017-11-22 Thread Michael Ellerman 
Christophe LEROY  writes:

> Le 22/11/2017 à 00:07, Balbir Singh a écrit :
>> On Wed, Nov 22, 2017 at 1:28 AM, Christophe Leroy
>>  wrote:
>>> On powerpc32, patch_instruction() is called by apply_feature_fixups()
>>> which is called from early_init()
>>>
>>> There is the following note in front of early_init():
>>>   * Note that the kernel may be running at an address which is different
>>>   * from the address that it was linked at, so we must use RELOC/PTRRELOC
>>>   * to access static data (including strings).  -- paulus
>>>
>>> Therefore, slab_is_available() cannot be called yet, and
>>> text_poke_area must be addressed with PTRRELOC()
>>>
>>> Fixes: 37bc3e5fd764f ("powerpc/lib/code-patching: Use alternate map
>>> for patch_instruction()")
>>> Reported-by: Meelis Roos 
>>> Cc: Balbir Singh 
>>> Signed-off-by: Christophe Leroy 
>>> ---
>>>   v2: Added missing asm/setup.h
>>>
>>>   arch/powerpc/lib/code-patching.c | 6 ++
>>>   1 file changed, 2 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/powerpc/lib/code-patching.c 
>>> b/arch/powerpc/lib/code-patching.c
>>> index c9de03e0c1f1..d469224c4ada 100644
>>> --- a/arch/powerpc/lib/code-patching.c
>>> +++ b/arch/powerpc/lib/code-patching.c
>>> @@ -21,6 +21,7 @@
>>>   #include 
>>>   #include 
>>>   #include 
>>> +#include 
>>>
>>>   static int __patch_instruction(unsigned int *addr, unsigned int instr)
>>>   {
>>> @@ -146,11 +147,8 @@ int patch_instruction(unsigned int *addr, unsigned int 
>>> instr)
>>>   * During early early boot patch_instruction is called
>>>   * when text_poke_area is not ready, but we still need
>>>   * to allow patching. We just do the plain old patching
>>> -* We use slab_is_available and per cpu read * via this_cpu_read
>>> -* of text_poke_area. Per-CPU areas might not be up early
>>> -* this can create problems with just using this_cpu_read()
>>>   */
>>> -   if (!slab_is_available() || !this_cpu_read(text_poke_area))
>>> +   if (!this_cpu_read(*PTRRELOC(_poke_area)))
>>>  return __patch_instruction(addr, instr);
>> 
>> On ppc64, we call apply_feature_fixups() in early_setup() after we've
>> relocated ourselves. Sorry for missing the ppc32 case. I would like to
>> avoid PTRRELOC when unnecessary.
>
> What do you suggest then ?
>
> Some #ifdef PPC32 around that ?

No I don't think that improves anything.

I think the comment about per-cpu not being up is wrong, you'll just get
the static version of text_poke_area, which should be NULL. So we don't
need the slab_available() check anyway.

So I'll take this as-is.

Having said that I absolutely hate PTRRELOC, so if it starts spreading
we will have to come up with something less bug prone.

cheers

Re: Qoriq P5020 PowerPC board doesn't boot with the latest git version anymore

2017-11-22 Thread Michael Ellerman 
Christian Zigotzky  writes:

> Hi All,
>
> I created a patch for the git kernel today. (see attachment)
> Without the patch, the latest git kernel doesn't boot on my Cyrus Plus 
> board.

Hi Christian,

This doesn't make much sense.

Are you running any out of tree drivers or patches on this machine? Or
just 100% upstream.

I have a freescale p5020ds machine, but I don't have this Cyrus Plus
board.

What kernel config are you using, can you attach it?

When you say it "doesn't boot" what happens exactly? Do you see any
output at all?

cheers

Re: [PATCH V7 1/3] powerpc/nodes: Ensure enough nodes avail for operations

2017-11-22 Thread Michael Ellerman 
Nathan Fontenot  writes:
> On 11/16/2017 11:24 AM, Michael Bringmann wrote:
...
>> diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
>> index eb604b3..334a1ff 100644
>> --- a/arch/powerpc/mm/numa.c
>> +++ b/arch/powerpc/mm/numa.c
>> @@ -892,6 +892,37 @@ static void __init setup_node_data(int nid, u64 
>> start_pfn, u64 end_pfn)
>>  NODE_DATA(nid)->node_spanned_pages = spanned_pages;
>>  }
>> 
>> +static void __init find_possible_nodes(void)
>> +{
>> +struct device_node *rtas;
>> +u32 numnodes, i;
>> +
>> +if (min_common_depth <= 0)
>> +return;
>> +
>> +rtas = of_find_node_by_path("/rtas");
>> +if (!rtas)
>> +return;
>> +
>> +if (of_property_read_u32_index(rtas,
>> +"ibm,max-associativity-domains",
>> +min_common_depth, ))
>> +goto out;
>> +
>> +pr_info("numa: Nodes = %d (mcd = %d)\n", numnodes,
>> +min_common_depth);
>
> numa.c already has a pr_fmt define, no need to pre-pend "numa:" to the
> information message.

And in fact no need to print that out here at all, it's covered
elsewhere. So just drop that pr_info() entirely.

cheers

Re: [PATCH v2] cxl: Check if vphb exists before iterating over AFU devices

2017-11-22 Thread Michael Ellerman 
Vaibhav Jain  writes:

> During an eeh a kernel-oops is reported if no vPHB to allocated to the
> AFU. This happens as during AFU init, an error in creation of vPHB is
> a non-fatal error. Hence afu->phb should always be checked for NULL
> before iterating over it for the virtual AFU pci devices.
>
> This patch fixes the kenel-oops by adding a NULL pointer check for
> afu->phb before it is dereferenced.
>
> Signed-off-by: Vaibhav Jain 
>
> ---
> Changelog:
> v2 -> Added the vphb NULL check to cxl_vphb_error_detected() [Andrew]

Fixes: ?

Stable?

cheers

[PATCH v2] cxl: Check if vphb exists before iterating over AFU devices

2017-11-22 Thread Vaibhav Jain 
During an eeh a kernel-oops is reported if no vPHB to allocated to the
AFU. This happens as during AFU init, an error in creation of vPHB is
a non-fatal error. Hence afu->phb should always be checked for NULL
before iterating over it for the virtual AFU pci devices.

This patch fixes the kenel-oops by adding a NULL pointer check for
afu->phb before it is dereferenced.

Signed-off-by: Vaibhav Jain 

---
Changelog:
v2 -> Added the vphb NULL check to cxl_vphb_error_detected() [Andrew]
---
 drivers/misc/cxl/pci.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index bb7fd3f4edab..18773343ab3e 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -2083,6 +2083,9 @@ static pci_ers_result_t cxl_vphb_error_detected(struct 
cxl_afu *afu,
/* There should only be one entry, but go through the list
 * anyway
 */
+   if (afu->phb == NULL)
+   return result;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) {
if (!afu_dev->driver)
continue;
@@ -2124,8 +2127,7 @@ static pci_ers_result_t cxl_pci_error_detected(struct 
pci_dev *pdev,
 * Tell the AFU drivers; but we don't care what they
 * say, we're going away.
 */
-   if (afu->phb != NULL)
-   cxl_vphb_error_detected(afu, state);
+   cxl_vphb_error_detected(afu, state);
}
return PCI_ERS_RESULT_DISCONNECT;
}
@@ -2265,6 +2267,9 @@ static pci_ers_result_t cxl_pci_slot_reset(struct pci_dev 
*pdev)
if (cxl_afu_select_best_mode(afu))
goto err;
 
+   if (afu->phb == NULL)
+   continue;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) 
{
/* Reset the device context.
 * TODO: make this less disruptive
@@ -2327,6 +2332,9 @@ static void cxl_pci_resume(struct pci_dev *pdev)
for (i = 0; i < adapter->slices; i++) {
afu = adapter->afu[i];
 
+   if (afu->phb != NULL)
+   continue;
+
list_for_each_entry(afu_dev, >phb->bus->devices, bus_list) 
{
if (afu_dev->driver && afu_dev->driver->err_handler &&
afu_dev->driver->err_handler->resume)
-- 
2.14.3