Re: [PATCH 2/2] powerpc/mm: Warn if W+X pages found on boot

2019-05-01 Thread Russell Currey
> > > > +   if (radix_enabled())
> > > > +   st.start_address = PAGE_OFFSET;
> > > > +   else
> > > + st.start_address = KERN_VIRT_START;
> > > 
> > > KERN_VIRT_START doesn't exist on PPC32.
> > > 
> > > Christophe
> > > 
> > Thanks a lot for the review!  Applied all your suggestions.  What
> > should I use on PPC32 instead?
> 
> Indeed it looks like KERN_VIRT_START is defined as 0 for PPC32 at
> the 
> top of ptdump.c, which look strange to me.
> 
> I guess PAGE_OFFSET should be the good value for KERN_VIRT_START on
> PPC32.
> 
> Christophe

git blame says you put it there :) I'll set it to PAGE_OFFSET instead
of zero.  Cheers

- Russell



Re: [PATCH 2/2] powerpc/mm: Warn if W+X pages found on boot

2019-05-01 Thread Christophe Leroy




Le 01/05/2019 à 09:04, Russell Currey a écrit :

On Wed, 2019-04-24 at 09:14 +0200, Christophe Leroy wrote:


Le 24/04/2019 à 08:39, Russell Currey a écrit :

Implement code to walk all pages and warn if any are found to be
both
writable and executable.  Depends on STRICT_KERNEL_RWX enabled, and
is
behind the DEBUG_WX config option.

This only runs on boot and has no runtime performance implications.

Very heavily influenced (and in some cases copied verbatim) from
the
ARM64 code written by Laura Abbott (thanks!), since our ptdump
infrastructure is similar.

Signed-off-by: Russell Currey 
---
   arch/powerpc/Kconfig.debug | 19 +++
   arch/powerpc/include/asm/pgtable.h |  5 
   arch/powerpc/mm/pgtable_32.c   |  5 
   arch/powerpc/mm/pgtable_64.c   |  5 
   arch/powerpc/mm/ptdump/ptdump.c| 38
++
   5 files changed, 72 insertions(+)

diff --git a/arch/powerpc/Kconfig.debug
b/arch/powerpc/Kconfig.debug
index 4e00cb0a5464..a4160ff02ed4 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -361,6 +361,25 @@ config PPC_PTDUMP
   
   	  If you are unsure, say N.
   
+config DEBUG_WX


I would call it PPC_DEBUG_WX to avoid confusion.


It's the same functionality as on other architectures and is an arch-
local thing, I personally think it should be left as-is but given we
already put the PPC prefix on PTDUMP, I'll add it so it's consistent




+   if (radix_enabled())
+   st.start_address = PAGE_OFFSET;
+   else

+   st.start_address = KERN_VIRT_START;

KERN_VIRT_START doesn't exist on PPC32.

Christophe


Thanks a lot for the review!  Applied all your suggestions.  What
should I use on PPC32 instead?


Indeed it looks like KERN_VIRT_START is defined as 0 for PPC32 at the 
top of ptdump.c, which look strange to me.


I guess PAGE_OFFSET should be the good value for KERN_VIRT_START on PPC32.

Christophe



- Russell



[PATCH] powerpc/64s: remplement power4_idle code in C

2019-05-01 Thread Nicholas Piggin
This implements the tricky tracing and soft irq handling bits in C,
leaving the low level bit to asm.

A functional difference is that this redirects the interrupt exit to
a return stub to execute blr, rather than the lr address itself. This
is probably irrelevant or barely measurable on real hardware, but it
follows the modern practice of balancing the link stack.

Tested with QEMU.

Signed-off-by: Nicholas Piggin 
---
 arch/powerpc/include/asm/processor.h |  3 +
 arch/powerpc/kernel/Makefile |  3 +-
 arch/powerpc/kernel/exceptions-64s.S |  9 ---
 arch/powerpc/kernel/idle.c   | 25 
 arch/powerpc/kernel/idle_book3s.S| 35 +++
 arch/powerpc/kernel/idle_power4.S| 87 
 arch/powerpc/platforms/Kconfig   |  4 ++
 7 files changed, 68 insertions(+), 98 deletions(-)
 delete mode 100644 arch/powerpc/kernel/idle_power4.S

diff --git a/arch/powerpc/include/asm/processor.h 
b/arch/powerpc/include/asm/processor.h
index 706ac5df546f..c0d870c57061 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -418,6 +418,9 @@ static inline unsigned long get_clean_sp(unsigned long sp, 
int is_32)
 extern unsigned long isa300_idle_stop_noloss(unsigned long psscr_val);
 extern unsigned long isa300_idle_stop_mayloss(unsigned long psscr_val);
 extern unsigned long isa206_idle_insn_mayloss(unsigned long type);
+#ifdef CONFIG_PPC_970_NAP
+extern void power4_idle_nap(void);
+#endif
 
 extern unsigned long cpuidle_disable;
 enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index cddadccf551d..2af8ee47b2ee 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -51,8 +51,7 @@ obj-$(CONFIG_PPC_BOOK3E_64)   += exceptions-64e.o 
idle_book3e.o
 obj-$(CONFIG_PPC_BARRIER_NOSPEC) += security.o
 obj-$(CONFIG_PPC64)+= vdso64/
 obj-$(CONFIG_ALTIVEC)  += vecemu.o
-obj-$(CONFIG_PPC_970_NAP)  += idle_power4.o
-obj-$(CONFIG_PPC_P7_NAP)   += idle_book3s.o
+obj-$(CONFIG_PPC_BOOK3S_IDLE)  += idle_book3s.o
 procfs-y   := proc_powerpc.o
 obj-$(CONFIG_PROC_FS)  += $(procfs-y)
 rtaspci-$(CONFIG_PPC64)-$(CONFIG_PCI)  := rtas_pci.o
diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index 6b86055e5251..e173690dad52 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -1683,15 +1683,6 @@ USE_FIXED_SECTION(virt_trampolines)
 __end_interrupts:
 DEFINE_FIXED_SYMBOL(__end_interrupts)
 
-#ifdef CONFIG_PPC_970_NAP
-EXC_COMMON_BEGIN(power4_fixup_nap)
-   andcr9,r9,r10
-   std r9,TI_LOCAL_FLAGS(r11)
-   ld  r10,_LINK(r1)   /* make idle task do the */
-   std r10,_NIP(r1)/* equivalent of a blr */
-   blr
-#endif
-
 CLOSE_FIXED_SECTION(real_vectors);
 CLOSE_FIXED_SECTION(real_trampolines);
 CLOSE_FIXED_SECTION(virt_vectors);
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index d7216c9abda1..605defde43b9 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -81,6 +81,31 @@ void arch_cpu_idle(void)
 
 int powersave_nap;
 
+#ifdef CONFIG_PPC_970_NAP
+void power4_idle(void)
+{
+   if (!cpu_has_feature(CPU_FTR_CAN_NAP))
+   return;
+
+   if (!powersave_nap)
+   return;
+
+   if (!prep_irq_for_idle())
+   return;
+
+   if (cpu_has_feature(CPU_FTR_ALTIVEC))
+   asm volatile("DSSALL ; sync" ::: "memory");
+
+   power4_idle_nap();
+
+   /*
+* power4_idle_nap returns with interrupts enabled (soft and hard).
+* to our caller with interrupts enabled (soft and hard). Our caller
+* can cope with either interrupts disabled or enabled upon return.
+*/
+}
+#endif
+
 #ifdef CONFIG_SYSCTL
 /*
  * Register the sysctl to set/clear powersave_nap.
diff --git a/arch/powerpc/kernel/idle_book3s.S 
b/arch/powerpc/kernel/idle_book3s.S
index 2dfbd5d5b932..5afac9177fec 100644
--- a/arch/powerpc/kernel/idle_book3s.S
+++ b/arch/powerpc/kernel/idle_book3s.S
@@ -19,7 +19,9 @@
 #include 
 #include 
 #include 
+#include  /* TLF_NAPPING */
 
+#ifdef CONFIG_PPC_P7_NAP
 /*
  * Desired PSSCR in r3
  *
@@ -185,4 +187,37 @@ _GLOBAL(isa206_idle_insn_mayloss)
bne 2f
IDLE_STATE_ENTER_SEQ_NORET(PPC_SLEEP)
 2: IDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE)
+#endif
 
+#ifdef CONFIG_PPC_970_NAP
+_GLOBAL(power4_idle_nap)
+   LOAD_REG_IMMEDIATE(r7, MSR_KERNEL|MSR_EE|MSR_POW)
+   ld  r9,PACA_THREAD_INFO(r13)
+   ld  r8,TI_LOCAL_FLAGS(r9)
+   ori r8,r8,_TLF_NAPPING
+   std r8,TI_LOCAL_FLAGS(r9)
+   /*
+* NAPPING bit is set, from this point onward power4_fixup_nap
+* will cause exceptions to return to power4_idle_nap_return.
+*/
+1: sync
+   isync
+   mtmsrd  r7
+   isync
+ 

[PATCH] powerpc/64: Don't trace code that runs with the soft irq mask unreconciled

2019-05-01 Thread Nicholas Piggin
"Reconciling" in terms of interrupt handling, is to bring the soft irq
mask state in to synch with the hardware, after an interrupt causes
MSR[EE] to be cleared (while the soft mask may be enabled, and hard
irqs not marked disabled).

General kernel code should not be called while unreconciled, because
local_irq_disable, etc. manipulations can cause surprising irq traces,
and it's fragile because the soft irq code does not really expect to
be called in this situation.

When exiting from an interrupt, MSR[EE] is cleared to prevent races,
but soft irq state is enabled for the returned-to context, so this is
now an unreconciled state. restore_math is called in this state, and
that can be ftraced, and the ftrace subsystem disables local irqs.

Mark restore_math and its callees as notrace. Restore a sanity check
in the soft irq code that had to be disabled for this case, by commit
4da1f79227ad4 ("powerpc/64: Disable irq restore warning for now").

Signed-off-by: Nicholas Piggin 
---
 arch/powerpc/kernel/fpu.S |  1 +
 arch/powerpc/kernel/irq.c | 13 +++--
 arch/powerpc/kernel/process.c | 18 +++---
 arch/powerpc/kernel/vector.S  |  1 +
 4 files changed, 20 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index 529dcc21c3f9..cecd57e1d046 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -63,6 +63,7 @@ _GLOBAL(load_fp_state)
REST_32FPVSRS(0, R4, R3)
blr
 EXPORT_SYMBOL(load_fp_state)
+_ASM_NOKPROBE_SYMBOL(load_fp_state); /* used by restore_math */
 
 /*
  * Store FP state into memory, including FPSCR
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 8a936723c791..083934ecabb2 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -261,16 +261,9 @@ notrace void arch_local_irq_restore(unsigned long mask)
 */
irq_happened = get_irq_happened();
if (!irq_happened) {
-   /*
-* FIXME. Here we'd like to be able to do:
-*
-* #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
-*   WARN_ON(!(mfmsr() & MSR_EE));
-* #endif
-*
-* But currently it hits in a few paths, we should fix those and
-* enable the warning.
-*/
+#ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
+   WARN_ON(!(mfmsr() & MSR_EE));
+#endif
return;
}
 
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index f7b2e3b3db28..c4279e1a4a38 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -133,7 +133,8 @@ static int __init enable_strict_msr_control(char *str)
 }
 early_param("ppc_strict_facility_enable", enable_strict_msr_control);
 
-unsigned long msr_check_and_set(unsigned long bits)
+/* notrace because it's called by restore_math */
+unsigned long notrace msr_check_and_set(unsigned long bits)
 {
unsigned long oldmsr = mfmsr();
unsigned long newmsr;
@@ -152,7 +153,8 @@ unsigned long msr_check_and_set(unsigned long bits)
 }
 EXPORT_SYMBOL_GPL(msr_check_and_set);
 
-void __msr_check_and_clear(unsigned long bits)
+/* notrace because it's called by restore_math */
+void notrace __msr_check_and_clear(unsigned long bits)
 {
unsigned long oldmsr = mfmsr();
unsigned long newmsr;
@@ -525,7 +527,17 @@ void giveup_all(struct task_struct *tsk)
 }
 EXPORT_SYMBOL(giveup_all);
 
-void restore_math(struct pt_regs *regs)
+/*
+ * The exception exit path calls restore_math() with interrupts hard disabled
+ * but the soft irq state not "reconciled". ftrace code that calls
+ * local_irq_save/restore causes warnings.
+ *
+ * Rather than complicate the exit path, just don't trace restore_math. This
+ * could be done by having ftrace entry code check for this un-reconciled
+ * condition where MSR[EE]=0 and PACA_IRQ_HARD_DIS is not set, and
+ * temporarily fix it up for the duration of the ftrace call.
+ */
+void notrace restore_math(struct pt_regs *regs)
 {
unsigned long msr;
 
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index 21165da0052d..8eb867dbad5f 100644
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -21,6 +21,7 @@ _GLOBAL(load_vr_state)
REST_32VRS(0,r4,r3)
blr
 EXPORT_SYMBOL(load_vr_state)
+_ASM_NOKPROBE_SYMBOL(load_vr_state); /* used by restore_math */
 
 /*
  * Store VMX state into memory, including VSCR.
-- 
2.20.1



RE: [PATCH] crypto: caam/jr - Remove extra memory barrier during job ring dequeue

2019-05-01 Thread Michael Ellerman
Vakul Garg  writes:
>> -Original Message-
>> From: Michael Ellerman 
>> Sent: Wednesday, May 1, 2019 11:20 AM
>> To: Vakul Garg 
>> Cc: linux-cry...@vger.kernel.org; Aymen Sghaier
>> ; da...@davemloft.net;
>> herb...@gondor.apana.org.au; Horia Geanta ;
>> linuxppc-dev@lists.ozlabs.org
>> Subject: Re: [PATCH] crypto: caam/jr - Remove extra memory barrier during
>> job ring dequeue
>> 
>> Vakul Garg wrote:
>> > In function caam_jr_dequeue(), a full memory barrier is used before
>> > writing response job ring's register to signal removal of the
>> > completed job. Therefore for writing the register, we do not need
>> > another write memory barrier. Hence it is removed by replacing the
>> > call to wr_reg32() with a newly defined function wr_reg32_relaxed().
>> >
>> > Signed-off-by: Vakul Garg 
>> > ---
>> >  drivers/crypto/caam/jr.c   | 2 +-
>> >  drivers/crypto/caam/regs.h | 8 
>> >  2 files changed, 9 insertions(+), 1 deletion(-)
>> >
>> > diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c index
>> > 4e9b3fca5627..2ce6d7d2ad72 100644
>> > --- a/drivers/crypto/caam/jr.c
>> > +++ b/drivers/crypto/caam/jr.c
>> > @@ -266,7 +266,7 @@ static void caam_jr_dequeue(unsigned long
>> devarg)
>> >mb();
>> >
>> >/* set done */
>> > -  wr_reg32(>rregs->outring_rmvd, 1);
>> > +  wr_reg32_relaxed(>rregs->outring_rmvd, 1);
>> >
>> >jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) &
>> >   (JOBR_DEPTH - 1);
>> > diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h
>> > index 3cd0822ea819..9e912c722e33 100644
>> > --- a/drivers/crypto/caam/regs.h
>> > +++ b/drivers/crypto/caam/regs.h
>> > @@ -96,6 +96,14 @@ cpu_to_caam(16)
>> >  cpu_to_caam(32)
>> >  cpu_to_caam(64)
>> >
>> > +static inline void wr_reg32_relaxed(void __iomem *reg, u32 data) {
>> > +  if (caam_little_end)
>> > +  writel_relaxed(data, reg);
>> > +  else
>> > +  writel_relaxed(cpu_to_be32(data), reg); }
>> > +
>> >  static inline void wr_reg32(void __iomem *reg, u32 data)  {
>> >if (caam_little_end)
>> 
>> This crashes on my p5020ds. Did you test on powerpc?
>> 
> I did not test on powerpc.

OK, so I might be the first person who has :)

>> # first bad commit: [bbfcac5ff5f26aafa51935a62eb86b6eacfe8a49] crypto:
>> caam/jr - Remove extra memory barrier during job ring dequeue
>> 
>> Log:
>> 
>>   [ cut here ]
>>   kernel BUG at drivers/crypto/caam/jr.c:191!
>>   Oops: Exception in kernel mode, sig: 5 [#1]
>>   BE PAGE_SIZE=4K SMP NR_CPUS=24 CoreNet Generic
>>   Modules linked in:
>>   CPU: 1 PID: 0 Comm: swapper/1 Not tainted 5.1.0-rc1-gcc-8.2.0-00060-
>> gbbfcac5ff5f2 #31
>>   NIP:  c079d704 LR: c079d498 CTR: c0086914
>>   REGS: c000fffc7970 TRAP: 0700   Not tainted  (5.1.0-rc1-gcc-8.2.0-
>> 00060-gbbfcac5ff5f2)
>>   MSR:  80029000   CR: 28008484  XER: 
>>   IRQMASK: 0
>>   GPR00: c079d6b0 c000fffc7c00 c0fbc800
>> 0001
>>   GPR04: 7e080080 ffc0 0001
>> 67d7
>>   GPR08: 880401a9  0001
>> fa83b2da
>>   GPR12: 28008224 c0003800 c0fc20b0
>> 0100
>>   GPR16: 8920f09520bea117 c0def480 
>> 0001
>>   GPR20: c0fc3940 c000f3537e18 0001
>> c1026cc5
>>   GPR24: 0001 c000f3328000 0001
>> c000f3451010
>>   GPR28:  0001 
>> 
>>   NIP [c079d704] .caam_jr_dequeue+0x2f0/0x410
>>   LR [c079d498] .caam_jr_dequeue+0x84/0x410
>>   Call Trace:
>>   [c000fffc7c00] [c079d6b0] .caam_jr_dequeue+0x29c/0x410
>> (unreliable)
>>   [c000fffc7cd0] [c004fef0]
>> .tasklet_action_common.isra.3+0xac/0x180
>>   [c000fffc7d80] [c0a2f99c] .__do_softirq+0x174/0x3f8
>>   [c000fffc7e90] [c004fb94] .irq_exit+0xc4/0xdc
>>   [c000fffc7f00] [c0007348] .__do_irq+0x8c/0x1b0
>>   [c000fffc7f90] [c00150c4] .call_do_irq+0x14/0x24
>>   [c000f3137930] [c00074e4] .do_IRQ+0x78/0xd4
>>   [c000f31379c0] [c0019998]
>> exc_0x500_common+0xfc/0x100
>>   --- interrupt: 501 at .book3e_idle+0x24/0x5c
>>   LR = .book3e_idle+0x24/0x5c
>>   [c000f3137cc0] [c000a6a4] .arch_cpu_idle+0x34/0xa0
>> (unreliable)
>>   [c000f3137d30] [c0a2f2e8] .default_idle_call+0x5c/0x70
>>   [c000f3137da0] [c0084210] .do_idle+0x1b0/0x1f4
>>   [c000f3137e40] [c0084434] .cpu_startup_entry+0x28/0x30
>>   [c000f3137eb0] [c0021538] .start_secondary+0x59c/0x5b0
>>   [c000f3137f90] [c45c]
>> start_secondary_prolog+0x10/0x14
>>   Instruction dump:
>>   7d284a14 e9290018 2fa9 40de001c 3bbd0001 57bd05fe 7d3db050
>> 712901ff
>>   

Re: [PATCH v2 6/6] soc/fsl/qe: qe.c: fold qe_get_num_of_snums into qe_snums_init

2019-05-01 Thread Christophe Leroy




Le 01/05/2019 à 11:29, Rasmus Villemoes a écrit :

The comment "No QE ever has fewer than 28 SNUMs" is false; e.g. the
MPC8309 has 14. The code path returning -EINVAL is also a recipe for
instant disaster, since the caller (qe_snums_init) uncritically
assigns the return value to the unsigned qe_num_of_snum, and would
thus proceed to attempt to copy 4GB from snum_init_46[] to the snum[]
array.

So fold the handling of the legacy fsl,qe-num-snums into
qe_snums_init, and make sure we do not end up using the snum_init_46
array in cases other than the two where we know it makes sense.

Signed-off-by: Rasmus Villemoes 


Reviewed-by: Christophe Leroy 


---
  drivers/soc/fsl/qe/qe.c | 46 ++---
  1 file changed, 16 insertions(+), 30 deletions(-)

diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 325d689cbf5c..276d7d78ebfc 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -308,24 +308,33 @@ static void qe_snums_init(void)
int i;
  
  	bitmap_zero(snum_state, QE_NUM_OF_SNUM);

+   qe_num_of_snum = 28; /* The default number of snum for threads is 28 */
qe = qe_get_device_node();
if (qe) {
i = of_property_read_variable_u8_array(qe, "fsl,qe-snums",
   snums, 1, 
QE_NUM_OF_SNUM);
-   of_node_put(qe);
if (i > 0) {
+   of_node_put(qe);
qe_num_of_snum = i;
return;
}
+   /*
+* Fall back to legacy binding of using the value of
+* fsl,qe-num-snums to choose one of the static arrays
+* above.
+*/
+   of_property_read_u32(qe, "fsl,qe-num-snums", _num_of_snum);
+   of_node_put(qe);
}
  
-	qe_num_of_snum = qe_get_num_of_snums();

-
-   if (qe_num_of_snum == 76)
+   if (qe_num_of_snum == 76) {
snum_init = snum_init_76;
-   else
+   } else if (qe_num_of_snum == 28 || qe_num_of_snum == 46) {
snum_init = snum_init_46;
-
+   } else {
+   pr_err("QE: unsupported value of fsl,qe-num-snums: %u\n", 
qe_num_of_snum);
+   return;
+   }
memcpy(snums, snum_init, qe_num_of_snum);
  }
  
@@ -641,30 +650,7 @@ EXPORT_SYMBOL(qe_get_num_of_risc);
  
  unsigned int qe_get_num_of_snums(void)

  {
-   struct device_node *qe;
-   int size;
-   unsigned int num_of_snums;
-   const u32 *prop;
-
-   num_of_snums = 28; /* The default number of snum for threads is 28 */
-   qe = qe_get_device_node();
-   if (!qe)
-   return num_of_snums;
-
-   prop = of_get_property(qe, "fsl,qe-num-snums", );
-   if (prop && size == sizeof(*prop)) {
-   num_of_snums = *prop;
-   if ((num_of_snums < 28) || (num_of_snums > QE_NUM_OF_SNUM)) {
-   /* No QE ever has fewer than 28 SNUMs */
-   pr_err("QE: number of snum is invalid\n");
-   of_node_put(qe);
-   return -EINVAL;
-   }
-   }
-
-   of_node_put(qe);
-
-   return num_of_snums;
+   return qe_num_of_snum;
  }
  EXPORT_SYMBOL(qe_get_num_of_snums);
  



Re: [PATCH v2 5/6] soc/fsl/qe: qe.c: support fsl,qe-snums property

2019-05-01 Thread Christophe Leroy




Le 01/05/2019 à 11:29, Rasmus Villemoes a écrit :

Add driver support for the newly introduced fsl,qe-snums property.

Conveniently, of_property_read_variable_u8_array does exactly what we
need: If the property fsl,qe-snums is found (and has an allowed size),
the array of values get copied to snums, and the return value is the
number of snums - we cannot assign directly to num_of_snums, since we
need to check whether the return value is negative.

Signed-off-by: Rasmus Villemoes 


Reviewed-by: Christophe Leroy 


---
  drivers/soc/fsl/qe/qe.c | 16 ++--
  1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 0fb8b59f61ad..325d689cbf5c 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -283,7 +283,6 @@ EXPORT_SYMBOL(qe_clock_source);
   */
  static void qe_snums_init(void)
  {
-   int i;
static const u8 snum_init_76[] = {
0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,
0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,
@@ -304,7 +303,21 @@ static void qe_snums_init(void)
0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59,
0x68, 0x69, 0x78, 0x79, 0x80, 0x81,
};
+   struct device_node *qe;
const u8 *snum_init;
+   int i;
+
+   bitmap_zero(snum_state, QE_NUM_OF_SNUM);
+   qe = qe_get_device_node();
+   if (qe) {
+   i = of_property_read_variable_u8_array(qe, "fsl,qe-snums",
+  snums, 1, 
QE_NUM_OF_SNUM);
+   of_node_put(qe);
+   if (i > 0) {
+   qe_num_of_snum = i;
+   return;
+   }
+   }
  
  	qe_num_of_snum = qe_get_num_of_snums();
  
@@ -313,7 +326,6 @@ static void qe_snums_init(void)

else
snum_init = snum_init_46;
  
-	bitmap_zero(snum_state, QE_NUM_OF_SNUM);

memcpy(snums, snum_init, qe_num_of_snum);
  }
  



Re: [PATCH v2 2/6] soc/fsl/qe: qe.c: reduce static memory footprint by 1.7K

2019-05-01 Thread Christophe Leroy




Le 01/05/2019 à 11:29, Rasmus Villemoes a écrit :

The current array of struct qe_snum use 256*4 bytes for just keeping
track of the free/used state of each index, and the struct layout
means there's another 768 bytes of padding. If we just unzip that
structure, the array of snum values just use 256 bytes, while the
free/inuse state can be tracked in a 32 byte bitmap.

So this reduces the .data footprint by 1760 bytes. It also serves as
preparation for introducing another DT binding for specifying the snum
values.

Signed-off-by: Rasmus Villemoes 


Reviewed-by: Christophe Leroy 

Trivial comment below


---
  drivers/soc/fsl/qe/qe.c | 43 -
  1 file changed, 12 insertions(+), 31 deletions(-)

diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 855373deb746..303aa29cb27d 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -14,6 +14,7 @@
   * Free Software Foundation;  either version 2 of the  License, or (at your
   * option) any later version.
   */
+#include 
  #include 
  #include 
  #include 
@@ -43,25 +44,14 @@ static DEFINE_SPINLOCK(qe_lock);
  DEFINE_SPINLOCK(cmxgcr_lock);
  EXPORT_SYMBOL(cmxgcr_lock);
  
-/* QE snum state */

-enum qe_snum_state {
-   QE_SNUM_STATE_USED,
-   QE_SNUM_STATE_FREE
-};
-
-/* QE snum */
-struct qe_snum {
-   u8 num;
-   enum qe_snum_state state;
-};
-
  /* We allocate this here because it is used almost exclusively for
   * the communication processor devices.
   */
  struct qe_immap __iomem *qe_immr;
  EXPORT_SYMBOL(qe_immr);
  
-static struct qe_snum snums[QE_NUM_OF_SNUM];	/* Dynamically allocated SNUMs */

+static u8 snums[QE_NUM_OF_SNUM];   /* Dynamically allocated SNUMs */
+static DECLARE_BITMAP(snum_state, QE_NUM_OF_SNUM);
  static unsigned int qe_num_of_snum;
  
  static phys_addr_t qebase = -1;

@@ -315,10 +305,8 @@ static void qe_snums_init(void)
else
snum_init = snum_init_46;
  
-	for (i = 0; i < qe_num_of_snum; i++) {

-   snums[i].num = snum_init[i];
-   snums[i].state = QE_SNUM_STATE_FREE;
-   }
+   bitmap_zero(snum_state, QE_NUM_OF_SNUM);
+   memcpy(snums, snum_init, qe_num_of_snum);
  }
  
  int qe_get_snum(void)

@@ -328,12 +316,10 @@ int qe_get_snum(void)
int i;
  
  	spin_lock_irqsave(_lock, flags);

-   for (i = 0; i < qe_num_of_snum; i++) {
-   if (snums[i].state == QE_SNUM_STATE_FREE) {
-   snums[i].state = QE_SNUM_STATE_USED;
-   snum = snums[i].num;
-   break;
-   }
+   i = find_first_zero_bit(snum_state, qe_num_of_snum);
+   if (i < qe_num_of_snum) {
+   set_bit(i, snum_state);
+   snum = snums[i];
}
spin_unlock_irqrestore(_lock, flags);
  
@@ -343,14 +329,9 @@ EXPORT_SYMBOL(qe_get_snum);
  
  void qe_put_snum(u8 snum)

  {
-   int i;
-
-   for (i = 0; i < qe_num_of_snum; i++) {
-   if (snums[i].num == snum) {
-   snums[i].state = QE_SNUM_STATE_FREE;
-   break;
-   }
-   }
+   const u8 *p = memchr(snums, snum, qe_num_of_snum);


A blank line is expected here.

Christophe


+   if (p)
+   clear_bit(p - snums, snum_state);
  }
  EXPORT_SYMBOL(qe_put_snum);
  



Re: [PATCH V5] ASoC: fsl_esai: Fix missing break in switch statement

2019-05-01 Thread Gustavo A. R. Silva
Mark,

I wonder if you are going to take this patch.

Thanks
--
Gustavo

On 4/11/19 3:43 AM, S.j. Wang wrote:
> case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be
> independent of each other, so replace fall-through with break.
> 
> Fixes: 43d24e76b698 ("ASoC: fsl_esai: Add ESAI CPU DAI driver")
> Signed-off-by: Shengjiu Wang 
> Acked-by: Nicolin Chen 
> Cc: 
> ---
> Changes in v5
> - remove new line after Fixes
> 
> Changes in v4
> - Add acked-by
> 
> Changes in v3
> - Update subject line and cc stable
> 
> Changes in v2
> - Fix "Fixes" tag
> 
>  sound/soc/fsl/fsl_esai.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c
> index 3623aa9a6f2e..15202a637197 100644
> --- a/sound/soc/fsl/fsl_esai.c
> +++ b/sound/soc/fsl/fsl_esai.c
> @@ -251,7 +251,7 @@ static int fsl_esai_set_dai_sysclk(struct snd_soc_dai 
> *dai, int clk_id,
>   break;
>   case ESAI_HCKT_EXTAL:
>   ecr |= ESAI_ECR_ETI;
> - /* fall through */
> + break;
>   case ESAI_HCKR_EXTAL:
>   ecr |= ESAI_ECR_ERI;
>   break;
> 


Re: [PATCH 2/5] powerpc: don't use asm-generic/ptrace.h

2019-05-01 Thread Michael Ellerman
Christoph Hellwig  writes:

> Doing the indirection through macros for the regs accessors just
> makes them harder to read, so implement the helpers directly.
>
> Note that only the helpers actually used are implemented now.
>
> Signed-off-by: Christoph Hellwig 
> ---
>  arch/powerpc/include/asm/ptrace.h | 29 ++---
>  1 file changed, 22 insertions(+), 7 deletions(-)

Looks fine, thanks.

Acked-by: Michael Ellerman 

cheers

> diff --git a/arch/powerpc/include/asm/ptrace.h 
> b/arch/powerpc/include/asm/ptrace.h
> index 64271e562fed..5d30944f1f6b 100644
> --- a/arch/powerpc/include/asm/ptrace.h
> +++ b/arch/powerpc/include/asm/ptrace.h
> @@ -108,18 +108,33 @@ struct pt_regs
>  
>  #ifndef __ASSEMBLY__
>  
> -#define GET_IP(regs) ((regs)->nip)
> -#define GET_USP(regs)((regs)->gpr[1])
> -#define GET_FP(regs) (0)
> -#define SET_FP(regs, val)
> +static inline unsigned long instruction_pointer(struct pt_regs *regs)
> +{
> + return regs->nip;
> +}
> +
> +static inline void instruction_pointer_set(struct pt_regs *regs,
> + unsigned long val)
> +{
> + regs->nip = val;
> +}
> +
> +static inline unsigned long user_stack_pointer(struct pt_regs *regs)
> +{
> + return regs->gpr[1];
> +}
> +
> +static inline unsigned long frame_pointer(struct pt_regs *regs)
> +{
> + return 0;
> +}
>  
>  #ifdef CONFIG_SMP
>  extern unsigned long profile_pc(struct pt_regs *regs);
> -#define profile_pc profile_pc
> +#else
> +#define profile_pc(regs) instruction_pointer(regs)
>  #endif
>  
> -#include 
> -
>  #define kernel_stack_pointer(regs) ((regs)->gpr[1])
>  static inline int is_syscall_success(struct pt_regs *regs)
>  {
> -- 
> 2.20.1


Re: [PATCH V4] ASoC: fsl_esai: Add pm runtime function

2019-05-01 Thread Mark Brown
On Sun, Apr 28, 2019 at 02:24:54AM +, S.j. Wang wrote:
> Add pm runtime support and move clock handling there.
> Close the clocks at suspend to reduce the power consumption.
> 
> fsl_esai_suspend is replaced by pm_runtime_force_suspend.
> fsl_esai_resume is replaced by pm_runtime_force_resume.

This doesn't apply against for-5.2 again.  Sorry about this, I think
this one is due to some messups with my scripts which caused some
patches to be dropped for a while (and it's likely to be what happened
the last time as well).  Can you check and resend again please?  Like I
say sorry about this, I think it's my mistake.


signature.asc
Description: PGP signature


Applied "ASoC: fsl_micfil: Remove set but not used variable 'osr'" to the asoc tree

2019-05-01 Thread Mark Brown
The patch

   ASoC: fsl_micfil: Remove set but not used variable 'osr'

has been applied to the asoc tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From a0c34c7629bee46ffd8121987d27df25a6433cc7 Mon Sep 17 00:00:00 2001
From: YueHaibing 
Date: Wed, 17 Apr 2019 23:09:15 +0800
Subject: [PATCH] ASoC: fsl_micfil: Remove set but not used variable 'osr'

Fixes gcc '-Wunused-but-set-variable' warning:

sound/soc/fsl/fsl_micfil.c: In function 'get_clk_div':
sound/soc/fsl/fsl_micfil.c:154:6: warning: variable 'osr' set but not used 
[-Wunused-but-set-variable]

It is never used since introduction in
commit 47a70e6fc9a8 ("ASoC: Add MICFIL SoC Digital Audio Interface driver.")

Signed-off-by: YueHaibing 
Signed-off-by: Mark Brown 
---
 sound/soc/fsl/fsl_micfil.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c
index 40c07e756481..f7f2d29f1bfe 100644
--- a/sound/soc/fsl/fsl_micfil.c
+++ b/sound/soc/fsl/fsl_micfil.c
@@ -151,12 +151,9 @@ static inline int get_clk_div(struct fsl_micfil *micfil,
 {
u32 ctrl2_reg;
long mclk_rate;
-   int osr;
int clk_div;
 
regmap_read(micfil->regmap, REG_MICFIL_CTRL2, _reg);
-   osr = 16 - ((ctrl2_reg & MICFIL_CTRL2_CICOSR_MASK)
-   >> MICFIL_CTRL2_CICOSR_SHIFT);
 
mclk_rate = clk_get_rate(micfil->mclk);
 
-- 
2.20.1



Applied "ASoC: mpc5200_dma: Fix invalid license ID" to the asoc tree

2019-05-01 Thread Mark Brown
The patch

   ASoC: mpc5200_dma: Fix invalid license ID

has been applied to the asoc tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From ac097cac496f69e97083c6b128c5a209a85c6fcb Mon Sep 17 00:00:00 2001
From: Andra Danciu 
Date: Sun, 14 Apr 2019 22:14:49 +0300
Subject: [PATCH] ASoC: mpc5200_dma: Fix invalid license ID

As the file had no other license notice/reference, it falls under the
project license and therefore the proper SPDX id is: GPL-2.0-only

Cc: Daniel Baluta 
Fixes: 1edfc2485d8dc ("ASoC: mpc5200_dma: Switch to SPDX identifier")
Reported-by: Thomas Gleixner 
Signed-off-by: Andra Danciu 
Signed-off-by: Mark Brown 
---
 sound/soc/fsl/mpc5200_dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/fsl/mpc5200_dma.c b/sound/soc/fsl/mpc5200_dma.c
index 4396442c2fdd..ccf9301889fe 100644
--- a/sound/soc/fsl/mpc5200_dma.c
+++ b/sound/soc/fsl/mpc5200_dma.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL
+// SPDX-License-Identifier: GPL-2.0-only
 //
 // Freescale MPC5200 PSC DMA
 // ALSA SoC Platform driver
-- 
2.20.1



Applied "ASoC: mpc5200_psc_i2s: Fix invalid license ID" to the asoc tree

2019-05-01 Thread Mark Brown
The patch

   ASoC: mpc5200_psc_i2s: Fix invalid license ID

has been applied to the asoc tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 680ae69d52279474ecb204f0f7bae1f4d9361cbd Mon Sep 17 00:00:00 2001
From: Andra Danciu 
Date: Sun, 14 Apr 2019 22:14:50 +0300
Subject: [PATCH] ASoC: mpc5200_psc_i2s: Fix invalid license ID

As the file had no other license notice/reference, it falls under the
project license and therefore the proper SPDX id is: GPL-2.0-only

Cc: Daniel Baluta 
Fixes: 864a8472c4412 ("ASoC: mpc5200_psc_i2s: Switch to SPDX identifier")
Reported-by: Thomas Gleixner 
Signed-off-by: Andra Danciu 
Signed-off-by: Mark Brown 
---
 sound/soc/fsl/mpc5200_psc_i2s.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/fsl/mpc5200_psc_i2s.c b/sound/soc/fsl/mpc5200_psc_i2s.c
index 6de97461ba25..9bc01f374b39 100644
--- a/sound/soc/fsl/mpc5200_psc_i2s.c
+++ b/sound/soc/fsl/mpc5200_psc_i2s.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL
+// SPDX-License-Identifier: GPL-2.0-only
 //
 // Freescale MPC5200 PSC in I2S mode
 // ALSA SoC Digital Audio Interface (DAI) driver
-- 
2.20.1



Applied "ASoC: fsl_audmix: cache pdev->dev pointer" to the asoc tree

2019-05-01 Thread Mark Brown
The patch

   ASoC: fsl_audmix: cache pdev->dev pointer

has been applied to the asoc tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 62be484f7ad8443c393293a415392fbf3190c864 Mon Sep 17 00:00:00 2001
From: Viorel Suman 
Date: Wed, 10 Apr 2019 11:06:39 +
Subject: [PATCH] ASoC: fsl_audmix: cache pdev->dev pointer

There should be no trouble to understand dev = pdev->dev.
This can save some space to have more print info or save
some wrapped lines.

Signed-off-by: Viorel Suman 
Suggested-by: Nicolin Chen 
Signed-off-by: Mark Brown 
---
 sound/soc/fsl/fsl_audmix.c | 27 +--
 1 file changed, 13 insertions(+), 14 deletions(-)

diff --git a/sound/soc/fsl/fsl_audmix.c b/sound/soc/fsl/fsl_audmix.c
index dc802d5c4ccd..3897a54a11fe 100644
--- a/sound/soc/fsl/fsl_audmix.c
+++ b/sound/soc/fsl/fsl_audmix.c
@@ -456,6 +456,7 @@ MODULE_DEVICE_TABLE(of, fsl_audmix_ids);
 
 static int fsl_audmix_probe(struct platform_device *pdev)
 {
+   struct device *dev = >dev;
struct fsl_audmix *priv;
struct resource *res;
const char *mdrv;
@@ -463,52 +464,50 @@ static int fsl_audmix_probe(struct platform_device *pdev)
void __iomem *regs;
int ret;
 
-   of_id = of_match_device(fsl_audmix_ids, >dev);
+   of_id = of_match_device(fsl_audmix_ids, dev);
if (!of_id || !of_id->data)
return -EINVAL;
 
mdrv = of_id->data;
 
-   priv = devm_kzalloc(>dev, sizeof(*priv), GFP_KERNEL);
+   priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
 
/* Get the addresses */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-   regs = devm_ioremap_resource(>dev, res);
+   regs = devm_ioremap_resource(dev, res);
if (IS_ERR(regs))
return PTR_ERR(regs);
 
-   priv->regmap = devm_regmap_init_mmio_clk(>dev, "ipg", regs,
+   priv->regmap = devm_regmap_init_mmio_clk(dev, "ipg", regs,
 _audmix_regmap_config);
if (IS_ERR(priv->regmap)) {
-   dev_err(>dev, "failed to init regmap\n");
+   dev_err(dev, "failed to init regmap\n");
return PTR_ERR(priv->regmap);
}
 
-   priv->ipg_clk = devm_clk_get(>dev, "ipg");
+   priv->ipg_clk = devm_clk_get(dev, "ipg");
if (IS_ERR(priv->ipg_clk)) {
-   dev_err(>dev, "failed to get ipg clock\n");
+   dev_err(dev, "failed to get ipg clock\n");
return PTR_ERR(priv->ipg_clk);
}
 
platform_set_drvdata(pdev, priv);
-   pm_runtime_enable(>dev);
+   pm_runtime_enable(dev);
 
-   ret = devm_snd_soc_register_component(>dev, _audmix_component,
+   ret = devm_snd_soc_register_component(dev, _audmix_component,
  fsl_audmix_dai,
  ARRAY_SIZE(fsl_audmix_dai));
if (ret) {
-   dev_err(>dev, "failed to register ASoC DAI\n");
+   dev_err(dev, "failed to register ASoC DAI\n");
return ret;
}
 
-   priv->pdev = platform_device_register_data(>dev, mdrv, 0, NULL,
-  0);
+   priv->pdev = platform_device_register_data(dev, mdrv, 0, NULL, 0);
if (IS_ERR(priv->pdev)) {
ret = PTR_ERR(priv->pdev);
-   dev_err(>dev, "failed to register platform %s: %d\n",
-   mdrv, ret);
+   dev_err(dev, "failed to register platform %s: %d\n", mdrv, ret);
}
 
return ret;
-- 
2.20.1



Applied "ASoC: fsl_esai: Fix missing break in switch statement" to the asoc tree

2019-05-01 Thread Mark Brown
The patch

   ASoC: fsl_esai: Fix missing break in switch statement

has been applied to the asoc tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.2

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 903c220b1ece12f17c868e43f2243b8f81ff2d4c Mon Sep 17 00:00:00 2001
From: "S.j. Wang" 
Date: Sun, 28 Apr 2019 02:24:27 +
Subject: [PATCH] ASoC: fsl_esai: Fix missing break in switch statement

case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be
independent of each other, so replace fall-through with break.

Fixes: 43d24e76b698 ("ASoC: fsl_esai: Add ESAI CPU DAI driver")
Signed-off-by: Shengjiu Wang 
Acked-by: Nicolin Chen 
Cc: 
Signed-off-by: Mark Brown 
---
 sound/soc/fsl/fsl_esai.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c
index c7410bbfd2af..bad0dfed6b68 100644
--- a/sound/soc/fsl/fsl_esai.c
+++ b/sound/soc/fsl/fsl_esai.c
@@ -251,7 +251,7 @@ static int fsl_esai_set_dai_sysclk(struct snd_soc_dai *dai, 
int clk_id,
break;
case ESAI_HCKT_EXTAL:
ecr |= ESAI_ECR_ETI;
-   /* fall through */
+   break;
case ESAI_HCKR_EXTAL:
ecr |= esai_priv->synchronous ? ESAI_ECR_ETI : ESAI_ECR_ERI;
break;
-- 
2.20.1



[PATCH 3/3] ibmvscsi: fix tripping of blk_mq_run_hw_queue WARN_ON

2019-05-01 Thread Tyrel Datwyler
From: Tyrel Datwyler 

After a successful SRP login response we call scsi_unblock_requests() to
kick any pending IO's. The callback to process this SRP response happens in
a tasklet and therefore is in softirq context. The result of such is
that when blk-mq is enabled it is no longer safe to call
scsi_unblock_requests() from this context. The result of duing so
triggers the following WARN_ON splat in dmesg after a host reset or CRQ
reenablement.

WARNING: CPU: 0 PID: 0 at block/blk-mq.c:1375 __blk_mq_run_hw_queue+0x120/0x180
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.0.0-rc8 #4
NIP [c09771e0] __blk_mq_run_hw_queue+0x120/0x180
LR [c0977484] __blk_mq_delay_run_hw_queue+0x244/0x250
Call Trace:

__blk_mq_delay_run_hw_queue+0x244/0x250
blk_mq_run_hw_queue+0x8c/0x1c0
blk_mq_run_hw_queues+0x60/0x90
scsi_run_queue+0x1e4/0x3b0
scsi_run_host_queues+0x48/0x80
login_rsp+0xb0/0x100
ibmvscsi_handle_crq+0x30c/0x3e0
ibmvscsi_task+0x54/0xe0
tasklet_action_common.isra.3+0xc4/0x1a0
__do_softirq+0x174/0x3f4
irq_exit+0xf0/0x120
__do_irq+0xb0/0x210
call_do_irq+0x14/0x24
do_IRQ+0x9c/0x130
hardware_interrupt_common+0x14c/0x150

This patch fixes the issue by introducing a new host action for
unblocking the scsi requests in our seperate work thread.

Signed-off-by: Tyrel Datwyler 
---
 drivers/scsi/ibmvscsi/ibmvscsi.c | 5 -
 drivers/scsi/ibmvscsi/ibmvscsi.h | 1 +
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index 683139e6c63f..c1d83eb5c5f7 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -1179,7 +1179,8 @@ static void login_rsp(struct srp_event_struct *evt_struct)
   
be32_to_cpu(evt_struct->xfer_iu->srp.login_rsp.req_lim_delta));
 
/* If we had any pending I/Os, kick them */
-   scsi_unblock_requests(hostdata->host);
+   hostdata->action = IBMVSCSI_HOST_ACTION_UNBLOCK;
+   wake_up(>work_wait_q);
 }
 
 /**
@@ -2125,6 +2126,7 @@ static void ibmvscsi_do_work(struct ibmvscsi_host_data 
*hostdata)
spin_lock_irqsave(hostdata->host->host_lock, flags);
switch (hostdata->action) {
case IBMVSCSI_HOST_ACTION_NONE:
+   case IBMVSCSI_HOST_ACTION_UNBLOCK:
break;
case IBMVSCSI_HOST_ACTION_RESET:
rc = ibmvscsi_reset_crq_queue(>queue, hostdata);
@@ -2162,6 +2164,7 @@ static int __ibmvscsi_work_to_do(struct 
ibmvscsi_host_data *hostdata)
return 0;
case IBMVSCSI_HOST_ACTION_RESET:
case IBMVSCSI_HOST_ACTION_REENABLE:
+   case IBMVSCSI_HOST_ACTION_UNBLOCK:
default:
break;
}
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.h b/drivers/scsi/ibmvscsi/ibmvscsi.h
index 04bcbc832dc9..d9bf502334ba 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.h
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.h
@@ -92,6 +92,7 @@ enum ibmvscsi_host_action {
IBMVSCSI_HOST_ACTION_NONE = 0,
IBMVSCSI_HOST_ACTION_RESET,
IBMVSCSI_HOST_ACTION_REENABLE,
+   IBMVSCSI_HOST_ACTION_UNBLOCK,
 };
 
 /* all driver data associated with a host adapter */
-- 
2.18.1



[PATCH 2/3] ibmvscsi: redo driver work thread to use enum action states

2019-05-01 Thread Tyrel Datwyler
From: Tyrel Datwyler 

The current implemenation relies on two flags in the drivers private host
structure to signal the need for a host reset or to reenable the CRQ after a
LPAR migration. This patch does away with those flags and introduces a single
action flag and defined enums for the supported kthread work actions. Lastly,
the if/else logic is replaced with a switch statement.

Signed-off-by: Tyrel Datwyler 
---
 drivers/scsi/ibmvscsi/ibmvscsi.c | 57 +---
 drivers/scsi/ibmvscsi/ibmvscsi.h |  9 +++--
 2 files changed, 45 insertions(+), 21 deletions(-)

diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index 1c37244f16a0..683139e6c63f 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -828,7 +828,7 @@ static void ibmvscsi_reset_host(struct ibmvscsi_host_data 
*hostdata)
atomic_set(>request_limit, 0);
 
purge_requests(hostdata, DID_ERROR);
-   hostdata->reset_crq = 1;
+   hostdata->action = IBMVSCSI_HOST_ACTION_RESET;
wake_up(>work_wait_q);
 }
 
@@ -1797,7 +1797,7 @@ static void ibmvscsi_handle_crq(struct viosrp_crq *crq,
/* We need to re-setup the interpartition connection */
dev_info(hostdata->dev, "Re-enabling adapter!\n");
hostdata->client_migrated = 1;
-   hostdata->reenable_crq = 1;
+   hostdata->action = IBMVSCSI_HOST_ACTION_REENABLE;
purge_requests(hostdata, DID_REQUEUE);
wake_up(>work_wait_q);
} else {
@@ -2118,26 +2118,32 @@ static unsigned long ibmvscsi_get_desired_dma(struct 
vio_dev *vdev)
 
 static void ibmvscsi_do_work(struct ibmvscsi_host_data *hostdata)
 {
+   unsigned long flags;
int rc;
char *action = "reset";
 
-   if (hostdata->reset_crq) {
-   smp_rmb();
-   hostdata->reset_crq = 0;
-
+   spin_lock_irqsave(hostdata->host->host_lock, flags);
+   switch (hostdata->action) {
+   case IBMVSCSI_HOST_ACTION_NONE:
+   break;
+   case IBMVSCSI_HOST_ACTION_RESET:
rc = ibmvscsi_reset_crq_queue(>queue, hostdata);
if (!rc)
rc = ibmvscsi_send_crq(hostdata, 0xC001LL, 
0);
vio_enable_interrupts(to_vio_dev(hostdata->dev));
-   } else if (hostdata->reenable_crq) {
-   smp_rmb();
+   break;
+   case IBMVSCSI_HOST_ACTION_REENABLE:
action = "enable";
rc = ibmvscsi_reenable_crq_queue(>queue, hostdata);
-   hostdata->reenable_crq = 0;
if (!rc)
rc = ibmvscsi_send_crq(hostdata, 0xC001LL, 
0);
-   } else
-   return;
+   break;
+   default:
+   break;
+   }
+
+   hostdata->action = IBMVSCSI_HOST_ACTION_NONE;
+   spin_unlock_irqrestore(hostdata->host->host_lock, flags);
 
if (rc) {
atomic_set(>request_limit, -1);
@@ -2147,19 +2153,32 @@ static void ibmvscsi_do_work(struct ibmvscsi_host_data 
*hostdata)
scsi_unblock_requests(hostdata->host);
 }
 
-static int ibmvscsi_work_to_do(struct ibmvscsi_host_data *hostdata)
+static int __ibmvscsi_work_to_do(struct ibmvscsi_host_data *hostdata)
 {
if (kthread_should_stop())
return 1;
-   else if (hostdata->reset_crq) {
-   smp_rmb();
-   return 1;
-   } else if (hostdata->reenable_crq) {
-   smp_rmb();
-   return 1;
+   switch (hostdata->action) {
+   case IBMVSCSI_HOST_ACTION_NONE:
+   return 0;
+   case IBMVSCSI_HOST_ACTION_RESET:
+   case IBMVSCSI_HOST_ACTION_REENABLE:
+   default:
+   break;
}
 
-   return 0;
+   return 1;
+}
+
+static int ibmvscsi_work_to_do(struct ibmvscsi_host_data *hostdata)
+{
+   unsigned long flags;
+   int rc;
+
+   spin_lock_irqsave(hostdata->host->host_lock, flags);
+   rc = __ibmvscsi_work_to_do(hostdata);
+   spin_unlock_irqrestore(hostdata->host->host_lock, flags);
+
+   return rc;
 }
 
 static int ibmvscsi_work(void *data)
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.h b/drivers/scsi/ibmvscsi/ibmvscsi.h
index 3a7875575616..04bcbc832dc9 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.h
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.h
@@ -88,13 +88,18 @@ struct event_pool {
dma_addr_t iu_token;
 };
 
+enum ibmvscsi_host_action {
+   IBMVSCSI_HOST_ACTION_NONE = 0,
+   IBMVSCSI_HOST_ACTION_RESET,
+   IBMVSCSI_HOST_ACTION_REENABLE,
+};
+
 /* all driver data associated with a host adapter */
 struct ibmvscsi_host_data {
struct list_head host_list;
atomic_t request_limit;
int client_migrated;
-   int reset_crq;
-   int reenable_crq;
+   enum ibmvscsi_host_action action;
 

[PATCH 1/3] ibmvscsi: Wire up host_reset() in the drivers scsi_host_template

2019-05-01 Thread Tyrel Datwyler
From: Tyrel Datwyler 

Wire up the host_reset function in our driver_template to allow a user
requested adpater reset via the host_reset sysfs attribute.

Example:

echo "adapter" > /sys/class/scsi_host/host0/host_reset

Signed-off-by: Tyrel Datwyler 
---
 drivers/scsi/ibmvscsi/ibmvscsi.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index 8cec5230fe31..1c37244f16a0 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -2050,6 +2050,18 @@ static struct device_attribute ibmvscsi_host_config = {
.show = show_host_config,
 };
 
+static int ibmvscsi_host_reset(struct Scsi_Host *shost, int reset_type)
+{
+   struct ibmvscsi_host_data *hostdata = shost_priv(shost);
+
+   vio_disable_interrupts(to_vio_dev(hostdata->dev));
+   dev_info(hostdata->dev, "Initiating adapter reset!\n");
+   ibmvscsi_reset_host(hostdata);
+   vio_enable_interrupts(to_vio_dev(hostdata->dev));
+
+   return 0;
+}
+
 static struct device_attribute *ibmvscsi_attrs[] = {
_host_vhost_loc,
_host_vhost_name,
@@ -2076,6 +2088,7 @@ static struct scsi_host_template driver_template = {
.eh_host_reset_handler = ibmvscsi_eh_host_reset_handler,
.slave_configure = ibmvscsi_slave_configure,
.change_queue_depth = ibmvscsi_change_queue_depth,
+   .host_reset = ibmvscsi_host_reset,
.cmd_per_lun = IBMVSCSI_CMDS_PER_LUN_DEFAULT,
.can_queue = IBMVSCSI_MAX_REQUESTS_DEFAULT,
.this_id = -1,
-- 
2.18.1



Re: [PATCH v4] powerpc/pseries: Remove limit in wait for dying CPU

2019-05-01 Thread Nicholas Piggin
Nathan Lynch's on May 2, 2019 12:57 am:
> Hi Thiago,
> 
> Thiago Jung Bauermann  writes:
>> Nathan Lynch  writes:
>>> Thiago Jung Bauermann  writes:
 +  while (true) {
cpu_status = smp_query_cpu_stopped(pcpu);
if (cpu_status == QCSS_STOPPED ||
cpu_status == QCSS_HARDWARE_ERROR)
break;
 -  cpu_relax();
 +  udelay(100);
}
}
>>>
>>> I agree with looping indefinitely but doesn't it need a cond_resched()
>>> or similar check?
>>
>> If there's no kernel or hypervisor bug, it shouldn't take more than a
>> few tens of ms for this loop to complete (Gautham measured a maximum of
>> 10 ms on a POWER9 with an earlier version of this patch).
> 
> 10ms is twice the default scheduler quantum...
> 
> 
>> In case of bugs related to CPU hotplug (either in the kernel or the
>> hypervisor), I was hoping that the resulting lockup warnings would be a
>> good indicator that something is wrong. :-)
> 
> Not convinced we should assume something is wrong if it takes a few
> dozen ms to complete the operation.

Right, and if there is no kernel or hypervisor bug then it will stop
eventually :)

> AFAIK we don't have any guarantees
> about the maximum latency of stop-self, and it can be affected by other
> activity in the system, whether we're in shared processor mode, etc. Not
> to mention smp_query_cpu_stopped has to acquire the global RTAS lock and
> be serialized with other tasks calling into RTAS. So I am concerned
> about generating spurious warnings here.

Agreed.

> 
> If for whatever reason the operation is taking too long, drmgr or
> whichever application is initiating the change will appear to stop
> making progress. It's not too hard to find out what's going on with
> facilities like perf or /proc/pid/stack.
> 
> 
>> Though perhaps adding a cond_resched() every 10 ms or so, with a
>> WARN_ON() if it loops for more than 50 ms would be better.
> 
> A warning doesn't seem appropriate to me, and cond_resched should be
> invoked in each iteration. Or just msleep(1) in each iteration would be
> fine, I think.
> 
> But I'd like to bring in some more context -- here is the body of
> pseries_cpu_die:
> 
> static void pseries_cpu_die(unsigned int cpu)
> {
>   int tries;
>   int cpu_status = 1;
>   unsigned int pcpu = get_hard_smp_processor_id(cpu);
> 
>   if (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) {
>   cpu_status = 1;
>   for (tries = 0; tries < 5000; tries++) {
>   if (get_cpu_current_state(cpu) == CPU_STATE_INACTIVE) {
>   cpu_status = 0;
>   break;
>   }
>   msleep(1);
>   }
>   } else if (get_preferred_offline_state(cpu) == CPU_STATE_OFFLINE) {
> 
>   for (tries = 0; tries < 25; tries++) {
>   cpu_status = smp_query_cpu_stopped(pcpu);
>   if (cpu_status == QCSS_STOPPED ||
>   cpu_status == QCSS_HARDWARE_ERROR)
>   break;
>   cpu_relax();
>   }
> }
> 
> This patch alters the behavior of the second loop (the CPU_STATE_OFFLINE
> branch). The CPU_STATE_INACTIVE branch is used when the offline behavior
> is to use H_CEDE instead of stop-self, correct?
> 
> And isn't entering H_CEDE expected to be quite a bit faster than
> stop-self? If so, why does that path get five whole seconds[*] while
> we're bikeshedding about tens of milliseconds for stop-self? :-)
> 
> [*] And should it be made to retry indefinitely as well?

I think so.

Thanks,
Nick


Re: [PATCH 4/5] x86: don't use asm-generic/ptrace.h

2019-05-01 Thread Ingo Molnar


* Christoph Hellwig  wrote:

> Doing the indirection through macros for the regs accessors just
> makes them harder to read, so implement the helpers directly.
> 
> Note that only the helpers actually used are implemented now.
> 
> Signed-off-by: Christoph Hellwig 
> ---
>  arch/x86/include/asm/ptrace.h | 29 -
>  1 file changed, 24 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
> index 8a7fc0cca2d1..9b81ef539eb3 100644
> --- a/arch/x86/include/asm/ptrace.h
> +++ b/arch/x86/include/asm/ptrace.h
> @@ -98,7 +98,6 @@ struct cpuinfo_x86;
>  struct task_struct;
>  
>  extern unsigned long profile_pc(struct pt_regs *regs);
> -#define profile_pc profile_pc
>  
>  extern unsigned long
>  convert_ip_to_linear(struct task_struct *child, struct pt_regs *regs);
> @@ -175,11 +174,31 @@ static inline unsigned long kernel_stack_pointer(struct 
> pt_regs *regs)
>  }
>  #endif
>  
> -#define GET_IP(regs) ((regs)->ip)
> -#define GET_FP(regs) ((regs)->bp)
> -#define GET_USP(regs) ((regs)->sp)
> +static inline unsigned long instruction_pointer(struct pt_regs *regs)
> +{
> + return regs->ip;
> +}
> +static inline void instruction_pointer_set(struct pt_regs *regs,

Nit: missing newline between inline functions.

> + unsigned long val)
> +{
> + regs->ip = val;
> +}
> +
> +static inline unsigned long frame_pointer(struct pt_regs *regs)
> +{
> + return regs->bp;
> +}
>  
> -#include 
> +static inline unsigned long user_stack_pointer(struct pt_regs *regs)
> +{
> + return regs->sp;
> +}
> +
> +static inline void user_stack_pointer_set(struct pt_regs *regs,
> + unsigned long val)
> +{
> + regs->sp = val;
> +}

Other than that:

Acked-by: Ingo Molnar 

Thanks,

Ingo


Re: [PATCH v2 4/6] dt-bindings: soc/fsl: qe: document new fsl,qe-snums binding

2019-05-01 Thread Rob Herring
On Wed, 1 May 2019 09:29:08 +, Rasmus Villemoes wrote:
> Reading table 4-30, and its footnotes, of the QUICC Engine Block
> Reference Manual shows that the set of snum _values_ is not
> necessarily just a function of the _number_ of snums, as given in the
> fsl,qe-num-snums property.
> 
> As an alternative, to make it easier to add support for other variants
> of the QUICC engine IP, this introduces a new binding fsl,qe-snums,
> which automatically encodes both the number of snums and the actual
> values to use.
> 
> For example, for the MPC8309, one would specify the property as
> 
>fsl,qe-snums = /bits/ 8 <
>0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9
>0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>;
> 
> Signed-off-by: Rasmus Villemoes 
> ---
>  Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring 


Re: [PATCH v2 1/9] soc/fsl/qman: fixup liodns only on ppc targets

2019-05-01 Thread Li Yang
On Sat, Apr 27, 2019 at 2:14 AM  wrote:
>
> From: Laurentiu Tudor 
>
> ARM SoCs use SMMU so the liodn fixup done in the qman driver is no
> longer making sense and it also breaks the ICID settings inherited
> from u-boot. Do the fixups only for PPC targets.
>
> Signed-off-by: Laurentiu Tudor 

Applied for next.  Thanks.

Leo
> ---
>  drivers/soc/fsl/qbman/qman_ccsr.c | 2 +-
>  drivers/soc/fsl/qbman/qman_priv.h | 9 -
>  2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/soc/fsl/qbman/qman_ccsr.c 
> b/drivers/soc/fsl/qbman/qman_ccsr.c
> index 109b38de3176..a6bb43007d03 100644
> --- a/drivers/soc/fsl/qbman/qman_ccsr.c
> +++ b/drivers/soc/fsl/qbman/qman_ccsr.c
> @@ -596,7 +596,7 @@ static int qman_init_ccsr(struct device *dev)
>  }
>
>  #define LIO_CFG_LIODN_MASK 0x0fff
> -void qman_liodn_fixup(u16 channel)
> +void __qman_liodn_fixup(u16 channel)
>  {
> static int done;
> static u32 liodn_offset;
> diff --git a/drivers/soc/fsl/qbman/qman_priv.h 
> b/drivers/soc/fsl/qbman/qman_priv.h
> index 75a8f905f8f7..04515718cfd9 100644
> --- a/drivers/soc/fsl/qbman/qman_priv.h
> +++ b/drivers/soc/fsl/qbman/qman_priv.h
> @@ -193,7 +193,14 @@ extern struct gen_pool *qm_cgralloc; /* CGR ID allocator 
> */
>  u32 qm_get_pools_sdqcr(void);
>
>  int qman_wq_alloc(void);
> -void qman_liodn_fixup(u16 channel);
> +#ifdef CONFIG_FSL_PAMU
> +#define qman_liodn_fixup __qman_liodn_fixup
> +#else
> +static inline void qman_liodn_fixup(u16 channel)
> +{
> +}
> +#endif
> +void __qman_liodn_fixup(u16 channel);
>  void qman_set_sdest(u16 channel, unsigned int cpu_idx);
>
>  struct qman_portal *qman_create_affine_portal(
> --
> 2.17.1
>


Re: [PATCH v2 2/9] soc/fsl/qbman_portals: add APIs to retrieve the probing status

2019-05-01 Thread Li Yang
On Sat, Apr 27, 2019 at 2:14 AM  wrote:
>
> From: Laurentiu Tudor 
>
> Add a couple of new APIs to check the probing status of the required
> cpu bound qman and bman portals:
>  'int bman_portals_probed()' and 'int qman_portals_probed()'.
> They return the following values.
>  *  1 if qman/bman portals were all probed correctly
>  *  0 if qman/bman portals were not yet probed
>  * -1 if probing of qman/bman portals failed
> Portals are considered successful probed if no error occurred during
> the probing of any of the portals and if enough portals were probed
> to have one available for each cpu.
> The error handling paths were slightly rearranged in order to fit this
> new functionality without being too intrusive.
> Drivers that use qman/bman portal driver services are required to use
> these APIs before calling any functions exported by these drivers or
> otherwise they will crash the kernel.
> First user will be the dpaa1 ethernet driver, coming in a subsequent
> patch.
>
> Signed-off-by: Laurentiu Tudor 

Applied for next.  Thanks.

Leo

> ---
>  drivers/soc/fsl/qbman/bman_portal.c | 20 
>  drivers/soc/fsl/qbman/qman_portal.c | 21 +
>  include/soc/fsl/bman.h  |  8 
>  include/soc/fsl/qman.h  |  9 +
>  4 files changed, 50 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/soc/fsl/qbman/bman_portal.c 
> b/drivers/soc/fsl/qbman/bman_portal.c
> index 2c95cf59f3e7..cf4f10d6f590 100644
> --- a/drivers/soc/fsl/qbman/bman_portal.c
> +++ b/drivers/soc/fsl/qbman/bman_portal.c
> @@ -32,6 +32,7 @@
>
>  static struct bman_portal *affine_bportals[NR_CPUS];
>  static struct cpumask portal_cpus;
> +static int __bman_portals_probed;
>  /* protect bman global registers and global data shared among portals */
>  static DEFINE_SPINLOCK(bman_lock);
>
> @@ -87,6 +88,12 @@ static int bman_online_cpu(unsigned int cpu)
> return 0;
>  }
>
> +int bman_portals_probed(void)
> +{
> +   return __bman_portals_probed;
> +}
> +EXPORT_SYMBOL_GPL(bman_portals_probed);
> +
>  static int bman_portal_probe(struct platform_device *pdev)
>  {
> struct device *dev = >dev;
> @@ -104,8 +111,10 @@ static int bman_portal_probe(struct platform_device 
> *pdev)
> }
>
> pcfg = devm_kmalloc(dev, sizeof(*pcfg), GFP_KERNEL);
> -   if (!pcfg)
> +   if (!pcfg) {
> +   __bman_portals_probed = -1;
> return -ENOMEM;
> +   }
>
> pcfg->dev = dev;
>
> @@ -113,14 +122,14 @@ static int bman_portal_probe(struct platform_device 
> *pdev)
>  DPAA_PORTAL_CE);
> if (!addr_phys[0]) {
> dev_err(dev, "Can't get %pOF property 'reg::CE'\n", node);
> -   return -ENXIO;
> +   goto err_ioremap1;
> }
>
> addr_phys[1] = platform_get_resource(pdev, IORESOURCE_MEM,
>  DPAA_PORTAL_CI);
> if (!addr_phys[1]) {
> dev_err(dev, "Can't get %pOF property 'reg::CI'\n", node);
> -   return -ENXIO;
> +   goto err_ioremap1;
> }
>
> pcfg->cpu = -1;
> @@ -128,7 +137,7 @@ static int bman_portal_probe(struct platform_device *pdev)
> irq = platform_get_irq(pdev, 0);
> if (irq <= 0) {
> dev_err(dev, "Can't get %pOF IRQ'\n", node);
> -   return -ENXIO;
> +   goto err_ioremap1;
> }
> pcfg->irq = irq;
>
> @@ -150,6 +159,7 @@ static int bman_portal_probe(struct platform_device *pdev)
> spin_lock(_lock);
> cpu = cpumask_next_zero(-1, _cpus);
> if (cpu >= nr_cpu_ids) {
> +   __bman_portals_probed = 1;
> /* unassigned portal, skip init */
> spin_unlock(_lock);
> return 0;
> @@ -175,6 +185,8 @@ static int bman_portal_probe(struct platform_device *pdev)
>  err_ioremap2:
> memunmap(pcfg->addr_virt_ce);
>  err_ioremap1:
> +__bman_portals_probed = -1;
> +
> return -ENXIO;
>  }
>
> diff --git a/drivers/soc/fsl/qbman/qman_portal.c 
> b/drivers/soc/fsl/qbman/qman_portal.c
> index 661c9b234d32..e2186b681d87 100644
> --- a/drivers/soc/fsl/qbman/qman_portal.c
> +++ b/drivers/soc/fsl/qbman/qman_portal.c
> @@ -38,6 +38,7 @@ EXPORT_SYMBOL(qman_dma_portal);
>  #define CONFIG_FSL_DPA_PIRQ_FAST  1
>
>  static struct cpumask portal_cpus;
> +static int __qman_portals_probed;
>  /* protect qman global registers and global data shared among portals */
>  static DEFINE_SPINLOCK(qman_lock);
>
> @@ -220,6 +221,12 @@ static int qman_online_cpu(unsigned int cpu)
> return 0;
>  }
>
> +int qman_portals_probed(void)
> +{
> +   return __qman_portals_probed;
> +}
> +EXPORT_SYMBOL_GPL(qman_portals_probed);
> +
>  static int qman_portal_probe(struct platform_device *pdev)
>  {
> struct device *dev = >dev;
> @@ -238,8 +245,10 @@ static int 

Re: [PATCH v2 0/2] soc: fsl: dpio: Add support for memory backed QBMan portals

2019-05-01 Thread Li Yang
On Fri, Apr 5, 2019 at 9:42 AM Roy Pledge  wrote:
>
> This patch series adds support for QBMan memory backed portals which is
> avaialble in devices containing QBMan verion 5.0 and above (for example
> NXP's LX2160A SoC).
>
> Memory backed portals can be mapped as normal cacheable/shareable memory
> which allows the portals to migrate between cores without needing manual
> cache manipulations by the CPU.
>
> The patches add support for the new portal attributes in the fsl-mc bus
> drivers as well as modifying the QBMan driver to use the new portal read
> trigger mechanism.
>
> Changes since v1:
>  * Support older DPRC command in case of older MC firmware
>  * Fix issue with padding in command
>
>
> Roy Pledge (2):
>   bus: mc-bus: Add support for mapping shareable portals
>   soc: fsl: dpio: Add support for memory backed QBMan portals

Both applied for next.  Thanks.

>
>  drivers/bus/fsl-mc/dprc.c   |  30 +++-
>  drivers/bus/fsl-mc/fsl-mc-bus.c |  15 +++-
>  drivers/bus/fsl-mc/fsl-mc-private.h |  17 -
>  drivers/soc/fsl/dpio/dpio-driver.c  |  23 --
>  drivers/soc/fsl/dpio/qbman-portal.c | 148 
> ++--
>  drivers/soc/fsl/dpio/qbman-portal.h |   5 ++
>  6 files changed, 199 insertions(+), 39 deletions(-)
>
> --
> 2.7.4
>


Re: [PATCH v2 4/6] dt-bindings: soc/fsl: qe: document new fsl,qe-snums binding

2019-05-01 Thread Rasmus Villemoes
On 01/05/2019 17.12, Joakim Tjernlund wrote:
> On Wed, 2019-05-01 at 09:29 +, Rasmus Villemoes wrote:
>> CAUTION: This email originated from outside of the organization. Do not 
>> click links or open attachments unless you recognize the sender and know the 
>> content is safe.
>>
>>
>> Reading table 4-30, and its footnotes, of the QUICC Engine Block
>> Reference Manual shows that the set of snum _values_ is not
>> necessarily just a function of the _number_ of snums, as given in the
>> fsl,qe-num-snums property.
>>
>> As an alternative, to make it easier to add support for other variants
>> of the QUICC engine IP, this introduces a new binding fsl,qe-snums,
>> which automatically encodes both the number of snums and the actual
>> values to use.
>>
>> For example, for the MPC8309, one would specify the property as
>>
>>fsl,qe-snums = /bits/ 8 <
>>0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9
>>0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>;
> 
> I think you need add this example to the qe.txt doc itselft.

Sure, can do.

> BTW, what is /bits/ ?

That indicates that the numbers should be stored as an array of u8, and
not as by default an array of (big-endian) 32-bit numbers. See

https://git.kernel.org/pub/scm/utils/dtc/dtc.git/tree/Documentation/dts-format.txt#n46

This is already used in some bindings and existing .dts (e.g.
hwmon/aspeed-pwm-tacho.txt, but git grep shows many more).

Rasmus


[PATCH 5/5] asm-generic: remove ptrace.h

2019-05-01 Thread Christoph Hellwig
No one is using this helper anymore.

Signed-off-by: Christoph Hellwig 
---
 MAINTAINERS|  1 -
 arch/mips/include/asm/ptrace.h |  5 ---
 include/asm-generic/ptrace.h   | 74 --
 3 files changed, 80 deletions(-)
 delete mode 100644 include/asm-generic/ptrace.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 5c38f21aee78..0d44b2369f42 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12586,7 +12586,6 @@ F:  include/linux/regset.h
 F: include/linux/tracehook.h
 F: include/uapi/linux/ptrace.h
 F: include/uapi/linux/ptrace.h
-F: include/asm-generic/ptrace.h
 F: kernel/ptrace.c
 F: arch/*/ptrace*.c
 F: arch/*/*/ptrace*.c
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index b6578611dddb..1e76774b36dd 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -56,11 +56,6 @@ static inline unsigned long kernel_stack_pointer(struct 
pt_regs *regs)
return regs->regs[31];
 }
 
-/*
- * Don't use asm-generic/ptrace.h it defines FP accessors that don't make
- * sense on MIPS.  We rather want an error if they get invoked.
- */
-
 static inline void instruction_pointer_set(struct pt_regs *regs,
unsigned long val)
 {
diff --git a/include/asm-generic/ptrace.h b/include/asm-generic/ptrace.h
deleted file mode 100644
index 82e674f6b337..
--- a/include/asm-generic/ptrace.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Common low level (register) ptrace helpers
- *
- * Copyright 2004-2011 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#ifndef __ASM_GENERIC_PTRACE_H__
-#define __ASM_GENERIC_PTRACE_H__
-
-#ifndef __ASSEMBLY__
-
-/* Helpers for working with the instruction pointer */
-#ifndef GET_IP
-#define GET_IP(regs) ((regs)->pc)
-#endif
-#ifndef SET_IP
-#define SET_IP(regs, val) (GET_IP(regs) = (val))
-#endif
-
-static inline unsigned long instruction_pointer(struct pt_regs *regs)
-{
-   return GET_IP(regs);
-}
-static inline void instruction_pointer_set(struct pt_regs *regs,
-   unsigned long val)
-{
-   SET_IP(regs, val);
-}
-
-#ifndef profile_pc
-#define profile_pc(regs) instruction_pointer(regs)
-#endif
-
-/* Helpers for working with the user stack pointer */
-#ifndef GET_USP
-#define GET_USP(regs) ((regs)->usp)
-#endif
-#ifndef SET_USP
-#define SET_USP(regs, val) (GET_USP(regs) = (val))
-#endif
-
-static inline unsigned long user_stack_pointer(struct pt_regs *regs)
-{
-   return GET_USP(regs);
-}
-static inline void user_stack_pointer_set(struct pt_regs *regs,
-  unsigned long val)
-{
-   SET_USP(regs, val);
-}
-
-/* Helpers for working with the frame pointer */
-#ifndef GET_FP
-#define GET_FP(regs) ((regs)->fp)
-#endif
-#ifndef SET_FP
-#define SET_FP(regs, val) (GET_FP(regs) = (val))
-#endif
-
-static inline unsigned long frame_pointer(struct pt_regs *regs)
-{
-   return GET_FP(regs);
-}
-static inline void frame_pointer_set(struct pt_regs *regs,
- unsigned long val)
-{
-   SET_FP(regs, val);
-}
-
-#endif /* __ASSEMBLY__ */
-
-#endif
-- 
2.20.1



[PATCH 4/5] x86: don't use asm-generic/ptrace.h

2019-05-01 Thread Christoph Hellwig
Doing the indirection through macros for the regs accessors just
makes them harder to read, so implement the helpers directly.

Note that only the helpers actually used are implemented now.

Signed-off-by: Christoph Hellwig 
---
 arch/x86/include/asm/ptrace.h | 29 -
 1 file changed, 24 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 8a7fc0cca2d1..9b81ef539eb3 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -98,7 +98,6 @@ struct cpuinfo_x86;
 struct task_struct;
 
 extern unsigned long profile_pc(struct pt_regs *regs);
-#define profile_pc profile_pc
 
 extern unsigned long
 convert_ip_to_linear(struct task_struct *child, struct pt_regs *regs);
@@ -175,11 +174,31 @@ static inline unsigned long kernel_stack_pointer(struct 
pt_regs *regs)
 }
 #endif
 
-#define GET_IP(regs) ((regs)->ip)
-#define GET_FP(regs) ((regs)->bp)
-#define GET_USP(regs) ((regs)->sp)
+static inline unsigned long instruction_pointer(struct pt_regs *regs)
+{
+   return regs->ip;
+}
+static inline void instruction_pointer_set(struct pt_regs *regs,
+   unsigned long val)
+{
+   regs->ip = val;
+}
+
+static inline unsigned long frame_pointer(struct pt_regs *regs)
+{
+   return regs->bp;
+}
 
-#include 
+static inline unsigned long user_stack_pointer(struct pt_regs *regs)
+{
+   return regs->sp;
+}
+
+static inline void user_stack_pointer_set(struct pt_regs *regs,
+   unsigned long val)
+{
+   regs->sp = val;
+}
 
 /* Query offset/name of register from its name/offset */
 extern int regs_query_register_offset(const char *name);
-- 
2.20.1



[PATCH 3/5] sh: don't use asm-generic/ptrace.h

2019-05-01 Thread Christoph Hellwig
Doing the indirection through macros for the regs accessors just
makes them harder to read, so implement the helpers directly.

Note that only the helpers actually used are implemented now.

Signed-off-by: Christoph Hellwig 
---
 arch/sh/include/asm/ptrace.h | 29 +
 1 file changed, 25 insertions(+), 4 deletions(-)

diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 9143c7babcbe..6c89e3e04cee 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -16,8 +16,31 @@
 #define user_mode(regs)(((regs)->sr & 0x4000)==0)
 #define kernel_stack_pointer(_regs)((unsigned long)(_regs)->regs[15])
 
-#define GET_FP(regs)   ((regs)->regs[14])
-#define GET_USP(regs)  ((regs)->regs[15])
+static inline unsigned long instruction_pointer(struct pt_regs *regs)
+{
+   return regs->pc;
+}
+static inline void instruction_pointer_set(struct pt_regs *regs,
+   unsigned long val)
+{
+   regs->pc = val;
+}
+
+static inline unsigned long frame_pointer(struct pt_regs *regs)
+{
+   return regs->regs[14];
+}
+
+static inline unsigned long user_stack_pointer(struct pt_regs *regs)
+{
+   return regs->regs[15];
+}
+
+static inline void user_stack_pointer_set(struct pt_regs *regs,
+   unsigned long val)
+{
+   regs->regs[15] = val;
+}
 
 #define arch_has_single_step() (1)
 
@@ -112,7 +135,5 @@ static inline unsigned long profile_pc(struct pt_regs *regs)
 
return pc;
 }
-#define profile_pc profile_pc
 
-#include 
 #endif /* __ASM_SH_PTRACE_H */
-- 
2.20.1



[PATCH 2/5] powerpc: don't use asm-generic/ptrace.h

2019-05-01 Thread Christoph Hellwig
Doing the indirection through macros for the regs accessors just
makes them harder to read, so implement the helpers directly.

Note that only the helpers actually used are implemented now.

Signed-off-by: Christoph Hellwig 
---
 arch/powerpc/include/asm/ptrace.h | 29 ++---
 1 file changed, 22 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/include/asm/ptrace.h 
b/arch/powerpc/include/asm/ptrace.h
index 64271e562fed..5d30944f1f6b 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -108,18 +108,33 @@ struct pt_regs
 
 #ifndef __ASSEMBLY__
 
-#define GET_IP(regs)   ((regs)->nip)
-#define GET_USP(regs)  ((regs)->gpr[1])
-#define GET_FP(regs)   (0)
-#define SET_FP(regs, val)
+static inline unsigned long instruction_pointer(struct pt_regs *regs)
+{
+   return regs->nip;
+}
+
+static inline void instruction_pointer_set(struct pt_regs *regs,
+   unsigned long val)
+{
+   regs->nip = val;
+}
+
+static inline unsigned long user_stack_pointer(struct pt_regs *regs)
+{
+   return regs->gpr[1];
+}
+
+static inline unsigned long frame_pointer(struct pt_regs *regs)
+{
+   return 0;
+}
 
 #ifdef CONFIG_SMP
 extern unsigned long profile_pc(struct pt_regs *regs);
-#define profile_pc profile_pc
+#else
+#define profile_pc(regs) instruction_pointer(regs)
 #endif
 
-#include 
-
 #define kernel_stack_pointer(regs) ((regs)->gpr[1])
 static inline int is_syscall_success(struct pt_regs *regs)
 {
-- 
2.20.1



[PATCH 1/5] arm64: don't use asm-generic/ptrace.h

2019-05-01 Thread Christoph Hellwig
Doing the indirection through macros for the regs accessors just
makes them harder to read, so implement the helpers directly.

Note that only the helpers actually used are implemented now.

Signed-off-by: Christoph Hellwig 
---
 arch/arm64/include/asm/ptrace.h | 31 +++
 1 file changed, 19 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index ec60174c8c18..55c1fb25cf32 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -228,11 +228,12 @@ static inline void forget_syscall(struct pt_regs *regs)
 #define fast_interrupts_enabled(regs) \
(!((regs)->pstate & PSR_F_BIT))
 
-#define GET_USP(regs) \
-   (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp)
-
-#define SET_USP(ptregs, value) \
-   (!compat_user_mode(regs) ? ((regs)->sp = value) : ((regs)->compat_sp = 
value))
+static inline unsigned long user_stack_pointer(struct pt_regs *regs)
+{
+   if (compat_user_mode(regs))
+   return regs->compat_sp;
+   return regs->sp;
+}
 
 extern int regs_query_register_offset(const char *name);
 extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
@@ -309,13 +310,20 @@ static inline unsigned long regs_return_value(struct 
pt_regs *regs)
 struct task_struct;
 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task);
 
-#define GET_IP(regs)   ((unsigned long)(regs)->pc)
-#define SET_IP(regs, value)((regs)->pc = ((u64) (value)))
-
-#define GET_FP(ptregs) ((unsigned long)(ptregs)->regs[29])
-#define SET_FP(ptregs, value)  ((ptregs)->regs[29] = ((u64) (value)))
+static inline unsigned long instruction_pointer(struct pt_regs *regs)
+{
+   return regs->pc;
+}
+static inline void instruction_pointer_set(struct pt_regs *regs,
+   unsigned long val)
+{
+   regs->pc = val;
+}
 
-#include 
+static inline unsigned long frame_pointer(struct pt_regs *regs)
+{
+   return regs->regs[29];
+}
 
 #define procedure_link_pointer(regs)   ((regs)->regs[30])
 
@@ -325,7 +333,6 @@ static inline void procedure_link_pointer_set(struct 
pt_regs *regs,
procedure_link_pointer(regs) = val;
 }
 
-#undef profile_pc
 extern unsigned long profile_pc(struct pt_regs *regs);
 
 #endif /* __ASSEMBLY__ */
-- 
2.20.1



remove asm-generic/ptrace.h

2019-05-01 Thread Christoph Hellwig
Hi all,

asm-generic/ptrace.h is a little weird in that it doesn't actually
implement any functionality, but it provided multiple layers of macros
that just implement trivial inline functions.  We implement those
directly in the few architectures and be off with a much simpler
design.


Re: [PATCH v2] powerpc/32s: fix BATs setting with CONFIG_STRICT_KERNEL_RWX

2019-05-01 Thread christophe leroy




Le 01/05/2019 à 02:55, Michael Ellerman a écrit :

Christophe Leroy  writes:

Serge reported some crashes with CONFIG_STRICT_KERNEL_RWX enabled
on a book3s32 machine.

Analysis shows two issues:
- BATs addresses and sizes are not properly aligned.
- There is a gap between the last address covered by BATs and the
first address covered by pages.

Memory mapped with DBATs:
0: 0xc000-0xc07f 0x Kernel RO coherent
1: 0xc080-0xc0bf 0x0080 Kernel RO coherent
2: 0xc0c0-0xc13f 0x00c0 Kernel RW coherent
3: 0xc140-0xc23f 0x0140 Kernel RW coherent
4: 0xc240-0xc43f 0x0240 Kernel RW coherent
5: 0xc440-0xc83f 0x0440 Kernel RW coherent
6: 0xc840-0xd03f 0x0840 Kernel RW coherent
7: 0xd040-0xe03f 0x1040 Kernel RW coherent

Memory mapped with pages:
0xe100-0xefff  0x2100   240Mrw   present   
dirty  accessed

This patch fixes both issues. With the patch, we get the following
which is as expected:

Memory mapped with DBATs:
0: 0xc000-0xc07f 0x Kernel RO coherent
1: 0xc080-0xc0bf 0x0080 Kernel RO coherent
2: 0xc0c0-0xc0ff 0x00c0 Kernel RW coherent
3: 0xc100-0xc1ff 0x0100 Kernel RW coherent
4: 0xc200-0xc3ff 0x0200 Kernel RW coherent
5: 0xc400-0xc7ff 0x0400 Kernel RW coherent
6: 0xc800-0xcfff 0x0800 Kernel RW coherent
7: 0xd000-0xdfff 0x1000 Kernel RW coherent

Memory mapped with pages:
0xe000-0xefff  0x2000   256Mrw   present   
dirty  accessed

Reported-by: Serge Belyshev 
Fixes: 63b2bc619565 ("powerpc/mm/32s: Use BATs for STRICT_KERNEL_RWX")
Cc: sta...@vger.kernel.org


I could probably still get this into v5.1 if you're confident it's a
good fix.


If possible it would be great.

Yes I'm confident it is a good fix:
- The fix has no impact on the configurations I tested originally (they 
were lacking a trailing area not mapped with BATs and the boundarie 
between RW and RO was a power of 2 so ffs() returned the same as lfs())

- The fix was tested by myself on QEMU.
- The fix was tested by Serge.
- The fix was acked by Segher.
- The fix make sense (ie ffs() is the good one, fls() was definitly wrong)

Christophe



cheers



---
L'absence de virus dans ce courrier électronique a été vérifiée par le logiciel 
antivirus Avast.
https://www.avast.com/antivirus



Re: [PATCH v2 3/6] x86: clean up _TIF_SYSCALL_EMU handling using ptrace_syscall_enter hook

2019-05-01 Thread Sudeep Holla
On Wed, May 01, 2019 at 05:57:11PM +0200, Oleg Nesterov wrote:
> On 04/30, Sudeep Holla wrote:
> >
> > On Mon, Mar 18, 2019 at 04:33:22PM +0100, Oleg Nesterov wrote:
> > >
> > > And it seems that _TIF_WORK_SYSCALL_ENTRY needs some cleanups too... We 
> > > don't need
> > > "& _TIF_WORK_SYSCALL_ENTRY" in syscall_trace_enter, and 
> > > _TIF_WORK_SYSCALL_ENTRY
> > > should not include _TIF_NOHZ?
> > >
> >
> > I was about to post the updated version and checked this to make sure I have
> > covered everything or not. I had missed the above comment. All architectures
> > have _TIF_NOHZ in their mask that they check to do work. And from x86, I 
> > read
> > "...syscall_trace_enter(). Also includes TIF_NOHZ for 
> > enter_from_user_mode()"
> > So I don't understand why _TIF_NOHZ needs to be dropped.
>
> I have already forgot this discussion... But after I glanced at this code 
> again
> I still think the same, and I don't understand why do you disagree.
>

Sorry, but I didn't have any disagreement, I just said I don't understand
the usage on all architectures at that moment.

> > Also if we need to drop, we can address that separately examining all archs.
>
> Sure, and I was only talking about x86. We can keep TIF_NOHZ and even
> set_tsk_thread_flag(TIF_NOHZ) in context_tracking_cpu_set() if some arch needs
> this but remove TIF_NOHZ from TIF_WORK_SYSCALL_ENTRY in 
> arch/x86/include/asm/thread_info.h,
> afaics this shouldn't make any difference.
>

OK, it's just x86, then I understand your point. I was looking at all
the architectures, sorry for the confusion.

> And I see no reason why x86 needs to use TIF_WORK_SYSCALL_ENTRY in
> syscall_trace_enter().
>

Agreed

--
Regards,
Sudeep


RE: [PATCH] crypto: caam/jr - Remove extra memory barrier during job ring dequeue

2019-05-01 Thread Vakul Garg



> -Original Message-
> From: Michael Ellerman 
> Sent: Wednesday, May 1, 2019 11:20 AM
> To: Vakul Garg 
> Cc: linux-cry...@vger.kernel.org; Aymen Sghaier
> ; da...@davemloft.net;
> herb...@gondor.apana.org.au; Horia Geanta ;
> linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH] crypto: caam/jr - Remove extra memory barrier during
> job ring dequeue
> 
> Vakul Garg wrote:
> > In function caam_jr_dequeue(), a full memory barrier is used before
> > writing response job ring's register to signal removal of the
> > completed job. Therefore for writing the register, we do not need
> > another write memory barrier. Hence it is removed by replacing the
> > call to wr_reg32() with a newly defined function wr_reg32_relaxed().
> >
> > Signed-off-by: Vakul Garg 
> > ---
> >  drivers/crypto/caam/jr.c   | 2 +-
> >  drivers/crypto/caam/regs.h | 8 
> >  2 files changed, 9 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c index
> > 4e9b3fca5627..2ce6d7d2ad72 100644
> > --- a/drivers/crypto/caam/jr.c
> > +++ b/drivers/crypto/caam/jr.c
> > @@ -266,7 +266,7 @@ static void caam_jr_dequeue(unsigned long
> devarg)
> > mb();
> >
> > /* set done */
> > -   wr_reg32(>rregs->outring_rmvd, 1);
> > +   wr_reg32_relaxed(>rregs->outring_rmvd, 1);
> >
> > jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) &
> >(JOBR_DEPTH - 1);
> > diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h
> > index 3cd0822ea819..9e912c722e33 100644
> > --- a/drivers/crypto/caam/regs.h
> > +++ b/drivers/crypto/caam/regs.h
> > @@ -96,6 +96,14 @@ cpu_to_caam(16)
> >  cpu_to_caam(32)
> >  cpu_to_caam(64)
> >
> > +static inline void wr_reg32_relaxed(void __iomem *reg, u32 data) {
> > +   if (caam_little_end)
> > +   writel_relaxed(data, reg);
> > +   else
> > +   writel_relaxed(cpu_to_be32(data), reg); }
> > +
> >  static inline void wr_reg32(void __iomem *reg, u32 data)  {
> > if (caam_little_end)
> 
> This crashes on my p5020ds. Did you test on powerpc?
> 
I did not test on powerpc.

> # first bad commit: [bbfcac5ff5f26aafa51935a62eb86b6eacfe8a49] crypto:
> caam/jr - Remove extra memory barrier during job ring dequeue
> 
> Log:
> 
>   [ cut here ]
>   kernel BUG at drivers/crypto/caam/jr.c:191!
>   Oops: Exception in kernel mode, sig: 5 [#1]
>   BE PAGE_SIZE=4K SMP NR_CPUS=24 CoreNet Generic
>   Modules linked in:
>   CPU: 1 PID: 0 Comm: swapper/1 Not tainted 5.1.0-rc1-gcc-8.2.0-00060-
> gbbfcac5ff5f2 #31
>   NIP:  c079d704 LR: c079d498 CTR: c0086914
>   REGS: c000fffc7970 TRAP: 0700   Not tainted  (5.1.0-rc1-gcc-8.2.0-
> 00060-gbbfcac5ff5f2)
>   MSR:  80029000   CR: 28008484  XER: 
>   IRQMASK: 0
>   GPR00: c079d6b0 c000fffc7c00 c0fbc800
> 0001
>   GPR04: 7e080080 ffc0 0001
> 67d7
>   GPR08: 880401a9  0001
> fa83b2da
>   GPR12: 28008224 c0003800 c0fc20b0
> 0100
>   GPR16: 8920f09520bea117 c0def480 
> 0001
>   GPR20: c0fc3940 c000f3537e18 0001
> c1026cc5
>   GPR24: 0001 c000f3328000 0001
> c000f3451010
>   GPR28:  0001 
> 
>   NIP [c079d704] .caam_jr_dequeue+0x2f0/0x410
>   LR [c079d498] .caam_jr_dequeue+0x84/0x410
>   Call Trace:
>   [c000fffc7c00] [c079d6b0] .caam_jr_dequeue+0x29c/0x410
> (unreliable)
>   [c000fffc7cd0] [c004fef0]
> .tasklet_action_common.isra.3+0xac/0x180
>   [c000fffc7d80] [c0a2f99c] .__do_softirq+0x174/0x3f8
>   [c000fffc7e90] [c004fb94] .irq_exit+0xc4/0xdc
>   [c000fffc7f00] [c0007348] .__do_irq+0x8c/0x1b0
>   [c000fffc7f90] [c00150c4] .call_do_irq+0x14/0x24
>   [c000f3137930] [c00074e4] .do_IRQ+0x78/0xd4
>   [c000f31379c0] [c0019998]
> exc_0x500_common+0xfc/0x100
>   --- interrupt: 501 at .book3e_idle+0x24/0x5c
>   LR = .book3e_idle+0x24/0x5c
>   [c000f3137cc0] [c000a6a4] .arch_cpu_idle+0x34/0xa0
> (unreliable)
>   [c000f3137d30] [c0a2f2e8] .default_idle_call+0x5c/0x70
>   [c000f3137da0] [c0084210] .do_idle+0x1b0/0x1f4
>   [c000f3137e40] [c0084434] .cpu_startup_entry+0x28/0x30
>   [c000f3137eb0] [c0021538] .start_secondary+0x59c/0x5b0
>   [c000f3137f90] [c45c]
> start_secondary_prolog+0x10/0x14
>   Instruction dump:
>   7d284a14 e9290018 2fa9 40de001c 3bbd0001 57bd05fe 7d3db050
> 712901ff
>   7fbd07b4 40e2ffcc 93b500dc 4b94 <0fe0> 78890022 79270020
> 41d600ec
>   ---[ end trace 7bedbdf37a95ab35 ]---
> 
> That's hitting:
> 
>   /* we should never 

Re: [PATCH v2 3/6] x86: clean up _TIF_SYSCALL_EMU handling using ptrace_syscall_enter hook

2019-05-01 Thread Oleg Nesterov
On 04/30, Sudeep Holla wrote:
>
> On Mon, Mar 18, 2019 at 04:33:22PM +0100, Oleg Nesterov wrote:
> >
> > And it seems that _TIF_WORK_SYSCALL_ENTRY needs some cleanups too... We 
> > don't need
> > "& _TIF_WORK_SYSCALL_ENTRY" in syscall_trace_enter, and 
> > _TIF_WORK_SYSCALL_ENTRY
> > should not include _TIF_NOHZ?
> >
>
> I was about to post the updated version and checked this to make sure I have
> covered everything or not. I had missed the above comment. All architectures
> have _TIF_NOHZ in their mask that they check to do work. And from x86, I read
> "...syscall_trace_enter(). Also includes TIF_NOHZ for enter_from_user_mode()"
> So I don't understand why _TIF_NOHZ needs to be dropped.

I have already forgot this discussion... But after I glanced at this code again
I still think the same, and I don't understand why do you disagree.

> Also if we need to drop, we can address that separately examining all archs.

Sure, and I was only talking about x86. We can keep TIF_NOHZ and even
set_tsk_thread_flag(TIF_NOHZ) in context_tracking_cpu_set() if some arch needs
this but remove TIF_NOHZ from TIF_WORK_SYSCALL_ENTRY in 
arch/x86/include/asm/thread_info.h,
afaics this shouldn't make any difference.

And I see no reason why x86 needs to use TIF_WORK_SYSCALL_ENTRY in
syscall_trace_enter().

Oleg.



Re: [PATCH v2 4/6] dt-bindings: soc/fsl: qe: document new fsl,qe-snums binding

2019-05-01 Thread Joakim Tjernlund
On Wed, 2019-05-01 at 09:29 +, Rasmus Villemoes wrote:
> CAUTION: This email originated from outside of the organization. Do not click 
> links or open attachments unless you recognize the sender and know the 
> content is safe.
> 
> 
> Reading table 4-30, and its footnotes, of the QUICC Engine Block
> Reference Manual shows that the set of snum _values_ is not
> necessarily just a function of the _number_ of snums, as given in the
> fsl,qe-num-snums property.
> 
> As an alternative, to make it easier to add support for other variants
> of the QUICC engine IP, this introduces a new binding fsl,qe-snums,
> which automatically encodes both the number of snums and the actual
> values to use.
> 
> For example, for the MPC8309, one would specify the property as
> 
>fsl,qe-snums = /bits/ 8 <
>0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9
>0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>;

I think you need add this example to the qe.txt doc itselft. BTW, what is 
/bits/ ?
> 
> Signed-off-by: Rasmus Villemoes 
> ---
>  Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt 
> b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
> index d7afaff5faff..05f5f485562a 100644
> --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
> +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
> @@ -18,7 +18,8 @@ Required properties:
>  - reg : offset and length of the device registers.
>  - bus-frequency : the clock frequency for QUICC Engine.
>  - fsl,qe-num-riscs: define how many RISC engines the QE has.
> -- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use for 
> the
> +- fsl,qe-snums: This property has to be specified as '/bits/ 8' value,
> +  defining the array of serial number (SNUM) values for the virtual
>threads.
> 
>  Optional properties:
> @@ -34,6 +35,11 @@ Recommended properties
>  - brg-frequency : the internal clock source frequency for baud-rate
>generators in Hz.
> 
> +Deprecated properties
> +- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use
> +  for the threads. Use fsl,qe-snums instead to not only specify the
> +  number of snums, but also their values.
> +
>  Example:
>   qe@e010 {
> #address-cells = <1>;
> --
> 2.20.1
> 



Re: [PATCH v4] powerpc/pseries: Remove limit in wait for dying CPU

2019-05-01 Thread Nathan Lynch
Hi Thiago,

Thiago Jung Bauermann  writes:
> Nathan Lynch  writes:
>> Thiago Jung Bauermann  writes:
>>> +   while (true) {
>>> cpu_status = smp_query_cpu_stopped(pcpu);
>>> if (cpu_status == QCSS_STOPPED ||
>>> cpu_status == QCSS_HARDWARE_ERROR)
>>> break;
>>> -   cpu_relax();
>>> +   udelay(100);
>>> }
>>> }
>>
>> I agree with looping indefinitely but doesn't it need a cond_resched()
>> or similar check?
>
> If there's no kernel or hypervisor bug, it shouldn't take more than a
> few tens of ms for this loop to complete (Gautham measured a maximum of
> 10 ms on a POWER9 with an earlier version of this patch).

10ms is twice the default scheduler quantum...


> In case of bugs related to CPU hotplug (either in the kernel or the
> hypervisor), I was hoping that the resulting lockup warnings would be a
> good indicator that something is wrong. :-)

Not convinced we should assume something is wrong if it takes a few
dozen ms to complete the operation. AFAIK we don't have any guarantees
about the maximum latency of stop-self, and it can be affected by other
activity in the system, whether we're in shared processor mode, etc. Not
to mention smp_query_cpu_stopped has to acquire the global RTAS lock and
be serialized with other tasks calling into RTAS. So I am concerned
about generating spurious warnings here.

If for whatever reason the operation is taking too long, drmgr or
whichever application is initiating the change will appear to stop
making progress. It's not too hard to find out what's going on with
facilities like perf or /proc/pid/stack.


> Though perhaps adding a cond_resched() every 10 ms or so, with a
> WARN_ON() if it loops for more than 50 ms would be better.

A warning doesn't seem appropriate to me, and cond_resched should be
invoked in each iteration. Or just msleep(1) in each iteration would be
fine, I think.

But I'd like to bring in some more context -- here is the body of
pseries_cpu_die:

static void pseries_cpu_die(unsigned int cpu)
{
int tries;
int cpu_status = 1;
unsigned int pcpu = get_hard_smp_processor_id(cpu);

if (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) {
cpu_status = 1;
for (tries = 0; tries < 5000; tries++) {
if (get_cpu_current_state(cpu) == CPU_STATE_INACTIVE) {
cpu_status = 0;
break;
}
msleep(1);
}
} else if (get_preferred_offline_state(cpu) == CPU_STATE_OFFLINE) {

for (tries = 0; tries < 25; tries++) {
cpu_status = smp_query_cpu_stopped(pcpu);
if (cpu_status == QCSS_STOPPED ||
cpu_status == QCSS_HARDWARE_ERROR)
break;
cpu_relax();
}
}

This patch alters the behavior of the second loop (the CPU_STATE_OFFLINE
branch). The CPU_STATE_INACTIVE branch is used when the offline behavior
is to use H_CEDE instead of stop-self, correct?

And isn't entering H_CEDE expected to be quite a bit faster than
stop-self? If so, why does that path get five whole seconds[*] while
we're bikeshedding about tens of milliseconds for stop-self? :-)

[*] And should it be made to retry indefinitely as well?



Re: [PATCH] x86/mpx: fix recursive munmap() corruption

2019-05-01 Thread Michael Ellerman
Laurent Dufour  writes:
> Le 23/04/2019 à 18:04, Dave Hansen a écrit :
>> On 4/23/19 4:16 AM, Laurent Dufour wrote:
...
>>> There are 2 assumptions here:
>>>   1. 'start' and 'end' are page aligned (this is guaranteed by 
>>> __do_munmap().
>>>   2. the VDSO is 1 page (this is guaranteed by the union vdso_data_store on 
>>> powerpc)
>> 
>> Are you sure about #2?  The 'vdso64_pages' variable seems rather
>> unnecessary if the VDSO is only 1 page. ;)
>
> Hum, not so sure now ;)
> I got confused, only the header is one page.
> The test is working as a best effort, and don't cover the case where 
> only few pages inside the VDSO are unmmapped (start > 
> mm->context.vdso_base). This is not what CRIU is doing and so this was 
> enough for CRIU support.
>
> Michael, do you think there is a need to manage all the possibility 
> here, since the only user is CRIU and unmapping the VDSO is not a so 
> good idea for other processes ?

Couldn't we implement the semantic that if any part of the VDSO is
unmapped then vdso_base is set to zero? That should be fairly easy, eg:

if (start < vdso_end && end >= mm->context.vdso_base)
mm->context.vdso_base = 0;


We might need to add vdso_end to the mm->context, but that should be OK.

That seems like it would work for CRIU and make sense in general?

cheers


Re: [PATCH] powerpc/mm/radix: Fix kernel crash when running subpage protect test

2019-05-01 Thread Aneesh Kumar K.V

On 5/1/19 7:14 AM, Michael Ellerman wrote:

"Aneesh Kumar K.V"  writes:


This patch fixes the below crash by making sure we touch the subpage protection
related structures only if we know they are allocated on the platform. With
radix translation we don't allocate hash context at all and trying to access
subpage_prot_table results in

  Faulting instruction address: 0xc008bdb4
  Oops: Kernel access of bad area, sig: 11 [#1]
  LE PAGE_SIZE=64K MMU=Radix MMU=Hash SMP NR_CPUS=2048 NUMA PowerNV
  
  NIP [c008bdb4] sys_subpage_prot+0x74/0x590
  LR [c000b688] system_call+0x5c/0x70
  Call Trace:
  [c00020002c6b7d30] [c00020002c6b7d90] 0xc00020002c6b7d90 (unreliable)
  [c00020002c6b7e20] [c000b688] system_call+0x5c/0x70
  Instruction dump:
  fb61ffd8 fb81ffe0 fba1ffe8 fbc1fff0 fbe1fff8 f821ff11 e92d1178 f9210068
  3920 e92d0968 ebe90630 e93f03e8  6000 3860fffe e9410068

We also move the subpage_prot_table with mmp_sem held to avoid racec
between two parallel subpage_prot syscall.

Reported-by: Sachin Sant 
Signed-off-by: Aneesh Kumar K.V 


Presumably it was:

701101865f5d ("powerpc/mm: Reduce memory usage for mm_context_t for radix")

That caused the breakage?



that is correct. Sorry i missed the Fixes: line.

-aneesh



Re: [PATCH v5 00/23] Include linux ACPI docs into Sphinx TOC tree

2019-05-01 Thread Rafael J. Wysocki
On Thursday, April 25, 2019 5:20:35 PM CEST Changbin Du wrote:
> On Thu, Apr 25, 2019 at 10:44:14AM +0200, Rafael J. Wysocki wrote:
> > .On Wed, Apr 24, 2019 at 7:54 PM Changbin Du  wrote:
> > >
> > > Hi All,
> > > The kernel now uses Sphinx to generate intelligent and beautiful 
> > > documentation
> > > from reStructuredText files. I converted all of the Linux ACPI/PCI/X86 
> > > docs to
> > > reST format in this serias.
> > >
> > > The hieararchy of ACPI docs are based on Corbet's suggestion:
> > > https://lkml.org/lkml/2019/4/3/1047
> > > I did some adjustment according to the content and finally they are 
> > > placed as:
> > > Documentation/firmware-guide/acpi/
> > 
> > I'd like to queue up this series, but it is missing a patch to create
> > Documentation/firmware-guide/acpi/index.rst.
> > 
> > Care to provide one?
> oops, the first patch is missed. Let me add it next.

I've picked up the first patch from the v6 and applied this series on top of it.

 Thanks!





[PATCH v2 6/6] soc/fsl/qe: qe.c: fold qe_get_num_of_snums into qe_snums_init

2019-05-01 Thread Rasmus Villemoes
The comment "No QE ever has fewer than 28 SNUMs" is false; e.g. the
MPC8309 has 14. The code path returning -EINVAL is also a recipe for
instant disaster, since the caller (qe_snums_init) uncritically
assigns the return value to the unsigned qe_num_of_snum, and would
thus proceed to attempt to copy 4GB from snum_init_46[] to the snum[]
array.

So fold the handling of the legacy fsl,qe-num-snums into
qe_snums_init, and make sure we do not end up using the snum_init_46
array in cases other than the two where we know it makes sense.

Signed-off-by: Rasmus Villemoes 
---
 drivers/soc/fsl/qe/qe.c | 46 ++---
 1 file changed, 16 insertions(+), 30 deletions(-)

diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 325d689cbf5c..276d7d78ebfc 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -308,24 +308,33 @@ static void qe_snums_init(void)
int i;
 
bitmap_zero(snum_state, QE_NUM_OF_SNUM);
+   qe_num_of_snum = 28; /* The default number of snum for threads is 28 */
qe = qe_get_device_node();
if (qe) {
i = of_property_read_variable_u8_array(qe, "fsl,qe-snums",
   snums, 1, 
QE_NUM_OF_SNUM);
-   of_node_put(qe);
if (i > 0) {
+   of_node_put(qe);
qe_num_of_snum = i;
return;
}
+   /*
+* Fall back to legacy binding of using the value of
+* fsl,qe-num-snums to choose one of the static arrays
+* above.
+*/
+   of_property_read_u32(qe, "fsl,qe-num-snums", _num_of_snum);
+   of_node_put(qe);
}
 
-   qe_num_of_snum = qe_get_num_of_snums();
-
-   if (qe_num_of_snum == 76)
+   if (qe_num_of_snum == 76) {
snum_init = snum_init_76;
-   else
+   } else if (qe_num_of_snum == 28 || qe_num_of_snum == 46) {
snum_init = snum_init_46;
-
+   } else {
+   pr_err("QE: unsupported value of fsl,qe-num-snums: %u\n", 
qe_num_of_snum);
+   return;
+   }
memcpy(snums, snum_init, qe_num_of_snum);
 }
 
@@ -641,30 +650,7 @@ EXPORT_SYMBOL(qe_get_num_of_risc);
 
 unsigned int qe_get_num_of_snums(void)
 {
-   struct device_node *qe;
-   int size;
-   unsigned int num_of_snums;
-   const u32 *prop;
-
-   num_of_snums = 28; /* The default number of snum for threads is 28 */
-   qe = qe_get_device_node();
-   if (!qe)
-   return num_of_snums;
-
-   prop = of_get_property(qe, "fsl,qe-num-snums", );
-   if (prop && size == sizeof(*prop)) {
-   num_of_snums = *prop;
-   if ((num_of_snums < 28) || (num_of_snums > QE_NUM_OF_SNUM)) {
-   /* No QE ever has fewer than 28 SNUMs */
-   pr_err("QE: number of snum is invalid\n");
-   of_node_put(qe);
-   return -EINVAL;
-   }
-   }
-
-   of_node_put(qe);
-
-   return num_of_snums;
+   return qe_num_of_snum;
 }
 EXPORT_SYMBOL(qe_get_num_of_snums);
 
-- 
2.20.1



[PATCH v2 1/6] soc/fsl/qe: qe.c: drop useless static qualifier

2019-05-01 Thread Rasmus Villemoes
The local variable snum_init has no reason to have static storage duration.

Reviewed-by: Christophe Leroy 
Signed-off-by: Rasmus Villemoes 
---
 drivers/soc/fsl/qe/qe.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 612d9c551be5..855373deb746 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -306,7 +306,7 @@ static void qe_snums_init(void)
0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59,
0x68, 0x69, 0x78, 0x79, 0x80, 0x81,
};
-   static const u8 *snum_init;
+   const u8 *snum_init;
 
qe_num_of_snum = qe_get_num_of_snums();
 
-- 
2.20.1



[PATCH v2 5/6] soc/fsl/qe: qe.c: support fsl,qe-snums property

2019-05-01 Thread Rasmus Villemoes
Add driver support for the newly introduced fsl,qe-snums property.

Conveniently, of_property_read_variable_u8_array does exactly what we
need: If the property fsl,qe-snums is found (and has an allowed size),
the array of values get copied to snums, and the return value is the
number of snums - we cannot assign directly to num_of_snums, since we
need to check whether the return value is negative.

Signed-off-by: Rasmus Villemoes 
---
 drivers/soc/fsl/qe/qe.c | 16 ++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 0fb8b59f61ad..325d689cbf5c 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -283,7 +283,6 @@ EXPORT_SYMBOL(qe_clock_source);
  */
 static void qe_snums_init(void)
 {
-   int i;
static const u8 snum_init_76[] = {
0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,
0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,
@@ -304,7 +303,21 @@ static void qe_snums_init(void)
0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59,
0x68, 0x69, 0x78, 0x79, 0x80, 0x81,
};
+   struct device_node *qe;
const u8 *snum_init;
+   int i;
+
+   bitmap_zero(snum_state, QE_NUM_OF_SNUM);
+   qe = qe_get_device_node();
+   if (qe) {
+   i = of_property_read_variable_u8_array(qe, "fsl,qe-snums",
+  snums, 1, 
QE_NUM_OF_SNUM);
+   of_node_put(qe);
+   if (i > 0) {
+   qe_num_of_snum = i;
+   return;
+   }
+   }
 
qe_num_of_snum = qe_get_num_of_snums();
 
@@ -313,7 +326,6 @@ static void qe_snums_init(void)
else
snum_init = snum_init_46;
 
-   bitmap_zero(snum_state, QE_NUM_OF_SNUM);
memcpy(snums, snum_init, qe_num_of_snum);
 }
 
-- 
2.20.1



[PATCH v2 4/6] dt-bindings: soc/fsl: qe: document new fsl,qe-snums binding

2019-05-01 Thread Rasmus Villemoes
Reading table 4-30, and its footnotes, of the QUICC Engine Block
Reference Manual shows that the set of snum _values_ is not
necessarily just a function of the _number_ of snums, as given in the
fsl,qe-num-snums property.

As an alternative, to make it easier to add support for other variants
of the QUICC engine IP, this introduces a new binding fsl,qe-snums,
which automatically encodes both the number of snums and the actual
values to use.

For example, for the MPC8309, one would specify the property as

   fsl,qe-snums = /bits/ 8 <
   0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9
   0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>;

Signed-off-by: Rasmus Villemoes 
---
 Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
index d7afaff5faff..05f5f485562a 100644
--- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
@@ -18,7 +18,8 @@ Required properties:
 - reg : offset and length of the device registers.
 - bus-frequency : the clock frequency for QUICC Engine.
 - fsl,qe-num-riscs: define how many RISC engines the QE has.
-- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use for the
+- fsl,qe-snums: This property has to be specified as '/bits/ 8' value,
+  defining the array of serial number (SNUM) values for the virtual
   threads.
 
 Optional properties:
@@ -34,6 +35,11 @@ Recommended properties
 - brg-frequency : the internal clock source frequency for baud-rate
   generators in Hz.
 
+Deprecated properties
+- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use
+  for the threads. Use fsl,qe-snums instead to not only specify the
+  number of snums, but also their values.
+
 Example:
  qe@e010 {
#address-cells = <1>;
-- 
2.20.1



[PATCH v2 3/6] soc/fsl/qe: qe.c: introduce qe_get_device_node helper

2019-05-01 Thread Rasmus Villemoes
The 'try of_find_compatible_node(NULL, NULL, "fsl,qe"), fall back to
of_find_node_by_type(NULL, "qe")' pattern is repeated five
times. Factor it into a common helper.

Reviewed-by: Christophe Leroy 
Signed-off-by: Rasmus Villemoes 
---
 drivers/soc/fsl/qe/qe.c | 71 +
 1 file changed, 29 insertions(+), 42 deletions(-)

diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 303aa29cb27d..0fb8b59f61ad 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -56,6 +56,20 @@ static unsigned int qe_num_of_snum;
 
 static phys_addr_t qebase = -1;
 
+static struct device_node *qe_get_device_node(void)
+{
+   struct device_node *qe;
+
+   /*
+* Newer device trees have an "fsl,qe" compatible property for the QE
+* node, but we still need to support older device trees.
+*/
+   qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
+   if (qe)
+   return qe;
+   return of_find_node_by_type(NULL, "qe");
+}
+
 static phys_addr_t get_qe_base(void)
 {
struct device_node *qe;
@@ -65,12 +79,9 @@ static phys_addr_t get_qe_base(void)
if (qebase != -1)
return qebase;
 
-   qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
-   if (!qe) {
-   qe = of_find_node_by_type(NULL, "qe");
-   if (!qe)
-   return qebase;
-   }
+   qe = qe_get_device_node();
+   if (!qe)
+   return qebase;
 
ret = of_address_to_resource(qe, 0, );
if (!ret)
@@ -164,12 +175,9 @@ unsigned int qe_get_brg_clk(void)
if (brg_clk)
return brg_clk;
 
-   qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
-   if (!qe) {
-   qe = of_find_node_by_type(NULL, "qe");
-   if (!qe)
-   return brg_clk;
-   }
+   qe = qe_get_device_node();
+   if (!qe)
+   return brg_clk;
 
prop = of_get_property(qe, "brg-frequency", );
if (prop && size == sizeof(*prop))
@@ -557,16 +565,9 @@ struct qe_firmware_info *qe_get_firmware_info(void)
 
initialized = 1;
 
-   /*
-* Newer device trees have an "fsl,qe" compatible property for the QE
-* node, but we still need to support older device trees.
-   */
-   qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
-   if (!qe) {
-   qe = of_find_node_by_type(NULL, "qe");
-   if (!qe)
-   return NULL;
-   }
+   qe = qe_get_device_node();
+   if (!qe)
+   return NULL;
 
/* Find the 'firmware' child node */
fw = of_get_child_by_name(qe, "firmware");
@@ -612,16 +613,9 @@ unsigned int qe_get_num_of_risc(void)
unsigned int num_of_risc = 0;
const u32 *prop;
 
-   qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
-   if (!qe) {
-   /* Older devices trees did not have an "fsl,qe"
-* compatible property, so we need to look for
-* the QE node by name.
-*/
-   qe = of_find_node_by_type(NULL, "qe");
-   if (!qe)
-   return num_of_risc;
-   }
+   qe = qe_get_device_node();
+   if (!qe)
+   return num_of_risc;
 
prop = of_get_property(qe, "fsl,qe-num-riscs", );
if (prop && size == sizeof(*prop))
@@ -641,16 +635,9 @@ unsigned int qe_get_num_of_snums(void)
const u32 *prop;
 
num_of_snums = 28; /* The default number of snum for threads is 28 */
-   qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
-   if (!qe) {
-   /* Older devices trees did not have an "fsl,qe"
-* compatible property, so we need to look for
-* the QE node by name.
-*/
-   qe = of_find_node_by_type(NULL, "qe");
-   if (!qe)
-   return num_of_snums;
-   }
+   qe = qe_get_device_node();
+   if (!qe)
+   return num_of_snums;
 
prop = of_get_property(qe, "fsl,qe-num-snums", );
if (prop && size == sizeof(*prop)) {
-- 
2.20.1



[PATCH v2 2/6] soc/fsl/qe: qe.c: reduce static memory footprint by 1.7K

2019-05-01 Thread Rasmus Villemoes
The current array of struct qe_snum use 256*4 bytes for just keeping
track of the free/used state of each index, and the struct layout
means there's another 768 bytes of padding. If we just unzip that
structure, the array of snum values just use 256 bytes, while the
free/inuse state can be tracked in a 32 byte bitmap.

So this reduces the .data footprint by 1760 bytes. It also serves as
preparation for introducing another DT binding for specifying the snum
values.

Signed-off-by: Rasmus Villemoes 
---
 drivers/soc/fsl/qe/qe.c | 43 -
 1 file changed, 12 insertions(+), 31 deletions(-)

diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 855373deb746..303aa29cb27d 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -14,6 +14,7 @@
  * Free Software Foundation;  either version 2 of the  License, or (at your
  * option) any later version.
  */
+#include 
 #include 
 #include 
 #include 
@@ -43,25 +44,14 @@ static DEFINE_SPINLOCK(qe_lock);
 DEFINE_SPINLOCK(cmxgcr_lock);
 EXPORT_SYMBOL(cmxgcr_lock);
 
-/* QE snum state */
-enum qe_snum_state {
-   QE_SNUM_STATE_USED,
-   QE_SNUM_STATE_FREE
-};
-
-/* QE snum */
-struct qe_snum {
-   u8 num;
-   enum qe_snum_state state;
-};
-
 /* We allocate this here because it is used almost exclusively for
  * the communication processor devices.
  */
 struct qe_immap __iomem *qe_immr;
 EXPORT_SYMBOL(qe_immr);
 
-static struct qe_snum snums[QE_NUM_OF_SNUM];   /* Dynamically allocated SNUMs 
*/
+static u8 snums[QE_NUM_OF_SNUM];   /* Dynamically allocated SNUMs */
+static DECLARE_BITMAP(snum_state, QE_NUM_OF_SNUM);
 static unsigned int qe_num_of_snum;
 
 static phys_addr_t qebase = -1;
@@ -315,10 +305,8 @@ static void qe_snums_init(void)
else
snum_init = snum_init_46;
 
-   for (i = 0; i < qe_num_of_snum; i++) {
-   snums[i].num = snum_init[i];
-   snums[i].state = QE_SNUM_STATE_FREE;
-   }
+   bitmap_zero(snum_state, QE_NUM_OF_SNUM);
+   memcpy(snums, snum_init, qe_num_of_snum);
 }
 
 int qe_get_snum(void)
@@ -328,12 +316,10 @@ int qe_get_snum(void)
int i;
 
spin_lock_irqsave(_lock, flags);
-   for (i = 0; i < qe_num_of_snum; i++) {
-   if (snums[i].state == QE_SNUM_STATE_FREE) {
-   snums[i].state = QE_SNUM_STATE_USED;
-   snum = snums[i].num;
-   break;
-   }
+   i = find_first_zero_bit(snum_state, qe_num_of_snum);
+   if (i < qe_num_of_snum) {
+   set_bit(i, snum_state);
+   snum = snums[i];
}
spin_unlock_irqrestore(_lock, flags);
 
@@ -343,14 +329,9 @@ EXPORT_SYMBOL(qe_get_snum);
 
 void qe_put_snum(u8 snum)
 {
-   int i;
-
-   for (i = 0; i < qe_num_of_snum; i++) {
-   if (snums[i].num == snum) {
-   snums[i].state = QE_SNUM_STATE_FREE;
-   break;
-   }
-   }
+   const u8 *p = memchr(snums, snum, qe_num_of_snum);
+   if (p)
+   clear_bit(p - snums, snum_state);
 }
 EXPORT_SYMBOL(qe_put_snum);
 
-- 
2.20.1



[PATCH v2 0/6] soc/fsl/qe: cleanups and new DT binding

2019-05-01 Thread Rasmus Villemoes
This small series consists of some small cleanups and simplifications
of the QUICC engine driver, and introduces a new DT binding that makes
it much easier to support other variants of the QUICC engine IP block
that appears in the wild: There's no reason to expect in general that
the number of valid SNUMs uniquely determines the set of such, so it's
better to simply let the device tree specify the values (and,
implicitly via the array length, also the count).

v2:
- Address comments from Christophe Leroy
- Add his Reviewed-by to 1/6 and 3/6
- Split DT binding update to separate patch as per
  Documentation/devicetree/bindings/submitting-patches.txt


Rasmus Villemoes (6):
  soc/fsl/qe: qe.c: drop useless static qualifier
  soc/fsl/qe: qe.c: reduce static memory footprint by 1.7K
  soc/fsl/qe: qe.c: introduce qe_get_device_node helper
  dt-bindings: soc/fsl: qe: document new fsl,qe-snums binding
  soc/fsl/qe: qe.c: support fsl,qe-snums property
  soc/fsl/qe: qe.c: fold qe_get_num_of_snums into qe_snums_init

 .../devicetree/bindings/soc/fsl/cpm_qe/qe.txt |   8 +-
 drivers/soc/fsl/qe/qe.c   | 164 +++---
 2 files changed, 72 insertions(+), 100 deletions(-)

-- 
2.20.1



Re: [PATCH kernel v2 0/2] powerpc/ioda2: Another attempt to allow DMA masks between 32 and 59

2019-05-01 Thread Alexey Kardashevskiy



On 01/05/2019 16:09, Alistair Popple wrote:
> Hi Alexey,
> 
> Do we need a seperate patch to allow this to be used? Last time I tried 
> calling dma_set_mask(52) on powernv it returned an error and there doesn't 
> seem to be anything obvious to me in this series to change that behaviour, 
> but 
> perhaps I missed something.


Right now (this could have changed with the Hellwig's patches) when
called with MASK(52), dma_iommu_dma_supported() will select the default
ops and allow any mask. The kernel won't be able to use the entire mask
(since the default window won't be that big) and eventually
dma_map_ops::alloc() will fail when the entire DMA window is used but
this may happen anyway. This patchset does not change this behaviour,
just moves the upper limit for DMA window further up.



https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/kernel/dma-iommu.c?h=v5.1-rc7#n117

int dma_iommu_dma_supported(struct device *dev, u64 mask)
{
struct iommu_table *tbl = get_iommu_table_base(dev);

if (!tbl) {
dev_info(dev, "Warning: IOMMU dma not supported: mask 0x%08llx"
", table unavailable\n", mask);
return 0;
}

if (dev_is_pci(dev) && dma_iommu_bypass_supported(dev, mask)) {
dev->archdata.iommu_bypass = true;
dev_dbg(dev, "iommu: 64-bit OK, using fixed ops\n");
return 1;
}

if (tbl->it_offset > (mask >> tbl->it_page_shift)) {
dev_info(dev, "Warning: IOMMU offset too big for device 
mask\n");
dev_info(dev, "mask: 0x%08llx, table offset: 0x%08lx\n",
mask, tbl->it_offset << tbl->it_page_shift);
return 0;
}

dev_dbg(dev, "iommu: not 64-bit, using default ops\n");
dev->archdata.iommu_bypass = false;
return 1;
}


> 
> - Alistair
> 
> On Wednesday, 1 May 2019 3:28:20 PM AEST Alexey Kardashevskiy wrote:
>> This is an attempt to allow DMA masks between 32..59 which are not large
>> enough to use either a PHB3 bypass mode or a sketchy bypass. Depending
>> on the max order, up to 40 is usually available.
>>
>>
>> This is based on sha1
>> 37624b58542f Linus Torvalds "Linux 5.1-rc7".
>>
>> Please comment. Thanks.
>>
>>
>>
>> Alexey Kardashevskiy (2):
>>   powerpc/powernv/ioda2: Allocate TCE table levels on demand for default
>> DMA window
>>   powerpc/powernv/ioda2: Create bigger default window with 64k IOMMU
>> pages
>>
>>  arch/powerpc/include/asm/iommu.h  |  8 ++-
>>  arch/powerpc/platforms/powernv/pci.h  |  2 +-
>>  arch/powerpc/kernel/iommu.c   | 58 +--
>>  arch/powerpc/platforms/powernv/pci-ioda-tce.c | 20 +++
>>  arch/powerpc/platforms/powernv/pci-ioda.c | 40 +++--
>>  5 files changed, 90 insertions(+), 38 deletions(-)
> 
> 

-- 
Alexey


Re: [PATCH] powerpc/tm: Avoid machine crash on rt_sigreturn

2019-05-01 Thread Michael Neuling
On Wed, 2019-01-16 at 14:47 -0200, Breno Leitao wrote:
> There is a kernel crash that happens if rt_sigreturn is called inside a
> transactional block.
> 
> This crash happens if the kernel hits an in-kernel page fault when
> accessing userspace memory, usually through copy_ckvsx_to_user(). A major
> page fault calls might_sleep() function, which can cause a task reschedule.
> A task reschedule (switch_to()) reclaim and recheckpoint the TM states,
> but, in the signal return path, the checkpointed memory was already
> reclaimed, thus the exception stack has MSR that points to MSR[TS]=0.
> 
> When the code returns from might_sleep() and a task reschedule happened,
> then this task is returned with the memory recheckpointed, and
> CPU MSR[TS] = suspended.
> 
> This means that there is a side effect at might_sleep() if it is called
> with CPU MSR[TS] = 0 and the task has regs->msr[TS] != 0.
> 
> This side effect can cause a TM bad thing, since at the exception entrance,
> the stack saves MSR[TS]=0, and this is what will be used at RFID, but,
> the processor has MSR[TS] = Suspended, and this transition will be invalid
> and a TM Bad thing will be raised, causing the following crash:
> 
>   Unexpected TM Bad Thing exception at c000e9ec (msr
> 0x800302a03031) tm_scratch=80010280b033
>   cpu 0xc: Vector: 700 (Program Check) at [c0003ff1fd70]
>   pc: c000e9ec: fast_exception_return+0x100/0x1bc
>   lr: c0032948: handle_rt_signal64+0xb8/0xaf0
>   sp: c004263ebc40
>  msr: 800302a03031
> current = 0xc00415050300
> paca= 0xc0003ffc4080   irqmask: 0x03   irq_happened: 0x01
>   pid   = 25006, comm = sigfuz
>   Linux version 5.0.0-rc1-1-g3bd6e94bec12 (breno@debian) (gcc version
> 8.2.0 (Debian 8.2.0-3)) #899 SMP Mon Jan 7 11:30:07 EST 2019
>   WARNING: exception is not recoverable, can't continue
>   enter ? for help
>   [c004263ebc40] c0032948 handle_rt_signal64+0xb8/0xaf0
> (unreliable)
>   [c004263ebd30] c0022780 do_notify_resume+0x2f0/0x430
>   [c004263ebe20] c000e844 ret_from_except_lite+0x70/0x74
>   --- Exception: c00 (System Call) at 7fffbaac400c
>   SP (7fffeca90f40) is in userspace
> 
> The solution for this problem is running the sigreturn code with
> regs->msr[TS] disabled, thus, avoiding hitting the side effect above. This
> does not seem to be a problem since regs->msr will be replaced by the
> ucontext value, so, it is being flushed already. In this case, it is
> flushed earlier.
> 
> Signed-off-by: Breno Leitao 

Acked-by: Michael Neuling 

This still applies on powerpc/next so just acking rather than reposting

> ---
>  arch/powerpc/kernel/signal_64.c | 27 ++-
>  1 file changed, 26 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
> index 6794466f6420..06c299ef6132 100644
> --- a/arch/powerpc/kernel/signal_64.c
> +++ b/arch/powerpc/kernel/signal_64.c
> @@ -565,7 +565,7 @@ static long restore_tm_sigcontexts(struct task_struct
> *tsk,
>   preempt_disable();
>  
>   /* pull in MSR TS bits from user context */
> - regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr & MSR_TS_MASK);
> + regs->msr |= msr & MSR_TS_MASK;
>  
>   /*
>* Ensure that TM is enabled in regs->msr before we leave the signal
> @@ -745,6 +745,31 @@ SYSCALL_DEFINE0(rt_sigreturn)
>   if (MSR_TM_SUSPENDED(mfmsr()))
>   tm_reclaim_current(0);
>  
> + /*
> +  * Disable MSR[TS] bit also, so, if there is an exception in the
> +  * code below (as a page fault in copy_ckvsx_to_user()), it does
> +  * not recheckpoint this task if there was a context switch inside
> +  * the exception.
> +  *
> +  * A major page fault can indirectly call schedule(). A reschedule
> +  * process in the middle of an exception can have a side effect
> +  * (Changing the CPU MSR[TS] state), since schedule() is called
> +  * with the CPU MSR[TS] disable and returns with MSR[TS]=Suspended
> +  * (switch_to() calls tm_recheckpoint() for the 'new' process). In
> +  * this case, the process continues to be the same in the CPU, but
> +  * the CPU state just changed.
> +  *
> +  * This can cause a TM Bad Thing, since the MSR in the stack will
> +  * have the MSR[TS]=0, and this is what will be used to RFID.
> +  *
> +  * Clearing MSR[TS] state here will avoid a recheckpoint if there
> +  * is any process reschedule in kernel space. The MSR[TS] state
> +  * does not need to be saved also, since it will be replaced with
> +  * the MSR[TS] that came from user context later, at
> +  * restore_tm_sigcontexts.
> +  */
> + regs->msr &= ~MSR_TS_MASK;
> +
>   if (__get_user(msr, >uc_mcontext.gp_regs[PT_MSR]))
>   goto badframe;
>   if (MSR_TM_ACTIVE(msr)) {


Re: [PATCH 2/2] powerpc/mm: Warn if W+X pages found on boot

2019-05-01 Thread Russell Currey
On Wed, 2019-04-24 at 09:14 +0200, Christophe Leroy wrote:
> 
> Le 24/04/2019 à 08:39, Russell Currey a écrit :
> > Implement code to walk all pages and warn if any are found to be
> > both
> > writable and executable.  Depends on STRICT_KERNEL_RWX enabled, and
> > is
> > behind the DEBUG_WX config option.
> > 
> > This only runs on boot and has no runtime performance implications.
> > 
> > Very heavily influenced (and in some cases copied verbatim) from
> > the
> > ARM64 code written by Laura Abbott (thanks!), since our ptdump
> > infrastructure is similar.
> > 
> > Signed-off-by: Russell Currey 
> > ---
> >   arch/powerpc/Kconfig.debug | 19 +++
> >   arch/powerpc/include/asm/pgtable.h |  5 
> >   arch/powerpc/mm/pgtable_32.c   |  5 
> >   arch/powerpc/mm/pgtable_64.c   |  5 
> >   arch/powerpc/mm/ptdump/ptdump.c| 38
> > ++
> >   5 files changed, 72 insertions(+)
> > 
> > diff --git a/arch/powerpc/Kconfig.debug
> > b/arch/powerpc/Kconfig.debug
> > index 4e00cb0a5464..a4160ff02ed4 100644
> > --- a/arch/powerpc/Kconfig.debug
> > +++ b/arch/powerpc/Kconfig.debug
> > @@ -361,6 +361,25 @@ config PPC_PTDUMP
> >   
> >   If you are unsure, say N.
> >   
> > +config DEBUG_WX
> 
> I would call it PPC_DEBUG_WX to avoid confusion.

It's the same functionality as on other architectures and is an arch-
local thing, I personally think it should be left as-is but given we
already put the PPC prefix on PTDUMP, I'll add it so it's consistent



> > +   if (radix_enabled())
> > +   st.start_address = PAGE_OFFSET;
> > +   else
> + st.start_address = KERN_VIRT_START;
>
> KERN_VIRT_START doesn't exist on PPC32.
> 
> Christophe
> 
Thanks a lot for the review!  Applied all your suggestions.  What
should I use on PPC32 instead?

- Russell



Re: [PATCH] cxl: Add new kernel traces

2019-05-01 Thread Michael Ellerman
Christophe Lombard  writes:

> This patch adds new kernel traces in the current in-kernel 'library'
> which can be called by other drivers to help interacting with an
> IBM XSL on a POWER9 system.
>
> If some kernel traces exist in the 'normal path' to handle a page or a
> segment fault, some others are missing when a page fault is handle
> through cxllib.
>
> Signed-off-by: Christophe Lombard 
> ---
>  drivers/misc/cxl/cxllib.c |   3 ++
>  drivers/misc/cxl/fault.c  |   2 +
>  drivers/misc/cxl/irq.c|   2 +-
>  drivers/misc/cxl/trace.h  | 115 
> ++
>  4 files changed, 72 insertions(+), 50 deletions(-)

Sorry this no longer builds:

drivers/misc/cxl/cxllib.c:215:35: note: each undeclared identifier is reported 
only once for each function it appears in
drivers/misc/cxl/cxllib.c:215:41: error: 'flags' undeclared (first use in this 
function); did you mean 'class'?
  trace_cxl_lib_handle_fault(addr, size, flags);
 ^
 class

cheers


Re: [PATCH kernel v2 0/2] powerpc/ioda2: Another attempt to allow DMA masks between 32 and 59

2019-05-01 Thread Alistair Popple
Hi Alexey,

Do we need a seperate patch to allow this to be used? Last time I tried 
calling dma_set_mask(52) on powernv it returned an error and there doesn't 
seem to be anything obvious to me in this series to change that behaviour, but 
perhaps I missed something.

- Alistair

On Wednesday, 1 May 2019 3:28:20 PM AEST Alexey Kardashevskiy wrote:
> This is an attempt to allow DMA masks between 32..59 which are not large
> enough to use either a PHB3 bypass mode or a sketchy bypass. Depending
> on the max order, up to 40 is usually available.
> 
> 
> This is based on sha1
> 37624b58542f Linus Torvalds "Linux 5.1-rc7".
> 
> Please comment. Thanks.
> 
> 
> 
> Alexey Kardashevskiy (2):
>   powerpc/powernv/ioda2: Allocate TCE table levels on demand for default
> DMA window
>   powerpc/powernv/ioda2: Create bigger default window with 64k IOMMU
> pages
> 
>  arch/powerpc/include/asm/iommu.h  |  8 ++-
>  arch/powerpc/platforms/powernv/pci.h  |  2 +-
>  arch/powerpc/kernel/iommu.c   | 58 +--
>  arch/powerpc/platforms/powernv/pci-ioda-tce.c | 20 +++
>  arch/powerpc/platforms/powernv/pci-ioda.c | 40 +++--
>  5 files changed, 90 insertions(+), 38 deletions(-)




Re: [PATCH 4/5] soc/fsl/qe: qe.c: support fsl,qe-snums property

2019-05-01 Thread Rasmus Villemoes
On 30/04/2019 19.19, Christophe Leroy wrote:
> 
> 
> Le 30/04/2019 à 15:36, Rasmus Villemoes a écrit :
>> The current code assumes that the set of snum _values_ to populate the
>> snums[] array with is a function of the _number_ of snums
>> alone. However, reading table 4-30, and its footnotes, of the QUICC
>> Engine Block Reference Manual shows that that is a bit too naive.
>>
>> As an alternative, this introduces a new binding fsl,qe-snums, which
>> automatically encodes both the number of snums and the actual values to
>> use. Conveniently, of_property_read_variable_u8_array does exactly
>> what we need.
>>
>> For example, for the MPC8309, one would specify the property as
>>
>>     fsl,qe-snums = /bits/ 8 <
>>     0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9
>>     0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>;
>>
>> Signed-off-by: Rasmus Villemoes 
>> ---
>>   .../devicetree/bindings/soc/fsl/cpm_qe/qe.txt  |  8 +++-
>>   drivers/soc/fsl/qe/qe.c    | 14 +-
>>   2 files changed, 20 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
>> b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
>> index d7afaff5faff..05f5f485562a 100644
>> --- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
>> +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt
>> @@ -18,7 +18,8 @@ Required properties:
>>   - reg : offset and length of the device registers.
>>   - bus-frequency : the clock frequency for QUICC Engine.
>>   - fsl,qe-num-riscs: define how many RISC engines the QE has.
>> -- fsl,qe-num-snums: define how many serial number(SNUM) the QE can
>> use for the
>> +- fsl,qe-snums: This property has to be specified as '/bits/ 8' value,
>> +  defining the array of serial number (SNUM) values for the virtual
>>     threads.
>>     Optional properties:
>> @@ -34,6 +35,11 @@ Recommended properties
>>   - brg-frequency : the internal clock source frequency for baud-rate
>>     generators in Hz.
>>   +Deprecated properties
>> +- fsl,qe-num-snums: define how many serial number(SNUM) the QE can use
>> +  for the threads. Use fsl,qe-snums instead to not only specify the
>> +  number of snums, but also their values.
>> +
>>   Example:
>>    qe@e010 {
>>   #address-cells = <1>;
>> diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
>> index aff9d1373529..af3c2b2b268f 100644
>> --- a/drivers/soc/fsl/qe/qe.c
>> +++ b/drivers/soc/fsl/qe/qe.c
>> @@ -283,7 +283,6 @@ EXPORT_SYMBOL(qe_clock_source);
>>    */
>>   static void qe_snums_init(void)
>>   {
>> -    int i;
> 
> Why do you move this one ?

To keep the declarations of the auto variables together. When reading
the code and needing to know the type of i, it's much harder to find its
declaration if one has to skip back over the two tables, and it's
unnatural to have it separate from the others.

>>   static const u8 snum_init_76[] = {
>>   0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,
>>   0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,
>> @@ -304,9 +303,22 @@ static void qe_snums_init(void)
>>   0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59,
>>   0x68, 0x69, 0x78, 0x79, 0x80, 0x81,
>>   };
>> +    struct device_node *qe;
>>   const u8 *snum_init;
>> +    int i;
>>     bitmap_zero(snum_state, QE_NUM_OF_SNUM);
>> +    qe = qe_get_device_node();
>> +    if (qe) {
>> +    i = of_property_read_variable_u8_array(qe, "fsl,qe-snums",
>> +   snums, 1, QE_NUM_OF_SNUM);
>> +    of_node_put(qe);
>> +    if (i > 0) {
>> +    qe_num_of_snum = i;
>> +    return;
> 
> In that case you skip the rest of the init ? Can you explain ?

If of_property_read_variable_u8_array is succesful, it has already
stored the values into the snums array, so there's no copying left to
do, and the return value is the length of the array (which we save for
later in qe_num_of_snum). So there's really nothing more to do.

This was what I tried to hint at with "Conveniently,
of_property_read_variable_u8_array does exactly
what we need.", but I can see that that might need elaborating a little.

Rasmus