Re: [PATCH V2 2/2] powerpc/perf: Add platform specific check_attr_config
On 3/10/21 6:46 PM, Alexey Kardashevskiy wrote:
On 26/02/2021 17:50, Madhavan Srinivasan wrote:
Add platform specific attr.config value checks. Patch
includes checks for both power9 and power10.
Signed-off-by: Madhavan Srinivasan
---
Changelog v1:
- No changes.
arch/powerpc/perf/isa207-common.c | 41 +++
arch/powerpc/perf/isa207-common.h | 2 ++
arch/powerpc/perf/power10-pmu.c | 13 ++
arch/powerpc/perf/power9-pmu.c | 13 ++
4 files changed, 69 insertions(+)
diff --git a/arch/powerpc/perf/isa207-common.c
b/arch/powerpc/perf/isa207-common.c
index e4f577da33d8..b255799f5b51 100644
--- a/arch/powerpc/perf/isa207-common.c
+++ b/arch/powerpc/perf/isa207-common.c
@@ -694,3 +694,44 @@ int isa207_get_alternatives(u64 event, u64
alt[], int size, unsigned int flags,
return num_alt;
}
+
+int isa3_X_check_attr_config(struct perf_event *ev)
"isa300" is used everywhere else to refer to ISA 3.00.
ok will rename if as isa3XX_check_attr_config then.
+{
+ u64 val, sample_mode;
+ u64 event = ev->attr.config;
+
+ val = (event >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK;
I am not familiar with the code - "Raw event encoding for Power9" from
arch/powerpc/perf/power9-pmu.c - where is this from? Is this how linux
defines encoding or it is P9 UM or something?
mpe and pmu folks defined the encoding format for power8, and then it
was carried forward slightly modified for P9.
+ sample_mode = val & 0x3;
+
+ /*
+ * MMCRA[61:62] is Randome Sampling Mode (SM).
+ * value of 0b11 is reserved.
+ */
+ if (sample_mode == 0x3)
+ return -1;
+
+ /*
+ * Check for all reserved value
+ */
+ switch (val) {
+ case 0x5:
+ case 0x9:
+ case 0xD:
+ case 0x19:
+ case 0x1D:
+ case 0x1A:
+ case 0x1E:
What spec did these numbers come from?
Thanks for asking. Yes, these are published as part of Performance
monitoring unit user guide.
https://wiki.raptorcs.com/w/images/6/6b/POWER9_PMU_UG_v12_28NOV2018_pub.pdf
Will add a comment about the source of these bits.
+ return -1;
+ }
+
+ /*
+ * MMCRA[48:51]/[52:55]) Threshold Start/Stop
+ * Events Selection.
+ * 0b/0b is reserved.
The mapping between the event and MMCRA is very unclear :) But there
are more reserved values in MMCRA in PowerISA_public.v3.0B.pdf:
===
Reserved
Problem state access (SPR 770)
1000 - - ReservedPrivileged access (SPR 770 or 786)
1000 - - Implementation-dependent
===
Do not you need to filter these too?
Most of these bits are not architected but one should refer user guide
spec which talks about each bit and supported values.
https://wiki.raptorcs.com/w/images/6/6b/POWER9_PMU_UG_v12_28NOV2018_pub.pdf
+ */
+ val = (event >> EVENT_THR_CTL_SHIFT) & EVENT_THR_CTL_MASK;
+ if (((val & 0xF0) == 0xF0) || ((val & 0xF) == 0xF))
+ return -1;
Since the filters may differ for problem and privileged, may be make
these check_attr_config() hooks return EINVAL or EPERM and pass it on
in the caller? Not sure there is much value in it though.
Since these are reserved values, privilege state does not matter. Will
change it to return EINVAL.
Thanks for the review.
Maddy
+
+ return 0;
+}
diff --git a/arch/powerpc/perf/isa207-common.h
b/arch/powerpc/perf/isa207-common.h
index 1af0e8c97ac7..ae8eaf05efd1 100644
--- a/arch/powerpc/perf/isa207-common.h
+++ b/arch/powerpc/perf/isa207-common.h
@@ -280,4 +280,6 @@ void isa207_get_mem_data_src(union
perf_mem_data_src *dsrc, u32 flags,
struct pt_regs *regs);
void isa207_get_mem_weight(u64 *weight);
+int isa3_X_check_attr_config(struct perf_event *ev);
+
#endif
diff --git a/arch/powerpc/perf/power10-pmu.c
b/arch/powerpc/perf/power10-pmu.c
index a901c1348cad..bc64354cab6a 100644
--- a/arch/powerpc/perf/power10-pmu.c
+++ b/arch/powerpc/perf/power10-pmu.c
@@ -106,6 +106,18 @@ static int power10_get_alternatives(u64 event,
unsigned int flags, u64 alt[])
return num_alt;
}
+static int power10_check_attr_config(struct perf_event *ev)
+{
+ u64 val;
+ u64 event = ev->attr.config;
+
+ val = (event >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK;
+ if (val == 0x10 || isa3_X_check_attr_config(ev))
+ return -1;
+
+ return 0;
+}
+
GENERIC_EVENT_ATTR(cpu-cycles, PM_RUN_CYC);
GENERIC_EVENT_ATTR(instructions, PM_RUN_INST_CMPL);
GENERIC_EVENT_ATTR(branch-instructions, PM_BR_CMPL);
@@ -559,6 +571,7 @@ static struct power_pmu power10_pmu = {
.attr_groups = power10_pmu_attr_groups,
.bhrb_nr = 32,
.capabilities = PERF_PMU_CAP_EXTENDED_REGS,
+ .check_attr_config = power10_check_attr_config,
};
int init_power10_pmu(void)
diff --git a/arch/powerpc/perf/power9-pmu.c
b/arch/powerpc/perf/power9-pmu.c
index 2a57e93a79dc..b3b9b226d053 100644
---
Re: [PATCH V2 1/2] powerpc/perf: Infrastructure to support checking of attr.config*
On 2/26/21 7:33 PM, Paul A. Clarke wrote:
Another drive-by review... just some minor nits, below...
On Fri, Feb 26, 2021 at 12:20:24PM +0530, Madhavan Srinivasan wrote:
Introduce code to support the checking of attr.config* for
values which are reserved for a given platform.
Performance Monitoring Unit (PMU) configuration registers
have fields that are reserved and specific value to bit field
I'd reword to "some specific values for bit fields are reserved".
as reserved. For ex., MMCRA[61:62] is Randome Sampling Mode (SM)
s/Randome/Random/
This occurs here, and below, and in patch 2/2.
and value of 0b11 to this field is reserved.
s/to/for/
Writing a non-zero values in these fields or writing invalid
value to bit fields will have unknown behaviours.
Suggest: Writing non-zero or invalid values in these fields
will have unknown behaviors. (or "behaviours" ;-)
PC
Thanks for the review. Will fix it.
Maddy
Patch adds a generic call-back function "check_attr_config"
in "struct power_pmu", to be called in event_init to
check for attr.config* values for a given platform.
"check_attr_config" is valid only for raw event type.
Signed-off-by: Madhavan Srinivasan
---
Changelog v1:
-Fixed commit message and in-code comments
arch/powerpc/include/asm/perf_event_server.h | 6 ++
arch/powerpc/perf/core-book3s.c | 14 ++
2 files changed, 20 insertions(+)
diff --git a/arch/powerpc/include/asm/perf_event_server.h
b/arch/powerpc/include/asm/perf_event_server.h
index 00e7e671bb4b..dde97d7d9253 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -67,6 +67,12 @@ struct power_pmu {
* the pmu supports extended perf regs capability
*/
int capabilities;
+ /*
+* Function to check event code for values which are
+* reserved. Function takes struct perf_event as input,
+* since event code could be spread in attr.config*
+*/
+ int (*check_attr_config)(struct perf_event *ev);
};
/*
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 6817331e22ff..c6eeb4fdc5fd 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -1958,6 +1958,20 @@ static int power_pmu_event_init(struct perf_event *event)
if (ppmu->blacklist_ev && is_event_blacklisted(ev))
return -EINVAL;
+ /*
+* PMU config registers have fields that are
+* reserved and specific value to bit field as reserved.
+* For ex., MMCRA[61:62] is Randome Sampling Mode (SM)
+* and value of 0b11 to this field is reserved.
+*
+* This check is needed only for raw event type,
+* since tools like fuzzer use raw event type to
+* provide randomized event code values for test.
+*
+*/
+ if (ppmu->check_attr_config &&
+ ppmu->check_attr_config(event))
+ return -EINVAL;
break;
default:
return -ENOENT;
--
2.26.2
[PATCH] powerpc/kexec: Don't use .machine ppc64 in trampoline_64.S
The ".machine" directive allows changing the machine for which code is
being generated. It's equivalent to passing an -mcpu option on the
command line.
Although it can be useful, it's generally a bad idea because it adds
another way to influence code generation separate from the flags
passed via the build system. ie. if we need to build different pieces
of code with different flags we should do that via our Makefiles, not
using ".machine".
However as best as I can tell the ".machine" directive in
trampoline_64.S is not necessary at all.
It was added in commit 0d97631392c2 ("powerpc: Add purgatory for
kexec_file_load() implementation."), which created the file based on
the kexec-tools purgatory. It may be/have-been necessary in the
kexec-tools version, but we have a completely different build system,
and we already pass the desired CPU flags, eg:
gcc ... -m64 -Wl,-a64 -mabi=elfv2 -Wa,-maltivec -Wa,-mpower4 -Wa,-many
... arch/powerpc/purgatory/trampoline_64.S
So drop the ".machine" directive and rely on the assembler flags.
Reported-by: Daniel Axtens
Signed-off-by: Michael Ellerman
---
arch/powerpc/purgatory/trampoline_64.S | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/purgatory/trampoline_64.S
b/arch/powerpc/purgatory/trampoline_64.S
index d956b8a35fd1..b35837c13852 100644
--- a/arch/powerpc/purgatory/trampoline_64.S
+++ b/arch/powerpc/purgatory/trampoline_64.S
@@ -12,7 +12,6 @@
#include
#include
- .machine ppc64
.balign 256
.globl purgatory_start
purgatory_start:
--
2.25.1
[PATCH] powerpc: kernel: Trivial spelling fixes throughout the file head_fsl_booke.S
s/virutal/virtual/ s/mismach/mismatch/ Signed-off-by: Bhaskar Chowdhury --- As Randy pointed out I was changing the predefined macro name,so, reverted or leave it alone. Michael,sorry to run down a cold weave in your spine with my stupdity,this is okay. arch/powerpc/kernel/head_fsl_booke.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 3f4a40cccef5..a955403247f1 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -113,7 +113,7 @@ _ENTRY(_start); 1: /* -* We have the runtime (virutal) address of our base. +* We have the runtime (virtual) address of our base. * We calculate our shift of offset from a 64M page. * We could map the 64M page we belong to at PAGE_OFFSET and * get going from there. @@ -497,7 +497,7 @@ END_BTB_FLUSH_SECTION #endif #endif - bne 2f /* Bail if permission/valid mismach */ + bne 2f /* Bail if permission/valid mismatch */ /* Jump to common tlb load */ b finish_tlb_load @@ -592,7 +592,7 @@ END_BTB_FLUSH_SECTION #endif #endif - bne 2f /* Bail if permission mismach */ + bne 2f /* Bail if permission mismatch */ /* Jump to common TLB load point */ b finish_tlb_load -- 2.30.2
Re: [PATCH] powerpc: kernel: Trivial spelling fixes throughout the file head_fsl_booke.S
On 13:48 Mon 15 Mar 2021, Michael Ellerman wrote: Randy Dunlap writes: On 3/14/21 3:04 PM, Bhaskar Chowdhury wrote: Trivial spelling fixes throughout the file. Signed-off-by: Bhaskar Chowdhury --- arch/powerpc/kernel/head_fsl_booke.S | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index fdd4d274c245..c6fcfca0b0d7 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -403,7 +403,7 @@ interrupt_base: EXCEPTION(0x2900, AP_UNAVAIL, AuxillaryProcessorUnavailable, \ unknown_exception, EXC_XFER_STD) - /* Decrementer Interrupt */ + /* Decremented Interrupt */ No, the comment matches the macro (or whatever that is). Right. I dropped this hunk. Please update your script or whatever to not "correct" that spelling. H ...V2 on the way... cheers signature.asc Description: PGP signature
[PATCH 10/10] powerpc: move norestart trap flag to bit 0
Compact the trap flags down to use the low 4 bits of regs.trap.
A few 64e interrupt trap numbers set bit 4. Although they tended to be
trivial so it wasn't a real problem[1], it is not the right thing to do,
and confusing.
[*] E.g., 0x310 hypercall goes to unknown_exception, which prints
regs->trap directly so 0x310 will appear fine, and only the syscall
interrupt will test norestart, so it won't be confused by 0x310.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/ptrace.h | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/ptrace.h
b/arch/powerpc/include/asm/ptrace.h
index 91194fdd5d01..6a04abfe5eb6 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -185,15 +185,21 @@ static inline void regs_set_return_value(struct pt_regs
*regs, unsigned long rc)
#define current_pt_regs() \
((struct pt_regs *)((unsigned long)task_stack_page(current) +
THREAD_SIZE) - 1)
+/*
+ * The 4 low bits (0xf) are available as flags to overload the trap word,
+ * because interrupt vectors have minimum alignment of 0x10. TRAP_FLAGS_MASK
+ * must cover the bits used as flags, including bit 0 which is used as the
+ * "norestart" bit.
+ */
#ifdef __powerpc64__
-#define TRAP_FLAGS_MASK0x10
+#define TRAP_FLAGS_MASK0x1
#define TRAP(regs) ((regs)->trap & ~TRAP_FLAGS_MASK)
#else
/*
* On 4xx we use bit 1 in the trap word to indicate whether the exception
* is a critical exception (1 means it is).
*/
-#define TRAP_FLAGS_MASK0x1E
+#define TRAP_FLAGS_MASK0xf
#define TRAP(regs) ((regs)->trap & ~TRAP_FLAGS_MASK)
#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0)
#define IS_MCHECK_EXC(regs)(((regs)->trap & 4) != 0)
@@ -222,12 +228,12 @@ static inline bool trap_is_syscall(struct pt_regs *regs)
static inline bool trap_norestart(struct pt_regs *regs)
{
- return regs->trap & 0x10;
+ return regs->trap & 0x1;
}
static inline void set_trap_norestart(struct pt_regs *regs)
{
- regs->trap |= 0x10;
+ regs->trap |= 0x1;
}
#define arch_has_single_step() (1)
--
2.23.0
[PATCH 09/10] powerpc: remove partial register save logic
All subarchitectures always save all GPRs to pt_regs interrupt frames
now. Remove FULL_REGS and associated bits.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/ptrace.h| 17 ++---
arch/powerpc/kernel/align.c | 6 --
arch/powerpc/kernel/interrupt.c | 3 ---
arch/powerpc/kernel/process.c| 12
arch/powerpc/kernel/ptrace/ptrace-view.c | 21 -
arch/powerpc/kernel/ptrace/ptrace.c | 2 --
arch/powerpc/kernel/ptrace/ptrace32.c| 4
arch/powerpc/kernel/signal_32.c | 3 ---
arch/powerpc/kernel/signal_64.c | 2 --
arch/powerpc/kernel/traps.c | 1 -
arch/powerpc/lib/sstep.c | 4
arch/powerpc/xmon/xmon.c | 23 +++
12 files changed, 9 insertions(+), 89 deletions(-)
diff --git a/arch/powerpc/include/asm/ptrace.h
b/arch/powerpc/include/asm/ptrace.h
index c5b3669918f4..91194fdd5d01 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -188,29 +188,16 @@ static inline void regs_set_return_value(struct pt_regs
*regs, unsigned long rc)
#ifdef __powerpc64__
#define TRAP_FLAGS_MASK0x10
#define TRAP(regs) ((regs)->trap & ~TRAP_FLAGS_MASK)
-#define FULL_REGS(regs)true
-#define SET_FULL_REGS(regs)do { } while (0)
-#define CHECK_FULL_REGS(regs) do { } while (0)
-#define NV_REG_POISON 0xdeadbeefdeadbeefUL
#else
/*
- * We use the least-significant bit of the trap field to indicate
- * whether we have saved the full set of registers, or only a
- * partial set. A 1 there means the partial set.
- * On 4xx we use the next bit to indicate whether the exception
+ * On 4xx we use bit 1 in the trap word to indicate whether the exception
* is a critical exception (1 means it is).
*/
-#define TRAP_FLAGS_MASK0x1F
+#define TRAP_FLAGS_MASK0x1E
#define TRAP(regs) ((regs)->trap & ~TRAP_FLAGS_MASK)
-#define FULL_REGS(regs)true
-#define SET_FULL_REGS(regs)do { } while (0)
#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0)
#define IS_MCHECK_EXC(regs)(((regs)->trap & 4) != 0)
#define IS_DEBUG_EXC(regs) (((regs)->trap & 8) != 0)
-#define NV_REG_POISON 0xdeadbeef
-#define CHECK_FULL_REGS(regs)\
-do { \
-} while (0)
#endif /* __powerpc64__ */
static inline void set_trap(struct pt_regs *regs, unsigned long val)
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index c7797eb958c7..ae525397947e 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -299,12 +299,6 @@ int fix_alignment(struct pt_regs *regs)
struct instruction_op op;
int r, type;
- /*
-* We require a complete register set, if not, then our assembly
-* is broken
-*/
- CHECK_FULL_REGS(regs);
-
if (unlikely(__get_user_instr(instr, (void __user *)regs->nip)))
return -EFAULT;
if ((regs->msr & MSR_LE) != (MSR_KERNEL & MSR_LE)) {
diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c
index 2a017d98973a..96ca27ef68ae 100644
--- a/arch/powerpc/kernel/interrupt.c
+++ b/arch/powerpc/kernel/interrupt.c
@@ -51,7 +51,6 @@ notrace long system_call_exception(long r3, long r4, long r5,
if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x))
BUG_ON(!(regs->msr & MSR_RI));
BUG_ON(!(regs->msr & MSR_PR));
- BUG_ON(!FULL_REGS(regs));
BUG_ON(arch_irq_disabled_regs(regs));
#ifdef CONFIG_PPC_PKEY
@@ -369,7 +368,6 @@ notrace unsigned long interrupt_exit_user_prepare(struct
pt_regs *regs, unsigned
if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x))
BUG_ON(!(regs->msr & MSR_RI));
BUG_ON(!(regs->msr & MSR_PR));
- BUG_ON(!FULL_REGS(regs));
BUG_ON(arch_irq_disabled_regs(regs));
#ifdef CONFIG_PPC_BOOK3S_64
CT_WARN_ON(ct_state() == CONTEXT_USER);
@@ -457,7 +455,6 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct
pt_regs *regs, unsign
unlikely(!(regs->msr & MSR_RI)))
unrecoverable_exception(regs);
BUG_ON(regs->msr & MSR_PR);
- BUG_ON(!FULL_REGS(regs));
/*
* CT_WARN_ON comes here via program_check_exception,
* so avoid recursion.
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 7989d9ce468b..1e62a70a29aa 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1447,11 +1447,9 @@ static void print_msr_bits(unsigned long val)
#ifdef CONFIG_PPC64
#define REG"%016lx"
#define REGS_PER_LINE 4
-#define LAST_VOLATILE 13
#else
#define REG"%08lx"
#define REGS_PER_LINE 8
-#define
[PATCH 08/10] powerpc: clean up do_page_fault
search_exception_tables + __bad_page_fault can be substituted with
bad_page_fault, and do_page_fault no longer needs to return a value
to asm for any sub-architecture, so some cleanups can be made there.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/bug.h| 4 +---
arch/powerpc/include/asm/interrupt.h | 2 +-
arch/powerpc/mm/book3s64/hash_utils.c | 16 +++-
arch/powerpc/mm/fault.c | 25 +++--
4 files changed, 16 insertions(+), 31 deletions(-)
diff --git a/arch/powerpc/include/asm/bug.h b/arch/powerpc/include/asm/bug.h
index d1635ffbb179..d02c93e30d4a 100644
--- a/arch/powerpc/include/asm/bug.h
+++ b/arch/powerpc/include/asm/bug.h
@@ -111,11 +111,9 @@
#ifndef __ASSEMBLY__
struct pt_regs;
-long do_page_fault(struct pt_regs *);
-long hash__do_page_fault(struct pt_regs *);
+void hash__do_page_fault(struct pt_regs *);
void bad_page_fault(struct pt_regs *, int);
void __bad_page_fault(struct pt_regs *regs, int sig);
-void do_bad_page_fault_segv(struct pt_regs *regs);
extern void _exception(int, struct pt_regs *, int, unsigned long);
extern void _exception_pkey(struct pt_regs *, unsigned long, int);
extern void die(const char *, struct pt_regs *, long);
diff --git a/arch/powerpc/include/asm/interrupt.h
b/arch/powerpc/include/asm/interrupt.h
index 94fd8e1ff52c..bd0bd9430f78 100644
--- a/arch/powerpc/include/asm/interrupt.h
+++ b/arch/powerpc/include/asm/interrupt.h
@@ -420,7 +420,7 @@ DECLARE_INTERRUPT_HANDLER(do_bad_slb_fault);
DECLARE_INTERRUPT_HANDLER_RAW(do_hash_fault);
/* fault.c */
-DECLARE_INTERRUPT_HANDLER_RET(do_page_fault);
+DECLARE_INTERRUPT_HANDLER(do_page_fault);
DECLARE_INTERRUPT_HANDLER(do_bad_page_fault_segv);
/* process.c */
diff --git a/arch/powerpc/mm/book3s64/hash_utils.c
b/arch/powerpc/mm/book3s64/hash_utils.c
index 581b20a2feaf..1c4b0a29f0f5 100644
--- a/arch/powerpc/mm/book3s64/hash_utils.c
+++ b/arch/powerpc/mm/book3s64/hash_utils.c
@@ -1572,10 +1572,11 @@ DEFINE_INTERRUPT_HANDLER_RET(__do_hash_fault)
DEFINE_INTERRUPT_HANDLER_RAW(do_hash_fault)
{
unsigned long dsisr = regs->dsisr;
- long err;
- if (unlikely(dsisr & (DSISR_BAD_FAULT_64S | DSISR_KEYFAULT)))
- goto page_fault;
+ if (unlikely(dsisr & (DSISR_BAD_FAULT_64S | DSISR_KEYFAULT))) {
+ hash__do_page_fault(regs);
+ return 0;
+ }
/*
* If we are in an "NMI" (e.g., an interrupt when soft-disabled), then
@@ -1595,13 +1596,10 @@ DEFINE_INTERRUPT_HANDLER_RAW(do_hash_fault)
return 0;
}
- err = __do_hash_fault(regs);
- if (err) {
-page_fault:
- err = hash__do_page_fault(regs);
- }
+ if (__do_hash_fault(regs))
+ hash__do_page_fault(regs);
- return err;
+ return 0;
}
#ifdef CONFIG_PPC_MM_SLICES
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 44833660b21d..d4e66ec78189 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -539,36 +539,25 @@ static int ___do_page_fault(struct pt_regs *regs,
unsigned long address,
}
NOKPROBE_SYMBOL(___do_page_fault);
-static long __do_page_fault(struct pt_regs *regs)
+static __always_inline void __do_page_fault(struct pt_regs *regs)
{
- const struct exception_table_entry *entry;
long err;
err = ___do_page_fault(regs, regs->dar, regs->dsisr);
- if (likely(!err))
- return err;
-
- entry = search_exception_tables(regs->nip);
- if (likely(entry)) {
- instruction_pointer_set(regs, extable_fixup(entry));
- return 0;
- } else {
- __bad_page_fault(regs, err);
- return 0;
- }
+ if (unlikely(err))
+ bad_page_fault(regs, err);
}
-NOKPROBE_SYMBOL(__do_page_fault);
-DEFINE_INTERRUPT_HANDLER_RET(do_page_fault)
+DEFINE_INTERRUPT_HANDLER(do_page_fault)
{
- return __do_page_fault(regs);
+ __do_page_fault(regs);
}
#ifdef CONFIG_PPC_BOOK3S_64
/* Same as do_page_fault but interrupt entry has already run in do_hash_fault
*/
-long hash__do_page_fault(struct pt_regs *regs)
+void hash__do_page_fault(struct pt_regs *regs)
{
- return __do_page_fault(regs);
+ __do_page_fault(regs);
}
NOKPROBE_SYMBOL(hash__do_page_fault);
#endif
--
2.23.0
[PATCH 07/10] powerpc/64e/interrupt: handle bad_page_fault in C
With non-volatile registers saved on interrupt, bad_page_fault
can now be called by do_page_fault.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64e.S | 6 --
arch/powerpc/mm/fault.c | 5 +
2 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64e.S
b/arch/powerpc/kernel/exceptions-64e.S
index a059ab3542c2..b08c84e0fa56 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -937,12 +937,6 @@ storage_fault_common:
ld r14,PACA_EXGEN+EX_R14(r13)
ld r15,PACA_EXGEN+EX_R15(r13)
bl do_page_fault
- cmpdi r3,0
- bne-1f
- b interrupt_return
- mr r4,r3
- addir3,r1,STACK_FRAME_OVERHEAD
- bl __bad_page_fault
b interrupt_return
/*
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 2e54bac99a22..44833660b21d 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -552,12 +552,9 @@ static long __do_page_fault(struct pt_regs *regs)
if (likely(entry)) {
instruction_pointer_set(regs, extable_fixup(entry));
return 0;
- } else if (!IS_ENABLED(CONFIG_PPC_BOOK3E_64)) {
+ } else {
__bad_page_fault(regs, err);
return 0;
- } else {
- /* 32 and 64e handle the bad page fault in asm */
- return err;
}
}
NOKPROBE_SYMBOL(__do_page_fault);
--
2.23.0
[PATCH 06/10] powerpc/64e/interrupt: Use new interrupt context tracking scheme
With the new interrupt exit code, context tracking can be managed
more precisely, so remove the last of the 64e workarounds and switch
to the new context tracking code already used by 64s.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/interrupt.h | 28
arch/powerpc/kernel/interrupt.c | 12
2 files changed, 40 deletions(-)
diff --git a/arch/powerpc/include/asm/interrupt.h
b/arch/powerpc/include/asm/interrupt.h
index 29b48d083156..94fd8e1ff52c 100644
--- a/arch/powerpc/include/asm/interrupt.h
+++ b/arch/powerpc/include/asm/interrupt.h
@@ -10,9 +10,6 @@
#include
struct interrupt_state {
-#ifdef CONFIG_PPC_BOOK3E_64
- enum ctx_state ctx_state;
-#endif
};
static inline void booke_restore_dbcr0(void)
@@ -45,9 +42,7 @@ static inline void interrupt_enter_prepare(struct pt_regs
*regs, struct interrup
if (irq_soft_mask_set_return(IRQS_ALL_DISABLED) == IRQS_ENABLED)
trace_hardirqs_off();
local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
-#endif
-#ifdef CONFIG_PPC_BOOK3S_64
if (user_mode(regs)) {
CT_WARN_ON(ct_state() != CONTEXT_USER);
user_exit_irqoff();
@@ -64,12 +59,6 @@ static inline void interrupt_enter_prepare(struct pt_regs
*regs, struct interrup
}
#endif
-#ifdef CONFIG_PPC_BOOK3E_64
- state->ctx_state = exception_enter();
- if (user_mode(regs))
- account_cpu_user_entry();
-#endif
-
booke_restore_dbcr0();
}
@@ -89,25 +78,8 @@ static inline void interrupt_enter_prepare(struct pt_regs
*regs, struct interrup
*/
static inline void interrupt_exit_prepare(struct pt_regs *regs, struct
interrupt_state *state)
{
-#ifdef CONFIG_PPC_BOOK3E_64
- exception_exit(state->ctx_state);
-#endif
-
if (user_mode(regs))
kuep_unlock();
- /*
-* Book3S exits to user via interrupt_exit_user_prepare(), which does
-* context tracking, which is a cleaner way to handle PREEMPT=y
-* and avoid context entry/exit in e.g., preempt_schedule_irq()),
-* which is likely to be where the core code wants to end up.
-*
-* The above comment explains why we can't do the
-*
-* if (user_mode(regs))
-* user_exit_irqoff();
-*
-* sequence here.
-*/
}
static inline void interrupt_async_enter_prepare(struct pt_regs *regs, struct
interrupt_state *state)
diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c
index ae7b058b2970..2a017d98973a 100644
--- a/arch/powerpc/kernel/interrupt.c
+++ b/arch/powerpc/kernel/interrupt.c
@@ -235,10 +235,6 @@ static notrace void booke_load_dbcr0(void)
#endif
}
-/* temporary hack for context tracking, removed in later patch */
-#include
-asmlinkage __visible void __sched schedule_user(void);
-
/*
* This should be called after a syscall returns, with r3 the return value
* from the syscall. If this function returns non-zero, the system call
@@ -296,11 +292,7 @@ notrace unsigned long syscall_exit_prepare(unsigned long
r3,
while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) {
local_irq_enable();
if (ti_flags & _TIF_NEED_RESCHED) {
-#ifdef CONFIG_PPC_BOOK3E_64
- schedule_user();
-#else
schedule();
-#endif
} else {
/*
* SIGPENDING must restore signal handler function
@@ -396,11 +388,7 @@ notrace unsigned long interrupt_exit_user_prepare(struct
pt_regs *regs, unsigned
while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))) {
local_irq_enable(); /* returning to user: may enable */
if (ti_flags & _TIF_NEED_RESCHED) {
-#ifdef CONFIG_PPC_BOOK3E_64
- schedule_user();
-#else
schedule();
-#endif
} else {
if (ti_flags & _TIF_SIGPENDING)
ret |= _TIF_RESTOREALL;
--
2.23.0
[PATCH 05/10] powerpc/64e/interrupt: reconcile irq soft-mask state in C
Use existing 64s interrupt entry wrapper code to reconcile irqs in C.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/interrupt.h | 8 +++---
arch/powerpc/kernel/entry_64.S | 18 ++---
arch/powerpc/kernel/exceptions-64e.S | 39 +---
3 files changed, 13 insertions(+), 52 deletions(-)
diff --git a/arch/powerpc/include/asm/interrupt.h
b/arch/powerpc/include/asm/interrupt.h
index 305d7c17a4cf..29b48d083156 100644
--- a/arch/powerpc/include/asm/interrupt.h
+++ b/arch/powerpc/include/asm/interrupt.h
@@ -40,14 +40,14 @@ static inline void interrupt_enter_prepare(struct pt_regs
*regs, struct interrup
kuap_save_and_lock(regs);
}
#endif
- /*
-* Book3E reconciles irq soft mask in asm
-*/
-#ifdef CONFIG_PPC_BOOK3S_64
+
+#ifdef CONFIG_PPC64
if (irq_soft_mask_set_return(IRQS_ALL_DISABLED) == IRQS_ENABLED)
trace_hardirqs_off();
local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
+#endif
+#ifdef CONFIG_PPC_BOOK3S_64
if (user_mode(regs)) {
CT_WARN_ON(ct_state() != CONTEXT_USER);
user_exit_irqoff();
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 555b3d0a3f38..03727308d8cc 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -117,13 +117,12 @@ BEGIN_FTR_SECTION
END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
/*
-* RECONCILE_IRQ_STATE without calling trace_hardirqs_off(), which
-* would clobber syscall parameters. Also we always enter with IRQs
-* enabled and nothing pending. system_call_exception() will call
-* trace_hardirqs_off().
-*
-* scv enters with MSR[EE]=1, so don't set PACA_IRQ_HARD_DIS. The
-* entry vector already sets PACAIRQSOFTMASK to IRQS_ALL_DISABLED.
+* scv enters with MSR[EE]=1 and is immediately considered soft-masked.
+* The entry vector already sets PACAIRQSOFTMASK to IRQS_ALL_DISABLED,
+* and interrupts may be masked and pending already.
+* system_call_exception() will call trace_hardirqs_off() which means
+* interrupts could already have been blocked before trace_hardirqs_off,
+* but this is the best we can do.
*/
/* Calling convention has r9 = orig r0, r10 = regs */
@@ -288,9 +287,8 @@ END_BTB_FLUSH_SECTION
std r11,-16(r10)/* "regshere" marker */
/*
-* RECONCILE_IRQ_STATE without calling trace_hardirqs_off(), which
-* would clobber syscall parameters. Also we always enter with IRQs
-* enabled and nothing pending. system_call_exception() will call
+* We always enter kernel from userspace with irq soft-mask enabled and
+* nothing pending. system_call_exception() will call
* trace_hardirqs_off().
*/
li r11,IRQS_ALL_DISABLED
diff --git a/arch/powerpc/kernel/exceptions-64e.S
b/arch/powerpc/kernel/exceptions-64e.S
index 2074a1e41ae2..a059ab3542c2 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -409,28 +409,6 @@ exc_##n##_common:
\
#define EXCEPTION_COMMON_DBG(n) \
EXCEPTION_COMMON_LVL(n, SPRN_SPRG_DBG_SCRATCH, PACA_EXDBG)
-/*
- * This is meant for exceptions that don't immediately hard-enable. We
- * set a bit in paca->irq_happened to ensure that a subsequent call to
- * arch_local_irq_restore() will properly hard-enable and avoid the
- * fast-path, and then reconcile irq state.
- */
-#define INTS_DISABLE RECONCILE_IRQ_STATE(r3,r4)
-
-/*
- * This is called by exceptions that don't use INTS_DISABLE (that did not
- * touch irq indicators in the PACA). This will restore MSR:EE to it's
- * previous value
- *
- * XXX In the long run, we may want to open-code it in order to separate the
- * load from the wrtee, thus limiting the latency caused by the dependency
- * but at this point, I'll favor code clarity until we have a near to final
- * implementation
- */
-#define INTS_RESTORE_HARD \
- ld r11,_MSR(r1); \
- wrtee r11;
-
/* XXX FIXME: Restore r14/r15 when necessary */
#define BAD_STACK_TRAMPOLINE(n)
\
exc_##n##_bad_stack: \
@@ -479,7 +457,6 @@ exc_##n##_bad_stack:
\
START_EXCEPTION(label); \
NORMAL_EXCEPTION_PROLOG(trapnum, intnum, PROLOG_ADDITION_MASKABLE)\
EXCEPTION_COMMON(trapnum) \
- INTS_DISABLE; \
ack(r8);\
[PATCH 04/10] powerpc/64e/interrupt: NMI save irq soft-mask state in C
64e non-maskable interrupts save the state of the irq soft-mask in
asm. This can be done in C in interrupt wrappers as 64s does.
Signed-off-by: Nicholas Piggin
I haven't been able to test this with qemu because it doesn't seem
to cause FSL bookE WDT interrupts.
This makes WatchdogException an NMI interrupt, which affects 32-bit
as well (okay, or create a new handler?)
---
arch/powerpc/include/asm/interrupt.h | 32 +
arch/powerpc/kernel/exceptions-64e.S | 36
arch/powerpc/kernel/traps.c | 13 +-
3 files changed, 38 insertions(+), 43 deletions(-)
diff --git a/arch/powerpc/include/asm/interrupt.h
b/arch/powerpc/include/asm/interrupt.h
index 7c633896d758..305d7c17a4cf 100644
--- a/arch/powerpc/include/asm/interrupt.h
+++ b/arch/powerpc/include/asm/interrupt.h
@@ -130,18 +130,32 @@ static inline void interrupt_async_exit_prepare(struct
pt_regs *regs, struct int
struct interrupt_nmi_state {
#ifdef CONFIG_PPC64
-#ifdef CONFIG_PPC_BOOK3S_64
u8 irq_soft_mask;
u8 irq_happened;
-#endif
u8 ftrace_enabled;
#endif
};
+static inline bool nmi_disables_ftrace(struct pt_regs *regs)
+{
+ /* Allow DEC and PMI to be traced when they are soft-NMI */
+ if (IS_ENABLED(CONFIG_PPC_BOOK3S_64)) {
+ if (TRAP(regs) == 0x900)
+ return false;
+ if (TRAP(regs) == 0xf00)
+ return false;
+ }
+ if (IS_ENABLED(CONFIG_PPC_BOOK3E)) {
+ if (TRAP(regs) == 0x260)
+ return false;
+ }
+
+ return true;
+}
+
static inline void interrupt_nmi_enter_prepare(struct pt_regs *regs, struct
interrupt_nmi_state *state)
{
#ifdef CONFIG_PPC64
-#ifdef CONFIG_PPC_BOOK3S_64
state->irq_soft_mask = local_paca->irq_soft_mask;
state->irq_happened = local_paca->irq_happened;
@@ -154,9 +168,8 @@ static inline void interrupt_nmi_enter_prepare(struct
pt_regs *regs, struct inte
local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
/* Don't do any per-CPU operations until interrupt state is fixed */
-#endif
- /* Allow DEC and PMI to be traced when they are soft-NMI */
- if (TRAP(regs) != 0x900 && TRAP(regs) != 0xf00 && TRAP(regs) != 0x260) {
+
+ if (nmi_disables_ftrace(regs)) {
state->ftrace_enabled = this_cpu_get_ftrace_enabled();
this_cpu_set_ftrace_enabled(0);
}
@@ -180,16 +193,14 @@ static inline void interrupt_nmi_exit_prepare(struct
pt_regs *regs, struct inter
nmi_exit();
#ifdef CONFIG_PPC64
- if (TRAP(regs) != 0x900 && TRAP(regs) != 0xf00 && TRAP(regs) != 0x260)
+ if (nmi_disables_ftrace(regs))
this_cpu_set_ftrace_enabled(state->ftrace_enabled);
-#ifdef CONFIG_PPC_BOOK3S_64
/* Check we didn't change the pending interrupt mask. */
WARN_ON_ONCE((state->irq_happened | PACA_IRQ_HARD_DIS) !=
local_paca->irq_happened);
local_paca->irq_happened = state->irq_happened;
local_paca->irq_soft_mask = state->irq_soft_mask;
#endif
-#endif
}
/*
@@ -402,6 +413,7 @@ DECLARE_INTERRUPT_HANDLER(SMIException);
DECLARE_INTERRUPT_HANDLER(handle_hmi_exception);
DECLARE_INTERRUPT_HANDLER(unknown_exception);
DECLARE_INTERRUPT_HANDLER_ASYNC(unknown_async_exception);
+DECLARE_INTERRUPT_HANDLER_NMI(unknown_nmi_exception);
DECLARE_INTERRUPT_HANDLER(instruction_breakpoint_exception);
DECLARE_INTERRUPT_HANDLER(RunModeException);
DECLARE_INTERRUPT_HANDLER(single_step_exception);
@@ -425,7 +437,7 @@ DECLARE_INTERRUPT_HANDLER(altivec_assist_exception);
DECLARE_INTERRUPT_HANDLER(CacheLockingException);
DECLARE_INTERRUPT_HANDLER(SPEFloatingPointException);
DECLARE_INTERRUPT_HANDLER(SPEFloatingPointRoundException);
-DECLARE_INTERRUPT_HANDLER(WatchdogException);
+DECLARE_INTERRUPT_HANDLER_NMI(WatchdogException);
DECLARE_INTERRUPT_HANDLER(kernel_bad_stack);
/* slb.c */
diff --git a/arch/powerpc/kernel/exceptions-64e.S
b/arch/powerpc/kernel/exceptions-64e.S
index 1bb4e9b37748..2074a1e41ae2 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -63,9 +63,6 @@
ld reg, (SPECIAL_EXC_##name * 8 + SPECIAL_EXC_FRAME_OFFS)(r1)
special_reg_save:
- lbz r9,PACAIRQHAPPENED(r13)
- RECONCILE_IRQ_STATE(r3,r4)
-
/*
* We only need (or have stack space) to save this stuff if
* we interrupted the kernel.
@@ -119,15 +116,11 @@ BEGIN_FTR_SECTION
mtspr SPRN_MAS5,r10
mtspr SPRN_MAS8,r10
END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
- SPECIAL_EXC_STORE(r9,IRQHAPPENED)
-
mfspr r10,SPRN_DEAR
SPECIAL_EXC_STORE(r10,DEAR)
mfspr r10,SPRN_ESR
SPECIAL_EXC_STORE(r10,ESR)
- lbz r10,PACAIRQSOFTMASK(r13)
- SPECIAL_EXC_STORE(r10,SOFTE)
ld r10,_NIP(r1)
SPECIAL_EXC_STORE(r10,CSRR0)
ld r10,_MSR(r1)
@@
[PATCH 03/10] powerpc/64e/interrupt: use new interrupt return
Update the new C and asm interrupt return code to account for 64e specifics, switch over to use it. The now-unused old ret_from_except code, that was moved to 64e after the 64s conversion, is removed. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/asm-prototypes.h | 2 - arch/powerpc/kernel/entry_64.S| 9 +- arch/powerpc/kernel/exceptions-64e.S | 321 ++ arch/powerpc/kernel/interrupt.c | 27 +- arch/powerpc/kernel/irq.c | 76 - 5 files changed, 56 insertions(+), 379 deletions(-) diff --git a/arch/powerpc/include/asm/asm-prototypes.h b/arch/powerpc/include/asm/asm-prototypes.h index 939f3c94c8f3..1c7b75834e04 100644 --- a/arch/powerpc/include/asm/asm-prototypes.h +++ b/arch/powerpc/include/asm/asm-prototypes.h @@ -77,8 +77,6 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsign long ppc_fadvise64_64(int fd, int advice, u32 offset_high, u32 offset_low, u32 len_high, u32 len_low); long sys_switch_endian(void); -notrace unsigned int __check_irq_replay(void); -void notrace restore_interrupts(void); /* prom_init (OpenFirmware) */ unsigned long __init prom_init(unsigned long r3, unsigned long r4, diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 853534b2ae2e..555b3d0a3f38 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S @@ -632,7 +632,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) addir1,r1,SWITCH_FRAME_SIZE blr -#ifdef CONFIG_PPC_BOOK3S /* * If MSR EE/RI was never enabled, IRQs not reconciled, NVGPRs not * touched, no exit work created, then this can be used. @@ -644,6 +643,7 @@ _ASM_NOKPROBE_SYMBOL(fast_interrupt_return) kuap_check_amr r3, r4 ld r5,_MSR(r1) andi. r0,r5,MSR_PR +#ifdef CONFIG_PPC_BOOK3S bne .Lfast_user_interrupt_return_amr kuap_kernel_restore r3, r4 andi. r0,r5,MSR_RI @@ -652,6 +652,10 @@ _ASM_NOKPROBE_SYMBOL(fast_interrupt_return) addir3,r1,STACK_FRAME_OVERHEAD bl unrecoverable_exception b . /* should not get here */ +#else + bne .Lfast_user_interrupt_return + b .Lfast_kernel_interrupt_return +#endif .balign IFETCH_ALIGN_BYTES .globl interrupt_return @@ -665,8 +669,10 @@ _ASM_NOKPROBE_SYMBOL(interrupt_return) cmpdi r3,0 bne-.Lrestore_nvgprs +#ifdef CONFIG_PPC_BOOK3S .Lfast_user_interrupt_return_amr: kuap_user_restore r3, r4 +#endif .Lfast_user_interrupt_return: ld r11,_NIP(r1) ld r12,_MSR(r1) @@ -775,7 +781,6 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS) RFI_TO_KERNEL b . /* prevent speculative execution */ -#endif /* CONFIG_PPC_BOOK3S */ #ifdef CONFIG_PPC_RTAS /* diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S index da78eb6ab92f..1bb4e9b37748 100644 --- a/arch/powerpc/kernel/exceptions-64e.S +++ b/arch/powerpc/kernel/exceptions-64e.S @@ -139,7 +139,8 @@ ret_from_level_except: ld r3,_MSR(r1) andi. r3,r3,MSR_PR beq 1f - b ret_from_except + REST_NVGPRS(r1) + b interrupt_return 1: LOAD_REG_ADDR(r11,extlb_level_exc) @@ -208,7 +209,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV) /* * Restore PACAIRQHAPPENED rather than setting it based on * the return MSR[EE], since we could have interrupted -* __check_irq_replay() or other inconsistent transitory +* interrupt replay or other inconsistent transitory * states that must remain that way. */ SPECIAL_EXC_LOAD(r10,IRQHAPPENED) @@ -511,7 +512,7 @@ exc_##n##_bad_stack: \ CHECK_NAPPING();\ addir3,r1,STACK_FRAME_OVERHEAD; \ bl hdlr; \ - b ret_from_except_lite; + b interrupt_return /* This value is used to mark exception frames on the stack. */ .section".toc","aw" @@ -623,7 +624,8 @@ __end_interrupts: addir3,r1,STACK_FRAME_OVERHEAD ld r14,PACA_EXGEN+EX_R14(r13) bl program_check_exception - b ret_from_except + REST_NVGPRS(r1) + b interrupt_return /* Floating Point Unavailable Interrupt */ START_EXCEPTION(fp_unavailable); @@ -635,11 +637,11 @@ __end_interrupts: andi. r0,r12,MSR_PR; beq-1f bl load_up_fpu - b fast_exception_return + b fast_interrupt_return 1: INTS_DISABLE addir3,r1,STACK_FRAME_OVERHEAD bl kernel_fp_unavailable_exception - b
[PATCH 02/10] powerpc/64e/interrupt: always save nvgprs on interrupt
In order to use the C interrupt return, nvgprs must always be saved.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/ptrace.h| 9 +
arch/powerpc/kernel/entry_64.S | 13 -
arch/powerpc/kernel/exceptions-64e.S | 27 +++
3 files changed, 4 insertions(+), 45 deletions(-)
diff --git a/arch/powerpc/include/asm/ptrace.h
b/arch/powerpc/include/asm/ptrace.h
index 1aca5fe79285..c5b3669918f4 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -186,18 +186,11 @@ static inline void regs_set_return_value(struct pt_regs
*regs, unsigned long rc)
((struct pt_regs *)((unsigned long)task_stack_page(current) +
THREAD_SIZE) - 1)
#ifdef __powerpc64__
-#ifdef CONFIG_PPC_BOOK3S
#define TRAP_FLAGS_MASK0x10
#define TRAP(regs) ((regs)->trap & ~TRAP_FLAGS_MASK)
#define FULL_REGS(regs)true
#define SET_FULL_REGS(regs)do { } while (0)
-#else
-#define TRAP_FLAGS_MASK0x11
-#define TRAP(regs) ((regs)->trap & ~TRAP_FLAGS_MASK)
-#define FULL_REGS(regs)(((regs)->trap & 1) == 0)
-#define SET_FULL_REGS(regs)((regs)->trap &= ~1)
-#endif
-#define CHECK_FULL_REGS(regs) BUG_ON(!FULL_REGS(regs))
+#define CHECK_FULL_REGS(regs) do { } while (0)
#define NV_REG_POISON 0xdeadbeefdeadbeefUL
#else
/*
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 6c4d9e276c4d..853534b2ae2e 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -417,19 +417,6 @@ _GLOBAL(ret_from_kernel_thread)
li r3,0
b .Lsyscall_exit
-#ifdef CONFIG_PPC_BOOK3E
-/* Save non-volatile GPRs, if not already saved. */
-_GLOBAL(save_nvgprs)
- ld r11,_TRAP(r1)
- andi. r0,r11,1
- beqlr-
- SAVE_NVGPRS(r1)
- clrrdi r0,r11,1
- std r0,_TRAP(r1)
- blr
-_ASM_NOKPROBE_SYMBOL(save_nvgprs);
-#endif
-
#ifdef CONFIG_PPC_BOOK3S_64
#define FLUSH_COUNT_CACHE \
diff --git a/arch/powerpc/kernel/exceptions-64e.S
b/arch/powerpc/kernel/exceptions-64e.S
index e8eb9992a270..da78eb6ab92f 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -417,14 +417,15 @@ exc_##n##_common:
\
std r6,_LINK(r1); \
std r7,_CTR(r1);\
std r8,_XER(r1);\
- li r3,(n)+1; /* indicate partial regs in trap */ \
+ li r3,(n); /* indicate partial regs in trap */ \
std r9,0(r1); /* store stack frame back link */ \
std r10,_CCR(r1); /* store orig CR in stackframe */ \
std r9,GPR1(r1);/* store stack frame back link */ \
std r11,SOFTE(r1); /* and save it to stackframe */ \
std r12,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
std r3,_TRAP(r1); /* set trap number */ \
- std r0,RESULT(r1); /* clear regs->result */
+ std r0,RESULT(r1); /* clear regs->result */\
+ SAVE_NVGPRS(r1);
#define EXCEPTION_COMMON(n) \
EXCEPTION_COMMON_LVL(n, SPRN_SPRG_GEN_SCRATCH, PACA_EXGEN)
@@ -561,7 +562,6 @@ __end_interrupts:
CRIT_EXCEPTION_PROLOG(0x100, BOOKE_INTERRUPT_CRITICAL,
PROLOG_ADDITION_NONE)
EXCEPTION_COMMON_CRIT(0x100)
- bl save_nvgprs
bl special_reg_save
CHECK_NAPPING();
addir3,r1,STACK_FRAME_OVERHEAD
@@ -573,7 +573,6 @@ __end_interrupts:
MC_EXCEPTION_PROLOG(0x000, BOOKE_INTERRUPT_MACHINE_CHECK,
PROLOG_ADDITION_NONE)
EXCEPTION_COMMON_MC(0x000)
- bl save_nvgprs
bl special_reg_save
CHECK_NAPPING();
addir3,r1,STACK_FRAME_OVERHEAD
@@ -623,7 +622,6 @@ __end_interrupts:
std r14,_DSISR(r1)
addir3,r1,STACK_FRAME_OVERHEAD
ld r14,PACA_EXGEN+EX_R14(r13)
- bl save_nvgprs
bl program_check_exception
b ret_from_except
@@ -639,7 +637,6 @@ __end_interrupts:
bl load_up_fpu
b fast_exception_return
1: INTS_DISABLE
- bl save_nvgprs
addir3,r1,STACK_FRAME_OVERHEAD
bl kernel_fp_unavailable_exception
b ret_from_except
@@ -661,7 +658,6 @@ BEGIN_FTR_SECTION
END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
#endif
INTS_DISABLE
- bl save_nvgprs
addir3,r1,STACK_FRAME_OVERHEAD
bl altivec_unavailable_exception
b ret_from_except
@@ -673,7 +669,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
[PATCH 00/10] Move 64e to new interrupt return code
Since RFC this is rebased on Christophe's v3 ppc32 conversion, and has fixed up small details, and then adds some powerpc-wide cleanups at the end. Tested on qemu only (QEMU e500), which is not ideal for interrupt handling particularly the critical interrupts which I don't know whether it can generate. Thanks, Nick Nicholas Piggin (10): powerpc/syscall: switch user_exit_irqoff and trace_hardirqs_off order powerpc/64e/interrupt: always save nvgprs on interrupt powerpc/64e/interrupt: use new interrupt return powerpc/64e/interrupt: NMI save irq soft-mask state in C powerpc/64e/interrupt: reconcile irq soft-mask state in C powerpc/64e/interrupt: Use new interrupt context tracking scheme powerpc/64e/interrupt: handle bad_page_fault in C powerpc: clean up do_page_fault powerpc: remove partial register save logic powerpc: move norestart trap flag to bit 0 arch/powerpc/include/asm/asm-prototypes.h | 2 - arch/powerpc/include/asm/bug.h| 4 +- arch/powerpc/include/asm/interrupt.h | 66 ++-- arch/powerpc/include/asm/ptrace.h | 36 +- arch/powerpc/kernel/align.c | 6 - arch/powerpc/kernel/entry_64.S| 40 +- arch/powerpc/kernel/exceptions-64e.S | 425 ++ arch/powerpc/kernel/interrupt.c | 22 +- arch/powerpc/kernel/irq.c | 76 arch/powerpc/kernel/process.c | 12 - arch/powerpc/kernel/ptrace/ptrace-view.c | 21 -- arch/powerpc/kernel/ptrace/ptrace.c | 2 - arch/powerpc/kernel/ptrace/ptrace32.c | 4 - arch/powerpc/kernel/signal_32.c | 3 - arch/powerpc/kernel/signal_64.c | 2 - arch/powerpc/kernel/traps.c | 14 +- arch/powerpc/lib/sstep.c | 4 - arch/powerpc/mm/book3s64/hash_utils.c | 16 +- arch/powerpc/mm/fault.c | 28 +- arch/powerpc/xmon/xmon.c | 23 +- 20 files changed, 130 insertions(+), 676 deletions(-) -- 2.23.0
[PATCH 01/10] powerpc/syscall: switch user_exit_irqoff and trace_hardirqs_off order
user_exit_irqoff() -> __context_tracking_exit -> vtime_user_exit
warns in __seqprop_assert due to lockdep thinking preemption is enabled
because trace_hardirqs_off() has not yet been called.
Switch the order of these two calls, which matches their ordering in
interrupt_enter_prepare.
Fixes: 5f0b6ac3905f ("powerpc/64/syscall: Reconcile interrupts")
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/interrupt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c
index c4dd4b8f9cfa..fbabb49888d3 100644
--- a/arch/powerpc/kernel/interrupt.c
+++ b/arch/powerpc/kernel/interrupt.c
@@ -43,11 +43,11 @@ notrace long system_call_exception(long r3, long r4, long
r5,
if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
BUG_ON(irq_soft_mask_return() != IRQS_ALL_DISABLED);
+ trace_hardirqs_off(); /* finish reconciling */
+
CT_WARN_ON(ct_state() == CONTEXT_KERNEL);
user_exit_irqoff();
- trace_hardirqs_off(); /* finish reconciling */
-
if (!IS_ENABLED(CONFIG_BOOKE) && !IS_ENABLED(CONFIG_40x))
BUG_ON(!(regs->msr & MSR_RI));
BUG_ON(!(regs->msr & MSR_PR));
--
2.23.0
Re: [PATCH] rpadlpar: fix potential drc_name corruption in store functions
Tyrel Datwyler writes: > On 3/13/21 1:17 AM, Michal Suchánek wrote: >> On Wed, Mar 10, 2021 at 04:30:21PM -0600, Tyrel Datwyler wrote: >>> Both add_slot_store() and remove_slot_store() try to fix up the drc_name >>> copied from the store buffer by placing a NULL terminator at nbyte + 1 >>> or in place of a '\n' if present. However, the static buffer that we >>> copy the drc_name data into is not zeored and can contain anything past >>> the n-th byte. This is problematic if a '\n' byte appears in that buffer >>> after nbytes and the string copied into the store buffer was not NULL >>> terminated to start with as the strchr() search for a '\n' byte will mark >>> this incorrectly as the end of the drc_name string resulting in a drc_name >>> string that contains garbage data after the n-th byte. The following >>> debugging shows an example of the drmgr utility writing "PHB 4543" to >>> the add_slot sysfs attribute, but add_slot_store logging a corrupted >>> string value. >>> >>> [135823.702864] drmgr: drmgr: -c phb -a -s PHB 4543 -d 1 >>> [135823.702879] add_slot_store: drc_name = PHB 4543°|<82>!, rc = -19 >>> >>> Fix this by NULL terminating the string when we copy it into our static >>> buffer by coping nbytes + 1 of data from the store buffer. The code has >> Why is it OK to copy nbytes + 1 and why is it expected that the buffer >> contains a nul after the content? > > It is my understanding that the store function buffer is allocated as a > zeroed-page which the kernel copies up to at most (PAGE_SIZE - 1) of user data > into. Anything after nbytes would therefore be zeroed. I think that's true, but it would be nice if we didn't have to rely on that obscure detail in order for this code to be correct & understandable. >> Isn't it much saner to just nul terminate the string after copying? > > At the cost of an extra line of code, sure. Is there a reason we can't use strscpy()? That should deal with all the corner cases around the string copy, and then all you have to do is look for a newline and turn it into nul. cheers
Re: [PATCH] powerpc: kernel: Trivial spelling fixes throughout the file head_fsl_booke.S
Randy Dunlap writes: > On 3/14/21 3:04 PM, Bhaskar Chowdhury wrote: >> >> Trivial spelling fixes throughout the file. >> >> Signed-off-by: Bhaskar Chowdhury >> --- >> arch/powerpc/kernel/head_fsl_booke.S | 8 >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/arch/powerpc/kernel/head_fsl_booke.S >> b/arch/powerpc/kernel/head_fsl_booke.S >> index fdd4d274c245..c6fcfca0b0d7 100644 >> --- a/arch/powerpc/kernel/head_fsl_booke.S >> +++ b/arch/powerpc/kernel/head_fsl_booke.S >> @@ -403,7 +403,7 @@ interrupt_base: >> EXCEPTION(0x2900, AP_UNAVAIL, AuxillaryProcessorUnavailable, \ >>unknown_exception, EXC_XFER_STD) >> >> -/* Decrementer Interrupt */ >> +/* Decremented Interrupt */ > > No, the comment matches the macro (or whatever that is). Right. I dropped this hunk. Please update your script or whatever to not "correct" that spelling. cheers
Re: [PATCH] powerpc: kernel: Trivial spelling fixes throughout the file head_fsl_booke.S
On 3/14/21 3:04 PM, Bhaskar Chowdhury wrote: > > Trivial spelling fixes throughout the file. > > Signed-off-by: Bhaskar Chowdhury > --- > arch/powerpc/kernel/head_fsl_booke.S | 8 > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/powerpc/kernel/head_fsl_booke.S > b/arch/powerpc/kernel/head_fsl_booke.S > index fdd4d274c245..c6fcfca0b0d7 100644 > --- a/arch/powerpc/kernel/head_fsl_booke.S > +++ b/arch/powerpc/kernel/head_fsl_booke.S > @@ -403,7 +403,7 @@ interrupt_base: > EXCEPTION(0x2900, AP_UNAVAIL, AuxillaryProcessorUnavailable, \ > unknown_exception, EXC_XFER_STD) > > - /* Decrementer Interrupt */ > + /* Decremented Interrupt */ No, the comment matches the macro (or whatever that is). > DECREMENTER_EXCEPTION > > /* Fixed Internal Timer Interrupt */ -- ~Randy
[powerpc:next-test] BUILD SUCCESS 3411d1b25358f6007f411b1fa629ac040b8f59ad
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next-test branch HEAD: 3411d1b25358f6007f411b1fa629ac040b8f59ad powerpc/Makefile: Remove workaround for gcc versions below 4.9 elapsed time: 724m configs tested: 98 configs skipped: 2 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64allyesconfig arm64 defconfig arm allyesconfig arm allmodconfig sh se7705_defconfig powerpc bluestone_defconfig sh rsk7264_defconfig xtensa common_defconfig sh se7722_defconfig arc nsimosci_hs_smp_defconfig powerpc cm5200_defconfig h8300alldefconfig mips maltaaprp_defconfig powerpc akebono_defconfig shmigor_defconfig powerpc64alldefconfig shsh7785lcr_defconfig powerpc mpc837x_rdb_defconfig nios2alldefconfig arm bcm2835_defconfig mips pic32mzda_defconfig powerpc pseries_defconfig sh se7343_defconfig sh sh7710voipgw_defconfig riscvnommu_virt_defconfig powerpc ppc6xx_defconfig powerpc taishan_defconfig powerpc kmeter1_defconfig ia64 allmodconfig ia64defconfig ia64 allyesconfig m68k allmodconfig m68kdefconfig m68k allyesconfig nios2 defconfig arc allyesconfig nds32 allnoconfig nds32 defconfig nios2allyesconfig cskydefconfig alpha defconfig alphaallyesconfig xtensa allyesconfig h8300allyesconfig arc defconfig sh allmodconfig parisc defconfig s390 allyesconfig s390 allmodconfig parisc allyesconfig s390defconfig i386 allyesconfig sparcallyesconfig sparc defconfig i386 tinyconfig i386defconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig i386 randconfig-a001-20210314 i386 randconfig-a005-20210314 i386 randconfig-a003-20210314 i386 randconfig-a002-20210314 i386 randconfig-a004-20210314 i386 randconfig-a006-20210314 x86_64 randconfig-a011-20210314 x86_64 randconfig-a016-20210314 x86_64 randconfig-a013-20210314 x86_64 randconfig-a015-20210314 x86_64 randconfig-a014-20210314 x86_64 randconfig-a012-20210314 i386 randconfig-a013-20210314 i386 randconfig-a016-20210314 i386 randconfig-a011-20210314 i386 randconfig-a012-20210314 i386 randconfig-a014-20210314 i386 randconfig-a015-20210314 riscvnommu_k210_defconfig riscvallyesconfig riscv allnoconfig riscv defconfig riscv rv32_defconfig riscvallmodconfig x86_64 allyesconfig x86_64rhel-7.6-kselftests x86_64 defconfig x86_64 rhel-8.3 x86_64 rhel-8.3-kbuiltin x86_64 kexec clang tested configs: x86_64 randconfig-a006-20210314 x86_64 randconfig-a001-20210314 x86_64 randconfig-a005-20210314 x86_64 randconfig-a004-20210314 x86_64 randconfig-a002-20210314 x86_64 randconfig-a003-20210314 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org
[powerpc:fixes-test] BUILD SUCCESS f81787ef053051bef07cc879d609a624dc9b2d48
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git fixes-test branch HEAD: f81787ef053051bef07cc879d609a624dc9b2d48 powerpc: Force inlining of cpu_has_feature() to avoid build failure elapsed time: 726m configs tested: 111 configs skipped: 25 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64allyesconfig arm64 defconfig arm allyesconfig arm allmodconfig sh se7705_defconfig powerpc bluestone_defconfig sh rsk7264_defconfig xtensa common_defconfig sh se7722_defconfig arc nsimosci_hs_smp_defconfig powerpc cm5200_defconfig h8300alldefconfig mips maltaaprp_defconfig sh j2_defconfig mipsomega2p_defconfig arm orion5x_defconfig arm jornada720_defconfig shtitan_defconfig m68k sun3x_defconfig mipsjmr3927_defconfig sh ecovec24_defconfig nios2alldefconfig arm bcm2835_defconfig mips pic32mzda_defconfig powerpc pseries_defconfig sh se7343_defconfig sh sh7710voipgw_defconfig riscvnommu_virt_defconfig powerpc ppc6xx_defconfig powerpc taishan_defconfig powerpc kmeter1_defconfig mips cavium_octeon_defconfig powerpc mpc832x_rdb_defconfig x86_64 alldefconfig arm milbeaut_m10v_defconfig xtensa defconfig sh se7619_defconfig parisc defconfig openriscdefconfig powerpc storcenter_defconfig cskydefconfig microblaze mmu_defconfig mips ip22_defconfig ia64 allmodconfig ia64defconfig ia64 allyesconfig m68k allmodconfig m68kdefconfig m68k allyesconfig nios2 defconfig arc allyesconfig nds32 allnoconfig nds32 defconfig nios2allyesconfig alpha defconfig alphaallyesconfig xtensa allyesconfig h8300allyesconfig arc defconfig sh allmodconfig s390 allyesconfig s390 allmodconfig parisc allyesconfig s390defconfig i386 allyesconfig sparcallyesconfig sparc defconfig i386 tinyconfig i386defconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig i386 randconfig-a001-20210314 i386 randconfig-a005-20210314 i386 randconfig-a003-20210314 i386 randconfig-a002-20210314 i386 randconfig-a004-20210314 i386 randconfig-a006-20210314 x86_64 randconfig-a011-20210314 x86_64 randconfig-a016-20210314 x86_64 randconfig-a013-20210314 x86_64 randconfig-a015-20210314 x86_64 randconfig-a014-20210314 x86_64 randconfig-a012-20210314 i386 randconfig-a013-20210314 i386 randconfig-a016-20210314 i386 randconfig-a011-20210314 i386 randconfig-a012-20210314 i386 randconfig-a014-20210314 i386 randconfig-a015-20210314 riscvnommu_k210_defconfig riscvallyesconfig riscv allnoconfig riscv defconfig riscv rv32_defconfig riscvallmodconfig x86_64 allyesconfig
[powerpc:merge] BUILD SUCCESS 83615cf09d674f2d8edf3b2972499ed85ee7b8f3
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git merge branch HEAD: 83615cf09d674f2d8edf3b2972499ed85ee7b8f3 Automatic merge of 'master' into merge (2021-03-14 20:22) elapsed time: 724m configs tested: 112 configs skipped: 2 The following configs have been built successfully. More configs may be tested in the coming days. gcc tested configs: arm defconfig arm64allyesconfig arm64 defconfig arm allyesconfig arm allmodconfig powerpc maple_defconfig powerpcsocrates_defconfig arm s3c6400_defconfig mips db1xxx_defconfig mips loongson1c_defconfig powerpccell_defconfig sh se7705_defconfig powerpc bluestone_defconfig sh rsk7264_defconfig xtensa common_defconfig sh se7722_defconfig arc nsimosci_hs_smp_defconfig powerpc cm5200_defconfig h8300alldefconfig mips maltaaprp_defconfig arm hackkit_defconfig mips jazz_defconfig s390 allyesconfig arm lubbock_defconfig sh se7721_defconfig sh j2_defconfig mipsomega2p_defconfig arm orion5x_defconfig arm jornada720_defconfig arc axs101_defconfig openrisc alldefconfig shedosk7760_defconfig powerpc wii_defconfig mips tb0226_defconfig mips ip32_defconfig riscvnommu_virt_defconfig powerpc ppc6xx_defconfig powerpc taishan_defconfig powerpc kmeter1_defconfig powerpc64 defconfig arm netwinder_defconfig arm pxa255-idp_defconfig arm ep93xx_defconfig mips lemote2f_defconfig ia64 allmodconfig ia64defconfig ia64 allyesconfig m68k allmodconfig m68kdefconfig m68k allyesconfig nios2 defconfig arc allyesconfig nds32 allnoconfig nds32 defconfig nios2allyesconfig cskydefconfig alpha defconfig alphaallyesconfig xtensa allyesconfig h8300allyesconfig arc defconfig sh allmodconfig parisc defconfig s390 allmodconfig parisc allyesconfig s390defconfig i386 allyesconfig sparcallyesconfig sparc defconfig i386 tinyconfig i386defconfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig i386 randconfig-a001-20210314 i386 randconfig-a005-20210314 i386 randconfig-a003-20210314 i386 randconfig-a002-20210314 i386 randconfig-a004-20210314 i386 randconfig-a006-20210314 x86_64 randconfig-a011-20210314 x86_64 randconfig-a016-20210314 x86_64 randconfig-a013-20210314 x86_64 randconfig-a015-20210314 x86_64 randconfig-a014-20210314 x86_64 randconfig-a012-20210314 i386 randconfig-a013-20210314 i386 randconfig-a016-20210314 i386 randconfig-a011-20210314 i386 randconfig-a012-20210314 i386 randconfig-a014-20210314 i386 randconfig-a015-20210314 riscvnommu_k210_defconfig riscvallyesconfig riscv allnoconfig riscv defconfig riscv rv32_defconfig riscvallmodconfig x86_64
Re: [PATCH] rpadlpar: fix potential drc_name corruption in store functions
On 3/13/21 1:17 AM, Michal Suchánek wrote: > On Wed, Mar 10, 2021 at 04:30:21PM -0600, Tyrel Datwyler wrote: >> Both add_slot_store() and remove_slot_store() try to fix up the drc_name >> copied from the store buffer by placing a NULL terminator at nbyte + 1 >> or in place of a '\n' if present. However, the static buffer that we >> copy the drc_name data into is not zeored and can contain anything past >> the n-th byte. This is problematic if a '\n' byte appears in that buffer >> after nbytes and the string copied into the store buffer was not NULL >> terminated to start with as the strchr() search for a '\n' byte will mark >> this incorrectly as the end of the drc_name string resulting in a drc_name >> string that contains garbage data after the n-th byte. The following >> debugging shows an example of the drmgr utility writing "PHB 4543" to >> the add_slot sysfs attribute, but add_slot_store logging a corrupted >> string value. >> >> [135823.702864] drmgr: drmgr: -c phb -a -s PHB 4543 -d 1 >> [135823.702879] add_slot_store: drc_name = PHB 4543°|<82>!, rc = -19 >> >> Fix this by NULL terminating the string when we copy it into our static >> buffer by coping nbytes + 1 of data from the store buffer. The code has > Why is it OK to copy nbytes + 1 and why is it expected that the buffer > contains a nul after the content? It is my understanding that the store function buffer is allocated as a zeroed-page which the kernel copies up to at most (PAGE_SIZE - 1) of user data into. Anything after nbytes would therefore be zeroed. > > Isn't it much saner to just nul terminate the string after copying? At the cost of an extra line of code, sure. -Tyrel > > diff --git a/drivers/pci/hotplug/rpadlpar_sysfs.c > b/drivers/pci/hotplug/rpadlpar_sysfs.c > index cdbfa5df3a51..cfbad67447da 100644 > --- a/drivers/pci/hotplug/rpadlpar_sysfs.c > +++ b/drivers/pci/hotplug/rpadlpar_sysfs.c > @@ -35,11 +35,11 @@ static ssize_t add_slot_store(struct kobject *kobj, > struct kobj_attribute *attr, > return 0; > > memcpy(drc_name, buf, nbytes); > + _name[nbytes] = '\0'; > > end = strchr(drc_name, '\n'); > - if (!end) > - end = _name[nbytes]; > - *end = '\0'; > + if (end) > + *end = '\0'; > > rc = dlpar_add_slot(drc_name); > if (rc) > @@ -66,11 +66,11 @@ static ssize_t remove_slot_store(struct kobject *kobj, > return 0; > > memcpy(drc_name, buf, nbytes); > + _name[nbytes] = '\0'; > > end = strchr(drc_name, '\n'); > - if (!end) > - end = _name[nbytes]; > - *end = '\0'; > + if (end) > + *end = '\0'; > > rc = dlpar_remove_slot(drc_name); > if (rc) > > Thanks > > Michal > >> already made sure that nbytes is not >= MAX_DRC_NAME_LEN and the store >> buffer is guaranteed to be zeroed beyond the nth-byte of data copied >> from the user. Further, since the string is now NULL terminated the code >> only needs to change '\n' to '\0' when present. >> >> Signed-off-by: Tyrel Datwyler >> --- >> drivers/pci/hotplug/rpadlpar_sysfs.c | 14 ++ >> 1 file changed, 6 insertions(+), 8 deletions(-) >> >> diff --git a/drivers/pci/hotplug/rpadlpar_sysfs.c >> b/drivers/pci/hotplug/rpadlpar_sysfs.c >> index cdbfa5df3a51..375087921284 100644 >> --- a/drivers/pci/hotplug/rpadlpar_sysfs.c >> +++ b/drivers/pci/hotplug/rpadlpar_sysfs.c >> @@ -34,12 +34,11 @@ static ssize_t add_slot_store(struct kobject *kobj, >> struct kobj_attribute *attr, >> if (nbytes >= MAX_DRC_NAME_LEN) >> return 0; >> >> -memcpy(drc_name, buf, nbytes); >> +memcpy(drc_name, buf, nbytes + 1); >> >> end = strchr(drc_name, '\n'); >> -if (!end) >> -end = _name[nbytes]; >> -*end = '\0'; >> +if (end) >> +*end = '\0'; >> >> rc = dlpar_add_slot(drc_name); >> if (rc) >> @@ -65,12 +64,11 @@ static ssize_t remove_slot_store(struct kobject *kobj, >> if (nbytes >= MAX_DRC_NAME_LEN) >> return 0; >> >> -memcpy(drc_name, buf, nbytes); >> +memcpy(drc_name, buf, nbytes + 1); >> >> end = strchr(drc_name, '\n'); >> -if (!end) >> -end = _name[nbytes]; >> -*end = '\0'; >> +if (end) >> +*end = '\0'; >> >> rc = dlpar_remove_slot(drc_name); >> if (rc) >> -- >> 2.27.0 >>
[PATCH] powerpc: kernel: Trivial spelling fixes throughout the file head_fsl_booke.S
Trivial spelling fixes throughout the file. Signed-off-by: Bhaskar Chowdhury --- arch/powerpc/kernel/head_fsl_booke.S | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index fdd4d274c245..c6fcfca0b0d7 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -113,7 +113,7 @@ _ENTRY(_start); 1: /* -* We have the runtime (virutal) address of our base. +* We have the runtime (virtual) address of our base. * We calculate our shift of offset from a 64M page. * We could map the 64M page we belong to at PAGE_OFFSET and * get going from there. @@ -403,7 +403,7 @@ interrupt_base: EXCEPTION(0x2900, AP_UNAVAIL, AuxillaryProcessorUnavailable, \ unknown_exception, EXC_XFER_STD) - /* Decrementer Interrupt */ + /* Decremented Interrupt */ DECREMENTER_EXCEPTION /* Fixed Internal Timer Interrupt */ @@ -497,7 +497,7 @@ END_BTB_FLUSH_SECTION #endif #endif - bne 2f /* Bail if permission/valid mismach */ + bne 2f /* Bail if permission/valid mismatch */ /* Jump to common tlb load */ b finish_tlb_load @@ -592,7 +592,7 @@ END_BTB_FLUSH_SECTION #endif #endif - bne 2f /* Bail if permission mismach */ + bne 2f /* Bail if permission mismatch */ /* Jump to common TLB load point */ b finish_tlb_load -- 2.30.2
Re: Errant readings on LM81 with T2080 SoC
On 12/03/21 10:25 pm, David Laight wrote: > From: Linuxppc-dev Guenter Roeck >> Sent: 11 March 2021 21:35 >> >> On 3/11/21 1:17 PM, Chris Packham wrote: >>> On 11/03/21 9:18 pm, Wolfram Sang wrote: > Bummer. What is really weird is that you see clock stretching under > CPU load. Normally clock stretching is triggered by the device, not > by the host. One example: Some hosts need an interrupt per byte to know if they should send ACK or NACK. If that interrupt is delayed, they stretch the clock. >>> It feels like something like that is happening. Looking at the T2080 >>> Reference manual there is an interesting timing diagram (Figure 14-2 if >>> someone feels like looking it up). It shows SCL low between the ACK for >>> the address and the data byte. I think if we're delayed in sending the >>> next byte we could violate Ttimeout or Tlow:mext from the SMBUS spec. >>> >> I think that really leaves you only two options that I can see: >> Rework the driver to handle critical actions (such as setting TXAK, >> and everything else that might result in clock stretching) in the >> interrupt handler, or rework the driver to handle everything in >> a high priority kernel thread. > I'm not sure a high priority kernel thread will help. > Without CONFIG_PREEMPT (which has its own set of nasties) > a RT process won't be scheduled until the processor it last > ran on does a reschedule. > I don't think a kernel thread will be any different from a > user process running under the RT scheduler. > > I'm trying to remember the smbus spec (without remembering the I2C one). For those following along the spec is available here[0]. I know there's a 3.0 version[1] as well but the devices I'm dealing with are from a 2.0 vintage. > While basically a clock+data bit-bang the slave is allowed to drive > the clock low to extend a cycle. > It may be allowed to do this at any point? From what I can see it's actually the master extending the clock. Or more accurately holding it low between the address and data bytes (which from the T2080 reference manual looks expected). I think this may cause a strictly compliant SMBUS device to determine that Tlow:mext has been violated. > The master can generate the data at almost any rate (below the maximum) > but I don't think it can go down to zero. > But I do remember one of the specs having a timeout. > > But I'd have thought the slave should answer the cycle correctly > regardless of any 'random' delays the master adds in. Probably depends on the device implementation. I've got multiple other I2C/SMBUS devices and the LM81 seems to be the one that objects. > Unless you are getting away with de-asserting chipselect? > > The only implementation I've done is one an FPGA so doesn't have > worry about interrupt latencies. > It doesn't actually support clock stretching; it wasn't in the > code I started from and none of the slaves we need to connect to > ever does it. > > David [0] - http://www.smbus.org/specs/smbus20.pdf [1] - https://pmbus.org/Assets/PDFS/Public/SMBus_3_0_20141220.pdf > > - > Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 > 1PT, UK > Registration No: 1397386 (Wales) >
Re: [GIT PULL] Please pull powerpc/linux.git powerpc-5.12-3 tag
The pull request you sent on Sun, 14 Mar 2021 21:15:08 +1100: > https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git > tags/powerpc-5.12-3 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/c3c7579f5e3b4826d32af0521e53d5d565ed5a73 Thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/prtracker.html
Re: [PATCH] soc: fsl: guts: fix comment syntax in file
On 3/13/21 11:28 PM, Aditya Srivastava wrote: > The opening comment mark '/**' is used for kernel-doc comments. > There are certain comments in include/linux/fsl/guts.h which follows this > syntax, but the content inside does not comply with kernel-doc. > > E.g., opening comment for "Freecale 85xx and 86xx Global Utilties > register set" follows kernel-doc syntax(i.e., '/**'), but the content > inside does not comply with any kernel-doc specification (function, > struct, etc). > > This causes unwelcomed warning from kernel-doc: > "warning: expecting prototype for Freecale 85xx and 86xx Global Utilties > register set(). Prototype was for __FSL_GUTS_H__() instead" > > Replace all such comment occurrences with general comment format, > i.e. '/*' to pervent kernel-doc from parsing these. > > Signed-off-by: Aditya Srivastava Reviewed-by: Randy Dunlap Thanks. > --- > * Applies perfectly on next-20210312 > > include/linux/fsl/guts.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/include/linux/fsl/guts.h b/include/linux/fsl/guts.h > index 0ac27b233f12..fdb55ca47a4f 100644 > --- a/include/linux/fsl/guts.h > +++ b/include/linux/fsl/guts.h > @@ -1,5 +1,5 @@ > /* SPDX-License-Identifier: GPL-2.0-or-later */ > -/** > +/* > * Freecale 85xx and 86xx Global Utilties register set > * > * Authors: Jeff Brown > @@ -14,7 +14,7 @@ > #include > #include > > -/** > +/* > * Global Utility Registers. > * > * Not all registers defined in this structure are available on all chips, so > -- ~Randy
Re: [PATCH 15/17] iommu: remove DOMAIN_ATTR_NESTING
On Sun, Mar 14, 2021 at 11:44:52AM +0100, Auger Eric wrote: > As mentionned by Robin, there are series planning to use > DOMAIN_ATTR_NESTING to get info about the nested caps of the iommu (ARM > and Intel): > > [Patch v8 00/10] vfio: expose virtual Shared Virtual Addressing to VMs > patches 1, 2, 3 > > Is the plan to introduce a new domain_get_nesting_info ops then? The plan as usual would be to add it the series adding that support. Not sure what the merge plans are - if the series is ready to be merged I could rebase on top of it, otherwise that series will need to add the method.
[PATCH] soc: fsl: guts: fix comment syntax in file
The opening comment mark '/**' is used for kernel-doc comments. There are certain comments in include/linux/fsl/guts.h which follows this syntax, but the content inside does not comply with kernel-doc. E.g., opening comment for "Freecale 85xx and 86xx Global Utilties register set" follows kernel-doc syntax(i.e., '/**'), but the content inside does not comply with any kernel-doc specification (function, struct, etc). This causes unwelcomed warning from kernel-doc: "warning: expecting prototype for Freecale 85xx and 86xx Global Utilties register set(). Prototype was for __FSL_GUTS_H__() instead" Replace all such comment occurrences with general comment format, i.e. '/*' to pervent kernel-doc from parsing these. Signed-off-by: Aditya Srivastava --- * Applies perfectly on next-20210312 include/linux/fsl/guts.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/fsl/guts.h b/include/linux/fsl/guts.h index 0ac27b233f12..fdb55ca47a4f 100644 --- a/include/linux/fsl/guts.h +++ b/include/linux/fsl/guts.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -/** +/* * Freecale 85xx and 86xx Global Utilties register set * * Authors: Jeff Brown @@ -14,7 +14,7 @@ #include #include -/** +/* * Global Utility Registers. * * Not all registers defined in this structure are available on all chips, so -- 2.17.1
Re: [PATCH 15/17] iommu: remove DOMAIN_ATTR_NESTING
Hi Christoph,
On 3/1/21 9:42 AM, Christoph Hellwig wrote:
> Signed-off-by: Christoph Hellwig
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 40 ++---
> drivers/iommu/arm/arm-smmu/arm-smmu.c | 30 ++--
> drivers/iommu/intel/iommu.c | 28 +--
> drivers/iommu/iommu.c | 8 +
> drivers/vfio/vfio_iommu_type1.c | 5 +--
> include/linux/iommu.h | 4 ++-
> 6 files changed, 50 insertions(+), 65 deletions(-)
As mentionned by Robin, there are series planning to use
DOMAIN_ATTR_NESTING to get info about the nested caps of the iommu (ARM
and Intel):
[Patch v8 00/10] vfio: expose virtual Shared Virtual Addressing to VMs
patches 1, 2, 3
Is the plan to introduce a new domain_get_nesting_info ops then?
Thanks
Eric
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index bf96172e8c1f71..8e6fee3ea454d3 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -2466,41 +2466,21 @@ static void arm_smmu_dma_enable_flush_queue(struct
> iommu_domain *domain)
> to_smmu_domain(domain)->non_strict = true;
> }
>
> -static int arm_smmu_domain_set_attr(struct iommu_domain *domain,
> - enum iommu_attr attr, void *data)
> +static int arm_smmu_domain_enable_nesting(struct iommu_domain *domain)
> {
> - int ret = 0;
> struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
> + int ret = -EPERM;
>
> - mutex_lock(_domain->init_mutex);
> + if (domain->type != IOMMU_DOMAIN_UNMANAGED)
> + return -EINVAL;
>
> - switch (domain->type) {
> - case IOMMU_DOMAIN_UNMANAGED:
> - switch (attr) {
> - case DOMAIN_ATTR_NESTING:
> - if (smmu_domain->smmu) {
> - ret = -EPERM;
> - goto out_unlock;
> - }
> -
> - if (*(int *)data)
> - smmu_domain->stage = ARM_SMMU_DOMAIN_NESTED;
> - else
> - smmu_domain->stage = ARM_SMMU_DOMAIN_S1;
> - break;
> - default:
> - ret = -ENODEV;
> - }
> - break;
> - case IOMMU_DOMAIN_DMA:
> - ret = -ENODEV;
> - break;
> - default:
> - ret = -EINVAL;
> + mutex_lock(_domain->init_mutex);
> + if (!smmu_domain->smmu) {
> + smmu_domain->stage = ARM_SMMU_DOMAIN_NESTED;
> + ret = 0;
> }
> -
> -out_unlock:
> mutex_unlock(_domain->init_mutex);
> +
> return ret;
> }
>
> @@ -2603,7 +2583,7 @@ static struct iommu_ops arm_smmu_ops = {
> .device_group = arm_smmu_device_group,
> .dma_use_flush_queue= arm_smmu_dma_use_flush_queue,
> .dma_enable_flush_queue = arm_smmu_dma_enable_flush_queue,
> - .domain_set_attr= arm_smmu_domain_set_attr,
> + .domain_enable_nesting = arm_smmu_domain_enable_nesting,
> .of_xlate = arm_smmu_of_xlate,
> .get_resv_regions = arm_smmu_get_resv_regions,
> .put_resv_regions = generic_iommu_put_resv_regions,
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c
> b/drivers/iommu/arm/arm-smmu/arm-smmu.c
> index e7893e96f5177a..2e17d990d04481 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c
> @@ -1497,6 +1497,24 @@ static void arm_smmu_dma_enable_flush_queue(struct
> iommu_domain *domain)
> to_smmu_domain(domain)->pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT;
> }
>
> +static int arm_smmu_domain_enable_nesting(struct iommu_domain *domain)
> +{
> + struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
> + int ret = -EPERM;
> +
> + if (domain->type != IOMMU_DOMAIN_UNMANAGED)
> + return -EINVAL;
> +
> + mutex_lock(_domain->init_mutex);
> + if (!smmu_domain->smmu) {
> + smmu_domain->stage = ARM_SMMU_DOMAIN_NESTED;
> + ret = 0;
> + }
> + mutex_unlock(_domain->init_mutex);
> +
> + return ret;
> +}
> +
> static int arm_smmu_domain_set_attr(struct iommu_domain *domain,
> enum iommu_attr attr, void *data)
> {
> @@ -1508,17 +1526,6 @@ static int arm_smmu_domain_set_attr(struct
> iommu_domain *domain,
> switch(domain->type) {
> case IOMMU_DOMAIN_UNMANAGED:
> switch (attr) {
> - case DOMAIN_ATTR_NESTING:
> - if (smmu_domain->smmu) {
> - ret = -EPERM;
> - goto out_unlock;
> - }
> -
> - if (*(int *)data)
> - smmu_domain->stage = ARM_SMMU_DOMAIN_NESTED;
> -
[GIT PULL] Please pull powerpc/linux.git powerpc-5.12-3 tag
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 Hi Linus, Please pull some more powerpc fixes for 5.12: The following changes since commit fbda7904302499dd7ffc073a3c84eb7c9275db0a: Merge tag 'powerpc-5.12-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux (2021-03-07 13:24:44 -0800) are available in the git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git tags/powerpc-5.12-3 for you to fetch changes up to 0b736881c8f1a6cd912f7a9162b9e097b28c1c30: powerpc/traps: unrecoverable_exception() is not an interrupt handler (2021-03-12 11:02:12 +1100) - -- powerpc fixes for 5.12 #3 Fix wrong instruction encoding for lis in ppc_function_entry(), which could potentially lead to missed kprobes. Fix SET_FULL_REGS on 32-bit and 64e, which prevented ptrace of non-volatile GPRs immediately after exec. Clean up a missed SRR specifier in the recent interrupt rework. Don't treat unrecoverable_exception() as an interrupt handler, it's called from other handlers so shouldn't do the interrupt entry/exit accounting itself. Fix build errors caused by missing declaration of [en/dis]able_kernel_vsx(). Thanks to Christophe Leroy, Daniel Axtens, Geert Uytterhoeven, Jiri Olsa, Naveen N. Rao, Nicholas Piggin. - -- Christophe Leroy (2): powerpc: Fix missing declaration of [en/dis]able_kernel_vsx() powerpc/traps: unrecoverable_exception() is not an interrupt handler Daniel Axtens (1): powerpc/64s/exception: Clean up a missed SRR specifier Michael Ellerman (1): powerpc/64s: Use symbolic macros for function entry encoding Naveen N. Rao (1): powerpc/64s: Fix instruction encoding for lis in ppc_function_entry() Nicholas Piggin (1): powerpc: Fix inverted SET_FULL_REGS bitop arch/powerpc/include/asm/code-patching.h | 7 --- arch/powerpc/include/asm/interrupt.h | 3 ++- arch/powerpc/include/asm/ptrace.h| 4 ++-- arch/powerpc/include/asm/switch_to.h | 10 ++ arch/powerpc/kernel/exceptions-64s.S | 2 +- arch/powerpc/kernel/interrupt.c | 1 - arch/powerpc/kernel/traps.c | 2 +- 7 files changed, 20 insertions(+), 9 deletions(-) -BEGIN PGP SIGNATURE- iQIzBAEBCAAdFiEEJFGtCPCthwEv2Y/bUevqPMjhpYAFAmBN4hAACgkQUevqPMjh pYADeQ//SfFd0biPa2ZroIqshVWDwY+CW+lHt0NIMiAcyaAS6VXOhgV27kFM4K72 bPgwQ4x4pa3ZoUiHD2Otp0EHYyFWPleY+8Jz9Sl6QBmySQ1ZllFppg92DiTP8RdF ZItidFbP6+i8gvnoLkVyGCVzZky4x6Om34+r2emNr2Ju6SEw1ok/LFQUjxEmOGpV +hCLXENPH76KP3dvLVklOtLJStFY7XFzuS0/c9yM33WgFVdYArGx/Wy6365Mg+wy bg74oZmfU3IRpSNkErwkWSHTVLPQOq1wQUbFKXhMGvAp82C793ExSoGy/0EELlGW fjgQMyNlGc0IhJAf6JeN18wgOwx5uBfbzEX5GTMu3A+WacQqod0kPeWx7FOZan6U 5ikNwyeg//dHUokbscfqvHhEL4Wp4REVO8d1smLQk7ycLpw4/6saYd9GC1HXE2r4 xJrPCYAtBn2lZl5ra6InO+zyac40fVP1oac7gJWaDkYmOmSQ1gghCjQpGfQGRO8H fEnnfR5aqtgeYRnE53rb7BRTjgxsMXo4kLI2T2W10i3ezm/KmUhD9M3D0Ov/5nTv DoqTZWhs6yEx2cgvIc4IBgUZb+R7QIbPa/zcq4DIBNsTUJRwbvDfK+8e/abnTGkR /RfOqMA8z28h8UFR6tPojPgxG/0dp9WqGB7ryCWpdNCSiYrheIk= =WdJ7 -END PGP SIGNATURE-
Re: [PATCH] powerpc/64s: Use symbolic macros for function entry encoding
On Tue, 9 Mar 2021 18:15:44 +1100, Michael Ellerman wrote: > In ppc_function_entry() we look for a specific set of instructions by > masking the instructions and comparing with a known value. Currently > those known values are just literal hex values, and we recently > discovered one of them was wrong. > > Instead construct the values using the existing constants we have for > defining various fields of instructions. Applied to powerpc/fixes. [1/1] powerpc/64s: Use symbolic macros for function entry encoding https://git.kernel.org/powerpc/c/7aed41cff35a9aaf3431b8c0c23daa7d8bb77cd3 cheers
Re: [PATCH v2] vio: make remove callback return void
On Thu, 25 Feb 2021 23:18:34 +0100, Uwe Kleine-König wrote: > The driver core ignores the return value of struct bus_type::remove() > because there is only little that can be done. To simplify the quest to > make this function return void, let struct vio_driver::remove() return > void, too. All users already unconditionally return 0, this commit makes > it obvious that returning an error code is a bad idea. > > Note there are two nominally different implementations for a vio bus: > one in arch/sparc/kernel/vio.c and the other in > arch/powerpc/platforms/pseries/vio.c. This patch only adapts the powerpc > one. > > [...] Applied to powerpc/fixes. [1/1] vio: make remove callback return void https://git.kernel.org/powerpc/c/386a966f5ce71a0364b158c5d0a6971f4e418ea8 cheers
Re: [PATCH] powerpc: fix inverted SET_FULL_REGS bitop
On Mon, 8 Mar 2021 18:55:30 +1000, Nicholas Piggin wrote: > This bit operation was inverted and set the low bit rather than cleared > it, breaking the ability to ptrace non-volatile GPRs after exec. Fix. Applied to powerpc/fixes. [1/1] powerpc: Fix inverted SET_FULL_REGS bitop https://git.kernel.org/powerpc/c/73ac79881804eed2e9d76ecdd1018037f8510cb1 cheers
Re: [PATCH] powerpc: Fix instruction encoding for lis in ppc_function_entry()
On Thu, 4 Mar 2021 07:34:11 +0530, Naveen N. Rao wrote: > 'lis r2,N' is 'addis r2,0,N' and the instruction encoding in the macro > LIS_R2 is incorrect (it currently maps to 'addis 0,r2,N'). Fix the same. Applied to powerpc/fixes. [1/1] powerpc/64s: Fix instruction encoding for lis in ppc_function_entry() https://git.kernel.org/powerpc/c/cea15316ceee2d4a51dfdecd79e08a438135416c cheers
Re: [RFC PATCH 0/8] WIP support for the LLVM integrated assembler
On Thu, 25 Feb 2021 14:09:58 +1100, Daniel Axtens wrote: > To support Clang's CFI we need LTO. For LTO, we need to be able to compile > with the LLVM integrated assembler. > > Currently, we can't. > > This series gets us a bit closer, but I'm still stuck and I'm hoping > someone can point me in the right direction. > > [...] Patch 1 applied to powerpc/fixes. [1/8] powerpc/64s/exception: Clean up a missed SRR specifier https://git.kernel.org/powerpc/c/c080a173301ffc62cb6c76308c803c7fee05517a cheers
Re: [PATCH v2] powerpc/pseries: Don't enforce MSI affinity with kdump
On Mon, 15 Feb 2021 10:45:06 +0100, Greg Kurz wrote: > Depending on the number of online CPUs in the original kernel, it is > likely for CPU #0 to be offline in a kdump kernel. The associated IRQs > in the affinity mappings provided by irq_create_affinity_masks() are > thus not started by irq_startup(), as per-design with managed IRQs. > > This can be a problem with multi-queue block devices driven by blk-mq : > such a non-started IRQ is very likely paired with the single queue > enforced by blk-mq during kdump (see blk_mq_alloc_tag_set()). This > causes the device to remain silent and likely hangs the guest at > some point. > > [...] Applied to powerpc/fixes. [1/1] powerpc/pseries: Don't enforce MSI affinity with kdump https://git.kernel.org/powerpc/c/f9619d5e5174867536b7e558683bc4408eab833f cheers
Re: [PATCH] powerpc/4xx: Fix build errors from mfdcr()
On Thu, 18 Feb 2021 23:30:58 +1100, Michael Ellerman wrote:
> lkp reported a build error in fsp2.o:
>
> CC arch/powerpc/platforms/44x/fsp2.o
> {standard input}:577: Error: unsupported relocation against base
>
> Which comes from:
>
> [...]
Applied to powerpc/fixes.
[1/1] powerpc/4xx: Fix build errors from mfdcr()
https://git.kernel.org/powerpc/c/eead089311f4d935ab5d1d8fbb0c42ad44699ada
cheers
Re: [PATCH v2 00/43] powerpc/32: Switch to interrupt entry/exit in C
On Tue, 9 Mar 2021 12:09:25 + (UTC), Christophe Leroy wrote: > This series aims at porting interrupt entry/exit in C on PPC32, using > the work already merged for PPC64. > > First two patches are a fix and an optimisation of unrecoverable_exception() > function. > > Six following patches do minimal changes in 40x in order to be able to enable > MMU > earlier in exception entry. > > [...] Patch 1 applied to powerpc/fixes. [01/43] powerpc/traps: unrecoverable_exception() is not an interrupt handler https://git.kernel.org/powerpc/c/0b736881c8f1a6cd912f7a9162b9e097b28c1c30 cheers
Re: [PATCH] powerpc/sstep: Fix VSX instruction emulation
On Thu, 25 Feb 2021 14:19:46 +1100, Jordan Niethe wrote:
> Commit af99da74333b ("powerpc/sstep: Support VSX vector paired storage
> access instructions") added loading and storing 32 word long data into
> adjacent VSRs. However the calculation used to determine if two VSRs
> needed to be loaded/stored inadvertently prevented the load/storing
> taking place for instructions with a data length less than 16 words.
>
> This causes the emulation to not function correctly, which can be seen
> by the alignment_handler selftest:
>
> [...]
Applied to powerpc/fixes.
[1/1] powerpc/sstep: Fix VSX instruction emulation
https://git.kernel.org/powerpc/c/5c88a17e15795226b56d83f579cbb9b7a4864f79
cheers
Re: [PATCH] powerpc/syscall: Force inlining of __prep_irq_for_enabled_exit()
On Wed, 24 Feb 2021 06:34:22 + (UTC), Christophe Leroy wrote: > As reported by kernel test robot, a randconfig with high amount of > debuging options can lead to build failure for undefined reference > to replay_soft_interrupts() on ppc32. > > This is due to gcc not seeing that __prep_irq_for_enabled_exit() > always returns true on ppc32 because it doesn't inline it for > some reason. > > [...] Applied to powerpc/fixes. [1/1] powerpc/syscall: Force inlining of __prep_irq_for_enabled_exit() https://git.kernel.org/powerpc/c/91b6c5dbe9e072dbdb181eed89c5c824e92ac0f5 cheers
Re: [PATCH] powerpc/603: Fix protection of user pages mapped with PROT_NONE
On Mon, 1 Feb 2021 06:29:50 + (UTC), Christophe Leroy wrote: > On book3s/32, page protection is defined by the PP bits in the PTE > which provide the following protection depending on the access > keys defined in the matching segment register: > - PP 00 means RW with key 0 and N/A with key 1. > - PP 01 means RW with key 0 and RO with key 1. > - PP 10 means RW with both key 0 and key 1. > - PP 11 means RO with both key 0 and key 1. > > [...] Applied to powerpc/fixes. [1/1] powerpc/603: Fix protection of user pages mapped with PROT_NONE https://git.kernel.org/powerpc/c/c119565a15a628efdfa51352f9f6c5186e506a1c cheers
Re: [PATCH V2] powerpc/perf: Fix handling of privilege level checks in perf interrupt context
On Thu, 25 Feb 2021 05:10:39 -0500, Athira Rajeev wrote: > Running "perf mem record" in powerpc platforms with selinux enabled > resulted in soft lockup's. Below call-trace was seen in the logs: > > CPU: 58 PID: 3751 Comm: sssd_nss Not tainted 5.11.0-rc7+ #2 > NIP: c0dff3d4 LR: c0dff3d0 CTR: > REGS: c07fffab7d60 TRAP: 0100 Not tainted (5.11.0-rc7+) > <<>> > NIP [c0dff3d4] _raw_spin_lock_irqsave+0x94/0x120 > LR [c0dff3d0] _raw_spin_lock_irqsave+0x90/0x120 > Call Trace: > [cfd471a0] [cfd47260] 0xcfd47260 (unreliable) > [cfd471e0] [c0b5fbbc] skb_queue_tail+0x3c/0x90 > [cfd47220] [c0296edc] audit_log_end+0x6c/0x180 > [cfd47260] [c06a3f20] common_lsm_audit+0xb0/0xe0 > [cfd472a0] [c066c664] slow_avc_audit+0xa4/0x110 > [cfd47320] [c066cff4] avc_has_perm+0x1c4/0x260 > [cfd47430] [c066e064] selinux_perf_event_open+0x74/0xd0 > [cfd47450] [c0669888] security_perf_event_open+0x68/0xc0 > [cfd47490] [c013d788] record_and_restart+0x6e8/0x7f0 > [cfd476c0] [c013dabc] perf_event_interrupt+0x22c/0x560 > [cfd477d0] [c002d0fc] performance_monitor_exception0x4c/0x60 > [cfd477f0] [c000b378] > performance_monitor_common_virt+0x1c8/0x1d0 > interrupt: f00 at _raw_spin_lock_irqsave+0x38/0x120 > NIP: c0dff378 LR: c0b5fbbc CTR: c07d47f0 > REGS: cfd47860 TRAP: 0f00 Not tainted (5.11.0-rc7+) > <<>> > NIP [c0dff378] _raw_spin_lock_irqsave+0x38/0x120 > LR [c0b5fbbc] skb_queue_tail+0x3c/0x90 > interrupt: f00 > [cfd47b00] [0038] 0x38 (unreliable) > [cfd47b40] [caae6200] 0xcaae6200 > [cfd47b80] [c0296edc] audit_log_end+0x6c/0x180 > [cfd47bc0] [c029f494] audit_log_exit+0x344/0xf80 > [cfd47d10] [c02a2b00] __audit_syscall_exit+0x2c0/0x320 > [cfd47d60] [c0032878] do_syscall_trace_leave+0x148/0x200 > [cfd47da0] [c003d5b4] syscall_exit_prepare+0x324/0x390 > [cfd47e10] [c000d76c] system_call_common+0xfc/0x27c > > [...] Applied to powerpc/fixes. [1/1] powerpc/perf: Fix handling of privilege level checks in perf interrupt context https://git.kernel.org/powerpc/c/5ae5fbd2107959b68ac69a8b75412208663aea88 cheers
Re: [PATCH] powerpc: Force inlining of mmu_has_feature to fix build failure
On Sat, 27 Feb 2021 16:30:48 + (UTC), Christophe Leroy wrote: > The test robot has managed to generate a random config leading > to following build failure: > > LD .tmp_vmlinux.kallsyms1 > powerpc64-linux-ld: arch/powerpc/mm/pgtable.o: in function > `ptep_set_access_flags': > pgtable.c:(.text.ptep_set_access_flags+0xf0): undefined reference to > `hash__flush_tlb_page' > powerpc64-linux-ld: arch/powerpc/mm/book3s32/mmu.o: in function > `MMU_init_hw_patch': > mmu.c:(.init.text+0x452): undefined reference to `patch__hash_page_A0' > powerpc64-linux-ld: mmu.c:(.init.text+0x45e): undefined reference to > `patch__hash_page_A0' > powerpc64-linux-ld: mmu.c:(.init.text+0x46a): undefined reference to > `patch__hash_page_A1' > powerpc64-linux-ld: mmu.c:(.init.text+0x476): undefined reference to > `patch__hash_page_A1' > powerpc64-linux-ld: mmu.c:(.init.text+0x482): undefined reference to > `patch__hash_page_A2' > powerpc64-linux-ld: mmu.c:(.init.text+0x48e): undefined reference to > `patch__hash_page_A2' > powerpc64-linux-ld: mmu.c:(.init.text+0x49e): undefined reference to > `patch__hash_page_B' > powerpc64-linux-ld: mmu.c:(.init.text+0x4aa): undefined reference to > `patch__hash_page_B' > powerpc64-linux-ld: mmu.c:(.init.text+0x4b6): undefined reference to > `patch__hash_page_C' > powerpc64-linux-ld: mmu.c:(.init.text+0x4c2): undefined reference to > `patch__hash_page_C' > powerpc64-linux-ld: mmu.c:(.init.text+0x4ce): undefined reference to > `patch__flush_hash_A0' > powerpc64-linux-ld: mmu.c:(.init.text+0x4da): undefined reference to > `patch__flush_hash_A0' > powerpc64-linux-ld: mmu.c:(.init.text+0x4e6): undefined reference to > `patch__flush_hash_A1' > powerpc64-linux-ld: mmu.c:(.init.text+0x4f2): undefined reference to > `patch__flush_hash_A1' > powerpc64-linux-ld: mmu.c:(.init.text+0x4fe): undefined reference to > `patch__flush_hash_A2' > powerpc64-linux-ld: mmu.c:(.init.text+0x50a): undefined reference to > `patch__flush_hash_A2' > powerpc64-linux-ld: mmu.c:(.init.text+0x522): undefined reference to > `patch__flush_hash_B' > powerpc64-linux-ld: mmu.c:(.init.text+0x532): undefined reference to > `patch__flush_hash_B' > powerpc64-linux-ld: arch/powerpc/mm/book3s32/mmu.o: in function > `update_mmu_cache': > mmu.c:(.text.update_mmu_cache+0xa0): undefined reference to `add_hash_page' > powerpc64-linux-ld: mm/memory.o: in function `zap_pte_range': > memory.c:(.text.zap_pte_range+0x160): undefined reference to > `flush_hash_pages' > powerpc64-linux-ld: mm/memory.o: in function `handle_pte_fault': > memory.c:(.text.handle_pte_fault+0x180): undefined reference to > `hash__flush_tlb_page' > > [...] Applied to powerpc/fixes. [1/1] powerpc: Force inlining of mmu_has_feature to fix build failure https://git.kernel.org/powerpc/c/acdad8fb4a1574323db88f98a38b630691574e16 cheers
Re: [PATCH] powerpc: Fix missing declaration of [en/dis]able_kernel_vsx()
On Tue, 9 Mar 2021 08:39:39 + (UTC), Christophe Leroy wrote: > Add stub instances of enable_kernel_vsx() and disable_kernel_vsx() > when CONFIG_VSX is not set, to avoid following build failure. > > CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.o > In file included from > ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:29, > from > ./drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:37, > from > drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c:27: > drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c: In function > 'dcn_bw_apply_registry_override': > ./drivers/gpu/drm/amd/amdgpu/../display/dc/os_types.h:64:3: error: implicit > declaration of function 'enable_kernel_vsx'; did you mean 'enable_kernel_fp'? > [-Werror=implicit-function-declaration] >64 | enable_kernel_vsx(); \ > | ^ > drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c:640:2: note: in > expansion of macro 'DC_FP_START' > 640 | DC_FP_START(); > | ^~~ > ./drivers/gpu/drm/amd/amdgpu/../display/dc/os_types.h:75:3: error: implicit > declaration of function 'disable_kernel_vsx'; did you mean > 'disable_kernel_fp'? [-Werror=implicit-function-declaration] >75 | disable_kernel_vsx(); \ > | ^~ > drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.c:676:2: note: in > expansion of macro 'DC_FP_END' > 676 | DC_FP_END(); > | ^ > cc1: some warnings being treated as errors > make[5]: *** [drivers/gpu/drm/amd/amdgpu/../display/dc/calcs/dcn_calcs.o] > Error 1 Applied to powerpc/fixes. [1/1] powerpc: Fix missing declaration of [en/dis]able_kernel_vsx() https://git.kernel.org/powerpc/c/bd73758803c2eedc037c2268b65a19542a832594 cheers
[PATCH] powerpc/fsl-pci: Fix section mismatch warning
Section mismatch in reference from the function .fsl_add_bridge() to
the function .init.text:.setup_pci_cmd()
fsl_add_bridge() is not __init, and can't be, and is the only caller
of setup_pci_cmd(). Fix it by making setup_pci_cmd() non-init.
Signed-off-by: Michael Ellerman
---
arch/powerpc/sysdev/fsl_pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 040b9d01c079..69af73765783 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -455,7 +455,7 @@ static void setup_pci_atmu(struct pci_controller *hose)
}
}
-static void __init setup_pci_cmd(struct pci_controller *hose)
+static void setup_pci_cmd(struct pci_controller *hose)
{
u16 cmd;
int cap_x;
--
2.25.1
[PATCH] powerpc: Fix section mismatch warning in smp_setup_pacas()
Section mismatch in reference from the function .smp_setup_pacas() to
the function .init.text:.allocate_paca()
The only caller of smp_setup_pacas() is setup_arch() which is __init,
so mark smp_setup_pacas() __init.
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/setup-common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/setup-common.c
b/arch/powerpc/kernel/setup-common.c
index bee984b1887b..55caaa211b9f 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -829,7 +829,7 @@ static __init void print_system_info(void)
}
#ifdef CONFIG_SMP
-static void smp_setup_pacas(void)
+static void __init smp_setup_pacas(void)
{
int cpu;
--
2.25.1
[PATCH] powerpc/64s: Fold update_current_thread_[i]amr() into their only callers
lkp reported warnings in some configuration due to
update_current_thread_amr() being unused:
arch/powerpc/mm/book3s64/pkeys.c:284:20: error: unused function
'update_current_thread_amr'
static inline void update_current_thread_amr(u64 value)
Which is because it's only use is inside an ifdef. We could move it
inside the ifdef, but it's a single line function and only has one
caller, so just fold it in.
Similarly update_current_thread_iamr() is small and only called once,
so fold it in also.
Fixes: 48a8ab4eeb82 ("powerpc/book3s64/pkeys: Don't update SPRN_AMR when in
kernel mode.")
Reported-by: kernel test robot
Signed-off-by: Michael Ellerman
---
arch/powerpc/mm/book3s64/pkeys.c | 20 +---
1 file changed, 5 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c
index 15dcc5ad91c5..a2d9ad138709 100644
--- a/arch/powerpc/mm/book3s64/pkeys.c
+++ b/arch/powerpc/mm/book3s64/pkeys.c
@@ -301,19 +301,6 @@ void setup_kuap(bool disabled)
}
#endif
-static inline void update_current_thread_amr(u64 value)
-{
- current->thread.regs->amr = value;
-}
-
-static inline void update_current_thread_iamr(u64 value)
-{
- if (!likely(pkey_execute_disable_supported))
- return;
-
- current->thread.regs->iamr = value;
-}
-
#ifdef CONFIG_PPC_MEM_KEYS
void pkey_mm_init(struct mm_struct *mm)
{
@@ -328,7 +315,7 @@ static inline void init_amr(int pkey, u8 init_bits)
u64 new_amr_bits = (((u64)init_bits & 0x3UL) << pkeyshift(pkey));
u64 old_amr = current_thread_amr() & ~((u64)(0x3ul) << pkeyshift(pkey));
- update_current_thread_amr(old_amr | new_amr_bits);
+ current->thread.regs->amr = old_amr | new_amr_bits;
}
static inline void init_iamr(int pkey, u8 init_bits)
@@ -336,7 +323,10 @@ static inline void init_iamr(int pkey, u8 init_bits)
u64 new_iamr_bits = (((u64)init_bits & 0x1UL) << pkeyshift(pkey));
u64 old_iamr = current_thread_iamr() & ~((u64)(0x1ul) <<
pkeyshift(pkey));
- update_current_thread_iamr(old_iamr | new_iamr_bits);
+ if (!likely(pkey_execute_disable_supported))
+ return;
+
+ current->thread.regs->iamr = old_iamr | new_iamr_bits;
}
/*
--
2.25.1
[PATCH] powerpc/eeh: Fix build failure with CONFIG_PROC_FS=n
The build fails with CONFIG_PROC_FS=n:
arch/powerpc/kernel/eeh.c:1571:12: error: ‘proc_eeh_show’ defined but not used
1571 | static int proc_eeh_show(struct seq_file *m, void *v)
Wrap proc_eeh_show() in an ifdef to avoid it.
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/eeh.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index cd60bc1c8701..01dbb44a0fe3 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -1568,6 +1568,7 @@ int eeh_pe_inject_err(struct eeh_pe *pe, int type, int
func,
}
EXPORT_SYMBOL_GPL(eeh_pe_inject_err);
+#ifdef CONFIG_PROC_FS
static int proc_eeh_show(struct seq_file *m, void *v)
{
if (!eeh_enabled()) {
@@ -1594,6 +1595,7 @@ static int proc_eeh_show(struct seq_file *m, void *v)
return 0;
}
+#endif /* CONFIG_PROC_FS */
#ifdef CONFIG_DEBUG_FS
--
2.25.1
