Re: [PATCH kernel v2] powerpc/boot: Stop using RELACOUNT

[Gabriel Paubert]

On Wed, Apr 06, 2022 at 02:01:48PM +1000, Alexey Kardashevskiy wrote:
> So far the RELACOUNT tag from the ELF header was containing the exact
> number of R_PPC_RELATIVE/R_PPC64_RELATIVE relocations. However the LLVM's
> recent change [1] make it equal-or-less than the actual number which
> makes it useless.
> 
> This replaces RELACOUNT in zImage loader with a pair of RELASZ and RELAENT.
> The vmlinux relocation code is fixed in commit d79976918852
> ("powerpc/64: Add UADDR64 relocation support").
> 
> To make it more future proof, this walks through the entire .rela.dyn
> section instead of assuming that the section is sorter by a relocation
> type. Unlike d79976918852, this does not add unaligned UADDR/UADDR64
> relocations as we are likely not to see those in practice - the zImage
> is small and very arch specific so there is a smaller chance that some
> generic feature (such as PRINK_INDEX) triggers unaligned relocations.
> 
> [1] https://github.com/llvm/llvm-project/commit/da0e5b885b25cf4
> Signed-off-by: Alexey Kardashevskiy 
> ---
> Changes:
> v2:
> * s/divd/divwu/ for ppc32
> * updated the commit log
> * named all new labels instead of numbering them
> (s/101f/.Lcheck_for_relaent/ and so on)
> ---
>  arch/powerpc/boot/crt0.S | 45 ++--
>  1 file changed, 29 insertions(+), 16 deletions(-)
> 
> diff --git a/arch/powerpc/boot/crt0.S b/arch/powerpc/boot/crt0.S
> index feadee18e271..e9306d862f8d 100644
> --- a/arch/powerpc/boot/crt0.S
> +++ b/arch/powerpc/boot/crt0.S
> @@ -8,7 +8,8 @@
>  #include "ppc_asm.h"
>  
>  RELA = 7
> -RELACOUNT = 0x6ff9
> +RELASZ = 8
> +RELAENT = 9
>  
>   .data
>   /* A procedure descriptor used when booting this as a COFF file.
> @@ -75,34 +76,39 @@ p_base:   mflrr10 /* r10 now points to 
> runtime addr of p_base */
>   bne 11f
>   lwz r9,4(r12)   /* get RELA pointer in r9 */
>   b   12f
> -11:  addis   r8,r8,(-RELACOUNT)@ha
> - cmpwi   r8,RELACOUNT@l
> +11:  cmpwi   r8,RELASZ
> + bne .Lcheck_for_relaent
> + lwz r0,4(r12)   /* get RELASZ value in r0 */
> + b   12f
> +.Lcheck_for_relaent:
> + cmpwi   r8,RELAENT
>   bne 12f
> - lwz r0,4(r12)   /* get RELACOUNT value in r0 */
> + lwz r14,4(r12)  /* get RELAENT value in r14 */
>  12:  addir12,r12,8
>   b   9b
>  
>   /* The relocation section contains a list of relocations.
>* We now do the R_PPC_RELATIVE ones, which point to words
> -  * which need to be initialized with addend + offset.
> -  * The R_PPC_RELATIVE ones come first and there are RELACOUNT
> -  * of them. */
> +  * which need to be initialized with addend + offset */
>  10:  /* skip relocation if we don't have both */
>   cmpwi   r0,0
>   beq 3f
>   cmpwi   r9,0
>   beq 3f
> + cmpwi   r14,0
> + beq 3f
>  
>   add r9,r9,r11   /* Relocate RELA pointer */
> + divwu   r0,r0,r14   /* RELASZ / RELAENT */
>   mtctr   r0
>  2:   lbz r0,4+3(r9)  /* ELF32_R_INFO(reloc->r_info) */
>   cmpwi   r0,22   /* R_PPC_RELATIVE */
> - bne 3f
> + bne .Lnext
>   lwz r12,0(r9)   /* reloc->r_offset */
>   lwz r0,8(r9)/* reloc->r_addend */
>   add r0,r0,r11
>   stwxr0,r11,r12
> - addir9,r9,12
> +.Lnext:  add r9,r9,r14
>   bdnz2b
>  
>   /* Do a cache flush for our text, in case the loader didn't */
> @@ -160,32 +166,39 @@ p_base: mflrr10 /* r10 now points to 
> runtime addr of p_base */
>   bne 10f
>   ld  r13,8(r11)   /* get RELA pointer in r13 */
>   b   11f
> -10:  addis   r12,r12,(-RELACOUNT)@ha
> - cmpdi   r12,RELACOUNT@l
> - bne 11f
> - ld  r8,8(r11)   /* get RELACOUNT value in r8 */
> +10:  cmpwi   r12,RELASZ
> + bne .Lcheck_for_relaent
> + lwz r8,8(r11)   /* get RELASZ pointer in r8 */
> + b   11f
> +.Lcheck_for_relaent:
> + cmpwi   r12,RELAENT
> + bne 11f
> + lwz r14,8(r11)  /* get RELAENT pointer in r14 */
>  11:  addir11,r11,16
>   b   9b
>  12:
> - cmpdi   r13,0/* check we have both RELA and RELACOUNT */
> + cmpdi   r13,0/* check we have both RELA, RELASZ, RELAENT*/
>   cmpdi   cr1,r8,0
>   beq 3f
>   beq cr1,3f
> + cmpdi   r14,0
> + beq 3f
>  
>   /* Calcuate the runtime offset. */
>   subfr13,r13,r9
>  
>   /* Run through the list of relocations and process the
>* R_PPC64_RELATIVE ones. */
> + divdr8,r8,r14   /* RELASZ / RELAENT */

While you are at it, this one should also be divdu.

I really wished IBM had used explicit signed/unsigned indication in the
mnemonics (divds, divdu, divws, divwu) instead. Fortunately very little
assemby code uses these instructions nowadays.


>   mtctr   

[PATCH kernel] KVM: PPC: Fix TCE handling for VFIO

[Alexey Kardashevskiy]

At the moment the IOMMU page size in a pseries VM is 16MB (the biggest
allowed by LoPAPR), this page size is used for an emulated TCE table.
If there is a passed though PCI device, that there are hardware IOMMU
tables with equal or smaller IOMMU page sizes so one emulated IOMMU pages
is backed by power-of-two hardware pages.

The code wrongly uses the emulated TCE index instead of hardware TCE
index in error handling. The problem is easier to see on POWER8 with
multi-level TCE tables (when only the first level is preallocated)
as hash mode uses real mode TCE hypercalls handlers.
The kernel starts using indirect tables when VMs get bigger than 128GB
(depends on the max page order).
The very first real mode hcall is going to fail with H_TOO_HARD as
in the real mode we cannot allocate memory for TCEs (we can in the virtual
mode) but on the way out the code attempts to clear hardware TCEs using
emulated TCE indexes which corrupts random kernel memory because
it_offset==1<<59 is subtracted from those indexes and the resulting index
is out of the TCE table bounds.

This fixes kvmppc_clear_tce() to use the correct TCE indexes.

While at it, this fixes TCE cache invalidation which uses emulated TCE
indexes instead of the hardware ones. This went unnoticed as 64bit DMA
is used these days and VMs map all RAM in one go and only then do DMA
and this is when the TCE cache gets populated.

Potentially this could slow down mapping, however normally 16MB
emulated pages are backed by 64K hardware pages so it is one write to
the "TCE Kill" per 256 updates which is not that bad considering the size
of the cache (1024 TCEs or so).

Fixes: ca1fc489cfa0 ("KVM: PPC: Book3S: Allow backing bigger guest IOMMU pages 
with smaller physical pages")
Signed-off-by: Alexey Kardashevskiy 
---
 arch/powerpc/kvm/book3s_64_vio.c| 45 +++--
 arch/powerpc/kvm/book3s_64_vio_hv.c | 44 ++--
 2 files changed, 45 insertions(+), 44 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_64_vio.c b/arch/powerpc/kvm/book3s_64_vio.c
index d42b4b6d4a79..85cfa6328222 100644
--- a/arch/powerpc/kvm/book3s_64_vio.c
+++ b/arch/powerpc/kvm/book3s_64_vio.c
@@ -420,13 +420,19 @@ static void kvmppc_tce_put(struct kvmppc_spapr_tce_table 
*stt,
tbl[idx % TCES_PER_PAGE] = tce;
 }
 
-static void kvmppc_clear_tce(struct mm_struct *mm, struct iommu_table *tbl,
-   unsigned long entry)
+static void kvmppc_clear_tce(struct mm_struct *mm, struct 
kvmppc_spapr_tce_table *stt,
+   struct iommu_table *tbl, unsigned long entry)
 {
-   unsigned long hpa = 0;
-   enum dma_data_direction dir = DMA_NONE;
+   unsigned long i;
+   unsigned long subpages = 1ULL << (stt->page_shift - tbl->it_page_shift);
+   unsigned long io_entry = entry << (stt->page_shift - 
tbl->it_page_shift);
 
-   iommu_tce_xchg_no_kill(mm, tbl, entry, , );
+   for (i = 0; i < subpages; ++i) {
+   unsigned long hpa = 0;
+   enum dma_data_direction dir = DMA_NONE;
+
+   iommu_tce_xchg_no_kill(mm, tbl, io_entry + i, , );
+   }
 }
 
 static long kvmppc_tce_iommu_mapped_dec(struct kvm *kvm,
@@ -485,6 +491,8 @@ static long kvmppc_tce_iommu_unmap(struct kvm *kvm,
break;
}
 
+   iommu_tce_kill(tbl, io_entry, subpages);
+
return ret;
 }
 
@@ -544,6 +552,8 @@ static long kvmppc_tce_iommu_map(struct kvm *kvm,
break;
}
 
+   iommu_tce_kill(tbl, io_entry, subpages);
+
return ret;
 }
 
@@ -590,10 +600,9 @@ long kvmppc_h_put_tce(struct kvm_vcpu *vcpu, unsigned long 
liobn,
ret = kvmppc_tce_iommu_map(vcpu->kvm, stt, stit->tbl,
entry, ua, dir);
 
-   iommu_tce_kill(stit->tbl, entry, 1);
 
if (ret != H_SUCCESS) {
-   kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl, entry);
+   kvmppc_clear_tce(vcpu->kvm->mm, stt, stit->tbl, entry);
goto unlock_exit;
}
}
@@ -669,13 +678,13 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu,
 */
if (get_user(tce, tces + i)) {
ret = H_TOO_HARD;
-   goto invalidate_exit;
+   goto unlock_exit;
}
tce = be64_to_cpu(tce);
 
if (kvmppc_tce_to_ua(vcpu->kvm, tce, )) {
ret = H_PARAMETER;
-   goto invalidate_exit;
+   goto unlock_exit;
}
 
list_for_each_entry_lockless(stit, >iommu_tables, next) {
@@ -684,19 +693,15 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu,
iommu_tce_direction(tce));
 
if (ret != H_SUCCESS) {
-   kvmppc_clear_tce(vcpu->kvm->mm, stit->tbl,
-

[PATCH kernel v2] powerpc/boot: Stop using RELACOUNT

[Alexey Kardashevskiy]

So far the RELACOUNT tag from the ELF header was containing the exact
number of R_PPC_RELATIVE/R_PPC64_RELATIVE relocations. However the LLVM's
recent change [1] make it equal-or-less than the actual number which
makes it useless.

This replaces RELACOUNT in zImage loader with a pair of RELASZ and RELAENT.
The vmlinux relocation code is fixed in commit d79976918852
("powerpc/64: Add UADDR64 relocation support").

To make it more future proof, this walks through the entire .rela.dyn
section instead of assuming that the section is sorter by a relocation
type. Unlike d79976918852, this does not add unaligned UADDR/UADDR64
relocations as we are likely not to see those in practice - the zImage
is small and very arch specific so there is a smaller chance that some
generic feature (such as PRINK_INDEX) triggers unaligned relocations.

[1] https://github.com/llvm/llvm-project/commit/da0e5b885b25cf4
Signed-off-by: Alexey Kardashevskiy 
---
Changes:
v2:
* s/divd/divwu/ for ppc32
* updated the commit log
* named all new labels instead of numbering them
(s/101f/.Lcheck_for_relaent/ and so on)
---
 arch/powerpc/boot/crt0.S | 45 ++--
 1 file changed, 29 insertions(+), 16 deletions(-)

diff --git a/arch/powerpc/boot/crt0.S b/arch/powerpc/boot/crt0.S
index feadee18e271..e9306d862f8d 100644
--- a/arch/powerpc/boot/crt0.S
+++ b/arch/powerpc/boot/crt0.S
@@ -8,7 +8,8 @@
 #include "ppc_asm.h"
 
 RELA = 7
-RELACOUNT = 0x6ff9
+RELASZ = 8
+RELAENT = 9
 
.data
/* A procedure descriptor used when booting this as a COFF file.
@@ -75,34 +76,39 @@ p_base: mflrr10 /* r10 now points to 
runtime addr of p_base */
bne 11f
lwz r9,4(r12)   /* get RELA pointer in r9 */
b   12f
-11:addis   r8,r8,(-RELACOUNT)@ha
-   cmpwi   r8,RELACOUNT@l
+11:cmpwi   r8,RELASZ
+   bne .Lcheck_for_relaent
+   lwz r0,4(r12)   /* get RELASZ value in r0 */
+   b   12f
+.Lcheck_for_relaent:
+   cmpwi   r8,RELAENT
bne 12f
-   lwz r0,4(r12)   /* get RELACOUNT value in r0 */
+   lwz r14,4(r12)  /* get RELAENT value in r14 */
 12:addir12,r12,8
b   9b
 
/* The relocation section contains a list of relocations.
 * We now do the R_PPC_RELATIVE ones, which point to words
-* which need to be initialized with addend + offset.
-* The R_PPC_RELATIVE ones come first and there are RELACOUNT
-* of them. */
+* which need to be initialized with addend + offset */
 10:/* skip relocation if we don't have both */
cmpwi   r0,0
beq 3f
cmpwi   r9,0
beq 3f
+   cmpwi   r14,0
+   beq 3f
 
add r9,r9,r11   /* Relocate RELA pointer */
+   divwu   r0,r0,r14   /* RELASZ / RELAENT */
mtctr   r0
 2: lbz r0,4+3(r9)  /* ELF32_R_INFO(reloc->r_info) */
cmpwi   r0,22   /* R_PPC_RELATIVE */
-   bne 3f
+   bne .Lnext
lwz r12,0(r9)   /* reloc->r_offset */
lwz r0,8(r9)/* reloc->r_addend */
add r0,r0,r11
stwxr0,r11,r12
-   addir9,r9,12
+.Lnext:add r9,r9,r14
bdnz2b
 
/* Do a cache flush for our text, in case the loader didn't */
@@ -160,32 +166,39 @@ p_base:   mflrr10 /* r10 now points to 
runtime addr of p_base */
bne 10f
ld  r13,8(r11)   /* get RELA pointer in r13 */
b   11f
-10:addis   r12,r12,(-RELACOUNT)@ha
-   cmpdi   r12,RELACOUNT@l
-   bne 11f
-   ld  r8,8(r11)   /* get RELACOUNT value in r8 */
+10:cmpwi   r12,RELASZ
+   bne .Lcheck_for_relaent
+   lwz r8,8(r11)   /* get RELASZ pointer in r8 */
+   b   11f
+.Lcheck_for_relaent:
+   cmpwi   r12,RELAENT
+   bne 11f
+   lwz r14,8(r11)  /* get RELAENT pointer in r14 */
 11:addir11,r11,16
b   9b
 12:
-   cmpdi   r13,0/* check we have both RELA and RELACOUNT */
+   cmpdi   r13,0/* check we have both RELA, RELASZ, RELAENT*/
cmpdi   cr1,r8,0
beq 3f
beq cr1,3f
+   cmpdi   r14,0
+   beq 3f
 
/* Calcuate the runtime offset. */
subfr13,r13,r9
 
/* Run through the list of relocations and process the
 * R_PPC64_RELATIVE ones. */
+   divdr8,r8,r14   /* RELASZ / RELAENT */
mtctr   r8
 13:ld  r0,8(r9)/* ELF64_R_TYPE(reloc->r_info) */
cmpdi   r0,22   /* R_PPC64_RELATIVE */
-   bne 3f
+   bne .Lnext
ld  r12,0(r9)/* reloc->r_offset */
ld  r0,16(r9)   /* reloc->r_addend */
add r0,r0,r13
stdxr0,r13,r12
-   addir9,r9,24
+.Lnext:add r9,r9,r14
bdnz13b
 
/* 

Re: [PATCH v2 1/2] powerpc/powernv: Get L1D flush requirements from device-tree

[Russell Currey]

On Tue, 2022-04-05 at 02:49 +, Joel Stanley wrote:

> I booted both patches in this series on a power10 powernv machine,
> applied on top of v5.18-rc1:
> 
> $ dmesg |grep -i flush
> [    0.00] rfi-flush: fallback displacement flush available
> [    0.00] rfi-flush: patched 12 locations (no flush)
> [    0.00] count-cache-flush: flush disabled.
> [    0.00] link-stack-flush: flush disabled.

In this case you'd be looking for stf-barrier, uaccess-flush and entry-
flush so this doesn't tell us anything.  This must have been from a
no_spectrev2 boot with count cache and link stack flushes disabled.

> 
> $ grep . /sys/devices/system/cpu/vulnerabilities/*
> /sys/devices/system/cpu/vulnerabilities/itlb_multihit:Not affected
> /sys/devices/system/cpu/vulnerabilities/l1tf:Not affected
> /sys/devices/system/cpu/vulnerabilities/mds:Not affected
> /sys/devices/system/cpu/vulnerabilities/meltdown:Not affected
> /sys/devices/system/cpu/vulnerabilities/spec_store_bypass:Not
> affected
> /sys/devices/system/cpu/vulnerabilities/spectre_v1:Mitigation: __user
> pointer sanitization, ori31 speculation barrier enabled
> /sys/devices/system/cpu/vulnerabilities/spectre_v2:Mitigation:
> Software count cache flush (hardware accelerated), Software link
> stack
> flush
> /sys/devices/system/cpu/vulnerabilities/srbds:Not affected
> /sys/devices/system/cpu/vulnerabilities/tsx_async_abort:Not affected
> 
> Does that match what we expect?

This is as expected for P10, though clearly from a different boot to
the above :)

- Russell

> 
> Cheers,
> 
> Joel

rcu_sched self-detected stall on CPU

[Miguel Ojeda]

Hi PPC/RCU,

While merging v5.18-rc1 changes I noticed our CI PPC runs broke. I
reproduced the problem in v5.18-rc1 as well as next-20220405, under
both QEMU 4.2.1 and 6.1.0, with `-smp 2`; but I cannot reproduce it in
v5.17 from a few tries.

Sadly, the problem is not deterministic although it is not too hard to
reproduce (1 out of 5?). Please see attached config and QEMU output.

Cheers,
Miguel


qemu
Description: Binary data


config
Description: Binary data

Re: cleanup swiotlb initialization v8

[Boris Ostrovsky]

On 4/4/22 1:05 AM, Christoph Hellwig wrote:

Hi all,

this series tries to clean up the swiotlb initialization, including
that of swiotlb-xen.  To get there is also removes the x86 iommu table
infrastructure that massively obsfucates the initialization path.

Git tree:

 git://git.infradead.org/users/hch/misc.git swiotlb-init-cleanup

Gitweb:

 
http://git.infradead.org/users/hch/misc.git/shortlog/refs/heads/swiotlb-init-cleanup





Tested-by: Boris Ostrovsky 

Re: [PATCH] ASoC: fsl_sai: fix 1:1 bclk:mclk ratio support

[Sascha Hauer]

On Tue, Apr 05, 2022 at 05:57:31PM +0200, Ahmad Fatoum wrote:
> Refactoring in commit a50b7926d015 ("ASoC: fsl_sai: implement 1:1
> bclk:mclk ratio support") led to the bypass never happening
> as (ratio = 1) was caught in the existing if (ratio & 1) continue;
> check. The correct check sequence instead is:
> 
>  - skip all ratios lower than one and higher than 512
>  - skip all odd ratios except for 1:1
>  - skip 1:1 ratio if and only if !support_1_1_ratio
> 
> And for all others, calculate the appropriate divider. Adjust the
> code to facilitate this.
> 
> Fixes: a50b7926d015 ("ASoC: fsl_sai: implement 1:1 bclk:mclk ratio support")
> Signed-off-by: Ahmad Fatoum 

Reviewed-by: Sascha Hauer 

Sascha

> ---
>  sound/soc/fsl/fsl_sai.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
> index a992d51568cc..50c377f16097 100644
> --- a/sound/soc/fsl/fsl_sai.c
> +++ b/sound/soc/fsl/fsl_sai.c
> @@ -372,7 +372,7 @@ static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool 
> tx, u32 freq)
>   continue;
>   if (ratio == 1 && !support_1_1_ratio)
>   continue;
> - else if (ratio & 1)
> + if ((ratio & 1) && ratio > 1)
>   continue;
>  
>   diff = abs((long)clk_rate - ratio * freq);
> -- 
> 2.30.2
> 
> 

-- 
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31137 Hildesheim, Germany  | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |

Re: [PATCH] pci: hotplug: Prepare cleanup of powerpc's asm/prom.h

[Bjorn Helgaas]

On Sat, Apr 02, 2022 at 12:11:56PM +0200, Christophe Leroy wrote:
> powerpc's asm/prom.h brings some headers that it doesn't
> need itself.
> 
> In order to clean it up, first add missing headers in
> users of asm/prom.h
> 
> Signed-off-by: Christophe Leroy 

I tidied the subject line to match previous history and applied to
pci/hotplug for v5.19, thanks!

> ---
>  drivers/pci/hotplug/pnv_php.c   | 1 +
>  drivers/pci/hotplug/rpadlpar_core.c | 1 +
>  drivers/pci/hotplug/rpaphp_core.c   | 2 ++
>  drivers/pci/hotplug/rpaphp_pci.c| 1 +
>  drivers/pci/hotplug/rpaphp_slot.c   | 1 +
>  5 files changed, 6 insertions(+)
> 
> diff --git a/drivers/pci/hotplug/pnv_php.c b/drivers/pci/hotplug/pnv_php.c
> index f4c2e6e01be0..881d420637bf 100644
> --- a/drivers/pci/hotplug/pnv_php.c
> +++ b/drivers/pci/hotplug/pnv_php.c
> @@ -9,6 +9,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include 
>  #include 
> diff --git a/drivers/pci/hotplug/rpadlpar_core.c 
> b/drivers/pci/hotplug/rpadlpar_core.c
> index e6991ff67526..980bb3afd092 100644
> --- a/drivers/pci/hotplug/rpadlpar_core.c
> +++ b/drivers/pci/hotplug/rpadlpar_core.c
> @@ -15,6 +15,7 @@
>  
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> diff --git a/drivers/pci/hotplug/rpaphp_core.c 
> b/drivers/pci/hotplug/rpaphp_core.c
> index 9887c9de08c3..491986197c47 100644
> --- a/drivers/pci/hotplug/rpaphp_core.c
> +++ b/drivers/pci/hotplug/rpaphp_core.c
> @@ -11,6 +11,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -20,6 +21,7 @@
>  #include/* for eeh_add_device() */
>  #include /* rtas_call */
>  #include   /* for pci_controller */
> +#include 
>  #include "../pci.h"  /* for pci_add_new_bus */
>   /* and pci_do_scan_bus */
>  #include "rpaphp.h"
> diff --git a/drivers/pci/hotplug/rpaphp_pci.c 
> b/drivers/pci/hotplug/rpaphp_pci.c
> index c380bdacd146..630f77057c23 100644
> --- a/drivers/pci/hotplug/rpaphp_pci.c
> +++ b/drivers/pci/hotplug/rpaphp_pci.c
> @@ -8,6 +8,7 @@
>   * Send feedback to 
>   *
>   */
> +#include 
>  #include 
>  #include 
>  
> diff --git a/drivers/pci/hotplug/rpaphp_slot.c 
> b/drivers/pci/hotplug/rpaphp_slot.c
> index 93b4a945c55d..779eab12e981 100644
> --- a/drivers/pci/hotplug/rpaphp_slot.c
> +++ b/drivers/pci/hotplug/rpaphp_slot.c
> @@ -11,6 +11,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> -- 
> 2.35.1
> 

[PATCH] ASoC: fsl_sai: fix 1:1 bclk:mclk ratio support

[Ahmad Fatoum]

Refactoring in commit a50b7926d015 ("ASoC: fsl_sai: implement 1:1
bclk:mclk ratio support") led to the bypass never happening
as (ratio = 1) was caught in the existing if (ratio & 1) continue;
check. The correct check sequence instead is:

 - skip all ratios lower than one and higher than 512
 - skip all odd ratios except for 1:1
 - skip 1:1 ratio if and only if !support_1_1_ratio

And for all others, calculate the appropriate divider. Adjust the
code to facilitate this.

Fixes: a50b7926d015 ("ASoC: fsl_sai: implement 1:1 bclk:mclk ratio support")
Signed-off-by: Ahmad Fatoum 
---
 sound/soc/fsl/fsl_sai.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index a992d51568cc..50c377f16097 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -372,7 +372,7 @@ static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool 
tx, u32 freq)
continue;
if (ratio == 1 && !support_1_1_ratio)
continue;
-   else if (ratio & 1)
+   if ((ratio & 1) && ratio > 1)
continue;
 
diff = abs((long)clk_rate - ratio * freq);
-- 
2.30.2

Re: [PATCH] powerpc/pseries/vas: use default_groups in kobj_type

[Greg Kroah-Hartman]

On Thu, Mar 31, 2022 at 11:39:45PM +1100, Michael Ellerman wrote:
> Greg Kroah-Hartman  writes:
> > There are currently 2 ways to create a set of sysfs files for a
> > kobj_type, through the default_attrs field, and the default_groups
> > field.  Move the pseries vas sysfs code to use default_groups field
> > which has been the preferred way since aa30f47cf666 ("kobject: Add
> > support for default attribute groups to kobj_type") so that we can soon
> > get rid of the obsolete default_attrs field.
> >
> > Cc: Michael Ellerman 
> > Cc: Benjamin Herrenschmidt 
> > Cc: Paul Mackerras 
> > Cc: Haren Myneni 
> > Cc: Nicholas Piggin 
> > Cc: linuxppc-dev@lists.ozlabs.org
> > Cc: linux-ker...@vger.kernel.org
> > Signed-off-by: Greg Kroah-Hartman 
> > ---
> >
> > Note, I would like to take this through my driver-core tree for 5.18-rc2
> > as this is the last hold-out of the default_attrs field.  It "snuck" in
> > as new code for 5.18-rc1, any objection to me taking it?
> 
> No objection, please take it via your tree.

Thanks, now queued up.

greg k-h

[PATCH 5/5] powerpc/8xx: Use kmalloced data structure instead of global static

[Christophe Leroy]

Use a kmalloced data structure to store interrupt controller internal
data instead of static global variables.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/platforms/8xx/cpm1-ic.c | 48 +---
 1 file changed, 30 insertions(+), 18 deletions(-)

diff --git a/arch/powerpc/platforms/8xx/cpm1-ic.c 
b/arch/powerpc/platforms/8xx/cpm1-ic.c
index 6f9765597a6d..a18fc7c99f83 100644
--- a/arch/powerpc/platforms/8xx/cpm1-ic.c
+++ b/arch/powerpc/platforms/8xx/cpm1-ic.c
@@ -10,29 +10,33 @@
 #include 
 #include 
 
-static cpic8xx_t __iomem *cpic_reg;
-
-static struct irq_domain *cpm_pic_host;
+struct cpm_pic_data {
+   cpic8xx_t __iomem *reg;
+   struct irq_domain *host;
+};
 
 static void cpm_mask_irq(struct irq_data *d)
 {
+   struct cpm_pic_data *data = irq_data_get_irq_chip_data(d);
unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
 
-   clrbits32(_reg->cpic_cimr, (1 << cpm_vec));
+   clrbits32(>reg->cpic_cimr, (1 << cpm_vec));
 }
 
 static void cpm_unmask_irq(struct irq_data *d)
 {
+   struct cpm_pic_data *data = irq_data_get_irq_chip_data(d);
unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
 
-   setbits32(_reg->cpic_cimr, (1 << cpm_vec));
+   setbits32(>reg->cpic_cimr, (1 << cpm_vec));
 }
 
 static void cpm_end_irq(struct irq_data *d)
 {
+   struct cpm_pic_data *data = irq_data_get_irq_chip_data(d);
unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
 
-   out_be32(_reg->cpic_cisr, (1 << cpm_vec));
+   out_be32(>reg->cpic_cisr, (1 << cpm_vec));
 }
 
 static struct irq_chip cpm_pic = {
@@ -42,29 +46,31 @@ static struct irq_chip cpm_pic = {
.irq_eoi = cpm_end_irq,
 };
 
-static int cpm_get_irq(void)
+static int cpm_get_irq(struct irq_desc *desc)
 {
+   struct cpm_pic_data *data = irq_desc_get_handler_data(desc);
int cpm_vec;
 
/*
 * Get the vector by setting the ACK bit and then reading
 * the register.
 */
-   out_be16(_reg->cpic_civr, 1);
-   cpm_vec = in_be16(_reg->cpic_civr);
+   out_be16(>reg->cpic_civr, 1);
+   cpm_vec = in_be16(>reg->cpic_civr);
cpm_vec >>= 11;
 
-   return irq_linear_revmap(cpm_pic_host, cpm_vec);
+   return irq_linear_revmap(data->host, cpm_vec);
 }
 
 static void cpm_cascade(struct irq_desc *desc)
 {
-   generic_handle_irq(cpm_get_irq());
+   generic_handle_irq(cpm_get_irq(desc));
 }
 
 static int cpm_pic_host_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
 {
+   irq_set_chip_data(virq, h->host_data);
irq_set_status_flags(virq, IRQ_LEVEL);
irq_set_chip_and_handler(virq, _pic, handle_fasteoi_irq);
return 0;
@@ -79,13 +85,18 @@ static int cpm_pic_probe(struct platform_device *pdev)
struct device *dev = >dev;
struct resource *res;
int irq;
+   struct cpm_pic_data *data;
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -ENODEV;
 
-   cpic_reg = devm_ioremap(dev, res->start, resource_size(res));
-   if (!cpic_reg)
+   data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
+   if (!data)
+   return -ENOMEM;
+
+   data->reg = devm_ioremap(dev, res->start, resource_size(res));
+   if (!data->reg)
return -ENODEV;
 
irq = platform_get_irq(pdev, 0);
@@ -93,19 +104,20 @@ static int cpm_pic_probe(struct platform_device *pdev)
return irq;
 
/* Initialize the CPM interrupt controller. */
-   out_be32(_reg->cpic_cicr,
+   out_be32(>reg->cpic_cicr,
 (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | 
CICR_SCA_SCC1) |
 ((virq_to_hw(irq) / 2) << 13) | CICR_HP_MASK);
 
-   out_be32(_reg->cpic_cimr, 0);
+   out_be32(>reg->cpic_cimr, 0);
 
-   cpm_pic_host = irq_domain_add_linear(dev->of_node, 64, 
_pic_host_ops, NULL);
-   if (!cpm_pic_host)
+   data->host = irq_domain_add_linear(dev->of_node, 64, _pic_host_ops, 
data);
+   if (!data->host)
return -ENODEV;
 
+   irq_set_handler_data(irq, data);
irq_set_chained_handler(irq, cpm_cascade);
 
-   setbits32(_reg->cpic_cicr, CICR_IEN);
+   setbits32(>reg->cpic_cicr, CICR_IEN);
 
return 0;
 }
-- 
2.35.1

[PATCH 3/5] powerpc/8xx: Convert CPM1 interrupt controller to platform_device

[Christophe Leroy]

In the same logic as commit be7ecbd240b2 ("soc: fsl: qe: convert QE
interrupt controller to platform_device"), convert CPM1 interrupt
controller to platform_device.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/platforms/8xx/cpm1-ic.c| 90 ++---
 arch/powerpc/platforms/8xx/m8xx_setup.c | 14 
 arch/powerpc/platforms/8xx/pic.c|  2 -
 3 files changed, 50 insertions(+), 56 deletions(-)

diff --git a/arch/powerpc/platforms/8xx/cpm1-ic.c 
b/arch/powerpc/platforms/8xx/cpm1-ic.c
index d22b4fc2d4cf..6f9765597a6d 100644
--- a/arch/powerpc/platforms/8xx/cpm1-ic.c
+++ b/arch/powerpc/platforms/8xx/cpm1-ic.c
@@ -7,7 +7,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
@@ -43,7 +42,7 @@ static struct irq_chip cpm_pic = {
.irq_eoi = cpm_end_irq,
 };
 
-int cpm_get_irq(void)
+static int cpm_get_irq(void)
 {
int cpm_vec;
 
@@ -58,11 +57,14 @@ int cpm_get_irq(void)
return irq_linear_revmap(cpm_pic_host, cpm_vec);
 }
 
+static void cpm_cascade(struct irq_desc *desc)
+{
+   generic_handle_irq(cpm_get_irq());
+}
+
 static int cpm_pic_host_map(struct irq_domain *h, unsigned int virq,
irq_hw_number_t hw)
 {
-   pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw);
-
irq_set_status_flags(virq, IRQ_LEVEL);
irq_set_chip_and_handler(virq, _pic, handle_fasteoi_irq);
return 0;
@@ -72,56 +74,64 @@ static const struct irq_domain_ops cpm_pic_host_ops = {
.map = cpm_pic_host_map,
 };
 
-unsigned int __init cpm_pic_init(void)
+static int cpm_pic_probe(struct platform_device *pdev)
 {
-   struct device_node *np = NULL;
-   struct resource res;
-   unsigned int sirq = 0, hwirq;
-   int ret;
-
-   pr_debug("cpm_pic_init\n");
-
-   np = of_find_compatible_node(NULL, NULL, "fsl,cpm1-pic");
-   if (np == NULL)
-   np = of_find_compatible_node(NULL, "cpm-pic", "CPM");
-   if (np == NULL) {
-   printk(KERN_ERR "CPM PIC init: can not find cpm-pic node\n");
-   return sirq;
-   }
+   struct device *dev = >dev;
+   struct resource *res;
+   int irq;
 
-   ret = of_address_to_resource(np, 0, );
-   if (ret)
-   goto end;
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   if (!res)
+   return -ENODEV;
 
-   cpic_reg = ioremap(res.start, resource_size());
-   if (cpic_reg == NULL)
-   goto end;
+   cpic_reg = devm_ioremap(dev, res->start, resource_size(res));
+   if (!cpic_reg)
+   return -ENODEV;
 
-   sirq = irq_of_parse_and_map(np, 0);
-   if (!sirq)
-   goto end;
+   irq = platform_get_irq(pdev, 0);
+   if (irq < 0)
+   return irq;
 
/* Initialize the CPM interrupt controller. */
-   hwirq = (unsigned int)virq_to_hw(sirq);
out_be32(_reg->cpic_cicr,
-   (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
-   ((hwirq/2) << 13) | CICR_HP_MASK);
+(CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | 
CICR_SCA_SCC1) |
+((virq_to_hw(irq) / 2) << 13) | CICR_HP_MASK);
 
out_be32(_reg->cpic_cimr, 0);
 
-   cpm_pic_host = irq_domain_add_linear(np, 64, _pic_host_ops, NULL);
-   if (cpm_pic_host == NULL) {
-   printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
-   sirq = 0;
-   goto end;
-   }
+   cpm_pic_host = irq_domain_add_linear(dev->of_node, 64, 
_pic_host_ops, NULL);
+   if (!cpm_pic_host)
+   return -ENODEV;
+
+   irq_set_chained_handler(irq, cpm_cascade);
 
setbits32(_reg->cpic_cicr, CICR_IEN);
 
-end:
-   of_node_put(np);
-   return sirq;
+   return 0;
+}
+
+static const struct of_device_id cpm_pic_match[] = {
+   {
+   .compatible = "fsl,cpm1-pic",
+   }, {
+   .type = "cpm-pic",
+   .compatible = "CPM",
+   }, {},
+};
+
+static struct platform_driver cpm_pic_driver = {
+   .driver = {
+   .name   = "cpm-pic",
+   .of_match_table = cpm_pic_match,
+   },
+   .probe  = cpm_pic_probe,
+};
+
+static int __init cpm_pic_init(void)
+{
+   return platform_driver_register(_pic_driver);
 }
+arch_initcall(cpm_pic_init);
 
 /*
  * The CPM can generate the error interrupt when there is a race condition
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c 
b/arch/powerpc/platforms/8xx/m8xx_setup.c
index df4d57d07f9a..a03ba0ad7312 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -28,9 +28,6 @@
 
 #include "mpc8xx.h"
 
-extern int cpm_pic_init(void);
-extern int cpm_get_irq(void);
-
 /* A place holder for time base interrupts, if they are ever enabled. */
 static irqreturn_t timebase_interrupt(int irq, void *dev)
 {
@@ -208,11 +205,6 @@ void __noreturn 

[PATCH 1/5] powerpc/8xx: Move CPM interrupt controller into a dedicated file

[Christophe Leroy]

CPM interrupt controller is quite standalone. Move it into a
dedicated file. It will help for next step which will change
it to a platform driver.

This is pure code move, checkpatch report is ignored at this point,
except one parenthesis alignment which would remain at the end of
the series. All other points fly away with following patches.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/platforms/8xx/Makefile  |   2 +-
 arch/powerpc/platforms/8xx/cpm1-ic.c | 151 +++
 arch/powerpc/platforms/8xx/cpm1.c| 139 
 3 files changed, 152 insertions(+), 140 deletions(-)
 create mode 100644 arch/powerpc/platforms/8xx/cpm1-ic.c

diff --git a/arch/powerpc/platforms/8xx/Makefile 
b/arch/powerpc/platforms/8xx/Makefile
index 27a7c6f828e0..5a098f7d5d31 100644
--- a/arch/powerpc/platforms/8xx/Makefile
+++ b/arch/powerpc/platforms/8xx/Makefile
@@ -3,7 +3,7 @@
 # Makefile for the PowerPC 8xx linux kernel.
 #
 obj-y  += m8xx_setup.o machine_check.o pic.o
-obj-$(CONFIG_CPM1) += cpm1.o
+obj-$(CONFIG_CPM1) += cpm1.o cpm1-ic.o
 obj-$(CONFIG_UCODE_PATCH)  += micropatch.o
 obj-$(CONFIG_MPC885ADS)   += mpc885ads_setup.o
 obj-$(CONFIG_MPC86XADS)   += mpc86xads_setup.o
diff --git a/arch/powerpc/platforms/8xx/cpm1-ic.c 
b/arch/powerpc/platforms/8xx/cpm1-ic.c
new file mode 100644
index ..d5cf0ee7c07d
--- /dev/null
+++ b/arch/powerpc/platforms/8xx/cpm1-ic.c
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Interrupt controller for the
+ * Communication Processor Module.
+ * Copyright (c) 1997 Dan error_act (dma...@jlc.net)
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static cpic8xx_t __iomem *cpic_reg;
+
+static struct irq_domain *cpm_pic_host;
+
+static void cpm_mask_irq(struct irq_data *d)
+{
+   unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
+
+   clrbits32(_reg->cpic_cimr, (1 << cpm_vec));
+}
+
+static void cpm_unmask_irq(struct irq_data *d)
+{
+   unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
+
+   setbits32(_reg->cpic_cimr, (1 << cpm_vec));
+}
+
+static void cpm_end_irq(struct irq_data *d)
+{
+   unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
+
+   out_be32(_reg->cpic_cisr, (1 << cpm_vec));
+}
+
+static struct irq_chip cpm_pic = {
+   .name = "CPM PIC",
+   .irq_mask = cpm_mask_irq,
+   .irq_unmask = cpm_unmask_irq,
+   .irq_eoi = cpm_end_irq,
+};
+
+int cpm_get_irq(void)
+{
+   int cpm_vec;
+
+   /*
+* Get the vector by setting the ACK bit and then reading
+* the register.
+*/
+   out_be16(_reg->cpic_civr, 1);
+   cpm_vec = in_be16(_reg->cpic_civr);
+   cpm_vec >>= 11;
+
+   return irq_linear_revmap(cpm_pic_host, cpm_vec);
+}
+
+static int cpm_pic_host_map(struct irq_domain *h, unsigned int virq,
+   irq_hw_number_t hw)
+{
+   pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw);
+
+   irq_set_status_flags(virq, IRQ_LEVEL);
+   irq_set_chip_and_handler(virq, _pic, handle_fasteoi_irq);
+   return 0;
+}
+
+/*
+ * The CPM can generate the error interrupt when there is a race condition
+ * between generating and masking interrupts.  All we have to do is ACK it
+ * and return.  This is a no-op function so we don't need any special
+ * tests in the interrupt handler.
+ */
+static irqreturn_t cpm_error_interrupt(int irq, void *dev)
+{
+   return IRQ_HANDLED;
+}
+
+static const struct irq_domain_ops cpm_pic_host_ops = {
+   .map = cpm_pic_host_map,
+};
+
+unsigned int __init cpm_pic_init(void)
+{
+   struct device_node *np = NULL;
+   struct resource res;
+   unsigned int sirq = 0, hwirq, eirq;
+   int ret;
+
+   pr_debug("cpm_pic_init\n");
+
+   np = of_find_compatible_node(NULL, NULL, "fsl,cpm1-pic");
+   if (np == NULL)
+   np = of_find_compatible_node(NULL, "cpm-pic", "CPM");
+   if (np == NULL) {
+   printk(KERN_ERR "CPM PIC init: can not find cpm-pic node\n");
+   return sirq;
+   }
+
+   ret = of_address_to_resource(np, 0, );
+   if (ret)
+   goto end;
+
+   cpic_reg = ioremap(res.start, resource_size());
+   if (cpic_reg == NULL)
+   goto end;
+
+   sirq = irq_of_parse_and_map(np, 0);
+   if (!sirq)
+   goto end;
+
+   /* Initialize the CPM interrupt controller. */
+   hwirq = (unsigned int)virq_to_hw(sirq);
+   out_be32(_reg->cpic_cicr,
+   (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
+   ((hwirq/2) << 13) | CICR_HP_MASK);
+
+   out_be32(_reg->cpic_cimr, 0);
+
+   cpm_pic_host = irq_domain_add_linear(np, 64, _pic_host_ops, NULL);
+   if (cpm_pic_host == NULL) {
+   printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
+   sirq = 0;
+   goto end;
+   }
+
+   /* Install our own error 

[PATCH 2/5] powerpc/8xx: Convert CPM1 error interrupt handler to platform driver

[Christophe Leroy]

Add CPM error interrupt as a standalone platform driver,
to simplify the init of CPM interrupt handler.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/platforms/8xx/cpm1-ic.c | 73 +---
 1 file changed, 44 insertions(+), 29 deletions(-)

diff --git a/arch/powerpc/platforms/8xx/cpm1-ic.c 
b/arch/powerpc/platforms/8xx/cpm1-ic.c
index d5cf0ee7c07d..d22b4fc2d4cf 100644
--- a/arch/powerpc/platforms/8xx/cpm1-ic.c
+++ b/arch/powerpc/platforms/8xx/cpm1-ic.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 static cpic8xx_t __iomem *cpic_reg;
@@ -67,17 +68,6 @@ static int cpm_pic_host_map(struct irq_domain *h, unsigned 
int virq,
return 0;
 }
 
-/*
- * The CPM can generate the error interrupt when there is a race condition
- * between generating and masking interrupts.  All we have to do is ACK it
- * and return.  This is a no-op function so we don't need any special
- * tests in the interrupt handler.
- */
-static irqreturn_t cpm_error_interrupt(int irq, void *dev)
-{
-   return IRQ_HANDLED;
-}
-
 static const struct irq_domain_ops cpm_pic_host_ops = {
.map = cpm_pic_host_map,
 };
@@ -86,7 +76,7 @@ unsigned int __init cpm_pic_init(void)
 {
struct device_node *np = NULL;
struct resource res;
-   unsigned int sirq = 0, hwirq, eirq;
+   unsigned int sirq = 0, hwirq;
int ret;
 
pr_debug("cpm_pic_init\n");
@@ -126,26 +116,51 @@ unsigned int __init cpm_pic_init(void)
goto end;
}
 
-   /* Install our own error handler. */
-   np = of_find_compatible_node(NULL, NULL, "fsl,cpm1");
-   if (np == NULL)
-   np = of_find_node_by_type(NULL, "cpm");
-   if (np == NULL) {
-   printk(KERN_ERR "CPM PIC init: can not find cpm node\n");
-   goto end;
-   }
-
-   eirq = irq_of_parse_and_map(np, 0);
-   if (!eirq)
-   goto end;
-
-   if (request_irq(eirq, cpm_error_interrupt, IRQF_NO_THREAD, "error",
-   NULL))
-   printk(KERN_ERR "Could not allocate CPM error IRQ!");
-
setbits32(_reg->cpic_cicr, CICR_IEN);
 
 end:
of_node_put(np);
return sirq;
 }
+
+/*
+ * The CPM can generate the error interrupt when there is a race condition
+ * between generating and masking interrupts.  All we have to do is ACK it
+ * and return.  This is a no-op function so we don't need any special
+ * tests in the interrupt handler.
+ */
+static irqreturn_t cpm_error_interrupt(int irq, void *dev)
+{
+   return IRQ_HANDLED;
+}
+
+static int cpm_error_probe(struct platform_device *pdev)
+{
+   int irq;
+
+   irq = platform_get_irq(pdev, 0);
+   if (irq < 0)
+   return irq;
+
+   return request_irq(irq, cpm_error_interrupt, IRQF_NO_THREAD, "error", 
NULL);
+}
+
+static const struct of_device_id cpm_error_ids[] = {
+   { .compatible = "fsl,cpm1" },
+   { .type = "cpm" },
+   {},
+};
+
+static struct platform_driver cpm_error_driver = {
+   .driver = {
+   .name   = "cpm-error",
+   .of_match_table = cpm_error_ids,
+   },
+   .probe  = cpm_error_probe,
+};
+
+static int __init cpm_error_init(void)
+{
+   return platform_driver_register(_error_driver);
+}
+subsys_initcall(cpm_error_init);
-- 
2.35.1

[PATCH 4/5] powerpc/8xx: Remove mpc8xx_pics_init()

[Christophe Leroy]

mpc8xx_pics_init() is now only a trampoline to
mpc8xx_pic_init().

Remove mpc8xx_pics_init() and use mpc8xx_pic_init()
directly.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/platforms/8xx/adder875.c|  2 +-
 arch/powerpc/platforms/8xx/ep88xc.c  |  2 +-
 arch/powerpc/platforms/8xx/m8xx_setup.c  | 14 --
 arch/powerpc/platforms/8xx/mpc86xads_setup.c |  2 +-
 arch/powerpc/platforms/8xx/mpc885ads_setup.c |  2 +-
 arch/powerpc/platforms/8xx/mpc8xx.h  |  1 -
 arch/powerpc/platforms/8xx/tqm8xx_setup.c|  2 +-
 7 files changed, 5 insertions(+), 20 deletions(-)

diff --git a/arch/powerpc/platforms/8xx/adder875.c 
b/arch/powerpc/platforms/8xx/adder875.c
index 651486acb896..9b5c0c181fa3 100644
--- a/arch/powerpc/platforms/8xx/adder875.c
+++ b/arch/powerpc/platforms/8xx/adder875.c
@@ -104,7 +104,7 @@ define_machine(adder875) {
.name = "Adder MPC875",
.probe = adder875_probe,
.setup_arch = adder875_setup,
-   .init_IRQ = mpc8xx_pics_init,
+   .init_IRQ = mpc8xx_pic_init,
.get_irq = mpc8xx_get_irq,
.restart = mpc8xx_restart,
.calibrate_decr = generic_calibrate_decr,
diff --git a/arch/powerpc/platforms/8xx/ep88xc.c 
b/arch/powerpc/platforms/8xx/ep88xc.c
index ebcf34a14789..7526ef88bd33 100644
--- a/arch/powerpc/platforms/8xx/ep88xc.c
+++ b/arch/powerpc/platforms/8xx/ep88xc.c
@@ -166,7 +166,7 @@ define_machine(ep88xc) {
.name = "Embedded Planet EP88xC",
.probe = ep88xc_probe,
.setup_arch = ep88xc_setup_arch,
-   .init_IRQ = mpc8xx_pics_init,
+   .init_IRQ = mpc8xx_pic_init,
.get_irq= mpc8xx_get_irq,
.restart = mpc8xx_restart,
.calibrate_decr = mpc8xx_calibrate_decr,
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c 
b/arch/powerpc/platforms/8xx/m8xx_setup.c
index a03ba0ad7312..15a09b15aaa4 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -204,17 +204,3 @@ void __noreturn mpc8xx_restart(char *cmd)
in_8(_r->res[0]);
panic("Restart failed\n");
 }
-
-/* Initialize the internal interrupt controllers.  The number of
- * interrupts supported can vary with the processor type, and the
- * 82xx family can have up to 64.
- * External interrupts can be either edge or level triggered, and
- * need to be initialized by the appropriate driver.
- */
-void __init mpc8xx_pics_init(void)
-{
-   if (mpc8xx_pic_init()) {
-   printk(KERN_ERR "Failed interrupt 8xx controller  
initialization\n");
-   return;
-   }
-}
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c 
b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
index 8d02f5ff4481..a82d69e8bb01 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
@@ -140,7 +140,7 @@ define_machine(mpc86x_ads) {
.name   = "MPC86x ADS",
.probe  = mpc86xads_probe,
.setup_arch = mpc86xads_setup_arch,
-   .init_IRQ   = mpc8xx_pics_init,
+   .init_IRQ   = mpc8xx_pic_init,
.get_irq= mpc8xx_get_irq,
.restart= mpc8xx_restart,
.calibrate_decr = mpc8xx_calibrate_decr,
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c 
b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index a0c83c1905c6..e02290175a19 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -216,7 +216,7 @@ define_machine(mpc885_ads) {
.name   = "Freescale MPC885 ADS",
.probe  = mpc885ads_probe,
.setup_arch = mpc885ads_setup_arch,
-   .init_IRQ   = mpc8xx_pics_init,
+   .init_IRQ   = mpc8xx_pic_init,
.get_irq= mpc8xx_get_irq,
.restart= mpc8xx_restart,
.calibrate_decr = mpc8xx_calibrate_decr,
diff --git a/arch/powerpc/platforms/8xx/mpc8xx.h 
b/arch/powerpc/platforms/8xx/mpc8xx.h
index 31cc2ecace42..79fae3324866 100644
--- a/arch/powerpc/platforms/8xx/mpc8xx.h
+++ b/arch/powerpc/platforms/8xx/mpc8xx.h
@@ -15,7 +15,6 @@ extern void __noreturn mpc8xx_restart(char *cmd);
 extern void mpc8xx_calibrate_decr(void);
 extern int mpc8xx_set_rtc_time(struct rtc_time *tm);
 extern void mpc8xx_get_rtc_time(struct rtc_time *tm);
-extern void mpc8xx_pics_init(void);
 extern unsigned int mpc8xx_get_irq(void);
 
 #endif /* __MPC8xx_H */
diff --git a/arch/powerpc/platforms/8xx/tqm8xx_setup.c 
b/arch/powerpc/platforms/8xx/tqm8xx_setup.c
index 4cea8b1afa44..7f1131545da1 100644
--- a/arch/powerpc/platforms/8xx/tqm8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/tqm8xx_setup.c
@@ -142,7 +142,7 @@ define_machine(tqm8xx) {
.name   = "TQM8xx",
.probe  = tqm8xx_probe,
.setup_arch = tqm8xx_setup_arch,
-   

[PATCH 5.10 425/599] tty: hvc: fix return value of __setup handler

[Greg Kroah-Hartman]

From: Randy Dunlap 

[ Upstream commit 53819a0d97aace1425bb042829e3446952a9e8a9 ]

__setup() handlers should return 1 to indicate that the boot option
has been handled or 0 to indicate that it was not handled.
Add a pr_warn() message if the option value is invalid and then
always return 1.

Link: lore.kernel.org/r/64644a2f-4a20-bab3-1e15-3b2cdd0de...@omprussia.ru
Fixes: 86b40567b917 ("tty: replace strict_strtoul() with kstrtoul()")
Cc: Jingoo Han 
Cc: Greg Kroah-Hartman 
Cc: Jiri Slaby 
Cc: Michael Ellerman 
Cc: Julian Wiedmann 
Cc: Vasily Gorbik 
Cc: linuxppc-dev@lists.ozlabs.org
Reported-by: Igor Zhbanov 
Signed-off-by: Randy Dunlap 
Link: https://lore.kernel.org/r/20220308024228.20477-1-rdun...@infradead.org
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Sasha Levin 
---
 drivers/tty/hvc/hvc_iucv.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/hvc/hvc_iucv.c b/drivers/tty/hvc/hvc_iucv.c
index 2af1e5751bd6..796fbff623f6 100644
--- a/drivers/tty/hvc/hvc_iucv.c
+++ b/drivers/tty/hvc/hvc_iucv.c
@@ -1470,7 +1470,9 @@ static int __init hvc_iucv_init(void)
  */
 static int __init hvc_iucv_config(char *val)
 {
-return kstrtoul(val, 10, _iucv_devices);
+   if (kstrtoul(val, 10, _iucv_devices))
+   pr_warn("hvc_iucv= invalid parameter value '%s'\n", val);
+   return 1;
 }
 
 
-- 
2.34.1

[PATCH 5.15 640/913] tty: hvc: fix return value of __setup handler

[Greg Kroah-Hartman]

From: Randy Dunlap 

[ Upstream commit 53819a0d97aace1425bb042829e3446952a9e8a9 ]

__setup() handlers should return 1 to indicate that the boot option
has been handled or 0 to indicate that it was not handled.
Add a pr_warn() message if the option value is invalid and then
always return 1.

Link: lore.kernel.org/r/64644a2f-4a20-bab3-1e15-3b2cdd0de...@omprussia.ru
Fixes: 86b40567b917 ("tty: replace strict_strtoul() with kstrtoul()")
Cc: Jingoo Han 
Cc: Greg Kroah-Hartman 
Cc: Jiri Slaby 
Cc: Michael Ellerman 
Cc: Julian Wiedmann 
Cc: Vasily Gorbik 
Cc: linuxppc-dev@lists.ozlabs.org
Reported-by: Igor Zhbanov 
Signed-off-by: Randy Dunlap 
Link: https://lore.kernel.org/r/20220308024228.20477-1-rdun...@infradead.org
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Sasha Levin 
---
 drivers/tty/hvc/hvc_iucv.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/hvc/hvc_iucv.c b/drivers/tty/hvc/hvc_iucv.c
index 82a76cac94de..32366caca662 100644
--- a/drivers/tty/hvc/hvc_iucv.c
+++ b/drivers/tty/hvc/hvc_iucv.c
@@ -1417,7 +1417,9 @@ static int __init hvc_iucv_init(void)
  */
 static int __init hvc_iucv_config(char *val)
 {
-return kstrtoul(val, 10, _iucv_devices);
+   if (kstrtoul(val, 10, _iucv_devices))
+   pr_warn("hvc_iucv= invalid parameter value '%s'\n", val);
+   return 1;
 }
 
 
-- 
2.34.1

[PATCH 5.16 0704/1017] tty: hvc: fix return value of __setup handler

[Greg Kroah-Hartman]

From: Randy Dunlap 

[ Upstream commit 53819a0d97aace1425bb042829e3446952a9e8a9 ]

__setup() handlers should return 1 to indicate that the boot option
has been handled or 0 to indicate that it was not handled.
Add a pr_warn() message if the option value is invalid and then
always return 1.

Link: lore.kernel.org/r/64644a2f-4a20-bab3-1e15-3b2cdd0de...@omprussia.ru
Fixes: 86b40567b917 ("tty: replace strict_strtoul() with kstrtoul()")
Cc: Jingoo Han 
Cc: Greg Kroah-Hartman 
Cc: Jiri Slaby 
Cc: Michael Ellerman 
Cc: Julian Wiedmann 
Cc: Vasily Gorbik 
Cc: linuxppc-dev@lists.ozlabs.org
Reported-by: Igor Zhbanov 
Signed-off-by: Randy Dunlap 
Link: https://lore.kernel.org/r/20220308024228.20477-1-rdun...@infradead.org
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Sasha Levin 
---
 drivers/tty/hvc/hvc_iucv.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/hvc/hvc_iucv.c b/drivers/tty/hvc/hvc_iucv.c
index 82a76cac94de..32366caca662 100644
--- a/drivers/tty/hvc/hvc_iucv.c
+++ b/drivers/tty/hvc/hvc_iucv.c
@@ -1417,7 +1417,9 @@ static int __init hvc_iucv_init(void)
  */
 static int __init hvc_iucv_config(char *val)
 {
-return kstrtoul(val, 10, _iucv_devices);
+   if (kstrtoul(val, 10, _iucv_devices))
+   pr_warn("hvc_iucv= invalid parameter value '%s'\n", val);
+   return 1;
 }
 
 
-- 
2.34.1

[PATCH 5.17 0779/1126] tty: hvc: fix return value of __setup handler

[Greg Kroah-Hartman]

From: Randy Dunlap 

[ Upstream commit 53819a0d97aace1425bb042829e3446952a9e8a9 ]

__setup() handlers should return 1 to indicate that the boot option
has been handled or 0 to indicate that it was not handled.
Add a pr_warn() message if the option value is invalid and then
always return 1.

Link: lore.kernel.org/r/64644a2f-4a20-bab3-1e15-3b2cdd0de...@omprussia.ru
Fixes: 86b40567b917 ("tty: replace strict_strtoul() with kstrtoul()")
Cc: Jingoo Han 
Cc: Greg Kroah-Hartman 
Cc: Jiri Slaby 
Cc: Michael Ellerman 
Cc: Julian Wiedmann 
Cc: Vasily Gorbik 
Cc: linuxppc-dev@lists.ozlabs.org
Reported-by: Igor Zhbanov 
Signed-off-by: Randy Dunlap 
Link: https://lore.kernel.org/r/20220308024228.20477-1-rdun...@infradead.org
Signed-off-by: Greg Kroah-Hartman 
Signed-off-by: Sasha Levin 
---
 drivers/tty/hvc/hvc_iucv.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/hvc/hvc_iucv.c b/drivers/tty/hvc/hvc_iucv.c
index 82a76cac94de..32366caca662 100644
--- a/drivers/tty/hvc/hvc_iucv.c
+++ b/drivers/tty/hvc/hvc_iucv.c
@@ -1417,7 +1417,9 @@ static int __init hvc_iucv_init(void)
  */
 static int __init hvc_iucv_config(char *val)
 {
-return kstrtoul(val, 10, _iucv_devices);
+   if (kstrtoul(val, 10, _iucv_devices))
+   pr_warn("hvc_iucv= invalid parameter value '%s'\n", val);
+   return 1;
 }
 
 
-- 
2.34.1

Re: [PATCH v2 1/2] powerpc/powernv: Get L1D flush requirements from device-tree

[Joel Stanley]

On Tue, 5 Apr 2022 at 06:13, Michael Ellerman  wrote:
>
> Joel Stanley  writes:
> > On Mon, 4 Apr 2022 at 10:15, Russell Currey  wrote:
> >>
> >> The device-tree properties no-need-l1d-flush-msr-pr-1-to-0 and
> >> no-need-l1d-flush-kernel-on-user-access are the equivalents of
> >> H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY and H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS
> >> from the H_GET_CPU_CHARACTERISTICS hcall on pseries respectively.
> >>
> >> In commit d02fa40d759f ("powerpc/powernv: Remove POWER9 PVR version
> >> check for entry and uaccess flushes") the condition for disabling the
> >> L1D flush on kernel entry and user access was changed from any non-P9
> >> CPU to only checking P7 and P8.  Without the appropriate device-tree
> >> checks for newer processors on powernv, these flushes are unnecessarily
> >> enabled on those systems.  This patch corrects this.
> >>
> >> Fixes: d02fa40d759f ("powerpc/powernv: Remove POWER9 PVR version check for 
> >> entry and uaccess flushes")
> >> Reported-by: Joel Stanley 
> >> Signed-off-by: Russell Currey 
> >
> > I booted both patches in this series on a power10 powernv machine,
> > applied on top of v5.18-rc1:
> >
> > $ dmesg |grep -i flush
> > [0.00] rfi-flush: fallback displacement flush available
> > [0.00] rfi-flush: patched 12 locations (no flush)
> > [0.00] count-cache-flush: flush disabled.
> > [0.00] link-stack-flush: flush disabled.
> >
> > $ grep . /sys/devices/system/cpu/vulnerabilities/*
> > /sys/devices/system/cpu/vulnerabilities/itlb_multihit:Not affected
> > /sys/devices/system/cpu/vulnerabilities/l1tf:Not affected
> > /sys/devices/system/cpu/vulnerabilities/mds:Not affected
> > /sys/devices/system/cpu/vulnerabilities/meltdown:Not affected
> > /sys/devices/system/cpu/vulnerabilities/spec_store_bypass:Not affected
> > /sys/devices/system/cpu/vulnerabilities/spectre_v1:Mitigation: __user
> > pointer sanitization, ori31 speculation barrier enabled
> > /sys/devices/system/cpu/vulnerabilities/spectre_v2:Mitigation:
> > Software count cache flush (hardware accelerated), Software link stack
> > flush
> > /sys/devices/system/cpu/vulnerabilities/srbds:Not affected
> > /sys/devices/system/cpu/vulnerabilities/tsx_async_abort:Not affected
> >
> > Does that match what we expect?
>
> AFAIK yes. Happy for ruscur to correct me though.
>
> Can you also try running the kernel selftests under
> tools/testing/selftests/powerpc/security/ ?

Here's the results when booted with no_spectrev2 (which I keep on
doing by accident, as this machine has it in it's nvram):

make[1]: Entering directory
'/home/joel/dev/kernels/linus/tools/testing/selftests/powerpc/security'
TAP version 13
1..5
# selftests: powerpc/security: rfi_flush
# test: rfi_flush_test
# tags: git_version:v5.18-rc1-0-g312310928417
# PASS (L1D misses with rfi_flush=0: 63101900 < 9500) [10/10 pass]
# PASS (L1D misses with rfi_flush=1: 196001003 > 19000) [10/10 pass]
# success: rfi_flush_test
ok 1 selftests: powerpc/security: rfi_flush
# selftests: powerpc/security: entry_flush
# test: entry_flush_test
# tags: git_version:v5.18-rc1-0-g312310928417
# PASS (L1D misses with entry_flush=0: 52766044 < 9500) [10/10 pass]
# PASS (L1D misses with entry_flush=1: 196082833 > 19000) [10/10 pass]
# success: entry_flush_test
ok 2 selftests: powerpc/security: entry_flush
# selftests: powerpc/security: uaccess_flush
# test: uaccess_flush_test
# tags: git_version:v5.18-rc1-0-g312310928417
# PASS (L1D misses with uaccess_flush=0: 68646267 < 9500) [10/10 pass]
# PASS (L1D misses with uaccess_flush=1: 194177355 > 19000) [10/10 pass]
# success: uaccess_flush_test
ok 3 selftests: powerpc/security: uaccess_flush
# selftests: powerpc/security: spectre_v2
# test: spectre_v2
# tags: git_version:v5.18-rc1-0-g312310928417
# sysfs reports: 'Vulnerable'
#  PM_BR_PRED_CCACHE: result  0 running/enabled 2090650862
# PM_BR_MPRED_CCACHE: result  1 running/enabled 2090648016
# Miss percent 0 %
# OK - Measured branch prediction rates match reported spectre v2 mitigation.
# success: spectre_v2
ok 4 selftests: powerpc/security: spectre_v2
# selftests: powerpc/security: mitigation-patching.sh
# Spawned threads enabling/disabling mitigations ...
# Waiting for timeout ...
# OK
ok 5 selftests: powerpc/security: mitigation-patching.sh


Here's the same thing without the command line option set:

make[1]: Entering directory
'/home/joel/dev/kernels/linus/tools/testing/selftests/powerpc/security'
TAP version 13
1..5
# selftests: powerpc/security: rfi_flush
# test: rfi_flush_test
# tags: git_version:v5.18-rc1-0-g312310928417
# PASS (L1D misses with rfi_flush=0: 47289780 < 9500) [10/10 pass]
# PASS (L1D misses with rfi_flush=1: 195001301 > 19000) [10/10 pass]
# success: rfi_flush_test
ok 1 selftests: powerpc/security: rfi_flush
# selftests: powerpc/security: entry_flush
# test: entry_flush_test
# tags: git_version:v5.18-rc1-0-g312310928417
# PASS (L1D misses with entry_flush=0: 63510274 < 9500) 

[PATCH V12 20/20] riscv: compat: Add COMPAT Kbuild skeletal support

[guoren]

From: Guo Ren 

Adds initial skeletal COMPAT Kbuild (Running 32bit U-mode on
64bit S-mode) support.
 - Setup kconfig & dummy functions for compiling.
 - Implement compat_start_thread by the way.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Arnd Bergmann 
Tested-by: Heiko Stuebner 
Cc: Palmer Dabbelt 
---
 arch/riscv/Kconfig | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 00fd9c548f26..def9798e9675 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -76,6 +76,7 @@ config RISCV
select HAVE_ARCH_KGDB if !XIP_KERNEL
select HAVE_ARCH_KGDB_QXFER_PKT
select HAVE_ARCH_MMAP_RND_BITS if MMU
+   select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT
select HAVE_ARCH_SECCOMP_FILTER
select HAVE_ARCH_TRACEHOOK
select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU
@@ -127,12 +128,18 @@ config ARCH_MMAP_RND_BITS_MIN
default 18 if 64BIT
default 8
 
+config ARCH_MMAP_RND_COMPAT_BITS_MIN
+   default 8
+
 # max bits determined by the following formula:
 #  VA_BITS - PAGE_SHIFT - 3
 config ARCH_MMAP_RND_BITS_MAX
default 24 if 64BIT # SV39 based
default 17
 
+config ARCH_MMAP_RND_COMPAT_BITS_MAX
+   default 17
+
 # set if we run in machine mode, cleared if we run in supervisor mode
 config RISCV_M_MODE
bool
@@ -394,6 +401,18 @@ config CRASH_DUMP
 
  For more details see Documentation/admin-guide/kdump/kdump.rst
 
+config COMPAT
+   bool "Kernel support for 32-bit U-mode"
+   default 64BIT
+   depends on 64BIT && MMU
+   help
+ This option enables support for a 32-bit U-mode running under a 64-bit
+ kernel at S-mode. riscv32-specific components such as system calls,
+ the user helper functions (vdso), signal rt_frame functions and the
+ ptrace interface are handled appropriately by the kernel.
+
+ If you want to execute 32-bit userspace applications, say Y.
+
 endmenu
 
 menu "Boot options"
-- 
2.25.1

[PATCH V12 19/20] riscv: compat: ptrace: Add compat_arch_ptrace implement

[guoren]

From: Guo Ren 

Now, you can use native gdb on riscv64 for rv32 app debugging.

$ uname -a
Linux buildroot 5.16.0-rc4-00036-gbef6b82fdf23-dirty #53 SMP Mon Dec 20 
23:06:53 CST 2021 riscv64 GNU/Linux
$ cat /proc/cpuinfo
processor   : 0
hart: 0
isa : rv64imafdcsuh
mmu : sv48

$ file /bin/busybox
/bin/busybox: setuid ELF 32-bit LSB shared object, UCB RISC-V, version 1 
(SYSV), dynamically linked, interpreter /lib/ld-linux-riscv32-ilp32d.so.1, for 
GNU/Linux 5.15.0, stripped
$ file /usr/bin/gdb
/usr/bin/gdb: ELF 32-bit LSB shared object, UCB RISC-V, version 1 (GNU/Linux), 
dynamically linked, interpreter /lib/ld-linux-riscv32-ilp32d.so.1, for 
GNU/Linux 5.15.0, stripped
$ /usr/bin/gdb /bin/busybox
GNU gdb (GDB) 10.2
Copyright (C) 2021 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later 
...
Reading symbols from /bin/busybox...
(No debugging symbols found in /bin/busybox)
(gdb) b main
Breakpoint 1 at 0x8ddc
(gdb) r
Starting program: /bin/busybox
Failed to read a valid object file image from memory.

Breakpoint 1, 0x555a8ddc in main ()
(gdb) i r
ra 0x77df0b74   0x77df0b74
sp 0x7fdd3d10   0x7fdd3d10
gp 0x5567e800   0x5567e800 
tp 0x77f64280   0x77f64280
t0 0x0  0
t1 0x555a6fac   1431990188
t2 0x77dd8db4   2011008436
fp 0x7fdd3e34   0x7fdd3e34
s1 0x7fdd3e34   2145205812
a0 0x   -1
a1 0x2000   8192
a2 0x7fdd3e3c   2145205820
a3 0x0  0
a4 0x7fdd3d30   2145205552
a5 0x555a8dc0   1431997888
a6 0x77f2c170   2012397936
a7 0x6a7c7a2f   1786542639
s2 0x0  0
s3 0x0  0
s4 0x555a8dc0   1431997888
s5 0x77f8a3a8   2012783528
s6 0x7fdd3e3c   2145205820
s7 0x5567cecc   1432866508
--Type  for more, q to quit, c to continue without paging--
s8 0x1  1
s9 0x0  0
s100x55634448   1432568904
s110x0  0
t3 0x77df0bb8   2011106232
t4 0x42fc   17148
t5 0x0  0
t6 0x40 64
pc 0x555a8ddc   0x555a8ddc 
(gdb) si
0x555a78f0 in mallopt@plt ()
(gdb) c
Continuing.
BusyBox v1.34.1 (2021-12-19 22:39:48 CST) multi-call binary.
BusyBox is copyrighted by many authors between 1998-2015.
Licensed under GPLv2. See source distribution for detailed
copyright notices.

Usage: busybox [function [arguments]...]
   or: busybox --list[-full]
...
[Inferior 1 (process 107) exited normally]
(gdb) q

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Palmer Dabbelt 
Reviewed-by: Arnd Bergmann 
Tested-by: Heiko Stuebner 
---
 arch/riscv/kernel/ptrace.c | 87 +++---
 1 file changed, 82 insertions(+), 5 deletions(-)

diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c
index 793c7da0554b..2ae8280ae475 100644
--- a/arch/riscv/kernel/ptrace.c
+++ b/arch/riscv/kernel/ptrace.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -110,11 +111,6 @@ static const struct user_regset_view 
riscv_user_native_view = {
.n = ARRAY_SIZE(riscv_user_regset),
 };
 
-const struct user_regset_view *task_user_regset_view(struct task_struct *task)
-{
-   return _user_native_view;
-}
-
 struct pt_regs_offset {
const char *name;
int offset;
@@ -272,3 +268,84 @@ __visible void do_syscall_trace_exit(struct pt_regs *regs)
trace_sys_exit(regs, regs_return_value(regs));
 #endif
 }
+
+#ifdef CONFIG_COMPAT
+static int compat_riscv_gpr_get(struct task_struct *target,
+   const struct user_regset *regset,
+   struct membuf to)
+{
+   struct compat_user_regs_struct cregs;
+
+   regs_to_cregs(, task_pt_regs(target));
+
+   return membuf_write(, ,
+   sizeof(struct compat_user_regs_struct));
+}
+
+static int compat_riscv_gpr_set(struct task_struct *target,
+   const struct user_regset *regset,
+   unsigned int pos, unsigned int count,
+   const void *kbuf, const void __user *ubuf)
+{
+   int ret;
+   struct compat_user_regs_struct cregs;
+
+   ret = user_regset_copyin(, , , , , 0, -1);
+
+   cregs_to_regs(, task_pt_regs(target));
+
+   return ret;
+}
+
+static const struct user_regset compat_riscv_user_regset[] = {
+   [REGSET_X] = {
+   .core_note_type = NT_PRSTATUS,
+   .n = ELF_NGREG,
+   .size = sizeof(compat_elf_greg_t),
+   .align = sizeof(compat_elf_greg_t),
+   .regset_get = compat_riscv_gpr_get,
+ 

[PATCH V12 18/20] riscv: compat: signal: Add rt_frame implementation

[guoren]

From: Guo Ren 

Implement compat_setup_rt_frame for sigcontext save & restore. The
main process is the same with signal, but the rv32 pt_regs' size
is different from rv64's, so we needs convert them.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Palmer Dabbelt 
Tested-by: Heiko Stuebner 
Cc: Arnd Bergmann 
---
 arch/riscv/kernel/Makefile|   1 +
 arch/riscv/kernel/compat_signal.c | 242 ++
 arch/riscv/kernel/signal.c|  13 +-
 3 files changed, 255 insertions(+), 1 deletion(-)
 create mode 100644 arch/riscv/kernel/compat_signal.c

diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
index fec77d101f9e..bf251622acbb 100644
--- a/arch/riscv/kernel/Makefile
+++ b/arch/riscv/kernel/Makefile
@@ -70,4 +70,5 @@ obj-$(CONFIG_JUMP_LABEL)  += jump_label.o
 
 obj-$(CONFIG_EFI)  += efi.o
 obj-$(CONFIG_COMPAT)   += compat_syscall_table.o
+obj-$(CONFIG_COMPAT)   += compat_signal.o
 obj-$(CONFIG_COMPAT)   += compat_vdso/
diff --git a/arch/riscv/kernel/compat_signal.c 
b/arch/riscv/kernel/compat_signal.c
new file mode 100644
index ..ddec7863332c
--- /dev/null
+++ b/arch/riscv/kernel/compat_signal.c
@@ -0,0 +1,242 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#define COMPAT_DEBUG_SIG 0
+
+struct compat_sigcontext {
+   struct compat_user_regs_struct sc_regs;
+   union __riscv_fp_state sc_fpregs;
+};
+
+struct compat_ucontext {
+   compat_ulong_t  uc_flags;
+   struct compat_ucontext  *uc_link;
+   compat_stack_t  uc_stack;
+   sigset_tuc_sigmask;
+   /* There's some padding here to allow sigset_t to be expanded in the
+* future.  Though this is unlikely, other architectures put uc_sigmask
+* at the end of this structure and explicitly state it can be
+* expanded, so we didn't want to box ourselves in here. */
+   __u8  __unused[1024 / 8 - sizeof(sigset_t)];
+   /* We can't put uc_sigmask at the end of this structure because we need
+* to be able to expand sigcontext in the future.  For example, the
+* vector ISA extension will almost certainly add ISA state.  We want
+* to ensure all user-visible ISA state can be saved and restored via a
+* ucontext, so we're putting this at the end in order to allow for
+* infinite extensibility.  Since we know this will be extended and we
+* assume sigset_t won't be extended an extreme amount, we're
+* prioritizing this. */
+   struct compat_sigcontext uc_mcontext;
+};
+
+struct compat_rt_sigframe {
+   struct compat_siginfo info;
+   struct compat_ucontext uc;
+};
+
+#ifdef CONFIG_FPU
+static long compat_restore_fp_state(struct pt_regs *regs,
+   union __riscv_fp_state __user *sc_fpregs)
+{
+   long err;
+   struct __riscv_d_ext_state __user *state = _fpregs->d;
+   size_t i;
+
+   err = __copy_from_user(>thread.fstate, state, sizeof(*state));
+   if (unlikely(err))
+   return err;
+
+   fstate_restore(current, regs);
+
+   /* We support no other extension state at this time. */
+   for (i = 0; i < ARRAY_SIZE(sc_fpregs->q.reserved); i++) {
+   u32 value;
+
+   err = __get_user(value, _fpregs->q.reserved[i]);
+   if (unlikely(err))
+   break;
+   if (value != 0)
+   return -EINVAL;
+   }
+
+   return err;
+}
+
+static long compat_save_fp_state(struct pt_regs *regs,
+ union __riscv_fp_state __user *sc_fpregs)
+{
+   long err;
+   struct __riscv_d_ext_state __user *state = _fpregs->d;
+   size_t i;
+
+   fstate_save(current, regs);
+   err = __copy_to_user(state, >thread.fstate, sizeof(*state));
+   if (unlikely(err))
+   return err;
+
+   /* We support no other extension state at this time. */
+   for (i = 0; i < ARRAY_SIZE(sc_fpregs->q.reserved); i++) {
+   err = __put_user(0, _fpregs->q.reserved[i]);
+   if (unlikely(err))
+   break;
+   }
+
+   return err;
+}
+#else
+#define compat_save_fp_state(task, regs) (0)
+#define compat_restore_fp_state(task, regs) (0)
+#endif
+
+static long compat_restore_sigcontext(struct pt_regs *regs,
+   struct compat_sigcontext __user *sc)
+{
+   long err;
+   struct compat_user_regs_struct cregs;
+
+   /* sc_regs is structured the same as the start of pt_regs */
+   err = __copy_from_user(, >sc_regs, sizeof(sc->sc_regs));
+
+   cregs_to_regs(, regs);
+
+   /* Restore the floating-point state. */
+   if (has_fpu())
+   err |= compat_restore_fp_state(regs, >sc_fpregs);
+   return err;
+}
+
+COMPAT_SYSCALL_DEFINE0(rt_sigreturn)
+{
+   struct pt_regs 

[PATCH V12 17/20] riscv: compat: vdso: Add setup additional pages implementation

[guoren]

From: Guo Ren 

Reconstruct __setup_additional_pages() by appending vdso info
pointer argument to meet compat_vdso_info requirement. And change
vm_special_mapping *dm, *cm initialization into static.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Palmer Dabbelt 
Tested-by: Heiko Stuebner 
Cc: Arnd Bergmann 
---
 arch/riscv/include/asm/elf.h |   5 ++
 arch/riscv/include/asm/mmu.h |   1 +
 arch/riscv/kernel/vdso.c | 105 +++
 3 files changed, 76 insertions(+), 35 deletions(-)

diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index 754fdb8cee96..14fc7342490b 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -130,5 +130,10 @@ do {if ((ex).e_ident[EI_CLASS] == ELFCLASS32)  
\
 typedef compat_ulong_t compat_elf_greg_t;
 typedef compat_elf_greg_t  compat_elf_gregset_t[ELF_NGREG];
 
+extern int compat_arch_setup_additional_pages(struct linux_binprm *bprm,
+ int uses_interp);
+#define compat_arch_setup_additional_pages \
+   compat_arch_setup_additional_pages
+
 #endif /* CONFIG_COMPAT */
 #endif /* _ASM_RISCV_ELF_H */
diff --git a/arch/riscv/include/asm/mmu.h b/arch/riscv/include/asm/mmu.h
index 0099dc116168..cedcf8ea3c76 100644
--- a/arch/riscv/include/asm/mmu.h
+++ b/arch/riscv/include/asm/mmu.h
@@ -16,6 +16,7 @@ typedef struct {
atomic_long_t id;
 #endif
void *vdso;
+   void *vdso_info;
 #ifdef CONFIG_SMP
/* A local icache flush is needed before user execution can resume. */
cpumask_t icache_stale_mask;
diff --git a/arch/riscv/kernel/vdso.c b/arch/riscv/kernel/vdso.c
index a9436a65161a..50fe4c877603 100644
--- a/arch/riscv/kernel/vdso.c
+++ b/arch/riscv/kernel/vdso.c
@@ -23,6 +23,9 @@ struct vdso_data {
 #endif
 
 extern char vdso_start[], vdso_end[];
+#ifdef CONFIG_COMPAT
+extern char compat_vdso_start[], compat_vdso_end[];
+#endif
 
 enum vvar_pages {
VVAR_DATA_PAGE_OFFSET,
@@ -30,6 +33,11 @@ enum vvar_pages {
VVAR_NR_PAGES,
 };
 
+enum rv_vdso_map {
+   RV_VDSO_MAP_VVAR,
+   RV_VDSO_MAP_VDSO,
+};
+
 #define VVAR_SIZE  (VVAR_NR_PAGES << PAGE_SHIFT)
 
 /*
@@ -52,12 +60,6 @@ struct __vdso_info {
struct vm_special_mapping *cm;
 };
 
-static struct __vdso_info vdso_info __ro_after_init = {
-   .name = "vdso",
-   .vdso_code_start = vdso_start,
-   .vdso_code_end = vdso_end,
-};
-
 static int vdso_mremap(const struct vm_special_mapping *sm,
   struct vm_area_struct *new_vma)
 {
@@ -66,37 +68,33 @@ static int vdso_mremap(const struct vm_special_mapping *sm,
return 0;
 }
 
-static int __init __vdso_init(void)
+static void __init __vdso_init(struct __vdso_info *vdso_info)
 {
unsigned int i;
struct page **vdso_pagelist;
unsigned long pfn;
 
-   if (memcmp(vdso_info.vdso_code_start, "\177ELF", 4)) {
-   pr_err("vDSO is not a valid ELF object!\n");
-   return -EINVAL;
-   }
+   if (memcmp(vdso_info->vdso_code_start, "\177ELF", 4))
+   panic("vDSO is not a valid ELF object!\n");
 
-   vdso_info.vdso_pages = (
-   vdso_info.vdso_code_end -
-   vdso_info.vdso_code_start) >>
+   vdso_info->vdso_pages = (
+   vdso_info->vdso_code_end -
+   vdso_info->vdso_code_start) >>
PAGE_SHIFT;
 
-   vdso_pagelist = kcalloc(vdso_info.vdso_pages,
+   vdso_pagelist = kcalloc(vdso_info->vdso_pages,
sizeof(struct page *),
GFP_KERNEL);
if (vdso_pagelist == NULL)
-   return -ENOMEM;
+   panic("vDSO kcalloc failed!\n");
 
/* Grab the vDSO code pages. */
-   pfn = sym_to_pfn(vdso_info.vdso_code_start);
+   pfn = sym_to_pfn(vdso_info->vdso_code_start);
 
-   for (i = 0; i < vdso_info.vdso_pages; i++)
+   for (i = 0; i < vdso_info->vdso_pages; i++)
vdso_pagelist[i] = pfn_to_page(pfn + i);
 
-   vdso_info.cm->pages = vdso_pagelist;
-
-   return 0;
+   vdso_info->cm->pages = vdso_pagelist;
 }
 
 #ifdef CONFIG_TIME_NS
@@ -116,13 +114,14 @@ int vdso_join_timens(struct task_struct *task, struct 
time_namespace *ns)
 {
struct mm_struct *mm = task->mm;
struct vm_area_struct *vma;
+   struct __vdso_info *vdso_info = mm->context.vdso_info;
 
mmap_read_lock(mm);
 
for (vma = mm->mmap; vma; vma = vma->vm_next) {
unsigned long size = vma->vm_end - vma->vm_start;
 
-   if (vma_is_special_mapping(vma, vdso_info.dm))
+   if (vma_is_special_mapping(vma, vdso_info->dm))
zap_page_range(vma, vma->vm_start, size);
}
 
@@ -187,11 +186,6 @@ static vm_fault_t vvar_fault(const struct 
vm_special_mapping *sm,
return vmf_insert_pfn(vma, 

[PATCH V12 16/20] riscv: compat: vdso: Add COMPAT_VDSO base code implementation

[guoren]

From: Guo Ren 

There is no vgettimeofday supported in rv32 that makes simple to
generate rv32 vdso code which only needs riscv64 compiler. Other
architectures need change compiler or -m (machine parameter) to
support vdso32 compiling. If rv32 support vgettimeofday (which
cause C compile) in future, we would add CROSS_COMPILE to support
that makes more requirement on compiler enviornment.

linux-rv64/arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg:
file format elf64-littleriscv

Disassembly of section .text:

0800 <__vdso_rt_sigreturn>:
 800:   08b00893li  a7,139
 804:   0073ecall
 808:   unimp
...

080c <__vdso_getcpu>:
 80c:   0a800893li  a7,168
 810:   0073ecall
 814:   8082ret
...

0818 <__vdso_flush_icache>:
 818:   10300893li  a7,259
 81c:   0073ecall
 820:   8082ret

linux-rv32/arch/riscv/kernel/vdso/vdso.so.dbg:
file format elf32-littleriscv

Disassembly of section .text:

0800 <__vdso_rt_sigreturn>:
 800:   08b00893li  a7,139
 804:   0073ecall
 808:   unimp
...

080c <__vdso_getcpu>:
 80c:   0a800893li  a7,168
 810:   0073ecall
 814:   8082ret
...

0818 <__vdso_flush_icache>:
 818:   10300893li  a7,259
 81c:   0073ecall
 820:   8082ret

Finally, reuse all *.S from vdso in compat_vdso that makes
implementation clear and readable.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Tested-by: Heiko Stuebner 
Cc: Arnd Bergmann 
Cc: Palmer Dabbelt 
---
 arch/riscv/Makefile   |  5 ++
 arch/riscv/include/asm/vdso.h |  9 +++
 arch/riscv/kernel/Makefile|  1 +
 arch/riscv/kernel/compat_vdso/.gitignore  |  2 +
 arch/riscv/kernel/compat_vdso/Makefile| 78 +++
 arch/riscv/kernel/compat_vdso/compat_vdso.S   |  8 ++
 .../kernel/compat_vdso/compat_vdso.lds.S  |  3 +
 arch/riscv/kernel/compat_vdso/flush_icache.S  |  3 +
 .../compat_vdso/gen_compat_vdso_offsets.sh|  5 ++
 arch/riscv/kernel/compat_vdso/getcpu.S|  3 +
 arch/riscv/kernel/compat_vdso/note.S  |  3 +
 arch/riscv/kernel/compat_vdso/rt_sigreturn.S  |  3 +
 arch/riscv/kernel/vdso/vdso.S |  6 +-
 13 files changed, 128 insertions(+), 1 deletion(-)
 create mode 100644 arch/riscv/kernel/compat_vdso/.gitignore
 create mode 100644 arch/riscv/kernel/compat_vdso/Makefile
 create mode 100644 arch/riscv/kernel/compat_vdso/compat_vdso.S
 create mode 100644 arch/riscv/kernel/compat_vdso/compat_vdso.lds.S
 create mode 100644 arch/riscv/kernel/compat_vdso/flush_icache.S
 create mode 100755 arch/riscv/kernel/compat_vdso/gen_compat_vdso_offsets.sh
 create mode 100644 arch/riscv/kernel/compat_vdso/getcpu.S
 create mode 100644 arch/riscv/kernel/compat_vdso/note.S
 create mode 100644 arch/riscv/kernel/compat_vdso/rt_sigreturn.S

diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index c6ca1b9cbf71..6a494029b8bd 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -112,12 +112,17 @@ libs-$(CONFIG_EFI_STUB) += 
$(objtree)/drivers/firmware/efi/libstub/lib.a
 PHONY += vdso_install
 vdso_install:
$(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso $@
+   $(if $(CONFIG_COMPAT),$(Q)$(MAKE) \
+   $(build)=arch/riscv/kernel/compat_vdso $@)
 
 ifeq ($(KBUILD_EXTMOD),)
 ifeq ($(CONFIG_MMU),y)
 prepare: vdso_prepare
 vdso_prepare: prepare0
$(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso 
include/generated/vdso-offsets.h
+   $(if $(CONFIG_COMPAT),$(Q)$(MAKE) \
+   $(build)=arch/riscv/kernel/compat_vdso 
include/generated/compat_vdso-offsets.h)
+
 endif
 endif
 
diff --git a/arch/riscv/include/asm/vdso.h b/arch/riscv/include/asm/vdso.h
index bc6f75f3a199..af981426fe0f 100644
--- a/arch/riscv/include/asm/vdso.h
+++ b/arch/riscv/include/asm/vdso.h
@@ -21,6 +21,15 @@
 
 #define VDSO_SYMBOL(base, name)
\
(void __user *)((unsigned long)(base) + __vdso_##name##_offset)
+
+#ifdef CONFIG_COMPAT
+#include 
+
+#define COMPAT_VDSO_SYMBOL(base, name) 
\
+   (void __user *)((unsigned long)(base) + compat__vdso_##name##_offset)
+
+#endif /* CONFIG_COMPAT */
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* CONFIG_MMU */
diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
index 2fa06d6572bb..fec77d101f9e 100644
--- a/arch/riscv/kernel/Makefile
+++ b/arch/riscv/kernel/Makefile
@@ -70,3 +70,4 @@ obj-$(CONFIG_JUMP_LABEL)  += jump_label.o
 
 obj-$(CONFIG_EFI)  += efi.o
 obj-$(CONFIG_COMPAT)   += compat_syscall_table.o
+obj-$(CONFIG_COMPAT)   += 

[PATCH V12 15/20] riscv: compat: Add hw capability check for elf

[guoren]

From: Guo Ren 

Detect hardware COMPAT (32bit U-mode) capability in rv64. If not
support COMPAT mode in hw, compat_elf_check_arch would return
false by compat_binfmt_elf.c

Add CLASS to enhance (compat_)elf_check_arch to distinguish
32BIT/64BIT elf.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Tested-by: Heiko Stuebner 
Cc: Arnd Bergmann 
Cc: Christoph Hellwig 
---
 arch/riscv/include/asm/elf.h |  6 --
 arch/riscv/kernel/process.c  | 28 
 2 files changed, 32 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index a234656cfb5d..754fdb8cee96 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -33,9 +33,11 @@
 /*
  * This is used to ensure we don't load something for the wrong architecture.
  */
-#define elf_check_arch(x) ((x)->e_machine == EM_RISCV)
+#define elf_check_arch(x) (((x)->e_machine == EM_RISCV) && \
+  ((x)->e_ident[EI_CLASS] == ELF_CLASS))
 
-#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV)
+extern bool compat_elf_check_arch(Elf32_Ehdr *hdr);
+#define compat_elf_check_arch  compat_elf_check_arch
 
 #define CORE_DUMP_USE_REGSET
 #define ELF_EXEC_PAGESIZE  (PAGE_SIZE)
diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
index b4421c16198c..1c7be865ab31 100644
--- a/arch/riscv/kernel/process.c
+++ b/arch/riscv/kernel/process.c
@@ -84,6 +84,34 @@ void show_regs(struct pt_regs *regs)
dump_backtrace(regs, NULL, KERN_DEFAULT);
 }
 
+#ifdef CONFIG_COMPAT
+static bool compat_mode_supported __read_mostly;
+
+bool compat_elf_check_arch(Elf32_Ehdr *hdr)
+{
+   return compat_mode_supported &&
+  hdr->e_machine == EM_RISCV &&
+  hdr->e_ident[EI_CLASS] == ELFCLASS32;
+}
+
+static int __init compat_mode_detect(void)
+{
+   unsigned long tmp = csr_read(CSR_STATUS);
+
+   csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32);
+   compat_mode_supported =
+   (csr_read(CSR_STATUS) & SR_UXL) == SR_UXL_32;
+
+   csr_write(CSR_STATUS, tmp);
+
+   pr_info("riscv: ELF compat mode %s",
+   compat_mode_supported ? "supported" : "failed");
+
+   return 0;
+}
+early_initcall(compat_mode_detect);
+#endif
+
 void start_thread(struct pt_regs *regs, unsigned long pc,
unsigned long sp)
 {
-- 
2.25.1

[PATCH V12 14/20] riscv: compat: Add elf.h implementation

[guoren]

From: Guo Ren 

Implement necessary type and macro for compat elf. See the code
comment for detail.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Arnd Bergmann 
Tested-by: Heiko Stuebner 
---
 arch/riscv/include/asm/elf.h | 41 +++-
 1 file changed, 40 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index f53c40026c7a..a234656cfb5d 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -8,6 +8,8 @@
 #ifndef _ASM_RISCV_ELF_H
 #define _ASM_RISCV_ELF_H
 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -18,11 +20,13 @@
  */
 #define ELF_ARCH   EM_RISCV
 
+#ifndef ELF_CLASS
 #ifdef CONFIG_64BIT
 #define ELF_CLASS  ELFCLASS64
 #else
 #define ELF_CLASS  ELFCLASS32
 #endif
+#endif
 
 #define ELF_DATA   ELFDATA2LSB
 
@@ -31,6 +35,8 @@
  */
 #define elf_check_arch(x) ((x)->e_machine == EM_RISCV)
 
+#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV)
+
 #define CORE_DUMP_USE_REGSET
 #define ELF_EXEC_PAGESIZE  (PAGE_SIZE)
 
@@ -43,8 +49,14 @@
 #define ELF_ET_DYN_BASE((TASK_SIZE / 3) * 2)
 
 #ifdef CONFIG_64BIT
+#ifdef CONFIG_COMPAT
+#define STACK_RND_MASK (test_thread_flag(TIF_32BIT) ? \
+0x7ff >> (PAGE_SHIFT - 12) : \
+0x3 >> (PAGE_SHIFT - 12))
+#else
 #define STACK_RND_MASK (0x3 >> (PAGE_SHIFT - 12))
 #endif
+#endif
 /*
  * This yields a mask that user programs can use to figure out what
  * instruction set this CPU supports.  This could be done in user space,
@@ -60,11 +72,19 @@ extern unsigned long elf_hwcap;
  */
 #define ELF_PLATFORM   (NULL)
 
+#define COMPAT_ELF_PLATFORM(NULL)
+
 #ifdef CONFIG_MMU
 #define ARCH_DLINFO\
 do {   \
+   /*  \
+* Note that we add ulong after elf_addr_t because  \
+* casting current->mm->context.vdso triggers a cast\
+* warning of cast from pointer to integer for  \
+* COMPAT ELFCLASS32.   \
+*/ \
NEW_AUX_ENT(AT_SYSINFO_EHDR,\
-   (elf_addr_t)current->mm->context.vdso); \
+   (elf_addr_t)(ulong)current->mm->context.vdso);  \
NEW_AUX_ENT(AT_L1I_CACHESIZE,   \
get_cache_size(1, CACHE_TYPE_INST));\
NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY,   \
@@ -90,4 +110,23 @@ do {
\
*(struct user_regs_struct *)regs;   \
 } while (0);
 
+#ifdef CONFIG_COMPAT
+
+#define SET_PERSONALITY(ex)\
+do {if ((ex).e_ident[EI_CLASS] == ELFCLASS32)  \
+   set_thread_flag(TIF_32BIT); \
+   else\
+   clear_thread_flag(TIF_32BIT);   \
+   if (personality(current->personality) != PER_LINUX32)   \
+   set_personality(PER_LINUX | \
+   (current->personality & (~PER_MASK)));  \
+} while (0)
+
+#define COMPAT_ELF_ET_DYN_BASE ((TASK_SIZE_32 / 3) * 2)
+
+/* rv32 registers */
+typedef compat_ulong_t compat_elf_greg_t;
+typedef compat_elf_greg_t  compat_elf_gregset_t[ELF_NGREG];
+
+#endif /* CONFIG_COMPAT */
 #endif /* _ASM_RISCV_ELF_H */
-- 
2.25.1

[PATCH V12 13/20] riscv: compat: process: Add UXL_32 support in start_thread

[guoren]

From: Guo Ren 

If the current task is in COMPAT mode, set SR_UXL_32 in status for
returning userspace. We need CONFIG _COMPAT to prevent compiling
errors with rv32 defconfig.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Tested-by: Heiko Stuebner 
Cc: Arnd Bergmann 
Cc: Palmer Dabbelt 
---
 arch/riscv/kernel/process.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
index 504b496787aa..b4421c16198c 100644
--- a/arch/riscv/kernel/process.c
+++ b/arch/riscv/kernel/process.c
@@ -98,6 +98,15 @@ void start_thread(struct pt_regs *regs, unsigned long pc,
}
regs->epc = pc;
regs->sp = sp;
+
+#ifdef CONFIG_64BIT
+   regs->status &= ~SR_UXL;
+
+   if (is_compat_task())
+   regs->status |= SR_UXL_32;
+   else
+   regs->status |= SR_UXL_64;
+#endif
 }
 
 void flush_thread(void)
-- 
2.25.1

[PATCH V12 12/20] riscv: compat: syscall: Add entry.S implementation

[guoren]

From: Guo Ren 

Implement the entry of compat_sys_call_table[] in asm. Ref to
riscv-privileged spec 4.1.1 Supervisor Status Register (sstatus):

 BIT[32:33] = UXL[1:0]:
 - 1:32
 - 2:64
 - 3:128

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Palmer Dabbelt 
Tested-by: Heiko Stuebner 
Cc: Arnd Bergmann 
---
 arch/riscv/include/asm/csr.h |  7 +++
 arch/riscv/kernel/entry.S| 18 --
 2 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index e935f27b10fd..f5d1251fd6c7 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -36,6 +36,13 @@
 #define SR_SD  _AC(0x8000, UL) /* FS/XS dirty */
 #endif
 
+#ifdef CONFIG_64BIT
+#define SR_UXL _AC(0x3, UL) /* XLEN mask for U-mode */
+#define SR_UXL_32  _AC(0x1, UL) /* XLEN = 32 for U-mode */
+#define SR_UXL_64  _AC(0x2, UL) /* XLEN = 64 for U-mode */
+#define SR_UXL_SHIFT   32
+#endif
+
 /* SATP flags */
 #ifndef CONFIG_64BIT
 #define SATP_PPN   _AC(0x003F, UL)
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index c8b9ce274b9a..2e5b88ca11ce 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -207,13 +207,27 @@ check_syscall_nr:
 * Syscall number held in a7.
 * If syscall number is above allowed value, redirect to ni_syscall.
 */
-   bgeu a7, t0, 1f
+   bgeu a7, t0, 3f
+#ifdef CONFIG_COMPAT
+   REG_L s0, PT_STATUS(sp)
+   srli s0, s0, SR_UXL_SHIFT
+   andi s0, s0, (SR_UXL >> SR_UXL_SHIFT)
+   li t0, (SR_UXL_32 >> SR_UXL_SHIFT)
+   sub t0, s0, t0
+   bnez t0, 1f
+
+   /* Call compat_syscall */
+   la s0, compat_sys_call_table
+   j 2f
+1:
+#endif
/* Call syscall */
la s0, sys_call_table
+2:
slli t0, a7, RISCV_LGPTR
add s0, s0, t0
REG_L s0, 0(s0)
-1:
+3:
jalr s0
 
 ret_from_syscall:
-- 
2.25.1

[PATCH V12 11/20] riscv: compat: syscall: Add compat_sys_call_table implementation

[guoren]

From: Guo Ren 

Implement compat sys_call_table and some system call functions:
truncate64, ftruncate64, fallocate, pread64, pwrite64,
sync_file_range, readahead, fadvise64_64 which need argument
translation.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Arnd Bergmann 
Tested-by: Heiko Stuebner 
Cc: Palmer Dabbelt 
---
 arch/riscv/include/asm/syscall.h |  1 +
 arch/riscv/include/asm/unistd.h  | 11 +++
 arch/riscv/include/uapi/asm/unistd.h |  2 +-
 arch/riscv/kernel/Makefile   |  1 +
 arch/riscv/kernel/compat_syscall_table.c | 19 
 arch/riscv/kernel/sys_riscv.c|  6 ++--
 fs/open.c| 24 +++
 fs/read_write.c  | 16 ++
 fs/sync.c|  9 ++
 include/asm-generic/compat.h |  7 +
 include/linux/compat.h   | 37 
 mm/fadvise.c | 11 +++
 mm/readahead.c   |  7 +
 13 files changed, 148 insertions(+), 3 deletions(-)
 create mode 100644 arch/riscv/kernel/compat_syscall_table.c

diff --git a/arch/riscv/include/asm/syscall.h b/arch/riscv/include/asm/syscall.h
index 7ac6a0e275f2..384a63b86420 100644
--- a/arch/riscv/include/asm/syscall.h
+++ b/arch/riscv/include/asm/syscall.h
@@ -16,6 +16,7 @@
 
 /* The array of function pointers for syscalls. */
 extern void * const sys_call_table[];
+extern void * const compat_sys_call_table[];
 
 /*
  * Only the low 32 bits of orig_r0 are meaningful, so we return int.
diff --git a/arch/riscv/include/asm/unistd.h b/arch/riscv/include/asm/unistd.h
index 6c316093a1e5..5ddac412b578 100644
--- a/arch/riscv/include/asm/unistd.h
+++ b/arch/riscv/include/asm/unistd.h
@@ -11,6 +11,17 @@
 #define __ARCH_WANT_SYS_CLONE
 #define __ARCH_WANT_MEMFD_SECRET
 
+#ifdef CONFIG_COMPAT
+#define __ARCH_WANT_COMPAT_TRUNCATE64
+#define __ARCH_WANT_COMPAT_FTRUNCATE64
+#define __ARCH_WANT_COMPAT_FALLOCATE
+#define __ARCH_WANT_COMPAT_PREAD64
+#define __ARCH_WANT_COMPAT_PWRITE64
+#define __ARCH_WANT_COMPAT_SYNC_FILE_RANGE
+#define __ARCH_WANT_COMPAT_READAHEAD
+#define __ARCH_WANT_COMPAT_FADVISE64_64
+#endif
+
 #include 
 
 #define NR_syscalls (__NR_syscalls)
diff --git a/arch/riscv/include/uapi/asm/unistd.h 
b/arch/riscv/include/uapi/asm/unistd.h
index 8062996c2dfd..c9e50eed14aa 100644
--- a/arch/riscv/include/uapi/asm/unistd.h
+++ b/arch/riscv/include/uapi/asm/unistd.h
@@ -15,7 +15,7 @@
  * along with this program.  If not, see .
  */
 
-#ifdef __LP64__
+#if defined(__LP64__) && !defined(__SYSCALL_COMPAT)
 #define __ARCH_WANT_NEW_STAT
 #define __ARCH_WANT_SET_GET_RLIMIT
 #endif /* __LP64__ */
diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
index 87adbe47bc15..2fa06d6572bb 100644
--- a/arch/riscv/kernel/Makefile
+++ b/arch/riscv/kernel/Makefile
@@ -69,3 +69,4 @@ obj-$(CONFIG_CRASH_DUMP)  += crash_dump.o
 obj-$(CONFIG_JUMP_LABEL)   += jump_label.o
 
 obj-$(CONFIG_EFI)  += efi.o
+obj-$(CONFIG_COMPAT)   += compat_syscall_table.o
diff --git a/arch/riscv/kernel/compat_syscall_table.c 
b/arch/riscv/kernel/compat_syscall_table.c
new file mode 100644
index ..651f2b009c28
--- /dev/null
+++ b/arch/riscv/kernel/compat_syscall_table.c
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#define __SYSCALL_COMPAT
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#undef __SYSCALL
+#define __SYSCALL(nr, call)  [nr] = (call),
+
+asmlinkage long compat_sys_rt_sigreturn(void);
+
+void * const compat_sys_call_table[__NR_syscalls] = {
+   [0 ... __NR_syscalls - 1] = sys_ni_syscall,
+#include 
+};
diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
index 12f8a7fce78b..9c0194f176fc 100644
--- a/arch/riscv/kernel/sys_riscv.c
+++ b/arch/riscv/kernel/sys_riscv.c
@@ -33,7 +33,9 @@ SYSCALL_DEFINE6(mmap, unsigned long, addr, unsigned long, len,
 {
return riscv_sys_mmap(addr, len, prot, flags, fd, offset, 0);
 }
-#else
+#endif
+
+#if defined(CONFIG_32BIT) || defined(CONFIG_COMPAT)
 SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
unsigned long, prot, unsigned long, flags,
unsigned long, fd, off_t, offset)
@@ -44,7 +46,7 @@ SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, 
len,
 */
return riscv_sys_mmap(addr, len, prot, flags, fd, offset, 12);
 }
-#endif /* !CONFIG_64BIT */
+#endif
 
 /*
  * Allows the instruction cache to be flushed from userspace.  Despite RISC-V
diff --git a/fs/open.c b/fs/open.c
index 1315253e0247..0573eebb68a6 100644
--- a/fs/open.c
+++ b/fs/open.c
@@ -224,6 +224,21 @@ SYSCALL_DEFINE2(ftruncate64, unsigned int, fd, loff_t, 
length)
 }
 #endif /* BITS_PER_LONG == 32 */
 
+#if defined(CONFIG_COMPAT) && defined(__ARCH_WANT_COMPAT_TRUNCATE64)
+COMPAT_SYSCALL_DEFINE3(truncate64, const char __user *, pathname,
+  

[PATCH V12 10/20] riscv: compat: Support TASK_SIZE for compat mode

[guoren]

From: Guo Ren 

Make TASK_SIZE from const to dynamic detect TIF_32BIT flag
function. Refer to arm64 to implement DEFAULT_MAP_WINDOW_64 for
efi-stub.

Limit 32-bit compatible process in 0-2GB virtual address range
(which is enough for real scenarios), because it could avoid
address sign extend problem when 32-bit enter 64-bit and ease
software design.

The standard 32-bit TASK_SIZE is 0x9dc0:FIXADDR_START, and
compared to a compatible 32-bit, it increases 476MB for the
application's virtual address.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Arnd Bergmann 
Tested-by: Heiko Stuebner 
---
 arch/riscv/include/asm/pgtable.h   | 13 +++--
 arch/riscv/include/asm/processor.h |  6 +-
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 046b44225623..e32d75fef068 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -707,8 +707,17 @@ static inline pmd_t pmdp_establish(struct vm_area_struct 
*vma,
  * 63–48 all equal to bit 47, or else a page-fault exception will occur."
  */
 #ifdef CONFIG_64BIT
-#define TASK_SIZE  (PGDIR_SIZE * PTRS_PER_PGD / 2)
-#define TASK_SIZE_MIN  (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2)
+#define TASK_SIZE_64   (PGDIR_SIZE * PTRS_PER_PGD / 2)
+#define TASK_SIZE_MIN  (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2)
+
+#ifdef CONFIG_COMPAT
+#define TASK_SIZE_32   (_AC(0x8000, UL) - PAGE_SIZE)
+#define TASK_SIZE  (test_thread_flag(TIF_32BIT) ? \
+TASK_SIZE_32 : TASK_SIZE_64)
+#else
+#define TASK_SIZE  TASK_SIZE_64
+#endif
+
 #else
 #define TASK_SIZE  FIXADDR_START
 #define TASK_SIZE_MIN  TASK_SIZE
diff --git a/arch/riscv/include/asm/processor.h 
b/arch/riscv/include/asm/processor.h
index 0749924d9e55..21c8072dce17 100644
--- a/arch/riscv/include/asm/processor.h
+++ b/arch/riscv/include/asm/processor.h
@@ -19,7 +19,11 @@
 #define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
 
 #define STACK_TOP  TASK_SIZE
-#define STACK_TOP_MAX  STACK_TOP
+#ifdef CONFIG_64BIT
+#define STACK_TOP_MAX  TASK_SIZE_64
+#else
+#define STACK_TOP_MAX  TASK_SIZE
+#endif
 #define STACK_ALIGN16
 
 #ifndef __ASSEMBLY__
-- 
2.25.1

[PATCH V12 09/20] riscv: compat: Add basic compat data type implementation

[guoren]

From: Guo Ren 

Implement riscv asm/compat.h for struct compat_xxx,
is_compat_task, compat_user_regset, regset convert.

The rv64 compat.h has inherited most of the structs
from the generic one.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Tested-by: Heiko Stuebner 
Cc: Arnd Bergmann 
Cc: Palmer Dabbelt 
---
 arch/riscv/include/asm/compat.h  | 129 +++
 arch/riscv/include/asm/thread_info.h |   1 +
 2 files changed, 130 insertions(+)
 create mode 100644 arch/riscv/include/asm/compat.h

diff --git a/arch/riscv/include/asm/compat.h b/arch/riscv/include/asm/compat.h
new file mode 100644
index ..2ac955b51148
--- /dev/null
+++ b/arch/riscv/include/asm/compat.h
@@ -0,0 +1,129 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __ASM_COMPAT_H
+#define __ASM_COMPAT_H
+
+#define COMPAT_UTS_MACHINE "riscv\0\0"
+
+/*
+ * Architecture specific compatibility types
+ */
+#include 
+#include 
+#include 
+#include 
+
+static inline int is_compat_task(void)
+{
+   return test_thread_flag(TIF_32BIT);
+}
+
+struct compat_user_regs_struct {
+   compat_ulong_t pc;
+   compat_ulong_t ra;
+   compat_ulong_t sp;
+   compat_ulong_t gp;
+   compat_ulong_t tp;
+   compat_ulong_t t0;
+   compat_ulong_t t1;
+   compat_ulong_t t2;
+   compat_ulong_t s0;
+   compat_ulong_t s1;
+   compat_ulong_t a0;
+   compat_ulong_t a1;
+   compat_ulong_t a2;
+   compat_ulong_t a3;
+   compat_ulong_t a4;
+   compat_ulong_t a5;
+   compat_ulong_t a6;
+   compat_ulong_t a7;
+   compat_ulong_t s2;
+   compat_ulong_t s3;
+   compat_ulong_t s4;
+   compat_ulong_t s5;
+   compat_ulong_t s6;
+   compat_ulong_t s7;
+   compat_ulong_t s8;
+   compat_ulong_t s9;
+   compat_ulong_t s10;
+   compat_ulong_t s11;
+   compat_ulong_t t3;
+   compat_ulong_t t4;
+   compat_ulong_t t5;
+   compat_ulong_t t6;
+};
+
+static inline void regs_to_cregs(struct compat_user_regs_struct *cregs,
+struct pt_regs *regs)
+{
+   cregs->pc   = (compat_ulong_t) regs->epc;
+   cregs->ra   = (compat_ulong_t) regs->ra;
+   cregs->sp   = (compat_ulong_t) regs->sp;
+   cregs->gp   = (compat_ulong_t) regs->gp;
+   cregs->tp   = (compat_ulong_t) regs->tp;
+   cregs->t0   = (compat_ulong_t) regs->t0;
+   cregs->t1   = (compat_ulong_t) regs->t1;
+   cregs->t2   = (compat_ulong_t) regs->t2;
+   cregs->s0   = (compat_ulong_t) regs->s0;
+   cregs->s1   = (compat_ulong_t) regs->s1;
+   cregs->a0   = (compat_ulong_t) regs->a0;
+   cregs->a1   = (compat_ulong_t) regs->a1;
+   cregs->a2   = (compat_ulong_t) regs->a2;
+   cregs->a3   = (compat_ulong_t) regs->a3;
+   cregs->a4   = (compat_ulong_t) regs->a4;
+   cregs->a5   = (compat_ulong_t) regs->a5;
+   cregs->a6   = (compat_ulong_t) regs->a6;
+   cregs->a7   = (compat_ulong_t) regs->a7;
+   cregs->s2   = (compat_ulong_t) regs->s2;
+   cregs->s3   = (compat_ulong_t) regs->s3;
+   cregs->s4   = (compat_ulong_t) regs->s4;
+   cregs->s5   = (compat_ulong_t) regs->s5;
+   cregs->s6   = (compat_ulong_t) regs->s6;
+   cregs->s7   = (compat_ulong_t) regs->s7;
+   cregs->s8   = (compat_ulong_t) regs->s8;
+   cregs->s9   = (compat_ulong_t) regs->s9;
+   cregs->s10  = (compat_ulong_t) regs->s10;
+   cregs->s11  = (compat_ulong_t) regs->s11;
+   cregs->t3   = (compat_ulong_t) regs->t3;
+   cregs->t4   = (compat_ulong_t) regs->t4;
+   cregs->t5   = (compat_ulong_t) regs->t5;
+   cregs->t6   = (compat_ulong_t) regs->t6;
+};
+
+static inline void cregs_to_regs(struct compat_user_regs_struct *cregs,
+struct pt_regs *regs)
+{
+   regs->epc   = (unsigned long) cregs->pc;
+   regs->ra= (unsigned long) cregs->ra;
+   regs->sp= (unsigned long) cregs->sp;
+   regs->gp= (unsigned long) cregs->gp;
+   regs->tp= (unsigned long) cregs->tp;
+   regs->t0= (unsigned long) cregs->t0;
+   regs->t1= (unsigned long) cregs->t1;
+   regs->t2= (unsigned long) cregs->t2;
+   regs->s0= (unsigned long) cregs->s0;
+   regs->s1= (unsigned long) cregs->s1;
+   regs->a0= (unsigned long) cregs->a0;
+   regs->a1= (unsigned long) cregs->a1;
+   regs->a2= (unsigned long) cregs->a2;
+   regs->a3= (unsigned long) cregs->a3;
+   regs->a4= (unsigned long) cregs->a4;
+   regs->a5= (unsigned long) cregs->a5;
+   regs->a6= (unsigned long) cregs->a6;
+   regs->a7= (unsigned long) cregs->a7;
+   regs->s2= (unsigned long) cregs->s2;
+   regs->s3= (unsigned long) cregs->s3;
+   

[PATCH V12 08/20] riscv: Fixup difference with defconfig

[guoren]

From: Guo Ren 

Let's follow the origin patch's spirit:

The only difference between rv32_defconfig and defconfig is that
rv32_defconfig has  CONFIG_ARCH_RV32I=y.

This is helpful to compare rv64-compat-rv32 v.s. rv32-linux.

Fixes: 1b937e8faa87ccfb ("RISC-V: Add separate defconfig for 32bit systems")
Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Arnd Bergmann 
Tested-by: Heiko Stuebner 
Cc: Palmer Dabbelt 
---
 arch/riscv/Makefile | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 7d81102cffd4..c6ca1b9cbf71 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -154,3 +154,7 @@ PHONY += rv64_randconfig
 rv64_randconfig:
$(Q)$(MAKE) 
KCONFIG_ALLCONFIG=$(srctree)/arch/riscv/configs/64-bit.config \
-f $(srctree)/Makefile randconfig
+
+PHONY += rv32_defconfig
+rv32_defconfig:
+   $(Q)$(MAKE) -f $(srctree)/Makefile defconfig 32-bit.config
-- 
2.25.1

[PATCH V12 07/20] syscalls: compat: Fix the missing part for __SYSCALL_COMPAT

[guoren]

From: Guo Ren 

Make "uapi asm unistd.h" could be used for architectures' COMPAT
mode. The __SYSCALL_COMPAT is first used in riscv.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Arnd Bergmann 
Reviewed-by: Christoph Hellwig 
Tested-by: Heiko Stuebner 
---
 include/uapi/asm-generic/unistd.h   | 4 ++--
 tools/include/uapi/asm-generic/unistd.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/uapi/asm-generic/unistd.h 
b/include/uapi/asm-generic/unistd.h
index 1c48b0ae3ba3..45fa180cc56a 100644
--- a/include/uapi/asm-generic/unistd.h
+++ b/include/uapi/asm-generic/unistd.h
@@ -383,7 +383,7 @@ __SYSCALL(__NR_syslog, sys_syslog)
 
 /* kernel/ptrace.c */
 #define __NR_ptrace 117
-__SYSCALL(__NR_ptrace, sys_ptrace)
+__SC_COMP(__NR_ptrace, sys_ptrace, compat_sys_ptrace)
 
 /* kernel/sched/core.c */
 #define __NR_sched_setparam 118
@@ -779,7 +779,7 @@ __SYSCALL(__NR_rseq, sys_rseq)
 #define __NR_kexec_file_load 294
 __SYSCALL(__NR_kexec_file_load, sys_kexec_file_load)
 /* 295 through 402 are unassigned to sync up with generic numbers, don't use */
-#if __BITS_PER_LONG == 32
+#if defined(__SYSCALL_COMPAT) || __BITS_PER_LONG == 32
 #define __NR_clock_gettime64 403
 __SYSCALL(__NR_clock_gettime64, sys_clock_gettime)
 #define __NR_clock_settime64 404
diff --git a/tools/include/uapi/asm-generic/unistd.h 
b/tools/include/uapi/asm-generic/unistd.h
index 1c48b0ae3ba3..45fa180cc56a 100644
--- a/tools/include/uapi/asm-generic/unistd.h
+++ b/tools/include/uapi/asm-generic/unistd.h
@@ -383,7 +383,7 @@ __SYSCALL(__NR_syslog, sys_syslog)
 
 /* kernel/ptrace.c */
 #define __NR_ptrace 117
-__SYSCALL(__NR_ptrace, sys_ptrace)
+__SC_COMP(__NR_ptrace, sys_ptrace, compat_sys_ptrace)
 
 /* kernel/sched/core.c */
 #define __NR_sched_setparam 118
@@ -779,7 +779,7 @@ __SYSCALL(__NR_rseq, sys_rseq)
 #define __NR_kexec_file_load 294
 __SYSCALL(__NR_kexec_file_load, sys_kexec_file_load)
 /* 295 through 402 are unassigned to sync up with generic numbers, don't use */
-#if __BITS_PER_LONG == 32
+#if defined(__SYSCALL_COMPAT) || __BITS_PER_LONG == 32
 #define __NR_clock_gettime64 403
 __SYSCALL(__NR_clock_gettime64, sys_clock_gettime)
 #define __NR_clock_settime64 404
-- 
2.25.1

[PATCH V12 06/20] asm-generic: compat: Cleanup duplicate definitions

[guoren]

From: Guo Ren 

There are 7 64bit architectures that support Linux COMPAT mode to
run 32bit applications. A lot of definitions are duplicate:
 - COMPAT_USER_HZ
 - COMPAT_RLIM_INFINITY
 - COMPAT_OFF_T_MAX
 - __compat_uid_t, __compat_uid_t
 - compat_dev_t
 - compat_ipc_pid_t
 - struct compat_flock
 - struct compat_flock64
 - struct compat_statfs
 - struct compat_ipc64_perm, compat_semid64_ds,
  compat_msqid64_ds, compat_shmid64_ds

Cleanup duplicate definitions and merge them into asm-generic.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Arnd Bergmann 
Reviewed-by: Christoph Hellwig 
Tested-by: Heiko Stuebner 
Acked-by: Helge Deller   # parisc
Cc: Palmer Dabbelt 
---
 arch/arm64/include/asm/compat.h   |  73 +++-
 arch/mips/include/asm/compat.h|  18 ++---
 arch/parisc/include/asm/compat.h  |  29 ++--
 arch/powerpc/include/asm/compat.h |  30 ++---
 arch/s390/include/asm/compat.h|  79 --
 arch/sparc/include/asm/compat.h   |  39 ---
 arch/x86/include/asm/compat.h |  80 --
 include/asm-generic/compat.h  | 106 ++
 8 files changed, 170 insertions(+), 284 deletions(-)

diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h
index e0faec1984a1..9f362274a4f7 100644
--- a/arch/arm64/include/asm/compat.h
+++ b/arch/arm64/include/asm/compat.h
@@ -8,6 +8,15 @@
 #define compat_mode_t compat_mode_t
 typedef u16compat_mode_t;
 
+#define __compat_uid_t __compat_uid_t
+typedef u16__compat_uid_t;
+typedef u16__compat_gid_t;
+
+#define compat_ipc_pid_t compat_ipc_pid_t
+typedef u16compat_ipc_pid_t;
+
+#define compat_statfs  compat_statfs
+
 #include 
 
 #ifdef CONFIG_COMPAT
@@ -19,21 +28,15 @@ typedef u16 compat_mode_t;
 #include 
 #include 
 
-#define COMPAT_USER_HZ 100
 #ifdef __AARCH64EB__
 #define COMPAT_UTS_MACHINE "armv8b\0\0"
 #else
 #define COMPAT_UTS_MACHINE "armv8l\0\0"
 #endif
 
-typedef u16__compat_uid_t;
-typedef u16__compat_gid_t;
 typedef u16__compat_uid16_t;
 typedef u16__compat_gid16_t;
-typedef u32compat_dev_t;
 typedef s32compat_nlink_t;
-typedef u16compat_ipc_pid_t;
-typedef __kernel_fsid_tcompat_fsid_t;
 
 struct compat_stat {
 #ifdef __AARCH64EB__
@@ -87,64 +90,6 @@ struct compat_statfs {
 #define compat_user_stack_pointer() (user_stack_pointer(task_pt_regs(current)))
 #define COMPAT_MINSIGSTKSZ 2048
 
-struct compat_ipc64_perm {
-   compat_key_t key;
-   __compat_uid32_t uid;
-   __compat_gid32_t gid;
-   __compat_uid32_t cuid;
-   __compat_gid32_t cgid;
-   unsigned short mode;
-   unsigned short __pad1;
-   unsigned short seq;
-   unsigned short __pad2;
-   compat_ulong_t unused1;
-   compat_ulong_t unused2;
-};
-
-struct compat_semid64_ds {
-   struct compat_ipc64_perm sem_perm;
-   compat_ulong_t sem_otime;
-   compat_ulong_t sem_otime_high;
-   compat_ulong_t sem_ctime;
-   compat_ulong_t sem_ctime_high;
-   compat_ulong_t sem_nsems;
-   compat_ulong_t __unused3;
-   compat_ulong_t __unused4;
-};
-
-struct compat_msqid64_ds {
-   struct compat_ipc64_perm msg_perm;
-   compat_ulong_t msg_stime;
-   compat_ulong_t msg_stime_high;
-   compat_ulong_t msg_rtime;
-   compat_ulong_t msg_rtime_high;
-   compat_ulong_t msg_ctime;
-   compat_ulong_t msg_ctime_high;
-   compat_ulong_t msg_cbytes;
-   compat_ulong_t msg_qnum;
-   compat_ulong_t msg_qbytes;
-   compat_pid_t   msg_lspid;
-   compat_pid_t   msg_lrpid;
-   compat_ulong_t __unused4;
-   compat_ulong_t __unused5;
-};
-
-struct compat_shmid64_ds {
-   struct compat_ipc64_perm shm_perm;
-   compat_size_t  shm_segsz;
-   compat_ulong_t shm_atime;
-   compat_ulong_t shm_atime_high;
-   compat_ulong_t shm_dtime;
-   compat_ulong_t shm_dtime_high;
-   compat_ulong_t shm_ctime;
-   compat_ulong_t shm_ctime_high;
-   compat_pid_t   shm_cpid;
-   compat_pid_t   shm_lpid;
-   compat_ulong_t shm_nattch;
-   compat_ulong_t __unused4;
-   compat_ulong_t __unused5;
-};
-
 static inline int is_compat_task(void)
 {
return test_thread_flag(TIF_32BIT);
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index 6d6e5a451f4d..ec01dc000a41 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -9,28 +9,28 @@
 #include 
 #include 
 
+#define __compat_uid_t __compat_uid_t
 typedef s32__compat_uid_t;
 typedef s32__compat_gid_t;
+
 typedef __compat_uid_t __compat_uid32_t;
 typedef __compat_gid_t __compat_gid32_t;
 #define __compat_uid32_t __compat_uid32_t
-#define __compat_gid32_t __compat_gid32_t
+
+#define compat_statfs  compat_statfs
+#define compat_ipc64_perm  

[PATCH V12 05/20] fs: stat: compat: Add __ARCH_WANT_COMPAT_STAT

[guoren]

From: Guo Ren 

RISC-V doesn't neeed compat_stat, so using __ARCH_WANT_COMPAT_STAT
to exclude unnecessary SYSCALL functions.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Reviewed-by: Arnd Bergmann 
Reviewed-by: Christoph Hellwig 
Tested-by: Heiko Stuebner 
Acked-by: Helge Deller   # parisc
Cc: Palmer Dabbelt 
---
 arch/arm64/include/asm/unistd.h   | 1 +
 arch/mips/include/asm/unistd.h| 2 ++
 arch/parisc/include/asm/unistd.h  | 1 +
 arch/powerpc/include/asm/unistd.h | 1 +
 arch/s390/include/asm/unistd.h| 1 +
 arch/sparc/include/asm/unistd.h   | 1 +
 arch/x86/include/asm/unistd.h | 1 +
 fs/stat.c | 2 +-
 8 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h
index 4e65da3445c7..037feba03a51 100644
--- a/arch/arm64/include/asm/unistd.h
+++ b/arch/arm64/include/asm/unistd.h
@@ -3,6 +3,7 @@
  * Copyright (C) 2012 ARM Ltd.
  */
 #ifdef CONFIG_COMPAT
+#define __ARCH_WANT_COMPAT_STAT
 #define __ARCH_WANT_COMPAT_STAT64
 #define __ARCH_WANT_SYS_GETHOSTNAME
 #define __ARCH_WANT_SYS_PAUSE
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index c2196b1b6604..25a5253db7f4 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -50,6 +50,8 @@
 # ifdef CONFIG_32BIT
 #  define __ARCH_WANT_STAT64
 #  define __ARCH_WANT_SYS_TIME32
+# else
+#  define __ARCH_WANT_COMPAT_STAT
 # endif
 # ifdef CONFIG_MIPS32_O32
 #  define __ARCH_WANT_SYS_TIME32
diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h
index 7708a5806f09..81cbad73b517 100644
--- a/arch/parisc/include/asm/unistd.h
+++ b/arch/parisc/include/asm/unistd.h
@@ -164,6 +164,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, 
type5 arg5)   \
 #define __ARCH_WANT_SYS_CLONE
 #define __ARCH_WANT_SYS_CLONE3
 #define __ARCH_WANT_COMPAT_SYS_SENDFILE
+#define __ARCH_WANT_COMPAT_STAT
 
 #ifdef CONFIG_64BIT
 #define __ARCH_WANT_SYS_TIME
diff --git a/arch/powerpc/include/asm/unistd.h 
b/arch/powerpc/include/asm/unistd.h
index 5eb462af6766..b1129b4ef57d 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -44,6 +44,7 @@
 #define __ARCH_WANT_SYS_TIME
 #define __ARCH_WANT_SYS_UTIME
 #define __ARCH_WANT_SYS_NEWFSTATAT
+#define __ARCH_WANT_COMPAT_STAT
 #define __ARCH_WANT_COMPAT_SYS_SENDFILE
 #endif
 #define __ARCH_WANT_SYS_FORK
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index 9e9f75ef046a..4260bc5ce7f8 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -28,6 +28,7 @@
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
 # ifdef CONFIG_COMPAT
+#   define __ARCH_WANT_COMPAT_STAT
 #   define __ARCH_WANT_SYS_TIME32
 #   define __ARCH_WANT_SYS_UTIME32
 # endif
diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h
index 1e66278ba4a5..d6bc76706a7a 100644
--- a/arch/sparc/include/asm/unistd.h
+++ b/arch/sparc/include/asm/unistd.h
@@ -46,6 +46,7 @@
 #define __ARCH_WANT_SYS_TIME
 #define __ARCH_WANT_SYS_UTIME
 #define __ARCH_WANT_COMPAT_SYS_SENDFILE
+#define __ARCH_WANT_COMPAT_STAT
 #endif
 
 #ifdef __32bit_syscall_numbers__
diff --git a/arch/x86/include/asm/unistd.h b/arch/x86/include/asm/unistd.h
index 80e9d5206a71..761173ccc33c 100644
--- a/arch/x86/include/asm/unistd.h
+++ b/arch/x86/include/asm/unistd.h
@@ -22,6 +22,7 @@
 #  include 
 #  define __ARCH_WANT_SYS_TIME
 #  define __ARCH_WANT_SYS_UTIME
+#  define __ARCH_WANT_COMPAT_STAT
 #  define __ARCH_WANT_COMPAT_SYS_PREADV64
 #  define __ARCH_WANT_COMPAT_SYS_PWRITEV64
 #  define __ARCH_WANT_COMPAT_SYS_PREADV64V2
diff --git a/fs/stat.c b/fs/stat.c
index 7f734be0e57e..5d8f723c1e0b 100644
--- a/fs/stat.c
+++ b/fs/stat.c
@@ -660,7 +660,7 @@ SYSCALL_DEFINE5(statx,
return ret;
 }
 
-#ifdef CONFIG_COMPAT
+#if defined(CONFIG_COMPAT) && defined(__ARCH_WANT_COMPAT_STAT)
 static int cp_compat_stat(struct kstat *stat, struct compat_stat __user *ubuf)
 {
struct compat_stat tmp;
-- 
2.25.1

[PATCH V12 04/20] arch: Add SYSVIPC_COMPAT for all architectures

[guoren]

From: Guo Ren 

The existing per-arch definitions are pretty much historic cruft.
Move SYSVIPC_COMPAT into init/Kconfig.

Signed-off-by: Guo Ren 
Signed-off-by: Guo Ren 
Acked-by: Arnd Bergmann 
Reviewed-by: Christoph Hellwig 
Tested-by: Heiko Stuebner 
Acked-by: Helge Deller   # parisc
Cc: Palmer Dabbelt 
---
 arch/arm64/Kconfig   | 4 
 arch/mips/Kconfig| 5 -
 arch/parisc/Kconfig  | 4 
 arch/powerpc/Kconfig | 5 -
 arch/s390/Kconfig| 3 ---
 arch/sparc/Kconfig   | 5 -
 arch/x86/Kconfig | 4 
 init/Kconfig | 4 
 8 files changed, 4 insertions(+), 30 deletions(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 57c4c995965f..ff674808681a 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -2122,10 +2122,6 @@ config DMI
 
 endmenu
 
-config SYSVIPC_COMPAT
-   def_bool y
-   depends on COMPAT && SYSVIPC
-
 menu "Power management options"
 
 source "kernel/power/Kconfig"
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index de3b32a507d2..0055482cd20f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -3198,16 +3198,12 @@ config MIPS32_COMPAT
 config COMPAT
bool
 
-config SYSVIPC_COMPAT
-   bool
-
 config MIPS32_O32
bool "Kernel support for o32 binaries"
depends on 64BIT
select ARCH_WANT_OLD_COMPAT_IPC
select COMPAT
select MIPS32_COMPAT
-   select SYSVIPC_COMPAT if SYSVIPC
help
  Select this option if you want to run o32 binaries.  These are pure
  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
@@ -3221,7 +3217,6 @@ config MIPS32_N32
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
select COMPAT
select MIPS32_COMPAT
-   select SYSVIPC_COMPAT if SYSVIPC
help
  Select this option if you want to run n32 binaries.  These are
  64-bit binaries using 32-bit quantities for addressing and certain
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 52e550b45692..93cb07a4446f 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -331,10 +331,6 @@ config COMPAT
def_bool y
depends on 64BIT
 
-config SYSVIPC_COMPAT
-   def_bool y
-   depends on COMPAT && SYSVIPC
-
 config AUDIT_ARCH
def_bool y
 
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 174edabb74fa..6edb294a34ef 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -298,11 +298,6 @@ config COMPAT
select ARCH_WANT_OLD_COMPAT_IPC
select COMPAT_OLD_SIGACTION
 
-config SYSVIPC_COMPAT
-   bool
-   depends on COMPAT && SYSVIPC
-   default y
-
 config SCHED_OMIT_FRAME_POINTER
bool
default y
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 77b5a03de13a..555b7ea5ecf5 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -399,9 +399,6 @@ config COMPAT
  (and some other stuff like libraries and such) is needed for
  executing 31 bit applications.  It is safe to say "Y".
 
-config SYSVIPC_COMPAT
-   def_bool y if COMPAT && SYSVIPC
-
 config SMP
def_bool y
 
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 9200bc04701c..9c1cce74953a 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -488,9 +488,4 @@ config COMPAT
select ARCH_WANT_OLD_COMPAT_IPC
select COMPAT_OLD_SIGACTION
 
-config SYSVIPC_COMPAT
-   bool
-   depends on COMPAT && SYSVIPC
-   default y
-
 source "drivers/sbus/char/Kconfig"
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index b0142e01002e..65690b950f5f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -2872,10 +2872,6 @@ config COMPAT
 if COMPAT
 config COMPAT_FOR_U64_ALIGNMENT
def_bool y
-
-config SYSVIPC_COMPAT
-   def_bool y
-   depends on SYSVIPC
 endif
 
 endmenu
diff --git a/init/Kconfig b/init/Kconfig
index ddcbefe535e9..9fa3ee6bf12a 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -390,6 +390,10 @@ config SYSVIPC_SYSCTL
depends on SYSCTL
default y
 
+config SYSVIPC_COMPAT
+   def_bool y
+   depends on COMPAT && SYSVIPC
+
 config POSIX_MQUEUE
bool "POSIX Message Queues"
depends on NET
-- 
2.25.1

[PATCH V12 03/20] compat: consolidate the compat_flock{, 64} definition

[guoren]

From: Christoph Hellwig 

Provide a single common definition for the compat_flock and
compat_flock64 structures using the same tricks as for the native
variants.  Another extra define is added for the packing required on
x86.

Signed-off-by: Christoph Hellwig 
Signed-off-by: Guo Ren 
Reviewed-by: Arnd Bergmann 
Tested-by: Heiko Stuebner 
Acked-by: Helge Deller   # parisc
---
 arch/arm64/include/asm/compat.h   | 16 
 arch/mips/include/asm/compat.h| 19 ++-
 arch/parisc/include/asm/compat.h  | 16 
 arch/powerpc/include/asm/compat.h | 16 
 arch/s390/include/asm/compat.h| 16 
 arch/sparc/include/asm/compat.h   | 18 +-
 arch/x86/include/asm/compat.h | 20 +++-
 include/linux/compat.h| 31 +++
 8 files changed, 37 insertions(+), 115 deletions(-)

diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h
index 276328765408..e0faec1984a1 100644
--- a/arch/arm64/include/asm/compat.h
+++ b/arch/arm64/include/asm/compat.h
@@ -65,22 +65,6 @@ struct compat_stat {
compat_ulong_t  __unused4[2];
 };
 
-struct compat_flock {
-   short   l_type;
-   short   l_whence;
-   compat_off_tl_start;
-   compat_off_tl_len;
-   compat_pid_tl_pid;
-};
-
-struct compat_flock64 {
-   short   l_type;
-   short   l_whence;
-   compat_loff_t   l_start;
-   compat_loff_t   l_len;
-   compat_pid_tl_pid;
-};
-
 struct compat_statfs {
int f_type;
int f_bsize;
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index 6a350c1f70d7..6d6e5a451f4d 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -55,23 +55,8 @@ struct compat_stat {
s32 st_pad4[14];
 };
 
-struct compat_flock {
-   short   l_type;
-   short   l_whence;
-   compat_off_tl_start;
-   compat_off_tl_len;
-   s32 l_sysid;
-   compat_pid_tl_pid;
-   s32 pad[4];
-};
-
-struct compat_flock64 {
-   short   l_type;
-   short   l_whence;
-   compat_loff_t   l_start;
-   compat_loff_t   l_len;
-   compat_pid_tl_pid;
-};
+#define __ARCH_COMPAT_FLOCK_EXTRA_SYSIDs32 l_sysid;
+#define __ARCH_COMPAT_FLOCK_PADs32 pad[4];
 
 struct compat_statfs {
int f_type;
diff --git a/arch/parisc/include/asm/compat.h b/arch/parisc/include/asm/compat.h
index c04f5a637c39..a1e4534d8050 100644
--- a/arch/parisc/include/asm/compat.h
+++ b/arch/parisc/include/asm/compat.h
@@ -53,22 +53,6 @@ struct compat_stat {
u32 st_spare4[3];
 };
 
-struct compat_flock {
-   short   l_type;
-   short   l_whence;
-   compat_off_tl_start;
-   compat_off_tl_len;
-   compat_pid_tl_pid;
-};
-
-struct compat_flock64 {
-   short   l_type;
-   short   l_whence;
-   compat_loff_t   l_start;
-   compat_loff_t   l_len;
-   compat_pid_tl_pid;
-};
-
 struct compat_statfs {
s32 f_type;
s32 f_bsize;
diff --git a/arch/powerpc/include/asm/compat.h 
b/arch/powerpc/include/asm/compat.h
index 83d8f70779cb..5ef3c7c83c34 100644
--- a/arch/powerpc/include/asm/compat.h
+++ b/arch/powerpc/include/asm/compat.h
@@ -44,22 +44,6 @@ struct compat_stat {
u32 __unused4[2];
 };
 
-struct compat_flock {
-   short   l_type;
-   short   l_whence;
-   compat_off_tl_start;
-   compat_off_tl_len;
-   compat_pid_tl_pid;
-};
-
-struct compat_flock64 {
-   short   l_type;
-   short   l_whence;
-   compat_loff_t   l_start;
-   compat_loff_t   l_len;
-   compat_pid_tl_pid;
-};
-
 struct compat_statfs {
int f_type;
int f_bsize;
diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
index 0f14b3188b1b..07f04d37068b 100644
--- a/arch/s390/include/asm/compat.h
+++ b/arch/s390/include/asm/compat.h
@@ -102,22 +102,6 @@ struct compat_stat {
u32 __unused5;
 };
 
-struct compat_flock {
-   short   l_type;
-   short   l_whence;
-   compat_off_tl_start;
-   compat_off_tl_len;
-   compat_pid_tl_pid;
-};
-
-struct compat_flock64 {
-   short   l_type;
-   short   l_whence;
-   compat_loff_t   l_start;
-   compat_loff_t   l_len;
-   compat_pid_tl_pid;
-};
-
 struct compat_statfs {
u32 f_type;
u32 f_bsize;
diff --git a/arch/sparc/include/asm/compat.h 

[PATCH V12 02/20] uapi: always define F_GETLK64/F_SETLK64/F_SETLKW64 in fcntl.h

[guoren]

From: Christoph Hellwig 

The F_GETLK64/F_SETLK64/F_SETLKW64 fcntl opcodes are only implemented
for the 32-bit syscall APIs, but are also needed for compat handling
on 64-bit kernels.

Consolidate them in unistd.h instead of definining the internal compat
definitions in compat.h, which is rather error prone (e.g. parisc
gets the values wrong currently).

Note that before this change they were never visible to userspace due
to the fact that CONFIG_64BIT is only set for kernel builds.

Signed-off-by: Christoph Hellwig 
Signed-off-by: Guo Ren 
Reviewed-by: Arnd Bergmann 
Tested-by: Heiko Stuebner 
---
 arch/arm64/include/asm/compat.h| 4 
 arch/mips/include/asm/compat.h | 4 
 arch/mips/include/uapi/asm/fcntl.h | 4 ++--
 arch/powerpc/include/asm/compat.h  | 4 
 arch/s390/include/asm/compat.h | 4 
 arch/sparc/include/asm/compat.h| 4 
 arch/x86/include/asm/compat.h  | 4 
 include/uapi/asm-generic/fcntl.h   | 4 ++--
 tools/include/uapi/asm-generic/fcntl.h | 2 --
 9 files changed, 4 insertions(+), 30 deletions(-)

diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h
index eaa6ca062d89..276328765408 100644
--- a/arch/arm64/include/asm/compat.h
+++ b/arch/arm64/include/asm/compat.h
@@ -73,10 +73,6 @@ struct compat_flock {
compat_pid_tl_pid;
 };
 
-#define F_GETLK64  12  /*  using 'struct flock64' */
-#define F_SETLK64  13
-#define F_SETLKW64 14
-
 struct compat_flock64 {
short   l_type;
short   l_whence;
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index bbb3bc5a42fd..6a350c1f70d7 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -65,10 +65,6 @@ struct compat_flock {
s32 pad[4];
 };
 
-#define F_GETLK64  33
-#define F_SETLK64  34
-#define F_SETLKW64 35
-
 struct compat_flock64 {
short   l_type;
short   l_whence;
diff --git a/arch/mips/include/uapi/asm/fcntl.h 
b/arch/mips/include/uapi/asm/fcntl.h
index 9e44ac810db9..0369a38e3d4f 100644
--- a/arch/mips/include/uapi/asm/fcntl.h
+++ b/arch/mips/include/uapi/asm/fcntl.h
@@ -44,11 +44,11 @@
 #define F_SETOWN   24  /*  for sockets. */
 #define F_GETOWN   23  /*  for sockets. */
 
-#ifndef __mips64
+#if __BITS_PER_LONG == 32 || defined(__KERNEL__)
 #define F_GETLK64  33  /*  using 'struct flock64' */
 #define F_SETLK64  34
 #define F_SETLKW64 35
-#endif
+#endif /* __BITS_PER_LONG == 32 || defined(__KERNEL__) */
 
 #if _MIPS_SIM != _MIPS_SIM_ABI64
 #define __ARCH_FLOCK_EXTRA_SYSID   long l_sysid;
diff --git a/arch/powerpc/include/asm/compat.h 
b/arch/powerpc/include/asm/compat.h
index 7afc96fb6524..83d8f70779cb 100644
--- a/arch/powerpc/include/asm/compat.h
+++ b/arch/powerpc/include/asm/compat.h
@@ -52,10 +52,6 @@ struct compat_flock {
compat_pid_tl_pid;
 };
 
-#define F_GETLK64  12  /*  using 'struct flock64' */
-#define F_SETLK64  13
-#define F_SETLKW64 14
-
 struct compat_flock64 {
short   l_type;
short   l_whence;
diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
index cdc7ae72529d..0f14b3188b1b 100644
--- a/arch/s390/include/asm/compat.h
+++ b/arch/s390/include/asm/compat.h
@@ -110,10 +110,6 @@ struct compat_flock {
compat_pid_tl_pid;
 };
 
-#define F_GETLK64   12
-#define F_SETLK64   13
-#define F_SETLKW64  14
-
 struct compat_flock64 {
short   l_type;
short   l_whence;
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h
index bd949fcf9d63..108078751bb5 100644
--- a/arch/sparc/include/asm/compat.h
+++ b/arch/sparc/include/asm/compat.h
@@ -84,10 +84,6 @@ struct compat_flock {
short   __unused;
 };
 
-#define F_GETLK64  12
-#define F_SETLK64  13
-#define F_SETLKW64 14
-
 struct compat_flock64 {
short   l_type;
short   l_whence;
diff --git a/arch/x86/include/asm/compat.h b/arch/x86/include/asm/compat.h
index 7516e4199b3c..8d19a212f4f2 100644
--- a/arch/x86/include/asm/compat.h
+++ b/arch/x86/include/asm/compat.h
@@ -58,10 +58,6 @@ struct compat_flock {
compat_pid_tl_pid;
 };
 
-#define F_GETLK64  12  /*  using 'struct flock64' */
-#define F_SETLK64  13
-#define F_SETLKW64 14
-
 /*
  * IA32 uses 4 byte alignment for 64 bit quantities,
  * so we need to pack this structure.
diff --git a/include/uapi/asm-generic/fcntl.h b/include/uapi/asm-generic/fcntl.h
index 77aa9f2ff98d..f13d37b60775 100644
--- a/include/uapi/asm-generic/fcntl.h
+++ b/include/uapi/asm-generic/fcntl.h
@@ -116,13 +116,13 @@
 #define F_GETSIG   11  /* for sockets. */
 #endif
 
-#ifndef CONFIG_64BIT
+#if __BITS_PER_LONG == 32 || defined(__KERNEL__)
 #ifndef F_GETLK64
 #define F_GETLK64  12  /*  using 'struct 

[PATCH V12 01/20] uapi: simplify __ARCH_FLOCK{,64}_PAD a little

[guoren]

From: Christoph Hellwig 

Don't bother to define the symbols empty, just don't use them.
That makes the intent a little more clear.

Remove the unused HAVE_ARCH_STRUCT_FLOCK64 define and merge the
32-bit mips struct flock into the generic one.

Add a new __ARCH_FLOCK_EXTRA_SYSID macro following the style of
__ARCH_FLOCK_PAD to avoid having a separate definition just for
one architecture.

Signed-off-by: Christoph Hellwig 
Signed-off-by: Guo Ren 
Reviewed-by: Arnd Bergmann 
Tested-by: Heiko Stuebner 
---
 arch/mips/include/uapi/asm/fcntl.h | 26 +++---
 include/uapi/asm-generic/fcntl.h   | 19 +++
 tools/include/uapi/asm-generic/fcntl.h | 19 +++
 3 files changed, 17 insertions(+), 47 deletions(-)

diff --git a/arch/mips/include/uapi/asm/fcntl.h 
b/arch/mips/include/uapi/asm/fcntl.h
index 42e13dead543..9e44ac810db9 100644
--- a/arch/mips/include/uapi/asm/fcntl.h
+++ b/arch/mips/include/uapi/asm/fcntl.h
@@ -50,30 +50,10 @@
 #define F_SETLKW64 35
 #endif
 
-/*
- * The flavours of struct flock.  "struct flock" is the ABI compliant
- * variant.  Finally struct flock64 is the LFS variant of struct flock.
 As
- * a historic accident and inconsistence with the ABI definition it doesn't
- * contain all the same fields as struct flock.
- */
-
 #if _MIPS_SIM != _MIPS_SIM_ABI64
-
-#include 
-
-struct flock {
-   short   l_type;
-   short   l_whence;
-   __kernel_off_t  l_start;
-   __kernel_off_t  l_len;
-   longl_sysid;
-   __kernel_pid_t l_pid;
-   longpad[4];
-};
-
-#define HAVE_ARCH_STRUCT_FLOCK
-
-#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+#define __ARCH_FLOCK_EXTRA_SYSID   long l_sysid;
+#define __ARCH_FLOCK_PAD   long pad[4];
+#endif
 
 #include 
 
diff --git a/include/uapi/asm-generic/fcntl.h b/include/uapi/asm-generic/fcntl.h
index ecd0f5bdfc1d..77aa9f2ff98d 100644
--- a/include/uapi/asm-generic/fcntl.h
+++ b/include/uapi/asm-generic/fcntl.h
@@ -192,25 +192,19 @@ struct f_owner_ex {
 
 #define F_LINUX_SPECIFIC_BASE  1024
 
-#ifndef HAVE_ARCH_STRUCT_FLOCK
-#ifndef __ARCH_FLOCK_PAD
-#define __ARCH_FLOCK_PAD
-#endif
-
 struct flock {
short   l_type;
short   l_whence;
__kernel_off_t  l_start;
__kernel_off_t  l_len;
__kernel_pid_t  l_pid;
-   __ARCH_FLOCK_PAD
-};
+#ifdef __ARCH_FLOCK_EXTRA_SYSID
+   __ARCH_FLOCK_EXTRA_SYSID
 #endif
-
-#ifndef HAVE_ARCH_STRUCT_FLOCK64
-#ifndef __ARCH_FLOCK64_PAD
-#define __ARCH_FLOCK64_PAD
+#ifdef __ARCH_FLOCK_PAD
+   __ARCH_FLOCK_PAD
 #endif
+};
 
 struct flock64 {
short  l_type;
@@ -218,8 +212,9 @@ struct flock64 {
__kernel_loff_t l_start;
__kernel_loff_t l_len;
__kernel_pid_t  l_pid;
+#ifdef __ARCH_FLOCK64_PAD
__ARCH_FLOCK64_PAD
-};
 #endif
+};
 
 #endif /* _ASM_GENERIC_FCNTL_H */
diff --git a/tools/include/uapi/asm-generic/fcntl.h 
b/tools/include/uapi/asm-generic/fcntl.h
index ac190958c981..99bc9b15ce2b 100644
--- a/tools/include/uapi/asm-generic/fcntl.h
+++ b/tools/include/uapi/asm-generic/fcntl.h
@@ -187,25 +187,19 @@ struct f_owner_ex {
 
 #define F_LINUX_SPECIFIC_BASE  1024
 
-#ifndef HAVE_ARCH_STRUCT_FLOCK
-#ifndef __ARCH_FLOCK_PAD
-#define __ARCH_FLOCK_PAD
-#endif
-
 struct flock {
short   l_type;
short   l_whence;
__kernel_off_t  l_start;
__kernel_off_t  l_len;
__kernel_pid_t  l_pid;
-   __ARCH_FLOCK_PAD
-};
+#ifdef __ARCH_FLOCK_EXTRA_SYSID
+   __ARCH_FLOCK_EXTRA_SYSID
 #endif
-
-#ifndef HAVE_ARCH_STRUCT_FLOCK64
-#ifndef __ARCH_FLOCK64_PAD
-#define __ARCH_FLOCK64_PAD
+#ifdef __ARCH_FLOCK_PAD
+   __ARCH_FLOCK_PAD
 #endif
+};
 
 struct flock64 {
short  l_type;
@@ -213,8 +207,9 @@ struct flock64 {
__kernel_loff_t l_start;
__kernel_loff_t l_len;
__kernel_pid_t  l_pid;
+#ifdef __ARCH_FLOCK64_PAD
__ARCH_FLOCK64_PAD
-};
 #endif
+};
 
 #endif /* _ASM_GENERIC_FCNTL_H */
-- 
2.25.1

[PATCH V12 00/20] riscv: Add COMPAT mode support for 64BIT

[guoren]

From: Guo Ren 

Currently, most 64-bit architectures (x86, parisc, powerpc, arm64,
s390, mips, sparc) have supported COMPAT mode. But they all have
history issues and can't use standard linux unistd.h. RISC-V would
be first standard __SYSCALL_COMPAT user of include/uapi/asm-generic
/unistd.h.

The patchset are based on v5.18-rc1, you can compare rv64-compat
v.s. rv32-native in qemu with following steps:

 - Prepare rv32 rootfs & fw_jump.bin by buildroot.org
   $ git clone git://git.busybox.net/buildroot
   $ cd buildroot
   $ make qemu_riscv32_virt_defconfig O=qemu_riscv32_virt_defconfig
   $ make -C qemu_riscv32_virt_defconfig
   $ make qemu_riscv64_virt_defconfig O=qemu_riscv64_virt_defconfig
   $ make -C qemu_riscv64_virt_defconfig
   (Got fw_jump.bin & rootfs.ext2 in qemu_riscvXX_virt_defconfig/images)

 - Prepare Linux rv32 & rv64 Image
   $ git clone g...@github.com:c-sky/csky-linux.git -b riscv_compat_v12 linux
   $ cd linux
   $ echo "CONFIG_STRICT_KERNEL_RWX=n" >> arch/riscv/configs/defconfig
   $ echo "CONFIG_STRICT_MODULE_RWX=n" >> arch/riscv/configs/defconfig
   $ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- 
O=../build-rv32/ rv32_defconfig
   $ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- 
O=../build-rv32/ Image
   $ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- 
O=../build-rv64/ defconfig
   $ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- 
O=../build-rv64/ Image

 - Prepare Qemu:
   $ git clone https://gitlab.com/qemu-project/qemu.git -b master linux
   $ cd qemu
   $ ./configure --target-list="riscv64-softmmu riscv32-softmmu"
   $ make

Now let's compare rv64-compat with rv32-native memory footprint with almost the 
same
defconfig, rootfs, opensbi in one qemu.

 - Run rv64 with rv32 rootfs in compat mode:
   $ ./build/qemu-system-riscv64 -cpu rv64 -M virt -m 64m -nographic -bios 
qemu_riscv64_virt_defconfig/images/fw_jump.bin -kernel build-rv64/Image -drive 
file qemu_riscv32_virt_defconfig/images/rootfs.ext2,format=raw,id=hd0 -device 
virtio-blk-device,drive=hd0 -append "rootwait root=/dev/vda ro console=ttyS0 
earlycon=sbi" -netdev user,id=net0 -device virtio-net-device,netdev=net0

QEMU emulator version 6.2.50 (v6.2.0-29-g196d7182c8)
OpenSBI v0.9
[0.00] Linux version 5.16.0-rc6-00017-g750f87086bdd-dirty 
(guoren@guoren-Z87-HD3) (riscv64-unknown-linux-gnu-gcc (GCC) 10.2.0, GNU ld 
(GNU Binutils) 2.37) #96 SMP Tue Dec 28 21:01:55 CST 2021
[0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020
[0.00] Machine model: riscv-virtio,qemu
[0.00] earlycon: sbi0 at I/O port 0x0 (options '')
[0.00] printk: bootconsole [sbi0] enabled
[0.00] efi: UEFI not found.
[0.00] Zone ranges:
[0.00]   DMA32[mem 0x8020-0x83ff]
[0.00]   Normal   empty
[0.00] Movable zone start for each node
[0.00] Early memory node ranges
[0.00]   node   0: [mem 0x8020-0x83ff]
[0.00] Initmem setup node 0 [mem 0x8020-0x83ff]
[0.00] SBI specification v0.2 detected
[0.00] SBI implementation ID=0x1 Version=0x9
[0.00] SBI TIME extension detected
[0.00] SBI IPI extension detected
[0.00] SBI RFENCE extension detected
[0.00] SBI v0.2 HSM extension detected
[0.00] riscv: ISA extensions acdfhimsu
[0.00] riscv: ELF capabilities acdfim
[0.00] percpu: Embedded 17 pages/cpu s30696 r8192 d30744 u69632
[0.00] Built 1 zonelists, mobility grouping on.  Total pages: 15655
[0.00] Kernel command line: rootwait root=/dev/vda ro console=ttyS0 
earlycon=sbi
[0.00] Dentry cache hash table entries: 8192 (order: 4, 65536 bytes, 
linear)
[0.00] Inode-cache hash table entries: 4096 (order: 3, 32768 bytes, 
linear)
[0.00] mem auto-init: stack:off, heap alloc:off, heap free:off
[0.00] Virtual kernel memory layout:
[0.00]   fixmap : 0xffcefee0 - 0xffceff00   (2048 
kB)
[0.00]   pci io : 0xffceff00 - 0xffcf   (  16 
MB)
[0.00]  vmemmap : 0xffcf - 0xffcf   (4095 
MB)
[0.00]  vmalloc : 0xffd0 - 0xffdf   (65535 
MB)
[0.00]   lowmem : 0xffe0 - 0xffe003e0   (  62 
MB)
[0.00]   kernel : 0x8000 - 0x   (2047 
MB)
[0.00] Memory: 52788K/63488K available (6184K kernel code, 888K rwdata, 
1917K rodata, 294K init, 297K bss, 10700K reserved, 0K cma-reserved)
[0.00] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[0.00] rcu: Hierarchical RCU implementation.
[0.00] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=1.
[0.00] rcu: RCU debug extended QS entry/exit.
[0.00]  Tracing variant of Tasks RCU enabled.
[0.00] rcu: RCU calculated value of 

Re: [PATCH v2 1/2] powerpc/powernv: Get L1D flush requirements from device-tree

[Michael Ellerman]

Joel Stanley  writes:
> On Mon, 4 Apr 2022 at 10:15, Russell Currey  wrote:
>>
>> The device-tree properties no-need-l1d-flush-msr-pr-1-to-0 and
>> no-need-l1d-flush-kernel-on-user-access are the equivalents of
>> H_CPU_BEHAV_NO_L1D_FLUSH_ENTRY and H_CPU_BEHAV_NO_L1D_FLUSH_UACCESS
>> from the H_GET_CPU_CHARACTERISTICS hcall on pseries respectively.
>>
>> In commit d02fa40d759f ("powerpc/powernv: Remove POWER9 PVR version
>> check for entry and uaccess flushes") the condition for disabling the
>> L1D flush on kernel entry and user access was changed from any non-P9
>> CPU to only checking P7 and P8.  Without the appropriate device-tree
>> checks for newer processors on powernv, these flushes are unnecessarily
>> enabled on those systems.  This patch corrects this.
>>
>> Fixes: d02fa40d759f ("powerpc/powernv: Remove POWER9 PVR version check for 
>> entry and uaccess flushes")
>> Reported-by: Joel Stanley 
>> Signed-off-by: Russell Currey 
>
> I booted both patches in this series on a power10 powernv machine,
> applied on top of v5.18-rc1:
>
> $ dmesg |grep -i flush
> [0.00] rfi-flush: fallback displacement flush available
> [0.00] rfi-flush: patched 12 locations (no flush)
> [0.00] count-cache-flush: flush disabled.
> [0.00] link-stack-flush: flush disabled.
>
> $ grep . /sys/devices/system/cpu/vulnerabilities/*
> /sys/devices/system/cpu/vulnerabilities/itlb_multihit:Not affected
> /sys/devices/system/cpu/vulnerabilities/l1tf:Not affected
> /sys/devices/system/cpu/vulnerabilities/mds:Not affected
> /sys/devices/system/cpu/vulnerabilities/meltdown:Not affected
> /sys/devices/system/cpu/vulnerabilities/spec_store_bypass:Not affected
> /sys/devices/system/cpu/vulnerabilities/spectre_v1:Mitigation: __user
> pointer sanitization, ori31 speculation barrier enabled
> /sys/devices/system/cpu/vulnerabilities/spectre_v2:Mitigation:
> Software count cache flush (hardware accelerated), Software link stack
> flush
> /sys/devices/system/cpu/vulnerabilities/srbds:Not affected
> /sys/devices/system/cpu/vulnerabilities/tsx_async_abort:Not affected
>
> Does that match what we expect?

AFAIK yes. Happy for ruscur to correct me though.

Can you also try running the kernel selftests under
tools/testing/selftests/powerpc/security/ ?

I suspect some of them might fail, because they have specific knowledge
of things and might need an update.

cheers

Re: [PATCH V11 00/20] riscv: Add COMPAT mode support for rv64

[Guo Ren]

Hi Palmer,

On Tue, Apr 5, 2022 at 7:06 AM Palmer Dabbelt  wrote:
>
> On Mon, 04 Apr 2022 07:28:50 PDT (-0700), guo...@kernel.org wrote:
> > On Sat, Apr 2, 2022 at 10:04 PM Guo Ren  wrote:
> >>
> >> Hi Palmer,
> >>
> >> Sorry for the late reply, I still want COMPAT to catch up at 5.18..
> >> I've pushed it into my next branch, and it would get in linux-next the
> >> next day. You could have a look at that. The repo is:
> >> https://github.com/c-sky/csky-linux/tree/linux-next
> >>
> >> We still need your sending pull request for COMPAT, thank you very much.
>
> Sorry, but it was still failing the autobuilders on the previous
> versions and Saturday night is way, way too late for a respin of a big
> patch set.
It's my fault to miss the arm64 auto builder problem, and I've fixed it in v12.

>
> > Seems we have already missed 5.18, I just prepared the 5.18-rc1 for
> > you. It solved the arm64 compile problem and some conflicts, Hope you
> > could put it into your for-next (5.19-rc1).
> > https://github.com/c-sky/csky-linux/tree/riscv_compat_v12
>
> This says v11, but that says v12.  I'm going to put the v11 that was
> sent to the lists in a branch for the autobuilders to test again, but
> LMK if there's a difference (maybe by sending the v12?).  Might take a
> bit for me to get everything bumped and tested, my machine's super flaky
> right now...
v11 is based on 5.17-rc8, so you could abandon it.:
https://github.com/c-sky/csky-linux/commits/riscv_compat_v11

v12 is based on 5.18-rc1 (I haven't sent patches series to the list):
https://github.com/c-sky/csky-linux/commits/riscv_compat_v12

A new compile problem has been reported by Nathan and I've fixed it in
v12. I will soon send out the v12 patchset series in the mail list.





>
> >
> >>
> >> On Sat, Apr 2, 2022 at 9:53 PM  wrote:
> >> >
> >> > From: Guo Ren 
> >> >
> >> > Currently, most 64-bit architectures (x86, parisc, powerpc, arm64,
> >> > s390, mips, sparc) have supported COMPAT mode. But they all have
> >> > history issues and can't use standard linux unistd.h. RISC-V would
> >> > be first standard __SYSCALL_COMPAT user of include/uapi/asm-generic
> >> > /unistd.h.
> >> >
> >> > The patchset are based on v5.17-rc8, you can compare rv64-compat
> >> > v.s. rv32-native in qemu with following steps:
> >> >
> >> >  - Prepare rv32 rootfs & fw_jump.bin by buildroot.org
> >> >$ git clone git://git.busybox.net/buildroot
> >> >$ cd buildroot
> >> >$ make qemu_riscv32_virt_defconfig O=qemu_riscv32_virt_defconfig
> >> >$ make -C qemu_riscv32_virt_defconfig
> >> >$ make qemu_riscv64_virt_defconfig O=qemu_riscv64_virt_defconfig
> >> >$ make -C qemu_riscv64_virt_defconfig
> >> >(Got fw_jump.bin & rootfs.ext2 in qemu_riscvXX_virt_defconfig/images)
> >> >
> >> >  - Prepare Linux rv32 & rv64 Image
> >> >$ git clone g...@github.com:c-sky/csky-linux.git -b riscv_compat_v11 
> >> > linux
> >> >$ cd linux
> >> >$ echo "CONFIG_STRICT_KERNEL_RWX=n" >> arch/riscv/configs/defconfig
> >> >$ echo "CONFIG_STRICT_MODULE_RWX=n" >> arch/riscv/configs/defconfig
> >> >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- 
> >> > O=../build-rv32/ rv32_defconfig
> >> >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- 
> >> > O=../build-rv32/ Image
> >> >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- 
> >> > O=../build-rv64/ defconfig
> >> >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- 
> >> > O=../build-rv64/ Image
> >> >
> >> >  - Prepare Qemu:
> >> >$ git clone https://gitlab.com/qemu-project/qemu.git -b master linux
> >> >$ cd qemu
> >> >$ ./configure --target-list="riscv64-softmmu riscv32-softmmu"
> >> >$ make
> >> >
> >> > Now let's compare rv64-compat with rv32-native memory footprint with 
> >> > almost the same
> >> > defconfig, rootfs, opensbi in one qemu.
> >> >
> >> >  - Run rv64 with rv32 rootfs in compat mode:
> >> >$ ./build/qemu-system-riscv64 -cpu rv64 -M virt -m 64m -nographic 
> >> > -bios qemu_riscv64_virt_defconfig/images/fw_jump.bin -kernel 
> >> > build-rv64/Image -drive file 
> >> > qemu_riscv32_virt_defconfig/images/rootfs.ext2,format=raw,id=hd0 -device 
> >> > virtio-blk-device,drive=hd0 -append "rootwait root=/dev/vda ro 
> >> > console=ttyS0 earlycon=sbi" -netdev user,id=net0 -device 
> >> > virtio-net-device,netdev=net0
> >> >
> >> > QEMU emulator version 6.2.50 (v6.2.0-29-g196d7182c8)
> >> > OpenSBI v0.9
> >> > [0.00] Linux version 5.16.0-rc6-00017-g750f87086bdd-dirty 
> >> > (guoren@guoren-Z87-HD3) (riscv64-unknown-linux-gnu-gcc (GCC) 10.2.0, GNU 
> >> > ld (GNU Binutils) 2.37) #96 SMP Tue Dec 28 21:01:55 CST 2021
> >> > [0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020
> >> > [0.00] Machine model: riscv-virtio,qemu
> >> > [0.00] earlycon: sbi0 at I/O port 0x0 (options '')
> >> > [0.00] printk: bootconsole [sbi0] enabled
> >> > [0.00] efi: UEFI not found.
> >> > [