[PATCH 0/3] powerpc/kvm: Enable HV KVM guests to use prefixed instructions to access emulated MMIO

2023-03-07 Thread Paul Mackerras
This series changes the powerpc KVM code so that HV KVM can fetch
prefixed instructions from the guest in those situations where there
is a need to emulate an instruction, which for HV KVM means emulating
loads and stores to emulated MMIO devices.  (Prefixed instructions
were introduced with POWER10 and Power ISA v3.1, and consist of two
32-bit words, called the prefix and the suffix.)

The instruction analysis code in arch/powerpc/lib/sstep.c has already
been extended to handle prefixed loads and stores, so all we have to
do in HV KVM is to fetch the suffix when necessary and pass it to
analyse_instr().

Since PR KVM doesn't yet handle prefixed instructions, we disable PR
KVM guests from using prefixed instructions (this is done using the
FSCR).

Paul.

 arch/powerpc/include/asm/kvm_host.h  |  4 ++--
 arch/powerpc/include/asm/kvm_ppc.h   | 37 +++-
 arch/powerpc/include/asm/reg.h   |  1 +
 arch/powerpc/kvm/book3s.c| 32 ++-
 arch/powerpc/kvm/book3s_64_mmu_hv.c  | 26 --
 arch/powerpc/kvm/book3s_hv.c | 24 ++---
 arch/powerpc/kvm/book3s_hv_rmhandlers.S  |  6 +++---
 arch/powerpc/kvm/book3s_paired_singles.c |  4 +++-
 arch/powerpc/kvm/book3s_pr.c | 22 ++-
 arch/powerpc/kvm/book3s_rmhandlers.S |  1 +
 arch/powerpc/kvm/booke.c | 12 +++
 arch/powerpc/kvm/bookehv_interrupts.S|  2 +-
 arch/powerpc/kvm/e500_mmu_host.c |  4 ++--
 arch/powerpc/kvm/emulate.c   |  8 ++-
 arch/powerpc/kvm/emulate_loadstore.c |  8 +++
 arch/powerpc/kvm/powerpc.c   |  4 ++--
 16 files changed, 136 insertions(+), 59 deletions(-)


[PATCH 1/3] powerpc/kvm: Make kvmppc_get_last_inst() produce a ppc_inst_t

2023-03-07 Thread Paul Mackerras
This changes kvmppc_get_last_inst() so that the instruction it fetches
is returned in a ppc_inst_t variable rather than a u32.  This will
allow us to return a 64-bit prefixed instruction on those 64-bit
machines that implement Power ISA v3.1 or later, such as POWER10.
On 32-bit platforms, ppc_inst_t is 32 bits wide, and is turned back
into a u32 by ppc_inst_val, which is an identity operation on those
platforms.

Reviewed-by: Nicholas Piggin 
Tested-by: Nicholas Piggin 
Signed-off-by: Paul Mackerras 
---
 arch/powerpc/include/asm/kvm_ppc.h   |  5 +++--
 arch/powerpc/kvm/book3s_64_mmu_hv.c  | 12 
 arch/powerpc/kvm/book3s_hv.c | 13 -
 arch/powerpc/kvm/book3s_paired_singles.c |  4 +++-
 arch/powerpc/kvm/book3s_pr.c | 20 ++--
 arch/powerpc/kvm/booke.c | 10 +++---
 arch/powerpc/kvm/emulate.c   |  4 +++-
 arch/powerpc/kvm/emulate_loadstore.c |  6 +++---
 arch/powerpc/kvm/powerpc.c   |  4 ++--
 9 files changed, 47 insertions(+), 31 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index eae9619b6190..307ce537 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -28,6 +28,7 @@
 #include 
 #include 
 #endif
+#include 
 
 /*
  * KVMPPC_INST_SW_BREAKPOINT is debug Instruction
@@ -316,7 +317,7 @@ extern struct kvmppc_ops *kvmppc_hv_ops;
 extern struct kvmppc_ops *kvmppc_pr_ops;
 
 static inline int kvmppc_get_last_inst(struct kvm_vcpu *vcpu,
-   enum instruction_fetch_type type, u32 *inst)
+   enum instruction_fetch_type type, ppc_inst_t 
*inst)
 {
int ret = EMULATE_DONE;
u32 fetched_inst;
@@ -334,7 +335,7 @@ static inline int kvmppc_get_last_inst(struct kvm_vcpu 
*vcpu,
else
fetched_inst = vcpu->arch.last_inst;
 
-   *inst = fetched_inst;
+   *inst = ppc_inst(fetched_inst);
return ret;
 }
 
diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c 
b/arch/powerpc/kvm/book3s_64_mmu_hv.c
index 7006bcbc2e37..0be313e71615 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_hv.c
@@ -415,20 +415,24 @@ static int kvmppc_mmu_book3s_64_hv_xlate(struct kvm_vcpu 
*vcpu, gva_t eaddr,
  * embodied here.)  If the instruction isn't a load or store, then
  * this doesn't return anything useful.
  */
-static int instruction_is_store(unsigned int instr)
+static int instruction_is_store(ppc_inst_t instr)
 {
unsigned int mask;
+   unsigned int suffix;
 
mask = 0x1000;
-   if ((instr & 0xfc00) == 0x7c00)
+   suffix = ppc_inst_val(instr);
+   if (ppc_inst_prefixed(instr))
+   suffix = ppc_inst_suffix(instr);
+   else if ((suffix & 0xfc00) == 0x7c00)
mask = 0x100;   /* major opcode 31 */
-   return (instr & mask) != 0;
+   return (suffix & mask) != 0;
 }
 
 int kvmppc_hv_emulate_mmio(struct kvm_vcpu *vcpu,
   unsigned long gpa, gva_t ea, int is_store)
 {
-   u32 last_inst;
+   ppc_inst_t last_inst;
 
/*
 * Fast path - check if the guest physical address corresponds to a
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 6ba68dd6190b..7d1aede06153 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -1412,7 +1412,7 @@ static int kvmppc_hcall_impl_hv(unsigned long cmd)
 
 static int kvmppc_emulate_debug_inst(struct kvm_vcpu *vcpu)
 {
-   u32 last_inst;
+   ppc_inst_t last_inst;
 
if (kvmppc_get_last_inst(vcpu, INST_GENERIC, _inst) !=
EMULATE_DONE) {
@@ -1423,7 +1423,7 @@ static int kvmppc_emulate_debug_inst(struct kvm_vcpu 
*vcpu)
return RESUME_GUEST;
}
 
-   if (last_inst == KVMPPC_INST_SW_BREAKPOINT) {
+   if (ppc_inst_val(last_inst) == KVMPPC_INST_SW_BREAKPOINT) {
vcpu->run->exit_reason = KVM_EXIT_DEBUG;
vcpu->run->debug.arch.address = kvmppc_get_pc(vcpu);
return RESUME_HOST;
@@ -1476,9 +1476,11 @@ static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu 
*vcpu)
unsigned long arg;
struct kvm *kvm = vcpu->kvm;
struct kvm_vcpu *tvcpu;
+   ppc_inst_t pinst;
 
-   if (kvmppc_get_last_inst(vcpu, INST_GENERIC, ) != EMULATE_DONE)
+   if (kvmppc_get_last_inst(vcpu, INST_GENERIC, ) != EMULATE_DONE)
return RESUME_GUEST;
+   inst = ppc_inst_val(pinst);
if (get_op(inst) != 31)
return EMULATE_FAIL;
rb = get_rb(inst);
@@ -1994,14 +1996,15 @@ static int kvmppc_handle_nested_exit(struct kvm_vcpu 
*vcpu)
 */
if (!(vcpu->arch.hfscr_permitted & (1UL << cause)) ||
(vcpu->arch.nested_hfscr & (1UL << cause))) {
+   

[PATCH 3/3] powerpc/kvm: Enable prefixed instructions for HV KVM and disable for PR KVM

2023-03-07 Thread Paul Mackerras
Now that we can read prefixed instructions from a HV KVM guest and
emulate prefixed load/store instructions to emulated MMIO locations,
we can add HFSCR_PREFIXED into the set of bits that are set in the
HFSCR for a HV KVM guest on POWER10, allowing the guest to use
prefixed instructions.

PR KVM has not yet been extended to handle prefixed instructions in
all situations where we might need to emulate them, so prevent the
guest from enabling prefixed instructions in the FSCR for now.

Reviewed-by: Nicholas Piggin 
Tested-by: Nicholas Piggin 
Signed-off-by: Paul Mackerras 
---
 arch/powerpc/include/asm/reg.h   | 1 +
 arch/powerpc/kvm/book3s_hv.c | 9 +++--
 arch/powerpc/kvm/book3s_pr.c | 2 ++
 arch/powerpc/kvm/book3s_rmhandlers.S | 1 +
 4 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 1e8b2e04e626..7434a3300d84 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -417,6 +417,7 @@
 #define   FSCR_DSCR__MASK(FSCR_DSCR_LG)
 #define   FSCR_INTR_CAUSE (ASM_CONST(0xFF) << 56)  /* interrupt cause */
 #define SPRN_HFSCR 0xbe/* HV=1 Facility Status & Control Register */
+#define   HFSCR_PREFIX __MASK(FSCR_PREFIX_LG)
 #define   HFSCR_MSGP   __MASK(FSCR_MSGP_LG)
 #define   HFSCR_TAR__MASK(FSCR_TAR_LG)
 #define   HFSCR_EBB__MASK(FSCR_EBB_LG)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 0d17f4443021..c5b24ab90fb2 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -2921,13 +2921,18 @@ static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu 
*vcpu)
 
/*
 * Set the default HFSCR for the guest from the host value.
-* This value is only used on POWER9.
-* On POWER9, we want to virtualize the doorbell facility, so we
+* This value is only used on POWER9 and later.
+* On >= POWER9, we want to virtualize the doorbell facility, so we
 * don't set the HFSCR_MSGP bit, and that causes those instructions
 * to trap and then we emulate them.
 */
vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB |
HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP;
+
+   /* On POWER10 and later, allow prefixed instructions */
+   if (cpu_has_feature(CPU_FTR_ARCH_31))
+   vcpu->arch.hfscr |= HFSCR_PREFIX;
+
if (cpu_has_feature(CPU_FTR_HVMODE)) {
vcpu->arch.hfscr &= mfspr(SPRN_HFSCR);
 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 940ab010a471..fa010d92a8d2 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -1044,6 +1044,8 @@ void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr)
 {
if (fscr & FSCR_SCV)
fscr &= ~FSCR_SCV; /* SCV must not be enabled */
+   /* Prohibit prefixed instructions for now */
+   fscr &= ~FSCR_PREFIX;
if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) {
/* TAR got dropped, drop it in shadow too */
kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
diff --git a/arch/powerpc/kvm/book3s_rmhandlers.S 
b/arch/powerpc/kvm/book3s_rmhandlers.S
index 03886ca24498..0a557ffca9fe 100644
--- a/arch/powerpc/kvm/book3s_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_rmhandlers.S
@@ -123,6 +123,7 @@ INTERRUPT_TRAMPOLINEBOOK3S_INTERRUPT_ALTIVEC
 kvmppc_handler_skip_ins:
 
/* Patch the IP to the next instruction */
+   /* Note that prefixed instructions are disabled in PR KVM for now */
mfsrr0  r12
addir12, r12, 4
mtsrr0  r12
-- 
2.37.3



[PATCH 2/3] powerpc/kvm: Fetch prefixed instructions from the guest

2023-03-07 Thread Paul Mackerras
In order to handle emulation of prefixed instructions in the guest,
this first makes vcpu->arch.last_inst be an unsigned long, i.e. 64
bits on 64-bit platforms.  For prefixed instructions, the upper 32
bits are used for the prefix and the lower 32 bits for the suffix, and
both halves are byte-swapped if the guest endianness differs from the
host.

Next, vcpu->arch.emul_inst is now 64 bits wide, to match the HEIR
register on POWER10.  Like HEIR, for a prefixed instruction it is
defined to have the prefix is in the top 32 bits and the suffix in the
bottom 32 bits, with both halves in the correct byte order.

kvmppc_get_last_inst is extended on 64-bit machines to put the prefix
and suffix in the right places in the ppc_inst_t being returned.

kvmppc_load_last_inst now returns the instruction in an unsigned long
in the same format as vcpu->arch.last_inst.  It makes the decision
about whether to fetch a suffix based on the SRR1_PREFIXED bit in the
MSR image stored in the vcpu struct, which generally comes from SRR1
or HSRR1 on an interrupt.  This bit is defined in Power ISA v3.1B to
be set if the interrupt occurred due to a prefixed instruction and
cleared otherwise for all interrupts except for instruction storage
interrupt, which does not come to the hypervisor.  It is set to zero
for asynchronous interrupts such as external interrupts.  In previous
ISA versions it was always set to 0 for all interrupts except
instruction storage interrupt.

The code in book3s_hv_rmhandlers.S that loads the faulting instruction
on a HDSI is only used on POWER8 and therefore doesn't ever need to
load a suffix.

[npig...@gmail.com - check that the is-prefixed bit in SRR1 matches the
type of instruction that was fetched.]

Reviewed-by: Nicholas Piggin 
Tested-by: Nicholas Piggin 
Signed-off-by: Paul Mackerras 
---
 arch/powerpc/include/asm/kvm_host.h |  4 ++--
 arch/powerpc/include/asm/kvm_ppc.h  | 32 ++---
 arch/powerpc/kvm/book3s.c   | 32 +
 arch/powerpc/kvm/book3s_64_mmu_hv.c | 14 +--
 arch/powerpc/kvm/book3s_hv.c|  2 +-
 arch/powerpc/kvm/book3s_hv_rmhandlers.S |  6 ++---
 arch/powerpc/kvm/booke.c|  2 +-
 arch/powerpc/kvm/bookehv_interrupts.S   |  2 +-
 arch/powerpc/kvm/e500_mmu_host.c|  4 ++--
 arch/powerpc/kvm/emulate.c  |  4 
 arch/powerpc/kvm/emulate_loadstore.c|  2 +-
 11 files changed, 78 insertions(+), 26 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index caea15dcb91d..1590659fb0f5 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -758,7 +758,7 @@ struct kvm_vcpu_arch {
u8 prodded;
u8 doorbell_request;
u8 irq_pending; /* Used by XIVE to signal pending guest irqs */
-   u32 last_inst;
+   unsigned long last_inst;
 
struct rcuwait wait;
struct rcuwait *waitp;
@@ -818,7 +818,7 @@ struct kvm_vcpu_arch {
u64 busy_stolen;
u64 busy_preempt;
 
-   u32 emul_inst;
+   u64 emul_inst;
 
u32 online;
 
diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index 307ce537..5f2033c76b58 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -85,7 +85,8 @@ extern int kvmppc_handle_vsx_store(struct kvm_vcpu *vcpu,
int is_default_endian);
 
 extern int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
-enum instruction_fetch_type type, u32 *inst);
+enum instruction_fetch_type type,
+unsigned long *inst);
 
 extern int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr,
 bool data);
@@ -328,15 +329,30 @@ static inline int kvmppc_get_last_inst(struct kvm_vcpu 
*vcpu,
ret = kvmppc_load_last_inst(vcpu, type, >arch.last_inst);
 
/*  Write fetch_failed unswapped if the fetch failed */
-   if (ret == EMULATE_DONE)
-   fetched_inst = kvmppc_need_byteswap(vcpu) ?
-   swab32(vcpu->arch.last_inst) :
-   vcpu->arch.last_inst;
-   else
-   fetched_inst = vcpu->arch.last_inst;
+   if (ret != EMULATE_DONE) {
+   *inst = ppc_inst(KVM_INST_FETCH_FAILED);
+   return ret;
+   }
+
+#ifdef CONFIG_PPC64
+   /* Is this a prefixed instruction? */
+   if ((vcpu->arch.last_inst >> 32) != 0) {
+   u32 prefix = vcpu->arch.last_inst >> 32;
+   u32 suffix = vcpu->arch.last_inst;
+   if (kvmppc_need_byteswap(vcpu)) {
+   prefix = swab32(prefix);
+   suffix = swab32(suffix);
+   }
+   *inst = ppc_inst_prefix(prefix, suffix);
+   return EMULATE_DONE;
+   }
+#endif
 
+  

Re: [PATCH] powerpc/pseries/vas: Ignore VAS update for DLPAR if copy/paste is not enabled

2023-03-07 Thread Nathan Lynch
Haren Myneni  writes:
> The hypervisor supports user-mode NX from Power10. pseries_vas_dlpar_cpu()
> is called from lparcfg_write() to update VAS windows for DLPAR CPU event
> and the kernel gets -ENOTSUPP for HCALLs if the user-mode NX is not
> supported.

The commit text would be improved by more explanation about the higher
level failure mode here. Does lparcfg_write() fail when it shouldn't? If
so, does that cause a processor DLPAR operation to spuriously fail?

pseries_vas_dlpar_cpu() is also called from pseries_vas_notifier() in
dedicated processor mode. Does this problem affect that scenario also?

> This patch ignores updating VAS capabilities and returns success if the
> copy/paste feature is not enabled.
>
> Fixes: 2147783d6bf0 ("powerpc/pseries: Use lparcfg to reconfig VAS windows 
> for DLPAR CPU")
> Signed-off-by: Haren Myneni 
> ---
>  arch/powerpc/platforms/pseries/vas.c | 8 
>  1 file changed, 8 insertions(+)
>
> diff --git a/arch/powerpc/platforms/pseries/vas.c 
> b/arch/powerpc/platforms/pseries/vas.c
> index 559112312810..dc003849d2c5 100644
> --- a/arch/powerpc/platforms/pseries/vas.c
> +++ b/arch/powerpc/platforms/pseries/vas.c
> @@ -856,6 +856,13 @@ int pseries_vas_dlpar_cpu(void)
>  {
>   int new_nr_creds, rc;
>  
> + /*
> +  * NX-GZIP is not enabled. Nothing to do for DLPAR event
> +  */
> + if (!copypaste_feat)
> + return 0;
> +
> +
>   rc = h_query_vas_capabilities(H_QUERY_VAS_CAPABILITIES,
> vascaps[VAS_GZIP_DEF_FEAT_TYPE].feat,
> (u64)virt_to_phys(_cop_caps));
> @@ -1012,6 +1019,7 @@ static int __init pseries_vas_init(void)
>* Linux supports user space COPY/PASTE only with Radix
>*/
>   if (!radix_enabled()) {
> + copypaste_feat = 0;

copypaste_feat is a bool, so use false, not 0. But otherwise I think
this looks correct and consistent with the rest of the code in vas.c.


Re: [PATCH v2 0/4] Reenable VFIO support on POWER systems

2023-03-07 Thread Timothy Pearson



- Original Message -
> From: "Alex Williamson" 
> To: "Timothy Pearson" 
> Cc: "kvm" , "linuxppc-dev" 
> 
> Sent: Monday, March 6, 2023 6:59:41 PM
> Subject: Re: [PATCH v2 0/4] Reenable VFIO support on POWER systems

> On Mon, 6 Mar 2023 18:35:22 -0600 (CST)
> Timothy Pearson  wrote:
> 
>> - Original Message -
>> > From: "Alex Williamson" 
>> > To: "Timothy Pearson" 
>> > Cc: "kvm" , "linuxppc-dev" 
>> > 
>> > Sent: Monday, March 6, 2023 5:46:07 PM
>> > Subject: Re: [PATCH v2 0/4] Reenable VFIO support on POWER systems
>> 
>> > On Mon, 6 Mar 2023 11:29:53 -0600 (CST)
>> > Timothy Pearson  wrote:
>> >   
>> >> This patch series reenables VFIO support on POWER systems.  It
>> >> is based on Alexey Kardashevskiys's patch series, rebased and
>> >> successfully tested under QEMU with a Marvell PCIe SATA controller
>> >> on a POWER9 Blackbird host.
>> >> 
>> >> Alexey Kardashevskiy (3):
>> >>   powerpc/iommu: Add "borrowing" iommu_table_group_ops
>> >>   powerpc/pci_64: Init pcibios subsys a bit later
>> >>   powerpc/iommu: Add iommu_ops to report capabilities and allow blocking
>> >> domains
>> >> 
>> >> Timothy Pearson (1):
>> >>   Add myself to MAINTAINERS for Power VFIO support
>> >> 
>> >>  MAINTAINERS   |   5 +
>> >>  arch/powerpc/include/asm/iommu.h  |   6 +-
>> >>  arch/powerpc/include/asm/pci-bridge.h |   7 +
>> >>  arch/powerpc/kernel/iommu.c   | 246 +-
>> >>  arch/powerpc/kernel/pci_64.c  |   2 +-
>> >>  arch/powerpc/platforms/powernv/pci-ioda.c |  36 +++-
>> >>  arch/powerpc/platforms/pseries/iommu.c|  27 +++
>> >>  arch/powerpc/platforms/pseries/pseries.h  |   4 +
>> >>  arch/powerpc/platforms/pseries/setup.c|   3 +
>> >>  drivers/vfio/vfio_iommu_spapr_tce.c   |  96 ++---
>> >>  10 files changed, 338 insertions(+), 94 deletions(-)
>> >>   
>> > 
>> > For vfio and MAINTAINERS portions,
>> > 
>> > Acked-by: Alex Williamson 
>> > 
>> > I'll note though that spapr_tce_take_ownership() looks like it copied a
>> > bug from the old tce_iommu_take_ownership() where tbl and tbl->it_map
>> > are tested before calling iommu_take_ownership() but not in the unwind
>> > loop, ie. tables we might have skipped on setup are unconditionally
>> > released on unwind.  Thanks,
>> > 
>> > Alex
>> 
>> Thanks for that.  I'll put together a patch to get rid of that
>> potential bug that can be applied after this series is merged, unless
>> you'd rather I resubmit a v3 with the issue fixed?
> 
> Follow-up fix is fine by me.  Thanks,
> 
> Alex

Just sent that patch in.  Thanks!


[PATCH] Check for IOMMU table validity in error handler

2023-03-07 Thread Timothy Pearson
If tce_iommu_take_ownership is unable to take ownership of
a specific IOMMU table, the unwinder in the error handler
could attempt to release ownership of an invalid table.

Check validity of each table in the unwinder before attempting
to release ownership.  Thanks to Alex Williamson for the initial
observation!

Signed-off-by: Timothy Pearson 
---
 drivers/vfio/vfio_iommu_spapr_tce.c | 11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c 
b/drivers/vfio/vfio_iommu_spapr_tce.c
index 60a50ce8701e..c012ecb42ebc 100644
--- a/drivers/vfio/vfio_iommu_spapr_tce.c
+++ b/drivers/vfio/vfio_iommu_spapr_tce.c
@@ -1219,10 +1219,15 @@ static int tce_iommu_take_ownership(struct 
tce_container *container,
 
rc = iommu_take_ownership(tbl);
if (rc) {
-   for (j = 0; j < i; ++j)
-   iommu_release_ownership(
-   table_group->tables[j]);
+   for (j = 0; j < i; ++j) {
+   struct iommu_table *tbl =
+   table_group->tables[j];
 
+   if (!tbl || !tbl->it_map)
+   continue;
+
+   iommu_release_ownership(table_group->tables[j]);
+   }
return rc;
}
}
-- 
2.30.2


Re: [PATCH v5 12/26] riscv: Remove COMMAND_LINE_SIZE from uapi

2023-03-07 Thread Palmer Dabbelt

On Mon, 06 Mar 2023 02:04:54 PST (-0800), alexgh...@rivosinc.com wrote:

As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.

Signed-off-by: Alexandre Ghiti 
---
 arch/riscv/include/asm/setup.h  | 7 +++
 arch/riscv/include/uapi/asm/setup.h | 2 --
 2 files changed, 7 insertions(+), 2 deletions(-)
 create mode 100644 arch/riscv/include/asm/setup.h

diff --git a/arch/riscv/include/asm/setup.h b/arch/riscv/include/asm/setup.h
new file mode 100644
index ..f165a14344e2
--- /dev/null
+++ b/arch/riscv/include/asm/setup.h
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef _ASM_RISCV_SETUP_H
+#define _ASM_RISCV_SETUP_H
+
+#define COMMAND_LINE_SIZE   1024
+
+#endif /* _ASM_RISCV_SETUP_H */
diff --git a/arch/riscv/include/uapi/asm/setup.h 
b/arch/riscv/include/uapi/asm/setup.h
index 66b13a522880..17fcecd4a2f8 100644
--- a/arch/riscv/include/uapi/asm/setup.h
+++ b/arch/riscv/include/uapi/asm/setup.h
@@ -3,6 +3,4 @@
 #ifndef _UAPI_ASM_RISCV_SETUP_H
 #define _UAPI_ASM_RISCV_SETUP_H

-#define COMMAND_LINE_SIZE  1024
-
 #endif /* _UAPI_ASM_RISCV_SETUP_H */


Reviewed-by: Palmer Dabbelt 
Acked-by: Palmer Dabbelt 

Thanks!


[PATCH] selftests/powerpc: Increase timeout for vsx_signal test

2023-03-07 Thread Michael Neuling
On the max config P10 machine (1920 threads and 64TB) this test fails
with a timeout:

Sending signals to all threads 10 times...!! killing vmx_signal
!! child died by signal 15
failure: vmx_signal

The default timeout is 120sec so increase this 3x to 360sec. With this
change the test passes on these large machines.

Signed-off-by: Michael Neuling 
---
 tools/testing/selftests/powerpc/math/vmx_signal.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/testing/selftests/powerpc/math/vmx_signal.c 
b/tools/testing/selftests/powerpc/math/vmx_signal.c
index b340a5c4e79d..c307dff19c12 100644
--- a/tools/testing/selftests/powerpc/math/vmx_signal.c
+++ b/tools/testing/selftests/powerpc/math/vmx_signal.c
@@ -151,5 +151,6 @@ int test_signal_vmx(void)
 
 int main(int argc, char *argv[])
 {
+   test_harness_set_timeout(360);
return test_harness(test_signal_vmx, "vmx_signal");
 }
-- 
2.39.2



RE: [PATCH V5 09/15] spi: Add stacked and parallel memories support in SPI core

2023-03-07 Thread Mahapatra, Amit Kumar
Hello,

> -Original Message-
> From: Jonas Gorski 
> Sent: Tuesday, March 7, 2023 1:31 AM
> To: Mahapatra, Amit Kumar 
> Cc: broo...@kernel.org; miquel.ray...@bootlin.com; rich...@nod.at;
> vigne...@ti.com; ji...@kernel.org; tudor.amba...@microchip.com;
> praty...@kernel.org; Mehta, Sanju ; chin-
> ting_...@aspeedtech.com; c...@kaod.org; kdasu.k...@gmail.com;
> f.faine...@gmail.com; r...@broadcom.com; sbran...@broadcom.com;
> eaja...@linux.ibm.com; olte...@gmail.com; han...@nxp.com;
> john.ga...@huawei.com; shawn...@kernel.org; s.ha...@pengutronix.de;
> narmstr...@baylibre.com; khil...@baylibre.com;
> matthias@gmail.com; haibo.c...@nxp.com; linus.wall...@linaro.org;
> dan...@zonque.org; haojian.zhu...@gmail.com; robert.jarz...@free.fr;
> agr...@kernel.org; bjorn.anders...@linaro.org; he...@sntech.de;
> krzysztof.kozlow...@linaro.org; a...@etezian.org;
> mcoquelin.st...@gmail.com; alexandre.tor...@foss.st.com;
> w...@csie.org; jernej.skra...@gmail.com; sam...@sholland.org;
> masahisa.koj...@linaro.org; jaswinder.si...@linaro.org;
> rost...@goodmis.org; mi...@redhat.com; l.stelm...@samsung.com;
> da...@davemloft.net; eduma...@google.com; k...@kernel.org;
> pab...@redhat.com; alex.ar...@gmail.com; ste...@datenfreihafen.org;
> kv...@kernel.org; james.schul...@cirrus.com; david.rho...@cirrus.com;
> tanur...@opensource.cirrus.com; r...@opensource.cirrus.com;
> pe...@perex.cz; ti...@suse.com; npig...@gmail.com;
> christophe.le...@csgroup.eu; m...@ellerman.id.au; o...@buserror.net;
> win...@126.com; yangyingli...@huawei.com;
> william.zh...@broadcom.com; kursad.o...@broadcom.com;
> anand.g...@broadcom.com; ra...@milecki.pl; git (AMD-Xilinx)
> ; linux-...@vger.kernel.org; linux-ker...@vger.kernel.org;
> j...@jms.id.au; and...@aj.id.au; radu_nicolae.pi...@upb.ro;
> nicolas.fe...@microchip.com; alexandre.bell...@bootlin.com;
> claudiu.bez...@microchip.com; bcm-kernel-feedback-l...@broadcom.com;
> fancer.lan...@gmail.com; ker...@pengutronix.de; feste...@gmail.com;
> linux-...@nxp.com; jbru...@baylibre.com;
> martin.blumensti...@googlemail.com; avifishma...@gmail.com;
> tmaimo...@gmail.com; tali.per...@gmail.com; vent...@google.com;
> yu...@google.com; benjaminf...@google.com; yogeshgaur...@gmail.com;
> konrad.dyb...@somainline.org; alim.akh...@samsung.com;
> ldewan...@nvidia.com; thierry.red...@gmail.com; jonath...@nvidia.com;
> Simek, Michal ; linux-asp...@lists.ozlabs.org;
> open...@lists.ozlabs.org; linux-arm-ker...@lists.infradead.org; linux-rpi-
> ker...@lists.infradead.org; linux-amlo...@lists.infradead.org; linux-
> media...@lists.infradead.org; linux-arm-...@vger.kernel.org; linux-
> rockc...@lists.infradead.org; linux-samsung-...@vger.kernel.org; linux-
> st...@st-md-mailman.stormreply.com; linux-su...@lists.linux.dev; linux-
> te...@vger.kernel.org; net...@vger.kernel.org; linux-
> w...@vger.kernel.org; libertas-...@lists.infradead.org; linux-
> wirel...@vger.kernel.org; linux-...@lists.infradead.org; l...@metafoo.de;
> michael.henner...@analog.com; linux-...@vger.kernel.org;
> mich...@walle.cc; pal...@dabbelt.com; linux-ri...@lists.infradead.org;
> alsa-de...@alsa-project.org; patc...@opensource.cirrus.com; linuxppc-
> d...@lists.ozlabs.org; amitrkcian2...@gmail.com
> Subject: Re: [PATCH V5 09/15] spi: Add stacked and parallel memories
> support in SPI core
> 
> Hi,
> 
> On Mon, 6 Mar 2023 at 18:26, Amit Kumar Mahapatra  mahapa...@amd.com> wrote:
> >
> > For supporting multiple CS the SPI device need to be aware of all the
> > CS values. So, the "chip_select" member in the spi_device structure is
> > now an array that holds all the CS values.
> >
> > spi_device structure now has a "cs_index_mask" member. This acts as an
> > index to the chip_select array. If nth bit of spi->cs_index_mask is
> > set then the driver would assert spi->chip_select[n].
> >
> > In parallel mode all the chip selects are asserted/de-asserted
> > simultaneously and each byte of data is stored in both devices, the
> > even bits in one, the odd bits in the other. The split is
> > automatically handled by the GQSPI controller. The GQSPI controller
> > supports a maximum of two flashes connected in parallel mode. A
> > "multi-cs-cap" flag is added in the spi controntroller data, through
> > ctlr->multi-cs-cap the spi core will make sure that the controller is
> > capable of handling multiple chip selects at once.
> >
> > For supporting multiple CS via GPIO the cs_gpiod member of the
> > spi_device structure is now an array that holds the gpio descriptor
> > for each chipselect.
> >
> > Multi CS support using GPIO is not tested due to unavailability of
> > necessary hardware setup.
> >
> > Signed-off-by: Amit Kumar Mahapatra  mahapa...@amd.com>
> > ---
> >  drivers/spi/spi.c   | 213 +++-
> >  include/linux/spi/spi.h |  34 +--
> >  2 files changed, 173 insertions(+), 74 deletions(-)
> >
> > diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index
> > 5866bf5813a4..8ec7f58fa111 

[PATCH] ASoC: do not include pm_runtime.h if not used

2023-03-07 Thread Claudiu Beznea
Do not include pm_runtime.h header in files where runtime PM support is
not implemented.

Signed-off-by: Claudiu Beznea 
---
 sound/hda/hdac_regmap.c   | 1 -
 sound/pci/hda/hda_bind.c  | 1 -
 sound/soc/amd/acp/acp-pci.c   | 1 -
 sound/soc/amd/acp/acp-platform.c  | 1 -
 sound/soc/codecs/cs35l45.h| 1 -
 sound/soc/codecs/max98090.c   | 1 -
 sound/soc/codecs/max98373-i2c.c   | 1 -
 sound/soc/codecs/pcm186x.c| 1 -
 sound/soc/codecs/rk3328_codec.c   | 1 -
 sound/soc/codecs/rt5682-i2c.c | 1 -
 sound/soc/codecs/rt5682s.c| 1 -
 sound/soc/codecs/tas2562.c| 1 -
 sound/soc/codecs/tas5720.c| 1 -
 sound/soc/codecs/tas6424.c| 1 -
 sound/soc/codecs/wm_adsp.c| 1 -
 sound/soc/fsl/imx-audmix.c| 1 -
 sound/soc/intel/atom/sst/sst_acpi.c   | 1 -
 sound/soc/intel/atom/sst/sst_ipc.c| 1 -
 sound/soc/intel/atom/sst/sst_loader.c | 1 -
 sound/soc/intel/atom/sst/sst_pci.c| 1 -
 sound/soc/intel/atom/sst/sst_stream.c | 1 -
 sound/soc/mediatek/mt8186/mt8186-afe-control.c| 1 -
 sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c | 1 -
 sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c  | 1 -
 sound/soc/mediatek/mt8192/mt8192-afe-control.c| 2 --
 sound/soc/qcom/lpass-sc7180.c | 1 -
 sound/soc/qcom/lpass-sc7280.c | 1 -
 sound/soc/soc-compress.c  | 1 -
 sound/soc/soc-pcm.c   | 1 -
 sound/soc/sof/intel/hda-loader-skl.c  | 1 -
 sound/soc/sof/intel/hda-stream.c  | 1 -
 sound/soc/sof/intel/skl.c | 1 -
 sound/soc/sof/mediatek/mt8186/mt8186-clk.c| 1 -
 sound/soc/sof/mediatek/mt8195/mt8195-clk.c| 1 -
 sound/soc/tegra/tegra20_ac97.c| 1 -
 sound/soc/ti/omap-mcbsp-st.c  | 1 -
 36 files changed, 37 deletions(-)

diff --git a/sound/hda/hdac_regmap.c b/sound/hda/hdac_regmap.c
index fe3587547cfe..7cfaa908ff57 100644
--- a/sound/hda/hdac_regmap.c
+++ b/sound/hda/hdac_regmap.c
@@ -17,7 +17,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/sound/pci/hda/hda_bind.c b/sound/pci/hda/hda_bind.c
index 1a868dd9dc4b..323c388b1219 100644
--- a/sound/pci/hda/hda_bind.c
+++ b/sound/pci/hda/hda_bind.c
@@ -10,7 +10,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include "hda_local.h"
diff --git a/sound/soc/amd/acp/acp-pci.c b/sound/soc/amd/acp/acp-pci.c
index a0c84cd07fde..8154fbfd1229 100644
--- a/sound/soc/amd/acp/acp-pci.c
+++ b/sound/soc/amd/acp/acp-pci.c
@@ -15,7 +15,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 #include "amd.h"
diff --git a/sound/soc/amd/acp/acp-platform.c b/sound/soc/amd/acp/acp-platform.c
index 447612a7a762..f220378ec20e 100644
--- a/sound/soc/amd/acp/acp-platform.c
+++ b/sound/soc/amd/acp/acp-platform.c
@@ -18,7 +18,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 #include "amd.h"
diff --git a/sound/soc/codecs/cs35l45.h b/sound/soc/codecs/cs35l45.h
index 53fe9d2b7b15..0555702eac03 100644
--- a/sound/soc/codecs/cs35l45.h
+++ b/sound/soc/codecs/cs35l45.h
@@ -11,7 +11,6 @@
 #ifndef CS35L45_H
 #define CS35L45_H
 
-#include 
 #include 
 #include 
 
diff --git a/sound/soc/codecs/max98090.c b/sound/soc/codecs/max98090.c
index 06ed2a938108..508086e6e39f 100644
--- a/sound/soc/codecs/max98090.c
+++ b/sound/soc/codecs/max98090.c
@@ -10,7 +10,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/sound/soc/codecs/max98373-i2c.c b/sound/soc/codecs/max98373-i2c.c
index ec0905df65d1..0ef33404252d 100644
--- a/sound/soc/codecs/max98373-i2c.c
+++ b/sound/soc/codecs/max98373-i2c.c
@@ -9,7 +9,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/sound/soc/codecs/pcm186x.c b/sound/soc/codecs/pcm186x.c
index dd21803ba13c..451a8fd8fac5 100644
--- a/sound/soc/codecs/pcm186x.c
+++ b/sound/soc/codecs/pcm186x.c
@@ -12,7 +12,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/sound/soc/codecs/rk3328_codec.c b/sound/soc/codecs/rk3328_codec.c
index 1d523bfd9d84..9697aefc6e03 100644
--- a/sound/soc/codecs/rk3328_codec.c
+++ b/sound/soc/codecs/rk3328_codec.c
@@ -11,7 +11,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff 

Re: [PATCH v10 02/13] dt-bindings: phy: Add Lynx 10G phy binding

2023-03-07 Thread Sean Anderson
On 3/6/23 14:15, Sean Anderson wrote:
> This adds a binding for the SerDes module found on QorIQ processors.
> Each phy is a subnode of the top-level device, possibly supporting
> multiple lanes and protocols. This "thick" #phy-cells is used due to
> allow for better organization of parameters. Note that the particular
> parameters necessary to select a protocol-controller/lane combination
> vary across different SoCs, and even within different SerDes on the same
> SoC.
> 
> The driver is designed to be able to completely reconfigure lanes at
> runtime. Generally, the phy consumer can select the appropriate
> protocol using set_mode.
> 
> There are two PLLs, each of which can be used as the master clock for
> each lane. Each PLL has its own reference. For the moment they are
> required, because it simplifies the driver implementation. Absent
> reference clocks can be modeled by a fixed-clock with a rate of 0.
> 
> Signed-off-by: Sean Anderson 
> ---
> 
> (no changes since v9)

I forgot to add Rob's review from last time

Reviewed-by: Rob Herring 

If another revision is necessary, I will add this.

--Sean


[PATCH 6.1 400/885] perf tests stat_all_metrics: Change true workload to sleep workload for system wide check

2023-03-07 Thread Greg Kroah-Hartman
From: Kajol Jain 

[ Upstream commit f9fa0778ee7349a9aa3d2ea10e9f2ab843a0b44e ]

Testcase stat_all_metrics.sh fails in powerpc:

98: perf all metrics test : FAILED!

Logs with verbose:

  [command]# ./perf test 98 -vv
   98: perf all metrics test   :
   --- start ---
  test child forked, pid 13262
  Testing BRU_STALL_CPI
  Testing COMPLETION_STALL_CPI
   
  Testing TOTAL_LOCAL_NODE_PUMPS_P23
  Metric 'TOTAL_LOCAL_NODE_PUMPS_P23' not printed in:
  Error:
  Invalid event (hv_24x7/PM_PB_LNS_PUMP23,chip=3/) in per-thread mode, enable 
system wide with '-a'.
  Testing TOTAL_LOCAL_NODE_PUMPS_RETRIES_P01
  Metric 'TOTAL_LOCAL_NODE_PUMPS_RETRIES_P01' not printed in:
  Error:
  Invalid event (hv_24x7/PM_PB_RTY_LNS_PUMP01,chip=3/) in per-thread mode, 
enable system wide with '-a'.
   

Based on above logs, we could see some of the hv-24x7 metric events
fails, and logs suggest to run the metric event with -a option.  This
change happened after the commit a4b8cfcabb1d90ec ("perf stat: Delay
metric parsing"), which delayed the metric parsing phase and now before
metric parsing phase perf tool identifies, whether target is system-wide
or not. With this change, perf_event_open will fails with workload
monitoring for uncore events as expected.

The perf all metric test case fails as some of the hv-24x7 metric events
may need bigger workload with system wide monitoring to get the data.
Fix this issue by changing current system wide check from true workload
to sleep 0.01 workload.

Result with the patch changes in powerpc:

  98: perf all metrics test : Ok

Fixes: a4b8cfcabb1d90ec ("perf stat: Delay metric parsing")
Suggested-by: Ian Rogers 
Reviewed-by: Athira Rajeev 
Signed-off-by: Kajol Jain 
Tested-by: Disha Goel 
Tested-by: Ian Rogers 
Cc: Madhavan Srinivasan 
Cc: Nageswara R Sastry 
Cc: linuxppc-dev@lists.ozlabs.org
Link: https://lore.kernel.org/r/20230215093827.124921-1-kj...@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo 
Signed-off-by: Sasha Levin 
---
 tools/perf/tests/shell/stat_all_metrics.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/tests/shell/stat_all_metrics.sh 
b/tools/perf/tests/shell/stat_all_metrics.sh
index 6e79349e42bef..22e9cb294b40e 100755
--- a/tools/perf/tests/shell/stat_all_metrics.sh
+++ b/tools/perf/tests/shell/stat_all_metrics.sh
@@ -11,7 +11,7 @@ for m in $(perf list --raw-dump metrics); do
 continue
   fi
   # Failed so try system wide.
-  result=$(perf stat -M "$m" -a true 2>&1)
+  result=$(perf stat -M "$m" -a sleep 0.01 2>&1)
   if [[ "$result" =~ "${m:0:50}" ]]
   then
 continue
-- 
2.39.2





[PATCH 6.1 392/885] perf test bpf: Skip test if kernel-debuginfo is not present

2023-03-07 Thread Greg Kroah-Hartman
From: Athira Rajeev 

[ Upstream commit 34266f904abd45731bdade2e92d0536c092ee9bc ]

Perf BPF filter test fails in environment where "kernel-debuginfo"
is not installed.

Test failure logs:

  <<>>
  42: BPF filter:
  42.1: Basic BPF filtering : Ok
  42.2: BPF pinning : Ok
  42.3: BPF prologue generation : FAILED!
  <<>>

Enabling verbose option provided debug logs, which says debuginfo
needs to be installed. Snippet of verbose logs:

  <<>>
  42.3: BPF prologue generation   :
  --- start ---
  test child forked, pid 28218
  <<>>
  Rebuild with CONFIG_DEBUG_INFO=y, or install an appropriate debuginfo
  package.
  bpf_probe: failed to convert perf probe events
  Failed to add events selected by BPF
  test child finished with -1
   end 
  BPF filter subtest 3: FAILED!
  <<>>

Here the subtest "BPF prologue generation" failed and logs shows
debuginfo is needed. After installing kernel-debuginfo package, testcase
passes.

The "BPF prologue generation" subtest failed because, the do_test()
returns TEST_FAIL without checking the error type returned by
parse_events_load_bpf_obj().

parse_events_load_bpf_obj() can also return error of type -ENODATA
incase kernel-debuginfo package is not installed. Fix this by adding
check for -ENODATA error.

Test result after the patch changes:

Test failure logs:

  <<>>
  42: BPF filter :
  42.1: Basic BPF filtering  : Ok
  42.2: BPF pinning  : Ok
  42.3: BPF prologue generation  : Skip (clang/debuginfo isn't installed or 
environment missing BPF support)
  <<>>

Fixes: ba1fae431e74bb42 ("perf test: Add 'perf test BPF'")
Signed-off-by: Athira Rajeev 
Cc: Andi Kleen 
Cc: Disha Goel 
Cc: Ian Rogers 
Cc: James Clark 
Cc: Jiri Olsa 
Cc: Kajol Jain 
Cc: Madhavan Srinivasan 
Cc: Michael Ellerman 
Cc: Nageswara R Sastry 
Cc: Namhyung Kim 
Cc: Wang Nan 
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lore.kernel.org/linux-perf-users/y7bik77mde4j8...@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo 
Signed-off-by: Sasha Levin 
---
 tools/perf/tests/bpf.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/tools/perf/tests/bpf.c b/tools/perf/tests/bpf.c
index 17c023823713d..6a4235a9cf57e 100644
--- a/tools/perf/tests/bpf.c
+++ b/tools/perf/tests/bpf.c
@@ -126,6 +126,10 @@ static int do_test(struct bpf_object *obj, int 
(*func)(void),
 
err = parse_events_load_bpf_obj(_state, _state.list, obj, 
NULL);
parse_events_error__exit(_error);
+   if (err == -ENODATA) {
+   pr_debug("Failed to add events selected by BPF, debuginfo 
package not installed\n");
+   return TEST_SKIP;
+   }
if (err || list_empty(_state.list)) {
pr_debug("Failed to add events selected by BPF\n");
return TEST_FAIL;
@@ -368,7 +372,7 @@ static struct test_case bpf_tests[] = {
"clang isn't installed or environment missing BPF 
support"),
 #ifdef HAVE_BPF_PROLOGUE
TEST_CASE_REASON("BPF prologue generation", bpf_prologue_test,
-   "clang isn't installed or environment missing BPF 
support"),
+   "clang/debuginfo isn't installed or environment missing 
BPF support"),
 #else
TEST_CASE_REASON("BPF prologue generation", bpf_prologue_test, "not 
compiled in"),
 #endif
-- 
2.39.2





[PATCH 6.2 0479/1001] perf tests stat_all_metrics: Change true workload to sleep workload for system wide check

2023-03-07 Thread Greg Kroah-Hartman
From: Kajol Jain 

[ Upstream commit f9fa0778ee7349a9aa3d2ea10e9f2ab843a0b44e ]

Testcase stat_all_metrics.sh fails in powerpc:

98: perf all metrics test : FAILED!

Logs with verbose:

  [command]# ./perf test 98 -vv
   98: perf all metrics test   :
   --- start ---
  test child forked, pid 13262
  Testing BRU_STALL_CPI
  Testing COMPLETION_STALL_CPI
   
  Testing TOTAL_LOCAL_NODE_PUMPS_P23
  Metric 'TOTAL_LOCAL_NODE_PUMPS_P23' not printed in:
  Error:
  Invalid event (hv_24x7/PM_PB_LNS_PUMP23,chip=3/) in per-thread mode, enable 
system wide with '-a'.
  Testing TOTAL_LOCAL_NODE_PUMPS_RETRIES_P01
  Metric 'TOTAL_LOCAL_NODE_PUMPS_RETRIES_P01' not printed in:
  Error:
  Invalid event (hv_24x7/PM_PB_RTY_LNS_PUMP01,chip=3/) in per-thread mode, 
enable system wide with '-a'.
   

Based on above logs, we could see some of the hv-24x7 metric events
fails, and logs suggest to run the metric event with -a option.  This
change happened after the commit a4b8cfcabb1d90ec ("perf stat: Delay
metric parsing"), which delayed the metric parsing phase and now before
metric parsing phase perf tool identifies, whether target is system-wide
or not. With this change, perf_event_open will fails with workload
monitoring for uncore events as expected.

The perf all metric test case fails as some of the hv-24x7 metric events
may need bigger workload with system wide monitoring to get the data.
Fix this issue by changing current system wide check from true workload
to sleep 0.01 workload.

Result with the patch changes in powerpc:

  98: perf all metrics test : Ok

Fixes: a4b8cfcabb1d90ec ("perf stat: Delay metric parsing")
Suggested-by: Ian Rogers 
Reviewed-by: Athira Rajeev 
Signed-off-by: Kajol Jain 
Tested-by: Disha Goel 
Tested-by: Ian Rogers 
Cc: Madhavan Srinivasan 
Cc: Nageswara R Sastry 
Cc: linuxppc-dev@lists.ozlabs.org
Link: https://lore.kernel.org/r/20230215093827.124921-1-kj...@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo 
Signed-off-by: Sasha Levin 
---
 tools/perf/tests/shell/stat_all_metrics.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/tests/shell/stat_all_metrics.sh 
b/tools/perf/tests/shell/stat_all_metrics.sh
index 6e79349e42bef..22e9cb294b40e 100755
--- a/tools/perf/tests/shell/stat_all_metrics.sh
+++ b/tools/perf/tests/shell/stat_all_metrics.sh
@@ -11,7 +11,7 @@ for m in $(perf list --raw-dump metrics); do
 continue
   fi
   # Failed so try system wide.
-  result=$(perf stat -M "$m" -a true 2>&1)
+  result=$(perf stat -M "$m" -a sleep 0.01 2>&1)
   if [[ "$result" =~ "${m:0:50}" ]]
   then
 continue
-- 
2.39.2





[PATCH 6.2 0470/1001] perf test bpf: Skip test if kernel-debuginfo is not present

2023-03-07 Thread Greg Kroah-Hartman
From: Athira Rajeev 

[ Upstream commit 34266f904abd45731bdade2e92d0536c092ee9bc ]

Perf BPF filter test fails in environment where "kernel-debuginfo"
is not installed.

Test failure logs:

  <<>>
  42: BPF filter:
  42.1: Basic BPF filtering : Ok
  42.2: BPF pinning : Ok
  42.3: BPF prologue generation : FAILED!
  <<>>

Enabling verbose option provided debug logs, which says debuginfo
needs to be installed. Snippet of verbose logs:

  <<>>
  42.3: BPF prologue generation   :
  --- start ---
  test child forked, pid 28218
  <<>>
  Rebuild with CONFIG_DEBUG_INFO=y, or install an appropriate debuginfo
  package.
  bpf_probe: failed to convert perf probe events
  Failed to add events selected by BPF
  test child finished with -1
   end 
  BPF filter subtest 3: FAILED!
  <<>>

Here the subtest "BPF prologue generation" failed and logs shows
debuginfo is needed. After installing kernel-debuginfo package, testcase
passes.

The "BPF prologue generation" subtest failed because, the do_test()
returns TEST_FAIL without checking the error type returned by
parse_events_load_bpf_obj().

parse_events_load_bpf_obj() can also return error of type -ENODATA
incase kernel-debuginfo package is not installed. Fix this by adding
check for -ENODATA error.

Test result after the patch changes:

Test failure logs:

  <<>>
  42: BPF filter :
  42.1: Basic BPF filtering  : Ok
  42.2: BPF pinning  : Ok
  42.3: BPF prologue generation  : Skip (clang/debuginfo isn't installed or 
environment missing BPF support)
  <<>>

Fixes: ba1fae431e74bb42 ("perf test: Add 'perf test BPF'")
Signed-off-by: Athira Rajeev 
Cc: Andi Kleen 
Cc: Disha Goel 
Cc: Ian Rogers 
Cc: James Clark 
Cc: Jiri Olsa 
Cc: Kajol Jain 
Cc: Madhavan Srinivasan 
Cc: Michael Ellerman 
Cc: Nageswara R Sastry 
Cc: Namhyung Kim 
Cc: Wang Nan 
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lore.kernel.org/linux-perf-users/y7bik77mde4j8...@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo 
Signed-off-by: Sasha Levin 
---
 tools/perf/tests/bpf.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/tools/perf/tests/bpf.c b/tools/perf/tests/bpf.c
index 17c023823713d..6a4235a9cf57e 100644
--- a/tools/perf/tests/bpf.c
+++ b/tools/perf/tests/bpf.c
@@ -126,6 +126,10 @@ static int do_test(struct bpf_object *obj, int 
(*func)(void),
 
err = parse_events_load_bpf_obj(_state, _state.list, obj, 
NULL);
parse_events_error__exit(_error);
+   if (err == -ENODATA) {
+   pr_debug("Failed to add events selected by BPF, debuginfo 
package not installed\n");
+   return TEST_SKIP;
+   }
if (err || list_empty(_state.list)) {
pr_debug("Failed to add events selected by BPF\n");
return TEST_FAIL;
@@ -368,7 +372,7 @@ static struct test_case bpf_tests[] = {
"clang isn't installed or environment missing BPF 
support"),
 #ifdef HAVE_BPF_PROLOGUE
TEST_CASE_REASON("BPF prologue generation", bpf_prologue_test,
-   "clang isn't installed or environment missing BPF 
support"),
+   "clang/debuginfo isn't installed or environment missing 
BPF support"),
 #else
TEST_CASE_REASON("BPF prologue generation", bpf_prologue_test, "not 
compiled in"),
 #endif
-- 
2.39.2





[PATCH 6.2 0469/1001] perf jevents: Correct bad character encoding

2023-03-07 Thread Greg Kroah-Hartman
From: Ian Rogers 

[ Upstream commit d2e3dc829e389d686194d06f0a64adda4158faae ]

A character encoding issue added a "3D" character that breaks the
metrics test.

Fixes: 40769665b63d8c84 ("perf jevents: Parse metrics during conversion")
Reviewed-by: Kajol Jain 
Signed-off-by: Ian Rogers 
Cc: Adrian Hunter 
Cc: Alexander Shishkin 
Cc: Caleb Biggers 
Cc: Florian Fischer 
Cc: Ian Rogers 
Cc: Ingo Molnar 
Cc: James Clark 
Cc: Jing Zhang 
Cc: Jiri Olsa 
Cc: John Garry 
Cc: Kan Liang 
Cc: Kang Minchul 
Cc: Kim Phillips 
Cc: Leo Yan 
Cc: Mark Rutland 
Cc: Mike Leach 
Cc: Namhyung Kim 
Cc: Perry Taylor 
Cc: Peter Zijlstra 
Cc: Ravi Bangoria 
Cc: Rob Herring 
Cc: Sandipan Das 
Cc: Stephane Eranian 
Cc: Will Deacon 
Cc: Xing Zhengjun 
Cc: linux-arm-ker...@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Link: https://lore.kernel.org/r/20230126233645.200509-14-irog...@google.com
Signed-off-by: Arnaldo Carvalho de Melo 
Signed-off-by: Sasha Levin 
---
 tools/perf/pmu-events/metric_test.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/perf/pmu-events/metric_test.py 
b/tools/perf/pmu-events/metric_test.py
index 15315d0f716ca..6980f452df0ad 100644
--- a/tools/perf/pmu-events/metric_test.py
+++ b/tools/perf/pmu-events/metric_test.py
@@ -87,8 +87,8 @@ class TestMetricExpressions(unittest.TestCase):
 after = r'min((a + b if c > 1 else c + d), e + f)'
 self.assertEqual(ParsePerfJson(before).ToPerfJson(), after)
 
-before =3D r'a if b else c if d else e'
-after =3D r'(a if b else (c if d else e))'
+before = r'a if b else c if d else e'
+after = r'(a if b else (c if d else e))'
 self.assertEqual(ParsePerfJson(before).ToPerfJson(), after)
 
   def test_ToPython(self):
-- 
2.39.2





[PATCH net] eth: fealnx: bring back this old driver

2023-03-07 Thread Jakub Kicinski
This reverts commit d5e2d038dbece821f1af57acbeded3aa9a1832c1.

We have a report of this chip being used on a

  SURECOM EP-320X-S 100/10M Ethernet PCI Adapter

which could still have been purchased in some parts
of the world 3 years ago.

Cc: sta...@vger.kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=217151
Fixes: d5e2d038dbec ("eth: fealnx: delete the driver for Myson MTD-800")
Signed-off-by: Jakub Kicinski 
---
CC: tsbog...@alpha.franken.de
CC: m...@ellerman.id.au
CC: npig...@gmail.com
CC: christophe.le...@csgroup.eu
CC: lukas.bulw...@gmail.com
CC: step...@networkplumber.org
CC: l...@kernel.org
CC: ge...@infradead.org
CC: pe...@nvidia.com
CC: wsa+rene...@sang-engineering.com
CC: linux-m...@vger.kernel.org
CC: linuxppc-dev@lists.ozlabs.org
---
 arch/mips/configs/mtx1_defconfig  |1 +
 arch/powerpc/configs/ppc6xx_defconfig |1 +
 drivers/net/ethernet/Kconfig  |   10 +
 drivers/net/ethernet/Makefile |1 +
 drivers/net/ethernet/fealnx.c | 1953 +
 5 files changed, 1966 insertions(+)
 create mode 100644 drivers/net/ethernet/fealnx.c

diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig
index 89a1511d2ee4..edf9634aa8ee 100644
--- a/arch/mips/configs/mtx1_defconfig
+++ b/arch/mips/configs/mtx1_defconfig
@@ -284,6 +284,7 @@ CONFIG_IXGB=m
 CONFIG_SKGE=m
 CONFIG_SKY2=m
 CONFIG_MYRI10GE=m
+CONFIG_FEALNX=m
 CONFIG_NATSEMI=m
 CONFIG_NS83820=m
 CONFIG_S2IO=m
diff --git a/arch/powerpc/configs/ppc6xx_defconfig 
b/arch/powerpc/configs/ppc6xx_defconfig
index 110258277959..f73c98be56c8 100644
--- a/arch/powerpc/configs/ppc6xx_defconfig
+++ b/arch/powerpc/configs/ppc6xx_defconfig
@@ -461,6 +461,7 @@ CONFIG_MV643XX_ETH=m
 CONFIG_SKGE=m
 CONFIG_SKY2=m
 CONFIG_MYRI10GE=m
+CONFIG_FEALNX=m
 CONFIG_NATSEMI=m
 CONFIG_NS83820=m
 CONFIG_PCMCIA_AXNET=m
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index 323ec56e8a74..1917da784191 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -132,6 +132,16 @@ source "drivers/net/ethernet/mscc/Kconfig"
 source "drivers/net/ethernet/microsoft/Kconfig"
 source "drivers/net/ethernet/moxa/Kconfig"
 source "drivers/net/ethernet/myricom/Kconfig"
+
+config FEALNX
+   tristate "Myson MTD-8xx PCI Ethernet support"
+   depends on PCI
+   select CRC32
+   select MII
+   help
+ Say Y here to support the Myson MTD-800 family of PCI-based Ethernet
+ cards. 
+
 source "drivers/net/ethernet/ni/Kconfig"
 source "drivers/net/ethernet/natsemi/Kconfig"
 source "drivers/net/ethernet/neterion/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 2fedbaa545eb..0d872d4efcd1 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -64,6 +64,7 @@ obj-$(CONFIG_NET_VENDOR_MICROCHIP) += microchip/
 obj-$(CONFIG_NET_VENDOR_MICROSEMI) += mscc/
 obj-$(CONFIG_NET_VENDOR_MOXART) += moxa/
 obj-$(CONFIG_NET_VENDOR_MYRI) += myricom/
+obj-$(CONFIG_FEALNX) += fealnx.o
 obj-$(CONFIG_NET_VENDOR_NATSEMI) += natsemi/
 obj-$(CONFIG_NET_VENDOR_NETERION) += neterion/
 obj-$(CONFIG_NET_VENDOR_NETRONOME) += netronome/
diff --git a/drivers/net/ethernet/fealnx.c b/drivers/net/ethernet/fealnx.c
new file mode 100644
index ..ed18450fd2cc
--- /dev/null
+++ b/drivers/net/ethernet/fealnx.c
@@ -0,0 +1,1953 @@
+/*
+   Written 1998-2000 by Donald Becker.
+
+   This software may be used and distributed according to the terms of
+   the GNU General Public License (GPL), incorporated herein by reference.
+   Drivers based on or derived from this code fall under the GPL and must
+   retain the authorship, copyright and license notice.  This file is not
+   a complete program and may only be used when the entire operating
+   system is licensed under the GPL.
+
+   The author may be reached as bec...@scyld.com, or C/O
+   Scyld Computing Corporation
+   410 Severn Ave., Suite 210
+   Annapolis MD 21403
+
+   Support information and updates available at
+   http://www.scyld.com/network/pci-skeleton.html
+
+   Linux kernel updates:
+
+   Version 2.51, Nov 17, 2001 (jgarzik):
+   - Add ethtool support
+   - Replace some MII-related magic numbers with constants
+
+*/
+
+#define DRV_NAME   "fealnx"
+
+static int debug;  /* 1-> print debug message */
+static int max_interrupt_work = 20;
+
+/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). */
+static int multicast_filter_limit = 32;
+
+/* Set the copy breakpoint for the copy-only-tiny-frames scheme. */
+/* Setting to > 1518 effectively disables this feature.  */
+static int rx_copybreak;
+
+/* Used to pass the media type, etc.*/
+/* Both 'options[]' and 'full_duplex[]' should exist for driver */
+/* interoperability.*/
+/* The media type is 

Re: [PATCH v10 03/13] dt-bindings: Convert gpio-mmio to yaml

2023-03-07 Thread Sean Anderson
Hi Krzysztof,

On 3/7/23 03:42, Krzysztof Kozlowski wrote:
> On 06/03/2023 20:15, Sean Anderson wrote:
>> This is a generic binding for simple MMIO GPIO controllers. Although we
>> have a single driver for these controllers, they were previously spread
>> over several files. Consolidate them. The register descriptions are
>> adapted from the comments in the source. There is no set order for the
>> registers, so I have not specified one.
>> 
>> Signed-off-by: Sean Anderson 
>> ---
>> 
>> Changes in v10:
>> - New
>> 
>>  .../bindings/gpio/brcm,bcm6345-gpio.yaml  |  16 +--
>>  .../devicetree/bindings/gpio/gpio-mmio.yaml   | 136 ++
>>  .../bindings/gpio/ni,169445-nand-gpio.txt |  38 -
>>  .../devicetree/bindings/gpio/wd,mbl-gpio.txt  |  38 -
>>  4 files changed, 137 insertions(+), 91 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/gpio/gpio-mmio.yaml
>>  delete mode 100644 
>> Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
>>  delete mode 100644 Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt
> 
> https://lore.kernel.org/all/20230126-gpio-mmio-fix-v2-1-38397aace...@ncr.com/

Thanks for linking to that.

I believe this patch should be applied instead of that one because

- It documents all the registers, which were previously only documented
  in the driver
- It handles the endianness properties.
- It consolidates the various descriptions of this binding into one
  schema.

--Sean


[PATCH v5 7/7] sched, smp: Trace smp callback causing an IPI

2023-03-07 Thread Valentin Schneider
Context
===

The newly-introduced ipi_send_cpumask tracepoint has a "callback" parameter
which so far has only been fed with NULL.

While CSD_TYPE_SYNC/ASYNC and CSD_TYPE_IRQ_WORK share a similar backing
struct layout (meaning their callback func can be accessed without caring
about the actual CSD type), CSD_TYPE_TTWU doesn't even have a function
attached to its struct. This means we need to check the type of a CSD
before eventually dereferencing its associated callback.

This isn't as trivial as it sounds: the CSD type is stored in
__call_single_node.u_flags, which get cleared right before the callback is
executed via csd_unlock(). This implies checking the CSD type before it is
enqueued on the call_single_queue, as the target CPU's queue can be flushed
before we get to sending an IPI.

Furthermore, send_call_function_single_ipi() only has a CPU parameter, and
would need to have an additional argument to trickle down the invoked
function. This is somewhat silly, as the extra argument will always be
pushed down to the function even when nothing is being traced, which is
unnecessary overhead.

Changes
===

send_call_function_single_ipi() is only used by smp.c, and is defined in
sched/core.c as it contains scheduler-specific ops (set_nr_if_polling() of
a CPU's idle task).

Split it into two parts: the scheduler bits remain in sched/core.c, and the
actual IPI emission is moved into smp.c. This lets us define an
__always_inline helper function that can take the related callback as
parameter without creating useless register pressure in the non-traced path
which only gains a (disabled) static branch.

Do the same thing for the multi IPI case.

Signed-off-by: Valentin Schneider 
---
 kernel/sched/core.c | 18 +++-
 kernel/sched/smp.h  |  2 +-
 kernel/smp.c| 72 +
 3 files changed, 66 insertions(+), 26 deletions(-)

diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 85114f75f1c9c..60c79b4e4a5b1 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -3827,16 +3827,20 @@ void sched_ttwu_pending(void *arg)
rq_unlock_irqrestore(rq, );
 }
 
-void send_call_function_single_ipi(int cpu)
+/*
+ * Prepare the scene for sending an IPI for a remote smp_call
+ *
+ * Returns true if the caller can proceed with sending the IPI.
+ * Returns false otherwise.
+ */
+bool call_function_single_prep_ipi(int cpu)
 {
-   struct rq *rq = cpu_rq(cpu);
-
-   if (!set_nr_if_polling(rq->idle)) {
-   trace_ipi_send_cpumask(cpumask_of(cpu), _RET_IP_, NULL);
-   arch_send_call_function_single_ipi(cpu);
-   } else {
+   if (set_nr_if_polling(cpu_rq(cpu)->idle)) {
trace_sched_wake_idle_without_ipi(cpu);
+   return false;
}
+
+   return true;
 }
 
 /*
diff --git a/kernel/sched/smp.h b/kernel/sched/smp.h
index 2eb23dd0f2856..21ac44428bb02 100644
--- a/kernel/sched/smp.h
+++ b/kernel/sched/smp.h
@@ -6,7 +6,7 @@
 
 extern void sched_ttwu_pending(void *arg);
 
-extern void send_call_function_single_ipi(int cpu);
+extern bool call_function_single_prep_ipi(int cpu);
 
 #ifdef CONFIG_SMP
 extern void flush_smp_call_function_queue(void);
diff --git a/kernel/smp.c b/kernel/smp.c
index 821b5986721ac..5cd680a7e78ef 100644
--- a/kernel/smp.c
+++ b/kernel/smp.c
@@ -161,9 +161,18 @@ void __init call_function_init(void)
 }
 
 static __always_inline void
-send_call_function_ipi_mask(const struct cpumask *mask)
+send_call_function_single_ipi(int cpu, smp_call_func_t func)
 {
-   trace_ipi_send_cpumask(mask, _RET_IP_, NULL);
+   if (call_function_single_prep_ipi(cpu)) {
+   trace_ipi_send_cpumask(cpumask_of(cpu), _RET_IP_, func);
+   arch_send_call_function_single_ipi(cpu);
+   }
+}
+
+static __always_inline void
+send_call_function_ipi_mask(const struct cpumask *mask, smp_call_func_t func)
+{
+   trace_ipi_send_cpumask(mask, _RET_IP_, func);
arch_send_call_function_ipi_mask(mask);
 }
 
@@ -430,12 +439,16 @@ static void __smp_call_single_queue_debug(int cpu, struct 
llist_node *node)
struct cfd_seq_local *seq = this_cpu_ptr(_seq_local);
struct call_function_data *cfd = this_cpu_ptr(_data);
struct cfd_percpu *pcpu = per_cpu_ptr(cfd->pcpu, cpu);
+   struct __call_single_data *csd;
+
+   csd = container_of(node, call_single_data_t, node.llist);
+   WARN_ON_ONCE(!(CSD_TYPE(csd) & (CSD_TYPE_SYNC | CSD_TYPE_ASYNC)));
 
cfd_seq_store(pcpu->seq_queue, this_cpu, cpu, CFD_SEQ_QUEUE);
if (llist_add(node, _cpu(call_single_queue, cpu))) {
cfd_seq_store(pcpu->seq_ipi, this_cpu, cpu, CFD_SEQ_IPI);
cfd_seq_store(seq->ping, this_cpu, cpu, CFD_SEQ_PING);
-   send_call_function_single_ipi(cpu);
+   send_call_function_single_ipi(cpu, csd->func);
cfd_seq_store(seq->pinged, this_cpu, cpu, CFD_SEQ_PINGED);
} else {

[PATCH v5 6/7] smp: reword smp call IPI comment

2023-03-07 Thread Valentin Schneider
Accessing the call_single_queue hasn't involved a spinlock since 2014:

  6897fc22ea01 ("kernel: use lockless list for smp_call_function_single")

The llist operations (namely cmpxchg() and xchg()) provide similar ordering
guarantees, update the comment to lessen confusion.

Signed-off-by: Valentin Schneider 
---
 kernel/smp.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/kernel/smp.c b/kernel/smp.c
index 93b4386cd3096..821b5986721ac 100644
--- a/kernel/smp.c
+++ b/kernel/smp.c
@@ -495,9 +495,10 @@ void __smp_call_single_queue(int cpu, struct llist_node 
*node)
 #endif
 
/*
-* The list addition should be visible before sending the IPI
-* handler locks the list to pull the entry off it because of
-* normal cache coherency rules implied by spinlocks.
+* The list addition should be visible to the target CPU when it pops
+* the head of the list to pull the entry off it in the IPI handler
+* because of normal cache coherency rules implied by the underlying
+* llist ops.
 *
 * If IPIs can go out of order to the cache coherency protocol
 * in an architecture, sufficient synchronisation should be added
-- 
2.31.1



[PATCH v5 5/7] treewide: Trace IPIs sent via smp_send_reschedule()

2023-03-07 Thread Valentin Schneider
To be able to trace invocations of smp_send_reschedule(), rename the
arch-specific definitions of it to arch_smp_send_reschedule() and wrap it
into an smp_send_reschedule() that contains a tracepoint.

Changes to include the declaration of the tracepoint were driven by the
following coccinelle script:

  @func_use@
  @@
  smp_send_reschedule(...);

  @include@
  @@
  #include 

  @no_include depends on func_use && !include@
  @@
#include <...>
  +
  + #include 

Signed-off-by: Valentin Schneider 
[csky bits]
Acked-by: Guo Ren 
[riscv bits]
Acked-by: Palmer Dabbelt 
---
 arch/alpha/kernel/smp.c  |  2 +-
 arch/arc/kernel/smp.c|  2 +-
 arch/arm/kernel/smp.c|  2 +-
 arch/arm/mach-actions/platsmp.c  |  2 ++
 arch/arm64/kernel/smp.c  |  2 +-
 arch/csky/kernel/smp.c   |  2 +-
 arch/hexagon/kernel/smp.c|  2 +-
 arch/ia64/kernel/smp.c   |  4 ++--
 arch/loongarch/kernel/smp.c  |  4 ++--
 arch/mips/include/asm/smp.h  |  2 +-
 arch/mips/kernel/rtlx-cmp.c  |  2 ++
 arch/openrisc/kernel/smp.c   |  2 +-
 arch/parisc/kernel/smp.c |  4 ++--
 arch/powerpc/kernel/smp.c|  6 --
 arch/powerpc/kvm/book3s_hv.c |  3 +++
 arch/powerpc/platforms/powernv/subcore.c |  2 ++
 arch/riscv/kernel/smp.c  |  4 ++--
 arch/s390/kernel/smp.c   |  2 +-
 arch/sh/kernel/smp.c |  2 +-
 arch/sparc/kernel/smp_32.c   |  2 +-
 arch/sparc/kernel/smp_64.c   |  2 +-
 arch/x86/include/asm/smp.h   |  2 +-
 arch/x86/kvm/svm/svm.c   |  4 
 arch/x86/kvm/x86.c   |  2 ++
 arch/xtensa/kernel/smp.c |  2 +-
 include/linux/smp.h  | 11 +--
 virt/kvm/kvm_main.c  |  2 ++
 27 files changed, 52 insertions(+), 26 deletions(-)

diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
index 0ede4b044e869..7439b2377df57 100644
--- a/arch/alpha/kernel/smp.c
+++ b/arch/alpha/kernel/smp.c
@@ -562,7 +562,7 @@ handle_ipi(struct pt_regs *regs)
 }
 
 void
-smp_send_reschedule(int cpu)
+arch_smp_send_reschedule(int cpu)
 {
 #ifdef DEBUG_IPI_MSG
if (cpu == hard_smp_processor_id())
diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c
index ad93fe6e4b77d..409cfa4675b40 100644
--- a/arch/arc/kernel/smp.c
+++ b/arch/arc/kernel/smp.c
@@ -292,7 +292,7 @@ static void ipi_send_msg(const struct cpumask *callmap, 
enum ipi_msg_type msg)
ipi_send_msg_one(cpu, msg);
 }
 
-void smp_send_reschedule(int cpu)
+void arch_smp_send_reschedule(int cpu)
 {
ipi_send_msg_one(cpu, IPI_RESCHEDULE);
 }
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index b6c832e195427..46b23dc1f94ad 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -744,7 +744,7 @@ void __init set_smp_ipi_range(int ipi_base, int n)
ipi_setup(smp_processor_id());
 }
 
-void smp_send_reschedule(int cpu)
+void arch_smp_send_reschedule(int cpu)
 {
smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
 }
diff --git a/arch/arm/mach-actions/platsmp.c b/arch/arm/mach-actions/platsmp.c
index f26618b435145..7b208e96fbb67 100644
--- a/arch/arm/mach-actions/platsmp.c
+++ b/arch/arm/mach-actions/platsmp.c
@@ -20,6 +20,8 @@
 #include 
 #include 
 
+#include 
+
 #define OWL_CPU1_ADDR  0x50
 #define OWL_CPU1_FLAG  0x5c
 
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 438c16fc44633..66f2745062dda 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -976,7 +976,7 @@ void __init set_smp_ipi_range(int ipi_base, int n)
ipi_setup(smp_processor_id());
 }
 
-void smp_send_reschedule(int cpu)
+void arch_smp_send_reschedule(int cpu)
 {
smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
 }
diff --git a/arch/csky/kernel/smp.c b/arch/csky/kernel/smp.c
index b45d1073307f2..be77383acb5fc 100644
--- a/arch/csky/kernel/smp.c
+++ b/arch/csky/kernel/smp.c
@@ -140,7 +140,7 @@ void smp_send_stop(void)
on_each_cpu(ipi_stop, NULL, 1);
 }
 
-void smp_send_reschedule(int cpu)
+void arch_smp_send_reschedule(int cpu)
 {
send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
 }
diff --git a/arch/hexagon/kernel/smp.c b/arch/hexagon/kernel/smp.c
index 4ba93e59370c4..4e8bee25b8c68 100644
--- a/arch/hexagon/kernel/smp.c
+++ b/arch/hexagon/kernel/smp.c
@@ -217,7 +217,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
}
 }
 
-void smp_send_reschedule(int cpu)
+void arch_smp_send_reschedule(int cpu)
 {
send_ipi(cpumask_of(cpu), IPI_RESCHEDULE);
 }
diff --git a/arch/ia64/kernel/smp.c b/arch/ia64/kernel/smp.c
index e2cc59db86bc2..ea4f009a232b4 100644
--- a/arch/ia64/kernel/smp.c
+++ b/arch/ia64/kernel/smp.c
@@ -220,11 +220,11 @@ kdump_smp_send_init(void)
  * Called with preemption disabled.
  */
 void

[PATCH v5 4/7] irq_work: Trace self-IPIs sent via arch_irq_work_raise()

2023-03-07 Thread Valentin Schneider
IPIs sent to remote CPUs via irq_work_queue_on() are now covered by
trace_ipi_send_cpumask(), add another instance of the tracepoint to cover
self-IPIs.

Signed-off-by: Valentin Schneider 
Reviewed-by: Steven Rostedt (Google) 
---
 kernel/irq_work.c | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/kernel/irq_work.c b/kernel/irq_work.c
index 7afa40fe5cc43..c33e88e32a67a 100644
--- a/kernel/irq_work.c
+++ b/kernel/irq_work.c
@@ -22,6 +22,8 @@
 #include 
 #include 
 
+#include 
+
 static DEFINE_PER_CPU(struct llist_head, raised_list);
 static DEFINE_PER_CPU(struct llist_head, lazy_list);
 static DEFINE_PER_CPU(struct task_struct *, irq_workd);
@@ -74,6 +76,16 @@ void __weak arch_irq_work_raise(void)
 */
 }
 
+static __always_inline void irq_work_raise(struct irq_work *work)
+{
+   if (trace_ipi_send_cpumask_enabled() && arch_irq_work_has_interrupt())
+   trace_ipi_send_cpumask(cpumask_of(smp_processor_id()),
+  _RET_IP_,
+  work->func);
+
+   arch_irq_work_raise();
+}
+
 /* Enqueue on current CPU, work must already be claimed and preempt disabled */
 static void __irq_work_queue_local(struct irq_work *work)
 {
@@ -99,7 +111,7 @@ static void __irq_work_queue_local(struct irq_work *work)
 
/* If the work is "lazy", handle it from next tick if any */
if (!lazy_work || tick_nohz_tick_stopped())
-   arch_irq_work_raise();
+   irq_work_raise(work);
 }
 
 /* Enqueue the irq work @work on the current CPU */
-- 
2.31.1



[PATCH v5 3/7] smp: Trace IPIs sent via arch_send_call_function_ipi_mask()

2023-03-07 Thread Valentin Schneider
This simply wraps around the arch function and prepends it with a
tracepoint, similar to send_call_function_single_ipi().

Signed-off-by: Valentin Schneider 
Reviewed-by: Steven Rostedt (Google) 
---
 kernel/smp.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/kernel/smp.c b/kernel/smp.c
index e2ca1e2f31274..93b4386cd3096 100644
--- a/kernel/smp.c
+++ b/kernel/smp.c
@@ -160,6 +160,13 @@ void __init call_function_init(void)
smpcfd_prepare_cpu(smp_processor_id());
 }
 
+static __always_inline void
+send_call_function_ipi_mask(const struct cpumask *mask)
+{
+   trace_ipi_send_cpumask(mask, _RET_IP_, NULL);
+   arch_send_call_function_ipi_mask(mask);
+}
+
 #ifdef CONFIG_CSD_LOCK_WAIT_DEBUG
 
 static DEFINE_STATIC_KEY_FALSE(csdlock_debug_enabled);
@@ -970,7 +977,7 @@ static void smp_call_function_many_cond(const struct 
cpumask *mask,
if (nr_cpus == 1)
send_call_function_single_ipi(last_cpu);
else if (likely(nr_cpus > 1))
-   arch_send_call_function_ipi_mask(cfd->cpumask_ipi);
+   send_call_function_ipi_mask(cfd->cpumask_ipi);
 
cfd_seq_store(this_cpu_ptr(_seq_local)->pinged, this_cpu, 
CFD_SEQ_NOCPU, CFD_SEQ_PINGED);
}
-- 
2.31.1



[PATCH v5 2/7] sched, smp: Trace IPIs sent via send_call_function_single_ipi()

2023-03-07 Thread Valentin Schneider
send_call_function_single_ipi() is the thing that sends IPIs at the bottom
of smp_call_function*() via either generic_exec_single() or
smp_call_function_many_cond(). Give it an IPI-related tracepoint.

Note that this ends up tracing any IPI sent via __smp_call_single_queue(),
which covers __ttwu_queue_wakelist() and irq_work_queue_on() "for free".

Signed-off-by: Valentin Schneider 
Reviewed-by: Steven Rostedt (Google) 
Acked-by: Ingo Molnar 
---
 arch/arm/kernel/smp.c   | 3 ---
 arch/arm64/kernel/smp.c | 1 -
 kernel/sched/core.c | 7 +--
 kernel/smp.c| 4 
 4 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 0b8c25763adc3..b6c832e195427 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -48,9 +48,6 @@
 #include 
 #include 
 
-#define CREATE_TRACE_POINTS
-#include 
-
 /*
  * as from 2.5, kernels no longer have an init_tasks structure
  * so we need some other way of telling a new secondary core
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 4e83272642552..438c16fc44633 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -51,7 +51,6 @@
 #include 
 #include 
 
-#define CREATE_TRACE_POINTS
 #include 
 
 DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index af017e038b482..85114f75f1c9c 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -81,6 +81,7 @@
 #include 
 #include 
 #undef CREATE_TRACE_POINTS
+#include 
 
 #include "sched.h"
 #include "stats.h"
@@ -3830,10 +3831,12 @@ void send_call_function_single_ipi(int cpu)
 {
struct rq *rq = cpu_rq(cpu);
 
-   if (!set_nr_if_polling(rq->idle))
+   if (!set_nr_if_polling(rq->idle)) {
+   trace_ipi_send_cpumask(cpumask_of(cpu), _RET_IP_, NULL);
arch_send_call_function_single_ipi(cpu);
-   else
+   } else {
trace_sched_wake_idle_without_ipi(cpu);
+   }
 }
 
 /*
diff --git a/kernel/smp.c b/kernel/smp.c
index 06a413987a14a..e2ca1e2f31274 100644
--- a/kernel/smp.c
+++ b/kernel/smp.c
@@ -26,6 +26,10 @@
 #include 
 #include 
 
+#define CREATE_TRACE_POINTS
+#include 
+#undef CREATE_TRACE_POINTS
+
 #include "smpboot.h"
 #include "sched/smp.h"
 
-- 
2.31.1



[PATCH v5 1/7] trace: Add trace_ipi_send_cpumask()

2023-03-07 Thread Valentin Schneider
trace_ipi_raise() is unsuitable for generically tracing IPI sources due to
its "reason" argument being an uninformative string (on arm64 all you get
is "Function call interrupts" for SMP calls).

Add a variant of it that exports a target cpumask, a callsite and a callback.

Signed-off-by: Valentin Schneider 
Reviewed-by: Steven Rostedt (Google) 
---
 include/trace/events/ipi.h | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/include/trace/events/ipi.h b/include/trace/events/ipi.h
index 0be71dad6ec03..b1125dc27682c 100644
--- a/include/trace/events/ipi.h
+++ b/include/trace/events/ipi.h
@@ -35,6 +35,28 @@ TRACE_EVENT(ipi_raise,
TP_printk("target_mask=%s (%s)", __get_bitmask(target_cpus), 
__entry->reason)
 );
 
+TRACE_EVENT(ipi_send_cpumask,
+
+   TP_PROTO(const struct cpumask *cpumask, unsigned long callsite, void 
*callback),
+
+   TP_ARGS(cpumask, callsite, callback),
+
+   TP_STRUCT__entry(
+   __cpumask(cpumask)
+   __field(void *, callsite)
+   __field(void *, callback)
+   ),
+
+   TP_fast_assign(
+   __assign_cpumask(cpumask, cpumask_bits(cpumask));
+   __entry->callsite = (void *)callsite;
+   __entry->callback = callback;
+   ),
+
+   TP_printk("cpumask=%s callsite=%pS callback=%pS",
+ __get_cpumask(cpumask), __entry->callsite, __entry->callback)
+);
+
 DECLARE_EVENT_CLASS(ipi_handler,
 
TP_PROTO(const char *reason),
-- 
2.31.1



[PATCH v5 0/7] Generic IPI sending tracepoint

2023-03-07 Thread Valentin Schneider
Background
==

Detecting IPI *reception* is relatively easy, e.g. using
trace_irq_handler_{entry,exit} or even just function-trace
flush_smp_call_function_queue() for SMP calls.  

Figuring out their *origin*, is trickier as there is no generic tracepoint tied
to e.g. smp_call_function():

o AFAIA x86 has no tracepoint tied to sending IPIs, only receiving them
  (cf. trace_call_function{_single}_entry()).
o arm/arm64 do have trace_ipi_raise(), which gives us the target cpus but also a
  mostly useless string (smp_calls will all be "Function call interrupts").
o Other architectures don't seem to have any IPI-sending related tracepoint.  

I believe one reason those tracepoints used by arm/arm64 ended up as they were
is because these archs used to handle IPIs differently from regular interrupts
(the IRQ driver would directly invoke an IPI-handling routine), which meant 
they 
never showed up in trace_irq_handler_{entry, exit}. The trace_ipi_{entry,exit}
tracepoints gave a way to trace IPI reception but those have become redundant as
of: 

  56afcd3dbd19 ("ARM: Allow IPIs to be handled as normal interrupts")
  d3afc7f12987 ("arm64: Allow IPIs to be handled as normal interrupts")

which gave IPIs a "proper" handler function used through
generic_handle_domain_irq(), which makes them show up via
trace_irq_handler_{entry, exit}.

Changing stuff up
=

Per the above, it would make sense to reshuffle trace_ipi_raise() and move it
into generic code. This also came up during Daniel's talk on Osnoise at the CPU
isolation MC of LPC 2022 [1]. 

Now, to be useful, such a tracepoint needs to export:
o targeted CPU(s)
o calling context

The only way to get the calling context with trace_ipi_raise() is to trigger a
stack dump, e.g. $(trace-cmd -e ipi* -T echo 42).

This is instead introducing a new tracepoint which exports the relevant context
(callsite, and requested callback for when the callsite isn't helpful), and is
usable by all architectures as it sits in generic code. 

Another thing worth mentioning is that depending on the callsite, the _RET_IP_
fed to the tracepoint is not always useful - generic_exec_single() doesn't tell
you much about the actual callback being sent via IPI, which is why the new
tracepoint also has a @callback argument.

Patches
===

o Patches 1-5 spread out the tracepoint across relevant sites.
  Patch 5 ends up sprinkling lots of #include  which I'm not
  the biggest fan of, but is the least horrible solution I've been able to come
  up with so far.
  
o Patch 7 is trying to be smart about tracing the callback associated with the
  IPI.

This results in having IPI trace events for:

o smp_call_function*()
o smp_send_reschedule()
o irq_work_queue*()
o standalone uses of __smp_call_single_queue()

This is incomplete, just looking at arm64 there's more IPI types that aren't
covered: 

  IPI_CPU_STOP,
  IPI_CPU_CRASH_STOP,
  IPI_TIMER,
  IPI_WAKEUP,

but apart from IPI_TIMER (cf. tick_broadcast()), those IPIs are both unfrequent
and accompanied with identifiable interference (stopper or cpuhp threads being
scheduled). I've added a point in my todolist to handle those in a later series
for the sake of completeness, but IMO this is ready to use.

Results
===

Using a recent enough libtraceevent (1.7.0 and above):

  $ trace-cmd record -e 'ipi:*' hackbench
  $ trace-cmd report
 hackbench-159   [002]   136.973122: ipi_send_cpumask: cpumask=0 
callsite=generic_exec_single+0x33 callback=nohz_csd_func+0x0
 hackbench-159   [002]   136.977945: ipi_send_cpumask: cpumask=0 
callsite=generic_exec_single+0x33 callback=nohz_csd_func+0x0
 hackbench-159   [002]   136.984576: ipi_send_cpumask: cpumask=3 
callsite=check_preempt_curr+0x37 callback=0x0
 hackbench-159   [002]   136.985996: ipi_send_cpumask: cpumask=0 
callsite=generic_exec_single+0x33 callback=nohz_csd_func+0x0
 [...]

Links
=

[1]: https://youtu.be/5gT57y4OzBM?t=14234

Revisions
=

v4: https://lore.kernel.org/lkml/20230119143619.2733236-1-vschn...@redhat.com/
v3: https://lore.kernel.org/lkml/20221202155817.2102944-1-vschn...@redhat.com/
v2: https://lore.kernel.org/lkml/20221102182949.3119584-1-vschn...@redhat.com/
v1: https://lore.kernel.org/lkml/20221007154145.1877054-1-vschn...@redhat.com/

v5 -> v4


o Rebased against 6.3-rc1

v3 -> v4


o Rebased against 6.2-rc4
  Re-ran my coccinelle scripts for the treewide change; only loongarch needed
  changes
o Dropped cpumask trace event field patch (now in 6.2-rc1)
o Applied RB and Ack tags
  Ingo, I wasn't sure if you meant to Ack the whole series or just the patch you
  replied to, so since I didn't want to unlawfully forge any tag I only added
  the one.
o Did a small pass on comments and changelogs

v2 -> v3


o Dropped the generic export of smp_send_reschedule(), turned it into a macro
  and a bunch of imports
o Dropped the send_call_function_single_ipi() macro madness, 

[PATCH 3/3] soc: fsl: cpm1: qmc: Fix assigned timeslot masks

2023-03-07 Thread Herve Codina
The assigned timeslot masks are 64bit values.
In case of 64 timeslots the code uses (1 << 64) which is undefined on a
64bit value. On the PowerPC architecture, this lead to an incorrect
result as (1 << 64) produces the same result as (1 << 0).

Fix the masks values taking care of the 64 timeslots case.

Signed-off-by: Herve Codina 
---
 drivers/soc/fsl/qe/qmc.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c
index cfa7207353e0..b3c292c9a14e 100644
--- a/drivers/soc/fsl/qe/qmc.c
+++ b/drivers/soc/fsl/qe/qmc.c
@@ -754,6 +754,11 @@ static int qmc_check_chans(struct qmc *qmc)
if (ret)
return ret;
 
+   if ((info.nb_tx_ts > 64) || (info.nb_rx_ts > 64)) {
+   dev_err(qmc->dev, "Number of TSA Tx/Rx TS assigned not 
supported\n");
+   return -EINVAL;
+   }
+
/*
 * If more than 32 TS are assigned to this serial, one common table is
 * used for Tx and Rx and so masks must be equal for all channels.
@@ -766,9 +771,8 @@ static int qmc_check_chans(struct qmc *qmc)
is_one_table = true;
}
 
-
-   tx_ts_assigned_mask = (((u64)1) << info.nb_tx_ts) - 1;
-   rx_ts_assigned_mask = (((u64)1) << info.nb_rx_ts) - 1;
+   tx_ts_assigned_mask = info.nb_tx_ts == 64 ? U64_MAX : (((u64)1) << 
info.nb_tx_ts) - 1;
+   rx_ts_assigned_mask = info.nb_rx_ts == 64 ? U64_MAX : (((u64)1) << 
info.nb_rx_ts) - 1;
 
list_for_each_entry(chan, >chan_head, list) {
if (chan->tx_ts_mask > tx_ts_assigned_mask) {
-- 
2.39.2



[PATCH 2/3] dt-bindings: soc: fsl: cpm_qe: cpm1-tsa: Remove unneeded property

2023-03-07 Thread Herve Codina
Remove the unneeded and unused #fsl,serial-cells property.

Signed-off-by: Herve Codina 
---
 .../bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml  | 10 --
 1 file changed, 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml
index 332e902bcc21..7e51c639a79a 100644
--- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml
+++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml
@@ -38,14 +38,6 @@ properties:
   '#size-cells':
 const: 0
 
-  '#fsl,serial-cells':
-$ref: /schemas/types.yaml#/definitions/uint32
-const: 1
-description:
-  TSA consumers that use a phandle to TSA need to pass the serial 
identifier
-  with this phandle (defined in dt-bindings/soc/fsl,tsa.h).
-  For instance "fsl,tsa-serial = < FSL_CPM_TSA_SCC4>;".
-
 patternProperties:
   '^tdm@[0-1]$':
 description:
@@ -174,7 +166,6 @@ required:
   - reg-names
   - '#address-cells'
   - '#size-cells'
-  - '#fsl,serial-cells'
 
 additionalProperties: false
 
@@ -190,7 +181,6 @@ examples:
 
 #address-cells = <1>;
 #size-cells = <0>;
-#fsl,serial-cells = <1>;
 
 tdm@0 {
 /* TDMa */
-- 
2.39.2



[PATCH 1/3] dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Remove unneeded property

2023-03-07 Thread Herve Codina
Remove the unneeded and unused #fsl,chan-cells property.

Signed-off-by: Herve Codina 
---
 .../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml  | 10 --
 1 file changed, 10 deletions(-)

diff --git 
a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml 
b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml
index 4ebbc7d52981..ec888f48cac8 100644
--- a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml
+++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml
@@ -59,14 +59,6 @@ properties:
   '#size-cells':
 const: 0
 
-  '#fsl,chan-cells':
-$ref: /schemas/types.yaml#/definitions/uint32
-const: 1
-description:
-  QMC consumers that use a phandle to QMC need to pass the channel number
-  with this phandle.
-  For instance "fsl,qmc-chan = < 16>;".
-
 patternProperties:
   '^channel@([0-9]|[1-5][0-9]|6[0-3])$':
 description:
@@ -121,7 +113,6 @@ required:
   - fsl,tsa-serial
   - '#address-cells'
   - '#size-cells'
-  - '#fsl,chan-cells'
 
 additionalProperties: false
 
@@ -140,7 +131,6 @@ examples:
 
 #address-cells = <1>;
 #size-cells = <0>;
-#fsl,chan-cells = <1>;
 
 fsl,tsa-serial = < FSL_CPM_TSA_SCC4>;
 
-- 
2.39.2



[PATCH 0/3] Fix the PowerQUICC audio support using the QMC

2023-03-07 Thread Herve Codina
A previous series added the PowerQUICC audio support using the QMC.
The v6 version of this previous series was applied but some feedbacks
lead to a v7 version.

The v6 can be found here:
 
https://lore.kernel.org/linux-kernel/20230217145645.1768659-1-herve.cod...@bootlin.com/
and the v7, here:
 
https://lore.kernel.org/linux-kernel/20230306161754.89146-1-herve.cod...@bootlin.com/

This 'fix' series is the incremental version of v6 -> v7 and can only be
applied on the Marc Brown's tree as the v6 patches it fixes are only
present on this tree.

Regards,
Herve Codina

Herve Codina (3):
  dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Remove unneeded property
  dt-bindings: soc: fsl: cpm_qe: cpm1-tsa: Remove unneeded property
  soc: fsl: cpm1: qmc: Fix assigned timeslot masks

 .../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml  | 10 --
 .../bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml  | 10 --
 drivers/soc/fsl/qe/qmc.c   | 10 +++---
 3 files changed, 7 insertions(+), 23 deletions(-)

-- 
2.39.2



Re: [PATCH] ASoC: do not include pm_runtime.h if not used

2023-03-07 Thread Charles Keepax
On Tue, Mar 07, 2023 at 12:30:22PM +0200, Claudiu Beznea wrote:
> Do not include pm_runtime.h header in files where runtime PM support is
> not implemented.
> 
> Signed-off-by: Claudiu Beznea 
> ---
>  sound/soc/codecs/cs35l45.h| 1 -
> diff --git a/sound/soc/codecs/cs35l45.h b/sound/soc/codecs/cs35l45.h
> index 53fe9d2b7b15..0555702eac03 100644
> --- a/sound/soc/codecs/cs35l45.h
> +++ b/sound/soc/codecs/cs35l45.h
> @@ -11,7 +11,6 @@
>  #ifndef CS35L45_H
>  #define CS35L45_H
>  
> -#include 
>  #include 
>  #include 
>  

cs35l45 does already make use of some functions from that header,
and more support is in the process of being upstreamed. So this
part should be dropped.

Thanks,
Charles


Re: [PATCH 2/5] selftests/powerpc/dscr: Add lockstep test cases to DSCR explicit tests

2023-03-07 Thread Michael Ellerman
Benjamin Gray  writes:
> Add new cases to the relevant tests that use explicitly synchronized
> threads to test the behaviour across context switches with less
> randomness. By locking the participants to the same CPU we guarantee a
> context switch occurs each time they make progress, which is a likely
> failure point if the kernel is not tracking the thread local DSCR
> correctly.
>
> The random case is left in to keep exercising potential edge cases.
>
> Signed-off-by: Benjamin Gray 
> ---
>  tools/testing/selftests/powerpc/dscr/Makefile |  1 +
>  tools/testing/selftests/powerpc/dscr/dscr.h   | 23 +
>  .../powerpc/dscr/dscr_default_test.c  | 87 ---
>  .../powerpc/dscr/dscr_explicit_test.c | 87 ++-
>  4 files changed, 183 insertions(+), 15 deletions(-)
...
> diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h 
> b/tools/testing/selftests/powerpc/dscr/dscr.h
> index 2c54998d4715..903ee0c83fac 100644
> --- a/tools/testing/selftests/powerpc/dscr/dscr.h
> +++ b/tools/testing/selftests/powerpc/dscr/dscr.h
> @@ -90,4 +92,25 @@ double uniform_deviate(int seed)
>  {
>   return seed * (1.0 / (RAND_MAX + 1.0));
>  }
> +
> +int restrict_to_one_cpu(void)
> +{
> + cpu_set_t cpus;
> + int cpu;
> +
> + FAIL_IF(sched_getaffinity(0, sizeof(cpu_set_t), ));
> +
> + for (cpu = 0; cpu < CPU_SETSIZE; cpu++)
> + if (CPU_ISSET(cpu, ))
> + break;
> +
> + FAIL_IF(cpu == CPU_SETSIZE);
> +
> + CPU_ZERO();
> + CPU_SET(cpu, );
> + FAIL_IF(sched_setaffinity(0, sizeof(cpu_set_t), ));
> +
> + return 0;
> +}

We have pick_online_cpu() in utils.c, can you use that?

You probably also need to move bind_to_cpu() from pmu/lib.c to utils.c
so you can use it.

cheers


Re: [PATCH v10 03/13] dt-bindings: Convert gpio-mmio to yaml

2023-03-07 Thread Krzysztof Kozlowski
On 06/03/2023 20:15, Sean Anderson wrote:
> This is a generic binding for simple MMIO GPIO controllers. Although we
> have a single driver for these controllers, they were previously spread
> over several files. Consolidate them. The register descriptions are
> adapted from the comments in the source. There is no set order for the
> registers, so I have not specified one.
> 
> Signed-off-by: Sean Anderson 
> ---
> 
> Changes in v10:
> - New
> 
>  .../bindings/gpio/brcm,bcm6345-gpio.yaml  |  16 +--
>  .../devicetree/bindings/gpio/gpio-mmio.yaml   | 136 ++
>  .../bindings/gpio/ni,169445-nand-gpio.txt |  38 -
>  .../devicetree/bindings/gpio/wd,mbl-gpio.txt  |  38 -
>  4 files changed, 137 insertions(+), 91 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/gpio/gpio-mmio.yaml
>  delete mode 100644 
> Documentation/devicetree/bindings/gpio/ni,169445-nand-gpio.txt
>  delete mode 100644 Documentation/devicetree/bindings/gpio/wd,mbl-gpio.txt

https://lore.kernel.org/all/20230126-gpio-mmio-fix-v2-1-38397aace...@ncr.com/

https://lore.kernel.org/all/9bc9349d6e13d81c6200b0cd8fa20c76263043f6.1462543458.git.chunk...@googlemail.com/



Best regards,
Krzysztof