[PATCH v2] powerpc/hv-gpci: Fix the H_GET_PERF_COUNTER_INFO hcall return value checks
Running event
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
in one of the system throws below error:
---Logs---
# perf list | grep
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=?/[Kernel
PMU event]
# perf stat -v -e
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
sleep 2
Using CPUID 00800200
Control descriptor is not initialized
Warning:
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
event is not supported by the kernel.
failed to read counter
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
Performance counter stats for 'system wide':
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
2.000700771 seconds time elapsed
The above error is because of the hcall failure as required
permission "Enable Performance Information Collection" is not set.
Based on current code, single_gpci_request function did not check the
error type incase hcall fails and by default returns EINVAL. But we can
have other reasons for hcall failures like H_AUTHORITY/H_PARAMETER with
detail_rc as GEN_BUF_TOO_SMALL, for which we need to act accordingly.
Fix this issue by adding new checks in the single_gpci_request and
h_gpci_event_init functions.
Result after fix patch changes:
# perf stat -e
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
sleep 2
Error:
No permission to enable
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
event.
Fixes: 220a0c609ad1 ("powerpc/perf: Add support for the hv gpci (get
performance counter info) interface")
Reported-by: Akanksha J N
Signed-off-by: Kajol Jain
---
Changelog:
v1 -> v2
- To make sure the hcall failure with H_PARAMETER is only because of
buffer size issue, add check for detail_rc value to be
GEN_BUF_TOO_SMALL(0x1B) as suggested by Michael Ellerman.
arch/powerpc/perf/hv-gpci.c | 29 +++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 27f18119fda1..89bfdc2ce8bc 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -695,6 +695,20 @@ static unsigned long single_gpci_request(u32 req, u32
starting_index,
ret = plpar_hcall_norets(H_GET_PERF_COUNTER_INFO,
virt_to_phys(arg), HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* ret value as 'H_PARAMETER' with detail_rc as 'GEN_BUF_TOO_SMALL',
+* specifies that the current buffer size cannot accommodate
+* all the information and a partial buffer returned.
+* Since in this function we are only accessing data for a given
starting index,
+* we don't need to accommodate whole data and can get required count by
+* accessing first entry data.
+* Hence hcall fails only incase the ret value is other than H_SUCCESS
or
+* H_PARAMETER with detail_rc value as GEN_BUF_TOO_SMALL(0x1B).
+*/
+ if (ret == H_PARAMETER && be32_to_cpu(arg->params.detail_rc) == 0x1B)
+ ret = 0;
+
if (ret) {
pr_devel("hcall failed: 0x%lx\n", ret);
goto out;
@@ -759,6 +773,7 @@ static int h_gpci_event_init(struct perf_event *event)
{
u64 count;
u8 length;
+ unsigned long ret;
/* Not our event */
if (event->attr.type != event->pmu->type)
@@ -789,13 +804,23 @@ static int h_gpci_event_init(struct perf_event *event)
}
/* check if the request works... */
- if (single_gpci_request(event_get_request(event),
+ ret = single_gpci_request(event_get_request(event),
event_get_starting_index(event),
event_get_secondary_index(event),
event_get_counter_info_version(event),
event_get_offset(event),
length,
- )) {
+ );
+
+ /*
+* ret value as H_AUTHORITY implies that partition is not permitted to
retrieve
+* performance information, and required to set
+* "Enable Performance Information Collection" option.
+*/
+ if (ret == H_AUTHORITY)
+ return -EPERM;
+
+ if (ret) {
pr_devel("gpci hcall failed\n");
return -EINVAL;
}
--
2.43.0
[PATCH] powerpc/hv-gpci: Fix the hcall return value checks in single_gpci_request function
Running event
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
in one of the system throws below error:
---Logs---
# perf list | grep
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=?/[Kernel
PMU event]
# perf stat -v -e
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
sleep 2
Using CPUID 00800200
Control descriptor is not initialized
Warning:
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
event is not supported by the kernel.
failed to read counter
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
Performance counter stats for 'system wide':
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
2.000700771 seconds time elapsed
The above error is because of the hcall failure as required
permission "Enable Performance Information Collection" is not set.
Based on current code, single_gpci_request function did not check the
error type incase hcall fails and by default returns EINVAL. But we can
have other reasons for hcall failures like H_AUTHORITY/H_PARAMETER for which
we need to act accordingly.
Fix this issue by adding new checks in the single_gpci_request function.
Result after fix patch changes:
# perf stat -e
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
sleep 2
Error:
No permission to enable
hv_gpci/dispatch_timebase_by_processor_processor_time_in_timebase_cycles,phys_processor_idx=0/
event.
Fixes: 220a0c609ad1 ("powerpc/perf: Add support for the hv gpci (get
performance counter info) interface")
Reported-by: Akanksha J N
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 29 +
1 file changed, 25 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 27f18119fda1..101060facd81 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -695,7 +695,17 @@ static unsigned long single_gpci_request(u32 req, u32
starting_index,
ret = plpar_hcall_norets(H_GET_PERF_COUNTER_INFO,
virt_to_phys(arg), HGPCI_REQ_BUFFER_SIZE);
- if (ret) {
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL',
+* which means that the current buffer size cannot accommodate
+* all the information and a partial buffer returned.
+* Since in this function we are only accessing data for a given
starting index,
+* we don't need to accommodate whole data and can get required count by
+* accessing very first entry.
+* Hence hcall fails only incase the ret value is other than H_SUCCESS
or H_PARAMETER.
+*/
+ if (ret && (ret != H_PARAMETER)) {
pr_devel("hcall failed: 0x%lx\n", ret);
goto out;
}
@@ -724,7 +734,7 @@ static u64 h_gpci_get_value(struct perf_event *event)
event_get_offset(event),
event_get_length(event),
);
- if (ret)
+ if (ret && (ret != H_PARAMETER))
return 0;
return count;
}
@@ -759,6 +769,7 @@ static int h_gpci_event_init(struct perf_event *event)
{
u64 count;
u8 length;
+ unsigned long ret;
/* Not our event */
if (event->attr.type != event->pmu->type)
@@ -789,13 +800,23 @@ static int h_gpci_event_init(struct perf_event *event)
}
/* check if the request works... */
- if (single_gpci_request(event_get_request(event),
+ ret = single_gpci_request(event_get_request(event),
event_get_starting_index(event),
event_get_secondary_index(event),
event_get_counter_info_version(event),
event_get_offset(event),
length,
- )) {
+ );
+
+ /*
+* ret value as H_AUTHORITY implies that partition is not permitted to
retrieve
+* performance information, and required to set
+* "Enable Performance Information Collection" option.
+*/
+ if (ret == H_AUTHORITY)
+ return -EPERM;
+
+ if (ret && (ret != H_PARAMETER)) {
pr_devel("gpci hcall failed\n");
return -EINVAL;
}
--
2.43.0
[PATCH 2/2] powerpc/hv-gpxi: Fix access permission of hv-gpci interface files
Fix access permission of the hv-gpci topology information
interface files from 0444 to 0400 (admin read only).
Fixes: 71f1c39647d8 ("powerpc/hv_gpci: Add sysfs file inside hv_gpci device to
show processor bus topology information")
Reported-by: Disha Goel
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 27f18119fda1..303d160319e8 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -890,7 +890,7 @@ static struct device_attribute
*sysinfo_device_attr_create(int
return NULL;
sysfs_attr_init(>attr);
- attr->attr.mode = 0444;
+ attr->attr.mode = 0400;
switch (sysinfo_interface_group_index) {
case INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR:
--
2.39.3
[PATCH 1/2] powerpc/hv-gpci: Add return value check in affinity_domain_via_partition_show function
To access hv-gpci kernel interface files data, the
"Enable Performance Information Collection" option has to be set
in hmc. Incase that option is not set and user try to read
the interface files, it should give error message as
operation not permitted.
Result of accessing added interface files with disabled
performance collection option:
[command]# cat processor_bus_topology
cat: processor_bus_topology: Operation not permitted
[command]# cat processor_config
cat: processor_config: Operation not permitted
[command]# cat affinity_domain_via_domain
cat: affinity_domain_via_domain: Operation not permitted
[command]# cat affinity_domain_via_virtual_processor
cat: affinity_domain_via_virtual_processor: Operation not permitted
[command]# cat affinity_domain_via_partition
Based on above result there is no error message when reading
affinity_domain_via_partition file because of missing
check for failed hcall. Fix this issue by adding
a check in the start of affinity_domain_via_partition_show
function, to return error incase hcall fails, with error type
other then H_PARAMETER.
Fixes: a15e0d6a6929 ("powerpc/hv_gpci: Add sysfs file inside hv_gpci device to
show affinity domain via partition information")
Reported-by: Disha Goel
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 39dbe6b348df..27f18119fda1 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -534,6 +534,9 @@ static ssize_t affinity_domain_via_partition_show(struct
device *dev, struct dev
if (!ret)
goto parse_result;
+ if (ret && (ret != H_PARAMETER))
+ goto out;
+
/*
* ret value as 'H_PARAMETER' implies that the current buffer size
* can't accommodate all the information, and a partial buffer
--
2.39.3
[PATCH v2 3/3] perf vendor events: Update metric events for power10 platform
Update JSON/events for power10 platform with additional metrics.
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/metrics.json | 388 ++
1 file changed, 388 insertions(+)
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
b/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
index 4d66b75c6ad5..a36621858ea3 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
@@ -434,6 +434,13 @@
"MetricName": "L1_INST_MISS_RATE",
"ScaleUnit": "1%"
},
+{
+"BriefDescription": "Percentage of completed instructions that were
demand fetches that missed the L1 and L2 instruction cache",
+"MetricExpr": "PM_INST_FROM_L2MISS * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "General",
+"MetricName": "L2_INST_MISS_RATE",
+"ScaleUnit": "1%"
+},
{
"BriefDescription": "Percentage of completed instructions that were
demand fetches that reloaded from beyond the L3 icache",
"MetricExpr": "PM_INST_FROM_L3MISS / PM_RUN_INST_CMPL * 100",
@@ -466,6 +473,13 @@
"MetricGroup": "General",
"MetricName": "LOADS_PER_INST"
},
+{
+"BriefDescription": "Percentage of demand loads that reloaded from the
L2 per completed instruction",
+"MetricExpr": "PM_DATA_FROM_L2 * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_L2_RATE",
+"ScaleUnit": "1%"
+},
{
"BriefDescription": "Percentage of demand loads that reloaded from
beyond the L2 per completed instruction",
"MetricExpr": "PM_DATA_FROM_L2MISS / PM_RUN_INST_CMPL * 100",
@@ -473,6 +487,34 @@
"MetricName": "DL1_RELOAD_FROM_L2_MISS_RATE",
"ScaleUnit": "1%"
},
+{
+"BriefDescription": "Percentage of demand loads that reloaded using
modified data from another core's L2 or L3 on a remote chip, per completed
instruction",
+"MetricExpr": "PM_DATA_FROM_RL2L3_MOD * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_RL2L3_MOD_RATE",
+"ScaleUnit": "1%"
+},
+{
+"BriefDescription": "Percentage of demand loads that reloaded using
shared data from another core's L2 or L3 on a remote chip, per completed
instruction",
+"MetricExpr": "PM_DATA_FROM_RL2L3_SHR * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_RL2L3_SHR_RATE",
+"ScaleUnit": "1%"
+},
+{
+"BriefDescription": "Percentage of demand loads that reloaded from the
L3 per completed instruction",
+"MetricExpr": "PM_DATA_FROM_L3 * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_L3_RATE",
+"ScaleUnit": "1%"
+},
+{
+"BriefDescription": "Percentage of demand loads that reloaded with
data brought into the L3 by prefetch per completed instruction",
+"MetricExpr": "PM_DATA_FROM_L3_MEPF * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_L3_MEPF_RATE",
+"ScaleUnit": "1%"
+},
{
"BriefDescription": "Percentage of demand loads that reloaded from
beyond the L3 per completed instruction",
"MetricExpr": "PM_DATA_FROM_L3MISS / PM_RUN_INST_CMPL * 100",
@@ -480,6 +522,66 @@
"MetricName": "DL1_RELOAD_FROM_L3_MISS_RATE",
"ScaleUnit": "1%"
},
+{
+"BriefDescription": "Percentage of demand loads that reloaded using
modified data from another core's L2 or L3 on a distant chip, per completed
instruction",
+"MetricExpr": "PM_DATA_FROM_DL2L3_MOD * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_DL2L3_MOD_RATE",
+"ScaleUnit": "1%"
+},
+{
+"BriefDe
[PATCH v2 2/3] perf vendor events: Update JSON/events for power10 platform
Update JSON/Events list with additional data-source events
for power10 platform.
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/datasource.json | 505 ++
1 file changed, 505 insertions(+)
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
b/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
index 12cfb9785433..6b0356f2d301 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
@@ -1278,5 +1278,510 @@
"EventCode": "0x0A424000C142",
"EventName": "PM_MRK_DATA_FROM_NON_REGENT_L2L3_MOD",
"BriefDescription": "The processor's L1 data cache was reloaded with a
line in the M (exclusive) state from another core's L2 or L3 on the same chip
in a different regent due to a demand miss for a marked instruction."
+ },
+ {
+"EventCode": "0x0A424020C142",
+"EventName": "PM_MRK_DATA_FROM_NON_REGENT_L2L3_MOD_ALL",
+"BriefDescription": "The processor's L1 data cache was reloaded with a
line in the M (exclusive) state from another core's L2 or L3 on the same chip
in a different regent due to a demand miss or prefetch reload for a marked
instruction."
+ },
+ {
+"EventCode": "0x0A03C142",
+"EventName": "PM_MRK_INST_FROM_NON_REGENT_L2L3",
+"BriefDescription": "The processor's instruction cache was reloaded from
another core's L2 or L3 on the same chip in a different regent due to a demand
miss for a marked instruction."
+ },
+ {
+"EventCode": "0x0A034000C142",
+"EventName": "PM_MRK_DATA_FROM_NON_REGENT_L2L3",
+"BriefDescription": "The processor's L1 data cache was reloaded from
another core's L2 or L3 on the same chip in a different regent due to a demand
miss for a marked instruction."
+ },
+ {
+"EventCode": "0x0A030010C142",
+"EventName": "PM_MRK_INST_FROM_NON_REGENT_L2L3_ALL",
+"BriefDescription": "The processor's instruction cache was reloaded from
another core's L2 or L3 on the same chip in a different regent due to a demand
miss or prefetch reload for a marked instruction."
+ },
+ {
+"EventCode": "0x0A034020C142",
+"EventName": "PM_MRK_DATA_FROM_NON_REGENT_L2L3_ALL",
+"BriefDescription": "The processor's L1 data cache was reloaded from
another core's L2 or L3 on the same chip in a different regent due to a demand
miss or prefetch reload for a marked instruction."
+ },
+ {
+"EventCode": "0x0941C142",
+"EventName": "PM_MRK_INST_FROM_LMEM",
+"BriefDescription": "The processor's instruction cache was reloaded from
the local chip's memory due to a demand miss for a marked instruction."
+ },
+ {
+"EventCode": "0x09404000C142",
+"EventName": "PM_MRK_DATA_FROM_LMEM",
+"BriefDescription": "The processor's L1 data cache was reloaded from the
local chip's memory due to a demand miss for a marked instruction."
+ },
+ {
+"EventCode": "0x09410010C142",
+"EventName": "PM_MRK_INST_FROM_LMEM_ALL",
+"BriefDescription": "The processor's instruction cache was reloaded from
the local chip's memory due to a demand miss or prefetch reload for a marked
instruction."
+ },
+ {
+"EventCode": "0x09404020C142",
+"EventName": "PM_MRK_DATA_FROM_LMEM_ALL",
+"BriefDescription": "The processor's L1 data cache was reloaded from the
local chip's memory due to a demand miss or prefetch reload for a marked
instruction."
+ },
+ {
+"EventCode": "0x09804000C142",
+"EventName": "PM_MRK_DATA_FROM_L_OC_CACHE",
+"BriefDescription": "The processor's L1 data cache was reloaded from the
local chip's OpenCAPI cache due to a demand miss for a marked instruction."
+ },
+ {
+"EventCode": "0x09804020C142",
+"EventName": "PM_MRK_DATA_FROM_L_OC_CACHE_ALL",
+"BriefDescription": "The processor's L1 data cache was reloaded from the
local chip's OpenCAPI cache due to a demand miss or prefetch reload for a
marked instruction."
+ },
+ {
+"EventCode": "0x09C04000C142",
+"EventName": "PM_MRK_DATA_FROM_L_OC_MEM",
+"BriefDescription": "The processor's L1 data cache was reloaded from the
local chip's OpenCAPI memory due to a
[PATCH v2 1/3] perf vendor events: Update JSON/events for power10 platform
Update JSON/Events list with data-source events for power10 platform.
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/datasource.json | 1282 +
.../arch/powerpc/power10/others.json | 10 -
.../arch/powerpc/power10/translation.json |5 -
3 files changed, 1282 insertions(+), 15 deletions(-)
create mode 100644 tools/perf/pmu-events/arch/powerpc/power10/datasource.json
---
Changelog:
v1->v2
- Split first patch as its bounce from
linux-perf-us...@vger.kernel.org mailing list because of
'Message too long (>10 chars)' error.
---
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
b/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
new file mode 100644
index ..12cfb9785433
--- /dev/null
+++ b/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
@@ -0,0 +1,1282 @@
+[
+ {
+"EventCode": "0x200FE",
+"EventName": "PM_DATA_FROM_L2MISS",
+"BriefDescription": "The processor's L1 data cache was reloaded from a
source beyond the local core's L2 due to a demand miss."
+ },
+ {
+"EventCode": "0x300FE",
+"EventName": "PM_DATA_FROM_L3MISS",
+"BriefDescription": "The processor's L1 data cache was reloaded from
beyond the local core's L3 due to a demand miss."
+ },
+ {
+"EventCode": "0x400FE",
+"EventName": "PM_DATA_FROM_MEMORY",
+"BriefDescription": "The processor's data cache was reloaded from local,
remote, or distant memory due to a demand miss."
+ },
+ {
+"EventCode": "0x0003C040",
+"EventName": "PM_INST_FROM_L2",
+"BriefDescription": "The processor's instruction cache was reloaded from
the local core's L2 due to a demand miss."
+ },
+ {
+"EventCode": "0x00034000C040",
+"EventName": "PM_DATA_FROM_L2",
+"BriefDescription": "The processor's L1 data cache was reloaded from the
local core's L2 due to a demand miss."
+ },
+ {
+"EventCode": "0x00030010C040",
+"EventName": "PM_INST_FROM_L2_ALL",
+"BriefDescription": "The processor's instruction cache was reloaded from
the local core's L2 due to a demand miss or prefetch reload."
+ },
+ {
+"EventCode": "0x00034020C040",
+"EventName": "PM_DATA_FROM_L2_ALL",
+"BriefDescription": "The processor's L1 data cache was reloaded from the
local core's L2 due to a demand miss or prefetch reload."
+ },
+ {
+"EventCode": "0x003FC040",
+"EventName": "PM_INST_FROM_L1MISS",
+"BriefDescription": "The processor's instruction cache was reloaded from a
source beyond the local core's L1 due to a demand miss."
+ },
+ {
+"EventCode": "0x003F4000C040",
+"EventName": "PM_DATA_FROM_L1MISS",
+"BriefDescription": "The processor's L1 data cache was reloaded from a
source beyond the local core's L1 due to a demand miss."
+ },
+ {
+"EventCode": "0x003F0010C040",
+"EventName": "PM_INST_FROM_L1MISS_ALL",
+"BriefDescription": "The processor's instruction cache was reloaded from a
source beyond the local core's L1 due to a demand miss or prefetch reload."
+ },
+ {
+"EventCode": "0x003F4020C040",
+"EventName": "PM_DATA_FROM_L1MISS_ALL",
+"BriefDescription": "The processor's L1 data cache was reloaded from a
source beyond the local core's L1 due to a demand miss or prefetch reload."
+ },
+ {
+"EventCode": "0x4000C040",
+"EventName": "PM_DATA_FROM_L2_NO_CONFLICT",
+"BriefDescription": "The processor's L1 data cache was reloaded without
dispatch conflicts with data NOT in the MEPF state from the local core's L2 due
to a demand miss."
+ },
+ {
+"EventCode": "0x4020C040",
+"EventName": "PM_DATA_FROM_L2_NO_CONFLICT_ALL",
+"BriefDescription": "The processor's L1 data cache was reloaded without
dispatch conflicts with data NOT in the MEPF state from the local core's L2 due
to a demand miss or prefetch reload."
+ },
+ {
+"EventCode": "0x00404000C040",
+"EventName": "PM_DATA_FROM_L2_MEPF",
+"BriefDescription": "The processor's L1 data cache was reloaded with data
in the MEPF state without dispatch conflicts from the local
[PATCH] powerpc/perf/hv-24x7: Update domain value check
Valid domain value is in range 1 to HV_PERF_DOMAIN_MAX.
Current code has check for domain value greater than or
equal to HV_PERF_DOMAIN_MAX. But the check for domain value 0
is missing.
Fix this issue by adding check for domain value 0.
Fixes: ebd4a5a3ebd9 ("powerpc/perf/hv-24x7: Minor improvements")
Reported-by: Krishan Gopal Sarawast
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-24x7.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-24x7.c b/arch/powerpc/perf/hv-24x7.c
index 317175791d23..644881cc1c00 100644
--- a/arch/powerpc/perf/hv-24x7.c
+++ b/arch/powerpc/perf/hv-24x7.c
@@ -1418,7 +1418,7 @@ static int h_24x7_event_init(struct perf_event *event)
}
domain = event_get_domain(event);
- if (domain >= HV_PERF_DOMAIN_MAX) {
+ if (domain == 0 || domain >= HV_PERF_DOMAIN_MAX) {
pr_devel("invalid domain %d\n", domain);
return -EINVAL;
}
--
2.35.3
[PATCH 2/2] perf vendor events: Update metric events for power10 platform
Update JSON/events for power10 platform with additional metrics.
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/metrics.json | 388 ++
1 file changed, 388 insertions(+)
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
b/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
index 4d66b75c6ad5..a36621858ea3 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
@@ -434,6 +434,13 @@
"MetricName": "L1_INST_MISS_RATE",
"ScaleUnit": "1%"
},
+{
+"BriefDescription": "Percentage of completed instructions that were
demand fetches that missed the L1 and L2 instruction cache",
+"MetricExpr": "PM_INST_FROM_L2MISS * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "General",
+"MetricName": "L2_INST_MISS_RATE",
+"ScaleUnit": "1%"
+},
{
"BriefDescription": "Percentage of completed instructions that were
demand fetches that reloaded from beyond the L3 icache",
"MetricExpr": "PM_INST_FROM_L3MISS / PM_RUN_INST_CMPL * 100",
@@ -466,6 +473,13 @@
"MetricGroup": "General",
"MetricName": "LOADS_PER_INST"
},
+{
+"BriefDescription": "Percentage of demand loads that reloaded from the
L2 per completed instruction",
+"MetricExpr": "PM_DATA_FROM_L2 * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_L2_RATE",
+"ScaleUnit": "1%"
+},
{
"BriefDescription": "Percentage of demand loads that reloaded from
beyond the L2 per completed instruction",
"MetricExpr": "PM_DATA_FROM_L2MISS / PM_RUN_INST_CMPL * 100",
@@ -473,6 +487,34 @@
"MetricName": "DL1_RELOAD_FROM_L2_MISS_RATE",
"ScaleUnit": "1%"
},
+{
+"BriefDescription": "Percentage of demand loads that reloaded using
modified data from another core's L2 or L3 on a remote chip, per completed
instruction",
+"MetricExpr": "PM_DATA_FROM_RL2L3_MOD * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_RL2L3_MOD_RATE",
+"ScaleUnit": "1%"
+},
+{
+"BriefDescription": "Percentage of demand loads that reloaded using
shared data from another core's L2 or L3 on a remote chip, per completed
instruction",
+"MetricExpr": "PM_DATA_FROM_RL2L3_SHR * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_RL2L3_SHR_RATE",
+"ScaleUnit": "1%"
+},
+{
+"BriefDescription": "Percentage of demand loads that reloaded from the
L3 per completed instruction",
+"MetricExpr": "PM_DATA_FROM_L3 * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_L3_RATE",
+"ScaleUnit": "1%"
+},
+{
+"BriefDescription": "Percentage of demand loads that reloaded with
data brought into the L3 by prefetch per completed instruction",
+"MetricExpr": "PM_DATA_FROM_L3_MEPF * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_L3_MEPF_RATE",
+"ScaleUnit": "1%"
+},
{
"BriefDescription": "Percentage of demand loads that reloaded from
beyond the L3 per completed instruction",
"MetricExpr": "PM_DATA_FROM_L3MISS / PM_RUN_INST_CMPL * 100",
@@ -480,6 +522,66 @@
"MetricName": "DL1_RELOAD_FROM_L3_MISS_RATE",
"ScaleUnit": "1%"
},
+{
+"BriefDescription": "Percentage of demand loads that reloaded using
modified data from another core's L2 or L3 on a distant chip, per completed
instruction",
+"MetricExpr": "PM_DATA_FROM_DL2L3_MOD * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "dL1_Reloads",
+"MetricName": "DL1_RELOAD_FROM_DL2L3_MOD_RATE",
+"ScaleUnit": "1%"
+},
+{
+"BriefDe
[PATCH 1/2] perf vendor events: Update JSON/events for power10 platform
Update JSON/Events list with data-source events for power10 platform.
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/datasource.json | 1787 +
.../arch/powerpc/power10/others.json | 10 -
.../arch/powerpc/power10/translation.json |5 -
3 files changed, 1787 insertions(+), 15 deletions(-)
create mode 100644 tools/perf/pmu-events/arch/powerpc/power10/datasource.json
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
b/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
new file mode 100644
index ..6b0356f2d301
--- /dev/null
+++ b/tools/perf/pmu-events/arch/powerpc/power10/datasource.json
@@ -0,0 +1,1787 @@
+[
+ {
+"EventCode": "0x200FE",
+"EventName": "PM_DATA_FROM_L2MISS",
+"BriefDescription": "The processor's L1 data cache was reloaded from a
source beyond the local core's L2 due to a demand miss."
+ },
+ {
+"EventCode": "0x300FE",
+"EventName": "PM_DATA_FROM_L3MISS",
+"BriefDescription": "The processor's L1 data cache was reloaded from
beyond the local core's L3 due to a demand miss."
+ },
+ {
+"EventCode": "0x400FE",
+"EventName": "PM_DATA_FROM_MEMORY",
+"BriefDescription": "The processor's data cache was reloaded from local,
remote, or distant memory due to a demand miss."
+ },
+ {
+"EventCode": "0x0003C040",
+"EventName": "PM_INST_FROM_L2",
+"BriefDescription": "The processor's instruction cache was reloaded from
the local core's L2 due to a demand miss."
+ },
+ {
+"EventCode": "0x00034000C040",
+"EventName": "PM_DATA_FROM_L2",
+"BriefDescription": "The processor's L1 data cache was reloaded from the
local core's L2 due to a demand miss."
+ },
+ {
+"EventCode": "0x00030010C040",
+"EventName": "PM_INST_FROM_L2_ALL",
+"BriefDescription": "The processor's instruction cache was reloaded from
the local core's L2 due to a demand miss or prefetch reload."
+ },
+ {
+"EventCode": "0x00034020C040",
+"EventName": "PM_DATA_FROM_L2_ALL",
+"BriefDescription": "The processor's L1 data cache was reloaded from the
local core's L2 due to a demand miss or prefetch reload."
+ },
+ {
+"EventCode": "0x003FC040",
+"EventName": "PM_INST_FROM_L1MISS",
+"BriefDescription": "The processor's instruction cache was reloaded from a
source beyond the local core's L1 due to a demand miss."
+ },
+ {
+"EventCode": "0x003F4000C040",
+"EventName": "PM_DATA_FROM_L1MISS",
+"BriefDescription": "The processor's L1 data cache was reloaded from a
source beyond the local core's L1 due to a demand miss."
+ },
+ {
+"EventCode": "0x003F0010C040",
+"EventName": "PM_INST_FROM_L1MISS_ALL",
+"BriefDescription": "The processor's instruction cache was reloaded from a
source beyond the local core's L1 due to a demand miss or prefetch reload."
+ },
+ {
+"EventCode": "0x003F4020C040",
+"EventName": "PM_DATA_FROM_L1MISS_ALL",
+"BriefDescription": "The processor's L1 data cache was reloaded from a
source beyond the local core's L1 due to a demand miss or prefetch reload."
+ },
+ {
+"EventCode": "0x4000C040",
+"EventName": "PM_DATA_FROM_L2_NO_CONFLICT",
+"BriefDescription": "The processor's L1 data cache was reloaded without
dispatch conflicts with data NOT in the MEPF state from the local core's L2 due
to a demand miss."
+ },
+ {
+"EventCode": "0x4020C040",
+"EventName": "PM_DATA_FROM_L2_NO_CONFLICT_ALL",
+"BriefDescription": "The processor's L1 data cache was reloaded without
dispatch conflicts with data NOT in the MEPF state from the local core's L2 due
to a demand miss or prefetch reload."
+ },
+ {
+"EventCode": "0x00404000C040",
+"EventName": "PM_DATA_FROM_L2_MEPF",
+"BriefDescription": "The processor's L1 data cache was reloaded with data
in the MEPF state without dispatch conflicts from the local core's L2 due to a
demand miss."
+ },
+ {
+"EventCode": "0x00404020C040",
+"EventName": "PM_DATA_FROM_L2_MEPF_ALL&q
[PATCH] perf test: Skip perf bench breakpoint run if no breakpoints available
Based on commit 7d54a4acd8c1 ("perf test: Skip watchpoint
tests if no watchpoints available"), hardware breakpoints
are not available for power9 platform and because of that
perf bench breakpoint run fails on power9 platform.
Add code to check for the return value of perf_event_open()
in breakpoint run and skip the perf bench breakpoint run,
if hardware breakpoints are not available.
Result on power9 system before patch changes:
[command]# perf bench breakpoint thread
perf_event_open: No such device
Result on power9 system after patch changes:
[command]# ./perf bench breakpoint thread
Skipping perf bench breakpoint thread: No hardware support
Reported-by: Disha Goel
Signed-off-by: Kajol Jain
---
tools/perf/bench/breakpoint.c | 24 +---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/tools/perf/bench/breakpoint.c b/tools/perf/bench/breakpoint.c
index 41385f89ffc7..dfd18f5db97d 100644
--- a/tools/perf/bench/breakpoint.c
+++ b/tools/perf/bench/breakpoint.c
@@ -47,6 +47,7 @@ struct breakpoint {
static int breakpoint_setup(void *addr)
{
struct perf_event_attr attr = { .size = 0, };
+ int fd;
attr.type = PERF_TYPE_BREAKPOINT;
attr.size = sizeof(attr);
@@ -56,7 +57,12 @@ static int breakpoint_setup(void *addr)
attr.bp_addr = (unsigned long)addr;
attr.bp_type = HW_BREAKPOINT_RW;
attr.bp_len = HW_BREAKPOINT_LEN_1;
- return syscall(SYS_perf_event_open, , 0, -1, -1, 0);
+ fd = syscall(SYS_perf_event_open, , 0, -1, -1, 0);
+
+ if (fd < 0)
+ fd = -errno;
+
+ return fd;
}
static void *passive_thread(void *arg)
@@ -122,8 +128,14 @@ int bench_breakpoint_thread(int argc, const char **argv)
for (i = 0; i < thread_params.nbreakpoints; i++) {
breakpoints[i].fd = breakpoint_setup([i].watched);
- if (breakpoints[i].fd == -1)
+
+ if (breakpoints[i].fd < 0) {
+ if (breakpoints[i].fd == -ENODEV) {
+ printf("Skipping perf bench breakpoint thread:
No hardware support\n");
+ return 0;
+ }
exit((perror("perf_event_open"), EXIT_FAILURE));
+ }
}
gettimeofday(, NULL);
for (i = 0; i < thread_params.nparallel; i++) {
@@ -196,8 +208,14 @@ int bench_breakpoint_enable(int argc, const char **argv)
exit(EXIT_FAILURE);
}
fd = breakpoint_setup();
- if (fd == -1)
+
+ if (fd < 0) {
+ if (fd == -ENODEV) {
+ printf("Skipping perf bench breakpoint enable: No
hardware support\n");
+ return 0;
+ }
exit((perror("perf_event_open"), EXIT_FAILURE));
+ }
nthreads = enable_params.npassive + enable_params.nactive;
threads = calloc(nthreads, sizeof(threads[0]));
if (!threads)
--
2.39.3
[PATCH 7/7] perf vendor events: Update metric events for power10 platform
Update JSON/events for power10 platform with additional metrics.
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/metrics.json | 33 +++
1 file changed, 33 insertions(+)
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
b/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
index 182369076d95..4d66b75c6ad5 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
@@ -24,6 +24,12 @@
"MetricGroup": "CPI",
"MetricName": "DISPATCH_STALL_FLUSH_CPI"
},
+{
+"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled because Fetch was being held, so there was nothing in the
pipeline for this thread",
+"MetricExpr": "PM_DISP_STALL_FETCH / PM_RUN_INST_CMPL",
+"MetricGroup": "CPI",
+"MetricName": "DISPATCH_STALL_FETCH_CPI"
+},
{
"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled because the MMU was handling a translation miss",
"MetricExpr": "PM_DISP_STALL_TRANSLATION / PM_RUN_INST_CMPL",
@@ -394,6 +400,13 @@
"MetricName": "L1_LD_MISS_RATE",
"ScaleUnit": "1%"
},
+{
+"BriefDescription": "Percentage of completed instructions that were
stores that missed the L1",
+"MetricExpr": "PM_ST_MISS_L1 * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "Others",
+"MetricName": "L1_ST_MISS_RATE",
+"ScaleUnit": "1%"
+},
{
"BriefDescription": "Percentage of completed instructions when the
DPTEG required for the load/store instruction in execution was missing from the
TLB",
"MetricExpr": "PM_DTLB_MISS / PM_RUN_INST_CMPL * 100",
@@ -467,6 +480,13 @@
"MetricName": "DL1_RELOAD_FROM_L3_MISS_RATE",
"ScaleUnit": "1%"
},
+{
+"BriefDescription": "Percentage of ITLB misses per completed run
instruction",
+"MetricExpr": "PM_ITLB_MISS / PM_RUN_INST_CMPL * 100",
+"MetricGroup": "General",
+"MetricName": "ITLB_MISS_RATE",
+"ScaleUnit": "1%"
+},
{
"BriefDescription": "Percentage of DERAT misses with 4k page size per
completed instruction",
"MetricExpr": "PM_DERAT_MISS_4K / PM_RUN_INST_CMPL * 100",
@@ -622,6 +642,13 @@
"MetricName": "DERAT_16M_MISS_RATE",
"ScaleUnit": "1%"
},
+{
+"BriefDescription": "Percentage of DERAT misses with 1G page size per
completed run instruction",
+"MetricExpr": "PM_DERAT_MISS_1G * 100 / PM_RUN_INST_CMPL",
+"MetricGroup": "Translation",
+"MetricName": "DERAT_1G_MISS_RATE",
+"ScaleUnit": "1%"
+},
{
"BriefDescription": "DERAT miss ratio for 4K page size",
"MetricExpr": "PM_DERAT_MISS_4K / PM_DERAT_MISS",
@@ -640,6 +667,12 @@
"MetricGroup": "Translation",
"MetricName": "DERAT_16M_MISS_RATIO"
},
+{
+"BriefDescription": "DERAT miss ratio for 1G page size",
+"MetricExpr": "PM_DERAT_MISS_1G / PM_DERAT_MISS",
+"MetricGroup": "Translation",
+"MetricName": "DERAT_1G_MISS_RATIO"
+},
{
"BriefDescription": "DERAT miss ratio for 64K page size",
"MetricExpr": "PM_DERAT_MISS_64K / PM_DERAT_MISS",
--
2.39.3
[PATCH 6/7] perf vendor events: Update metric event names for power10 platform
Update metric event name for some of the JSON/metric events for
power10 platform.
Fixes: 3ca3af7d1f23 ("perf vendor events power10: Add metric events JSON file
for power10 platform")
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/metrics.json | 50 +--
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
b/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
index e3087eb1ccff..182369076d95 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
@@ -16,133 +16,133 @@
"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled for any reason",
"MetricExpr": "PM_DISP_STALL_CYC / PM_RUN_INST_CMPL",
"MetricGroup": "CPI;CPI_STALL_RATIO",
-"MetricName": "DISPATCHED_CPI"
+"MetricName": "DISPATCH_STALL_CPI"
},
{
"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled because there was a flush",
"MetricExpr": "PM_DISP_STALL_FLUSH / PM_RUN_INST_CMPL",
"MetricGroup": "CPI",
-"MetricName": "DISPATCHED_FLUSH_CPI"
+"MetricName": "DISPATCH_STALL_FLUSH_CPI"
},
{
"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled because the MMU was handling a translation miss",
"MetricExpr": "PM_DISP_STALL_TRANSLATION / PM_RUN_INST_CMPL",
"MetricGroup": "CPI",
-"MetricName": "DISPATCHED_TRANSLATION_CPI"
+"MetricName": "DISPATCH_STALL_TRANSLATION_CPI"
},
{
"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled waiting to resolve an instruction ERAT miss",
"MetricExpr": "PM_DISP_STALL_IERAT_ONLY_MISS / PM_RUN_INST_CMPL",
"MetricGroup": "CPI",
-"MetricName": "DISPATCHED_IERAT_ONLY_MISS_CPI"
+"MetricName": "DISPATCH_STALL_IERAT_ONLY_MISS_CPI"
},
{
"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled waiting to resolve an instruction TLB miss",
"MetricExpr": "PM_DISP_STALL_ITLB_MISS / PM_RUN_INST_CMPL",
"MetricGroup": "CPI",
-"MetricName": "DISPATCHED_ITLB_MISS_CPI"
+"MetricName": "DISPATCH_STALL_ITLB_MISS_CPI"
},
{
"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled due to an icache miss",
"MetricExpr": "PM_DISP_STALL_IC_MISS / PM_RUN_INST_CMPL",
"MetricGroup": "CPI",
-"MetricName": "DISPATCHED_IC_MISS_CPI"
+"MetricName": "DISPATCH_STALL_IC_MISS_CPI"
},
{
"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled while the instruction was fetched from the local L2",
"MetricExpr": "PM_DISP_STALL_IC_L2 / PM_RUN_INST_CMPL",
"MetricGroup": "CPI",
-"MetricName": "DISPATCHED_IC_L2_CPI"
+"MetricName": "DISPATCH_STALL_IC_L2_CPI"
},
{
"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled while the instruction was fetched from the local L3",
"MetricExpr": "PM_DISP_STALL_IC_L3 / PM_RUN_INST_CMPL",
"MetricGroup": "CPI",
-"MetricName": "DISPATCHED_IC_L3_CPI"
+"MetricName": "DISPATCH_STALL_IC_L3_CPI"
},
{
"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled while the instruction was fetched from any source beyond
the local L3",
"MetricExpr": "PM_DISP_STALL_IC_L3MISS / PM_RUN_INST_CMPL",
"MetricGroup": "CPI",
-"MetricName": "DISPATCHED_IC_L3MISS_CPI"
+"MetricName": "DISPATCH_STALL_IC_L3MISS_CPI"
},
{
"BriefDescription": "Average cycles per completed instruction when
dispatch was stalled due to an icache miss after a branch mispredict",
"MetricExpr": &qu
[PATCH 4/7] perf vendor events: Move JSON/events to appropriate files for power10 platform
Move some of the power10 JSON/events to appropriate files.
Fixes: 32daa5d7899e ("perf vendor events: Initial JSON/events list for power10
platform")
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/cache.json | 45
.../arch/powerpc/power10/floating_point.json | 67 +
.../arch/powerpc/power10/frontend.json| 180 -
.../arch/powerpc/power10/marked.json | 186 ++---
.../arch/powerpc/power10/memory.json | 85 --
.../arch/powerpc/power10/others.json | 192 ++
.../arch/powerpc/power10/pipeline.json| 247 ++
.../pmu-events/arch/powerpc/power10/pmc.json | 193 +-
.../arch/powerpc/power10/translation.json | 35 ---
9 files changed, 616 insertions(+), 614 deletions(-)
create mode 100644
tools/perf/pmu-events/arch/powerpc/power10/floating_point.json
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/cache.json
b/tools/perf/pmu-events/arch/powerpc/power10/cache.json
index 9cb929bb64af..839ae26945fb 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/cache.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/cache.json
@@ -1,54 +1,9 @@
[
- {
-"EventCode": "0x1003C",
-"EventName": "PM_EXEC_STALL_DMISS_L2L3",
-"BriefDescription": "Cycles in which the oldest instruction in the
pipeline was waiting for a load miss to resolve from either the local L2 or
local L3."
- },
- {
-"EventCode": "0x1E054",
-"EventName": "PM_EXEC_STALL_DMISS_L21_L31",
-"BriefDescription": "Cycles in which the oldest instruction in the
pipeline was waiting for a load miss to resolve from another core's L2 or L3 on
the same chip."
- },
- {
-"EventCode": "0x34054",
-"EventName": "PM_EXEC_STALL_DMISS_L2L3_NOCONFLICT",
-"BriefDescription": "Cycles in which the oldest instruction in the
pipeline was waiting for a load miss to resolve from the local L2 or local L3,
without a dispatch conflict."
- },
- {
-"EventCode": "0x34056",
-"EventName": "PM_EXEC_STALL_LOAD_FINISH",
-"BriefDescription": "Cycles in which the oldest instruction in the
pipeline was finishing a load after its data was reloaded from a data source
beyond the local L1; cycles in which the LSU was processing an L1-hit; cycles
in which the next-to-finish (NTF) instruction merged with another load in the
LMQ; cycles in which the NTF instruction is waiting for a data reload for a
load miss, but the data comes back with a non-NTF instruction."
- },
- {
-"EventCode": "0x3006C",
-"EventName": "PM_RUN_CYC_SMT2_MODE",
-"BriefDescription": "Cycles when this thread's run latch is set and the
core is in SMT2 mode."
- },
{
"EventCode": "0x300F4",
"EventName": "PM_RUN_INST_CMPL_CONC",
"BriefDescription": "PowerPC instruction completed by this thread when all
threads in the core had the run-latch set."
},
- {
-"EventCode": "0x4C016",
-"EventName": "PM_EXEC_STALL_DMISS_L2L3_CONFLICT",
-"BriefDescription": "Cycles in which the oldest instruction in the
pipeline was waiting for a load miss to resolve from the local L2 or local L3,
with a dispatch conflict."
- },
- {
-"EventCode": "0x4D014",
-"EventName": "PM_EXEC_STALL_LOAD",
-"BriefDescription": "Cycles in which the oldest instruction in the
pipeline was a load instruction executing in the Load Store Unit."
- },
- {
-"EventCode": "0x4D016",
-"EventName": "PM_EXEC_STALL_PTESYNC",
-"BriefDescription": "Cycles in which the oldest instruction in the
pipeline was a PTESYNC instruction executing in the Load Store Unit."
- },
- {
-"EventCode": "0x401EA",
-"EventName": "PM_THRESH_EXC_128",
-"BriefDescription": "Threshold counter exceeded a value of 128."
- },
{
"EventCode": "0x400F6",
"EventName": "PM_BR_MPRED_CMPL",
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/floating_point.json
b/tools/perf/pmu-events/arch/powerpc/power10/floating_point.json
new file mode 100644
index ..e816cd10c129
--- /dev/null
+++ b/tools/perf/pmu-events/arch/powerpc/power10/floating_point.json
@@ -0,0 +1,67 @@
+[
+ {
+"EventCode": "0x100F4",
+"EventName": "PM_FLOP_CMPL",
+"BriefDescription": "Floating Point Operations Completed. Includ
[PATCH 5/7] perf vendor events: Update JSON/events for power10 platform
Update JSON/events for power10 platform with additional events.
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/frontend.json| 25 +
.../arch/powerpc/power10/marked.json | 30
.../arch/powerpc/power10/memory.json | 10 ++
.../arch/powerpc/power10/others.json | 5 +++
.../arch/powerpc/power10/pipeline.json| 35 +++
.../pmu-events/arch/powerpc/power10/pmc.json | 5 +++
.../arch/powerpc/power10/translation.json | 5 +++
7 files changed, 115 insertions(+)
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/frontend.json
b/tools/perf/pmu-events/arch/powerpc/power10/frontend.json
index dc0bb6c6338b..5977f5e64212 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/frontend.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/frontend.json
@@ -1,4 +1,14 @@
[
+ {
+"EventCode": "0x1D054",
+"EventName": "PM_DTLB_HIT_2M",
+"BriefDescription": "Data TLB hit (DERAT reload) page size 2M. Implies
radix translation. When MMCR1[16]=0 this event counts only DERAT reloads for
demand misses. When MMCR1[16]=1 this event includes demand misses and
prefetches."
+ },
+ {
+"EventCode": "0x1D058",
+"EventName": "PM_ITLB_HIT_64K",
+"BriefDescription": "Instruction TLB hit (IERAT reload) page size 64K.
When MMCR1[17]=0 this event counts only for demand misses. When MMCR1[17]=1
this event includes demand misses and prefetches."
+ },
{
"EventCode": "0x1F054",
"EventName": "PM_DTLB_HIT",
@@ -44,6 +54,11 @@
"EventName": "PM_ITLB_HIT_1G",
"BriefDescription": "Instruction TLB hit (IERAT reload) page size 1G,
which implies Radix Page Table translation is in use. When MMCR1[17]=0 this
event counts only for demand misses. When MMCR1[17]=1 this event includes
demand misses and prefetches."
},
+ {
+"EventCode": "0x3C05A",
+"EventName": "PM_DTLB_HIT_64K",
+"BriefDescription": "Data TLB hit (DERAT reload) page size 64K. When
MMCR1[16]=0 this event counts only for demand misses. When MMCR1[16]=1 this
event includes demand misses and prefetches."
+ },
{
"EventCode": "0x3E054",
"EventName": "PM_LD_MISS_L1",
@@ -63,5 +78,15 @@
"EventCode": "0x44056",
"EventName": "PM_VECTOR_ST_CMPL",
"BriefDescription": "Vector store instruction completed."
+ },
+ {
+"EventCode": "0x4E054",
+"EventName": "PM_DTLB_HIT_1G",
+"BriefDescription": "Data TLB hit (DERAT reload) page size 1G. Implies
radix translation. When MMCR1[16]=0 this event counts only for demand misses.
When MMCR1[16]=1 this event includes demand misses and prefetches."
+ },
+ {
+"EventCode": "0x400FC",
+"EventName": "PM_ITLB_MISS",
+"BriefDescription": "Instruction TLB reload (after a miss), all page
sizes. Includes only demand misses."
}
]
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/marked.json
b/tools/perf/pmu-events/arch/powerpc/power10/marked.json
index 913b6515b870..78f71a9eadfd 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/marked.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/marked.json
@@ -19,6 +19,11 @@
"EventName": "PM_MRK_XFER_FROM_SRC_CYC_PMC1",
"BriefDescription": "Cycles taken for a marked demand miss to reload a
line from the source specified in MMCR3[0:12]."
},
+ {
+"EventCode": "0x1D15C",
+"EventName": "PM_MRK_DTLB_MISS_1G",
+"BriefDescription": "Marked Data TLB reload (after a miss) page size 1G.
Implies radix translation was used. When MMCR1[16]=0 this event counts only for
demand misses. When MMCR1[16]=1 this event includes demand misses and
prefetches."
+ },
{
"EventCode": "0x1F150",
"EventName": "PM_MRK_ST_L2_CYC",
@@ -134,6 +139,11 @@
"EventName": "PM_MRK_L2_RC_DONE",
"BriefDescription": "L2 RC machine completed the transaction for the
marked instruction."
},
+ {
+"EventCode": "0x3012E",
+"EventName": "PM_MRK_DTLB_MISS_2M",
+"BriefDescription": "Marked Data TLB reload (after a miss) page size 2M,
which implies Radix Page Table translation was used. When MMCR1[16]=0 this
event counts only for demand misses. When MMCR1[16]=1 this event includes
demand misses and prefetches."
+ },
{
"E
[PATCH 3/7] perf vendor events: Drop STORES_PER_INST metric event for power10 platform
Drop STORES_PER_INST metric event for the power10 platform, as the
metric expression of STORES_PER_INST metric event using dropped event
PM_ST_FIN.
Fixes: 3ca3af7d1f23 ("perf vendor events power10: Add metric events JSON file
for power10 platform")
Signed-off-by: Kajol Jain
---
tools/perf/pmu-events/arch/powerpc/power10/metrics.json | 6 --
1 file changed, 6 deletions(-)
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
b/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
index 6f53583a0c62..e3087eb1ccff 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/metrics.json
@@ -453,12 +453,6 @@
"MetricGroup": "General",
"MetricName": "LOADS_PER_INST"
},
-{
-"BriefDescription": "Average number of finished stores per completed
instruction",
-"MetricExpr": "PM_ST_FIN / PM_RUN_INST_CMPL",
-"MetricGroup": "General",
-"MetricName": "STORES_PER_INST"
-},
{
"BriefDescription": "Percentage of demand loads that reloaded from
beyond the L2 per completed instruction",
"MetricExpr": "PM_DATA_FROM_L2MISS / PM_RUN_INST_CMPL * 100",
--
2.39.3
[PATCH 2/7] perf vendor events: Drop some of the JSON/events for power10 platform
Drop some of the JSON/events for power10 platform due to counter
data mismatch.
Fixes: 32daa5d7899e ("perf vendor events: Initial JSON/events list for power10
platform")
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/floating_point.json | 7 ---
tools/perf/pmu-events/arch/powerpc/power10/marked.json | 10 --
tools/perf/pmu-events/arch/powerpc/power10/others.json | 5 -
.../perf/pmu-events/arch/powerpc/power10/pipeline.json | 10 --
.../pmu-events/arch/powerpc/power10/translation.json | 5 -
5 files changed, 37 deletions(-)
delete mode 100644
tools/perf/pmu-events/arch/powerpc/power10/floating_point.json
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/floating_point.json
b/tools/perf/pmu-events/arch/powerpc/power10/floating_point.json
deleted file mode 100644
index 54acb55e2c8c..
--- a/tools/perf/pmu-events/arch/powerpc/power10/floating_point.json
+++ /dev/null
@@ -1,7 +0,0 @@
-[
- {
-"EventCode": "0x4016E",
-"EventName": "PM_THRESH_NOT_MET",
-"BriefDescription": "Threshold counter did not meet threshold."
- }
-]
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/marked.json
b/tools/perf/pmu-events/arch/powerpc/power10/marked.json
index 131f8d0e8831..f2436fc5537c 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/marked.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/marked.json
@@ -19,11 +19,6 @@
"EventName": "PM_MRK_BR_TAKEN_CMPL",
"BriefDescription": "Marked Branch Taken instruction completed."
},
- {
-"EventCode": "0x20112",
-"EventName": "PM_MRK_NTF_FIN",
-"BriefDescription": "The marked instruction became the oldest in the
pipeline before it finished. It excludes instructions that finish at dispatch."
- },
{
"EventCode": "0x2C01C",
"EventName": "PM_EXEC_STALL_DMISS_OFF_CHIP",
@@ -64,11 +59,6 @@
"EventName": "PM_L1_ICACHE_MISS",
"BriefDescription": "Demand instruction cache miss."
},
- {
-"EventCode": "0x30130",
-"EventName": "PM_MRK_INST_FIN",
-"BriefDescription": "marked instruction finished. Excludes instructions
that finish at dispatch. Note that stores always finish twice since the address
gets issued to the LSU and the data gets issued to the VSU."
- },
{
"EventCode": "0x34146",
"EventName": "PM_MRK_LD_CMPL",
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/others.json
b/tools/perf/pmu-events/arch/powerpc/power10/others.json
index a5319cdba89b..17c5424ef1ac 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/others.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/others.json
@@ -29,11 +29,6 @@
"EventName": "PM_DISP_SS0_2_INSTR_CYC",
"BriefDescription": "Cycles in which Superslice 0 dispatches either 1 or 2
instructions."
},
- {
-"EventCode": "0x1F15C",
-"EventName": "PM_MRK_STCX_L2_CYC",
-"BriefDescription": "Cycles spent in the nest portion of a marked Stcx
instruction. It starts counting when the operation starts to drain to the L2
and it stops counting when the instruction retires from the Instruction
Completion Table (ICT) in the Instruction Sequencing Unit (ISU)."
- },
{
"EventCode": "0x10066",
"EventName": "PM_ADJUNCT_CYC",
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/pipeline.json
b/tools/perf/pmu-events/arch/powerpc/power10/pipeline.json
index 449f57e8ba6a..799893c56f32 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/pipeline.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/pipeline.json
@@ -194,11 +194,6 @@
"EventName": "PM_TLBIE_FIN",
"BriefDescription": "TLBIE instruction finished in the LSU. Two TLBIEs can
finish each cycle. All will be counted."
},
- {
-"EventCode": "0x3D058",
-"EventName": "PM_SCALAR_FSQRT_FDIV_ISSUE",
-"BriefDescription": "Scalar versions of four floating point operations:
fdiv,fsqrt (xvdivdp, xvdivsp, xvsqrtdp, xvsqrtsp)."
- },
{
"EventCode": "0x30066",
"EventName": "PM_LSU_FIN",
@@ -269,11 +264,6 @@
"EventName": "PM_IC_MISS_CMPL",
"BriefDescription": "Non-speculative instruction cache miss, counted at
completion."
},
- {
-"EventCode": "0x4D050",
-"EventName": "PM_VSU_NON_FLOP_CMPL",
-"BriefDescription":
[PATCH 1/7] perf vendor events: Update the JSON/events descriptions for power10 platform
Update the description for some of the JSON/events for power10 platform.
Fixes: 32daa5d7899e ("perf vendor events: Initial JSON/events list for power10
platform")
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/cache.json | 4 +-
.../arch/powerpc/power10/frontend.json| 30 ++--
.../arch/powerpc/power10/marked.json | 20
.../arch/powerpc/power10/memory.json | 6 +--
.../arch/powerpc/power10/others.json | 48 +--
.../arch/powerpc/power10/pipeline.json| 20
.../pmu-events/arch/powerpc/power10/pmc.json | 4 +-
.../arch/powerpc/power10/translation.json | 6 +--
8 files changed, 69 insertions(+), 69 deletions(-)
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/cache.json
b/tools/perf/pmu-events/arch/powerpc/power10/cache.json
index 605be14f441c..9cb929bb64af 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/cache.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/cache.json
@@ -17,7 +17,7 @@
{
"EventCode": "0x34056",
"EventName": "PM_EXEC_STALL_LOAD_FINISH",
-"BriefDescription": "Cycles in which the oldest instruction in the
pipeline was finishing a load after its data was reloaded from a data source
beyond the local L1; cycles in which the LSU was processing an L1-hit; cycles
in which the NTF instruction merged with another load in the LMQ; cycles in
which the NTF instruction is waiting for a data reload for a load miss, but the
data comes back with a non-NTF instruction."
+"BriefDescription": "Cycles in which the oldest instruction in the
pipeline was finishing a load after its data was reloaded from a data source
beyond the local L1; cycles in which the LSU was processing an L1-hit; cycles
in which the next-to-finish (NTF) instruction merged with another load in the
LMQ; cycles in which the NTF instruction is waiting for a data reload for a
load miss, but the data comes back with a non-NTF instruction."
},
{
"EventCode": "0x3006C",
@@ -27,7 +27,7 @@
{
"EventCode": "0x300F4",
"EventName": "PM_RUN_INST_CMPL_CONC",
-"BriefDescription": "PowerPC instructions completed by this thread when
all threads in the core had the run-latch set."
+"BriefDescription": "PowerPC instruction completed by this thread when all
threads in the core had the run-latch set."
},
{
"EventCode": "0x4C016",
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/frontend.json
b/tools/perf/pmu-events/arch/powerpc/power10/frontend.json
index 558f9530f54e..61e9e0222c87 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/frontend.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/frontend.json
@@ -7,7 +7,7 @@
{
"EventCode": "0x10006",
"EventName": "PM_DISP_STALL_HELD_OTHER_CYC",
-"BriefDescription": "Cycles in which the NTC instruction is held at
dispatch for any other reason."
+"BriefDescription": "Cycles in which the next-to-complete (NTC)
instruction is held at dispatch for any other reason."
},
{
"EventCode": "0x10010",
@@ -32,12 +32,12 @@
{
"EventCode": "0x1D05E",
"EventName": "PM_DISP_STALL_HELD_HALT_CYC",
-"BriefDescription": "Cycles in which the NTC instruction is held at
dispatch because of power management."
+"BriefDescription": "Cycles in which the next-to-complete (NTC)
instruction is held at dispatch because of power management."
},
{
"EventCode": "0x1E050",
"EventName": "PM_DISP_STALL_HELD_STF_MAPPER_CYC",
-"BriefDescription": "Cycles in which the NTC instruction is held at
dispatch because the STF mapper/SRB was full. Includes GPR (count, link, tar),
VSR, VMR, FPR."
+"BriefDescription": "Cycles in which the next-to-complete (NTC)
instruction is held at dispatch because the STF mapper/SRB was full. Includes
GPR (count, link, tar), VSR, VMR, FPR."
},
{
"EventCode": "0x1F054",
@@ -67,7 +67,7 @@
{
"EventCode": "0x100F6",
"EventName": "PM_IERAT_MISS",
-"BriefDescription": "IERAT Reloaded to satisfy an IERAT miss. All page
sizes are counted by this event."
+"BriefDescription": "IERAT Reloaded to satisfy an IERAT miss. All page
sizes are counted by this event. This event only counts instruction demand
access."
},
{
"EventCode": "0x100F8",
@@ -77,7 +77,7 @@
{
"EventCode": "0x20006&q
[PATCH v4 07/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via domain information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_DOMAIN(0XB0), can be used to get
the system affinity domain via domain information. To expose the system
affinity domain via domain information, patch adds sysfs file called
"affinity_domain_via_domain" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add new entry for AFFINITY_DOMAIN_VIA_DOM in sysinfo_counter_request
array, which points to the counter request value
"affinity_domain_via_domain" in hv-gpci.c file.
The affinity_domain_via_domain sysfs file is only available for power10
and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_DOM_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_domain attribute in interface_attrs
array. Also updated the value of INTERFACE_NULL_ATTR macro in hv-gpci.c
file.
Reviewed-by: Athira Rajeev
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 80 -
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 68502cb18262..326b758df7c8 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -106,19 +106,22 @@ static ssize_t cpumask_show(struct device *dev,
#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
#define INTERFACE_PROCESSOR_CONFIG_ATTR7
#define INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR 8
-#define INTERFACE_NULL_ATTR9
+#define INTERFACE_AFFINITY_DOMAIN_VIA_DOM_ATTR 9
+#define INTERFACE_NULL_ATTR10
/* Counter request value to retrieve system information */
enum {
PROCESSOR_BUS_TOPOLOGY,
PROCESSOR_CONFIG,
AFFINITY_DOMAIN_VIA_VP, /* affinity domain via virtual processor */
+ AFFINITY_DOMAIN_VIA_DOM, /* affinity domain via domain */
};
static int sysinfo_counter_request[] = {
[PROCESSOR_BUS_TOPOLOGY] = 0xD0,
[PROCESSOR_CONFIG] = 0x90,
[AFFINITY_DOMAIN_VIA_VP] = 0xA0,
+ [AFFINITY_DOMAIN_VIA_DOM] = 0xB0,
};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -389,6 +392,72 @@ static ssize_t
affinity_domain_via_virtual_processor_show(struct device *dev,
return ret;
}
+static ssize_t affinity_domain_via_domain_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request 0xB0 corresponds to request
+* type 'Affinity_domain_information_by_domain',
+* to retrieve the system affinity domain information.
+* starting_index value refers to the starting hardware
+* processor index.
+*/
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_DOM],
+ 0, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next starting index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next starting index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index value is part of counter_value
+* buffer elements, use the starting index value in the last
+* element and add 1 to make subsequent hcalls.
+*/
+ u32 starting_index = arg->bytes[last_element + 1] +
+ (arg->bytes[last_element] << 8) + 1;
+
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_DOM],
+ starting_index, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+ }
+
+ return n;
+
+out:
+ put_cpu_var(hv_gpci_reqb);
+ return ret;
+}
+
static DEVICE_ATTR_RO(kernel_version);
static DEVICE_ATTR_RO(cpumask);
@@ -420,6 +489,11 @@ static struct attribute *interface_attrs[] = {
[PATCH v4 05/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via virtual processor information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_VIRTUAL_PROCESSOR(0XA0), can be used to get
the system affinity domain via virtual processor information. To expose
the system affinity domain via virtual processor information, patch adds
sysfs file called "affinity_domain_via_virtual_processor" to the
"/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver.
The affinity_domain_via_virtual_processor sysfs file is only available for
power10 and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_virtual_processor attribute in
interface_attrs array. Also updated the value of INTERFACE_NULL_ATTR macro
in hv-gpci.c file.
Reviewed-by: Athira Rajeev
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 86 -
1 file changed, 84 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index c74076d3c7a7..68502cb18262 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -105,17 +105,20 @@ static ssize_t cpumask_show(struct device *dev,
/* Interface attribute array index to store system information */
#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
#define INTERFACE_PROCESSOR_CONFIG_ATTR7
-#define INTERFACE_NULL_ATTR8
+#define INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR 8
+#define INTERFACE_NULL_ATTR9
/* Counter request value to retrieve system information */
enum {
PROCESSOR_BUS_TOPOLOGY,
- PROCESSOR_CONFIG
+ PROCESSOR_CONFIG,
+ AFFINITY_DOMAIN_VIA_VP, /* affinity domain via virtual processor */
};
static int sysinfo_counter_request[] = {
[PROCESSOR_BUS_TOPOLOGY] = 0xD0,
[PROCESSOR_CONFIG] = 0x90,
+ [AFFINITY_DOMAIN_VIA_VP] = 0xA0,
};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -316,6 +319,76 @@ static ssize_t processor_config_show(struct device *dev,
struct device_attribute
return ret;
}
+static ssize_t affinity_domain_via_virtual_processor_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request 0xA0 corresponds to request
+* type 'Affinity_domain_information_by_virutal_processor',
+* to retrieve the system affinity domain information.
+* starting_index value refers to the starting hardware
+* processor index.
+*/
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_VP],
+ 0, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next secondary index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next secondary index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index and secondary index type is part of
the
+* counter_value buffer elements, use the starting index value
in the
+* last array element as subsequent starting index, and use
secondary index
+* value in the last array element plus 1 as subsequent
secondary index.
+* For counter request '0xA0', starting index points to
partition id
+* and secondary index points to corresponding virtual
processor index.
+*/
+ u32 starting_index = arg->bytes[last_element + 1] +
(arg->bytes[last_element] << 8);
+ u16 secondary_index = arg->bytes[last_element + 3] +
+ (arg->bytes[last_element + 2] << 8) + 1;
+
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_VP],
+ starting_index, secondary_index, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+
[PATCH v4 04/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_config sysfs interface file
Add details of the new hv-gpci interface file called "processor_config" in the ABI documentation. Reviewed-by: Athira Rajeev Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index ba3f9aa3d68e..9e81de18142f 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -112,3 +112,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/processor_config +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + PROCESSOR_CONFIG(0x90). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCCESS", + "H_AUTHORITY" or "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY" can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer to getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.39.3
[PATCH v4 06/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_virtual_processor sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_virtual_processor" in the ABI documentation. Reviewed-by: Athira Rajeev Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 9e81de18142f..5ee33218be83 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -144,3 +144,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_virtual_processor +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_VIRTUAL_PROCESSOR(0xA0). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCCESS", + "H_AUTHORITY" or "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY" can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer to getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.39.3
[PATCH v4 03/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor config information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
PROCESSOR_CONFIG(0X90), can be used to get the system
processor configuration information. To expose the system
processor config information, patch adds sysfs file called
"processor_config" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add enum and sysinfo_counter_request array to get required
counter request value in hv-gpci.c file.
Also add a new function called "sysinfo_device_attr_create",
which will create and return required device attribute to the
add_sysinfo_interface_files function.
The processor_config sysfs file is only available for power10
and above platforms. Add a new macro called
INTERFACE_PROCESSOR_CONFIG_ATTR, which points to the index of
NULL placefolder, for processor_config attribute in the interface_attrs
array. Also add macro INTERFACE_NULL_ATTR which points to index of NULL
attribute in interface_attrs array.
Reviewed-by: Athira Rajeev
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 168
1 file changed, 153 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 225f148f75fd..c74076d3c7a7 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -102,11 +102,21 @@ static ssize_t cpumask_show(struct device *dev,
return cpumap_print_to_pagebuf(true, buf, _gpci_cpumask);
}
-/* Counter request value to retrieve system information */
-#define PROCESSOR_BUS_TOPOLOGY 0XD0
-
/* Interface attribute array index to store system information */
#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
+#define INTERFACE_PROCESSOR_CONFIG_ATTR7
+#define INTERFACE_NULL_ATTR8
+
+/* Counter request value to retrieve system information */
+enum {
+ PROCESSOR_BUS_TOPOLOGY,
+ PROCESSOR_CONFIG
+};
+
+static int sysinfo_counter_request[] = {
+ [PROCESSOR_BUS_TOPOLOGY] = 0xD0,
+ [PROCESSOR_CONFIG] = 0x90,
+};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -187,7 +197,8 @@ static ssize_t processor_bus_topology_show(struct device
*dev, struct device_att
* starting_index value implies the starting hardware
* chip id.
*/
- ret = systeminfo_gpci_request(PROCESSOR_BUS_TOPOLOGY, 0, 0, buf, ,
arg);
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[PROCESSOR_BUS_TOPOLOGY],
+ 0, 0, buf, , arg);
if (!ret)
return n;
@@ -220,8 +231,76 @@ static ssize_t processor_bus_topology_show(struct device
*dev, struct device_att
memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
- ret = systeminfo_gpci_request(PROCESSOR_BUS_TOPOLOGY,
starting_index,
- 0, buf, , arg);
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[PROCESSOR_BUS_TOPOLOGY],
+ starting_index, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+ }
+
+ return n;
+
+out:
+ put_cpu_var(hv_gpci_reqb);
+ return ret;
+}
+
+static ssize_t processor_config_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request value 0x90 corresponds to request
+* type 'Processor_config', to retrieve
+* the system processor information.
+* starting_index value implies the starting hardware
+* processor index.
+*/
+ ret = systeminfo_gpci_request(sysinfo_counter_request[PROCESSOR_CONFIG],
+ 0, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next starting index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next starting index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index is part of counter_value
+* buffer el
[PATCH v4 01/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor bus topology information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
PROCESSOR_BUS_TOPOLOGY(0XD0), can be used to get the system
topology information. To expose the system topology information,
patch adds sysfs file called "processor_bus_topology" to the
"/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver.
Add macro for PROCESSOR_BUS_TOPOLOGY counter request value
in hv-gpci.c file. Also add a new function called
"systeminfo_gpci_request", to make the H_GET_PERF_COUNTER_INFO hcall
with added macro and populates the output buffer.
The processor_bus_topology sysfs file is only available for power10
and above platforms. Add a new function called
"add_sysinfo_interface_files", which will add processor_bus_topology
attribute in the interface_attrs array, only for power10 and
above platforms.
Also add macro INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR in hv-gpci.c
file, which points to the index of NULL placefolder, for
processor_bus_topology attribute.
Reviewed-by: Athira Rajeev
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 184 +++-
1 file changed, 182 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 7ff8ff3509f5..225f148f75fd 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -102,6 +102,141 @@ static ssize_t cpumask_show(struct device *dev,
return cpumap_print_to_pagebuf(true, buf, _gpci_cpumask);
}
+/* Counter request value to retrieve system information */
+#define PROCESSOR_BUS_TOPOLOGY 0XD0
+
+/* Interface attribute array index to store system information */
+#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
+
+static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
+
+static unsigned long systeminfo_gpci_request(u32 req, u32 starting_index,
+ u16 secondary_index, char *buf,
+ size_t *n, struct hv_gpci_request_buffer *arg)
+{
+ unsigned long ret;
+ size_t i, j;
+
+ arg->params.counter_request = cpu_to_be32(req);
+ arg->params.starting_index = cpu_to_be32(starting_index);
+ arg->params.secondary_index = cpu_to_be16(secondary_index);
+
+ ret = plpar_hcall_norets(H_GET_PERF_COUNTER_INFO,
+ virt_to_phys(arg), HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL',
+* which means that the current buffer size cannot accommodate
+* all the information and a partial buffer returned.
+* hcall fails incase of ret value other than H_SUCCESS or H_PARAMETER.
+*
+* ret value as H_AUTHORITY implies that partition is not permitted to
retrieve
+* performance information, and required to set
+* "Enable Performance Information Collection" option.
+*/
+ if (ret == H_AUTHORITY)
+ return -EPERM;
+
+ /*
+* hcall can fail with other possible ret value like
H_PRIVILEGE/H_HARDWARE
+* because of invalid buffer-length/address or due to some hardware
+* error.
+*/
+ if (ret && (ret != H_PARAMETER))
+ return -EIO;
+
+ /*
+* hcall H_GET_PERF_COUNTER_INFO populates the 'returned_values'
+* to show the total number of counter_value array elements
+* returned via hcall.
+* hcall also populates 'cv_element_size' corresponds to individual
+* counter_value array element size. Below loop go through all
+* counter_value array elements as per their size and add it to
+* the output buffer.
+*/
+ for (i = 0; i < be16_to_cpu(arg->params.returned_values); i++) {
+ j = i * be16_to_cpu(arg->params.cv_element_size);
+
+ for (; j < (i + 1) * be16_to_cpu(arg->params.cv_element_size);
j++)
+ *n += sprintf(buf + *n, "%02x", (u8)arg->bytes[j]);
+ *n += sprintf(buf + *n, "\n");
+ }
+
+ if (*n >= PAGE_SIZE) {
+ pr_info("System information exceeds PAGE_SIZE\n");
+ return -EFBIG;
+ }
+
+ return ret;
+}
+
+static ssize_t processor_bus_topology_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request value 0xD0 corresponds to request
+* type 'Processor_bus_topology', to retrieve
+* the system topology information.
+* starting_index value implies the starting hardware
+* chip id.
+*/
+ ret = systeminfo_gpci_request(PROCESSOR_BUS_TOPOLOGY, 0, 0,
[PATCH v4 10/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_partition sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_partition" in the ABI documentation. Reviewed-by: Athira Rajeev Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 399f0a2bd546..40f7cd240591 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -208,3 +208,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_partition +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_PARTITION(0xB1). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCCESS", + "H_AUTHORITY" or "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY" can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer to getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.39.3
[PATCH v4 09/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via partition information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_PARTITION(0XB1), can be used to get
the system affinity domain via partition information. To expose the system
affinity domain via partition information, patch adds sysfs file called
"affinity_domain_via_partition" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add new entry for AFFINITY_DOMAIN_VIA_PAR in sysinfo_counter_request
array, which points to the counter request value
"affinity_domain_via_partition" in hv-gpci.c file. Also add a
new function called "affinity_domain_via_partition_result_parse" to parse
the hcall result and store it in output buffer.
The affinity_domain_via_partition sysfs file is only available for power10
and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_PAR_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_partition attribute in
interface_attrs array. Also updated the value of INTERFACE_NULL_ATTR
macro in hv-gpci.c file.
Reviewed-by: Athira Rajeev
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 160 +++-
1 file changed, 159 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 326b758df7c8..f2fff166290b 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -107,7 +107,8 @@ static ssize_t cpumask_show(struct device *dev,
#define INTERFACE_PROCESSOR_CONFIG_ATTR7
#define INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR 8
#define INTERFACE_AFFINITY_DOMAIN_VIA_DOM_ATTR 9
-#define INTERFACE_NULL_ATTR10
+#define INTERFACE_AFFINITY_DOMAIN_VIA_PAR_ATTR 10
+#define INTERFACE_NULL_ATTR11
/* Counter request value to retrieve system information */
enum {
@@ -115,6 +116,7 @@ enum {
PROCESSOR_CONFIG,
AFFINITY_DOMAIN_VIA_VP, /* affinity domain via virtual processor */
AFFINITY_DOMAIN_VIA_DOM, /* affinity domain via domain */
+ AFFINITY_DOMAIN_VIA_PAR, /* affinity domain via partition */
};
static int sysinfo_counter_request[] = {
@@ -122,6 +124,7 @@ static int sysinfo_counter_request[] = {
[PROCESSOR_CONFIG] = 0x90,
[AFFINITY_DOMAIN_VIA_VP] = 0xA0,
[AFFINITY_DOMAIN_VIA_DOM] = 0xB0,
+ [AFFINITY_DOMAIN_VIA_PAR] = 0xB1,
};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -458,6 +461,152 @@ static ssize_t affinity_domain_via_domain_show(struct
device *dev, struct device
return ret;
}
+static void affinity_domain_via_partition_result_parse(int returned_values,
+ int element_size, char *buf, size_t *last_element,
+ size_t *n, struct hv_gpci_request_buffer *arg)
+{
+ size_t i = 0, j = 0;
+ size_t k, l, m;
+ uint16_t total_affinity_domain_ele, size_of_each_affinity_domain_ele;
+
+ /*
+* hcall H_GET_PERF_COUNTER_INFO populates the 'returned_values'
+* to show the total number of counter_value array elements
+* returned via hcall.
+* Unlike other request types, the data structure returned by this
+* request is variable-size. For this counter request type,
+* hcall populates 'cv_element_size' corresponds to minimum size of
+* the structure returned i.e; the size of the structure with no domain
+* information. Below loop go through all counter_value array
+* to determine the number and size of each domain array element and
+* add it to the output buffer.
+*/
+ while (i < returned_values) {
+ k = j;
+ for (; k < j + element_size; k++)
+ *n += sprintf(buf + *n, "%02x", (u8)arg->bytes[k]);
+ *n += sprintf(buf + *n, "\n");
+
+ total_affinity_domain_ele = (u8)arg->bytes[k - 2] << 8 |
(u8)arg->bytes[k - 3];
+ size_of_each_affinity_domain_ele = (u8)arg->bytes[k] << 8 |
(u8)arg->bytes[k - 1];
+
+ for (l = 0; l < total_affinity_domain_ele; l++) {
+ for (m = 0; m < size_of_each_affinity_domain_ele; m++) {
+ *n += sprintf(buf + *n, "%02x",
(u8)arg->bytes[k]);
+ k++;
+ }
+ *n += sprintf(buf + *n, "\n");
+ }
+
+ *n += sprintf(buf + *n, "\n");
+ i++;
+ j = k;
+ }
+
+ *last_element = k;
+}
+
+static ssize_t affinity_domain_via_partition_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
[PATCH v4 02/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_bus_topology sysfs interface file
Add details of the new hv-gpci interface file called "processor_bus_topology" in the ABI documentation. Reviewed-by: Athira Rajeev Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 12e2bf92783f..ba3f9aa3d68e 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -80,3 +80,35 @@ Contact: Linux on PowerPC Developer List Description: read only This sysfs file exposes the cpumask which is designated to make HCALLs to retrieve hv-gpci pmu event counter data. + +What: /sys/devices/hv_gpci/interface/processor_bus_topology +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + PROCESSOR_BUS_TOPOLOGY(0xD0). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCCESS", + "H_AUTHORITY" or "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY" can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer to getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.39.3
[PATCH v4 08/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_domain sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_domain" in the ABI documentation. Reviewed-by: Athira Rajeev Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 5ee33218be83..399f0a2bd546 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -176,3 +176,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_domain +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_DOMAIN(0xB0). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCCESS", + "H_AUTHORITY" or "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY" can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer to getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.39.3
[PATCH v4 00/10] Add sysfs interface files to hv_gpci device to expose system information
The hcall H_GET_PERF_COUNTER_INFO can be used to get data related to chips, dimms and system topology, by passing different counter request values. Patchset adds sysfs files to "/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver, which will expose system topology information using H_GET_PERF_COUNTER_INFO hcall. The added sysfs files are available for power10 and above platforms and needs root access to read the data. Patches 1,3,5,7,9 adds sysfs interface files to the hv_gpci pmu driver, to get system topology information. List of added sysfs files: -> processor_bus_topology (Counter request value : 0xD0) -> processor_config (Counter request value : 0x90) -> affinity_domain_via_virtual_processor (Counter request value : 0xA0) -> affinity_domain_via_domain (Counter request value : 0xB0) -> affinity_domain_via_partition (Counter request value : 0xB1) Patches 2,4,6,8,10 adds details of the newly added hv_gpci interface files listed above in the ABI documentation. Patches 2,4,6,8,10 adds details of the newly added hv_gpci interface files listed above in the ABI documentation. Changelog: v3 -> v4 -> Add Reviewed-by tag from Athira Rajeev. -> Correct typo by changing processor_bug_topology to processor_bus_topology v2 -> v3 -> Make nit changes in documentation patches as suggested by Randy Dunlap. v1 -> v2 -> Incase the HCALL fails with errors that can be resolve during runtime, then only add sysinfo interface attributes to the interface_attrs attribute array. Even if one of the counter request value HCALL fails, don't add any sysinfo attribute to the interface_attrs attribute array. Add the code changes to make sure sysinfo interface added only when all the requirements met as suggested by Michael Ellerman. -> Make changes in documentation, adds detail of errors type which can be resolved at runtime as suggested by Michael Ellerman. -> Add new enum and sysinfo_counter_request array to get required counter request value in hv-gpci.c file. -> Move the macros for interface attribute array index to hv-gpci.c, as these macros currently only used in hv-gpci.c file. Kajol Jain (10): powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor bus topology information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_bus_topology sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor config information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_config sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via virtual processor information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_virtual_processor sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via domain information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_domain sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via partition information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_partition sysfs interface file .../sysfs-bus-event_source-devices-hv_gpci| 160 + arch/powerpc/perf/hv-gpci.c | 640 +- 2 files changed, 798 insertions(+), 2 deletions(-) -- 2.39.3
[PATCH v3 10/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_partition sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_partition" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 399f0a2bd546..40f7cd240591 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -208,3 +208,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_partition +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_PARTITION(0xB1). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCCESS", + "H_AUTHORITY" or "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY" can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer to getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.39.3
[PATCH v3 09/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via partition information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_PARTITION(0XB1), can be used to get
the system affinity domain via partition information. To expose the system
affinity domain via partition information, patch adds sysfs file called
"affinity_domain_via_partition" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add new entry for AFFINITY_DOMAIN_VIA_PAR in sysinfo_counter_request
array, which points to the counter request value
"affinity_domain_via_partition" in hv-gpci.c file. Also add a
new function called "affinity_domain_via_partition_result_parse" to parse
the hcall result and store it in output buffer.
The affinity_domain_via_partition sysfs file is only available for power10
and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_PAR_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_partition attribute in
interface_attrs array. Also updated the value of INTERFACE_NULL_ATTR
macro in hv-gpci.c file.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 160 +++-
1 file changed, 159 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 326b758df7c8..f2fff166290b 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -107,7 +107,8 @@ static ssize_t cpumask_show(struct device *dev,
#define INTERFACE_PROCESSOR_CONFIG_ATTR7
#define INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR 8
#define INTERFACE_AFFINITY_DOMAIN_VIA_DOM_ATTR 9
-#define INTERFACE_NULL_ATTR10
+#define INTERFACE_AFFINITY_DOMAIN_VIA_PAR_ATTR 10
+#define INTERFACE_NULL_ATTR11
/* Counter request value to retrieve system information */
enum {
@@ -115,6 +116,7 @@ enum {
PROCESSOR_CONFIG,
AFFINITY_DOMAIN_VIA_VP, /* affinity domain via virtual processor */
AFFINITY_DOMAIN_VIA_DOM, /* affinity domain via domain */
+ AFFINITY_DOMAIN_VIA_PAR, /* affinity domain via partition */
};
static int sysinfo_counter_request[] = {
@@ -122,6 +124,7 @@ static int sysinfo_counter_request[] = {
[PROCESSOR_CONFIG] = 0x90,
[AFFINITY_DOMAIN_VIA_VP] = 0xA0,
[AFFINITY_DOMAIN_VIA_DOM] = 0xB0,
+ [AFFINITY_DOMAIN_VIA_PAR] = 0xB1,
};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -458,6 +461,152 @@ static ssize_t affinity_domain_via_domain_show(struct
device *dev, struct device
return ret;
}
+static void affinity_domain_via_partition_result_parse(int returned_values,
+ int element_size, char *buf, size_t *last_element,
+ size_t *n, struct hv_gpci_request_buffer *arg)
+{
+ size_t i = 0, j = 0;
+ size_t k, l, m;
+ uint16_t total_affinity_domain_ele, size_of_each_affinity_domain_ele;
+
+ /*
+* hcall H_GET_PERF_COUNTER_INFO populates the 'returned_values'
+* to show the total number of counter_value array elements
+* returned via hcall.
+* Unlike other request types, the data structure returned by this
+* request is variable-size. For this counter request type,
+* hcall populates 'cv_element_size' corresponds to minimum size of
+* the structure returned i.e; the size of the structure with no domain
+* information. Below loop go through all counter_value array
+* to determine the number and size of each domain array element and
+* add it to the output buffer.
+*/
+ while (i < returned_values) {
+ k = j;
+ for (; k < j + element_size; k++)
+ *n += sprintf(buf + *n, "%02x", (u8)arg->bytes[k]);
+ *n += sprintf(buf + *n, "\n");
+
+ total_affinity_domain_ele = (u8)arg->bytes[k - 2] << 8 |
(u8)arg->bytes[k - 3];
+ size_of_each_affinity_domain_ele = (u8)arg->bytes[k] << 8 |
(u8)arg->bytes[k - 1];
+
+ for (l = 0; l < total_affinity_domain_ele; l++) {
+ for (m = 0; m < size_of_each_affinity_domain_ele; m++) {
+ *n += sprintf(buf + *n, "%02x",
(u8)arg->bytes[k]);
+ k++;
+ }
+ *n += sprintf(buf + *n, "\n");
+ }
+
+ *n += sprintf(buf + *n, "\n");
+ i++;
+ j = k;
+ }
+
+ *last_element = k;
+}
+
+static ssize_t affinity_domain_via_partition_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+ size_t last_elem
[PATCH v3 08/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_domain sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_domain" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 5ee33218be83..399f0a2bd546 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -176,3 +176,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_domain +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_DOMAIN(0xB0). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCCESS", + "H_AUTHORITY" or "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY" can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer to getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.39.3
[PATCH v3 07/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via domain information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_DOMAIN(0XB0), can be used to get
the system affinity domain via domain information. To expose the system
affinity domain via domain information, patch adds sysfs file called
"affinity_domain_via_domain" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add new entry for AFFINITY_DOMAIN_VIA_DOM in sysinfo_counter_request
array, which points to the counter request value
"affinity_domain_via_domain" in hv-gpci.c file.
The affinity_domain_via_domain sysfs file is only available for power10
and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_DOM_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_domain attribute in interface_attrs
array. Also updated the value of INTERFACE_NULL_ATTR macro in hv-gpci.c
file.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 80 -
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 68502cb18262..326b758df7c8 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -106,19 +106,22 @@ static ssize_t cpumask_show(struct device *dev,
#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
#define INTERFACE_PROCESSOR_CONFIG_ATTR7
#define INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR 8
-#define INTERFACE_NULL_ATTR9
+#define INTERFACE_AFFINITY_DOMAIN_VIA_DOM_ATTR 9
+#define INTERFACE_NULL_ATTR10
/* Counter request value to retrieve system information */
enum {
PROCESSOR_BUS_TOPOLOGY,
PROCESSOR_CONFIG,
AFFINITY_DOMAIN_VIA_VP, /* affinity domain via virtual processor */
+ AFFINITY_DOMAIN_VIA_DOM, /* affinity domain via domain */
};
static int sysinfo_counter_request[] = {
[PROCESSOR_BUS_TOPOLOGY] = 0xD0,
[PROCESSOR_CONFIG] = 0x90,
[AFFINITY_DOMAIN_VIA_VP] = 0xA0,
+ [AFFINITY_DOMAIN_VIA_DOM] = 0xB0,
};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -389,6 +392,72 @@ static ssize_t
affinity_domain_via_virtual_processor_show(struct device *dev,
return ret;
}
+static ssize_t affinity_domain_via_domain_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request 0xB0 corresponds to request
+* type 'Affinity_domain_information_by_domain',
+* to retrieve the system affinity domain information.
+* starting_index value refers to the starting hardware
+* processor index.
+*/
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_DOM],
+ 0, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next starting index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next starting index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index value is part of counter_value
+* buffer elements, use the starting index value in the last
+* element and add 1 to make subsequent hcalls.
+*/
+ u32 starting_index = arg->bytes[last_element + 1] +
+ (arg->bytes[last_element] << 8) + 1;
+
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_DOM],
+ starting_index, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+ }
+
+ return n;
+
+out:
+ put_cpu_var(hv_gpci_reqb);
+ return ret;
+}
+
static DEVICE_ATTR_RO(kernel_version);
static DEVICE_ATTR_RO(cpumask);
@@ -420,6 +489,11 @@ static struct attribute *interface_attrs[] = {
* attribute, set in init
[PATCH v3 06/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_virtual_processor sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_virtual_processor" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 9e81de18142f..5ee33218be83 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -144,3 +144,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_virtual_processor +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_VIRTUAL_PROCESSOR(0xA0). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCCESS", + "H_AUTHORITY" or "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY" can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer to getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.39.3
[PATCH v3 05/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via virtual processor information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_VIRTUAL_PROCESSOR(0XA0), can be used to get
the system affinity domain via virtual processor information. To expose
the system affinity domain via virtual processor information, patch adds
sysfs file called "affinity_domain_via_virtual_processor" to the
"/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver.
The affinity_domain_via_virtual_processor sysfs file is only available for
power10 and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_virtual_processor attribute in
interface_attrs array. Also updated the value of INTERFACE_NULL_ATTR macro
in hv-gpci.c file.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 86 -
1 file changed, 84 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index c74076d3c7a7..68502cb18262 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -105,17 +105,20 @@ static ssize_t cpumask_show(struct device *dev,
/* Interface attribute array index to store system information */
#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
#define INTERFACE_PROCESSOR_CONFIG_ATTR7
-#define INTERFACE_NULL_ATTR8
+#define INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR 8
+#define INTERFACE_NULL_ATTR9
/* Counter request value to retrieve system information */
enum {
PROCESSOR_BUS_TOPOLOGY,
- PROCESSOR_CONFIG
+ PROCESSOR_CONFIG,
+ AFFINITY_DOMAIN_VIA_VP, /* affinity domain via virtual processor */
};
static int sysinfo_counter_request[] = {
[PROCESSOR_BUS_TOPOLOGY] = 0xD0,
[PROCESSOR_CONFIG] = 0x90,
+ [AFFINITY_DOMAIN_VIA_VP] = 0xA0,
};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -316,6 +319,76 @@ static ssize_t processor_config_show(struct device *dev,
struct device_attribute
return ret;
}
+static ssize_t affinity_domain_via_virtual_processor_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request 0xA0 corresponds to request
+* type 'Affinity_domain_information_by_virutal_processor',
+* to retrieve the system affinity domain information.
+* starting_index value refers to the starting hardware
+* processor index.
+*/
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_VP],
+ 0, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next secondary index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next secondary index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index and secondary index type is part of
the
+* counter_value buffer elements, use the starting index value
in the
+* last array element as subsequent starting index, and use
secondary index
+* value in the last array element plus 1 as subsequent
secondary index.
+* For counter request '0xA0', starting index points to
partition id
+* and secondary index points to corresponding virtual
processor index.
+*/
+ u32 starting_index = arg->bytes[last_element + 1] +
(arg->bytes[last_element] << 8);
+ u16 secondary_index = arg->bytes[last_element + 3] +
+ (arg->bytes[last_element + 2] << 8) + 1;
+
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_VP],
+ starting_index, secondary_index, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
[PATCH v3 04/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_config sysfs interface file
Add details of the new hv-gpci interface file called "processor_config" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index ba3f9aa3d68e..9e81de18142f 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -112,3 +112,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/processor_config +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + PROCESSOR_CONFIG(0x90). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCCESS", + "H_AUTHORITY" or "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY" can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer to getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.39.3
[PATCH v3 03/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor config information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
PROCESSOR_CONFIG(0X90), can be used to get the system
processor configuration information. To expose the system
processor config information, patch adds sysfs file called
"processor_config" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add enum and sysinfo_counter_request array to get required
counter request value in hv-gpci.c file.
Also add a new function called "sysinfo_device_attr_create",
which will create and return required device attribute to the
add_sysinfo_interface_files function.
The processor_config sysfs file is only available for power10
and above platforms. Add a new macro called
INTERFACE_PROCESSOR_CONFIG_ATTR, which points to the index of
NULL placefolder, for processor_config attribute in the interface_attrs
array. Also add macro INTERFACE_NULL_ATTR which points to index of NULL
attribute in interface_attrs array.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 168
1 file changed, 153 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 225f148f75fd..c74076d3c7a7 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -102,11 +102,21 @@ static ssize_t cpumask_show(struct device *dev,
return cpumap_print_to_pagebuf(true, buf, _gpci_cpumask);
}
-/* Counter request value to retrieve system information */
-#define PROCESSOR_BUS_TOPOLOGY 0XD0
-
/* Interface attribute array index to store system information */
#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
+#define INTERFACE_PROCESSOR_CONFIG_ATTR7
+#define INTERFACE_NULL_ATTR8
+
+/* Counter request value to retrieve system information */
+enum {
+ PROCESSOR_BUS_TOPOLOGY,
+ PROCESSOR_CONFIG
+};
+
+static int sysinfo_counter_request[] = {
+ [PROCESSOR_BUS_TOPOLOGY] = 0xD0,
+ [PROCESSOR_CONFIG] = 0x90,
+};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -187,7 +197,8 @@ static ssize_t processor_bus_topology_show(struct device
*dev, struct device_att
* starting_index value implies the starting hardware
* chip id.
*/
- ret = systeminfo_gpci_request(PROCESSOR_BUS_TOPOLOGY, 0, 0, buf, ,
arg);
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[PROCESSOR_BUS_TOPOLOGY],
+ 0, 0, buf, , arg);
if (!ret)
return n;
@@ -220,8 +231,76 @@ static ssize_t processor_bus_topology_show(struct device
*dev, struct device_att
memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
- ret = systeminfo_gpci_request(PROCESSOR_BUS_TOPOLOGY,
starting_index,
- 0, buf, , arg);
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[PROCESSOR_BUS_TOPOLOGY],
+ starting_index, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+ }
+
+ return n;
+
+out:
+ put_cpu_var(hv_gpci_reqb);
+ return ret;
+}
+
+static ssize_t processor_config_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request value 0x90 corresponds to request
+* type 'Processor_config', to retrieve
+* the system processor information.
+* starting_index value implies the starting hardware
+* processor index.
+*/
+ ret = systeminfo_gpci_request(sysinfo_counter_request[PROCESSOR_CONFIG],
+ 0, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next starting index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next starting index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index is part of counter_value
+* buffer elements, use
[PATCH v3 02/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_bus_topology sysfs interface file
Add details of the new hv-gpci interface file called "processor_bus_topology" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 12e2bf92783f..ba3f9aa3d68e 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -80,3 +80,35 @@ Contact: Linux on PowerPC Developer List Description: read only This sysfs file exposes the cpumask which is designated to make HCALLs to retrieve hv-gpci pmu event counter data. + +What: /sys/devices/hv_gpci/interface/processor_bus_topology +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + PROCESSOR_BUS_TOPOLOGY(0xD0). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCCESS", + "H_AUTHORITY" or "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY" can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer to getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.39.3
[PATCH v3 01/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor bus topology information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
PROCESSOR_BUS_TOPOLOGY(0XD0), can be used to get the system
topology information. To expose the system topology information,
patch adds sysfs file called "processor_bus_topology" to the
"/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver.
Add macro for PROCESSOR_BUS_TOPOLOGY counter request value
in hv-gpci.c file. Also add a new function called
"systeminfo_gpci_request", to make the H_GET_PERF_COUNTER_INFO hcall
with added macro and populates the output buffer.
The processor_bus_topology sysfs file is only available for power10
and above platforms. Add a new function called
"add_sysinfo_interface_files", which will add processor_bus_topology
attribute in the interface_attrs array, only for power10 and
above platforms.
Also add macro INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR in hv-gpci.c
file, which points to the index of NULL placefolder, for
processor_bus_topology attribute.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 184 +++-
1 file changed, 182 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 7ff8ff3509f5..225f148f75fd 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -102,6 +102,141 @@ static ssize_t cpumask_show(struct device *dev,
return cpumap_print_to_pagebuf(true, buf, _gpci_cpumask);
}
+/* Counter request value to retrieve system information */
+#define PROCESSOR_BUS_TOPOLOGY 0XD0
+
+/* Interface attribute array index to store system information */
+#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
+
+static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
+
+static unsigned long systeminfo_gpci_request(u32 req, u32 starting_index,
+ u16 secondary_index, char *buf,
+ size_t *n, struct hv_gpci_request_buffer *arg)
+{
+ unsigned long ret;
+ size_t i, j;
+
+ arg->params.counter_request = cpu_to_be32(req);
+ arg->params.starting_index = cpu_to_be32(starting_index);
+ arg->params.secondary_index = cpu_to_be16(secondary_index);
+
+ ret = plpar_hcall_norets(H_GET_PERF_COUNTER_INFO,
+ virt_to_phys(arg), HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL',
+* which means that the current buffer size cannot accommodate
+* all the information and a partial buffer returned.
+* hcall fails incase of ret value other than H_SUCCESS or H_PARAMETER.
+*
+* ret value as H_AUTHORITY implies that partition is not permitted to
retrieve
+* performance information, and required to set
+* "Enable Performance Information Collection" option.
+*/
+ if (ret == H_AUTHORITY)
+ return -EPERM;
+
+ /*
+* hcall can fail with other possible ret value like
H_PRIVILEGE/H_HARDWARE
+* because of invalid buffer-length/address or due to some hardware
+* error.
+*/
+ if (ret && (ret != H_PARAMETER))
+ return -EIO;
+
+ /*
+* hcall H_GET_PERF_COUNTER_INFO populates the 'returned_values'
+* to show the total number of counter_value array elements
+* returned via hcall.
+* hcall also populates 'cv_element_size' corresponds to individual
+* counter_value array element size. Below loop go through all
+* counter_value array elements as per their size and add it to
+* the output buffer.
+*/
+ for (i = 0; i < be16_to_cpu(arg->params.returned_values); i++) {
+ j = i * be16_to_cpu(arg->params.cv_element_size);
+
+ for (; j < (i + 1) * be16_to_cpu(arg->params.cv_element_size);
j++)
+ *n += sprintf(buf + *n, "%02x", (u8)arg->bytes[j]);
+ *n += sprintf(buf + *n, "\n");
+ }
+
+ if (*n >= PAGE_SIZE) {
+ pr_info("System information exceeds PAGE_SIZE\n");
+ return -EFBIG;
+ }
+
+ return ret;
+}
+
+static ssize_t processor_bus_topology_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request value 0xD0 corresponds to request
+* type 'Processor_bus_topology', to retrieve
+* the system topology information.
+* starting_index value implies the starting hardware
+* chip id.
+*/
+ ret = systeminfo_gpci_request(PROCESSOR_BUS_TOPOLOGY, 0, 0, buf, ,
arg);
+
+ if (!ret)
+
[PATCH v3 00/10] Add sysfs interface files to hv_gpci device to expose system information
The hcall H_GET_PERF_COUNTER_INFO can be used to get data related to chips, dimms and system topology, by passing different counter request values. Patchset adds sysfs files to "/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver, which will expose system topology information using H_GET_PERF_COUNTER_INFO hcall. The added sysfs files are available for power10 and above platforms and needs root access to read the data. Patches 1,3,5,7,9 adds sysfs interface files to the hv_gpci pmu driver, to get system topology information. List of added sysfs files: -> processor_bus_topology (Counter request value : 0xD0) -> processor_config (Counter request value : 0x90) -> affinity_domain_via_virtual_processor (Counter request value : 0xA0) -> affinity_domain_via_domain (Counter request value : 0xB0) -> affinity_domain_via_partition (Counter request value : 0xB1) Patches 2,4,6,8,10 adds details of the newly added hv_gpci interface files listed above in the ABI documentation. Patches 2,4,6,8,10 adds details of the newly added hv_gpci interface files listed above in the ABI documentation. Changelog: v2 -> v3 -> Make nit changes in documentation patches as suggested by Randy Dunlap. v1 -> v2 -> Incase the HCALL fails with errors that can be resolve during runtime, then only add sysinfo interface attributes to the interface_attrs attribute array. Even if one of the counter request value HCALL fails, don't add any sysinfo attribute to the interface_attrs attribute array. Add the code changes to make sure sysinfo interface added only when all the requirements met as suggested by Michael Ellerman. -> Make changes in documentation, adds detail of errors type which can be resolved at runtime as suggested by Michael Ellerman. -> Add new enum and sysinfo_counter_request array to get required counter request value in hv-gpci.c file. -> Move the macros for interface attribute array index to hv-gpci.c, as these macros currently only used in hv-gpci.c file. Kajol Jain (10): powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor bus topology information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_bus_topology sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor config information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_config sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via virtual processor information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_virtual_processor sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via domain information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_domain sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via partition information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_partition sysfs interface file .../sysfs-bus-event_source-devices-hv_gpci| 160 + arch/powerpc/perf/hv-gpci.c | 640 +- 2 files changed, 798 insertions(+), 2 deletions(-) -- 2.39.3
[PATCH v3 00/10] Add sysfs interface files to hv_gpci device to expose system information
The hcall H_GET_PERF_COUNTER_INFO can be used to get data related to chips, dimms and system topology, by passing different counter request values. Patchset adds sysfs files to "/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver, which will expose system topology information using H_GET_PERF_COUNTER_INFO hcall. The added sysfs files are available for power10 and above platforms and needs root access to read the data. Patches 1,3,5,7,9 adds sysfs interface files to the hv_gpci pmu driver, to get system topology information. List of added sysfs files: -> processor_bus_topology (Counter request value : 0xD0) -> processor_config (Counter request value : 0x90) -> affinity_domain_via_virtual_processor (Counter request value : 0xA0) -> affinity_domain_via_domain (Counter request value : 0xB0) -> affinity_domain_via_partition (Counter request value : 0xB1) Patches 2,4,6,8,10 adds details of the newly added hv_gpci interface files listed above in the ABI documentation. Patches 2,4,6,8,10 adds details of the newly added hv_gpci interface files listed above in the ABI documentation. Changelog: v2 -> v3 -> Make nit changes in documentation patches as suggested by Randy Dunlap. v1 -> v2 -> Incase the HCALL fails with errors that can be resolve during runtime, then only add sysinfo interface attributes to the interface_attrs attribute array. Even if one of the counter request value HCALL fails, don't add any sysinfo attribute to the interface_attrs attribute array. Add the code changes to make sure sysinfo interface added only when all the requirements met as suggested by Michael Ellerman. -> Make changes in documentation, adds detail of errors type which can be resolved at runtime as suggested by Michael Ellerman. -> Add new enum and sysinfo_counter_request array to get required counter request value in hv-gpci.c file. -> Move the macros for interface attribute array index to hv-gpci.c, as these macros currently only used in hv-gpci.c file. Kajol Jain (10): powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor bus topology information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_bus_topology sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor config information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_config sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via virtual processor information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_virtual_processor sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via domain information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_domain sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via partition information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_partition sysfs interface file .../sysfs-bus-event_source-devices-hv_gpci| 160 + arch/powerpc/perf/hv-gpci.c | 640 +- 2 files changed, 798 insertions(+), 2 deletions(-) -- 2.39.3
[PATCH v2 10/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_partition sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_partition" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index d8e65b93d1f7..b03b2bd4b081 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -208,3 +208,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_partition +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_PARTITION(0xB1). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCESS", + "H_AUTHORITY" and "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY", can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.31.1
[PATCH v2 09/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via partition information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_PARTITION(0XB1), can be used to get
the system affinity domain via partition information. To expose the system
affinity domain via partition information, patch adds sysfs file called
"affinity_domain_via_partition" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add new entry for AFFINITY_DOMAIN_VIA_PAR in sysinfo_counter_request
array, which points to the counter request value
"affinity_domain_via_partition" in hv-gpci.c file. Also add a
new function called "affinity_domain_via_partition_result_parse" to parse
the hcall result and store it in output buffer.
The affinity_domain_via_partition sysfs file is only available for power10
and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_PAR_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_partition attribute in
interface_attrs array. Also updated the value of INTERFACE_NULL_ATTR
macro in hv-gpci.c file.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 160 +++-
1 file changed, 159 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 326b758df7c8..f2fff166290b 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -107,7 +107,8 @@ static ssize_t cpumask_show(struct device *dev,
#define INTERFACE_PROCESSOR_CONFIG_ATTR7
#define INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR 8
#define INTERFACE_AFFINITY_DOMAIN_VIA_DOM_ATTR 9
-#define INTERFACE_NULL_ATTR10
+#define INTERFACE_AFFINITY_DOMAIN_VIA_PAR_ATTR 10
+#define INTERFACE_NULL_ATTR11
/* Counter request value to retrieve system information */
enum {
@@ -115,6 +116,7 @@ enum {
PROCESSOR_CONFIG,
AFFINITY_DOMAIN_VIA_VP, /* affinity domain via virtual processor */
AFFINITY_DOMAIN_VIA_DOM, /* affinity domain via domain */
+ AFFINITY_DOMAIN_VIA_PAR, /* affinity domain via partition */
};
static int sysinfo_counter_request[] = {
@@ -122,6 +124,7 @@ static int sysinfo_counter_request[] = {
[PROCESSOR_CONFIG] = 0x90,
[AFFINITY_DOMAIN_VIA_VP] = 0xA0,
[AFFINITY_DOMAIN_VIA_DOM] = 0xB0,
+ [AFFINITY_DOMAIN_VIA_PAR] = 0xB1,
};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -458,6 +461,152 @@ static ssize_t affinity_domain_via_domain_show(struct
device *dev, struct device
return ret;
}
+static void affinity_domain_via_partition_result_parse(int returned_values,
+ int element_size, char *buf, size_t *last_element,
+ size_t *n, struct hv_gpci_request_buffer *arg)
+{
+ size_t i = 0, j = 0;
+ size_t k, l, m;
+ uint16_t total_affinity_domain_ele, size_of_each_affinity_domain_ele;
+
+ /*
+* hcall H_GET_PERF_COUNTER_INFO populates the 'returned_values'
+* to show the total number of counter_value array elements
+* returned via hcall.
+* Unlike other request types, the data structure returned by this
+* request is variable-size. For this counter request type,
+* hcall populates 'cv_element_size' corresponds to minimum size of
+* the structure returned i.e; the size of the structure with no domain
+* information. Below loop go through all counter_value array
+* to determine the number and size of each domain array element and
+* add it to the output buffer.
+*/
+ while (i < returned_values) {
+ k = j;
+ for (; k < j + element_size; k++)
+ *n += sprintf(buf + *n, "%02x", (u8)arg->bytes[k]);
+ *n += sprintf(buf + *n, "\n");
+
+ total_affinity_domain_ele = (u8)arg->bytes[k - 2] << 8 |
(u8)arg->bytes[k - 3];
+ size_of_each_affinity_domain_ele = (u8)arg->bytes[k] << 8 |
(u8)arg->bytes[k - 1];
+
+ for (l = 0; l < total_affinity_domain_ele; l++) {
+ for (m = 0; m < size_of_each_affinity_domain_ele; m++) {
+ *n += sprintf(buf + *n, "%02x",
(u8)arg->bytes[k]);
+ k++;
+ }
+ *n += sprintf(buf + *n, "\n");
+ }
+
+ *n += sprintf(buf + *n, "\n");
+ i++;
+ j = k;
+ }
+
+ *last_element = k;
+}
+
+static ssize_t affinity_domain_via_partition_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+ size_t last_elem
[PATCH v2 08/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_domain sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_domain" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 3b63d66658fe..d8e65b93d1f7 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -176,3 +176,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_domain +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_DOMAIN(0xB0). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCESS", + "H_AUTHORITY" and "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY", can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.31.1
[PATCH v2 07/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via domain information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_DOMAIN(0XB0), can be used to get
the system affinity domain via domain information. To expose the system
affinity domain via domain information, patch adds sysfs file called
"affinity_domain_via_domain" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add new entry for AFFINITY_DOMAIN_VIA_DOM in sysinfo_counter_request
array, which points to the counter request value
"affinity_domain_via_domain" in hv-gpci.c file.
The affinity_domain_via_domain sysfs file is only available for power10
and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_DOM_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_domain attribute in interface_attrs
array. Also updated the value of INTERFACE_NULL_ATTR macro in hv-gpci.c
file.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 80 -
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 68502cb18262..326b758df7c8 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -106,19 +106,22 @@ static ssize_t cpumask_show(struct device *dev,
#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
#define INTERFACE_PROCESSOR_CONFIG_ATTR7
#define INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR 8
-#define INTERFACE_NULL_ATTR9
+#define INTERFACE_AFFINITY_DOMAIN_VIA_DOM_ATTR 9
+#define INTERFACE_NULL_ATTR10
/* Counter request value to retrieve system information */
enum {
PROCESSOR_BUS_TOPOLOGY,
PROCESSOR_CONFIG,
AFFINITY_DOMAIN_VIA_VP, /* affinity domain via virtual processor */
+ AFFINITY_DOMAIN_VIA_DOM, /* affinity domain via domain */
};
static int sysinfo_counter_request[] = {
[PROCESSOR_BUS_TOPOLOGY] = 0xD0,
[PROCESSOR_CONFIG] = 0x90,
[AFFINITY_DOMAIN_VIA_VP] = 0xA0,
+ [AFFINITY_DOMAIN_VIA_DOM] = 0xB0,
};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -389,6 +392,72 @@ static ssize_t
affinity_domain_via_virtual_processor_show(struct device *dev,
return ret;
}
+static ssize_t affinity_domain_via_domain_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request 0xB0 corresponds to request
+* type 'Affinity_domain_information_by_domain',
+* to retrieve the system affinity domain information.
+* starting_index value refers to the starting hardware
+* processor index.
+*/
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_DOM],
+ 0, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next starting index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next starting index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index value is part of counter_value
+* buffer elements, use the starting index value in the last
+* element and add 1 to make subsequent hcalls.
+*/
+ u32 starting_index = arg->bytes[last_element + 1] +
+ (arg->bytes[last_element] << 8) + 1;
+
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_DOM],
+ starting_index, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+ }
+
+ return n;
+
+out:
+ put_cpu_var(hv_gpci_reqb);
+ return ret;
+}
+
static DEVICE_ATTR_RO(kernel_version);
static DEVICE_ATTR_RO(cpumask);
@@ -420,6 +489,11 @@ static struct attribute *interface_attrs[] = {
* attribute, set in init
[PATCH v2 06/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_virtual_processor sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_virtual_processor" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index aff52dc3b05c..3b63d66658fe 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -144,3 +144,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_virtual_processor +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_VIRTUAL_PROCESSOR(0xA0). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCESS", + "H_AUTHORITY" and "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY", can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.31.1
[PATCH v2 05/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via virtual processor information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_VIRTUAL_PROCESSOR(0XA0), can be used to get
the system affinity domain via virtual processor information. To expose
the system affinity domain via virtual processor information, patch adds
sysfs file called "affinity_domain_via_virtual_processor" to the
"/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver.
The affinity_domain_via_virtual_processor sysfs file is only available for
power10 and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_virtual_processor attribute in
interface_attrs array. Also updated the value of INTERFACE_NULL_ATTR macro
in hv-gpci.c file.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 86 -
1 file changed, 84 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index c74076d3c7a7..68502cb18262 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -105,17 +105,20 @@ static ssize_t cpumask_show(struct device *dev,
/* Interface attribute array index to store system information */
#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
#define INTERFACE_PROCESSOR_CONFIG_ATTR7
-#define INTERFACE_NULL_ATTR8
+#define INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR 8
+#define INTERFACE_NULL_ATTR9
/* Counter request value to retrieve system information */
enum {
PROCESSOR_BUS_TOPOLOGY,
- PROCESSOR_CONFIG
+ PROCESSOR_CONFIG,
+ AFFINITY_DOMAIN_VIA_VP, /* affinity domain via virtual processor */
};
static int sysinfo_counter_request[] = {
[PROCESSOR_BUS_TOPOLOGY] = 0xD0,
[PROCESSOR_CONFIG] = 0x90,
+ [AFFINITY_DOMAIN_VIA_VP] = 0xA0,
};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -316,6 +319,76 @@ static ssize_t processor_config_show(struct device *dev,
struct device_attribute
return ret;
}
+static ssize_t affinity_domain_via_virtual_processor_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request 0xA0 corresponds to request
+* type 'Affinity_domain_information_by_virutal_processor',
+* to retrieve the system affinity domain information.
+* starting_index value refers to the starting hardware
+* processor index.
+*/
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_VP],
+ 0, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next secondary index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next secondary index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index and secondary index type is part of
the
+* counter_value buffer elements, use the starting index value
in the
+* last array element as subsequent starting index, and use
secondary index
+* value in the last array element plus 1 as subsequent
secondary index.
+* For counter request '0xA0', starting index points to
partition id
+* and secondary index points to corresponding virtual
processor index.
+*/
+ u32 starting_index = arg->bytes[last_element + 1] +
(arg->bytes[last_element] << 8);
+ u16 secondary_index = arg->bytes[last_element + 3] +
+ (arg->bytes[last_element + 2] << 8) + 1;
+
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[AFFINITY_DOMAIN_VIA_VP],
+ starting_index, secondary_index, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
[PATCH v2 04/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_config sysfs interface file
Add details of the new hv-gpci interface file called "processor_config" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 2eeeab9a20fa..aff52dc3b05c 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -112,3 +112,35 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/processor_config +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + PROCESSOR_CONFIG(0x90). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCESS", + "H_AUTHORITY" and "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY", can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.31.1
[PATCH v2 03/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor config information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
PROCESSOR_CONFIG(0X90), can be used to get the system
processor configuration information. To expose the system
processor config information, patch adds sysfs file called
"processor_config" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add enum and sysinfo_counter_request array to get required
counter request value in hv-gpci.c file.
Also add a new function called "sysinfo_device_attr_create",
which will create and return required device attribute to the
add_sysinfo_interface_files function.
The processor_config sysfs file is only available for power10
and above platforms. Add a new macro called
INTERFACE_PROCESSOR_CONFIG_ATTR, which points to the index of
NULL placefolder, for processor_config attribute in the interface_attrs
array. Also add macro INTERFACE_NULL_ATTR which points to index of NULL
attribute in interface_attrs array.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 168
1 file changed, 153 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 225f148f75fd..c74076d3c7a7 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -102,11 +102,21 @@ static ssize_t cpumask_show(struct device *dev,
return cpumap_print_to_pagebuf(true, buf, _gpci_cpumask);
}
-/* Counter request value to retrieve system information */
-#define PROCESSOR_BUS_TOPOLOGY 0XD0
-
/* Interface attribute array index to store system information */
#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
+#define INTERFACE_PROCESSOR_CONFIG_ATTR7
+#define INTERFACE_NULL_ATTR8
+
+/* Counter request value to retrieve system information */
+enum {
+ PROCESSOR_BUS_TOPOLOGY,
+ PROCESSOR_CONFIG
+};
+
+static int sysinfo_counter_request[] = {
+ [PROCESSOR_BUS_TOPOLOGY] = 0xD0,
+ [PROCESSOR_CONFIG] = 0x90,
+};
static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
@@ -187,7 +197,8 @@ static ssize_t processor_bus_topology_show(struct device
*dev, struct device_att
* starting_index value implies the starting hardware
* chip id.
*/
- ret = systeminfo_gpci_request(PROCESSOR_BUS_TOPOLOGY, 0, 0, buf, ,
arg);
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[PROCESSOR_BUS_TOPOLOGY],
+ 0, 0, buf, , arg);
if (!ret)
return n;
@@ -220,8 +231,76 @@ static ssize_t processor_bus_topology_show(struct device
*dev, struct device_att
memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
- ret = systeminfo_gpci_request(PROCESSOR_BUS_TOPOLOGY,
starting_index,
- 0, buf, , arg);
+ ret =
systeminfo_gpci_request(sysinfo_counter_request[PROCESSOR_BUS_TOPOLOGY],
+ starting_index, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+ }
+
+ return n;
+
+out:
+ put_cpu_var(hv_gpci_reqb);
+ return ret;
+}
+
+static ssize_t processor_config_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request value 0x90 corresponds to request
+* type 'Processor_config', to retrieve
+* the system processor information.
+* starting_index value implies the starting hardware
+* processor index.
+*/
+ ret = systeminfo_gpci_request(sysinfo_counter_request[PROCESSOR_CONFIG],
+ 0, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next starting index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next starting index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index is part of counter_value
+* buffer elements, use
[PATCH v2 02/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_bus_topology sysfs interface file
Add details of the new hv-gpci interface file called "processor_bus_topology" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 32 +++ 1 file changed, 32 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 12e2bf92783f..2eeeab9a20fa 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -80,3 +80,35 @@ Contact: Linux on PowerPC Developer List Description: read only This sysfs file exposes the cpumask which is designated to make HCALLs to retrieve hv-gpci pmu event counter data. + +What: /sys/devices/hv_gpci/interface/processor_bus_topology +Date: July 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + PROCESSOR_BUS_TOPOLOGY(0xD0). + + * This sysfs file will be created only for power10 and above platforms. + + * User needs root privileges to read data from this sysfs file. + + * This sysfs file will be created, only when the HCALL returns "H_SUCESS", + "H_AUTHORITY" and "H_PARAMETER" as the return type. + + HCALL with return error type "H_AUTHORITY", can be resolved during + runtime by setting "Enable Performance Information Collection" option. + + * The end user reading this sysfs file must decode the content as per + underlying platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.31.1
[PATCH v2 01/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor bus topology information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
PROCESSOR_BUS_TOPOLOGY(0XD0), can be used to get the system
topology information. To expose the system topology information,
patch adds sysfs file called "processor_bus_topology" to the
"/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver.
Add macro for PROCESSOR_BUS_TOPOLOGY counter request value
in hv-gpci.c file. Also add a new function called
"systeminfo_gpci_request", to make the H_GET_PERF_COUNTER_INFO hcall
with added macro and populates the output buffer.
The processor_bus_topology sysfs file is only available for power10
and above platforms. Add a new function called
"add_sysinfo_interface_files", which will add processor_bus_topology
attribute in the interface_attrs array, only for power10 and
above platforms.
Also add macro INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR in hv-gpci.c
file, which points to the index of NULL placefolder, for
processor_bus_topology attribute.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 184 +++-
1 file changed, 182 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 7ff8ff3509f5..225f148f75fd 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -102,6 +102,141 @@ static ssize_t cpumask_show(struct device *dev,
return cpumap_print_to_pagebuf(true, buf, _gpci_cpumask);
}
+/* Counter request value to retrieve system information */
+#define PROCESSOR_BUS_TOPOLOGY 0XD0
+
+/* Interface attribute array index to store system information */
+#define INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR 6
+
+static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
+
+static unsigned long systeminfo_gpci_request(u32 req, u32 starting_index,
+ u16 secondary_index, char *buf,
+ size_t *n, struct hv_gpci_request_buffer *arg)
+{
+ unsigned long ret;
+ size_t i, j;
+
+ arg->params.counter_request = cpu_to_be32(req);
+ arg->params.starting_index = cpu_to_be32(starting_index);
+ arg->params.secondary_index = cpu_to_be16(secondary_index);
+
+ ret = plpar_hcall_norets(H_GET_PERF_COUNTER_INFO,
+ virt_to_phys(arg), HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL',
+* which means that the current buffer size cannot accommodate
+* all the information and a partial buffer returned.
+* hcall fails incase of ret value other than H_SUCCESS or H_PARAMETER.
+*
+* ret value as H_AUTHORITY implies that partition is not permitted to
retrieve
+* performance information, and required to set
+* "Enable Performance Information Collection" option.
+*/
+ if (ret == H_AUTHORITY)
+ return -EPERM;
+
+ /*
+* hcall can fail with other possible ret value like
H_PRIVILEGE/H_HARDWARE
+* because of invalid buffer-length/address or due to some hardware
+* error.
+*/
+ if (ret && (ret != H_PARAMETER))
+ return -EIO;
+
+ /*
+* hcall H_GET_PERF_COUNTER_INFO populates the 'returned_values'
+* to show the total number of counter_value array elements
+* returned via hcall.
+* hcall also populates 'cv_element_size' corresponds to individual
+* counter_value array element size. Below loop go through all
+* counter_value array elements as per their size and add it to
+* the output buffer.
+*/
+ for (i = 0; i < be16_to_cpu(arg->params.returned_values); i++) {
+ j = i * be16_to_cpu(arg->params.cv_element_size);
+
+ for (; j < (i + 1) * be16_to_cpu(arg->params.cv_element_size);
j++)
+ *n += sprintf(buf + *n, "%02x", (u8)arg->bytes[j]);
+ *n += sprintf(buf + *n, "\n");
+ }
+
+ if (*n >= PAGE_SIZE) {
+ pr_info("System information exceeds PAGE_SIZE\n");
+ return -EFBIG;
+ }
+
+ return ret;
+}
+
+static ssize_t processor_bus_topology_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request value 0xD0 corresponds to request
+* type 'Processor_bus_topology', to retrieve
+* the system topology information.
+* starting_index value implies the starting hardware
+* chip id.
+*/
+ ret = systeminfo_gpci_request(PROCESSOR_BUS_TOPOLOGY, 0, 0, buf, ,
arg);
+
+ if (!ret)
+
[PATCH v2 00/10] Add sysfs interface files to hv_gpci device to expose system information
The hcall H_GET_PERF_COUNTER_INFO can be used to get data related to chips, dimms and system topology, by passing different counter request values. Patchset adds sysfs files to "/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver, which will expose system topology information using H_GET_PERF_COUNTER_INFO hcall. The added sysfs files are available for power10 and above platforms and needs root access to read the data. Patches 1,3,5,7,9 adds sysfs interface files to the hv_gpci pmu driver, to get system topology information. List of added sysfs files: -> processor_bus_topology (Counter request value : 0xD0) -> processor_config (Counter request value : 0x90) -> affinity_domain_via_virtual_processor (Counter request value : 0xA0) -> affinity_domain_via_domain (Counter request value : 0xB0) -> affinity_domain_via_partition (Counter request value : 0xB1) Patches 2,4,6,8,10 adds details of the newly added hv_gpci interface files listed above in the ABI documentation. Patches 2,4,6,8,10 adds details of the newly added hv_gpci interface files listed above in the ABI documentation. Changelog: v1 -> v2 -> Incase the HCALL fails with errors that can be resolve during runtime, then only add sysinfo interface attributes to the interface_attrs attribute array. Even if one of the counter request value HCALL fails, don't add any sysinfo attribute to the interface_attrs attribute array. Add the code changes to make sure sysinfo interface added only when all the requirements met as suggested by Michael Ellerman. -> Make changes in documentation, adds detail of errors type which can be resolved at runtime as suggested by Michael Ellerman. -> Add new enum and sysinfo_counter_request array to get required counter request value in hv-gpci.c file. -> Move the macros for interface attribute array index to hv-gpci.c, as these macros currently only used in hv-gpci.c file Kajol Jain (10): powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor bus topology information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_bus_topology sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor config information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_config sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via virtual processor information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_virtual_processor sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via domain information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_domain sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via partition information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_partition sysfs interface file .../sysfs-bus-event_source-devices-hv_gpci| 160 + arch/powerpc/perf/hv-gpci.c | 640 +- 2 files changed, 798 insertions(+), 2 deletions(-) -- 2.31.1
[PATCH 10/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_partition sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_partition" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 15 +++ 1 file changed, 15 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 1a5636ed3a4b..6bca74cf3220 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -154,3 +154,18 @@ Description: admin read only removed, this sysfs file still be created and give error when reading it. * The end user reading this sysfs file need to decode sysfs file data as per underneath platform/firmware. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_partition +Date: June 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_PARTITION(0xB1). + * This sysfs file is only be created for power10 and above platforms. + * User need root access to read data from this sysfs file. + * Incase the HCALL fails with hardware/permission issue, or the support for + AFFINITY_DOMAIN_INFORMATION_BY_PARTITION counter request value + removed, this sysfs file still be created and give error when reading it. + * The end user reading this sysfs file need to decode sysfs file data as per + underneath platform/firmware. -- 2.35.3
[PATCH 09/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via partition information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_PARTITION(0XB1), can be used to get
the system affinity domain via partition information. To expose the system
affinity domain via partition information, patch adds sysfs file called
"affinity_domain_via_partition" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add macro AFFINITY_DOMAIN_VIA_PAR, which points to the counter request
value for "affinity_domain_via_partition", in hv-gpci.h file. Also add a
new function called "affinity_domain_via_partition_result_parse" to parse
the hcall result and store it in output buffer.
The affinity_domain_via_partition sysfs file is only available for power10
and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_PAR_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_partition attribute in
interface_attrs array. Also updated the value of INTERFACE_NULL_ATTR
macro in hv-gpci.h file.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 164
arch/powerpc/perf/hv-gpci.h | 4 +-
2 files changed, 167 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index b18f6f2d15b0..6e57c6065010 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -437,6 +437,158 @@ static ssize_t affinity_domain_via_domain_show(struct
device *dev, struct device
return ret;
}
+static void affinity_domain_via_partition_result_parse(int returned_values,
+ int element_size, char *buf, size_t *last_element,
+ size_t *n, struct hv_gpci_request_buffer *arg)
+{
+ size_t i = 0, j = 0;
+ size_t k, l, m;
+ uint16_t total_affinity_domain_ele, size_of_each_affinity_domain_ele;
+
+ /*
+* hcall H_GET_PERF_COUNTER_INFO populates the 'returned_values'
+* to show the total number of counter_value array elements
+* returned via hcall.
+* Unlike other request types, the data structure returned by this
+* request is variable-size. For this counter request type,
+* hcall populates 'cv_element_size' corresponds to minimum size of
+* the structure returned i.e; the size of the structure with no domain
+* information. Below loop go through all counter_value array
+* to determine the number and size of each domain array element and
+* add it to the output buffer.
+*/
+ while (i < returned_values) {
+ k = j;
+ for (; k < j + element_size; k++)
+ *n += sprintf(buf + *n, "%02x", (u8)arg->bytes[k]);
+ *n += sprintf(buf + *n, "\n");
+
+ total_affinity_domain_ele = (u8)arg->bytes[k - 2] << 8 |
(u8)arg->bytes[k - 3];
+ size_of_each_affinity_domain_ele = (u8)arg->bytes[k] << 8 |
(u8)arg->bytes[k - 1];
+
+ for (l = 0; l < total_affinity_domain_ele; l++) {
+ for (m = 0; m < size_of_each_affinity_domain_ele; m++) {
+ *n += sprintf(buf + *n, "%02x",
(u8)arg->bytes[k]);
+ k++;
+ }
+ *n += sprintf(buf + *n, "\n");
+ }
+
+ *n += sprintf(buf + *n, "\n");
+ i++;
+ j = k;
+ }
+
+ *last_element = k;
+}
+
+static ssize_t affinity_domain_via_partition_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+ size_t last_element = 0;
+ u32 starting_index;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request value 0xB1 corresponds to counter request
+* type 'Affinity_domain_information_by_partition',
+* to retrieve the system affinity domain by partition information.
+* starting_index value refers to the starting hardware
+* processor index.
+*/
+ arg->params.counter_request = cpu_to_be32(AFFINITY_DOMAIN_VIA_PAR);
+ arg->params.starting_index = cpu_to_be32(0);
+
+ ret = plpar_hcall_norets(H_GET_PERF_COUNTER_INFO,
+ virt_to_phys(arg), HGPCI_REQ_BUFFER_SIZE);
+
+ if (!ret)
+ goto parse_result;
+
+ /*
+* ret value as 'H_PARAMETER' implies that the current buffer size
+* can't accommodate all the information, and a partial buffer
+* returned. To handle that, we need to make subsequent requests
+* with next starting index to retrieve additional (missing)
[PATCH 08/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_domain sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_domain" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 15 +++ 1 file changed, 15 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index d8862808c955..1a5636ed3a4b 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -139,3 +139,18 @@ Description: admin read only removed, this sysfs file still be created and give error when reading it. * The end user reading this sysfs file need to decode sysfs file data as per underneath platform/firmware. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_domain +Date: June 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_DOMAIN(0xB0). + * This sysfs file is only be created for power10 and above platforms. + * User need root access to read data from this sysfs file. + * Incase the HCALL fails with hardware/permission issue, or the support for + AFFINITY_DOMAIN_INFORMATION_BY_DOMAIN counter request value + removed, this sysfs file still be created and give error when reading it. + * The end user reading this sysfs file need to decode sysfs file data as per + underneath platform/firmware. -- 2.35.3
[PATCH 07/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via domain information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_DOMAIN(0XB0), can be used to get
the system affinity domain via domain information. To expose the system
affinity domain via domain information, patch adds sysfs file called
"affinity_domain_via_domain" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add macro for AFFINITY_DOMAIN_VIA_DOM, which points to the counter
request value for "affinity_domain_via_domain" in hv-gpci.h file.
The affinity_domain_via_domain sysfs file is only available for power10
and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_DOM_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_domain attribute in interface_attrs
array. Also updated the value of INTERFACE_NULL_ATTR macro in hv-gpci.h
file.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 77 +
arch/powerpc/perf/hv-gpci.h | 4 +-
2 files changed, 80 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index cac726f06221..b18f6f2d15b0 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -372,6 +372,71 @@ static ssize_t
affinity_domain_via_virtual_processor_show(struct device *dev,
return ret;
}
+static ssize_t affinity_domain_via_domain_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request 0xB0 corresponds to request
+* type 'Affinity_domain_information_by_domain',
+* to retrieve the system affinity domain information.
+* starting_index value refers to the starting hardware
+* processor index.
+*/
+ ret = systeminfo_gpci_request(AFFINITY_DOMAIN_VIA_DOM, 0, 0, buf, ,
arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next starting index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next starting index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index value is part of counter_value
+* buffer elements, use the starting index value in the last
+* element and add 1 to make subsequent hcalls.
+*/
+ u32 starting_index = arg->bytes[last_element + 1] +
+ (arg->bytes[last_element] << 8) + 1;
+
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ ret = systeminfo_gpci_request(AFFINITY_DOMAIN_VIA_DOM,
+ starting_index, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+ }
+
+ return n;
+
+out:
+ put_cpu_var(hv_gpci_reqb);
+ return ret;
+}
+
static DEVICE_ATTR_RO(kernel_version);
static DEVICE_ATTR_RO(cpumask);
@@ -403,6 +468,11 @@ static struct attribute *interface_attrs[] = {
* attribute, set in init function if applicable.
*/
NULL,
+ /*
+* This NULL is a placeholder for the affinity_domain_via_domain
+* attribute, set in init function if applicable.
+*/
+ NULL,
NULL,
};
@@ -639,6 +709,10 @@ static void sysinfo_device_attr_create(int
sysinfo_interface_group_index)
attr->attr.name = "affinity_domain_via_virtual_processor";
attr->show = affinity_domain_via_virtual_processor_show;
break;
+ case INTERFACE_AFFINITY_DOMAIN_VIA_DOM_ATTR:
+ attr->attr.name = "affinity_domain_via_domain";
+ attr->show = affinity_domain_via_domain_show;
+ break;
}
attr->attr.mode = 0444;
@@ -658,6 +732,9 @@ static void add_sysinfo_interface_files(void)
* interface_attrs attribute array
*/
sysinfo_device_attr_create(INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR);
+
+ /* Add affinity_domain_via_domain attr
[PATCH 06/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_virtual_processor sysfs interface file
Add details of the new hv-gpci interface file called "affinity_domain_via_virtual_processor" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 15 +++ 1 file changed, 15 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 003d94afbbcd..d8862808c955 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -124,3 +124,18 @@ Description: admin read only created and give error when reading it. * The end user reading this sysfs file need to decode sysfs file data as per underneath platform/firmware. + +What: /sys/devices/hv_gpci/interface/affinity_domain_via_virtual_processor +Date: June 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + AFFINITY_DOMAIN_INFORMATION_BY_VIRTUAL_PROCESSOR(0xA0). + * This sysfs file is only be created for power10 and above platforms. + * User need root access to read data from this sysfs file. + * Incase the HCALL fails with hardware/permission issue, or the support for + AFFINITY_DOMAIN_INFORMATION_BY_VIRTUAL_PROCESSOR counter request value + removed, this sysfs file still be created and give error when reading it. + * The end user reading this sysfs file need to decode sysfs file data as per + underneath platform/firmware. -- 2.35.3
[PATCH 05/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via virtual processor information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_VIRTUAL_PROCESSOR(0XA0), can be used to get
the system affinity domain via virtual processor information. To expose
the system affinity domain via virtual processor information, patch adds
sysfs file called "affinity_domain_via_virtual_processor" to the
"/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver.
Add macro for AFFINITY_DOMAIN_VIA_VP, which points to counter request value
for "affinity_domain_via_virtual_processor" in hv-gpci.h file.
The affinity_domain_via_virtual_processor sysfs file is only available for
power10 and above platforms. Add a macro called
INTERFACE_AFFINITY_DOMAIN_VIA_VP_ATTR, which points to the index of NULL
placeholder, for affinity_domain_via_virtual_processor attribute in
interface_attrs array. Also updated the value of INTERFACE_NULL_ATTR macro
in hv-gpci.h file.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 84 +
arch/powerpc/perf/hv-gpci.h | 4 +-
2 files changed, 87 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index c9fe74373e5f..cac726f06221 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -303,6 +303,75 @@ static ssize_t processor_config_show(struct device *dev,
struct device_attribute
return ret;
}
+static ssize_t affinity_domain_via_virtual_processor_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request 0xA0 corresponds to request
+* type 'Affinity_domain_information_by_virutal_processor',
+* to retrieve the system affinity domain information.
+* starting_index value refers to the starting hardware
+* processor index.
+*/
+ ret = systeminfo_gpci_request(AFFINITY_DOMAIN_VIA_VP, 0, 0, buf, ,
arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next secondary index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next secondary index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index and secondary index type is part of
the
+* counter_value buffer elements, use the starting index value
in the
+* last array element as subsequent starting index, and use
secondary index
+* value in the last array element plus 1 as subsequent
secondary index.
+* For counter request '0xA0', starting index points to
partition id
+* and secondary index points to corresponding virtual
processor index.
+*/
+ u32 starting_index = arg->bytes[last_element + 1] +
(arg->bytes[last_element] << 8);
+ u16 secondary_index = arg->bytes[last_element + 3] +
+ (arg->bytes[last_element + 2] << 8) + 1;
+
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ ret = systeminfo_gpci_request(AFFINITY_DOMAIN_VIA_VP,
starting_index,
+ secondary_index, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+ }
+
+ return n;
+
+out:
+ put_cpu_var(hv_gpci_reqb);
+ return ret;
+}
+
static DEVICE_ATTR_RO(kernel_version);
static DEVICE_ATTR_RO(cpumask);
@@ -329,6 +398,11 @@ static struct attribute *interface_attrs[] = {
* attribute, set in init function if applicable.
*/
NULL,
+ /*
+* This NULL is a placeholder for the
affinity_domain_via_virtual_processor
+* attribute, set in init function if applicable.
+*/
+ NULL,
NULL,
};
@@ -561,6 +635,10 @@ static void sysinfo_device_attr_create(int
sysinfo_interface_group_index)
attr->attr.name = "processor_config";
attr->show = processor_config_show;
break;
+
[PATCH 04/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_config sysfs interface file
Add details of the new hv-gpci interface file called "processor_config" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 15 +++ 1 file changed, 15 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 6d633167268e..003d94afbbcd 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -109,3 +109,18 @@ Description: admin read only more information. * "-EFBIG" : System information exceeds PAGE_SIZE. + +What: /sys/devices/hv_gpci/interface/processor_config +Date: June 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + PROCESSOR_CONFIG(0x90). + * This sysfs file is only be created for power10 and above platforms. + * User need root access to read data from this sysfs file. + * Incase the HCALL fails with hardware/permission issue, or the support for + PROCESSOR_CONFIG counter request value removed, this sysfs file still be + created and give error when reading it. + * The end user reading this sysfs file need to decode sysfs file data as per + underneath platform/firmware. -- 2.35.3
[PATCH 03/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor config information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
PROCESSOR_CONFIG(0X90), can be used to get the system
processor configuration information. To expose the system
processor config information, patch adds sysfs file called
"processor_config" to the "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver.
Add macro for PROCESSOR_CONFIG counter request value in hv-gpci.h file.
Also add a new function called "sysinfo_device_attr_create",
which will create and add required device attribute to the
interface_attrs array.
The processor_config sysfs file is only available for power10
and above platforms. Add a new macro called
INTERFACE_PROCESSOR_CONFIG_ATTR, which points to the index of
NULL placefolder, for processor_config attribute in the interface_attrs
array. Also add macro INTERFACE_NULL_ATTR which points to index of NULL
attribute in interface_attrs array.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 110 +---
arch/powerpc/perf/hv-gpci.h | 5 +-
2 files changed, 107 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index bca24725699e..c9fe74373e5f 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -237,6 +237,72 @@ static ssize_t processor_bus_topology_show(struct device
*dev, struct device_att
return ret;
}
+static ssize_t processor_config_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request value 0x90 corresponds to request
+* type 'Processor_config', to retrieve
+* the system processor information.
+* starting_index value implies the starting hardware
+* processor index.
+*/
+ ret = systeminfo_gpci_request(PROCESSOR_CONFIG, 0, 0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL', which
+* implies that buffer can't accommodate all information, and a partial
buffer
+* returned. To handle that, we need to take subsequent requests
+* with next starting index to retrieve additional (missing) data.
+* Below loop do subsequent hcalls with next starting index and add it
+* to buffer util we get all the information.
+*/
+ while (ret == H_PARAMETER) {
+ int returned_values = be16_to_cpu(arg->params.returned_values);
+ int elementsize = be16_to_cpu(arg->params.cv_element_size);
+ int last_element = (returned_values - 1) * elementsize;
+
+ /*
+* Since the starting index is part of counter_value
+* buffer elements, use the starting index value in the last
+* element and add 1 to subsequent hcalls.
+*/
+ u32 starting_index = arg->bytes[last_element + 3] +
+ (arg->bytes[last_element + 2] << 8) +
+ (arg->bytes[last_element + 1] << 16) +
+ (arg->bytes[last_element] << 24) + 1;
+
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ ret = systeminfo_gpci_request(PROCESSOR_CONFIG, starting_index,
0, buf, , arg);
+
+ if (!ret)
+ return n;
+
+ if (ret != H_PARAMETER)
+ goto out;
+ }
+
+ return n;
+
+out:
+ put_cpu_var(hv_gpci_reqb);
+ return ret;
+}
+
static DEVICE_ATTR_RO(kernel_version);
static DEVICE_ATTR_RO(cpumask);
@@ -258,6 +324,11 @@ static struct attribute *interface_attrs[] = {
* attribute, set in init function if applicable.
*/
NULL,
+ /*
+* This NULL is a placeholder for the processor_config
+* attribute, set in init function if applicable.
+*/
+ NULL,
NULL,
};
@@ -463,21 +534,46 @@ static int hv_gpci_cpu_hotplug_init(void)
ppc_hv_gpci_cpu_offline);
}
-static void add_sysinfo_interface_files(void)
+static void sysinfo_device_attr_create(int sysinfo_interface_group_index)
{
- struct device_attribute *attr = kzalloc(sizeof(*attr), GFP_KERNEL);
+ struct device_attribute *attr;
+ if (sysinfo_interface_group_index <
INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR ||
+ sysinfo_interface_group_index >= INTERFACE_NULL_ATTR) {
+ pr_info("Wrong interface group index for system information\n");
+ return;
+ }
+
+ attr = kzallo
[PATCH 02/10] docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_bus_topology sysfs interface file
Add details of the new hv-gpci interface file called "processor_bus_topology" in the ABI documentation. Signed-off-by: Kajol Jain --- .../sysfs-bus-event_source-devices-hv_gpci| 29 +++ 1 file changed, 29 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 12e2bf92783f..6d633167268e 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -80,3 +80,32 @@ Contact: Linux on PowerPC Developer List Description: read only This sysfs file exposes the cpumask which is designated to make HCALLs to retrieve hv-gpci pmu event counter data. + +What: /sys/devices/hv_gpci/interface/processor_bus_topology +Date: June 2023 +Contact: Linux on PowerPC Developer List +Description: admin read only + This sysfs file exposes the system topology information by making HCALL + H_GET_PERF_COUNTER_INFO. The HCALL is made with counter request value + PROCESSOR_BUS_TOPOLOGY(0xD0). + * This sysfs file is only be created for power10 and above platforms. + * User need root access to read data from this sysfs file. + * Incase the HCALL fails with hardware/permission issue, or the support for + PROCESSOR_BUS_TOPOLOGY counter request value removed, this sysfs file still be + created and give error when reading it. + * The end user reading this sysfs file need to decode sysfs file data as per + underneath platform/firmware. + + Possible error codes while reading this sysfs file: + + * "-EPERM" : Partition is not permitted to retrieve performance information, + required to set "Enable Performance Information Collection" option. + + * "-EOPNOTSUPP" : Requested system information is not available for the firmware + level and platform. + + * "-EIO" : Can't retrieve system information because of invalid buffer length/invalid address + or because of some hardware error. Refer getPerfCountInfo documentation for + more information. + + * "-EFBIG" : System information exceeds PAGE_SIZE. -- 2.35.3
[PATCH 00/10] Add sysfs interface files to hv_gpci device to expose system information
The hcall H_GET_PERF_COUNTER_INFO can be used to get data related to chips, dimms and system topology, by passing different counter request values. Patchset adds sysfs files to "/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver, which will expose system topology information using H_GET_PERF_COUNTER_INFO hcall. The added sysfs files are available for power10 and above platforms and needs root access to read the data. Patches 1,3,5,7,9 adds sysfs interface files to the hv_gpci pmu driver, to get system topology information. List of added sysfs files: -> processor_bus_topology (Counter request value : 0xD0) -> processor_config (Counter request value : 0x90) -> affinity_domain_via_virtual_processor (Counter request value : 0xA0) -> affinity_domain_via_domain (Counter request value : 0xB0) -> affinity_domain_via_partition (Counter request value : 0xB1) Patches 2,4,6,8,10 adds details of the newly added hv_gpci interface files listed above in the ABI documentation. Kajol Jain (10): powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor bus topology information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_bus_topology sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor config information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document processor_config sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via virtual processor information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_virtual_processor sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via domain information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_domain sysfs interface file powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show affinity domain via partition information docs: ABI: sysfs-bus-event_source-devices-hv_gpci: Document affinity_domain_via_partition sysfs interface file .../sysfs-bus-event_source-devices-hv_gpci| 89 +++ arch/powerpc/perf/hv-gpci.c | 584 +- arch/powerpc/perf/hv-gpci.h | 15 + 3 files changed, 686 insertions(+), 2 deletions(-) -- 2.35.3
[PATCH 01/10] powerpc/hv_gpci: Add sysfs file inside hv_gpci device to show processor bus topology information
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
PROCESSOR_BUS_TOPOLOGY(0XD0), can be used to get the system
topology information. To expose the system topology information,
patch adds sysfs file called "processor_bus_topology" to the
"/sys/devices/hv_gpci/interface/" of hv_gpci pmu driver.
Add macro for PROCESSOR_BUS_TOPOLOGY counter request value
in hv-gpci.h file. Also add a new function called
"systeminfo_gpci_request", to make the H_GET_PERF_COUNTER_INFO hcall
with added macro, and populates the output buffer.
The processor_bus_topology sysfs file is only available for power10
and above platforms. Add a new function called
"add_sysinfo_interface_files", which will add processor_bus_topology
attribute in the interface_attrs array, only for power10 and
above platforms.
Also add macro INTERFACE_PROCESSOR_BUS_TOPOLOGY_ATTR in hv-gpci.h
file, which points to the index of NULL placefolder, for
processor_bus_topology attribute.
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci.c | 163 +++-
arch/powerpc/perf/hv-gpci.h | 6 ++
2 files changed, 167 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 7ff8ff3509f5..bca24725699e 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -102,6 +102,141 @@ static ssize_t cpumask_show(struct device *dev,
return cpumap_print_to_pagebuf(true, buf, _gpci_cpumask);
}
+static DEFINE_PER_CPU(char, hv_gpci_reqb[HGPCI_REQ_BUFFER_SIZE])
__aligned(sizeof(uint64_t));
+
+static unsigned long systeminfo_gpci_request(u32 req, u32 starting_index,
+ u16 secondary_index, char *buf,
+ size_t *n, struct hv_gpci_request_buffer *arg)
+{
+ unsigned long ret;
+ size_t i, j;
+
+ arg->params.counter_request = cpu_to_be32(req);
+ arg->params.starting_index = cpu_to_be32(starting_index);
+ arg->params.secondary_index = cpu_to_be16(secondary_index);
+
+ ret = plpar_hcall_norets(H_GET_PERF_COUNTER_INFO,
+ virt_to_phys(arg), HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* ret value as 'H_PARAMETER' corresponds to 'GEN_BUF_TOO_SMALL',
+* which means that the current buffer size cannot accommodate
+* all the information and a partial buffer returned.
+* hcall fails incase of ret value other than H_SUCCESS or H_PARAMETER.
+*
+* ret value as H_AUTHORITY implies that partition is not permitted to
retrieve
+* performance information, and required to set
+* "Enable Performance Information Collection" option.
+*/
+ if (ret == H_AUTHORITY)
+ return -EPERM;
+
+ /*
+* ret value as H_NOT_AVAILABLE implies that requested system
information is
+* not available for the firmware level and platform.
+*/
+ if (ret == H_NOT_AVAILABLE)
+ return -EOPNOTSUPP;
+
+ /*
+* hcall can fail with other possible ret value like
H_PRIVILEGE/H_HARDWARE
+* because of invalid buffer-length/address or due to some hardware
+* error.
+*/
+ if (ret && (ret != H_PARAMETER))
+ return -EIO;
+
+ /*
+* hcall H_GET_PERF_COUNTER_INFO populates the 'returned_values'
+* to show the total number of counter_value array elements
+* returned via hcall.
+* hcall also populates 'cv_element_size' corresponds to individual
+* counter_value array element size. Below loop go through all
+* counter_value array elements as per their size and add it to
+* the output buffer.
+*/
+ for (i = 0; i < be16_to_cpu(arg->params.returned_values); i++) {
+ j = i * be16_to_cpu(arg->params.cv_element_size);
+
+ for (; j < (i + 1) * be16_to_cpu(arg->params.cv_element_size);
j++)
+ *n += sprintf(buf + *n, "%02x", (u8)arg->bytes[j]);
+ *n += sprintf(buf + *n, "\n");
+ }
+
+ if (*n >= PAGE_SIZE) {
+ pr_info("System information exceeds PAGE_SIZE\n");
+ return -EFBIG;
+ }
+
+ return ret;
+}
+
+static ssize_t processor_bus_topology_show(struct device *dev, struct
device_attribute *attr,
+ char *buf)
+{
+ struct hv_gpci_request_buffer *arg;
+ unsigned long ret;
+ size_t n = 0;
+
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* Pass the counter request value 0xD0 corresponds to request
+* type 'Processor_bus_topology', to retrieve
+* the system topology information.
+* starting_index value implies the starting hardware
+* chip id.
+*/
+ ret = systeminfo_gpci_request(PROC
[PATCH] perf vendor events power9: Remove UTF-8 characters from json files
Commit 3c22ba524304 ("perf vendor events powerpc: Update POWER9 events")
added and updated power9 pmu json events. However some of the json
events which are part of other.json and pipeline.json files,
contains UTF-8 characters in their brief description.
Having UTF-8 character could brakes the perf build on some distros.
Fix this issue by removing the UTF-8 characters from other.json and
pipeline.json files.
Result without the fix patch:
[command]# file -i pmu-events/arch/powerpc/power9/*
pmu-events/arch/powerpc/power9/cache.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/floating-point.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/frontend.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/marked.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/memory.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/metrics.json:application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/nest_metrics.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/other.json: application/json;
charset=utf-8
pmu-events/arch/powerpc/power9/pipeline.json: application/json;
charset=utf-8
pmu-events/arch/powerpc/power9/pmc.json:application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/translation.json:application/json;
charset=us-ascii
Result with the fix patch:
[command]# file -i pmu-events/arch/powerpc/power9/*
pmu-events/arch/powerpc/power9/cache.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/floating-point.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/frontend.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/marked.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/memory.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/metrics.json:application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/nest_metrics.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/other.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/pipeline.json: application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/pmc.json:application/json;
charset=us-ascii
pmu-events/arch/powerpc/power9/translation.json:application/json;
charset=us-ascii
Fixes: 3c22ba524304 ("perf vendor events powerpc: Update POWER9 events")
Reported-by: Arnaldo Carvalho de Melo
Link: https://lore.kernel.org/lkml/zbxp77deq7ikt...@kernel.org/
Signed-off-by: Kajol Jain
---
tools/perf/pmu-events/arch/powerpc/power9/other.json| 4 ++--
tools/perf/pmu-events/arch/powerpc/power9/pipeline.json | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/perf/pmu-events/arch/powerpc/power9/other.json
b/tools/perf/pmu-events/arch/powerpc/power9/other.json
index 3f69422c21f9..f10bd554521a 100644
--- a/tools/perf/pmu-events/arch/powerpc/power9/other.json
+++ b/tools/perf/pmu-events/arch/powerpc/power9/other.json
@@ -1417,7 +1417,7 @@
{
"EventCode": "0x45054",
"EventName": "PM_FMA_CMPL",
-"BriefDescription": "two flops operation completed (fmadd, fnmadd, fmsub,
fnmsub) Scalar instructions only. "
+"BriefDescription": "two flops operation completed (fmadd, fnmadd, fmsub,
fnmsub) Scalar instructions only."
},
{
"EventCode": "0x201E8",
@@ -2017,7 +2017,7 @@
{
"EventCode": "0xC0BC",
"EventName": "PM_LSU_FLUSH_OTHER",
-"BriefDescription": "Other LSU flushes including: Sync (sync ack from L2
caused search of LRQ for oldest snooped load, This will either signal a Precise
Flush of the oldest snooped loa or a Flush Next PPC); Data Valid Flush Next
(several cases of this, one example is store and reload are lined up such that
a store-hit-reload scenario exists and the CDF has already launched and has
gotten bad/stale data); Bad Data Valid Flush Next (might be a few cases of
this, one example is a larxa (D$ hit) return data and dval but can't allocate
to LMQ (LMQ full or other reason). Already gave dval but can't watch it for
snoop_hit_larx. Need to take the “bad dval” back and flush all younger ops)"
+"BriefDescription": "Other LSU flushes including: Sync (sync ack from L2
caused search of LRQ for oldest snooped load, This will either signal a Precise
Flush of the oldest snooped loa or a Flush Next PPC); Data Valid Flush Next
(several cases of this, one example is store and reload are lined up such that
a store-hit-reload scenario exists and the CDF has already launched and has
gotten bad/stale data); Bad Data Valid Flush Next (might be a few cases of
[PATCH 2/2] selftests/powerpc/pmu: fix including of utils.h when event.h is included
From: Madhavan Srinivasan event.h header already includes utlis.h. Avoid including the same explicitly in the code when event.h included. Signed-off-by: Madhavan Srinivasan --- tools/testing/selftests/powerpc/pmu/count_instructions.c | 1 - tools/testing/selftests/powerpc/pmu/count_stcx_fail.c| 1 - .../powerpc/pmu/event_code_tests/group_constraint_cache_test.c | 1 - .../pmu/event_code_tests/group_constraint_l2l3_sel_test.c| 1 - .../pmu/event_code_tests/group_constraint_thresh_cmp_test.c | 1 - .../pmu/event_code_tests/group_constraint_thresh_ctl_test.c | 1 - .../pmu/event_code_tests/group_constraint_thresh_sel_test.c | 1 - .../powerpc/pmu/event_code_tests/group_constraint_unit_test.c| 1 - .../powerpc/pmu/event_code_tests/hw_cache_event_type_test.c | 1 - tools/testing/selftests/powerpc/pmu/l3_bank_test.c | 1 - tools/testing/selftests/powerpc/pmu/per_event_excludes.c | 1 - .../selftests/powerpc/pmu/sampling_tests/bhrb_filter_map_test.c | 1 - .../powerpc/pmu/sampling_tests/bhrb_no_crash_wo_pmu_test.c | 1 - .../powerpc/pmu/sampling_tests/intr_regs_no_crash_wo_pmu_test.c | 1 - .../selftests/powerpc/pmu/sampling_tests/mmcr0_cc56run_test.c| 1 - .../powerpc/pmu/sampling_tests/mmcr0_exceptionbits_test.c| 1 - .../powerpc/pmu/sampling_tests/mmcr0_fc56_pmc1ce_test.c | 1 - .../selftests/powerpc/pmu/sampling_tests/mmcr0_fc56_pmc56_test.c | 1 - .../selftests/powerpc/pmu/sampling_tests/mmcr0_pmccext_test.c| 1 - .../selftests/powerpc/pmu/sampling_tests/mmcr0_pmcjce_test.c | 1 - .../selftests/powerpc/pmu/sampling_tests/mmcr1_comb_test.c | 1 - .../powerpc/pmu/sampling_tests/mmcr1_sel_unit_cache_test.c | 1 - .../selftests/powerpc/pmu/sampling_tests/mmcr2_fcs_fch_test.c| 1 - .../selftests/powerpc/pmu/sampling_tests/mmcr2_l2l3_test.c | 1 - .../selftests/powerpc/pmu/sampling_tests/mmcr3_src_test.c| 1 - .../selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_any_test.c | 1 - .../selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_cond_test.c | 1 - .../pmu/sampling_tests/mmcra_bhrb_disable_no_branch_test.c | 1 - .../powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c | 1 - .../powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c| 1 - .../selftests/powerpc/pmu/sampling_tests/mmcra_thresh_cmp_test.c | 1 - .../powerpc/pmu/sampling_tests/mmcra_thresh_marked_sample_test.c | 1 - 32 files changed, 32 deletions(-) diff --git a/tools/testing/selftests/powerpc/pmu/count_instructions.c b/tools/testing/selftests/powerpc/pmu/count_instructions.c index a3984ef1e96a..a0f77065a1e0 100644 --- a/tools/testing/selftests/powerpc/pmu/count_instructions.c +++ b/tools/testing/selftests/powerpc/pmu/count_instructions.c @@ -11,7 +11,6 @@ #include #include "event.h" -#include "utils.h" #include "lib.h" extern void thirty_two_instruction_loop(u64 loops); diff --git a/tools/testing/selftests/powerpc/pmu/count_stcx_fail.c b/tools/testing/selftests/powerpc/pmu/count_stcx_fail.c index 2070a1e2b3a5..07ddac28d3cf 100644 --- a/tools/testing/selftests/powerpc/pmu/count_stcx_fail.c +++ b/tools/testing/selftests/powerpc/pmu/count_stcx_fail.c @@ -11,7 +11,6 @@ #include #include "event.h" -#include "utils.h" #include "lib.h" extern void thirty_two_instruction_loop_with_ll_sc(u64 loops, u64 *ll_sc_target); diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c index f4be05aa3a3d..ad529b8a03ba 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c @@ -7,7 +7,6 @@ #include #include "../event.h" -#include "utils.h" #include "../sampling_tests/misc.h" /* All L1 D cache load references counted at finish, gated by reject */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c index 85a636886069..b2fa5fc54545 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c @@ -7,7 +7,6 @@ #include #include "../event.h" -#include "utils.h" #include "../sampling_tests/misc.h" /* All successful D-side store dispatches for this thread */ diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c index 9f1197104e8c..d77a730e00df 100644 --- a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c +++
[PATCH 1/2] selftests/powerpc/pmu: Fix sample field check in the mmcra_thresh_marked_sample_test
The testcase verifies the setting of different fields in Monitor Mode
Control Register A (MMCRA). In the current code, EV_CODE_EXTRACT macro
is used to extract the "sample" field, which then needs to be further
processed to fetch rand_samp_elig and rand_samp_mode bits. But the
current code is not passing valid sample field to EV_CODE_EXTRACT
macro. Patch addresses this by fixing the input for EV_CODE_EXTRACT.
Fixes: 29cf373c5766 ("selftests/powerpc/pmu: Add interface test for mmcra
register fields")
Reported-by: David Binderman
Signed-off-by: Kajol Jain
---
.../pmu/sampling_tests/mmcra_thresh_marked_sample_test.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_thresh_marked_sample_test.c
b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_thresh_marked_sample_test.c
index 022cc1655eb5..75527876ad3c 100644
---
a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_thresh_marked_sample_test.c
+++
b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_thresh_marked_sample_test.c
@@ -63,9 +63,9 @@ static int mmcra_thresh_marked_sample(void)
get_mmcra_thd_stop(get_reg_value(intr_regs, "MMCRA"),
4));
FAIL_IF(EV_CODE_EXTRACT(event.attr.config, marked) !=
get_mmcra_marked(get_reg_value(intr_regs, "MMCRA"), 4));
- FAIL_IF(EV_CODE_EXTRACT(event.attr.config, sample >> 2) !=
+ FAIL_IF((EV_CODE_EXTRACT(event.attr.config, sample) >> 2) !=
get_mmcra_rand_samp_elig(get_reg_value(intr_regs,
"MMCRA"), 4));
- FAIL_IF(EV_CODE_EXTRACT(event.attr.config, sample & 0x3) !=
+ FAIL_IF((EV_CODE_EXTRACT(event.attr.config, sample) & 0x3) !=
get_mmcra_sample_mode(get_reg_value(intr_regs,
"MMCRA"), 4));
FAIL_IF(EV_CODE_EXTRACT(event.attr.config, sm) !=
get_mmcra_sm(get_reg_value(intr_regs, "MMCRA"), 4));
--
2.39.1
[PATCH v2] tools/perf/tests: Change true workload to sleep workload in all metric test for system wide check
Testcase stat_all_metrics.sh fails in powerpc:
98: perf all metrics test : FAILED!
Logs with verbose:
[command]# ./perf test 98 -vv
98: perf all metrics test :
--- start ---
test child forked, pid 13262
Testing BRU_STALL_CPI
Testing COMPLETION_STALL_CPI
Testing TOTAL_LOCAL_NODE_PUMPS_P23
Metric 'TOTAL_LOCAL_NODE_PUMPS_P23' not printed in:
Error:
Invalid event (hv_24x7/PM_PB_LNS_PUMP23,chip=3/) in per-thread mode, enable
system wide with '-a'.
Testing TOTAL_LOCAL_NODE_PUMPS_RETRIES_P01
Metric 'TOTAL_LOCAL_NODE_PUMPS_RETRIES_P01' not printed in:
Error:
Invalid event (hv_24x7/PM_PB_RTY_LNS_PUMP01,chip=3/) in per-thread mode, enable
system wide with '-a'.
Based on above logs, we could see some of the hv-24x7 metric events fails,
and logs suggest to run the metric event with -a option.
This change happened after the commit a4b8cfcabb1d ("perf stat: Delay metric
parsing"), which delayed the metric parsing phase and now before metric parsing
phase perf tool identifies, whether target is system-wide or not. With this
change, perf_event_open will fails with workload monitoring for uncore events
as expected.
The perf all metric test case fails as some of the hv-24x7 metric events
may need bigger workload with system wide monitoring to get the data.
Fix this issue by changing current system wide check from true workload to
sleep 0.01 workload.
Result with the patch changes in powerpc:
98: perf all metrics test : Ok
Reviewed-by: Athira Rajeev
Tested-by: Disha Goel
Suggested-by: Ian Rogers
Signed-off-by: Kajol Jain
---
Changelog:
v1->v2:
- Addressed review comments from Ian, by changing true workload
to sleep workload in "perf all metric test". Rather then adding
new system wide check with perf bench workload.
- Added Reviewed-by, Tested-by and Suggested-by tags.
tools/perf/tests/shell/stat_all_metrics.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/perf/tests/shell/stat_all_metrics.sh
b/tools/perf/tests/shell/stat_all_metrics.sh
index 6e79349e42be..22e9cb294b40 100755
--- a/tools/perf/tests/shell/stat_all_metrics.sh
+++ b/tools/perf/tests/shell/stat_all_metrics.sh
@@ -11,7 +11,7 @@ for m in $(perf list --raw-dump metrics); do
continue
fi
# Failed so try system wide.
- result=$(perf stat -M "$m" -a true 2>&1)
+ result=$(perf stat -M "$m" -a sleep 0.01 2>&1)
if [[ "$result" =~ "${m:0:50}" ]]
then
continue
--
2.39.1
[PATCH] tools/perf/tests: Add system wide check for perf bench workload in all metric test
Testcase stat_all_metrics.sh fails in powerpc:
92: perf all metrics test : FAILED!
Logs with verbose:
[command]# ./perf test 92 -vv
92: perf all metrics test :
--- start ---
test child forked, pid 13262
Testing BRU_STALL_CPI
Testing COMPLETION_STALL_CPI
Testing TOTAL_LOCAL_NODE_PUMPS_P23
Metric 'TOTAL_LOCAL_NODE_PUMPS_P23' not printed in:
Error:
Invalid event (hv_24x7/PM_PB_LNS_PUMP23,chip=3/) in per-thread mode, enable
system wide with '-a'.
Testing TOTAL_LOCAL_NODE_PUMPS_RETRIES_P01
Metric 'TOTAL_LOCAL_NODE_PUMPS_RETRIES_P01' not printed in:
Error:
Invalid event (hv_24x7/PM_PB_RTY_LNS_PUMP01,chip=3/) in per-thread mode, enable
system wide with '-a'.
Based on above logs, we could see some of the hv-24x7 metric events fails,
and logs suggest to run the metric event with -a option.
This change happened after the commit a4b8cfcabb1d ("perf stat: Delay metric
parsing"), which delayed the metric parsing phase and now before metric parsing
phase perf tool identifies, whether target is system-wide or not. With this
change, perf_event_open will fails with workload monitoring for uncore events
as expected.
The perf all metric test case fails as some of the hv-24x7 metric events
may need bigger workload to get the data. And the added perf bench
workload in 'perf all metric test case' will not run for hv-24x7 without
-a option.
Fix this issue by adding system wide check for perf bench workload.
Result with the patch changes in powerpc:
92: perf all metrics test : Ok
Signed-off-by: Kajol Jain
---
tools/perf/tests/shell/stat_all_metrics.sh | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tools/perf/tests/shell/stat_all_metrics.sh
b/tools/perf/tests/shell/stat_all_metrics.sh
index 6e79349e42be..d49832a316d9 100755
--- a/tools/perf/tests/shell/stat_all_metrics.sh
+++ b/tools/perf/tests/shell/stat_all_metrics.sh
@@ -23,6 +23,13 @@ for m in $(perf list --raw-dump metrics); do
then
continue
fi
+ # Failed again, possibly the event is uncore pmu event which will need
+ # system wide monitoring with workload, so retry with -a option
+ result=$(perf stat -M "$m" -a perf bench internals synthesize 2>&1)
+ if [[ "$result" =~ "${m:0:50}" ]]
+ then
+continue
+ fi
echo "Metric '$m' not printed in:"
echo "$result"
if [[ "$err" != "1" ]]
--
2.39.0
[PATCH] powerpc/hv-24x7: Fix pvr check when setting interface version
Commit ec3eb9d941a9 ("powerpc/perf: Use PVR rather than
oprofile field to determine CPU version") added usage
of pvr value instead of oprofile field to determine the
platform. In hv-24x7 pmu driver code, pvr check uses PVR_POWER8
when assigning the interface version for power8 platform.
But power8 can also have other pvr values like PVR_POWER8E and
PVR_POWER8NVL. Hence the interface version won't be set
properly incase of PVR_POWER8E and PVR_POWER8NVL.
Fix this issue by adding the checks for PVR_POWER8E and
PVR_POWER8NVL as well.
Fixes: ec3eb9d941a9 ("powerpc/perf: Use PVR rather than oprofile field to
determine CPU version")
Reported-by: Sachin Sant
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-24x7.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/hv-24x7.c b/arch/powerpc/perf/hv-24x7.c
index 33c23225fd54..8c3253df133d 100644
--- a/arch/powerpc/perf/hv-24x7.c
+++ b/arch/powerpc/perf/hv-24x7.c
@@ -1727,7 +1727,8 @@ static int hv_24x7_init(void)
}
/* POWER8 only supports v1, while POWER9 only supports v2. */
- if (PVR_VER(pvr) == PVR_POWER8)
+ if (PVR_VER(pvr) == PVR_POWER8 || PVR_VER(pvr) == PVR_POWER8E ||
+ PVR_VER(pvr) == PVR_POWER8NVL)
interface_version = 1;
else {
interface_version = 2;
--
2.39.0
[PATCH] powerpc/imc-pmu: Fix IMC PMU code of using mutex in IRQs disabled section
Current imc-pmu code triggers a WARNING with CONFIG_DEBUG_ATOMIC_SLEEP and
CONFIG_PROVE_LOCKING enabled, while running a thread_imc event.
Command to trigger the warning:
[command]# perf stat -e thread_imc/CPM_CS_FROM_L4_MEM_X_DPTEG/ sleep 5
Performance counter stats for 'sleep 5':
0 thread_imc/CPM_CS_FROM_L4_MEM_X_DPTEG/
5.002117947 seconds time elapsed
0.000131000 seconds user
0.001063000 seconds sys
Below is snippet of the warning in dmesg:
[ 196.520838] BUG: sleeping function called from invalid context at
kernel/locking/mutex.c:580
[ 196.521126] in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 2869,
name: perf-exec
[ 196.521136] preempt_count: 2, expected: 0
[ 196.521143] 4 locks held by perf-exec/2869:
[ 196.521151] #0: c0004325c540 (>cred_guard_mutex){+.+.}-{3:3}, at:
bprm_execve+0x64/0xa90
[ 196.521173] #1: c0004325c5d8 (>exec_update_lock){}-{3:3}, at:
begin_new_exec+0x460/0xef0
[ 196.521192] #2: c003fa99d4e0 (_lock){-...}-{2:2}, at:
perf_event_exec+0x290/0x510
[ 196.521212] #3: c00017ab8418 (>lock){}-{2:2}, at:
perf_event_exec+0x29c/0x510
[ 196.521230] irq event stamp: 4806
[ 196.521237] hardirqs last enabled at (4805): []
_raw_spin_unlock_irqrestore+0x94/0xd0
[ 196.521248] hardirqs last disabled at (4806): []
perf_event_exec+0x394/0x510
[ 196.521260] softirqs last enabled at (0): []
copy_process+0xc34/0x1ff0
[ 196.521270] softirqs last disabled at (0): [<>] 0x0
[ 196.521281] CPU: 36 PID: 2869 Comm: perf-exec Not tainted
6.2.0-rc2-00011-g1247637727f2 #61
[ 196.521291] Hardware name: 8375-42A POWER9 0x4e1202 opal:v7.0-16-g9b85f7d961
PowerNV
[ 196.521300] Call Trace:
[ 196.521306] [c0004d213560] [c0f20c74] dump_stack_lvl+0x98/0xe0
(unreliable)
[ 196.521321] [c0004d2135a0] [c0194968] __might_resched+0x2f8/0x310
[ 196.521332] [c0004d213620] [c0f5a5dc] __mutex_lock+0x6c/0x13f0
[ 196.521344] [c0004d213740] [c0127a44]
thread_imc_event_add+0xf4/0x1b0
[ 196.521357] [c0004d2137c0] [c03ec930] event_sched_in+0xe0/0x210
[ 196.521369] [c0004d213810] [c03ed940] merge_sched_in+0x1f0/0x600
[ 196.521380] [c0004d213860] [c03ee00c]
visit_groups_merge.isra.92.constprop.166+0x2bc/0x6c0
[ 196.521393] [c0004d213920] [c03ee4dc]
ctx_flexible_sched_in+0xcc/0x140
[ 196.521405] [c0004d213980] [c03ee75c] ctx_sched_in+0x20c/0x2a0
[ 196.521416] [c0004d2139f0] [c03ee974] ctx_resched+0x104/0x1c0
[ 196.521427] [c0004d213a50] [c03fadf0] perf_event_exec+0x340/0x510
[ 196.521440] [c0004d213ac0] [c054a570] begin_new_exec+0x730/0xef0
[ 196.521451] [c0004d213b70] [c05dd7f8]
load_elf_binary+0x3f8/0x1e10
---
[ 196.522551] do not call blocking ops when !TASK_RUNNING; state=2001 set at
[<fd63e7cf>] do_nanosleep+0x60/0x1a0
[ 196.522566] WARNING: CPU: 36 PID: 2869 at kernel/sched/core.c:9912
__might_sleep+0x9c/0xb0
[ 196.522575] Modules linked in: kvm_hv kvm vmx_crypto leds_powernv
powernv_op_panel led_class gf128mul crc32c_vpmsum fuse autofs4
[ 196.522594] CPU: 36 PID: 2869 Comm: sleep Tainted: GW
6.2.0-rc2-00011-g1247637727f2 #61
[ 196.522602] Hardware name: 8375-42A POWER9 0x4e1202 opal:v7.0-16-g9b85f7d961
PowerNV
[ 196.522609] NIP: c0194a1c LR: c0194a18 CTR: c0a78670
[ 196.522616] REGS: c0004d2134e0 TRAP: 0700 Tainted: GW
(6.2.0-rc2-00011-g1247637727f2)
[ 196.522624] MSR: 90021033 CR: 48002824
XER:
[ 196.522639] CFAR: c013fb64 IRQMASK: 1
[ 196.522639] GPR00: c0194a18 c0004d213780 c13c1700
006b
[ 196.522639] GPR04: fffe c0004d213540 c0004d213538
0027
---
The above warning triggered because current imc-pmu code uses mutex lock in
interrupt disabled sections. The function mutex_lock internally calls
"__might_resched" function, which will check if irq is disabled or not and
incase irq is disabled, it will trigger the warning. Patch fix this issue
by changing the mutex lock to spinlock.
Fixes: 8f95faaac56c ("powerpc/powernv: Detect and create IMC device")
Suggested-by: Michael Ellerman
Signed-off-by: Kajol Jain
---
arch/powerpc/include/asm/imc-pmu.h | 2 +-
arch/powerpc/perf/imc-pmu.c| 109 +++--
2 files changed, 56 insertions(+), 55 deletions(-)
diff --git a/arch/powerpc/include/asm/imc-pmu.h
b/arch/powerpc/include/asm/imc-pmu.h
index 4f897993b710..699a88584ae1 100644
--- a/arch/powerpc/include/asm/imc-pmu.h
+++ b/arch/powerpc/include/asm/imc-pmu.h
@@ -137,7 +137,7 @@ struct imc_pmu {
* are inited.
*/
struct imc_pmu_ref {
- struct mutex lock;
+ spinlock_t lock;
unsigned int id;
int refc;
};
diff -
[PATCH v3] powerpc/hv-gpci: Fix hv_gpci event list
Based on getPerfCountInfo v1.018 documentation, some of the
hv_gpci events were deprecated for platform firmware that
supports counter_info_version 0x8 or above.
Fix the hv_gpci event list by adding a new attribute group
called "hv_gpci_event_attrs_v6" and a "ENABLE_EVENTS_COUNTERINFO_V6"
macro to enable these events for platform firmware
that supports counter_info_version 0x6 or below. And assigning
the hv_gpci event list based on output counter info version
of underlying plaform.
Fixes: 97bf2640184f ("powerpc/perf/hv-gpci: add the remaining gpci requests")
Signed-off-by: Kajol Jain
Reviewed-by: Madhavan Srinivasan
Reviewed-by: Athira Rajeev
---
Changelog:
v2 -> v3
- Make nit commit/comment changes and changed the name of macro as
suggested by Michael Ellerman
- Add reviewed by tag
- Add information about not having counter_info_version 0x7 in comment
to avoid off-by-one error confusion as suggested by Michael Ellerman
v1 -> v2
- As suggested by Michael Ellerman, using counter_info_version value
rather then cpu_has_feature() to assign hv-gpci event list.
arch/powerpc/perf/hv-gpci-requests.h | 4
arch/powerpc/perf/hv-gpci.c | 35 ++--
arch/powerpc/perf/hv-gpci.h | 1 +
arch/powerpc/perf/req-gen/perf.h | 20
4 files changed, 58 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci-requests.h
b/arch/powerpc/perf/hv-gpci-requests.h
index 8965b4463d43..5e86371a20c7 100644
--- a/arch/powerpc/perf/hv-gpci-requests.h
+++ b/arch/powerpc/perf/hv-gpci-requests.h
@@ -79,6 +79,7 @@ REQUEST(__field(0,8, partition_id)
)
#include I(REQUEST_END)
+#ifdef ENABLE_EVENTS_COUNTERINFO_V6
/*
* Not available for counter_info_version >= 0x8, use
* run_instruction_cycles_by_partition(0x100) instead.
@@ -92,6 +93,7 @@ REQUEST(__field(0,8, partition_id)
__count(0x10, 8, cycles)
)
#include I(REQUEST_END)
+#endif
#define REQUEST_NAME system_performance_capabilities
#define REQUEST_NUM 0x40
@@ -103,6 +105,7 @@ REQUEST(__field(0, 1, perf_collect_privileged)
)
#include I(REQUEST_END)
+#ifdef ENABLE_EVENTS_COUNTERINFO_V6
#define REQUEST_NAME processor_bus_utilization_abc_links
#define REQUEST_NUM 0x50
#define REQUEST_IDX_KIND "hw_chip_id=?"
@@ -194,6 +197,7 @@ REQUEST(__field(0, 4, phys_processor_idx)
__count(0x28, 8, instructions_completed)
)
#include I(REQUEST_END)
+#endif
/* Processor_core_power_mode (0x95) skipped, no counters */
/* Affinity_domain_information_by_virtual_processor (0xA0) skipped,
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 5eb60ed5b5e8..7ff8ff3509f5 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -70,9 +70,9 @@ static const struct attribute_group format_group = {
.attrs = format_attrs,
};
-static const struct attribute_group event_group = {
+static struct attribute_group event_group = {
.name = "events",
- .attrs = hv_gpci_event_attrs,
+ /* .attrs is set in init */
};
#define HV_CAPS_ATTR(_name, _format) \
@@ -330,6 +330,7 @@ static int hv_gpci_init(void)
int r;
unsigned long hret;
struct hv_perf_caps caps;
+ struct hv_gpci_request_buffer *arg;
hv_gpci_assert_offsets_correct();
@@ -353,6 +354,36 @@ static int hv_gpci_init(void)
/* sampling not supported */
h_gpci_pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* hcall H_GET_PERF_COUNTER_INFO populates the output
+* counter_info_version value based on the system hypervisor.
+* Pass the counter request 0x10 corresponds to request type
+* 'Dispatch_timebase_by_processor', to get the supported
+* counter_info_version.
+*/
+ arg->params.counter_request = cpu_to_be32(0x10);
+
+ r = plpar_hcall_norets(H_GET_PERF_COUNTER_INFO,
+ virt_to_phys(arg), HGPCI_REQ_BUFFER_SIZE);
+ if (r) {
+ pr_devel("hcall failed, can't get supported
counter_info_version: 0x%x\n", r);
+ arg->params.counter_info_version_out = 0x8;
+ }
+
+ /*
+* Use counter_info_version_out value to assign
+* required hv-gpci event list.
+*/
+ if (arg->params.counter_info_version_out >= 0x8)
+ event_group.attrs = hv_gpci_event_attrs;
+ else
+ event_group.attrs = hv_gpci_event_attrs_v6;
+
+ put_cpu_var(hv_gpci_reqb);
+
r = perf_pmu_register(_gpci_pmu, h_gpci_pmu.name, -1);
if (r)
return r;
diff --git a/arch/powerpc/perf/hv-gpci.h b/arch/powerpc/perf/hv-gpci.h
index 4d108262bed7..c72020912dea 100644
--- a/arch/powerpc/perf/hv-gpci.h
+++ b/
[PATCH v2] powerpc/hv-gpci: Fix hv_gpci event list
Based on getPerfCountInfo v1.018 documentation, some of the
hv_gpci events got deprecated for platforms firmware that
supports counter_info_version 0x8 or above.
Patch fixes the hv_gpci event list by adding a new attribute
group called "hv_gpci_event_attrs_v6" and a "EVENT_ENABLE"
macro to enable these events for platform firmware
that supports counter_info_version 0x6 or below. And assigning
the hv_gpci event list based on output counter info version
of underlying plaform.
Fixes: 97bf2640184f ("powerpc/perf/hv-gpci: add the remaining gpci requests")
Signed-off-by: Kajol Jain
Reviewed-by: Madhavan Srinivasan
---
Changelog:
v1 -> v2
- As suggested by Michael Ellerman, using counter_info_version value
rather then cpu_has_feature() to assign hv-gpci event list.
arch/powerpc/perf/hv-gpci-requests.h | 4
arch/powerpc/perf/hv-gpci.c | 35 ++--
arch/powerpc/perf/hv-gpci.h | 1 +
arch/powerpc/perf/req-gen/perf.h | 17 ++
4 files changed, 55 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci-requests.h
b/arch/powerpc/perf/hv-gpci-requests.h
index 8965b4463d43..baef3d082de9 100644
--- a/arch/powerpc/perf/hv-gpci-requests.h
+++ b/arch/powerpc/perf/hv-gpci-requests.h
@@ -79,6 +79,7 @@ REQUEST(__field(0,8, partition_id)
)
#include I(REQUEST_END)
+#ifdef EVENT_ENABLE
/*
* Not available for counter_info_version >= 0x8, use
* run_instruction_cycles_by_partition(0x100) instead.
@@ -92,6 +93,7 @@ REQUEST(__field(0,8, partition_id)
__count(0x10, 8, cycles)
)
#include I(REQUEST_END)
+#endif
#define REQUEST_NAME system_performance_capabilities
#define REQUEST_NUM 0x40
@@ -103,6 +105,7 @@ REQUEST(__field(0, 1, perf_collect_privileged)
)
#include I(REQUEST_END)
+#ifdef EVENT_ENABLE
#define REQUEST_NAME processor_bus_utilization_abc_links
#define REQUEST_NUM 0x50
#define REQUEST_IDX_KIND "hw_chip_id=?"
@@ -194,6 +197,7 @@ REQUEST(__field(0, 4, phys_processor_idx)
__count(0x28, 8, instructions_completed)
)
#include I(REQUEST_END)
+#endif
/* Processor_core_power_mode (0x95) skipped, no counters */
/* Affinity_domain_information_by_virtual_processor (0xA0) skipped,
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 5eb60ed5b5e8..6eeabf3975e5 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -70,9 +70,9 @@ static const struct attribute_group format_group = {
.attrs = format_attrs,
};
-static const struct attribute_group event_group = {
+static struct attribute_group event_group = {
.name = "events",
- .attrs = hv_gpci_event_attrs,
+ /* .attrs is set in init */
};
#define HV_CAPS_ATTR(_name, _format) \
@@ -330,6 +330,7 @@ static int hv_gpci_init(void)
int r;
unsigned long hret;
struct hv_perf_caps caps;
+ struct hv_gpci_request_buffer *arg;
hv_gpci_assert_offsets_correct();
@@ -353,6 +354,36 @@ static int hv_gpci_init(void)
/* sampling not supported */
h_gpci_pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
+ arg = (void *)get_cpu_var(hv_gpci_reqb);
+ memset(arg, 0, HGPCI_REQ_BUFFER_SIZE);
+
+ /*
+* hcall H_GET_PERF_COUNTER_INFO populates the output
+* counter_info_version value based on the system hypervisor.
+* Pass the counter request 0x10 corresponds to request type
+* 'Dispatch_timebase_by_processor', to get the supported
+* counter_info_version.
+*/
+ arg->params.counter_request = cpu_to_be32(0x10);
+
+ r = plpar_hcall_norets(H_GET_PERF_COUNTER_INFO,
+ virt_to_phys(arg), HGPCI_REQ_BUFFER_SIZE);
+ if (r) {
+ pr_devel("hcall failed, can't get supported
counter_info_version: 0x%x\n", r);
+ arg->params.counter_info_version_out = 0x8;
+ }
+
+ /*
+* Use counter_info_version_out value to assign
+* required hv-gpci event list.
+*/
+ if (arg->params.counter_info_version_out >= 0x8)
+ event_group.attrs = hv_gpci_event_attrs;
+ else
+ event_group.attrs = hv_gpci_event_attrs_v6;
+
+ put_cpu_var(hv_gpci_reqb);
+
r = perf_pmu_register(_gpci_pmu, h_gpci_pmu.name, -1);
if (r)
return r;
diff --git a/arch/powerpc/perf/hv-gpci.h b/arch/powerpc/perf/hv-gpci.h
index 4d108262bed7..10aba0ccb434 100644
--- a/arch/powerpc/perf/hv-gpci.h
+++ b/arch/powerpc/perf/hv-gpci.h
@@ -26,6 +26,7 @@ enum {
#define REQUEST_FILE "../hv-gpci-requests.h"
#define NAME_LOWER hv_gpci
#define NAME_UPPER HV_GPCI
+#define EVENT_ENABLE
#include "req-gen/perf.h"
#undef REQUEST_FILE
#undef NAME_LOWER
diff --git a/arch/powerpc/perf/req-gen/perf.h b/arch/powerpc/perf/req-gen/perf.h
[PATCH] perf test bpf: Skip test if kernel-debuginfo is not present
Perf BPF filter test fails in environment where "kernel-debuginfo"
is not installed.
Test failure logs:
<<>>
42: BPF filter:
42.1: Basic BPF filtering : Ok
42.2: BPF pinning : Ok
42.3: BPF prologue generation : FAILED!
<<>>
Enabling verbose option provided debug logs, which says debuginfo
needs to be installed. Snippet of verbose logs:
<<>>
42.3: BPF prologue generation :
--- start ---
test child forked, pid 28218
<<>>
Rebuild with CONFIG_DEBUG_INFO=y, or install an appropriate debuginfo
package.
bpf_probe: failed to convert perf probe events
Failed to add events selected by BPF
test child finished with -1
end
BPF filter subtest 3: FAILED!
<<>>
Here subtest, "BPF prologue generation" failed and
logs shows debuginfo is needed. After installing
kernel-debuginfo package, testcase passes.
Subtest "BPF prologue generation" failed because, the "do_test"
function returns "TEST_FAIL" without checking the error type
returned by "parse_events_load_bpf_obj" function.
Function parse_events_load_bpf_obj can also return error of type
"-ENOENT" incase kernel-debuginfo package is not installed. Fix this
by adding check for -ENOENT error.
Test result after the patch changes:
Test failure logs:
<<>>
42: BPF filter :
42.1: Basic BPF filtering : Ok
42.2: BPF pinning : Ok
42.3: BPF prologue generation : Skip (clang/debuginfo isn't
installed or environment missing BPF support)
Fixes: ba1fae431e74bb42 ("perf test: Add 'perf test BPF'")
Signed-off-by: Kajol Jain
Reviewed-by: Madhavan Srinivasan
---
tools/perf/tests/bpf.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/tools/perf/tests/bpf.c b/tools/perf/tests/bpf.c
index 17c023823713..57cecadc1da2 100644
--- a/tools/perf/tests/bpf.c
+++ b/tools/perf/tests/bpf.c
@@ -126,6 +126,10 @@ static int do_test(struct bpf_object *obj, int
(*func)(void),
err = parse_events_load_bpf_obj(_state, _state.list, obj,
NULL);
parse_events_error__exit(_error);
+ if (err == -ENOENT) {
+ pr_debug("Failed to add events selected by BPF, debuginfo
package not installed\n");
+ return TEST_SKIP;
+ }
if (err || list_empty(_state.list)) {
pr_debug("Failed to add events selected by BPF\n");
return TEST_FAIL;
@@ -368,7 +372,7 @@ static struct test_case bpf_tests[] = {
"clang isn't installed or environment missing BPF
support"),
#ifdef HAVE_BPF_PROLOGUE
TEST_CASE_REASON("BPF prologue generation", bpf_prologue_test,
- "clang isn't installed or environment missing BPF
support"),
+ "clang/debuginfo isn't installed or environment missing
BPF support"),
#else
TEST_CASE_REASON("BPF prologue generation", bpf_prologue_test, "not
compiled in"),
#endif
--
2.31.1
[PATCH] powerpc/perf: Fix hv-24x7 metric events for power10
Testcase stat_all_metrics.sh fails in powerpc:
90: perf all metrics test : FAILED!
The testcase "stat_all_metrics.sh" verifies perf stat
result for all the metric events present in perf list.
It runs perf metric events with various commands and
expects non-empty metric result.
Incase of powerpc:hv-24x7 events, some of the event count can
be 0 based on system configuration. And if that event used as
denominator in divide equation, it can cause divide by 0
error. The current nest_metric.json file creating divide by 0
issue for some of the metric events, which results in failure
of the "stat_all_metrics.sh" test case.
Most of the metrics events have cycles or an event which
expect to have a larger value as denominator, so adding 1
to the denominator of the metric expression as a fix.
Result in powerpc box after this patch changes:
90: perf all metrics test : Ok
Fixes: a3cbcadfdfc3 ("perf vendor events power10: Adds 24x7 nest
metric events for power10 platform")
Signed-off-by: Kajol Jain
---
.../arch/powerpc/power10/nest_metrics.json| 72 +--
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/tools/perf/pmu-events/arch/powerpc/power10/nest_metrics.json
b/tools/perf/pmu-events/arch/powerpc/power10/nest_metrics.json
index 8ba3e81c9808..fe050d44374b 100644
--- a/tools/perf/pmu-events/arch/powerpc/power10/nest_metrics.json
+++ b/tools/perf/pmu-events/arch/powerpc/power10/nest_metrics.json
@@ -1,13 +1,13 @@
[
{
"MetricName": "VEC_GROUP_PUMP_RETRY_RATIO_P01",
- "MetricExpr": "(hv_24x7@PM_PB_RTY_VG_PUMP01\\,chip\\=?@ /
hv_24x7@PM_PB_VG_PUMP01\\,chip\\=?@) * 100",
+ "MetricExpr": "(hv_24x7@PM_PB_RTY_VG_PUMP01\\,chip\\=?@ / (1 +
hv_24x7@PM_PB_VG_PUMP01\\,chip\\=?@)) * 100",
"ScaleUnit": "1%",
"AggregationMode": "PerChip"
},
{
"MetricName": "VEC_GROUP_PUMP_RETRY_RATIO_P23",
- "MetricExpr": "(hv_24x7@PM_PB_RTY_VG_PUMP23\\,chip\\=?@ /
hv_24x7@PM_PB_VG_PUMP23\\,chip\\=?@) * 100",
+ "MetricExpr": "(hv_24x7@PM_PB_RTY_VG_PUMP23\\,chip\\=?@ / (1 +
hv_24x7@PM_PB_VG_PUMP23\\,chip\\=?@)) * 100",
"ScaleUnit": "1%",
"AggregationMode": "PerChip"
},
@@ -61,13 +61,13 @@
},
{
"MetricName": "REMOTE_NODE_PUMPS_RETRIES_RATIO_P01",
- "MetricExpr": "(hv_24x7@PM_PB_RTY_RNS_PUMP01\\,chip\\=?@ /
hv_24x7@PM_PB_RNS_PUMP01\\,chip\\=?@) * 100",
+ "MetricExpr": "(hv_24x7@PM_PB_RTY_RNS_PUMP01\\,chip\\=?@ / (1 +
hv_24x7@PM_PB_RNS_PUMP01\\,chip\\=?@)) * 100",
"ScaleUnit": "1%",
"AggregationMode": "PerChip"
},
{
"MetricName": "REMOTE_NODE_PUMPS_RETRIES_RATIO_P23",
- "MetricExpr": "(hv_24x7@PM_PB_RTY_RNS_PUMP23\\,chip\\=?@ /
hv_24x7@PM_PB_RNS_PUMP23\\,chip\\=?@) * 100",
+ "MetricExpr": "(hv_24x7@PM_PB_RTY_RNS_PUMP23\\,chip\\=?@ / (1 +
hv_24x7@PM_PB_RNS_PUMP23\\,chip\\=?@)) * 100",
"ScaleUnit": "1%",
"AggregationMode": "PerChip"
},
@@ -151,193 +151,193 @@
},
{
"MetricName": "XLINK0_OUT_TOTAL_UTILIZATION",
- "MetricExpr": "((hv_24x7@PM_XLINK0_OUT_ODD_TOTAL_UTIL\\,chip\\=?@ +
hv_24x7@PM_XLINK0_OUT_EVEN_TOTAL_UTIL\\,chip\\=?@) /
(hv_24x7@PM_XLINK0_OUT_ODD_AVLBL_CYCLES\\,chip\\=?@ +
hv_24x7@PM_XLINK0_OUT_EVEN_AVLBL_CYCLES\\,chip\\=?@)) * 100",
+ "MetricExpr": "((hv_24x7@PM_XLINK0_OUT_ODD_TOTAL_UTIL\\,chip\\=?@ +
hv_24x7@PM_XLINK0_OUT_EVEN_TOTAL_UTIL\\,chip\\=?@) / (1 +
hv_24x7@PM_XLINK0_OUT_ODD_AVLBL_CYCLES\\,chip\\=?@ +
hv_24x7@PM_XLINK0_OUT_EVEN_AVLBL_CYCLES\\,chip\\=?@)) * 100",
"ScaleUnit": "1%",
"AggregationMode": "PerChip"
},
{
"MetricName": "XLINK1_OUT_TOTAL_UTILIZATION",
- "MetricExpr": "((hv_24x7@PM_XLINK1_OUT_ODD_TOTAL_UTIL\\,chip\\=?@ +
hv_24x7@PM_XLINK1_OUT_EVEN_TOTAL_UTIL\\,chip\\=?@) /
(hv_24x7@PM_XLINK1_OUT_ODD_AVLBL_CYCLES\\,chip\\=?@ +
hv_24x7@PM_XLINK1_OUT_EVEN_AVLBL_CYCLES\\,chip\\=?@)) * 100",
+ "MetricExpr": "((hv_24x7@PM_XLINK1_OUT_ODD_TOTAL_UTIL\\,chip\\=?@ +
hv_24x7@PM_XLINK1_OUT_EVEN_TOTAL_UTIL\\,chip\\=?@) / (1 +
hv_24x7@PM_XLINK1_OUT_ODD_AVLBL_CYCLES\\,chip\\=?@ +
hv_24x7@PM_XLINK1_OUT_EVEN_AVLBL_CYCLES\\,chip\\=?@)) * 100",
"ScaleUnit": "1%",
"AggregationMode": "PerChip"
},
{
"MetricName": "XLINK2_OUT_TOTAL_UTILIZATION",
- "MetricExpr": "((hv_24x
[PATCH] powerpc/hv-gpci: Fix hv_gpci event list
Based on getPerfCountInfo v1.018 documentation, some of the
hv_gpci events got deprecated for platforms firmware that
supports counter_info_version 0x8 or above.
Patch fixes the hv_gpci event list by adding a new attribute
group called "hv_gpci_event_attrs_v6" and a "EVENT_ENABLE"
macro to enable these events for platform firmware
that supports counter_info_version 0x6 or below.
Fixes: 97bf2640184f4 ("powerpc/perf/hv-gpci: add the remaining gpci
requests")
Signed-off-by: Kajol Jain
---
arch/powerpc/perf/hv-gpci-requests.h | 4
arch/powerpc/perf/hv-gpci.c | 9 +++--
arch/powerpc/perf/hv-gpci.h | 1 +
arch/powerpc/perf/req-gen/perf.h | 17 +
4 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/perf/hv-gpci-requests.h
b/arch/powerpc/perf/hv-gpci-requests.h
index 8965b4463d43..baef3d082de9 100644
--- a/arch/powerpc/perf/hv-gpci-requests.h
+++ b/arch/powerpc/perf/hv-gpci-requests.h
@@ -79,6 +79,7 @@ REQUEST(__field(0,8, partition_id)
)
#include I(REQUEST_END)
+#ifdef EVENT_ENABLE
/*
* Not available for counter_info_version >= 0x8, use
* run_instruction_cycles_by_partition(0x100) instead.
@@ -92,6 +93,7 @@ REQUEST(__field(0,8, partition_id)
__count(0x10, 8, cycles)
)
#include I(REQUEST_END)
+#endif
#define REQUEST_NAME system_performance_capabilities
#define REQUEST_NUM 0x40
@@ -103,6 +105,7 @@ REQUEST(__field(0, 1, perf_collect_privileged)
)
#include I(REQUEST_END)
+#ifdef EVENT_ENABLE
#define REQUEST_NAME processor_bus_utilization_abc_links
#define REQUEST_NUM 0x50
#define REQUEST_IDX_KIND "hw_chip_id=?"
@@ -194,6 +197,7 @@ REQUEST(__field(0, 4, phys_processor_idx)
__count(0x28, 8, instructions_completed)
)
#include I(REQUEST_END)
+#endif
/* Processor_core_power_mode (0x95) skipped, no counters */
/* Affinity_domain_information_by_virtual_processor (0xA0) skipped,
diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c
index 5eb60ed5b5e8..065a01812b3e 100644
--- a/arch/powerpc/perf/hv-gpci.c
+++ b/arch/powerpc/perf/hv-gpci.c
@@ -70,9 +70,9 @@ static const struct attribute_group format_group = {
.attrs = format_attrs,
};
-static const struct attribute_group event_group = {
+static struct attribute_group event_group = {
.name = "events",
- .attrs = hv_gpci_event_attrs,
+ /* .attrs is set in init */
};
#define HV_CAPS_ATTR(_name, _format) \
@@ -353,6 +353,11 @@ static int hv_gpci_init(void)
/* sampling not supported */
h_gpci_pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
+ if (cpu_has_feature(CPU_FTR_ARCH_207S))
+ event_group.attrs = hv_gpci_event_attrs;
+ else
+ event_group.attrs = hv_gpci_event_attrs_v6;
+
r = perf_pmu_register(_gpci_pmu, h_gpci_pmu.name, -1);
if (r)
return r;
diff --git a/arch/powerpc/perf/hv-gpci.h b/arch/powerpc/perf/hv-gpci.h
index 4d108262bed7..866172c1651c 100644
--- a/arch/powerpc/perf/hv-gpci.h
+++ b/arch/powerpc/perf/hv-gpci.h
@@ -26,6 +26,7 @@ enum {
#define REQUEST_FILE "../hv-gpci-requests.h"
#define NAME_LOWER hv_gpci
#define NAME_UPPER HV_GPCI
+#define EVENT_ENABLE 1
#include "req-gen/perf.h"
#undef REQUEST_FILE
#undef NAME_LOWER
diff --git a/arch/powerpc/perf/req-gen/perf.h b/arch/powerpc/perf/req-gen/perf.h
index fa9bc804e67a..78d407e3fcc6 100644
--- a/arch/powerpc/perf/req-gen/perf.h
+++ b/arch/powerpc/perf/req-gen/perf.h
@@ -139,6 +139,23 @@ PMU_EVENT_ATTR_STRING(
\
#define REQUEST_(r_name, r_value, r_idx_1, r_fields) \
r_fields
+/* Generate event list for platforms with counter_info_version 0x6 or below */
+static __maybe_unused struct attribute *hv_gpci_event_attrs_v6[] = {
+#include REQUEST_FILE
+ NULL
+};
+
+/*
+ * Based on getPerfCountInfo v1.018 documentation, some of the hv-gpci
+ * events got deprecated for platforms firmware that supports
+ * counter_info_version 0x8 or above.
+ * Undefining macro EVENT_ENABLE, to disable the addition of deprecated
+ * events in "hv_gpci_event_attrs" attribute group, for platforms that
+ * supports counter_info_version 0x8 or above.
+ */
+#undef EVENT_ENABLE
+
+/* Generate event list for platforms with counter_info_version 0x8 or above*/
static __maybe_unused struct attribute *hv_gpci_event_attrs[] = {
#include REQUEST_FILE
NULL
--
2.31.1
[PATCH v3] powerpc/papr_scm: Fix nvdimm event mappings
Commit 4c08d4bbc089 ("powerpc/papr_scm: Add perf interface support")
added performance monitoring support for papr-scm nvdimm devices via
perf interface. Commit also added an array in papr_scm_priv
structure called "nvdimm_events_map", which got filled based on the
result of H_SCM_PERFORMANCE_STATS hcall.
Currently there is an assumption that the order of events in the
stats buffer, returned by the hypervisor is same. And order also
happens to matches with the events specified in nvdimm driver code.
But this assumption is not documented in Power Architecture
Platform Requirements (PAPR) document. Although the order
of events happens to be same on current generation od system, but
it might not be true in future generation systems. Fix the issue, by
adding a static mapping for nvdimm events to corresponding stat-id,
and removing the dynamic map from papr_scm_priv structure. Also
remove the function papr_scm_pmu_check_events from papr_scm.c file,
as we no longer need to copy stat-ids dynamically.
Fixes: 4c08d4bbc089 ("powerpc/papr_scm: Add perf interface support")
Reported-by: Aneesh Kumar K.V
Signed-off-by: Kajol Jain
---
arch/powerpc/platforms/pseries/papr_scm.c | 88 +++
1 file changed, 27 insertions(+), 61 deletions(-)
---
Changelog:
v2 -> v3
- Remove function papr_scm_pmu_check_events() and replace the
event checks in papr_scm_pmu_register() function with p->stat_buffer_len
as suggested by Vaibhav Jain
Link to the patch v2:
https://lore.kernel.org/all/20220711034605.212683-1-kj...@linux.ibm.com/
v1 -> v2
- To avoid accidental reordering, explicitly defined index for all
the events. Also added valid config check in papr_scm_pmu_event_init
function as suggested by Michael Ellerman.
- Did minor commit message changes and remove initialization of
rc variable as suggested by Michael Ellerman
- Link to the patch v1:
https://patchwork.kernel.org/project/linux-nvdimm/patch/20220610133431.410514-1-kj...@linux.ibm.com/
---
diff --git a/arch/powerpc/platforms/pseries/papr_scm.c
b/arch/powerpc/platforms/pseries/papr_scm.c
index 82cae08976bc..16bac4e0d7a2 100644
--- a/arch/powerpc/platforms/pseries/papr_scm.c
+++ b/arch/powerpc/platforms/pseries/papr_scm.c
@@ -124,9 +124,6 @@ struct papr_scm_priv {
/* The bits which needs to be overridden */
u64 health_bitmap_inject_mask;
-
- /* array to have event_code and stat_id mappings */
- u8 *nvdimm_events_map;
};
static int papr_scm_pmem_flush(struct nd_region *nd_region,
@@ -350,6 +347,25 @@ static ssize_t drc_pmem_query_stats(struct papr_scm_priv
*p,
#ifdef CONFIG_PERF_EVENTS
#define to_nvdimm_pmu(_pmu)container_of(_pmu, struct nvdimm_pmu, pmu)
+static const char * const nvdimm_events_map[] = {
+ [1] = "CtlResCt",
+ [2] = "CtlResTm",
+ [3] = "PonSecs ",
+ [4] = "MemLife ",
+ [5] = "CritRscU",
+ [6] = "HostLCnt",
+ [7] = "HostSCnt",
+ [8] = "HostSDur",
+ [9] = "HostLDur",
+ [10] = "MedRCnt ",
+ [11] = "MedWCnt ",
+ [12] = "MedRDur ",
+ [13] = "MedWDur ",
+ [14] = "CchRHCnt",
+ [15] = "CchWHCnt",
+ [16] = "FastWCnt",
+};
+
static int papr_scm_pmu_get_value(struct perf_event *event, struct device
*dev, u64 *count)
{
struct papr_scm_perf_stat *stat;
@@ -357,11 +373,15 @@ static int papr_scm_pmu_get_value(struct perf_event
*event, struct device *dev,
struct papr_scm_priv *p = (struct papr_scm_priv *)dev->driver_data;
int rc, size;
+ /* Invalid eventcode */
+ if (event->attr.config == 0 || event->attr.config >=
ARRAY_SIZE(nvdimm_events_map))
+ return -EINVAL;
+
/* Allocate request buffer enough to hold single performance stat */
size = sizeof(struct papr_scm_perf_stats) +
sizeof(struct papr_scm_perf_stat);
- if (!p || !p->nvdimm_events_map)
+ if (!p)
return -EINVAL;
stats = kzalloc(size, GFP_KERNEL);
@@ -370,7 +390,7 @@ static int papr_scm_pmu_get_value(struct perf_event *event,
struct device *dev,
stat = >scm_statistic[0];
memcpy(>stat_id,
- >nvdimm_events_map[event->attr.config *
sizeof(stat->stat_id)],
+ nvdimm_events_map[event->attr.config],
sizeof(stat->stat_id));
stat->stat_val = 0;
@@ -458,56 +478,6 @@ static void papr_scm_pmu_del(struct perf_event *event, int
flags)
papr_scm_pmu_read(event);
}
-static int papr_scm_pmu_check_events(struct papr_scm_priv *p, struct
nvdimm_pmu *nd_pmu)
-{
- struct papr_scm_perf_stat *stat;
- struct papr_scm_perf_stats *stats;
- u32 available_events;
- int index, rc = 0;
-
- if
[PATCH 2/2] powerpc/kvm: Remove comment related to moving PMU code to perf subsystem
Commit aabcaf6ae2a0 ("KVM: PPC: Book3S HV P9: Move host OS save/restore
functions to built-in") added a comment in switch_pmu_to_guest
function, indicating possibility of moving PMU handling code
to perf subsystem. But perf subsystem code compilation depends upon
the enablement of CONFIG_PERF_EVENTS whereas, kvm code don't have
any dependency on this config.
Patch remove this comment as switch_pmu_to_guest functionality is
needed even if perf subsystem is disabled.
Signed-off-by: Kajol Jain
---
arch/powerpc/kvm/book3s_hv_p9_perf.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv_p9_perf.c
b/arch/powerpc/kvm/book3s_hv_p9_perf.c
index da3135cab9ea..44d24cca3df1 100644
--- a/arch/powerpc/kvm/book3s_hv_p9_perf.c
+++ b/arch/powerpc/kvm/book3s_hv_p9_perf.c
@@ -44,12 +44,6 @@ void switch_pmu_to_guest(struct kvm_vcpu *vcpu,
/* Save host */
if (ppc_get_pmu_inuse()) {
- /*
-* It might be better to put PMU handling (at least for the
-* host) in the perf subsystem because it knows more about what
-* is being used.
-*/
-
/* POWER9, POWER10 do not implement HPMC or SPMC */
host_os_sprs->mmcr0 = mfspr(SPRN_MMCR0);
--
2.27.0
[PATCH 1/2] powerpc/kvm: Move pmu code in kvm folder to separate file for power9 and later platforms
File book3s_hv_p9_entry.c in powerpc/kvm folder consists of functions
like freeze_pmu, switch_pmu_to_guest and switch_pmu_to_host which are
specific to Performance Monitoring Unit(PMU) for power9 and later
platforms.
For better maintenance, moving pmu related code from
book3s_hv_p9_entry.c to a new file called book3s_hv_p9_perf.c,
without any logic change.
Also make corresponding changes in the Makefile to include
book3s_hv_p9_perf.c during compilation.
Signed-off-by: Kajol Jain
---
arch/powerpc/kvm/Makefile | 1 +
arch/powerpc/kvm/book3s_hv_p9_entry.c | 221 -
arch/powerpc/kvm/book3s_hv_p9_perf.c | 225 ++
3 files changed, 226 insertions(+), 221 deletions(-)
create mode 100644 arch/powerpc/kvm/book3s_hv_p9_perf.c
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
index 0cd23ce07d68..5319d889b184 100644
--- a/arch/powerpc/kvm/Makefile
+++ b/arch/powerpc/kvm/Makefile
@@ -86,6 +86,7 @@ kvm-book3s_64-builtin-objs-$(CONFIG_KVM_BOOK3S_64_HANDLER) +=
\
book3s_hv_rm_mmu.o \
book3s_hv_ras.o \
book3s_hv_builtin.o \
+ book3s_hv_p9_perf.o \
$(kvm-book3s_64-builtin-tm-objs-y) \
$(kvm-book3s_64-builtin-xics-objs-y)
endif
diff --git a/arch/powerpc/kvm/book3s_hv_p9_entry.c
b/arch/powerpc/kvm/book3s_hv_p9_entry.c
index 112a09b33328..34d81898bf47 100644
--- a/arch/powerpc/kvm/book3s_hv_p9_entry.c
+++ b/arch/powerpc/kvm/book3s_hv_p9_entry.c
@@ -3,231 +3,10 @@
#include
#include
#include
-#include
-#include
#include
#include "book3s_hv.h"
-static void freeze_pmu(unsigned long mmcr0, unsigned long mmcra)
-{
- if (!(mmcr0 & MMCR0_FC))
- goto do_freeze;
- if (mmcra & MMCRA_SAMPLE_ENABLE)
- goto do_freeze;
- if (cpu_has_feature(CPU_FTR_ARCH_31)) {
- if (!(mmcr0 & MMCR0_PMCCEXT))
- goto do_freeze;
- if (!(mmcra & MMCRA_BHRB_DISABLE))
- goto do_freeze;
- }
- return;
-
-do_freeze:
- mmcr0 = MMCR0_FC;
- mmcra = 0;
- if (cpu_has_feature(CPU_FTR_ARCH_31)) {
- mmcr0 |= MMCR0_PMCCEXT;
- mmcra = MMCRA_BHRB_DISABLE;
- }
-
- mtspr(SPRN_MMCR0, mmcr0);
- mtspr(SPRN_MMCRA, mmcra);
- isync();
-}
-
-void switch_pmu_to_guest(struct kvm_vcpu *vcpu,
-struct p9_host_os_sprs *host_os_sprs)
-{
- struct lppaca *lp;
- int load_pmu = 1;
-
- lp = vcpu->arch.vpa.pinned_addr;
- if (lp)
- load_pmu = lp->pmcregs_in_use;
-
- /* Save host */
- if (ppc_get_pmu_inuse()) {
- /*
-* It might be better to put PMU handling (at least for the
-* host) in the perf subsystem because it knows more about what
-* is being used.
-*/
-
- /* POWER9, POWER10 do not implement HPMC or SPMC */
-
- host_os_sprs->mmcr0 = mfspr(SPRN_MMCR0);
- host_os_sprs->mmcra = mfspr(SPRN_MMCRA);
-
- freeze_pmu(host_os_sprs->mmcr0, host_os_sprs->mmcra);
-
- host_os_sprs->pmc1 = mfspr(SPRN_PMC1);
- host_os_sprs->pmc2 = mfspr(SPRN_PMC2);
- host_os_sprs->pmc3 = mfspr(SPRN_PMC3);
- host_os_sprs->pmc4 = mfspr(SPRN_PMC4);
- host_os_sprs->pmc5 = mfspr(SPRN_PMC5);
- host_os_sprs->pmc6 = mfspr(SPRN_PMC6);
- host_os_sprs->mmcr1 = mfspr(SPRN_MMCR1);
- host_os_sprs->mmcr2 = mfspr(SPRN_MMCR2);
- host_os_sprs->sdar = mfspr(SPRN_SDAR);
- host_os_sprs->siar = mfspr(SPRN_SIAR);
- host_os_sprs->sier1 = mfspr(SPRN_SIER);
-
- if (cpu_has_feature(CPU_FTR_ARCH_31)) {
- host_os_sprs->mmcr3 = mfspr(SPRN_MMCR3);
- host_os_sprs->sier2 = mfspr(SPRN_SIER2);
- host_os_sprs->sier3 = mfspr(SPRN_SIER3);
- }
- }
-
-#ifdef CONFIG_PPC_PSERIES
- /* After saving PMU, before loading guest PMU, flip pmcregs_in_use */
- if (kvmhv_on_pseries()) {
- barrier();
- get_lppaca()->pmcregs_in_use = load_pmu;
- barrier();
- }
-#endif
-
- /*
-* Load guest. If the VPA said the PMCs are not in use but the guest
-* tried to access them anyway, HFSCR[PM] will be set by the HFAC
-* fault so we can make forward progress.
-*/
- if (load_pmu || (vcpu->arch.hfscr & HFSCR_PM)) {
- mtspr(SPRN_PMC1, vcpu->arch.pmc[0]);
- mtspr(SPRN_PMC2, vcpu->arch.pmc[1]);
- mtspr(SPRN_PMC3, vcpu->arch.pmc[2]);
- mtspr(SPRN_PMC4, vcpu->arch.pmc[3]);
- mtspr(SPRN_PMC5, vcpu->arch.pm
[PATCH v2] powerpc/papr_scm: Fix nvdimm event mappings
Commit 4c08d4bbc089 ("powerpc/papr_scm: Add perf interface support")
added performance monitoring support for papr-scm nvdimm devices via
perf interface. Commit also added an array in papr_scm_priv
structure called "nvdimm_events_map", which got filled based on the
result of H_SCM_PERFORMANCE_STATS hcall.
Currently there is an assumption that the order of events in the
stats buffer, returned by the hypervisor is same. And that order also
matches with the events specified in nvdimm driver code.
But this assumption is not documented anywhere in Power Architecture
Platform Requirements (PAPR) document. Although the order
of events happens to be same on current systems, but it might
not be true in future generation systems. Fix the issue, by
adding a static mapping for nvdimm events to corresponding stat-id,
and removing the dynamic map from papr_scm_priv structure.
Fixes: 4c08d4bbc089 ("powerpc/papr_scm: Add perf interface support")
Reported-by: Aneesh Kumar K.V
Signed-off-by: Kajol Jain
---
arch/powerpc/platforms/pseries/papr_scm.c | 62 ++-
1 file changed, 28 insertions(+), 34 deletions(-)
---
Changelog:
v1 -> v2
- To avoid accidental reordering, explicitly defined index for all
the events. Also added valid config check in papr_scm_pmu_event_init
function as suggested by Michael Ellerman.
- Did minor commit message changes and remove initialization of
rc variable as suggested by Michael Ellerman
- Link to the patch v1:
https://patchwork.kernel.org/project/linux-nvdimm/patch/20220610133431.410514-1-kj...@linux.ibm.com/
---
diff --git a/arch/powerpc/platforms/pseries/papr_scm.c
b/arch/powerpc/platforms/pseries/papr_scm.c
index 82cae08976bc..139e243c3f49 100644
--- a/arch/powerpc/platforms/pseries/papr_scm.c
+++ b/arch/powerpc/platforms/pseries/papr_scm.c
@@ -124,9 +124,6 @@ struct papr_scm_priv {
/* The bits which needs to be overridden */
u64 health_bitmap_inject_mask;
-
- /* array to have event_code and stat_id mappings */
- u8 *nvdimm_events_map;
};
static int papr_scm_pmem_flush(struct nd_region *nd_region,
@@ -350,6 +347,25 @@ static ssize_t drc_pmem_query_stats(struct papr_scm_priv
*p,
#ifdef CONFIG_PERF_EVENTS
#define to_nvdimm_pmu(_pmu)container_of(_pmu, struct nvdimm_pmu, pmu)
+static const char * const nvdimm_events_map[] = {
+ [1] = "CtlResCt",
+ [2] = "CtlResTm",
+ [3] = "PonSecs ",
+ [4] = "MemLife ",
+ [5] = "CritRscU",
+ [6] = "HostLCnt",
+ [7] = "HostSCnt",
+ [8] = "HostSDur",
+ [9] = "HostLDur",
+ [10] = "MedRCnt ",
+ [11] = "MedWCnt ",
+ [12] = "MedRDur ",
+ [13] = "MedWDur ",
+ [14] = "CchRHCnt",
+ [15] = "CchWHCnt",
+ [16] = "FastWCnt",
+};
+
static int papr_scm_pmu_get_value(struct perf_event *event, struct device
*dev, u64 *count)
{
struct papr_scm_perf_stat *stat;
@@ -357,11 +373,15 @@ static int papr_scm_pmu_get_value(struct perf_event
*event, struct device *dev,
struct papr_scm_priv *p = (struct papr_scm_priv *)dev->driver_data;
int rc, size;
+ /* Invalid eventcode */
+ if (event->attr.config == 0 || event->attr.config >=
ARRAY_SIZE(nvdimm_events_map))
+ return -EINVAL;
+
/* Allocate request buffer enough to hold single performance stat */
size = sizeof(struct papr_scm_perf_stats) +
sizeof(struct papr_scm_perf_stat);
- if (!p || !p->nvdimm_events_map)
+ if (!p)
return -EINVAL;
stats = kzalloc(size, GFP_KERNEL);
@@ -370,7 +390,7 @@ static int papr_scm_pmu_get_value(struct perf_event *event,
struct device *dev,
stat = >scm_statistic[0];
memcpy(>stat_id,
- >nvdimm_events_map[event->attr.config *
sizeof(stat->stat_id)],
+ nvdimm_events_map[event->attr.config],
sizeof(stat->stat_id));
stat->stat_val = 0;
@@ -460,10 +480,9 @@ static void papr_scm_pmu_del(struct perf_event *event, int
flags)
static int papr_scm_pmu_check_events(struct papr_scm_priv *p, struct
nvdimm_pmu *nd_pmu)
{
- struct papr_scm_perf_stat *stat;
struct papr_scm_perf_stats *stats;
u32 available_events;
- int index, rc = 0;
+ int rc;
if (!p->stat_buffer_len)
return -ENOENT;
@@ -476,34 +495,12 @@ static int papr_scm_pmu_check_events(struct papr_scm_priv
*p, struct nvdimm_pmu
/* Allocate the buffer for phyp where stats are written */
stats = kzalloc(p->stat_buffer_len, GFP_KERNEL);
if (!stats) {
- rc = -ENOMEM;
- return rc;
+ return -ENOMEM;
}
/* Called to get li
[PATCH] powerpc/papr_scm: Fix nvdimm event mappings
Commit 4c08d4bbc089 ("powerpc/papr_scm: Add perf interface support")
adds performance monitoring support for papr-scm nvdimm devices via
perf interface. It also adds one array in papr_scm_priv
structure called "nvdimm_events_map", to dynamically save the stat_id
for events specified in nvdimm driver code "nd_perf.c".
Right now the mapping is done based on the result of
H_SCM_PERFORMANCE_STATS hcall, when all the stats are
requested. Currently there is an assumption, that a
certain stat will always be found at a specific offset
in the stat buffer. The assumption may not be true or
documented as part of PAPR documentation. Fixing it,
by adding a static mapping for nvdimm events to
corresponding stat-id, and removing the map from
papr_scm_priv structure.
Fixes: 4c08d4bbc089 ("powerpc/papr_scm: Add perf interface support")
Reported-by: Aneesh Kumar K.V
Signed-off-by: Kajol Jain
---
arch/powerpc/platforms/pseries/papr_scm.c | 59 ++-
1 file changed, 25 insertions(+), 34 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/papr_scm.c
b/arch/powerpc/platforms/pseries/papr_scm.c
index 181b855b3050..5434c654a797 100644
--- a/arch/powerpc/platforms/pseries/papr_scm.c
+++ b/arch/powerpc/platforms/pseries/papr_scm.c
@@ -124,9 +124,6 @@ struct papr_scm_priv {
/* The bits which needs to be overridden */
u64 health_bitmap_inject_mask;
-
- /* array to have event_code and stat_id mappings */
- u8 *nvdimm_events_map;
};
static int papr_scm_pmem_flush(struct nd_region *nd_region,
@@ -350,6 +347,26 @@ static ssize_t drc_pmem_query_stats(struct papr_scm_priv
*p,
#ifdef CONFIG_PERF_EVENTS
#define to_nvdimm_pmu(_pmu)container_of(_pmu, struct nvdimm_pmu, pmu)
+static const char * const nvdimm_events_map[] = {
+ "N/A",
+ "CtlResCt",
+ "CtlResTm",
+ "PonSecs ",
+ "MemLife ",
+ "CritRscU",
+ "HostLCnt",
+ "HostSCnt",
+ "HostSDur",
+ "HostLDur",
+ "MedRCnt ",
+ "MedWCnt ",
+ "MedRDur ",
+ "MedWDur ",
+ "CchRHCnt",
+ "CchWHCnt",
+ "FastWCnt",
+};
+
static int papr_scm_pmu_get_value(struct perf_event *event, struct device
*dev, u64 *count)
{
struct papr_scm_perf_stat *stat;
@@ -361,7 +378,7 @@ static int papr_scm_pmu_get_value(struct perf_event *event,
struct device *dev,
size = sizeof(struct papr_scm_perf_stats) +
sizeof(struct papr_scm_perf_stat);
- if (!p || !p->nvdimm_events_map)
+ if (!p)
return -EINVAL;
stats = kzalloc(size, GFP_KERNEL);
@@ -370,7 +387,7 @@ static int papr_scm_pmu_get_value(struct perf_event *event,
struct device *dev,
stat = >scm_statistic[0];
memcpy(>stat_id,
- >nvdimm_events_map[event->attr.config *
sizeof(stat->stat_id)],
+ nvdimm_events_map[event->attr.config],
sizeof(stat->stat_id));
stat->stat_val = 0;
@@ -460,10 +477,9 @@ static void papr_scm_pmu_del(struct perf_event *event, int
flags)
static int papr_scm_pmu_check_events(struct papr_scm_priv *p, struct
nvdimm_pmu *nd_pmu)
{
- struct papr_scm_perf_stat *stat;
struct papr_scm_perf_stats *stats;
u32 available_events;
- int index, rc = 0;
+ int rc = 0;
available_events = (p->stat_buffer_len - sizeof(struct
papr_scm_perf_stats))
/ sizeof(struct papr_scm_perf_stat);
@@ -473,34 +489,12 @@ static int papr_scm_pmu_check_events(struct papr_scm_priv
*p, struct nvdimm_pmu
/* Allocate the buffer for phyp where stats are written */
stats = kzalloc(p->stat_buffer_len, GFP_KERNEL);
if (!stats) {
- rc = -ENOMEM;
- return rc;
+ return -ENOMEM;
}
/* Called to get list of events supported */
rc = drc_pmem_query_stats(p, stats, 0);
- if (rc)
- goto out;
- /*
-* Allocate memory and populate nvdimm_event_map.
-* Allocate an extra element for NULL entry
-*/
- p->nvdimm_events_map = kcalloc(available_events + 1,
- sizeof(stat->stat_id),
- GFP_KERNEL);
- if (!p->nvdimm_events_map) {
- rc = -ENOMEM;
- goto out;
- }
-
- /* Copy all stat_ids to event map */
- for (index = 0, stat = stats->scm_statistic;
-index < available_events; index++, ++stat) {
- memcpy(>nvdimm_events_map[index * sizeof(stat->stat_id)],
- >stat_id, sizeof(stat->stat_id));
- }
-out:
kfree(stats);
return rc;
}
@
[PATCH 15/35] selftest/powerpc/pmu: Add support for perf event code tests
From: Athira Rajeev Add new folder for enabling perf event code tests which includes checking for group constraints, valid/invalid events, also checks for event excludes, alternatives so on. A new folder "event_code_tests", is created under "selftests/powerpc/pmu". Also updates the corresponding Makefiles in "selftests/powerpc" and "event_code_tests" folder. Signed-off-by: Athira Rajeev --- tools/testing/selftests/powerpc/pmu/Makefile | 11 +-- .../selftests/powerpc/pmu/event_code_tests/Makefile | 9 + 2 files changed, 18 insertions(+), 2 deletions(-) create mode 100644 tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile diff --git a/tools/testing/selftests/powerpc/pmu/Makefile b/tools/testing/selftests/powerpc/pmu/Makefile index edbd96d3b2ab..30803353bd7c 100644 --- a/tools/testing/selftests/powerpc/pmu/Makefile +++ b/tools/testing/selftests/powerpc/pmu/Makefile @@ -8,7 +8,7 @@ EXTRA_SOURCES := ../harness.c event.c lib.c ../utils.c top_srcdir = ../../../../.. include ../../lib.mk -all: $(TEST_GEN_PROGS) ebb sampling_tests +all: $(TEST_GEN_PROGS) ebb sampling_tests event_code_tests $(TEST_GEN_PROGS): $(EXTRA_SOURCES) @@ -27,6 +27,7 @@ override define RUN_TESTS $(DEFAULT_RUN_TESTS) TARGET=ebb; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -C $$TARGET run_tests TARGET=sampling_tests; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -C $$TARGET run_tests + TARGET=event_code_tests; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -C $$TARGET run_tests endef DEFAULT_EMIT_TESTS := $(EMIT_TESTS) @@ -34,6 +35,7 @@ override define EMIT_TESTS $(DEFAULT_EMIT_TESTS) TARGET=ebb; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -s -C $$TARGET emit_tests TARGET=sampling_tests; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -s -C $$TARGET emit_tests + TARGET=event_code_tests; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -s -C $$TARGET emit_tests endef DEFAULT_INSTALL_RULE := $(INSTALL_RULE) @@ -41,12 +43,14 @@ override define INSTALL_RULE $(DEFAULT_INSTALL_RULE) TARGET=ebb; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -C $$TARGET install TARGET=sampling_tests; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -C $$TARGET install + TARGET=event_code_tests; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -C $$TARGET install endef clean: $(RM) $(TEST_GEN_PROGS) $(OUTPUT)/loop.o TARGET=ebb; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -C $$TARGET clean TARGET=sampling_tests; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -C $$TARGET clean + TARGET=event_code_tests; BUILD_TARGET=$$OUTPUT/$$TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -C $$TARGET clean ebb: TARGET=$@; BUILD_TARGET=$$OUTPUT/$$TARGET; mkdir -p $$BUILD_TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -k -C $$TARGET all @@ -54,4 +58,7 @@ ebb: sampling_tests: TARGET=$@; BUILD_TARGET=$$OUTPUT/$$TARGET; mkdir -p $$BUILD_TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -k -C $$TARGET all -.PHONY: all run_tests clean ebb sampling_tests +event_code_tests: + TARGET=$@; BUILD_TARGET=$$OUTPUT/$$TARGET; mkdir -p $$BUILD_TARGET; $(MAKE) OUTPUT=$$BUILD_TARGET -k -C $$TARGET all + +.PHONY: all run_tests clean ebb sampling_tests event_code_tests diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile new file mode 100644 index ..6377ae205064 --- /dev/null +++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0 +CFLAGS += -m64 + +TEST_GEN_PROGS := + +top_srcdir = ../../../../../.. +include ../../../lib.mk + +$(TEST_GEN_PROGS): ../../harness.c ../../utils.c ../event.c ../lib.c ../sampling_tests/misc.h ../sampling_tests/misc.c -- 2.31.1
[PATCH 05/35] selftest/powerpc/pmu: Add interface test for mmcra_ifm field of indirect call type
The testcase uses "instructions" event to check if the
Instruction filtering mode(IFM) bits are programmed correctly
for indirect branch type. Testcase checks if IFM bits are
programmed correctly to Monitor Mode Control Register A (MMCRA)
via perf interface for ISA v3.1 platform.
Signed-off-by: Kajol Jain
---
.../selftests/powerpc/pmu/branch_loops.S | 28
.../powerpc/pmu/sampling_tests/Makefile | 5 +-
.../sampling_tests/mmcra_bhrb_ind_call_test.c | 69 +++
3 files changed, 100 insertions(+), 2 deletions(-)
create mode 100644 tools/testing/selftests/powerpc/pmu/branch_loops.S
create mode 100644
tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c
Note:
- branch_loops.S is derived from the branch_loop.S in the path:
linux/tools/testing/selftests/powerpc/security/branch_loops.S
diff --git a/tools/testing/selftests/powerpc/pmu/branch_loops.S
b/tools/testing/selftests/powerpc/pmu/branch_loops.S
new file mode 100644
index ..de758dd3cecf
--- /dev/null
+++ b/tools/testing/selftests/powerpc/pmu/branch_loops.S
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright 2022, Kajol Jain, IBM Corp.
+ */
+
+#include
+
+ .text
+
+#define ITER_SHIFT 31
+
+FUNC_START(indirect_branch_loop)
+ li r3, 1
+ sldir3, r3, ITER_SHIFT
+
+1: cmpdi r3, 0
+ beqlr
+
+ addir3, r3, -1
+
+ ld r4, 2f@got(%r2)
+ mtctr r4
+ bctr
+
+ .balign 32
+2: b 1b
+
+FUNC_END(indirect_branch_loop)
diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
index 6508e6074bac..89def6e706c8 100644
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
@@ -4,9 +4,10 @@ CFLAGS += -m64
TEST_GEN_PROGS := mmcr0_exceptionbits_test mmcr0_cc56run_test
mmcr0_pmccext_test \
mmcr0_pmcjce_test mmcr0_fc56_pmc1ce_test
mmcr0_fc56_pmc56_test \
mmcr1_comb_test mmcr2_l2l3_test mmcr2_fcs_fch_test \
- mmcr3_src_test mmcra_thresh_marked_sample_test
mmcra_thresh_cmp_test
+ mmcr3_src_test mmcra_thresh_marked_sample_test
mmcra_thresh_cmp_test \
+ mmcra_bhrb_ind_call_test
top_srcdir = ../../../../../..
include ../../../lib.mk
-$(TEST_GEN_PROGS): ../../harness.c ../../utils.c ../event.c ../lib.c misc.c
misc.h ../loop.S
+$(TEST_GEN_PROGS): ../../harness.c ../../utils.c ../event.c ../lib.c misc.c
misc.h ../loop.S ../branch_loops.S
diff --git
a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c
b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c
new file mode 100644
index ..f0706730c099
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_ind_call_test.c
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Kajol Jain, IBM Corp.
+ */
+
+#include
+#include
+
+#include "../event.h"
+#include "misc.h"
+#include "utils.h"
+
+extern void indirect_branch_loop(void);
+
+/* Instructions */
+#define EventCode 0x500fa
+
+/* ifm field for indirect branch mode */
+#define IFM_IND_BRANCH 0x2
+
+/*
+ * A perf sampling test for mmcra
+ * field: ifm for bhrb ind_call.
+ */
+static int mmcra_bhrb_ind_call_test(void)
+{
+ struct event event;
+ u64 *intr_regs;
+
+ /*
+* Check for platform support for the test.
+* This test is only aplicable on power10
+*/
+ SKIP_IF(check_pvr_for_sampling_tests());
+ SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1));
+
+/* Init the event for the sampling test */
+ event_init_sampling(, EventCode);
+ event.attr.sample_regs_intr = platform_extended_mask;
+ event.attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
+ event.attr.branch_sample_type = PERF_SAMPLE_BRANCH_IND_CALL;
+ event.attr.exclude_kernel = 1;
+
+ FAIL_IF(event_open());
+ event.mmap_buffer = event_sample_buf_mmap(event.fd, 1);
+
+ FAIL_IF(event_enable());
+
+ /* workload to make the event overflow */
+ indirect_branch_loop();
+
+ FAIL_IF(event_disable());
+
+ intr_regs = get_intr_regs(, event.mmap_buffer);
+
+ /* Check for intr_regs */
+ FAIL_IF(!intr_regs);
+
+ /* Verify that ifm bit is set properly in MMCRA */
+ FAIL_IF(get_mmcra_ifm(get_reg_value(intr_regs, "MMCRA"), 5) !=
IFM_IND_BRANCH);
+
+ event_close();
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(mmcra_bhrb_ind_call_test,
"mmcra_bhrb_ind_call_test");
+}
--
2.31.1
[PATCH 35/35] selftest/powerpc/pmu: Add test for hardware cache events
The testcase checks if the transalation of a generic hardware cache
event is done properly via perf interface. The hardware cache events
has type as PERF_TYPE_HW_CACHE and each event points to raw event
code id.
Testcase checks different combination of cache level,
cache event operation type and cache event result type and verify
for a given event code, whether transalation matches with the current
cache event mappings via perf interface.
Signed-off-by: Kajol Jain
---
.../powerpc/pmu/event_code_tests/Makefile | 3 +-
.../hw_cache_event_type_test.c| 88 +++
2 files changed, 90 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/hw_cache_event_type_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 755993d210f2..4e07d7046457 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -6,7 +6,8 @@ TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_te
group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test \
blacklisted_events_test event_alternatives_tests_p9
event_alternatives_tests_p10 generic_events_valid_test \
group_constraint_l2l3_sel_test group_constraint_cache_test
group_constraint_thresh_cmp_test \
- group_constraint_unit_test group_constraint_thresh_ctl_test
group_constraint_thresh_sel_test
+ group_constraint_unit_test group_constraint_thresh_ctl_test
group_constraint_thresh_sel_test \
+ hw_cache_event_type_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/hw_cache_event_type_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/hw_cache_event_type_test.c
new file mode 100644
index ..a45b1da5b568
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/hw_cache_event_type_test.c
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Kajol Jain, IBM Corp.
+ */
+
+#include
+#include
+
+#include "../event.h"
+#include "utils.h"
+#include "../sampling_tests/misc.h"
+
+/*
+ * Load Missed L1, for power9 its pointing to PM_LD_MISS_L1_FIN (0x2c04e) and
+ * for power10 its pointing to PM_LD_MISS_L1 (0x3e054)
+ *
+ * Hardware cache level : PERF_COUNT_HW_CACHE_L1D
+ * Hardware cache event operation type : PERF_COUNT_HW_CACHE_OP_READ
+ * Hardware cache event result type : PERF_COUNT_HW_CACHE_RESULT_MISS
+ */
+#define EventCode_1 0x1
+/*
+ * Hardware cache level : PERF_COUNT_HW_CACHE_L1D
+ * Hardware cache event operation type : PERF_COUNT_HW_CACHE_OP_WRITE
+ * Hardware cache event result type : PERF_COUNT_HW_CACHE_RESULT_ACCESS
+ */
+#define EventCode_2 0x0100
+/*
+ * Hardware cache level : PERF_COUNT_HW_CACHE_DTLB
+ * Hardware cache event operation type : PERF_COUNT_HW_CACHE_OP_WRITE
+ * Hardware cache event result type : PERF_COUNT_HW_CACHE_RESULT_ACCESS
+ */
+#define EventCode_3 0x0103
+/*
+ * Hardware cache level : PERF_COUNT_HW_CACHE_L1D
+ * Hardware cache event operation type : PERF_COUNT_HW_CACHE_OP_READ
+ * Hardware cache event result type : Invalid ( >
PERF_COUNT_HW_CACHE_RESULT_MAX)
+ */
+#define EventCode_4 0x03
+
+/*
+ * A perf test to check valid hardware cache events.
+ */
+static int hw_cache_event_type_test(void)
+{
+ struct event event;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /* Skip for Generic compat PMU */
+ SKIP_IF(check_for_generic_compat_pmu());
+
+ /* Init the event to test hardware cache event */
+ event_init_opts(, EventCode_1, PERF_TYPE_HW_CACHE, "event");
+
+ /* Expected to success as its pointing to L1 load miss */
+ FAIL_IF(event_open());
+ event_close();
+
+ /* Init the event to test hardware cache event */
+ event_init_opts(, EventCode_2, PERF_TYPE_HW_CACHE, "event");
+
+ /* Expected to fail as the corresponding cache event entry have 0 in
that index */
+ FAIL_IF(!event_open());
+ event_close();
+
+ /* Init the event to test hardware cache event */
+ event_init_opts(, EventCode_3, PERF_TYPE_HW_CACHE, "event");
+
+ /* Expected to fail as the corresponding cache event entry have -1 in
that index */
+ FAIL_IF(!event_open());
+ event_close();
+
+ /* Init the event to test hardware cache event */
+ event_init_opts(, EventCode_4, PERF_TYPE_HW_CACHE, "event");
+
+ /* Expected to fail as hardware cache event result type is Invalid */
+ FAIL_IF(!event_open());
+ event_close();
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(hw_cache_event_type_test,
"hw_cache_event_type_test");
+}
--
2.31.1
[PATCH 31/35] selftest/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_cmp field
Thresh compare bits for a event is used to program thresh compare
field in Monitor Mode Control Register A (MMCRA: 9-18 bits for
power9 and MMCRA: 8-18 bits for power10). When scheduling events
as a group, all events in that group should match value in
thresh compare bits. Otherwise event open for the sibling
events will fail.
Testcase uses event code "0x401e0" as leader and another event
"0x101ec" as sibling event, and checks for thresh compare
constraint via perf interface.
Signed-off-by: Kajol Jain
---
.../powerpc/pmu/event_code_tests/Makefile | 2 +-
.../group_constraint_thresh_cmp_test.c| 96 +++
2 files changed, 97 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index dc27ca2ffcad..374044062561 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -5,7 +5,7 @@ TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_te
group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test \
group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test \
blacklisted_events_test event_alternatives_tests_p9
event_alternatives_tests_p10 generic_events_valid_test \
- group_constraint_l2l3_sel_test group_constraint_cache_test
+ group_constraint_l2l3_sel_test group_constraint_cache_test
group_constraint_thresh_cmp_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c
new file mode 100644
index ..9f1197104e8c
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_cmp_test.c
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Kajol Jain, IBM Corp.
+ */
+
+#include
+#include
+
+#include "../event.h"
+#include "utils.h"
+#include "../sampling_tests/misc.h"
+
+/*
+ * Primary PMU events used here is PM_MRK_INST_CMPL (0x401e0) and
+ * PM_THRESH_MET (0x101ec)
+ * Threshold event selection used is issue to complete for cycles
+ * Sampling criteria is Load or Store only sampling
+ */
+#define p9_EventCode_1 0x13e35340401e0
+#define p9_EventCode_2 0x17d34340101ec
+#define p9_EventCode_3 0x13e35340101ec
+#define p10_EventCode_1 0x35340401e0
+#define p10_EventCode_2 0x35340101ec
+
+/*
+ * Testcase for group constraint check of thresh_cmp bits which is
+ * used to program thresh compare field in Monitor Mode Control Register A
+ * (MMCRA: 9-18 bits for power9 and MMCRA: 8-18 bits for power10).
+ * All events in the group should match thresh compare bits otherwise
+ * event_open for the group will fail.
+ */
+static int group_constraint_thresh_cmp(void)
+{
+ struct event event, leader;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ if (have_hwcap2(PPC_FEATURE2_ARCH_3_1)) {
+ /* Init the events for the group contraint check for thresh_cmp
bits */
+ event_init(, p10_EventCode_1);
+
+ /* Add the thresh_cmp value for leader in config1 */
+ leader.attr.config1 = 1000;
+ FAIL_IF(event_open());
+
+ event_init(, p10_EventCode_2);
+
+ /* Add the different thresh_cmp value from the leader event in
config1 */
+ event.attr.config1 = 2000;
+
+ /* Expected to fail as sibling and leader event request
different thresh_cmp bits */
+ FAIL_IF(!event_open_with_group(, leader.fd));
+
+ event_close();
+
+ /* Init the event for the group contraint thresh compare test */
+ event_init(, p10_EventCode_2);
+
+ /* Add the same thresh_cmp value for leader and sibling event
in config1 */
+ event.attr.config1 = 1000;
+
+ /* Expected to succeed as sibling and leader event request same
thresh_cmp bits */
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+ } else {
+ /* Init the events for the group contraint check for thresh_cmp
bits */
+ event_init(, p9_EventCode_1);
+ FAIL_IF(event_open());
+
+ event_init(, p9_EventCode_2);
+
+ /* Expected to fail as sibling and leader event request
different thresh_cmp bits */
+ FAIL_IF(!event_open_with_group(, leader.fd));
+
+
[PATCH 34/35] selftest/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_sel field
Thresh select bits in the event code is used to program thresh_sel
field in Monitor Mode Control Register A (MMCRA: 45-47). When scheduling
events as a group, all events in that group should match value in these
bits. Otherwise event open for the sibling events will fail.
Testcase uses event code PM_MRK_INST_CMPL (0x401e0) as leader and
another event PM_THRESH_MET (0x101ec) as sibling event, and checks
if group constraint checks for thresh_sel field added correctly via
perf interface.
Signed-off-by: Kajol Jain
---
.../powerpc/pmu/event_code_tests/Makefile | 2 +-
.../group_constraint_thresh_sel_test.c| 63 +++
2 files changed, 64 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 16cbb2e52865..755993d210f2 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -6,7 +6,7 @@ TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_te
group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test \
blacklisted_events_test event_alternatives_tests_p9
event_alternatives_tests_p10 generic_events_valid_test \
group_constraint_l2l3_sel_test group_constraint_cache_test
group_constraint_thresh_cmp_test \
- group_constraint_unit_test group_constraint_thresh_ctl_test
+ group_constraint_unit_test group_constraint_thresh_ctl_test
group_constraint_thresh_sel_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c
new file mode 100644
index ..50a8cd843ce7
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_sel_test.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Kajol Jain, IBM Corp.
+ */
+
+#include
+#include
+
+#include "../event.h"
+#include "utils.h"
+#include "../sampling_tests/misc.h"
+
+/*
+ * Primary PMU events used here are PM_MRK_INST_CMPL (0x401e0) and
+ * PM_THRESH_MET (0x101ec).
+ * Threshold event selection used is issue to complete
+ * Sampling criteria is Load or Store only sampling
+ */
+#define EventCode_1 0x35340401e0
+#define EventCode_2 0x35540101ec
+#define EventCode_3 0x35340101ec
+
+/*
+ * Testcase for group constraint check of thresh_sel bits which is
+ * used to program thresh select field in Monitor Mode Control Register A
+ * (MMCRA: 45-57).
+ * All events in the group should match thresh sel bits otherwise
+ * event_open for the group will fail.
+ */
+static int group_constraint_thresh_sel(void)
+{
+ struct event event, leader;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /* Init the events for the group contraint thresh select test */
+ event_init(, EventCode_1);
+ FAIL_IF(event_open());
+
+ event_init(, EventCode_2);
+
+ /* Expected to fail as sibling and leader event request different
thresh_sel bits */
+ FAIL_IF(!event_open_with_group(, leader.fd));
+
+ event_close();
+
+ /* Init the event for the group contraint thresh select test */
+ event_init(, EventCode_3);
+
+/* Expected to succeed as sibling and leader event request same
thresh_sel bits */
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(group_constraint_thresh_sel,
"group_constraint_thresh_sel");
+}
--
2.31.1
[PATCH 33/35] selftest/powerpc/pmu: Add selftest for group constraint check for MMCRA thresh_ctl field
Thresh control bits in the event code is used to program thresh_ctl
field in Monitor Mode Control Register A (MMCRA: 48-55). When scheduling
events as a group, all events in that group should match value in these
bits. Otherwise event open for the sibling events will fail.
Testcase uses event code PM_MRK_INST_CMPL (0x401e0) as leader and
another event PM_THRESH_MET (101ec) as sibling event, and checks if
group constraint checks for thresh_ctl field added correctly via perf interface.
Signed-off-by: Kajol Jain
---
.../powerpc/pmu/event_code_tests/Makefile | 2 +-
.../group_constraint_thresh_ctl_test.c| 64 +++
2 files changed, 65 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index f72c73b5b79a..16cbb2e52865 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -6,7 +6,7 @@ TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_te
group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test \
blacklisted_events_test event_alternatives_tests_p9
event_alternatives_tests_p10 generic_events_valid_test \
group_constraint_l2l3_sel_test group_constraint_cache_test
group_constraint_thresh_cmp_test \
- group_constraint_unit_test
+ group_constraint_unit_test group_constraint_thresh_ctl_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c
new file mode 100644
index ..e0852ebc1671
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_thresh_ctl_test.c
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Kajol Jain, IBM Corp.
+ */
+
+#include
+#include
+
+#include "../event.h"
+#include "utils.h"
+#include "../sampling_tests/misc.h"
+
+/*
+ * Primary PMU events used here are PM_MRK_INST_CMPL (0x401e0) and
+ * PM_THRESH_MET (0x101ec).
+ * Threshold event selection used is issue to complete and issue to
+ * finished for cycles
+ * Sampling criteria is Load or Store only sampling
+ */
+#define EventCode_1 0x35340401e0
+#define EventCode_2 0x34340101ec
+#define EventCode_3 0x35340101ec
+
+/*
+ * Testcase for group constraint check of thresh_ctl bits which is
+ * used to program thresh compare field in Monitor Mode Control Register A
+ * (MMCR0: 48-55).
+ * All events in the group should match thresh ctl bits otherwise
+ * event_open for the group will fail.
+ */
+static int group_constraint_thresh_ctl(void)
+{
+ struct event event, leader;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /* Init the events for the group contraint thresh control test */
+ event_init(, EventCode_1);
+ FAIL_IF(event_open());
+
+ event_init(, EventCode_2);
+
+ /* Expected to fail as sibling and leader event request different
thresh_ctl bits */
+ FAIL_IF(!event_open_with_group(, leader.fd));
+
+ event_close();
+
+ /* Init the event for the group contraint thresh control test */
+ event_init(, EventCode_3);
+
+/* Expected to succeed as sibling and leader event request same
thresh_ctl bits */
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(group_constraint_thresh_ctl,
"group_constraint_thresh_ctl");
+}
--
2.31.1
[PATCH 21/35] selftest/powerpc/pmu: Add selftest for group constraint for MMCRA Sampling Mode field
From: Athira Rajeev
Testcase for reserved bits in Monitor Mode Control
Register A (MMCRA) Random Sampling Mode (SM) value.
As per Instruction Set Architecture (ISA), the values
0x5, 0x9, 0xD, 0x19, 0x1D, 0x1A, 0x1E are reserved
for sampling mode field. Test that having these reserved
bit values should cause event_open to fail. Input event
code in testcases uses these sampling bits along with
401e0 (PM_MRK_INST_CMPL).
Signed-off-by: Athira Rajeev
---
.../powerpc/pmu/event_code_tests/Makefile | 2 +-
...eserved_bits_mmcra_sample_elig_mode_test.c | 77 +++
2 files changed, 78 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/reserved_bits_mmcra_sample_elig_mode_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 5b61fb0b9fd6..5dd482843572 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -2,7 +2,7 @@
CFLAGS += -m64
TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
- group_constraint_repeat_test group_constraint_radix_scope_qual_test
+ group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/reserved_bits_mmcra_sample_elig_mode_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/reserved_bits_mmcra_sample_elig_mode_test.c
new file mode 100644
index ..4c119c821b99
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/reserved_bits_mmcra_sample_elig_mode_test.c
@@ -0,0 +1,77 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+/*
+ * Testcase for reserved bits in Monitor Mode Control
+ * Register A (MMCRA) Random Sampling Mode (SM) value.
+ * As per Instruction Set Architecture (ISA), the values
+ * 0x5, 0x9, 0xD, 0x19, 0x1D, 0x1A, 0x1E are reserved
+ * for sampling mode field. Test that having these reserved
+ * bit values should cause event_open to fail.
+ * Input event code uses these sampling bits along with
+ * 401e0 (PM_MRK_INST_CMPL).
+ */
+
+static int reserved_bits_mmcra_sample_elig_mode(void)
+{
+ struct event event;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /* Skip for Generic compat PMU */
+ SKIP_IF(check_for_generic_compat_pmu());
+
+ /*
+* MMCRA Random Sampling Mode (SM) values: 0x5
+* 0x9, 0xD, 0x19, 0x1D, 0x1A, 0x1E is reserved.
+* Expected to fail when using these reserved values.
+*/
+ event_init(, 0x50401e0);
+ FAIL_IF(!event_open());
+
+ event_init(, 0x90401e0);
+ FAIL_IF(!event_open());
+
+ event_init(, 0xD0401e0);
+ FAIL_IF(!event_open());
+
+ event_init(, 0x190401e0);
+ FAIL_IF(!event_open());
+
+ event_init(, 0x1D0401e0);
+ FAIL_IF(!event_open());
+
+ event_init(, 0x1A0401e0);
+ FAIL_IF(!event_open());
+
+ event_init(, 0x1E0401e0);
+ FAIL_IF(!event_open());
+
+ /*
+* MMCRA Random Sampling Mode (SM) value 0x10
+* is reserved in power10 and 0xC is reserved in
+* power9.
+*/
+ if (PVR_VER(mfspr(SPRN_PVR)) == POWER10) {
+ event_init(, 0x100401e0);
+ FAIL_IF(!event_open());
+ } else if (PVR_VER(mfspr(SPRN_PVR)) == POWER9) {
+ event_init(, 0xC0401e0);
+ FAIL_IF(!event_open());
+ }
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(reserved_bits_mmcra_sample_elig_mode,
+ "reserved_bits_mmcra_sample_elig_mode");
+}
--
2.31.1
[PATCH 32/35] selftest/powerpc/pmu: Add selftest for group constraint for unit and pmc field in p9
Unit and pmu bits in the event code is used to program unit and pmc
fields in Monitor Mode Control Register 1 (MMCR1). For power9 platform,
incase unit field value is within 6 to 9, one of the event in the group
should use PMC4. Otherwise event_open should fail for that group.
Signed-off-by: Kajol Jain
---
.../powerpc/pmu/event_code_tests/Makefile | 3 +-
.../group_constraint_unit_test.c | 74 +++
2 files changed, 76 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 374044062561..f72c73b5b79a 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -5,7 +5,8 @@ TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_te
group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test \
group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test \
blacklisted_events_test event_alternatives_tests_p9
event_alternatives_tests_p10 generic_events_valid_test \
- group_constraint_l2l3_sel_test group_constraint_cache_test
group_constraint_thresh_cmp_test
+ group_constraint_l2l3_sel_test group_constraint_cache_test
group_constraint_thresh_cmp_test \
+ group_constraint_unit_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c
new file mode 100644
index ..a2c18923dcec
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_unit_test.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Kajol Jain, IBM Corp.
+ */
+
+#include
+#include
+
+#include "../event.h"
+#include "utils.h"
+#include "../sampling_tests/misc.h"
+
+/* All successful D-side store dispatches for this thread with PMC 2 */
+#define EventCode_1 0x26080
+/* All successful D-side store dispatches for this thread with PMC 4 */
+#define EventCode_2 0x46080
+/* All successful D-side store dispatches for this thread that were L2 Miss
with PMC 3 */
+#define EventCode_3 0x36880
+
+/*
+ * Testcase for group constraint check of unit and pmc bits which is
+ * used to program corresponding unit and pmc field in Monitor Mode
+ * Control Register 1 (MMCR1)
+ * One of the event in the group should use PMC 4 incase units field
+ * value is within 6 to 9 otherwise event_open for the group will fail.
+ */
+static int group_constraint_unit(void)
+{
+ struct event *e, events[3];
+
+ /*
+* Check for platform support for the test.
+* Constraint to use PMC4 with one of the event in group,
+* when the unit is within 6 to 9 is only applicable on
+* power9.
+*/
+ SKIP_IF(platform_check_for_tests());
+ SKIP_IF(have_hwcap2(PPC_FEATURE2_ARCH_3_1));
+
+ /* Init the events for the group contraint check for unit bits */
+ e = [0];
+ event_init(e, EventCode_1);
+
+/* Expected to fail as PMC 4 is not used with unit field value 6 to 9
*/
+ FAIL_IF(!event_open([0]));
+
+ /* Init the events for the group contraint check for unit bits */
+ e = [1];
+ event_init(e, EventCode_2);
+
+ /* Expected to pass as PMC 4 is used with unit field value 6 to 9 */
+ FAIL_IF(event_open([1]));
+
+ /* Init the event for the group contraint unit test */
+ e = [2];
+ event_init(e, EventCode_3);
+
+ /* Expected to fail as PMC4 is not being used */
+ FAIL_IF(!event_open_with_group([2], events[0].fd));
+
+ /* Expected to succeed as event using PMC4 */
+ FAIL_IF(event_open_with_group([2], events[1].fd));
+
+ event_close([0]);
+ event_close([1]);
+ event_close([2]);
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(group_constraint_unit, "group_constraint_unit");
+}
--
2.31.1
[PATCH 30/35] selftest/powerpc/pmu: Add selftest for group constraint check for MMCR1 cache bits
Data and instruction cache qualifier bits in the event code is
used to program cache select field in Monitor Mode Control
Register 1 (MMCR1: 16-17). When scheduling events as a group, all
events in that group should match value in these bits. Otherwise
event open for the sibling events will fail.
Testcase uses event code "0x1100fc" as leader and other events
like "0x23e054" and "0x13e054" as sibling events to checks for
l1 cache select field constraints via perf interface.
Signed-off-by: Kajol Jain
---
.../powerpc/pmu/event_code_tests/Makefile | 2 +-
.../group_constraint_cache_test.c | 60 +++
2 files changed, 61 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 58e1a7a2ed4e..dc27ca2ffcad 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -5,7 +5,7 @@ TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_te
group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test \
group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test \
blacklisted_events_test event_alternatives_tests_p9
event_alternatives_tests_p10 generic_events_valid_test \
- group_constraint_l2l3_sel_test
+ group_constraint_l2l3_sel_test group_constraint_cache_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c
new file mode 100644
index ..f4be05aa3a3d
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_cache_test.c
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Kajol Jain, IBM Corp.
+ */
+
+#include
+#include
+
+#include "../event.h"
+#include "utils.h"
+#include "../sampling_tests/misc.h"
+
+/* All L1 D cache load references counted at finish, gated by reject */
+#define EventCode_1 0x1100fc
+/* Load Missed L1 */
+#define EventCode_2 0x23e054
+/* Load Missed L1 */
+#define EventCode_3 0x13e054
+
+/*
+ * Testcase for group constraint check of data and instructions
+ * cache qualifier bits which is used to program cache select field in
+ * Monitor Mode Control Register 1 (MMCR1: 16-17) for l1 cache.
+ * All events in the group should match cache select bits otherwise
+ * event_open for the group will fail.
+ */
+static int group_constraint_cache(void)
+{
+ struct event event, leader;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /* Init the events for the group contraint check for l1 cache select
bits */
+ event_init(, EventCode_1);
+ FAIL_IF(event_open());
+
+ event_init(, EventCode_2);
+
+ /* Expected to fail as sibling event doesn't request same l1 cache
select bits as leader */
+ FAIL_IF(!event_open_with_group(, leader.fd));
+
+ event_close();
+
+ /* Init the event for the group contraint l1 cache select test */
+ event_init(, EventCode_3);
+
+ /* Expected to succeed as sibling event request same l1 cache select
bits as leader */
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(group_constraint_cache, "group_constraint_cache");
+}
--
2.31.1
[PATCH 08/35] selftest/powerpc/pmu: Add interface test for bhrb disable field
The testcase uses "instructions" event to generate the
samples and fetch Monitor Mode Control Register A (MMCRA)
when overflow. Branch History Rolling Buffer(bhrb) disable bit
is part of MMCRA which need to be verified by perf interface.
Testcase checks if the bhrb disable bit of MMCRA register is
programmed correctly via perf interface for ISA v3.1 platform
Also make get_mmcra_ifm return type as u64.
Signed-off-by: Kajol Jain
---
.../powerpc/pmu/sampling_tests/Makefile | 3 +-
.../powerpc/pmu/sampling_tests/misc.h | 2 +-
.../sampling_tests/mmcra_bhrb_disable_test.c | 66 +++
3 files changed, 69 insertions(+), 2 deletions(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
index 53569fbb1cda..f4da49d55d57 100644
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/Makefile
@@ -5,7 +5,8 @@ TEST_GEN_PROGS := mmcr0_exceptionbits_test mmcr0_cc56run_test
mmcr0_pmccext_test
mmcr0_pmcjce_test mmcr0_fc56_pmc1ce_test
mmcr0_fc56_pmc56_test \
mmcr1_comb_test mmcr2_l2l3_test mmcr2_fcs_fch_test \
mmcr3_src_test mmcra_thresh_marked_sample_test
mmcra_thresh_cmp_test \
- mmcra_bhrb_ind_call_test mmcra_bhrb_any_test
mmcra_bhrb_cond_test
+ mmcra_bhrb_ind_call_test mmcra_bhrb_any_test
mmcra_bhrb_cond_test \
+ mmcra_bhrb_disable_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h
b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h
index c0e923f38793..874a1596add8 100644
--- a/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h
+++ b/tools/testing/selftests/powerpc/pmu/sampling_tests/misc.h
@@ -188,7 +188,7 @@ static inline int get_mmcra_sm(u64 mmcra, int pmc)
return ((mmcra >> 42) & 0x3);
}
-static inline int get_mmcra_bhrb_disable(u64 mmcra, int pmc)
+static inline u64 get_mmcra_bhrb_disable(u64 mmcra, int pmc)
{
if (pvr == POWER10)
return mmcra & BHRB_DISABLE;
diff --git
a/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c
b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c
new file mode 100644
index ..186a853c0f62
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/sampling_tests/mmcra_bhrb_disable_test.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Kajol Jain, IBM Corp.
+ */
+
+#include
+#include
+
+#include "../event.h"
+#include "misc.h"
+#include "utils.h"
+
+extern void thirty_two_instruction_loop(int loops);
+
+/* Instructions */
+#define EventCode 0x500fa
+
+/*
+ * A perf sampling test for mmcra
+ * field: bhrb_disable.
+ */
+static int mmcra_bhrb_disable_test(void)
+{
+ struct event event;
+ u64 *intr_regs;
+
+ /*
+* Check for platform support for the test.
+* This test is only aplicable on power10
+*/
+ SKIP_IF(check_pvr_for_sampling_tests());
+ SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1));
+
+/* Init the event for the sampling test */
+ event_init_sampling(, EventCode);
+ event.attr.sample_regs_intr = platform_extended_mask;
+ event.attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
+ event.attr.branch_sample_type = PERF_SAMPLE_BRANCH_ANY;
+ event.attr.exclude_kernel = 1;
+
+ FAIL_IF(event_open());
+ event.mmap_buffer = event_sample_buf_mmap(event.fd, 1);
+
+ FAIL_IF(event_enable());
+
+ /* workload to make the event overflow */
+ thirty_two_instruction_loop(1);
+
+ FAIL_IF(event_disable());
+
+ intr_regs = get_intr_regs(, event.mmap_buffer);
+
+ /* Check for intr_regs */
+ FAIL_IF(!intr_regs);
+
+ /* Verify that bhrb_disable bit is not set in MMCRA */
+ FAIL_IF(get_mmcra_bhrb_disable(get_reg_value(intr_regs, "MMCRA"), 5));
+
+ event_close();
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(mmcra_bhrb_disable_test, "mmcra_bhrb_disable_test");
+}
--
2.31.1
[PATCH 29/35] selftest/powerpc/pmu: Add selftest for group constraint check for MMCR0 l2l3_sel bits
In power10, L2L3 select bits in the event code is used to
program l2l3_sel field in Monitor Mode Control Register 0
(MMCR0: 56-60). When scheduling events as a group,
all events in that group should match value in these bits.
Otherwise event open for the sibling events will fail.
Testcase uses event code "0x01046080" as leader and another events
"0x26880" and "0x01026880" as sibling events, and checks for
l2l3_sel constraints via perf interface for ISA v3.1 platform.
Signed-off-by: Kajol Jain
---
.../powerpc/pmu/event_code_tests/Makefile | 3 +-
.../group_constraint_l2l3_sel_test.c | 64 +++
2 files changed, 66 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 0d56f1ef530f..58e1a7a2ed4e 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -4,7 +4,8 @@ CFLAGS += -m64
TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test \
group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test \
- blacklisted_events_test event_alternatives_tests_p9
event_alternatives_tests_p10 generic_events_valid_test
+ blacklisted_events_test event_alternatives_tests_p9
event_alternatives_tests_p10 generic_events_valid_test \
+ group_constraint_l2l3_sel_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c
new file mode 100644
index ..85a636886069
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Kajol Jain, IBM Corp.
+ */
+
+#include
+#include
+
+#include "../event.h"
+#include "utils.h"
+#include "../sampling_tests/misc.h"
+
+/* All successful D-side store dispatches for this thread */
+#define EventCode_1 0x01046080
+/* All successful D-side store dispatches for this thread that were L2 Miss */
+#define EventCode_2 0x26880
+/* All successful D-side store dispatches for this thread that were L2 Miss */
+#define EventCode_3 0x01026880
+
+/*
+ * Testcase for group constraint check of l2l3_sel bits which is
+ * used to program l2l3 select field in Monitor Mode Control Register 0
+ * (MMCR0: 56-60).
+ * All events in the group should match l2l3_sel bits otherwise
+ * event_open for the group should fail.
+ */
+static int group_constraint_l2l3_sel(void)
+{
+ struct event event, leader;
+
+ /*
+* Check for platform support for the test.
+* This test is only aplicable on power10
+*/
+ SKIP_IF(platform_check_for_tests());
+ SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1));
+
+ /* Init the events for the group contraint check for l2l3_sel bits */
+ event_init(, EventCode_1);
+ FAIL_IF(event_open());
+
+ event_init(, EventCode_2);
+
+ /* Expected to fail as sibling event doesn't request same l2l3_sel bits
as leader */
+ FAIL_IF(!event_open_with_group(, leader.fd));
+
+ event_close();
+
+ /* Init the event for the group contraint l2l3_sel test */
+ event_init(, EventCode_3);
+
+ /* Expected to succeed as sibling event request same l2l3_sel bits as
leader */
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(group_constraint_l2l3_sel,
"group_constraint_l2l3_sel");
+}
--
2.31.1
[PATCH 28/35] selftest/powerpc/pmu: Add selftest for PERF_TYPE_HARDWARE events valid check
From: Athira Rajeev
Testcase to ensure that using invalid event in generic
event for PERF_TYPE_HARDWARE will fail. Invalid generic
events in power10 are:
- PERF_COUNT_HW_BUS_CYCLES
- PERF_COUNT_HW_STALLED_CYCLES_FRONTEND
- PERF_COUNT_HW_STALLED_CYCLES_BACKEND
- PERF_COUNT_HW_REF_CPU_CYCLES
Invalid generic events in power9 are:
- PERF_COUNT_HW_BUS_CYCLES
- PERF_COUNT_HW_REF_CPU_CYCLES
Testcase does event open for valid and invalid generic
events to ensure event open works for all valid events
and fails for invalid events.
Signed-off-by: Athira Rajeev
---
.../powerpc/pmu/event_code_tests/Makefile | 2 +-
.../generic_events_valid_test.c | 130 ++
2 files changed, 131 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/generic_events_valid_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 50bcc036dddf..0d56f1ef530f 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -4,7 +4,7 @@ CFLAGS += -m64
TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test \
group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test \
- blacklisted_events_test event_alternatives_tests_p9
event_alternatives_tests_p10
+ blacklisted_events_test event_alternatives_tests_p9
event_alternatives_tests_p10 generic_events_valid_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/generic_events_valid_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/generic_events_valid_test.c
new file mode 100644
index ..0d237c15d3f2
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/generic_events_valid_test.c
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include
+#include
+#include
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+/*
+ * Testcase to ensure that using invalid event in generic
+ * event for PERF_TYPE_HARDWARE should fail
+ */
+
+static int generic_events_valid_test(void)
+{
+ struct event event;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /* generic events is different in compat_mode */
+ SKIP_IF(check_for_generic_compat_pmu());
+
+ /*
+* Invalid generic events in power10:
+* - PERF_COUNT_HW_BUS_CYCLES
+* - PERF_COUNT_HW_STALLED_CYCLES_FRONTEND
+* - PERF_COUNT_HW_STALLED_CYCLES_BACKEND
+* - PERF_COUNT_HW_REF_CPU_CYCLES
+*/
+ if (PVR_VER(mfspr(SPRN_PVR)) == POWER10) {
+ event_init_opts(, PERF_COUNT_HW_CPU_CYCLES,
PERF_TYPE_HARDWARE, "event");
+ FAIL_IF(event_open());
+ event_close();
+
+ event_init_opts(, PERF_COUNT_HW_INSTRUCTIONS,
+ PERF_TYPE_HARDWARE, "event");
+ FAIL_IF(event_open());
+ event_close();
+
+ event_init_opts(, PERF_COUNT_HW_CACHE_REFERENCES,
+ PERF_TYPE_HARDWARE, "event");
+ FAIL_IF(event_open());
+ event_close();
+
+ event_init_opts(, PERF_COUNT_HW_CACHE_MISSES,
PERF_TYPE_HARDWARE, "event");
+ FAIL_IF(event_open());
+ event_close();
+
+ event_init_opts(, PERF_COUNT_HW_BRANCH_INSTRUCTIONS,
+ PERF_TYPE_HARDWARE, "event");
+ FAIL_IF(event_open());
+ event_close();
+
+ event_init_opts(, PERF_COUNT_HW_BRANCH_MISSES,
PERF_TYPE_HARDWARE, "event");
+ FAIL_IF(event_open());
+ event_close();
+
+ event_init_opts(, PERF_COUNT_HW_BUS_CYCLES,
PERF_TYPE_HARDWARE, "event");
+ FAIL_IF(!event_open());
+
+ event_init_opts(, PERF_COUNT_HW_STALLED_CYCLES_FRONTEND,
+ PERF_TYPE_HARDWARE, "event");
+ FAIL_IF(!event_open());
+
+ event_init_opts(, PERF_COUNT_HW_STALLED_CYCLES_BACKEND,
+ PERF_TYPE_HARDWARE, "event");
+ FAIL_IF(!event_open());
+
+ event_init_opts(, PERF_COUNT_HW_REF_CPU_CYCLES,
PERF_TYPE_HARDWARE, "event");
+ FAIL_IF(!event_open());
+ } else if (PVR_VER(mfspr(SPRN_PVR)) == POWER9) {
+ /*
+* Invalid generic events in power9:
+* - PERF_COUNT_HW_BUS_CYCLES
+* - PERF_COUNT_HW_REF_CPU_CYCLES
+
[PATCH 27/35] selftest/powerpc/pmu: Add selftest for event alternatives for power10
From: Athira Rajeev
Platform specific PMU supports alternative event for some
of the event codes. During perf_event_open, it any event
group doesn't match constraint check criteria, further lookup
is done to find alternative event. Code checks to see if
it is possible to schedule event as group using alternative
events.
Testcase exercises the alternative event find code for
power10. Example, Using PMC1 to PMC4 in a group and again
trying to schedule PM_CYC_ALT (0x0001e) will fail since
this exceeds number of programmable events in group. But
since 0x600f4 is an alternative event for 0x0001e, it is
possible to use 0x0001e in the group. Testcase uses such
combination all events in power10 which has alternative event.
Signed-off-by: Athira Rajeev
---
.../powerpc/pmu/event_code_tests/Makefile | 2 +-
.../event_alternatives_tests_p10.c| 109 ++
2 files changed, 110 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/event_alternatives_tests_p10.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index cf27e612290e..50bcc036dddf 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -4,7 +4,7 @@ CFLAGS += -m64
TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test \
group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test \
- blacklisted_events_test event_alternatives_tests_p9
+ blacklisted_events_test event_alternatives_tests_p9
event_alternatives_tests_p10
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/event_alternatives_tests_p10.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/event_alternatives_tests_p10.c
new file mode 100644
index ..8be7aada6523
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/event_alternatives_tests_p10.c
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+#define PM_RUN_CYC_ALT 0x200f4
+#define PM_INST_DISP 0x200f2
+#define PM_BR_2PATH 0x20036
+#define PM_LD_MISS_L1 0x3e054
+#define PM_RUN_INST_CMPL_ALT 0x400fa
+
+#define EventCode_1 0x100fc
+#define EventCode_2 0x200fa
+#define EventCode_3 0x300fc
+#define EventCode_4 0x400fc
+
+/*
+ * Check for event alternatives.
+ */
+
+static int event_alternatives_tests_p10(void)
+{
+ struct event *e, events[5];
+ int i;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /*
+* PVR check is used here since PMU specific data like
+* alternative events is handled by respective PMU driver
+* code and using PVR will work correctly for all cases
+* including generic compat mode.
+*/
+ SKIP_IF(PVR_VER(mfspr(SPRN_PVR)) != POWER10);
+
+ SKIP_IF(check_for_generic_compat_pmu());
+
+ /*
+* Test for event alternative for 0x0001e
+* and 0x2.
+*/
+ e = [0];
+ event_init(e, 0x0001e);
+
+ e = [1];
+ event_init(e, EventCode_1);
+
+ e = [2];
+ event_init(e, EventCode_2);
+
+ e = [3];
+ event_init(e, EventCode_3);
+
+ e = [4];
+ event_init(e, EventCode_4);
+
+ FAIL_IF(event_open([0]));
+
+ /*
+* Expected to pass since 0x0001e has alternative event
+* 0x600f4 in PMC6. So it can go in with other events
+* in PMC1 to PMC4.
+*/
+ for (i = 1; i < 5; i++)
+ FAIL_IF(event_open_with_group([i], events[0].fd));
+
+ for (i = 0; i < 5; i++)
+ event_close([i]);
+
+ e = [0];
+ event_init(e, 0x2);
+
+ e = [1];
+ event_init(e, EventCode_1);
+
+ e = [2];
+ event_init(e, EventCode_2);
+
+ e = [3];
+ event_init(e, EventCode_3);
+
+ e = [4];
+ event_init(e, EventCode_4);
+
+ FAIL_IF(event_open([0]));
+
+ /*
+* Expected to pass since 0x00020 has alternative event
+* 0x500fa in PMC5. So it can go in with other events
+* in PMC1 to PMC4.
+*/
+ for (i = 1; i < 5; i++)
+ FAIL_IF(event_open_with_group([i], events[0].fd));
+
+ for (i = 0; i < 5; i++)
+ event_close([i]);
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(event_alternatives_tests_p10,
"event_alternatives_tests_p10");
+}
--
2.31.1
[PATCH 26/35] selftest/powerpc/pmu: Add selftest for event alternatives for power9
From: Athira Rajeev
Platform specific PMU supports alternative event for some
of the event codes. During perf_event_open, it any event
group doesn't match constraint check criteria, further lookup
is done to find alternative event. Code checks to see if
it is possible to schedule event as group using alternative
events.
Testcase exercises the alternative event find code for
power9. Example, since events in same PMC can't go in as
a group, ideally using PM_RUN_CYC_ALT (0x200f4) and
PM_BR_TAKEN_CMPL (0x200fa) will fail. But since RUN_CYC
(0x600f4) is alternative event for 0x200f4, it is possible
to use 0x600f4 and 0x200fa as group. Testcase uses such
combination for all events in power9 which has an
alternative event.
Signed-off-by: Athira Rajeev
---
.../powerpc/pmu/event_code_tests/Makefile | 2 +-
.../event_alternatives_tests_p9.c | 116 ++
2 files changed, 117 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/event_alternatives_tests_p9.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index a5916a938154..cf27e612290e 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -4,7 +4,7 @@ CFLAGS += -m64
TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test \
group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test \
- blacklisted_events_test
+ blacklisted_events_test event_alternatives_tests_p9
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/event_alternatives_tests_p9.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/event_alternatives_tests_p9.c
new file mode 100644
index ..f7dcf0e0447c
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/event_alternatives_tests_p9.c
@@ -0,0 +1,116 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+#define PM_RUN_CYC_ALT 0x200f4
+#define PM_INST_DISP 0x200f2
+#define PM_BR_2PATH 0x20036
+#define PM_LD_MISS_L1 0x3e054
+#define PM_RUN_INST_CMPL_ALT 0x400fa
+
+#define EventCode_1 0x200fa
+#define EventCode_2 0x200fc
+#define EventCode_3 0x300fc
+#define EventCode_4 0x400fc
+
+/*
+ * Check for event alternatives.
+ */
+
+static int event_alternatives_tests_p9(void)
+{
+ struct event event, leader;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /*
+* PVR check is used here since PMU specific data like
+* alternative events is handled by respective PMU driver
+* code and using PVR will work correctly for all cases
+* including generic compat mode.
+*/
+ SKIP_IF(PVR_VER(mfspr(SPRN_PVR)) != POWER9);
+
+ /* Skip for generic compat PMU */
+ SKIP_IF(check_for_generic_compat_pmu());
+
+ /* Init the event for PM_RUN_CYC_ALT */
+ event_init(, PM_RUN_CYC_ALT);
+ FAIL_IF(event_open());
+
+ event_init(, EventCode_1);
+
+ /*
+* Expected to pass since PM_RUN_CYC_ALT in PMC2 has alternative event
+* 0x600f4. So it can go in with EventCode_1 which is using PMC2
+*/
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+
+ event_init(, PM_INST_DISP);
+ FAIL_IF(event_open());
+
+ event_init(, EventCode_2);
+ /*
+* Expected to pass since PM_INST_DISP in PMC2 has alternative event
+* 0x300f2 in PMC3. So it can go in with EventCode_2 which is using PMC2
+*/
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+
+ event_init(, PM_BR_2PATH);
+ FAIL_IF(event_open());
+
+ event_init(, EventCode_2);
+ /*
+* Expected to pass since PM_BR_2PATH in PMC2 has alternative event
+* 0x40036 in PMC4. So it can go in with EventCode_2 which is using PMC2
+*/
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+
+ event_init(, PM_LD_MISS_L1);
+ FAIL_IF(event_open());
+
+ event_init(, EventCode_3);
+ /*
+* Expected to pass since PM_LD_MISS_L1 in PMC3 has alternative event
+* 0x400f0 in PMC4. So it can go in with EventCode_3 which is using PMC3
+*/
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+
+ event_init(, PM_RUN_INST_CMPL_ALT);
+
[PATCH 24/35] selftest/powerpc/pmu: Add selftest for reserved bit check for MMCRA thresh_ctl field
From: Athira Rajeev
Testcase for reserved bits in Monitor Mode
Control Register A (MMCRA) thresh_ctl bits.
For MMCRA[48:51]/[52:55]) Threshold Start/Stop,
0b/0b is reserved.
Signed-off-by: Athira Rajeev
---
.../powerpc/pmu/event_code_tests/Makefile | 2 +-
.../reserved_bits_mmcra_thresh_ctl_test.c | 44 +++
2 files changed, 45 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/reserved_bits_mmcra_thresh_ctl_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 1ce1ef4586fd..e50570794337 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -3,7 +3,7 @@ CFLAGS += -m64
TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test \
- group_constraint_mmcra_sample_test invalid_event_code_test
+ group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/reserved_bits_mmcra_thresh_ctl_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/reserved_bits_mmcra_thresh_ctl_test.c
new file mode 100644
index ..4ea1c2f8913f
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/reserved_bits_mmcra_thresh_ctl_test.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+/*
+ * Testcase for reserved bits in Monitor Mode
+ * Control Register A (MMCRA) thresh_ctl bits.
+ * For MMCRA[48:51]/[52:55]) Threshold Start/Stop,
+ * 0b/0b is reserved.
+ */
+
+static int reserved_bits_mmcra_thresh_ctl(void)
+{
+ struct event event;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /* Skip for Generic compat PMU */
+ SKIP_IF(check_for_generic_compat_pmu());
+
+ /*
+* MMCRA[48:51]/[52:55]) Threshold Start/Stop
+* events Selection. 0b/0b is reserved.
+* Expected to fail when using these reserved values.
+*/
+ event_init(, 0xf0340401e0);
+ FAIL_IF(!event_open());
+
+ event_init(, 0x0f340401e0);
+ FAIL_IF(!event_open());
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(reserved_bits_mmcra_thresh_ctl,
"reserved_bits_mmcra_thresh_ctl");
+}
--
2.31.1
[PATCH 25/35] selftest/powerpc/pmu: Add selftest for blacklist events check in power9
From: Athira Rajeev
Some of the events are blacklisted in power9. The list
of blacklisted events are noted in power9-events-list.h
When trying to do event open for any of these blacklisted
event will cause a failure. Testcase ensures that using
blacklisted events will cause event_open to fail in power9.
This test is only applicable on power9 DD2.1 and DD2.2 and
hence test adds checks to skip on other platforms.
Signed-off-by: Athira Rajeev
---
.../powerpc/pmu/event_code_tests/Makefile | 3 +-
.../blacklisted_events_test.c | 132 ++
2 files changed, 134 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/blacklisted_events_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index e50570794337..a5916a938154 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -3,7 +3,8 @@ CFLAGS += -m64
TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test \
- group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test
+ group_constraint_mmcra_sample_test invalid_event_code_test
reserved_bits_mmcra_thresh_ctl_test \
+ blacklisted_events_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/blacklisted_events_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/blacklisted_events_test.c
new file mode 100644
index ..fafeff19cb34
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/blacklisted_events_test.c
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include
+#include
+#include
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+#define PM_DTLB_MISS_16G 0x1c058
+#define PM_DERAT_MISS_2M 0x1c05a
+#define PM_DTLB_MISS_2M 0x1c05c
+#define PM_MRK_DTLB_MISS_1G 0x1d15c
+#define PM_DTLB_MISS_4K 0x2c056
+#define PM_DERAT_MISS_1G 0x2c05a
+#define PM_MRK_DERAT_MISS_2M 0x2d152
+#define PM_MRK_DTLB_MISS_4K 0x2d156
+#define PM_MRK_DTLB_MISS_16G 0x2d15e
+#define PM_DTLB_MISS_64K 0x3c056
+#define PM_MRK_DERAT_MISS_1G 0x3d152
+#define PM_MRK_DTLB_MISS_64K 0x3d156
+#define PM_DISP_HELD_SYNC_HOLD 0x4003c
+#define PM_DTLB_MISS_16M 0x4c056
+#define PM_DTLB_MISS_1G 0x4c05a
+#define PM_MRK_DTLB_MISS_16M 0x4c15e
+#define PM_MRK_ST_DONE_L2 0x10134
+#define PM_RADIX_PWC_L1_HIT 0x1f056
+#define PM_FLOP_CMPL 0x100f4
+#define PM_MRK_NTF_FIN 0x20112
+#define PM_RADIX_PWC_L2_HIT 0x2d024
+#define PM_IFETCH_THROTTLE 0x3405e
+#define PM_MRK_L2_TM_ST_ABORT_SISTER 0x3e15c
+#define PM_RADIX_PWC_L3_HIT 0x3f056
+#define PM_RUN_CYC_SMT2_MODE 0x3006c
+#define PM_TM_TX_PASS_RUN_INST 0x4e014
+
+#define PVR_POWER9_CUMULUS 0x2000
+
+int blacklist_events_dd21[] = {
+ PM_MRK_ST_DONE_L2,
+ PM_RADIX_PWC_L1_HIT,
+ PM_FLOP_CMPL,
+ PM_MRK_NTF_FIN,
+ PM_RADIX_PWC_L2_HIT,
+ PM_IFETCH_THROTTLE,
+ PM_MRK_L2_TM_ST_ABORT_SISTER,
+ PM_RADIX_PWC_L3_HIT,
+ PM_RUN_CYC_SMT2_MODE,
+ PM_TM_TX_PASS_RUN_INST,
+ PM_DISP_HELD_SYNC_HOLD,
+};
+
+int blacklist_events_dd22[] = {
+ PM_DTLB_MISS_16G,
+ PM_DERAT_MISS_2M,
+ PM_DTLB_MISS_2M,
+ PM_MRK_DTLB_MISS_1G,
+ PM_DTLB_MISS_4K,
+ PM_DERAT_MISS_1G,
+ PM_MRK_DERAT_MISS_2M,
+ PM_MRK_DTLB_MISS_4K,
+ PM_MRK_DTLB_MISS_16G,
+ PM_DTLB_MISS_64K,
+ PM_MRK_DERAT_MISS_1G,
+ PM_MRK_DTLB_MISS_64K,
+ PM_DISP_HELD_SYNC_HOLD,
+ PM_DTLB_MISS_16M,
+ PM_DTLB_MISS_1G,
+ PM_MRK_DTLB_MISS_16M,
+};
+
+int pvr_min;
+
+/*
+ * check for power9 support for 2.1 and
+ * 2.2 model where blacklist is applicable.
+ */
+int check_for_power9_version(void)
+{
+ pvr_min = PVR_MIN(mfspr(SPRN_PVR));
+
+ SKIP_IF(PVR_VER(pvr) != POWER9);
+ SKIP_IF(!(pvr & PVR_POWER9_CUMULUS));
+
+ SKIP_IF(!(3 - pvr_min));
+
+ return 0;
+}
+
+/*
+ * Testcase to ensure that using blacklisted bits in
+ * event code should cause event_open to fail in power9
+ */
+
+static int blacklisted_events(void)
+{
+ struct event event;
+ int i = 0;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /*
+* check for power9 support for 2.1 and
+* 2.2 model where blacklist is applicable.
+*/
+ SKIP_IF(check_for_power9_version());
+
+ /* Skip for Generic compat mode */
+ SKIP_IF(check_for_generic_compat_pmu());
+
+ if (pvr_min == 1) {
+ for (i = 0; i <
[PATCH 23/35] selftest/powerpc/pmu: Add selftest for checking invalid bits in event code
From: Athira Rajeev
Some of the bits in the event code is reserved
for specific platforms. Event code bits 52-59 are
reserved in power9, whereas in power10, these are used
for programming Monitor Mode Control Register 3 (MMCR3).
Bit 9 in event code is reserved in power9, whereas it
is used for programming "radix_scope_qual" bit 18 in Monitor
Mode Control Register 1 (MMCR1).
Testcase to ensure that using reserved bits in
event code should cause event_open to fail.
Signed-off-by: Athira Rajeev
---
.../powerpc/pmu/event_code_tests/Makefile | 2 +-
.../invalid_event_code_test.c | 67 +++
2 files changed, 68 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/invalid_event_code_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 590b642ef900..1ce1ef4586fd 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -3,7 +3,7 @@ CFLAGS += -m64
TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test \
- group_constraint_mmcra_sample_test
+ group_constraint_mmcra_sample_test invalid_event_code_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/invalid_event_code_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/invalid_event_code_test.c
new file mode 100644
index ..f51fcab837fc
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/invalid_event_code_test.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include
+#include
+#include
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+/* The data cache was reloaded from local core's L3 due to a demand load */
+#define EventCode_1 0x134001c040
+/* PM_DATA_RADIX_PROCESS_L2_PTE_FROM_L2 */
+#define EventCode_2 0x14242
+/* Event code with IFM, EBB, BHRB bits set in event code */
+#define EventCode_3 0xf01e
+
+/*
+ * Some of the bits in the event code is
+ * reserved for specific platforms.
+ * Event code bits 52-59 are reserved in power9,
+ * whereas in power10, these are used for programming
+ * Monitor Mode Control Register 3 (MMCR3).
+ * Bit 9 in event code is reserved in power9,
+ * whereas it is used for programming "radix_scope_qual"
+ * bit 18 in Monitor Mode Control Register 1 (MMCR1).
+ *
+ * Testcase to ensure that using reserved bits in
+ * event code should cause event_open to fail.
+ */
+
+static int invalid_event_code(void)
+{
+ struct event event;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /*
+* Events using MMCR3 bits and radix scope qual bits
+* should fail in power9 and should succeed in power10.
+* Init the events and check for pass/fail in event open.
+*/
+ if (have_hwcap2(PPC_FEATURE2_ARCH_3_1)) {
+ event_init(, EventCode_1);
+ FAIL_IF(event_open());
+ event_close();
+
+ event_init(, EventCode_2);
+ FAIL_IF(event_open());
+ event_close();
+ } else {
+ event_init(, EventCode_1);
+ FAIL_IF(!event_open());
+
+ event_init(, EventCode_2);
+ FAIL_IF(!event_open());
+ }
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(invalid_event_code, "invalid_event_code");
+}
--
2.31.1
[PATCH 22/35] selftest/powerpc/pmu: Add selftest for group constraint check MMCRA sample bits
From: Athira Rajeev
Events with different "sample" field values which is
used to program Monitor Mode Control Register A (MMCRA)
in a group will fail to schedule. Testcase uses event with
load only sampling mode as group leader and event with
store only sampling as sibling event. So that it can check
that using different sample bits in event code will fail
in event open for group of events
Signed-off-by: Athira Rajeev
---
.../powerpc/pmu/event_code_tests/Makefile | 3 +-
.../group_constraint_mmcra_sample_test.c | 54 +++
2 files changed, 56 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_mmcra_sample_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 5dd482843572..590b642ef900 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -2,7 +2,8 @@
CFLAGS += -m64
TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
- group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test
+ group_constraint_repeat_test group_constraint_radix_scope_qual_test
reserved_bits_mmcra_sample_elig_mode_test \
+ group_constraint_mmcra_sample_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_mmcra_sample_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_mmcra_sample_test.c
new file mode 100644
index ..ff625b5d80eb
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_mmcra_sample_test.c
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+#define EventCode_1 0x35340401e0
+#define EventCode_2 0x353c0101ec
+#define EventCode_3 0x35340101ec
+/*
+ * Test that using different sample bits in
+ * event code cause failure in schedule for
+ * group of events.
+ */
+
+static int group_constraint_mmcra_sample(void)
+{
+ struct event event, leader;
+
+ SKIP_IF(platform_check_for_tests());
+
+ /*
+* Events with different "sample" field values
+* in a group will fail to schedule.
+* Use event with load only sampling mode as
+* group leader. Use event with store only sampling
+* as sibling event.
+*/
+ event_init(, EventCode_1);
+ FAIL_IF(event_open());
+
+ event_init(, EventCode_2);
+
+ /* Expected to fail as sibling event doesn't use same sampling bits as
leader */
+ FAIL_IF(!event_open_with_group(, leader.fd));
+
+ event_init(, EventCode_3);
+
+ /* Expected to pass as sibling event use same sampling bits as leader */
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(group_constraint_mmcra_sample,
"group_constraint_mmcra_sample");
+}
--
2.31.1
[PATCH 20/35] selftest/powerpc/pmu: Add selftest for group constraint check for radix_scope_qual field
From: Athira Rajeev
Testcase for group constraint check for radix_scope_qual
field which is used to program Monitor Mode Control Register
(MMCR1) bit 18. All events in the group should match radix_scope_qual
bit, otherwise event_open for the group should fail. Testcase uses
"0x14242" (PM_DATA_RADIX_PROCESS_L2_PTE_FROM_L2) with radix_scope_qual
bit set for power10.
Signed-off-by: Athira Rajeev
---
.../powerpc/pmu/event_code_tests/Makefile | 2 +-
.../group_constraint_radix_scope_qual_test.c | 56 +++
2 files changed, 57 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index ace100e3226e..5b61fb0b9fd6 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -2,7 +2,7 @@
CFLAGS += -m64
TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
- group_constraint_repeat_test
+ group_constraint_repeat_test group_constraint_radix_scope_qual_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c
new file mode 100644
index ..9225618b846a
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_radix_scope_qual_test.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+/* PM_DATA_RADIX_PROCESS_L2_PTE_FROM_L2 */
+#define EventCode_1 0x14242
+/* PM_DATA_RADIX_PROCESS_L2_PTE_FROM_L3 */
+#define EventCode_2 0x24242
+
+/*
+ * Testcase for group constraint check for radix_scope_qual
+ * field which is used to program Monitor Mode Control
+ * egister (MMCR1) bit 18.
+ * All events in the group should match radix_scope_qual,
+ * bits otherwise event_open for the group should fail.
+ */
+
+static int group_constraint_radix_scope_qual(void)
+{
+ struct event event, leader;
+
+ /*
+* Check for platform support for the test.
+* This test is aplicable on power10 only.
+*/
+ SKIP_IF(platform_check_for_tests());
+ SKIP_IF(!have_hwcap2(PPC_FEATURE2_ARCH_3_1));
+
+ /* Init the events for the group contraint check for radix_scope_qual
bits */
+ event_init(, EventCode_1);
+ FAIL_IF(event_open());
+
+ event_init(, 0x200fc);
+
+ /* Expected to fail as sibling event doesn't request same
radix_scope_qual bits as leader */
+ FAIL_IF(!event_open_with_group(, leader.fd));
+
+ event_init(, EventCode_2);
+ /* Expected to pass as sibling event request same radix_scope_qual bits
as leader */
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(group_constraint_radix_scope_qual,
+ "group_constraint_radix_scope_qual");
+}
--
2.31.1
[PATCH 19/35] selftest/powerpc/pmu: Add selftest for group constraint check when using same PMC
From: Athira Rajeev
Testcase for group constraint check when using events
with same PMC. Multiple events in a group asking for
same PMC should fail. Testcase uses "0x22C040" on PMC2
as leader and also subling which is expected to fail.
Using PMC1 for sibling event should pass the test.
Signed-off-by: Athira Rajeev
---
.../powerpc/pmu/event_code_tests/Makefile | 3 +-
.../group_constraint_repeat_test.c| 56 +++
2 files changed, 58 insertions(+), 1 deletion(-)
create mode 100644
tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_repeat_test.c
diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 6310634c5beb..ace100e3226e 100644
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -1,7 +1,8 @@
# SPDX-License-Identifier: GPL-2.0
CFLAGS += -m64
-TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test
+TEST_GEN_PROGS := group_constraint_pmc56_test
group_pmc56_exclude_constraints_test group_constraint_pmc_count_test \
+ group_constraint_repeat_test
top_srcdir = ../../../../../..
include ../../../lib.mk
diff --git
a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_repeat_test.c
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_repeat_test.c
new file mode 100644
index ..371cd05bb3ed
--- /dev/null
+++
b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_repeat_test.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+/* The processor's L1 data cache was reloaded */
+#define EventCode1 0x21C040
+#define EventCode2 0x22C040
+
+/*
+ * Testcase for group constraint check
+ * when using events with same PMC.
+ * Multiple events in a group shouldn't
+ * ask for same PMC. If so it should fail.
+ */
+
+static int group_constraint_repeat(void)
+{
+ struct event event, leader;
+
+ /* Check for platform support for the test */
+ SKIP_IF(platform_check_for_tests());
+
+ /*
+* Two events in a group using same PMC
+* should fail to get scheduled. Usei same PMC2
+* for leader and sibling event which is expected
+* to fail.
+*/
+ event_init(, EventCode1);
+ FAIL_IF(event_open());
+
+ event_init(, EventCode1);
+
+ /* Expected to fail since sibling event is requesting same PMC as
leader */
+ FAIL_IF(!event_open_with_group(, leader.fd));
+
+ event_init(, EventCode2);
+
+ /* Expected to pass since sibling event is requesting different PMC */
+ FAIL_IF(event_open_with_group(, leader.fd));
+
+ event_close();
+ event_close();
+
+ return 0;
+}
+
+int main(void)
+{
+ return test_harness(group_constraint_repeat, "group_constraint_repeat");
+}
--
2.31.1
