[PATCH] arch/powerpc/kvm/e500: Additional module.h = export.h fixup

2011-12-22 Thread Kyle Moffett
This file, like many others, needs to include linux/export.h.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/kvm/e500.c |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 26d2090..387c383 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -13,6 +13,7 @@
  */
 
 #include linux/kvm_host.h
+#include linux/export.h
 #include linux/slab.h
 #include linux/err.h
 
-- 
1.7.7.3

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[PATCH] powerpc/currituck: Fix up missing MPIC_PRIMARY flag

2011-12-22 Thread Kyle Moffett
The 44x/currituck platform didn't get updated when the MPIC code
inverted the flag from MPIC_PRIMARY = !MPIC_SECONDARY.  Fix it up.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/44x/currituck.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/platforms/44x/currituck.c 
b/arch/powerpc/platforms/44x/currituck.c
index 1fdf569..3f6229b 100644
--- a/arch/powerpc/platforms/44x/currituck.c
+++ b/arch/powerpc/platforms/44x/currituck.c
@@ -83,7 +83,7 @@ static void __init ppc47x_init_irq(void)
 * device-tree, just pass 0 to all arguments
 */
struct mpic *mpic =
-   mpic_alloc(np, 0, MPIC_PRIMARY, 0, 0,  MPIC );
+   mpic_alloc(np, 0, 0, 0, 0,  MPIC );
BUG_ON(mpic == NULL);
mpic_init(mpic);
ppc_md.get_irq = mpic_get_irq;
-- 
1.7.7.3

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[PATCH] fsl/mpic: Document and use the big-endian device-tree flag

2011-12-22 Thread Kyle Moffett
The MPIC code checks for a big-endian property and sets the flag
MPIC_BIG_ENDIAN if one is present.  Unfortunately, the PowerQUICC-III
compatible device-tree does not specify it, so all of the board ports
need to manually set that flag when calling mpic_alloc().

Document the flag and add it to the pq3 device tree.  Existing code
will still need to pass the MPIC_BIG_ENDIAN flag because their dtb may
not have this property, but new platforms shouldn't need to do so.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 .../devicetree/bindings/powerpc/fsl/mpic.txt   |9 -
 arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi|1 +
 2 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
index 2cf38bd..ebafba2 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
@@ -56,7 +56,14 @@ PROPERTIES
   to the client.  The presence of this property also mandates
   that any initialization related to interrupt sources shall
   be limited to sources explicitly referenced in the device tree.
-   
+
+  - big-endian
+  Usage: optional
+  Value type: empty
+  If present the MPIC will be assumed to be big-endian.  Some
+  device-trees omit this property on MPIC nodes even when the MPIC is
+  in fact big-endian, so certain boards override this property.
+
 INTERRUPT SPECIFIER DEFINITION
 
   Interrupt specifiers consists of 4 cells encoded as
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi 
b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
index 5c80460..47f2b67 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
@@ -39,6 +39,7 @@ mpic: pic@4 {
reg = 0x4 0x4;
compatible = fsl,mpic;
device_type = open-pic;
+   big-endian;
 };
 
 timer@41100 {
-- 
1.7.7.3

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[PATCH 0/6] powerpc/mpic: More general cleanups and fixups

2011-12-22 Thread Kyle Moffett
Hello all,

With the following series of patches, most new MPC85xx platforms should
be able to get away with just this code (assuming updated dtb):

  struct mpic *mpic = mpic_alloc(NULL, 0, 0, 0, OpenPIC);
  mpic_init(mpic);

Several of the hard-coded flags can now be provided as properties in
the device-tree, and hopefully future tweaks can be hooked in the same
way.

Cheers,
Kyle Moffett

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[PATCH 1/6] powerpc/mpic: Fix use of flags variable in mpic_alloc()

2011-12-22 Thread Kyle Moffett
The mpic_alloc() function takes a flags parameter and assigns it into
the mpic-flags variable fairly early on, but several later pieces of
code detect various device-tree properties and save them into the
mpic-flags variable (EG: big-endian = MPIC_BIG_ENDIAN).

Unfortunately, a number of codepaths (including several which test the
flag MPIC_BIG_ENDIAN!) test flags instead of mpic-flags, and get
wrong answers as a result.

Consolidate the device-tree flag tests early in mpic_alloc() and change
all of the checks after mpic-flags is init'ed to use mpic-flags.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/sysdev/mpic.c |   46 +--
 1 files changed, 22 insertions(+), 24 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 4e9ccb1..9dd7f76 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1182,6 +1182,14 @@ struct mpic * __init mpic_alloc(struct device_node *node,
}
}
 
+   /* Read extra device-tree properties into the flags variable */
+   if (of_get_property(mpic-node, big-endian, NULL))
+   flags |= MPIC_BIG_ENDIAN;
+   if (of_get_property(mpic-node, pic-no-reset, NULL))
+   flags |= MPIC_NO_RESET;
+   if (of_device_is_compatible(mpic-node, fsl,mpic))
+   flags |= MPIC_FSL;
+
mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL);
if (mpic == NULL)
goto err_of_node_put;
@@ -1189,15 +1197,16 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
mpic-name = name;
mpic-node = node;
mpic-paddr = phys_addr;
+   mpic-flags = flags;
 
mpic-hc_irq = mpic_irq_chip;
mpic-hc_irq.name = name;
-   if (!(flags  MPIC_SECONDARY))
+   if (!(mpic-flags  MPIC_SECONDARY))
mpic-hc_irq.irq_set_affinity = mpic_set_affinity;
 #ifdef CONFIG_MPIC_U3_HT_IRQS
mpic-hc_ht_irq = mpic_irq_ht_chip;
mpic-hc_ht_irq.name = name;
-   if (!(flags  MPIC_SECONDARY))
+   if (!(mpic-flags  MPIC_SECONDARY))
mpic-hc_ht_irq.irq_set_affinity = mpic_set_affinity;
 #endif /* CONFIG_MPIC_U3_HT_IRQS */
 
@@ -1209,12 +1218,11 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
mpic-hc_tm = mpic_tm_chip;
mpic-hc_tm.name = name;
 
-   mpic-flags = flags;
mpic-isu_size = isu_size;
mpic-irq_count = irq_count;
mpic-num_sources = 0; /* so far */
 
-   if (flags  MPIC_LARGE_VECTORS)
+   if (mpic-flags  MPIC_LARGE_VECTORS)
intvec_top = 2047;
else
intvec_top = 255;
@@ -1233,12 +1241,6 @@ struct mpic * __init mpic_alloc(struct device_node *node,
mpic-ipi_vecs[3]   = intvec_top - 1;
mpic-spurious_vec  = intvec_top;
 
-   /* Check for big-endian in device-tree */
-   if (of_get_property(mpic-node, big-endian, NULL) != NULL)
-   mpic-flags |= MPIC_BIG_ENDIAN;
-   if (of_device_is_compatible(mpic-node, fsl,mpic))
-   mpic-flags |= MPIC_FSL;
-
/* Look for protected sources */
psrc = of_get_property(mpic-node, protected-sources, psize);
if (psrc) {
@@ -1254,11 +1256,11 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
}
 
 #ifdef CONFIG_MPIC_WEIRD
-   mpic-hw_set = mpic_infos[MPIC_GET_REGSET(flags)];
+   mpic-hw_set = mpic_infos[MPIC_GET_REGSET(mpic-flags)];
 #endif
 
/* default register type */
-   if (flags  MPIC_BIG_ENDIAN)
+   if (mpic-flags  MPIC_BIG_ENDIAN)
mpic-reg_type = mpic_access_mmio_be;
else
mpic-reg_type = mpic_access_mmio_le;
@@ -1268,10 +1270,10 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
 * only if the kernel includes DCR support.
 */
 #ifdef CONFIG_PPC_DCR
-   if (flags  MPIC_USES_DCR)
+   if (mpic-flags  MPIC_USES_DCR)
mpic-reg_type = mpic_access_dcr;
 #else
-   BUG_ON(flags  MPIC_USES_DCR);
+   BUG_ON(mpic-flags  MPIC_USES_DCR);
 #endif
 
/* Map the global registers */
@@ -1283,10 +1285,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
/* When using a device-node, reset requests are only honored if the MPIC
 * is allowed to reset.
 */
-   if (of_get_property(mpic-node, pic-no-reset, NULL))
-   mpic-flags |= MPIC_NO_RESET;
-
-   if ((flags  MPIC_WANTS_RESET)  !(mpic-flags  MPIC_NO_RESET)) {
+   if ((mpic-flags  MPIC_WANTS_RESET)  !(mpic-flags  MPIC_NO_RESET)) 
{
printk(KERN_DEBUG mpic: Resetting\n);
mpic_write(mpic-gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
   mpic_read(mpic-gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
@@ -1297,12 +1296,12 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
}
 
/* CoreInt */
-   if (flags  MPIC_ENABLE_COREINT

[PATCH 2/6] fsl/mpic: Document and use the big-endian device-tree flag

2011-12-22 Thread Kyle Moffett
The MPIC code checks for a big-endian property and sets the flag
MPIC_BIG_ENDIAN if one is present, although prior to the mpic-flags
fixup that would never have worked anways.

Unfortunately, even now that it works properly, the Freescale mpic
device-node (the PowerQUICC-III-compatible one) does not specify it,
so all of the board ports need to manually pass it to mpic_alloc().

Document the flag and add it to the pq3 device tree.  Existing code will
still need to pass the MPIC_BIG_ENDIAN flag because their dtb may not
have this property, but new platforms shouldn't need to do so.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 .../devicetree/bindings/powerpc/fsl/mpic.txt   |9 -
 arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi|1 +
 2 files changed, 9 insertions(+), 1 deletions(-)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
index 2cf38bd..ebafba2 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
@@ -56,7 +56,14 @@ PROPERTIES
   to the client.  The presence of this property also mandates
   that any initialization related to interrupt sources shall
   be limited to sources explicitly referenced in the device tree.
-   
+
+  - big-endian
+  Usage: optional
+  Value type: empty
+  If present the MPIC will be assumed to be big-endian.  Some
+  device-trees omit this property on MPIC nodes even when the MPIC is
+  in fact big-endian, so certain boards override this property.
+
 INTERRUPT SPECIFIER DEFINITION
 
   Interrupt specifiers consists of 4 cells encoded as
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi 
b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
index 5c80460..47f2b67 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
@@ -39,6 +39,7 @@ mpic: pic@4 {
reg = 0x4 0x4;
compatible = fsl,mpic;
device_type = open-pic;
+   big-endian;
 };
 
 timer@41100 {
-- 
1.7.7.3

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[PATCH 3/6] fsl/mpic: Create and document the single-cpu-affinity device-tree flag

2011-12-22 Thread Kyle Moffett
The Freescale MPIC (and perhaps others in the future) is incapable of
routing non-IPI interrupts to more than once CPU at a time.  Currently
all of the Freescale boards msut pass the MPIC_SINGLE_DEST_CPU flag to
mpic_alloc(), but that information should really be present in the
device-tree.

Older board code can't rely on the device-tree having the property set,
but newer platforms won't need it manually specified in the code.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 .../devicetree/bindings/powerpc/fsl/mpic.txt   |6 ++
 arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi|1 +
 arch/powerpc/sysdev/mpic.c |8 +---
 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
index ebafba2..b393ccf 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
@@ -64,6 +64,12 @@ PROPERTIES
   device-trees omit this property on MPIC nodes even when the MPIC is
   in fact big-endian, so certain boards override this property.
 
+  - single-cpu-affinity
+  Usage: optional
+  Value type: empty
+  If present the MPIC will be assumed to only be able to route
+  non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC).
+
 INTERRUPT SPECIFIER DEFINITION
 
   Interrupt specifiers consists of 4 cells encoded as
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi 
b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
index 47f2b67..658bd81 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
@@ -40,6 +40,7 @@ mpic: pic@4 {
compatible = fsl,mpic;
device_type = open-pic;
big-endian;
+   single-cpu-affinity;
 };
 
 timer@41100 {
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 9dd7f76..c297a52 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1183,11 +1183,13 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
}
 
/* Read extra device-tree properties into the flags variable */
-   if (of_get_property(mpic-node, big-endian, NULL))
+   if (of_get_property(node, big-endian, NULL))
flags |= MPIC_BIG_ENDIAN;
-   if (of_get_property(mpic-node, pic-no-reset, NULL))
+   if (of_get_property(node, pic-no-reset, NULL))
flags |= MPIC_NO_RESET;
-   if (of_device_is_compatible(mpic-node, fsl,mpic))
+   if (of_get_property(node, single-cpu-affinity, NULL))
+   flags |= MPIC_SINGLE_DEST_CPU;
+   if (of_device_is_compatible(node, fsl,mpic))
flags |= MPIC_FSL;
 
mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL);
-- 
1.7.7.3

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[PATCH 4/6] powerpc/mpic: Remove MPIC_BROKEN_FRR_NIRQS and duplicate irq_count

2011-12-22 Thread Kyle Moffett
The mpic-irq_count variable is only used as a software error-checking
limit to determine whether or not an IRQ number is valid.  In board code
which does not manually specify an IRQ count to mpic_alloc(), i.e. 0, it
is automatically detected from the number of ISUs and the ISU size.

In practice, all hardware ends up with irq_count == num_sources, so all
of the runtime checks on mpic-irq_count should just check the value of
mpic-num_sources instead.

When platform hardware does not correctly report the number of IRQs,
which only happens on the MPC85xx/MPC86xx, the MPIC_BROKEN_FRR_NIRQS
flag is used to override the detected value of num_sources with the
manual irq_count parameter.  Since there's no need to manually specify
the number of IRQs except in this case, the extra flag can be eliminated
and the test changed to irq_count != 0.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/mpic.h   |3 ---
 arch/powerpc/platforms/85xx/corenet_ds.c  |3 +--
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |4 ++--
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |4 ++--
 arch/powerpc/platforms/85xx/p1010rdb.c|2 +-
 arch/powerpc/platforms/85xx/p1022_ds.c|2 +-
 arch/powerpc/platforms/85xx/p1023_rds.c   |2 +-
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |2 +-
 arch/powerpc/platforms/86xx/pic.c |2 +-
 arch/powerpc/platforms/embedded6xx/holly.c|3 +--
 arch/powerpc/platforms/embedded6xx/linkstation.c  |2 +-
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |3 +--
 arch/powerpc/platforms/embedded6xx/storcenter.c   |2 +-
 arch/powerpc/platforms/pseries/setup.c|4 +---
 arch/powerpc/sysdev/mpic.c|   17 ++---
 arch/powerpc/sysdev/mpic_msi.c|4 ++--
 18 files changed, 25 insertions(+), 38 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 67b4d98..2ebac31 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -273,7 +273,6 @@ struct mpic
unsigned intisu_size;
unsigned intisu_shift;
unsigned intisu_mask;
-   unsigned intirq_count;
/* Number of sources */
unsigned intnum_sources;
/* default senses array */
@@ -363,8 +362,6 @@ struct mpic
 #define MPIC_ENABLE_MCK0x0200
 /* Disable bias among target selection, spread interrupts evenly */
 #define MPIC_NO_BIAS   0x0400
-/* Ignore NIRQS as reported by FRR */
-#define MPIC_BROKEN_FRR_NIRQS  0x0800
 /* Destination only supports a single CPU at a time */
 #define MPIC_SINGLE_DEST_CPU   0x1000
 /* Enable CoreInt delivery of interrupts */
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 07e3e6c..768479b 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -36,8 +36,7 @@
 void __init corenet_ds_pic_init(void)
 {
struct mpic *mpic;
-   unsigned int flags = MPIC_BIG_ENDIAN |
-   MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
+   unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU;
 
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c 
b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index cf26682..d5373e0 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -38,7 +38,7 @@ void __init mpc8536_ds_pic_init(void)
 {
struct mpic *mpic = mpic_alloc(NULL, 0,
  MPIC_WANTS_RESET |
- MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
+ MPIC_BIG_ENDIAN,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c 
b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index eefbb91..528b9a0 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -72,13 +72,13 @@ void __init mpc85xx_ds_pic_init(void)
 
if (of_flat_dt_is_compatible(root, fsl,MPC8572DS-CAMP)) {
mpic = mpic_alloc(NULL, 0,
-   MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
+   MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
0, 256,  OpenPIC  );
} else {
mpic = mpic_alloc(NULL, 0,
  MPIC_WANTS_RESET |
- MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS

[PATCH 5/6] powerpc/mpic: Add last-interrupt-source property to override hardware

2011-12-22 Thread Kyle Moffett
The FreeScale PowerQUICC-III-compatible (mpc85xx/mpc86xx) MPICs do not
correctly report the number of hardware interrupt sources, so software
needs to override the detected value with 256.

To avoid needing to write custom board-specific code to detect that
scenario, allow it to be easily overridden in the device-tree.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 .../devicetree/bindings/powerpc/fsl/mpic.txt   |7 +++
 arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi|1 +
 arch/powerpc/sysdev/mpic.c |   46 +++-
 3 files changed, 34 insertions(+), 20 deletions(-)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt 
b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
index b393ccf..dc57446 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
@@ -70,6 +70,13 @@ PROPERTIES
   If present the MPIC will be assumed to only be able to route
   non-IPI interrupts to a single CPU at a time (EG: Freescale MPIC).
 
+  - last-interrupt-source
+  Usage: optional
+  Value type: u32
+  Some MPICs do not correctly report the number of hardware sources
+  in the global feature registers.  If specified, this field will
+  override the value read from MPIC_GREG_FEATURE_LAST_SRC.
+
 INTERRUPT SPECIFIER DEFINITION
 
   Interrupt specifiers consists of 4 cells encoded as
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi 
b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
index 658bd81..fdedf7b 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
@@ -41,6 +41,7 @@ mpic: pic@4 {
device_type = open-pic;
big-endian;
single-cpu-affinity;
+   last-interrupt-source = 255;
 };
 
 timer@41100 {
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index cbffeb7..90171d4 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1149,6 +1149,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
u32 greg_feature;
const char *vers;
const u32 *psrc;
+   u32 last_irq;
 
/* Default MPIC search parameters */
static const struct of_device_id __initconst mpic_device_id[] = {
@@ -1220,7 +1221,6 @@ struct mpic * __init mpic_alloc(struct device_node *node,
mpic-hc_tm = mpic_tm_chip;
mpic-hc_tm.name = name;
 
-   mpic-isu_size = isu_size;
mpic-num_sources = 0; /* so far */
 
if (mpic-flags  MPIC_LARGE_VECTORS)
@@ -1308,20 +1308,6 @@ struct mpic * __init mpic_alloc(struct device_node *node,
   | MPIC_GREG_GCONF_MCK);
 
/*
-* Read feature register.  For non-ISU MPICs, num sources as well. On
-* ISU MPICs, sources are counted as ISUs are added
-*/
-   greg_feature = mpic_read(mpic-gregs, MPIC_INFO(GREG_FEATURE_0));
-   if (isu_size == 0) {
-   if (irq_count)
-   mpic-num_sources = irq_count;
-   else
-   mpic-num_sources =
-   ((greg_feature  
MPIC_GREG_FEATURE_LAST_SRC_MASK)
- MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
-   }
-
-   /*
 * The MPIC driver will crash if there are more cores than we
 * can initialize, so we may as well catch that problem here.
 */
@@ -1336,18 +1322,38 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
 0x1000);
}
 
+   /*
+* Read feature register.  For non-ISU MPICs, num sources as well. On
+* ISU MPICs, sources are counted as ISUs are added
+*/
+   greg_feature = mpic_read(mpic-gregs, MPIC_INFO(GREG_FEATURE_0));
+
+   /*
+* By default, the last source number comes from the MPIC, but the
+* device-tree and board support code can override it on buggy hw.
+*/
+   last_irq = (greg_feature  MPIC_GREG_FEATURE_LAST_SRC_MASK)
+MPIC_GREG_FEATURE_LAST_SRC_SHIFT;
+   of_property_read_u32(mpic-node, last-interrupt-source, last_irq);
+   if (irq_count)
+   last_irq = irq_count - 1;
+
/* Initialize main ISU if none provided */
-   if (mpic-isu_size == 0) {
-   mpic-isu_size = mpic-num_sources;
+   if (!isu_size) {
+   isu_size = last_irq + 1;
+   mpic-num_sources = isu_size;
mpic_map(mpic, mpic-paddr, mpic-isus[0],
-MPIC_INFO(IRQ_BASE), MPIC_INFO(IRQ_STRIDE) * 
mpic-isu_size);
+   MPIC_INFO(IRQ_BASE),
+   MPIC_INFO(IRQ_STRIDE) * isu_size);
}
+
+   mpic-isu_size = isu_size;
mpic-isu_shift = 1 + __ilog2(mpic-isu_size - 1);
mpic-isu_mask = (1  mpic-isu_shift) - 1;
 
mpic-irqhost

[PATCH 6/6] powerpc/mpic: Remove duplicate MPIC_WANTS_RESET flag

2011-12-22 Thread Kyle Moffett
There are two separate flags controlling whether or not the MPIC is
reset during initialization, which is completely unnecessary, and only
one of them can be specified in the device tree.

Also, most platforms in-tree right now do actually want to reset the
MPIC during initialization anyways, which means lots of duplicate code
passing the MPIC_WANTS_RESET flag.

Fix all of the callers which currently do not pass the MPIC_WANTS_RESET
flag to pass the MPIC_NO_RESET flag, then remove the MPIC_WANTS_RESET
flag and make the code reset the MPIC by default.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/mpic.h   |6 +-
 arch/powerpc/platforms/44x/currituck.c|2 +-
 arch/powerpc/platforms/44x/iss4xx.c   |3 +--
 arch/powerpc/platforms/85xx/corenet_ds.c  |3 ++-
 arch/powerpc/platforms/85xx/ksi8560.c |3 +--
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |4 +---
 arch/powerpc/platforms/85xx/mpc85xx_ads.c |3 +--
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |3 +--
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |3 +--
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |3 +--
 arch/powerpc/platforms/85xx/p1010rdb.c|3 +--
 arch/powerpc/platforms/85xx/p1022_ds.c|4 +---
 arch/powerpc/platforms/85xx/p1023_rds.c   |3 +--
 arch/powerpc/platforms/85xx/sbc8548.c |3 +--
 arch/powerpc/platforms/85xx/sbc8560.c |3 +--
 arch/powerpc/platforms/85xx/socrates.c|3 +--
 arch/powerpc/platforms/85xx/stx_gp3.c |3 +--
 arch/powerpc/platforms/85xx/tqm85xx.c |2 +-
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |4 +---
 arch/powerpc/platforms/86xx/pic.c |3 +--
 arch/powerpc/platforms/cell/setup.c   |3 ++-
 arch/powerpc/platforms/chrp/setup.c   |3 ++-
 arch/powerpc/platforms/embedded6xx/holly.c|3 +--
 arch/powerpc/platforms/embedded6xx/linkstation.c  |3 +--
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |3 +--
 arch/powerpc/platforms/embedded6xx/storcenter.c   |3 +--
 arch/powerpc/platforms/maple/setup.c  |2 +-
 arch/powerpc/platforms/pasemi/setup.c |2 +-
 arch/powerpc/platforms/powermac/pic.c |1 -
 arch/powerpc/platforms/pseries/setup.c|3 ++-
 arch/powerpc/sysdev/mpic.c|2 +-
 32 files changed, 35 insertions(+), 59 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 2ebac31..d7e3fec 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -348,8 +348,6 @@ struct mpic
 #define MPIC_U3_HT_IRQS0x0004
 /* Broken IPI registers (autodetected) */
 #define MPIC_BROKEN_IPI0x0008
-/* MPIC wants a reset */
-#define MPIC_WANTS_RESET   0x0010
 /* Spurious vector requires EOI */
 #define MPIC_SPV_EOI   0x0020
 /* No passthrough disable */
@@ -366,9 +364,7 @@ struct mpic
 #define MPIC_SINGLE_DEST_CPU   0x1000
 /* Enable CoreInt delivery of interrupts */
 #define MPIC_ENABLE_COREINT0x2000
-/* Disable resetting of the MPIC.
- * NOTE: This flag trumps MPIC_WANTS_RESET.
- */
+/* Do not reset the MPIC during initialization */
 #define MPIC_NO_RESET  0x4000
 /* Freescale MPIC (compatible includes fsl,mpic) */
 #define MPIC_FSL   0x8000
diff --git a/arch/powerpc/platforms/44x/currituck.c 
b/arch/powerpc/platforms/44x/currituck.c
index 3f6229b..583e67f 100644
--- a/arch/powerpc/platforms/44x/currituck.c
+++ b/arch/powerpc/platforms/44x/currituck.c
@@ -83,7 +83,7 @@ static void __init ppc47x_init_irq(void)
 * device-tree, just pass 0 to all arguments
 */
struct mpic *mpic =
-   mpic_alloc(np, 0, 0, 0, 0,  MPIC );
+   mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0,  MPIC );
BUG_ON(mpic == NULL);
mpic_init(mpic);
ppc_md.get_irq = mpic_get_irq;
diff --git a/arch/powerpc/platforms/44x/iss4xx.c 
b/arch/powerpc/platforms/44x/iss4xx.c
index 5b8cdbb..a28a862 100644
--- a/arch/powerpc/platforms/44x/iss4xx.c
+++ b/arch/powerpc/platforms/44x/iss4xx.c
@@ -71,8 +71,7 @@ static void __init iss4xx_init_irq(void)
/* The MPIC driver will get everything it needs from the
 * device-tree, just pass 0 to all arguments
 */
-   struct mpic *mpic = mpic_alloc(np, 0, 0, 0, 0,
-   MPIC );
+   struct mpic *mpic = mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0,  
MPIC );
BUG_ON(mpic

[PATCH] arch/powerpc/kvm/e500: Additional module.h = export.h fixup

2011-12-21 Thread Kyle Moffett
This file, like many others, needs to include linux/export.h.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/kvm/e500.c |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 26d2090..387c383 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -13,6 +13,7 @@
  */
 
 #include linux/kvm_host.h
+#include linux/export.h
 #include linux/slab.h
 #include linux/err.h
 
-- 
1.7.7.3

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[PATCH v3 00/10] powerpc/mpic: General cleanup patch series

2011-12-02 Thread Kyle Moffett
Hello,

This is version 3 of the MPIC cleanup patches.

A few minor bugfixes have been rolled into patches 2, 7, and 10, kudos
to Paul Mackerras and Michael Ellerman for reporting them.

Additionally, the series has been rebased onto Ben's next branch
for easier merging:
  git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git next

Unfortunately, my local board-support code conflicts with the mpc85xx
device-tree updates in that branch, so I haven't been able to do more
testing locally.  I will hopefully have that resolved soon, however.

Cheers,
Kyle Moffett

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[PATCH v3 01/10] powerpc/85xx: Move mpc85xx_smp_init() decl to a new smp.h

2011-12-02 Thread Kyle Moffett
This removes a bunch of extern declarations and CONFIG_SMP ifdefs.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/platforms/85xx/corenet_ds.c  |7 +--
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |6 +-
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |7 +--
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |7 +--
 arch/powerpc/platforms/85xx/p1022_ds.c|7 +--
 arch/powerpc/platforms/85xx/p1023_rds.c   |7 +--
 arch/powerpc/platforms/85xx/smp.c |1 +
 arch/powerpc/platforms/85xx/smp.h |   15 +++
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |6 +-
 9 files changed, 23 insertions(+), 40 deletions(-)
 create mode 100644 arch/powerpc/platforms/85xx/smp.h

diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index c48b661..3052821 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -31,6 +31,7 @@
 #include linux/of_platform.h
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
+#include smp.h
 
 void __init corenet_ds_pic_init(void)
 {
@@ -65,10 +66,6 @@ void __init corenet_ds_pic_init(void)
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-void __init mpc85xx_smp_init(void);
-#endif
-
 void __init corenet_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -77,9 +74,7 @@ void __init corenet_ds_setup_arch(void)
 #endif
dma_addr_t max = 0x;
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
 #ifdef CONFIG_PCI
for_each_node_by_type(np, pci) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c 
b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 2113120..3f66631 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -35,6 +35,7 @@
 
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
+#include smp.h
 
 #include mpc85xx.h
 
@@ -154,9 +155,6 @@ static int mpc85xx_exclude_device(struct pci_controller 
*hose,
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
 static void __init mpc85xx_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -189,9 +187,7 @@ static void __init mpc85xx_ds_setup_arch(void)
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
 #ifdef CONFIG_SWIOTLB
if (memblock_end_of_DRAM()  max) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c 
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 495cfd9..813b5d3 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -51,6 +51,7 @@
 #include asm/qe_ic.h
 #include asm/mpic.h
 #include asm/swiotlb.h
+#include smp.h
 
 #include mpc85xx.h
 
@@ -155,10 +156,6 @@ static int mpc8568_mds_phy_fixups(struct phy_device 
*phydev)
  * Setup the architecture
  *
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
-
 #ifdef CONFIG_QUICC_ENGINE
 static void __init mpc85xx_mds_reset_ucc_phys(void)
 {
@@ -363,9 +360,7 @@ static void __init mpc85xx_mds_setup_arch(void)
}
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
mpc85xx_mds_qe_init();
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c 
b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 9feccbb..b1ca429 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -29,6 +29,7 @@
 
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
+#include smp.h
 
 #include mpc85xx.h
 
@@ -84,9 +85,6 @@ void __init mpc85xx_rdb_pic_init(void)
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
 static void __init mpc85xx_rdb_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -104,10 +102,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
 
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
-
printk(KERN_INFO MPC85xx RDB board from Freescale Semiconductor\n);
 }
 
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c 
b/arch/powerpc/platforms/85xx/p1022_ds.c
index 2bf4342..8d5c22b 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -26,6 +26,7 @@
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
 #include asm/fsl_guts.h
+#include smp.h
 
 #include mpc85xx.h
 
@@ -268,10 +269,6 @@ void __init p1022_ds_pic_init(void)
mpic_init(mpic);
 }
 
-#ifdef CONFIG_SMP
-void __init mpc85xx_smp_init(void);
-#endif
-
 /*
  * Setup the architecture
  */
@@ -311,9 +308,7 @@ static void __init p1022_ds_setup_arch(void)
diu_ops.valid_monitor_port  = p1022ds_valid_monitor_port;
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
 #ifdef CONFIG_SWIOTLB
if (memblock_end_of_DRAM()  max) {
diff --git a/arch

[PATCH v3 02/10] powerpc: Consolidate mpic_alloc() OF address translation

2011-12-02 Thread Kyle Moffett
Instead of using the open-coded reg property lookup and address
translation in mpic_alloc(), directly call of_address_to_resource().
This includes various workarounds for special cases which the naive
of_address_translate() does not.

Afterwards it is possible to remove the copiously copy-pasted calls to
of_address_translate() from the 85xx/86xx/powermac platforms.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/platforms/85xx/corenet_ds.c  |9 +
 arch/powerpc/platforms/85xx/ksi8560.c |9 +
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |9 +
 arch/powerpc/platforms/85xx/mpc85xx_ads.c |9 +
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |9 +
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |   11 +
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |9 +
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |   11 +
 arch/powerpc/platforms/85xx/p1010rdb.c|9 +
 arch/powerpc/platforms/85xx/p1022_ds.c|9 +
 arch/powerpc/platforms/85xx/p1023_rds.c   |9 +
 arch/powerpc/platforms/85xx/sbc8548.c |9 +
 arch/powerpc/platforms/85xx/sbc8560.c |9 +
 arch/powerpc/platforms/85xx/socrates.c|9 +
 arch/powerpc/platforms/85xx/stx_gp3.c |9 +
 arch/powerpc/platforms/85xx/tqm85xx.c |9 +
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |9 +
 arch/powerpc/platforms/86xx/pic.c |4 +-
 arch/powerpc/platforms/powermac/pic.c |8 +---
 arch/powerpc/sysdev/mpic.c|   61 -
 20 files changed, 55 insertions(+), 175 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 3052821..5b1c577 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -36,7 +36,6 @@
 void __init corenet_ds_pic_init(void)
 {
struct mpic *mpic;
-   struct resource r;
struct device_node *np = NULL;
unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
@@ -48,16 +47,10 @@ void __init corenet_ds_pic_init(void)
return;
}
 
-   if (of_address_to_resource(np, 0, r)) {
-   printk(KERN_ERR Failed to map mpic register space\n);
-   of_node_put(np);
-   return;
-   }
-
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
 
-   mpic = mpic_alloc(np, r.start, flags, 0, 256,  OpenPIC  );
+   mpic = mpic_alloc(np, 0, flags, 0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
 
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c 
b/arch/powerpc/platforms/85xx/ksi8560.c
index 0f3e688..3403b0e 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -58,7 +58,6 @@ static void machine_restart(char *cmd)
 static void __init ksi8560_pic_init(void)
 {
struct mpic *mpic;
-   struct resource r;
struct device_node *np;
 
np = of_find_node_by_type(NULL, open-pic);
@@ -68,13 +67,7 @@ static void __init ksi8560_pic_init(void)
return;
}
 
-   if (of_address_to_resource(np, 0, r)) {
-   printk(KERN_ERR Could not map mpic register space\n);
-   of_node_put(np);
-   return;
-   }
-
-   mpic = mpic_alloc(np, r.start,
+   mpic = mpic_alloc(np, 0,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c 
b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 9ee6455..5c20b28 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -37,7 +37,6 @@
 void __init mpc8536_ds_pic_init(void)
 {
struct mpic *mpic;
-   struct resource r;
struct device_node *np;
 
np = of_find_node_by_type(NULL, open-pic);
@@ -46,13 +45,7 @@ void __init mpc8536_ds_pic_init(void)
return;
}
 
-   if (of_address_to_resource(np, 0, r)) {
-   printk(KERN_ERR Failed to map mpic register space\n);
-   of_node_put(np);
-   return;
-   }
-
-   mpic = mpic_alloc(np, r.start,
+   mpic = mpic_alloc(np, 0,
  MPIC_PRIMARY | MPIC_WANTS_RESET |
  MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
0, 256,  OpenPIC  );
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c 
b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 986554b..4c1e9b6 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx

[PATCH v3 03/10] powerpc/mpic: Assume a device-node was passed in mpic_alloc()

2011-12-02 Thread Kyle Moffett
All of the existing callers of mpic_alloc() pass in a non-NULL
device-node pointer, so the checks for a NULL device-node may be
removed.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/sysdev/mpic.c |   50 ++-
 1 files changed, 21 insertions(+), 29 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 8f24c6e..59564dc 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1137,19 +1137,17 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
unsigned int irq_count,
const char *name)
 {
-   struct mpic *mpic;
-   u32 greg_feature;
-   const char  *vers;
-   int i;
-   int intvec_top;
+   int i, psize, intvec_top;
+   struct mpic *mpic;
+   u32 greg_feature;
+   const char *vers;
+   const u32 *psrc;
 
-   /*
-* If no phyiscal address was specified then all of the phyiscal
-* addressing parameters must come from the device-tree.
-*/
-   if (!phys_addr) {
-   BUG_ON(!node);
+   /* This code assumes that a non-NULL device node is passed in */
+   BUG_ON(!node);
 
+   /* Pick the physical address from the device tree if unspecified */
+   if (!phys_addr) {
/* Check if it is DCR-based */
if (of_get_property(node, dcr-reg, NULL)) {
flags |= MPIC_USES_DCR;
@@ -1211,28 +1209,22 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
mpic-spurious_vec  = intvec_top;
 
/* Check for big-endian in device-tree */
-   if (node  of_get_property(node, big-endian, NULL) != NULL)
+   if (of_get_property(node, big-endian, NULL) != NULL)
mpic-flags |= MPIC_BIG_ENDIAN;
-   if (node  of_device_is_compatible(node, fsl,mpic))
+   if (of_device_is_compatible(node, fsl,mpic))
mpic-flags |= MPIC_FSL;
 
/* Look for protected sources */
-   if (node) {
-   int psize;
-   unsigned int bits, mapsize;
-   const u32 *psrc =
-   of_get_property(node, protected-sources, psize);
-   if (psrc) {
-   psize /= 4;
-   bits = intvec_top + 1;
-   mapsize = BITS_TO_LONGS(bits) * sizeof(unsigned long);
-   mpic-protected = kzalloc(mapsize, GFP_KERNEL);
-   BUG_ON(mpic-protected == NULL);
-   for (i = 0; i  psize; i++) {
-   if (psrc[i]  intvec_top)
-   continue;
-   __set_bit(psrc[i], mpic-protected);
-   }
+   psrc = of_get_property(node, protected-sources, psize);
+   if (psrc) {
+   /* Allocate a bitmap with one bit per interrupt */
+   unsigned int mapsize = BITS_TO_LONGS(intvec_top + 1);
+   mpic-protected = kzalloc(mapsize*sizeof(long), GFP_KERNEL);
+   BUG_ON(mpic-protected == NULL);
+   for (i = 0; i  psize/sizeof(u32); i++) {
+   if (psrc[i]  intvec_top)
+   continue;
+   __set_bit(psrc[i], mpic-protected);
}
}
 
-- 
1.7.2.5

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[PATCH v3 04/10] powerpc/mpic: Save computed phys_addr for board-specific code

2011-12-02 Thread Kyle Moffett
The MPIC code can already perform an automatic OF address translation
step as part of mpic_alloc(), but several boards need to use that base
address when they perform mpic_assign_isu().

The easiest solution is to save the computed physical address into the
struct mpic for later use by the board code.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/mpic.h   |3 +++
 arch/powerpc/platforms/embedded6xx/holly.c|   15 +++
 arch/powerpc/platforms/embedded6xx/linkstation.c  |   14 --
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |   16 +++-
 arch/powerpc/platforms/embedded6xx/storcenter.c   |   16 +++-
 arch/powerpc/platforms/pasemi/setup.c |2 +-
 arch/powerpc/sysdev/mpic.c|   11 ++-
 7 files changed, 23 insertions(+), 54 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index e6fae49..ba0b204 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -293,6 +293,9 @@ struct mpic
/* Register access method */
enum mpic_reg_type  reg_type;
 
+   /* The physical base address of the MPIC */
+   phys_addr_t paddr;
+
/* The various ioremap'ed bases */
struct mpic_reg_bankgregs;
struct mpic_reg_banktmregs;
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c 
b/arch/powerpc/platforms/embedded6xx/holly.c
index 2e9bcf6..d4fb41e 100644
--- a/arch/powerpc/platforms/embedded6xx/holly.c
+++ b/arch/powerpc/platforms/embedded6xx/holly.c
@@ -148,7 +148,6 @@ static void __init holly_setup_arch(void)
 static void __init holly_init_IRQ(void)
 {
struct mpic *mpic;
-   phys_addr_t mpic_paddr = 0;
struct device_node *tsi_pic;
 #ifdef CONFIG_PCI
unsigned int cascade_pci_irq;
@@ -157,20 +156,12 @@ static void __init holly_init_IRQ(void)
 #endif
 
tsi_pic = of_find_node_by_type(NULL, open-pic);
-   if (tsi_pic) {
-   unsigned int size;
-   const void *prop = of_get_property(tsi_pic, reg, size);
-   mpic_paddr = of_translate_address(tsi_pic, prop);
-   }
-
-   if (mpic_paddr == 0) {
+   if (!tsi_pic) {
printk(KERN_ERR %s: No tsi108 PIC found !\n, __func__);
return;
}
 
-   pr_debug(%s: tsi108 pic phys_addr = 0x%x\n, __func__, (u32) 
mpic_paddr);
-
-   mpic = mpic_alloc(tsi_pic, mpic_paddr,
+   mpic = mpic_alloc(tsi_pic, 0,
MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
24,
@@ -179,7 +170,7 @@ static void __init holly_init_IRQ(void)
 
BUG_ON(mpic == NULL);
 
-   mpic_assign_isu(mpic, 0, mpic_paddr + 0x100);
+   mpic_assign_isu(mpic, 0, mpic-paddr + 0x100);
 
mpic_init(mpic);
 
diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c 
b/arch/powerpc/platforms/embedded6xx/linkstation.c
index 244f997..72b3685 100644
--- a/arch/powerpc/platforms/embedded6xx/linkstation.c
+++ b/arch/powerpc/platforms/embedded6xx/linkstation.c
@@ -82,28 +82,22 @@ static void __init linkstation_init_IRQ(void)
 {
struct mpic *mpic;
struct device_node *dnp;
-   const u32 *prop;
-   int size;
-   phys_addr_t paddr;
 
dnp = of_find_node_by_type(NULL, open-pic);
if (dnp == NULL)
return;
 
-   prop = of_get_property(dnp, reg, size);
-   paddr = (phys_addr_t)of_translate_address(dnp, prop);
-
-   mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET, 4, 32,  
EPIC );
+   mpic = mpic_alloc(dnp, 0, MPIC_PRIMARY | MPIC_WANTS_RESET, 4, 32,  
EPIC );
BUG_ON(mpic == NULL);
 
/* PCI IRQs */
-   mpic_assign_isu(mpic, 0, paddr + 0x10200);
+   mpic_assign_isu(mpic, 0, mpic-paddr + 0x10200);
 
/* I2C */
-   mpic_assign_isu(mpic, 1, paddr + 0x11000);
+   mpic_assign_isu(mpic, 1, mpic-paddr + 0x11000);
 
/* ttyS0, ttyS1 */
-   mpic_assign_isu(mpic, 2, paddr + 0x11100);
+   mpic_assign_isu(mpic, 2, mpic-paddr + 0x11100);
 
mpic_init(mpic);
 }
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c 
b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index f8f33e1..c8ce204 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -102,7 +102,6 @@ static void __init mpc7448_hpc2_setup_arch(void)
 static void __init mpc7448_hpc2_init_IRQ(void)
 {
struct mpic *mpic;
-   phys_addr_t mpic_paddr = 0;
struct device_node *tsi_pic;
 #ifdef CONFIG_PCI
unsigned int cascade_pci_irq;
@@ -111,21 +110,12 @@ static void __init mpc7448_hpc2_init_IRQ(void)
 #endif
 
tsi_pic = of_find_node_by_type(NULL, open-pic);
-   if (tsi_pic

[PATCH v3 05/10] powerpc/mpic: Search for open-pic device-tree node if NULL

2011-12-02 Thread Kyle Moffett
Almost all PowerPC platforms use a standard open-pic device node so
the mpic_alloc() function now accepts NULL for the device-node.  This
will cause it to perform a default search with of_find_matching_node().

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/85xx/corenet_ds.c  |   10 +-
 arch/powerpc/platforms/85xx/ksi8560.c |   14 +
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |   13 +---
 arch/powerpc/platforms/85xx/mpc85xx_ads.c |   13 +---
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |   15 +
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |   14 ++---
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |   10 +-
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |   14 +---
 arch/powerpc/platforms/85xx/p1010rdb.c|   12 +--
 arch/powerpc/platforms/85xx/p1022_ds.c|   14 +
 arch/powerpc/platforms/85xx/p1023_rds.c   |   11 +--
 arch/powerpc/platforms/85xx/sbc8548.c |   16 +-
 arch/powerpc/platforms/85xx/sbc8560.c |   13 +---
 arch/powerpc/platforms/85xx/socrates.c|   11 +--
 arch/powerpc/platforms/85xx/stx_gp3.c |   13 +---
 arch/powerpc/platforms/85xx/tqm85xx.c |   13 +---
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |   13 +---
 arch/powerpc/platforms/86xx/pic.c |   11 +-
 arch/powerpc/platforms/embedded6xx/holly.c|   10 +-
 arch/powerpc/platforms/embedded6xx/linkstation.c  |8 +
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |   10 +-
 arch/powerpc/platforms/embedded6xx/storcenter.c   |   10 +-
 arch/powerpc/sysdev/mpic.c|   34 ++--
 23 files changed, 58 insertions(+), 244 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 5b1c577..cfa4bad 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -36,21 +36,13 @@
 void __init corenet_ds_pic_init(void)
 {
struct mpic *mpic;
-   struct device_node *np = NULL;
unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
 
-   np = of_find_node_by_type(np, open-pic);
-
-   if (np == NULL) {
-   printk(KERN_ERR Could not find open-pic node\n);
-   return;
-   }
-
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
 
-   mpic = mpic_alloc(np, 0, flags, 0, 256,  OpenPIC  );
+   mpic = mpic_alloc(NULL, 0, flags, 0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
 
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c 
b/arch/powerpc/platforms/85xx/ksi8560.c
index 3403b0e..1620fa8 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -57,22 +57,10 @@ static void machine_restart(char *cmd)
 
 static void __init ksi8560_pic_init(void)
 {
-   struct mpic *mpic;
-   struct device_node *np;
-
-   np = of_find_node_by_type(NULL, open-pic);
-
-   if (np == NULL) {
-   printk(KERN_ERR Could not find open-pic node\n);
-   return;
-   }
-
-   mpic = mpic_alloc(np, 0,
+   struct mpic *mpic = mpic_alloc(NULL, 0,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
-   of_node_put(np);
-
mpic_init(mpic);
 
mpc85xx_cpm2_pic_init();
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c 
b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 5c20b28..07916d6 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -36,22 +36,11 @@
 
 void __init mpc8536_ds_pic_init(void)
 {
-   struct mpic *mpic;
-   struct device_node *np;
-
-   np = of_find_node_by_type(NULL, open-pic);
-   if (np == NULL) {
-   printk(KERN_ERR Could not find open-pic node\n);
-   return;
-   }
-
-   mpic = mpic_alloc(np, 0,
+   struct mpic *mpic = mpic_alloc(NULL, 0,
  MPIC_PRIMARY | MPIC_WANTS_RESET |
  MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
-   of_node_put(np);
-
mpic_init(mpic);
 }
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c 
b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 4c1e9b6..17c6f06 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -50,21 +50,10 @@ static int mpc85xx_exclude_device(struct pci_controller 
*hose,
 
 static void __init mpc85xx_ads_pic_init(void)
 {
-   struct mpic *mpic;
-   struct device_node *np = NULL;
-
-   np

[PATCH v3 06/10] powerpc/mpic: Invert the meaning of MPIC_PRIMARY

2011-12-02 Thread Kyle Moffett
It turns out that there are only 2 in-tree platforms which use MPICs
which are not primary:  IBM Cell and PowerMac.  To reduce the
complexity of the typical board setup code, invert the MPIC_PRIMARY bit
into MPIC_SECONDARY.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/mpic.h   |8 
 arch/powerpc/platforms/44x/iss4xx.c   |2 +-
 arch/powerpc/platforms/85xx/corenet_ds.c  |2 +-
 arch/powerpc/platforms/85xx/ksi8560.c |2 +-
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_ads.c |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |3 +--
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |3 +--
 arch/powerpc/platforms/85xx/p1010rdb.c|4 ++--
 arch/powerpc/platforms/85xx/p1022_ds.c|2 +-
 arch/powerpc/platforms/85xx/p1023_rds.c   |2 +-
 arch/powerpc/platforms/85xx/sbc8548.c |2 +-
 arch/powerpc/platforms/85xx/sbc8560.c |2 +-
 arch/powerpc/platforms/85xx/socrates.c|2 +-
 arch/powerpc/platforms/85xx/stx_gp3.c |2 +-
 arch/powerpc/platforms/85xx/tqm85xx.c |2 +-
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |2 +-
 arch/powerpc/platforms/86xx/pic.c |5 ++---
 arch/powerpc/platforms/cell/setup.c   |2 +-
 arch/powerpc/platforms/chrp/setup.c   |3 +--
 arch/powerpc/platforms/embedded6xx/holly.c|2 +-
 arch/powerpc/platforms/embedded6xx/linkstation.c  |2 +-
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |2 +-
 arch/powerpc/platforms/embedded6xx/storcenter.c   |2 +-
 arch/powerpc/platforms/maple/setup.c  |2 +-
 arch/powerpc/platforms/pasemi/setup.c |2 +-
 arch/powerpc/platforms/powermac/pic.c |2 +-
 arch/powerpc/platforms/pseries/setup.c|3 +--
 arch/powerpc/sysdev/mpic.c|   14 +++---
 31 files changed, 42 insertions(+), 47 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index ba0b204..b9d2c0f 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -334,11 +334,11 @@ struct mpic
  * Note setting any ID (leaving those bits to 0) means standard MPIC
  */
 
-/* This is the primary controller, only that one has IPIs and
- * has afinity control. A non-primary MPIC always uses CPU0
- * registers only
+/*
+ * This is a secondary (chained) controller; it only uses the CPU0
+ * registers.  Primary controllers have IPIs and affinity control.
  */
-#define MPIC_PRIMARY   0x0001
+#define MPIC_SECONDARY 0x0001
 
 /* Set this for a big-endian MPIC */
 #define MPIC_BIG_ENDIAN0x0002
diff --git a/arch/powerpc/platforms/44x/iss4xx.c 
b/arch/powerpc/platforms/44x/iss4xx.c
index 19395f1..5b8cdbb 100644
--- a/arch/powerpc/platforms/44x/iss4xx.c
+++ b/arch/powerpc/platforms/44x/iss4xx.c
@@ -71,7 +71,7 @@ static void __init iss4xx_init_irq(void)
/* The MPIC driver will get everything it needs from the
 * device-tree, just pass 0 to all arguments
 */
-   struct mpic *mpic = mpic_alloc(np, 0, MPIC_PRIMARY, 0, 0,
+   struct mpic *mpic = mpic_alloc(np, 0, 0, 0, 0,
MPIC );
BUG_ON(mpic == NULL);
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index cfa4bad..07e3e6c 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -36,7 +36,7 @@
 void __init corenet_ds_pic_init(void)
 {
struct mpic *mpic;
-   unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
+   unsigned int flags = MPIC_BIG_ENDIAN |
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
 
if (ppc_md.get_irq == mpic_get_coreint_irq)
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c 
b/arch/powerpc/platforms/85xx/ksi8560.c
index 1620fa8..20f75d7 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -58,7 +58,7 @@ static void machine_restart(char *cmd)
 static void __init ksi8560_pic_init(void)
 {
struct mpic *mpic = mpic_alloc(NULL, 0,
-   MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+   MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c 
b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 07916d6..cf26682 100644

[PATCH v3 07/10] powerpc/mpic: Don't open-code dcr_resource_start

2011-12-02 Thread Kyle Moffett
Don't open-code the OpenFirmware dcr-reg property lookup trying to map
DCR resources.  This makes the code a bit easier to read.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/sysdev/mpic.c |7 ++-
 1 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 6d42ad1..1e7584b 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -319,11 +319,8 @@ static void _mpic_map_dcr(struct mpic *mpic, struct 
device_node *node,
  struct mpic_reg_bank *rb,
  unsigned int offset, unsigned int size)
 {
-   const u32 *dbasep;
-
-   dbasep = of_get_property(node, dcr-reg, NULL);
-
-   rb-dhost = dcr_map(node, *dbasep + offset, size);
+   phys_addr_t phys_addr = dcr_resource_start(node, 0);
+   rb-dhost = dcr_map(mpic-node, phys_addr + offset, size);
BUG_ON(!DCR_MAP_OK(rb-dhost));
 }
 
-- 
1.7.2.5

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[PATCH v3 08/10] powerpc/mpic: Put pic-no-reset test back into the MPIC code

2011-12-02 Thread Kyle Moffett
There's not really any reason to have this one-liner in a separate
static inline function, given that all the other similar tests are
already in the alloc_mpic() code.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/sysdev/mpic.c |7 +--
 1 files changed, 1 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 1e7584b..3240bba 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1118,11 +1118,6 @@ static struct irq_host_ops mpic_host_ops = {
.xlate = mpic_host_xlate,
 };
 
-static int mpic_reset_prohibited(struct device_node *node)
-{
-   return node  of_get_property(node, pic-no-reset, NULL);
-}
-
 /*
  * Exported functions
  */
@@ -1272,7 +1267,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
/* When using a device-node, reset requests are only honored if the MPIC
 * is allowed to reset.
 */
-   if (mpic_reset_prohibited(node))
+   if (of_get_property(node, pic-no-reset, NULL))
mpic-flags |= MPIC_NO_RESET;
 
if ((flags  MPIC_WANTS_RESET)  !(mpic-flags  MPIC_NO_RESET)) {
-- 
1.7.2.5

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[PATCH v3 09/10] powerpc/mpic: Cache the device-tree node in struct mpic

2011-12-02 Thread Kyle Moffett
Store the node pointer in the MPIC during initialization so that all of
the later operational code can just reuse the cached pointer.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/mpic.h |3 +++
 arch/powerpc/sysdev/mpic.c  |   33 -
 2 files changed, 19 insertions(+), 17 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index b9d2c0f..67b4d98 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -251,6 +251,9 @@ struct mpic_irq_save {
 /* The instance data of a given MPIC */
 struct mpic
 {
+   /* The OpenFirmware dt node for this MPIC */
+   struct device_node *node;
+
/* The remapper for this MPIC */
struct irq_host *irqhost;
 
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 3240bba..7611060 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -315,26 +315,25 @@ static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t 
phys_addr,
 }
 
 #ifdef CONFIG_PPC_DCR
-static void _mpic_map_dcr(struct mpic *mpic, struct device_node *node,
- struct mpic_reg_bank *rb,
+static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb,
  unsigned int offset, unsigned int size)
 {
-   phys_addr_t phys_addr = dcr_resource_start(node, 0);
+   phys_addr_t phys_addr = dcr_resource_start(mpic-node, 0);
rb-dhost = dcr_map(mpic-node, phys_addr + offset, size);
BUG_ON(!DCR_MAP_OK(rb-dhost));
 }
 
-static inline void mpic_map(struct mpic *mpic, struct device_node *node,
+static inline void mpic_map(struct mpic *mpic,
phys_addr_t phys_addr, struct mpic_reg_bank *rb,
unsigned int offset, unsigned int size)
 {
if (mpic-flags  MPIC_USES_DCR)
-   _mpic_map_dcr(mpic, node, rb, offset, size);
+   _mpic_map_dcr(mpic, rb, offset, size);
else
_mpic_map_mmio(mpic, phys_addr, rb, offset, size);
 }
 #else /* CONFIG_PPC_DCR */
-#define mpic_map(m,n,p,b,o,s)  _mpic_map_mmio(m,p,b,o,s)
+#define mpic_map(m,p,b,o,s)_mpic_map_mmio(m,p,b,o,s)
 #endif /* !CONFIG_PPC_DCR */
 
 
@@ -1172,6 +1171,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
goto err_of_node_put;
 
mpic-name = name;
+   mpic-node = node;
mpic-paddr = phys_addr;
 
mpic-hc_irq = mpic_irq_chip;
@@ -1218,13 +1218,13 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
mpic-spurious_vec  = intvec_top;
 
/* Check for big-endian in device-tree */
-   if (of_get_property(node, big-endian, NULL) != NULL)
+   if (of_get_property(mpic-node, big-endian, NULL) != NULL)
mpic-flags |= MPIC_BIG_ENDIAN;
-   if (of_device_is_compatible(node, fsl,mpic))
+   if (of_device_is_compatible(mpic-node, fsl,mpic))
mpic-flags |= MPIC_FSL;
 
/* Look for protected sources */
-   psrc = of_get_property(node, protected-sources, psize);
+   psrc = of_get_property(mpic-node, protected-sources, psize);
if (psrc) {
/* Allocate a bitmap with one bit per interrupt */
unsigned int mapsize = BITS_TO_LONGS(intvec_top + 1);
@@ -1259,15 +1259,15 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
 #endif
 
/* Map the global registers */
-   mpic_map(mpic, node, mpic-paddr, mpic-gregs, MPIC_INFO(GREG_BASE), 
0x1000);
-   mpic_map(mpic, node, mpic-paddr, mpic-tmregs, MPIC_INFO(TIMER_BASE), 
0x1000);
+   mpic_map(mpic, mpic-paddr, mpic-gregs, MPIC_INFO(GREG_BASE), 0x1000);
+   mpic_map(mpic, mpic-paddr, mpic-tmregs, MPIC_INFO(TIMER_BASE), 
0x1000);
 
/* Reset */
 
/* When using a device-node, reset requests are only honored if the MPIC
 * is allowed to reset.
 */
-   if (of_get_property(node, pic-no-reset, NULL))
+   if (of_get_property(mpic-node, pic-no-reset, NULL))
mpic-flags |= MPIC_NO_RESET;
 
if ((flags  MPIC_WANTS_RESET)  !(mpic-flags  MPIC_NO_RESET)) {
@@ -1315,7 +1315,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
for_each_possible_cpu(i) {
unsigned int cpu = get_hard_smp_processor_id(i);
 
-   mpic_map(mpic, node, mpic-paddr, mpic-cpuregs[cpu],
+   mpic_map(mpic, mpic-paddr, mpic-cpuregs[cpu],
 MPIC_INFO(CPU_BASE) + cpu * MPIC_INFO(CPU_STRIDE),
 0x1000);
}
@@ -1323,13 +1323,13 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
/* Initialize main ISU if none provided */
if (mpic-isu_size == 0) {
mpic-isu_size = mpic-num_sources;
-   mpic_map(mpic, node, mpic-paddr, mpic-isus[0],
+   mpic_map(mpic, mpic-paddr, mpic-isus[0

[PATCH v3 10/10] powerpc/mpic: Add in-core support for cascaded MPICs

2011-12-02 Thread Kyle Moffett
The Cell and PowerMac platforms use virtually identical cascaded-IRQ
setup code, so just merge it into the core.  Ideally this code would
trigger automatically when an MPIC device-node specifies an interrupts
property, perhaps even enabling MPIC_SECONDARY along the way.

Unfortunately, Benjamin Herrenschmidt has had bad experiences in the
past with the quality of Apple PowerMac device-trees, so to be safe we
will only try to parse out an IRQ if the MPIC_SECONDARY flag is set by
the caller.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/cell/setup.c   |   23 -
 arch/powerpc/platforms/powermac/pic.c |   36 
 arch/powerpc/sysdev/mpic.c|   30 +-
 3 files changed, 33 insertions(+), 56 deletions(-)

diff --git a/arch/powerpc/platforms/cell/setup.c 
b/arch/powerpc/platforms/cell/setup.c
index cd00ca8..62002a7 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -184,24 +184,10 @@ static int __init cell_publish_devices(void)
 }
 machine_subsys_initcall(cell, cell_publish_devices);
 
-static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
-{
-   struct irq_chip *chip = irq_desc_get_chip(desc);
-   struct mpic *mpic = irq_desc_get_handler_data(desc);
-   unsigned int virq;
-
-   virq = mpic_get_one_irq(mpic);
-   if (virq != NO_IRQ)
-   generic_handle_irq(virq);
-
-   chip-irq_eoi(desc-irq_data);
-}
-
 static void __init mpic_init_IRQ(void)
 {
struct device_node *dn;
struct mpic *mpic;
-   unsigned int virq;
 
for (dn = NULL;
 (dn = of_find_node_by_name(dn, interrupt-controller));) {
@@ -215,15 +201,6 @@ static void __init mpic_init_IRQ(void)
if (mpic == NULL)
continue;
mpic_init(mpic);
-
-   virq = irq_of_parse_and_map(dn, 0);
-   if (virq == NO_IRQ)
-   continue;
-
-   printk(KERN_INFO %s : hooking up to IRQ %d\n,
-  dn-full_name, virq);
-   irq_set_handler_data(virq, mpic);
-   irq_set_chained_handler(virq, cell_mpic_cascade);
}
 }
 
diff --git a/arch/powerpc/platforms/powermac/pic.c 
b/arch/powerpc/platforms/powermac/pic.c
index b962101..d8aedf1 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -464,18 +464,6 @@ int of_irq_map_oldworld(struct device_node *device, int 
index,
 }
 #endif /* CONFIG_PPC32 */
 
-static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc)
-{
-   struct irq_chip *chip = irq_desc_get_chip(desc);
-   struct mpic *mpic = irq_desc_get_handler_data(desc);
-   unsigned int cascade_irq = mpic_get_one_irq(mpic);
-
-   if (cascade_irq != NO_IRQ)
-   generic_handle_irq(cascade_irq);
-
-   chip-irq_eoi(desc-irq_data);
-}
-
 static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic)
 {
 #if defined(CONFIG_XMON)  defined(CONFIG_PPC32)
@@ -526,7 +514,6 @@ static int __init pmac_pic_probe_mpic(void)
 {
struct mpic *mpic1, *mpic2;
struct device_node *np, *master = NULL, *slave = NULL;
-   unsigned int cascade;
 
/* We can have up to 2 MPICs cascaded */
for (np = NULL; (np = of_find_node_by_type(np, open-pic))
@@ -562,27 +549,14 @@ static int __init pmac_pic_probe_mpic(void)
 
of_node_put(master);
 
-   /* No slave, let's go out */
-   if (slave == NULL)
-   return 0;
-
-   /* Get/Map slave interrupt */
-   cascade = irq_of_parse_and_map(slave, 0);
-   if (cascade == NO_IRQ) {
-   printk(KERN_ERR Failed to map cascade IRQ\n);
-   return 0;
-   }
-
-   mpic2 = pmac_setup_one_mpic(slave, 0);
-   if (mpic2 == NULL) {
-   printk(KERN_ERR Failed to setup slave MPIC\n);
+   /* Set up a cascaded controller, if present */
+   if (slave) {
+   mpic2 = pmac_setup_one_mpic(slave, 0);
+   if (mpic2 == NULL)
+   printk(KERN_ERR Failed to setup slave MPIC\n);
of_node_put(slave);
-   return 0;
}
-   irq_set_handler_data(cascade, mpic2);
-   irq_set_chained_handler(cascade, pmac_u3_cascade);
 
-   of_node_put(slave);
return 0;
 }
 
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 7611060..4e9ccb1 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -,6 +,22 @@ static int mpic_host_xlate(struct irq_host *h, struct 
device_node *ct,
return 0;
 }
 
+/* IRQ handler for a secondary MPIC cascaded from another IRQ controller */
+static void mpic_cascade(unsigned int irq, struct irq_desc *desc)
+{
+   struct irq_chip *chip = irq_desc_get_chip(desc);
+   struct mpic *mpic = irq_desc_get_handler_data(desc);
+   unsigned

[PATCH 00/10] powerpc/mpic: General cleanup patch series

2011-11-29 Thread Kyle Moffett
Hello,

As BenH requested, this is the version-2 repost of the PowerPC MPIC
cleanup patch series.

All of the review comments have been addressed, and I have performed
build and boot testing on our HWW-1U-1A hardware with these patches
applied (plus a few independent board-support patches).

Unfortunately, this has a potentially very broad impact across a wide
variety of hardware that I don't have the ability to test with, so
any additional testing will be highly appreciated.  Ben has indicated
that he plans to put it into his testing tree soon, so hopefully any
such issues will get ironed out quickly.

Cheers,
Kyle Moffett

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[PATCH 03/10] powerpc/mpic: Assume a device-node was passed in mpic_alloc()

2011-11-29 Thread Kyle Moffett
All of the existing callers of mpic_alloc() pass in a non-NULL
device-node pointer, so the checks for a NULL device-node may be
removed.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/sysdev/mpic.c |   50 ++-
 1 files changed, 21 insertions(+), 29 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index d68c9ca..cdfa8df 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1137,19 +1137,17 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
unsigned int irq_count,
const char *name)
 {
-   struct mpic *mpic;
-   u32 greg_feature;
-   const char  *vers;
-   int i;
-   int intvec_top;
+   int i, psize, intvec_top;
+   struct mpic *mpic;
+   u32 greg_feature;
+   const char *vers;
+   const u32 *psrc;
 
-   /*
-* If no phyiscal address was specified then all of the phyiscal
-* addressing parameters must come from the device-tree.
-*/
-   if (!phys_addr) {
-   BUG_ON(!node);
+   /* This code assumes that a non-NULL device node is passed in */
+   BUG_ON(!node);
 
+   /* Pick the physical address from the device tree if unspecified */
+   if (!phys_addr) {
/* Check if it is DCR-based */
if (of_get_property(node, dcr-reg, NULL)) {
flags |= MPIC_USES_DCR;
@@ -1211,28 +1209,22 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
mpic-spurious_vec  = intvec_top;
 
/* Check for big-endian in device-tree */
-   if (node  of_get_property(node, big-endian, NULL) != NULL)
+   if (of_get_property(node, big-endian, NULL) != NULL)
mpic-flags |= MPIC_BIG_ENDIAN;
-   if (node  of_device_is_compatible(node, fsl,mpic))
+   if (of_device_is_compatible(node, fsl,mpic))
mpic-flags |= MPIC_FSL;
 
/* Look for protected sources */
-   if (node) {
-   int psize;
-   unsigned int bits, mapsize;
-   const u32 *psrc =
-   of_get_property(node, protected-sources, psize);
-   if (psrc) {
-   psize /= 4;
-   bits = intvec_top + 1;
-   mapsize = BITS_TO_LONGS(bits) * sizeof(unsigned long);
-   mpic-protected = kzalloc(mapsize, GFP_KERNEL);
-   BUG_ON(mpic-protected == NULL);
-   for (i = 0; i  psize; i++) {
-   if (psrc[i]  intvec_top)
-   continue;
-   __set_bit(psrc[i], mpic-protected);
-   }
+   psrc = of_get_property(node, protected-sources, psize);
+   if (psrc) {
+   /* Allocate a bitmap with one bit per interrupt */
+   unsigned int mapsize = BITS_TO_LONGS(intvec_top + 1);
+   mpic-protected = kzalloc(mapsize*sizeof(long), GFP_KERNEL);
+   BUG_ON(mpic-protected == NULL);
+   for (i = 0; i  psize/sizeof(u32); i++) {
+   if (psrc[i]  intvec_top)
+   continue;
+   __set_bit(psrc[i], mpic-protected);
}
}
 
-- 
1.7.2.5

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[PATCH 02/10] powerpc: Consolidate mpic_alloc() OF address translation

2011-11-29 Thread Kyle Moffett
Instead of using the open-coded reg property lookup and address
translation in mpic_alloc(), directly call of_address_to_resource().
This includes various workarounds for special cases which the naive
of_address_translate() does not.

Afterwards it is possible to remove the copiously copy-pasted calls to
of_address_translate() from the 85xx/86xx/powermac platforms.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/platforms/85xx/corenet_ds.c  |9 +
 arch/powerpc/platforms/85xx/ksi8560.c |9 +
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |9 +
 arch/powerpc/platforms/85xx/mpc85xx_ads.c |9 +
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |9 +
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |   11 +
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |9 +
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |   11 +
 arch/powerpc/platforms/85xx/p1010rdb.c|9 +
 arch/powerpc/platforms/85xx/p1022_ds.c|9 +
 arch/powerpc/platforms/85xx/p1023_rds.c   |9 +
 arch/powerpc/platforms/85xx/sbc8548.c |9 +
 arch/powerpc/platforms/85xx/sbc8560.c |9 +
 arch/powerpc/platforms/85xx/socrates.c|9 +
 arch/powerpc/platforms/85xx/stx_gp3.c |9 +
 arch/powerpc/platforms/85xx/tqm85xx.c |9 +
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |9 +
 arch/powerpc/platforms/86xx/pic.c |4 +-
 arch/powerpc/platforms/powermac/pic.c |7 +---
 arch/powerpc/sysdev/mpic.c|   61 -
 20 files changed, 55 insertions(+), 174 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 435074d..7893ad3 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -36,7 +36,6 @@
 void __init corenet_ds_pic_init(void)
 {
struct mpic *mpic;
-   struct resource r;
struct device_node *np = NULL;
unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
@@ -48,16 +47,10 @@ void __init corenet_ds_pic_init(void)
return;
}
 
-   if (of_address_to_resource(np, 0, r)) {
-   printk(KERN_ERR Failed to map mpic register space\n);
-   of_node_put(np);
-   return;
-   }
-
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
 
-   mpic = mpic_alloc(np, r.start, flags, 0, 256,  OpenPIC  );
+   mpic = mpic_alloc(np, 0, flags, 0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
 
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c 
b/arch/powerpc/platforms/85xx/ksi8560.c
index c46f935..b20c07d 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -68,7 +68,6 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc 
*desc)
 static void __init ksi8560_pic_init(void)
 {
struct mpic *mpic;
-   struct resource r;
struct device_node *np;
 #ifdef CONFIG_CPM2
int irq;
@@ -81,13 +80,7 @@ static void __init ksi8560_pic_init(void)
return;
}
 
-   if (of_address_to_resource(np, 0, r)) {
-   printk(KERN_ERR Could not map mpic register space\n);
-   of_node_put(np);
-   return;
-   }
-
-   mpic = mpic_alloc(np, r.start,
+   mpic = mpic_alloc(np, 0,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c 
b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index f79f2f1..03173ba 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -35,7 +35,6 @@
 void __init mpc8536_ds_pic_init(void)
 {
struct mpic *mpic;
-   struct resource r;
struct device_node *np;
 
np = of_find_node_by_type(NULL, open-pic);
@@ -44,13 +43,7 @@ void __init mpc8536_ds_pic_init(void)
return;
}
 
-   if (of_address_to_resource(np, 0, r)) {
-   printk(KERN_ERR Failed to map mpic register space\n);
-   of_node_put(np);
-   return;
-   }
-
-   mpic = mpic_alloc(np, r.start,
+   mpic = mpic_alloc(np, 0,
  MPIC_PRIMARY | MPIC_WANTS_RESET |
  MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
0, 256,  OpenPIC  );
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c 
b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 3b2c9bb..5cb797b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms

[PATCH 04/10] powerpc/mpic: Save computed phys_addr for board-specific code

2011-11-29 Thread Kyle Moffett
The MPIC code can already perform an automatic OF address translation
step as part of mpic_alloc(), but several boards need to use that base
address when they perform mpic_assign_isu().

The easiest solution is to save the computed physical address into the
struct mpic for later use by the board code.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/mpic.h   |3 +++
 arch/powerpc/platforms/embedded6xx/holly.c|   15 +++
 arch/powerpc/platforms/embedded6xx/linkstation.c  |   14 --
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |   16 +++-
 arch/powerpc/platforms/embedded6xx/storcenter.c   |   16 +++-
 arch/powerpc/platforms/pasemi/setup.c |2 +-
 arch/powerpc/sysdev/mpic.c|   11 ++-
 7 files changed, 23 insertions(+), 54 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index e6fae49..ba0b204 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -293,6 +293,9 @@ struct mpic
/* Register access method */
enum mpic_reg_type  reg_type;
 
+   /* The physical base address of the MPIC */
+   phys_addr_t paddr;
+
/* The various ioremap'ed bases */
struct mpic_reg_bankgregs;
struct mpic_reg_banktmregs;
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c 
b/arch/powerpc/platforms/embedded6xx/holly.c
index 2e9bcf6..d4fb41e 100644
--- a/arch/powerpc/platforms/embedded6xx/holly.c
+++ b/arch/powerpc/platforms/embedded6xx/holly.c
@@ -148,7 +148,6 @@ static void __init holly_setup_arch(void)
 static void __init holly_init_IRQ(void)
 {
struct mpic *mpic;
-   phys_addr_t mpic_paddr = 0;
struct device_node *tsi_pic;
 #ifdef CONFIG_PCI
unsigned int cascade_pci_irq;
@@ -157,20 +156,12 @@ static void __init holly_init_IRQ(void)
 #endif
 
tsi_pic = of_find_node_by_type(NULL, open-pic);
-   if (tsi_pic) {
-   unsigned int size;
-   const void *prop = of_get_property(tsi_pic, reg, size);
-   mpic_paddr = of_translate_address(tsi_pic, prop);
-   }
-
-   if (mpic_paddr == 0) {
+   if (!tsi_pic) {
printk(KERN_ERR %s: No tsi108 PIC found !\n, __func__);
return;
}
 
-   pr_debug(%s: tsi108 pic phys_addr = 0x%x\n, __func__, (u32) 
mpic_paddr);
-
-   mpic = mpic_alloc(tsi_pic, mpic_paddr,
+   mpic = mpic_alloc(tsi_pic, 0,
MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
24,
@@ -179,7 +170,7 @@ static void __init holly_init_IRQ(void)
 
BUG_ON(mpic == NULL);
 
-   mpic_assign_isu(mpic, 0, mpic_paddr + 0x100);
+   mpic_assign_isu(mpic, 0, mpic-paddr + 0x100);
 
mpic_init(mpic);
 
diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c 
b/arch/powerpc/platforms/embedded6xx/linkstation.c
index 244f997..72b3685 100644
--- a/arch/powerpc/platforms/embedded6xx/linkstation.c
+++ b/arch/powerpc/platforms/embedded6xx/linkstation.c
@@ -82,28 +82,22 @@ static void __init linkstation_init_IRQ(void)
 {
struct mpic *mpic;
struct device_node *dnp;
-   const u32 *prop;
-   int size;
-   phys_addr_t paddr;
 
dnp = of_find_node_by_type(NULL, open-pic);
if (dnp == NULL)
return;
 
-   prop = of_get_property(dnp, reg, size);
-   paddr = (phys_addr_t)of_translate_address(dnp, prop);
-
-   mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET, 4, 32,  
EPIC );
+   mpic = mpic_alloc(dnp, 0, MPIC_PRIMARY | MPIC_WANTS_RESET, 4, 32,  
EPIC );
BUG_ON(mpic == NULL);
 
/* PCI IRQs */
-   mpic_assign_isu(mpic, 0, paddr + 0x10200);
+   mpic_assign_isu(mpic, 0, mpic-paddr + 0x10200);
 
/* I2C */
-   mpic_assign_isu(mpic, 1, paddr + 0x11000);
+   mpic_assign_isu(mpic, 1, mpic-paddr + 0x11000);
 
/* ttyS0, ttyS1 */
-   mpic_assign_isu(mpic, 2, paddr + 0x11100);
+   mpic_assign_isu(mpic, 2, mpic-paddr + 0x11100);
 
mpic_init(mpic);
 }
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c 
b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index f8f33e1..c8ce204 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -102,7 +102,6 @@ static void __init mpc7448_hpc2_setup_arch(void)
 static void __init mpc7448_hpc2_init_IRQ(void)
 {
struct mpic *mpic;
-   phys_addr_t mpic_paddr = 0;
struct device_node *tsi_pic;
 #ifdef CONFIG_PCI
unsigned int cascade_pci_irq;
@@ -111,21 +110,12 @@ static void __init mpc7448_hpc2_init_IRQ(void)
 #endif
 
tsi_pic = of_find_node_by_type(NULL, open-pic);
-   if (tsi_pic

[PATCH 01/10] powerpc/85xx: Move mpc85xx_smp_init() decl to a new smp.h

2011-11-29 Thread Kyle Moffett
This removes a bunch of extern declarations and CONFIG_SMP ifdefs.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/platforms/85xx/corenet_ds.c  |7 +--
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |6 +-
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |7 +--
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |7 +--
 arch/powerpc/platforms/85xx/p1022_ds.c|7 +--
 arch/powerpc/platforms/85xx/p1023_rds.c   |7 +--
 arch/powerpc/platforms/85xx/smp.c |1 +
 arch/powerpc/platforms/85xx/smp.h |   15 +++
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |6 +-
 9 files changed, 23 insertions(+), 40 deletions(-)
 create mode 100644 arch/powerpc/platforms/85xx/smp.h

diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 802ad11..435074d 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -31,6 +31,7 @@
 #include linux/of_platform.h
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
+#include smp.h
 
 void __init corenet_ds_pic_init(void)
 {
@@ -65,10 +66,6 @@ void __init corenet_ds_pic_init(void)
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-void __init mpc85xx_smp_init(void);
-#endif
-
 void __init corenet_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -77,9 +74,7 @@ void __init corenet_ds_setup_arch(void)
 #endif
dma_addr_t max = 0x;
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
 #ifdef CONFIG_PCI
for_each_node_by_type(np, pci) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c 
b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 1b9a8cf..52d2a3e 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -35,6 +35,7 @@
 
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
+#include smp.h
 
 #undef DEBUG
 
@@ -152,9 +153,6 @@ static int mpc85xx_exclude_device(struct pci_controller 
*hose,
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
 static void __init mpc85xx_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -187,9 +185,7 @@ static void __init mpc85xx_ds_setup_arch(void)
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
 #ifdef CONFIG_SWIOTLB
if (memblock_end_of_DRAM()  max) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c 
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index a23a3ff..e4d470e 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -51,6 +51,7 @@
 #include asm/qe_ic.h
 #include asm/mpic.h
 #include asm/swiotlb.h
+#include smp.h
 
 #undef DEBUG
 #ifdef DEBUG
@@ -153,10 +154,6 @@ static int mpc8568_mds_phy_fixups(struct phy_device 
*phydev)
  * Setup the architecture
  *
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
-
 #ifdef CONFIG_QUICC_ENGINE
 static struct of_device_id mpc85xx_qe_ids[] __initdata = {
{ .type = qe, },
@@ -381,9 +378,7 @@ static void __init mpc85xx_mds_setup_arch(void)
}
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
mpc85xx_mds_qe_init();
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c 
b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index f5ff911..cd49898 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -29,6 +29,7 @@
 
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
+#include smp.h
 
 #undef DEBUG
 
@@ -82,9 +83,6 @@ void __init mpc85xx_rdb_pic_init(void)
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
 static void __init mpc85xx_rdb_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -102,10 +100,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
 
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
-
printk(KERN_INFO MPC85xx RDB board from Freescale Semiconductor\n);
 }
 
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c 
b/arch/powerpc/platforms/85xx/p1022_ds.c
index fda1571..089b959 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -26,6 +26,7 @@
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
 #include asm/fsl_guts.h
+#include smp.h
 
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
 
@@ -266,10 +267,6 @@ void __init p1022_ds_pic_init(void)
mpic_init(mpic);
 }
 
-#ifdef CONFIG_SMP
-void __init mpc85xx_smp_init(void);
-#endif
-
 /*
  * Setup the architecture
  */
@@ -309,9 +306,7 @@ static void __init p1022_ds_setup_arch(void)
diu_ops.valid_monitor_port  = p1022ds_valid_monitor_port;
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
 #ifdef

[PATCH 09/10] powerpc/mpic: Cache the device-tree node in struct mpic

2011-11-29 Thread Kyle Moffett
Store the node pointer in the MPIC during initialization so that all of
the later operational code can just reuse the cached pointer.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/mpic.h |3 +++
 arch/powerpc/sysdev/mpic.c  |   33 -
 2 files changed, 19 insertions(+), 17 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index b9d2c0f..67b4d98 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -251,6 +251,9 @@ struct mpic_irq_save {
 /* The instance data of a given MPIC */
 struct mpic
 {
+   /* The OpenFirmware dt node for this MPIC */
+   struct device_node *node;
+
/* The remapper for this MPIC */
struct irq_host *irqhost;
 
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 5b380b8..67842a5 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -315,26 +315,25 @@ static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t 
phys_addr,
 }
 
 #ifdef CONFIG_PPC_DCR
-static void _mpic_map_dcr(struct mpic *mpic, struct device_node *node,
- struct mpic_reg_bank *rb,
+static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb,
  unsigned int offset, unsigned int size)
 {
-   phys_addr_t phys_addr = dcr_resource_start(node);
+   phys_addr_t phys_addr = dcr_resource_start(mpic-node);
rb-dhost = dcr_map(mpic-node, phys_addr + offset, size);
BUG_ON(!DCR_MAP_OK(rb-dhost));
 }
 
-static inline void mpic_map(struct mpic *mpic, struct device_node *node,
+static inline void mpic_map(struct mpic *mpic,
phys_addr_t phys_addr, struct mpic_reg_bank *rb,
unsigned int offset, unsigned int size)
 {
if (mpic-flags  MPIC_USES_DCR)
-   _mpic_map_dcr(mpic, node, rb, offset, size);
+   _mpic_map_dcr(mpic, rb, offset, size);
else
_mpic_map_mmio(mpic, phys_addr, rb, offset, size);
 }
 #else /* CONFIG_PPC_DCR */
-#define mpic_map(m,n,p,b,o,s)  _mpic_map_mmio(m,p,b,o,s)
+#define mpic_map(m,p,b,o,s)_mpic_map_mmio(m,p,b,o,s)
 #endif /* !CONFIG_PPC_DCR */
 
 
@@ -1172,6 +1171,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
goto err_of_node_put;
 
mpic-name = name;
+   mpic-node = node;
mpic-paddr = phys_addr;
 
mpic-hc_irq = mpic_irq_chip;
@@ -1218,13 +1218,13 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
mpic-spurious_vec  = intvec_top;
 
/* Check for big-endian in device-tree */
-   if (of_get_property(node, big-endian, NULL) != NULL)
+   if (of_get_property(mpic-node, big-endian, NULL) != NULL)
mpic-flags |= MPIC_BIG_ENDIAN;
-   if (of_device_is_compatible(node, fsl,mpic))
+   if (of_device_is_compatible(mpic-node, fsl,mpic))
mpic-flags |= MPIC_FSL;
 
/* Look for protected sources */
-   psrc = of_get_property(node, protected-sources, psize);
+   psrc = of_get_property(mpic-node, protected-sources, psize);
if (psrc) {
/* Allocate a bitmap with one bit per interrupt */
unsigned int mapsize = BITS_TO_LONGS(intvec_top + 1);
@@ -1259,15 +1259,15 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
 #endif
 
/* Map the global registers */
-   mpic_map(mpic, node, mpic-paddr, mpic-gregs, MPIC_INFO(GREG_BASE), 
0x1000);
-   mpic_map(mpic, node, mpic-paddr, mpic-tmregs, MPIC_INFO(TIMER_BASE), 
0x1000);
+   mpic_map(mpic, mpic-paddr, mpic-gregs, MPIC_INFO(GREG_BASE), 0x1000);
+   mpic_map(mpic, mpic-paddr, mpic-tmregs, MPIC_INFO(TIMER_BASE), 
0x1000);
 
/* Reset */
 
/* When using a device-node, reset requests are only honored if the MPIC
 * is allowed to reset.
 */
-   if (of_get_property(node, pic-no-reset, NULL))
+   if (of_get_property(mpic-node, pic-no-reset, NULL))
mpic-flags |= MPIC_NO_RESET;
 
if ((flags  MPIC_WANTS_RESET)  !(mpic-flags  MPIC_NO_RESET)) {
@@ -1315,7 +1315,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
for_each_possible_cpu(i) {
unsigned int cpu = get_hard_smp_processor_id(i);
 
-   mpic_map(mpic, node, mpic-paddr, mpic-cpuregs[cpu],
+   mpic_map(mpic, mpic-paddr, mpic-cpuregs[cpu],
 MPIC_INFO(CPU_BASE) + cpu * MPIC_INFO(CPU_STRIDE),
 0x1000);
}
@@ -1323,13 +1323,13 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
/* Initialize main ISU if none provided */
if (mpic-isu_size == 0) {
mpic-isu_size = mpic-num_sources;
-   mpic_map(mpic, node, mpic-paddr, mpic-isus[0],
+   mpic_map(mpic, mpic-paddr, mpic-isus[0

[PATCH 05/10] powerpc/mpic: Search for open-pic device-tree node if NULL

2011-11-29 Thread Kyle Moffett
Almost all PowerPC platforms use a standard open-pic device node so
the mpic_alloc() function now accepts NULL for the device-node.  This
will cause it to perform a default search with of_find_matching_node().

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/85xx/corenet_ds.c  |   10 +-
 arch/powerpc/platforms/85xx/ksi8560.c |   13 +---
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |   13 +---
 arch/powerpc/platforms/85xx/mpc85xx_ads.c |   12 +--
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |   15 +
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |   14 ++---
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |   10 +-
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |   14 +---
 arch/powerpc/platforms/85xx/p1010rdb.c|   12 +--
 arch/powerpc/platforms/85xx/p1022_ds.c|   14 +
 arch/powerpc/platforms/85xx/p1023_rds.c   |   11 +--
 arch/powerpc/platforms/85xx/sbc8548.c |   16 +-
 arch/powerpc/platforms/85xx/sbc8560.c |   13 +---
 arch/powerpc/platforms/85xx/socrates.c|   11 +--
 arch/powerpc/platforms/85xx/stx_gp3.c |   13 +---
 arch/powerpc/platforms/85xx/tqm85xx.c |   13 +---
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |   13 +---
 arch/powerpc/platforms/86xx/pic.c |   11 +-
 arch/powerpc/platforms/embedded6xx/holly.c|   10 +-
 arch/powerpc/platforms/embedded6xx/linkstation.c  |8 +
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |   10 +-
 arch/powerpc/platforms/embedded6xx/storcenter.c   |   10 +-
 arch/powerpc/sysdev/mpic.c|   34 ++--
 23 files changed, 63 insertions(+), 237 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 7893ad3..134e1f8 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -36,21 +36,13 @@
 void __init corenet_ds_pic_init(void)
 {
struct mpic *mpic;
-   struct device_node *np = NULL;
unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
 
-   np = of_find_node_by_type(np, open-pic);
-
-   if (np == NULL) {
-   printk(KERN_ERR Could not find open-pic node\n);
-   return;
-   }
-
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
 
-   mpic = mpic_alloc(np, 0, flags, 0, 256,  OpenPIC  );
+   mpic = mpic_alloc(NULL, 0, flags, 0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
 
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c 
b/arch/powerpc/platforms/85xx/ksi8560.c
index b20c07d..d49dbc4 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -68,24 +68,15 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc 
*desc)
 static void __init ksi8560_pic_init(void)
 {
struct mpic *mpic;
-   struct device_node *np;
 #ifdef CONFIG_CPM2
+   struct device_node *np;
int irq;
 #endif
 
-   np = of_find_node_by_type(NULL, open-pic);
-
-   if (np == NULL) {
-   printk(KERN_ERR Could not find open-pic node\n);
-   return;
-   }
-
-   mpic = mpic_alloc(np, 0,
+   mpic = mpic_alloc(NULL, 0,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
-   of_node_put(np);
-
mpic_init(mpic);
 
 #ifdef CONFIG_CPM2
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c 
b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 03173ba..2c928f0 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -34,22 +34,11 @@
 
 void __init mpc8536_ds_pic_init(void)
 {
-   struct mpic *mpic;
-   struct device_node *np;
-
-   np = of_find_node_by_type(NULL, open-pic);
-   if (np == NULL) {
-   printk(KERN_ERR Could not find open-pic node\n);
-   return;
-   }
-
-   mpic = mpic_alloc(np, 0,
+   struct mpic *mpic = mpic_alloc(NULL, 0,
  MPIC_PRIMARY | MPIC_WANTS_RESET |
  MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
-   of_node_put(np);
-
mpic_init(mpic);
 }
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c 
b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 5cb797b..2b443ba 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -64,23 +64,15 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc 
*desc)
 static void __init mpc85xx_ads_pic_init(void

[PATCH 08/10] powerpc/mpic: Put pic-no-reset test back into the MPIC code

2011-11-29 Thread Kyle Moffett
There's not really any reason to have this one-liner in a separate
static inline function, given that all the other similar tests are
already in the alloc_mpic() code.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/sysdev/mpic.c |7 +--
 1 files changed, 1 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 6916ba5..5b380b8 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1118,11 +1118,6 @@ static struct irq_host_ops mpic_host_ops = {
.xlate = mpic_host_xlate,
 };
 
-static int mpic_reset_prohibited(struct device_node *node)
-{
-   return node  of_get_property(node, pic-no-reset, NULL);
-}
-
 /*
  * Exported functions
  */
@@ -1272,7 +1267,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
/* When using a device-node, reset requests are only honored if the MPIC
 * is allowed to reset.
 */
-   if (mpic_reset_prohibited(node))
+   if (of_get_property(node, pic-no-reset, NULL))
mpic-flags |= MPIC_NO_RESET;
 
if ((flags  MPIC_WANTS_RESET)  !(mpic-flags  MPIC_NO_RESET)) {
-- 
1.7.2.5

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[PATCH 07/10] powerpc/mpic: Don't open-code dcr_resource_start

2011-11-29 Thread Kyle Moffett
Don't open-code the OpenFirmware dcr-reg property lookup trying to map
DCR resources.  This makes the code a bit easier to read.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/sysdev/mpic.c |7 ++-
 1 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index e0216ff..6916ba5 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -319,11 +319,8 @@ static void _mpic_map_dcr(struct mpic *mpic, struct 
device_node *node,
  struct mpic_reg_bank *rb,
  unsigned int offset, unsigned int size)
 {
-   const u32 *dbasep;
-
-   dbasep = of_get_property(node, dcr-reg, NULL);
-
-   rb-dhost = dcr_map(node, *dbasep + offset, size);
+   phys_addr_t phys_addr = dcr_resource_start(node);
+   rb-dhost = dcr_map(mpic-node, phys_addr + offset, size);
BUG_ON(!DCR_MAP_OK(rb-dhost));
 }
 
-- 
1.7.2.5

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[PATCH 06/10] powerpc/mpic: Invert the meaning of MPIC_PRIMARY

2011-11-29 Thread Kyle Moffett
It turns out that there are only 2 in-tree platforms which use MPICs
which are not primary:  IBM Cell and PowerMac.  To reduce the
complexity of the typical board setup code, invert the MPIC_PRIMARY bit
into MPIC_SECONDARY.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/mpic.h   |8 
 arch/powerpc/platforms/44x/iss4xx.c   |2 +-
 arch/powerpc/platforms/85xx/corenet_ds.c  |2 +-
 arch/powerpc/platforms/85xx/ksi8560.c |2 +-
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_ads.c |3 +--
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |3 +--
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |3 +--
 arch/powerpc/platforms/85xx/p1010rdb.c|4 ++--
 arch/powerpc/platforms/85xx/p1022_ds.c|2 +-
 arch/powerpc/platforms/85xx/p1023_rds.c   |2 +-
 arch/powerpc/platforms/85xx/sbc8548.c |2 +-
 arch/powerpc/platforms/85xx/sbc8560.c |2 +-
 arch/powerpc/platforms/85xx/socrates.c|2 +-
 arch/powerpc/platforms/85xx/stx_gp3.c |2 +-
 arch/powerpc/platforms/85xx/tqm85xx.c |2 +-
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |2 +-
 arch/powerpc/platforms/86xx/pic.c |5 ++---
 arch/powerpc/platforms/cell/setup.c   |2 +-
 arch/powerpc/platforms/chrp/setup.c   |3 +--
 arch/powerpc/platforms/embedded6xx/holly.c|2 +-
 arch/powerpc/platforms/embedded6xx/linkstation.c  |2 +-
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |2 +-
 arch/powerpc/platforms/embedded6xx/storcenter.c   |2 +-
 arch/powerpc/platforms/maple/setup.c  |2 +-
 arch/powerpc/platforms/pasemi/setup.c |2 +-
 arch/powerpc/platforms/powermac/pic.c |2 +-
 arch/powerpc/platforms/pseries/setup.c|3 +--
 arch/powerpc/sysdev/mpic.c|   14 +++---
 31 files changed, 42 insertions(+), 48 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index ba0b204..b9d2c0f 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -334,11 +334,11 @@ struct mpic
  * Note setting any ID (leaving those bits to 0) means standard MPIC
  */
 
-/* This is the primary controller, only that one has IPIs and
- * has afinity control. A non-primary MPIC always uses CPU0
- * registers only
+/*
+ * This is a secondary (chained) controller; it only uses the CPU0
+ * registers.  Primary controllers have IPIs and affinity control.
  */
-#define MPIC_PRIMARY   0x0001
+#define MPIC_SECONDARY 0x0001
 
 /* Set this for a big-endian MPIC */
 #define MPIC_BIG_ENDIAN0x0002
diff --git a/arch/powerpc/platforms/44x/iss4xx.c 
b/arch/powerpc/platforms/44x/iss4xx.c
index 19395f1..5b8cdbb 100644
--- a/arch/powerpc/platforms/44x/iss4xx.c
+++ b/arch/powerpc/platforms/44x/iss4xx.c
@@ -71,7 +71,7 @@ static void __init iss4xx_init_irq(void)
/* The MPIC driver will get everything it needs from the
 * device-tree, just pass 0 to all arguments
 */
-   struct mpic *mpic = mpic_alloc(np, 0, MPIC_PRIMARY, 0, 0,
+   struct mpic *mpic = mpic_alloc(np, 0, 0, 0, 0,
MPIC );
BUG_ON(mpic == NULL);
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 134e1f8..7b737a9 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -36,7 +36,7 @@
 void __init corenet_ds_pic_init(void)
 {
struct mpic *mpic;
-   unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
+   unsigned int flags = MPIC_BIG_ENDIAN |
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
 
if (ppc_md.get_irq == mpic_get_coreint_irq)
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c 
b/arch/powerpc/platforms/85xx/ksi8560.c
index d49dbc4..278962b 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -74,7 +74,7 @@ static void __init ksi8560_pic_init(void)
 #endif
 
mpic = mpic_alloc(NULL, 0,
-   MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+   MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c 
b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 2c928f0..d1aece5 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c

[PATCH 10/10] powerpc/mpic: Add in-core support for cascaded MPICs

2011-11-29 Thread Kyle Moffett
The Cell and PowerMac platforms use virtually identical cascaded-IRQ
setup code, so just merge it into the core.  Ideally this code would
trigger automatically when an MPIC device-node specifies an interrupts
property, perhaps even enabling MPIC_SECONDARY along the way.

Unfortunately, Benjamin Herrenschmidt has had bad experiences in the
past with the quality of Apple PowerMac device-trees, so to be safe we
will only try to parse out an IRQ if the MPIC_SECONDARY flag is set by
the caller.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/cell/setup.c   |   22 
 arch/powerpc/platforms/powermac/pic.c |   36 
 arch/powerpc/sysdev/mpic.c|   30 +-
 3 files changed, 33 insertions(+), 55 deletions(-)

diff --git a/arch/powerpc/platforms/cell/setup.c 
b/arch/powerpc/platforms/cell/setup.c
index cd00ca8..a0f5d28 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -184,19 +184,6 @@ static int __init cell_publish_devices(void)
 }
 machine_subsys_initcall(cell, cell_publish_devices);
 
-static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
-{
-   struct irq_chip *chip = irq_desc_get_chip(desc);
-   struct mpic *mpic = irq_desc_get_handler_data(desc);
-   unsigned int virq;
-
-   virq = mpic_get_one_irq(mpic);
-   if (virq != NO_IRQ)
-   generic_handle_irq(virq);
-
-   chip-irq_eoi(desc-irq_data);
-}
-
 static void __init mpic_init_IRQ(void)
 {
struct device_node *dn;
@@ -215,15 +202,6 @@ static void __init mpic_init_IRQ(void)
if (mpic == NULL)
continue;
mpic_init(mpic);
-
-   virq = irq_of_parse_and_map(dn, 0);
-   if (virq == NO_IRQ)
-   continue;
-
-   printk(KERN_INFO %s : hooking up to IRQ %d\n,
-  dn-full_name, virq);
-   irq_set_handler_data(virq, mpic);
-   irq_set_chained_handler(virq, cell_mpic_cascade);
}
 }
 
diff --git a/arch/powerpc/platforms/powermac/pic.c 
b/arch/powerpc/platforms/powermac/pic.c
index bbfcc94..5cbceb4 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -464,18 +464,6 @@ int of_irq_map_oldworld(struct device_node *device, int 
index,
 }
 #endif /* CONFIG_PPC32 */
 
-static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc)
-{
-   struct irq_chip *chip = irq_desc_get_chip(desc);
-   struct mpic *mpic = irq_desc_get_handler_data(desc);
-   unsigned int cascade_irq = mpic_get_one_irq(mpic);
-
-   if (cascade_irq != NO_IRQ)
-   generic_handle_irq(cascade_irq);
-
-   chip-irq_eoi(desc-irq_data);
-}
-
 static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic)
 {
 #if defined(CONFIG_XMON)  defined(CONFIG_PPC32)
@@ -527,7 +515,6 @@ static int __init pmac_pic_probe_mpic(void)
 {
struct mpic *mpic1, *mpic2;
struct device_node *np, *master = NULL, *slave = NULL;
-   unsigned int cascade;
 
/* We can have up to 2 MPICs cascaded */
for (np = NULL; (np = of_find_node_by_type(np, open-pic))
@@ -563,27 +550,14 @@ static int __init pmac_pic_probe_mpic(void)
 
of_node_put(master);
 
-   /* No slave, let's go out */
-   if (slave == NULL)
-   return 0;
-
-   /* Get/Map slave interrupt */
-   cascade = irq_of_parse_and_map(slave, 0);
-   if (cascade == NO_IRQ) {
-   printk(KERN_ERR Failed to map cascade IRQ\n);
-   return 0;
-   }
-
-   mpic2 = pmac_setup_one_mpic(slave, 0);
-   if (mpic2 == NULL) {
-   printk(KERN_ERR Failed to setup slave MPIC\n);
+   /* Set up a cascaded controller, if present */
+   if (slave) {
+   mpic2 = pmac_setup_one_mpic(slave, 0);
+   if (mpic2 == NULL)
+   printk(KERN_ERR Failed to setup slave MPIC\n);
of_node_put(slave);
-   return 0;
}
-   irq_set_handler_data(cascade, mpic2);
-   irq_set_chained_handler(cascade, pmac_u3_cascade);
 
-   of_node_put(slave);
return 0;
 }
 
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 67842a5..02191bb 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -,6 +,22 @@ static int mpic_host_xlate(struct irq_host *h, struct 
device_node *ct,
return 0;
 }
 
+/* IRQ handler for a secondary MPIC cascaded from another IRQ controller */
+static void mpic_cascade(unsigned int irq, struct irq_desc *desc)
+{
+   struct irq_chip *chip = irq_desc_get_chip(desc);
+   struct mpic *mpic = irq_desc_get_handler_data(desc);
+   unsigned int virq;
+
+   BUG_ON(!(mpic-flags  MPIC_SECONDARY));
+
+   virq = mpic_get_one_irq(mpic);
+   if (virq != NO_IRQ

Re: MPIC cleanup series

2011-11-28 Thread Kyle Moffett
On Sun, Nov 27, 2011 at 18:51, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
 Overall I really look your series. It doesn't quite apply cleanly
 anymore so I'll as you for a new shoot after you address the comments
 below, at which point, if you're fast enough, I'll stick it in -next :-)

Awesome! Thanks!

As I mentioned before, I have precious little of the hardware to test
this all on, so I hope I don't break anything.  At minimum I need to
do a final build-and-run test on my e500 boards before I send it out.
:-D


 Just a couple of comments on some of the patches:

  - 5/10: search for open-pic device-tree node if NULL

 The idea is fine, however most callers ignore the device-type and only
 compare on compatible, while you replace that with a match entry that
 seems to require matching on both. This is likely to break stuff. The
 type part of te march entry should be NULL I believe.

If you re-read that, the match table used if no of_node is passed in
has *two* separate entries, one of them with a type and the other
with a compatible, as opposed to a single entry which matches both
type and compatible.

There are a lot of callers which do:
  dnp = of_find_node_by_type(NULL, open-pic);

So I doubt I can remove the type entry all together, unfortunately.


  - 9/10: cache the node

 of_node_get() is your friend.

Yes, I actually messed this one up in the prior patch too, thanks for
noticing.  It should all be fixed now.


  - 10/10: Makes me a bit nervous. It 'looks' right but I wouldn't bet on
 Apple device-trees being sane vs. chaining. I would like a test that
 doesn't do the cascade if the mpic is a primary to at least limit the
 risk of messup.

Oh, you mean to wrap that block like this?

if (mpic-flags  MPIC_SECONDARY) {
  virq = irq_of_parse_and_map(mpic-node, 0);
  ...
}

Sure, makes sense to me.  I've made that change.

Thanks for the review!

Cheers,
Kyle Moffett

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[RFC PATCH 2/2] WIP: PowerPC cache cleanup

2011-11-15 Thread Kyle Moffett
[My apologies for the resend, it does not seem to have hit the MLs.
I think my git send-email cc-cmd may have broken somehow, oops.]

This badly needs breaking up, and a better changelog... oh well...

The big changes:

* The ppc64_caches structure is now powerpc_caches and is used on
  both PPC32 and PPC64.  I hated staring at the pages and pages of
  assembly code, so nearly all of the functions are now C with tiny
  snippets of inline ASM in the loops.

* Lots of ugly assembly functions in arch/powerpc/kernel/misc_*.S were
  rewritten as cleaner inline ASM in arch/powerpc/mm/cache.c

* I'm not sure that the physical address functions from those files
  actually came out cleaner, but they are now more correct.

* I'm not 100% sure I like the new FOR_EACH_CACHE_LINE() macro, but it
  sure does make a lot of the other code much cleaner.

* I have a bit of a temptation to try to merge the 32/64-bit variants
  of copy_page() into a single C function.  A quick test seems to show
  that I can get nearly identical output to the 64-bit ASM with very
  little work.


---
 arch/powerpc/include/asm/cache.h |  155 ---
 arch/powerpc/include/asm/cacheflush.h|3 -
 arch/powerpc/include/asm/page.h  |6 +
 arch/powerpc/include/asm/page_32.h   |4 +-
 arch/powerpc/include/asm/page_64.h   |   17 --
 arch/powerpc/kernel/align.c  |7 +-
 arch/powerpc/kernel/asm-offsets.c|   13 +-
 arch/powerpc/kernel/head_32.S|9 +-
 arch/powerpc/kernel/head_64.S|2 +-
 arch/powerpc/kernel/misc_32.S|  193 --
 arch/powerpc/kernel/misc_64.S|  182 -
 arch/powerpc/kernel/ppc_ksyms.c  |3 -
 arch/powerpc/kernel/setup-common.c   |  103 ++
 arch/powerpc/kernel/setup.h  |1 +
 arch/powerpc/kernel/setup_32.c   |   11 +-
 arch/powerpc/kernel/setup_64.c   |  118 +--
 arch/powerpc/kernel/vdso.c   |   27 +--
 arch/powerpc/lib/copypage_64.S   |   10 +-
 arch/powerpc/mm/Makefile |2 +-
 arch/powerpc/mm/cache.c  |  279 ++
 arch/powerpc/mm/dma-noncoherent.c|2 +-
 arch/powerpc/platforms/52xx/lite5200_sleep.S |9 +-
 arch/powerpc/platforms/powermac/pci.c|2 +-
 arch/powerpc/xmon/xmon.c |   53 +++---
 drivers/macintosh/smu.c  |8 +-
 25 files changed, 599 insertions(+), 620 deletions(-)
 create mode 100644 arch/powerpc/mm/cache.c

diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 4b50941..b1dc08f 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -3,47 +3,142 @@
 
 #ifdef __KERNEL__
 
-
-/* bytes per L1 cache line */
-#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
-#define L1_CACHE_SHIFT 4
-#define MAX_COPY_PREFETCH  1
+/*
+ * Various PowerPC CPUs which are otherwise compatible have different L1
+ * cache line sizes.
+ *
+ * Unfortunately, lots of kernel code assumes that L1_CACHE_BYTES and
+ * L1_CACHE_SHIFT are compile-time constants that can be used to align
+ * data-structures to avoid false cacheline sharing, so we can't just
+ * compute them at runtime from the cputable values.
+ *
+ * So for alignment purposes, we will compute these values as safe maximums
+ * of all the CPU support compiled into the kernel.
+ */
+#if defined(CONFIG_PPC64) || defined(CONFIG_PPC_47x)
+# define L1_CACHE_SHIFT_MAX 7 /* 128-byte cache blocks */
 #elif defined(CONFIG_PPC_E500MC)
-#define L1_CACHE_SHIFT 6
-#define MAX_COPY_PREFETCH  4
-#elif defined(CONFIG_PPC32)
-#define MAX_COPY_PREFETCH  4
-#if defined(CONFIG_PPC_47x)
-#define L1_CACHE_SHIFT 7
+# define L1_CACHE_SHIFT_MAX 6 /* 64-byte cache blocks */
 #else
-#define L1_CACHE_SHIFT 5
+# define L1_CACHE_SHIFT_MAX 5 /* 32-byte cache blocks */
 #endif
+#define L1_CACHE_BYTES_MAX (1  L1_CACHE_SHIFT_MAX)
+
+#define L1_CACHE_SHIFT  L1_CACHE_SHIFT_MAX
+#define L1_CACHE_BYTES  L1_CACHE_BYTES_MAX
+#define SMP_CACHE_BYTES L1_CACHE_BYTES_MAX
+
+/*
+ * Unfortunately, for other purposes, we can't just use a safe maximum value
+ * because it gets used in loops when invalidating or clearing cachelines and
+ * it would be very bad to only flush/invalidate/zero/etc every 4th one.
+ *
+ * During early initialization we load these values from the device-tree and
+ * the cputable into the powerpc_caches structure, but we need to be able to
+ * clear pages before that occurs, so these need sane default values.
+ *
+ * As explained in the powerpc_caches structure definition, the defaults
+ * should be safe minimums, so that's what we compute here.
+ */
+#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
+# define L1_CACHE_SHIFT_MIN 4 /* 16-byte cache blocks */
+#elif 

[RFC PATCH 0/2] powerpc: CPU cache op cleanup

2011-11-14 Thread Kyle Moffett
Ok, so I have a work-in-progress patch for cleaning up the CPU cache
handling, and I'd like some comments on the approach.

It's not really split up, and it's kind of a huge patch because it
tries to tackle a lot of things at once.  Unfortunately, I'm having a
hard time finding good clean places to break things apart.

Furthermore, I know 100% that it is not complete on PPC32 yet, and it
almost certainly does not build on PPC64 yet either.

These are the only files in arch/powerpc/ which have known-incorrect
references to L1_CACHE_* variables:
  arch/powerpc/lib/copy_32.S
  arch/powerpc/kernel/misc_32.S

Unfortunately, I've been staring at PPC asm for long enough that I
have a migraine headache and I'm going to have to stop here for now.
If somebody else wants to tackle fixing up the 32-bit copy_page() and
__copy_tofrom_user() routines it would be highly appreciated.

Cheers,
Kyle Moffett

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[RFC PATCH 1/2] powerpc: Remove duplicate cacheable_memcpy/memzero functions

2011-11-14 Thread Kyle Moffett
These functions are only used from one place each.  If the cacheable_*
versions really are more efficient, then those changes should be
migrated into the common code instead.

NOTE: The old routines are just flat buggy on kernels that support
  hardware with different cacheline sizes.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/system.h|2 -
 arch/powerpc/kernel/ppc_ksyms.c  |2 -
 arch/powerpc/lib/copy_32.S   |  127 --
 arch/powerpc/mm/ppc_mmu_32.c |2 +-
 drivers/net/ethernet/ibm/emac/core.c |   12 +---
 5 files changed, 3 insertions(+), 142 deletions(-)

diff --git a/arch/powerpc/include/asm/system.h 
b/arch/powerpc/include/asm/system.h
index e30a13d..25389d1 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -189,8 +189,6 @@ static inline void flush_spe_to_thread(struct task_struct 
*t)
 #endif
 
 extern int call_rtas(const char *, int, int, unsigned long *, ...);
-extern void cacheable_memzero(void *p, unsigned int nb);
-extern void *cacheable_memcpy(void *, const void *, unsigned int);
 extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
 extern void bad_page_fault(struct pt_regs *, unsigned long, int);
 extern int die(const char *, struct pt_regs *, long);
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index d3114a7..acba8ce 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -159,8 +159,6 @@ EXPORT_SYMBOL(screen_info);
 #ifdef CONFIG_PPC32
 EXPORT_SYMBOL(timer_interrupt);
 EXPORT_SYMBOL(tb_ticks_per_jiffy);
-EXPORT_SYMBOL(cacheable_memcpy);
-EXPORT_SYMBOL(cacheable_memzero);
 #endif
 
 #ifdef CONFIG_PPC32
diff --git a/arch/powerpc/lib/copy_32.S b/arch/powerpc/lib/copy_32.S
index 55f19f9..6813f80 100644
--- a/arch/powerpc/lib/copy_32.S
+++ b/arch/powerpc/lib/copy_32.S
@@ -69,54 +69,6 @@ CACHELINE_BYTES = L1_CACHE_BYTES
 LG_CACHELINE_BYTES = L1_CACHE_SHIFT
 CACHELINE_MASK = (L1_CACHE_BYTES-1)
 
-/*
- * Use dcbz on the complete cache lines in the destination
- * to set them to zero.  This requires that the destination
- * area is cacheable.  -- paulus
- */
-_GLOBAL(cacheable_memzero)
-   mr  r5,r4
-   li  r4,0
-   addir6,r3,-4
-   cmplwi  0,r5,4
-   blt 7f
-   stwur4,4(r6)
-   beqlr
-   andi.   r0,r6,3
-   add r5,r0,r5
-   subfr6,r0,r6
-   clrlwi  r7,r6,32-LG_CACHELINE_BYTES
-   add r8,r7,r5
-   srwir9,r8,LG_CACHELINE_BYTES
-   addic.  r9,r9,-1/* total number of complete cachelines */
-   ble 2f
-   xorir0,r7,CACHELINE_MASK  ~3
-   srwi.   r0,r0,2
-   beq 3f
-   mtctr   r0
-4: stwur4,4(r6)
-   bdnz4b
-3: mtctr   r9
-   li  r7,4
-10:dcbzr7,r6
-   addir6,r6,CACHELINE_BYTES
-   bdnz10b
-   clrlwi  r5,r8,32-LG_CACHELINE_BYTES
-   addir5,r5,4
-2: srwir0,r5,2
-   mtctr   r0
-   bdz 6f
-1: stwur4,4(r6)
-   bdnz1b
-6: andi.   r5,r5,3
-7: cmpwi   0,r5,0
-   beqlr
-   mtctr   r5
-   addir6,r6,3
-8: stbur4,1(r6)
-   bdnz8b
-   blr
-
 _GLOBAL(memset)
rlwimi  r4,r4,8,16,23
rlwimi  r4,r4,16,0,15
@@ -142,85 +94,6 @@ _GLOBAL(memset)
bdnz8b
blr
 
-/*
- * This version uses dcbz on the complete cache lines in the
- * destination area to reduce memory traffic.  This requires that
- * the destination area is cacheable.
- * We only use this version if the source and dest don't overlap.
- * -- paulus.
- */
-_GLOBAL(cacheable_memcpy)
-   add r7,r3,r5/* test if the src  dst overlap */
-   add r8,r4,r5
-   cmplw   0,r4,r7
-   cmplw   1,r3,r8
-   crand   0,0,4   /* cr0.lt = cr1.lt */
-   blt memcpy  /* if regions overlap */
-
-   addir4,r4,-4
-   addir6,r3,-4
-   neg r0,r3
-   andi.   r0,r0,CACHELINE_MASK/* # bytes to start of cache line */
-   beq 58f
-
-   cmplw   0,r5,r0 /* is this more than total to do? */
-   blt 63f /* if not much to do */
-   andi.   r8,r0,3 /* get it word-aligned first */
-   subfr5,r0,r5
-   mtctr   r8
-   beq+61f
-70:lbz r9,4(r4)/* do some bytes */
-   stb r9,4(r6)
-   addir4,r4,1
-   addir6,r6,1
-   bdnz70b
-61:srwi.   r0,r0,2
-   mtctr   r0
-   beq 58f
-72:lwzur9,4(r4)/* do some words */
-   stwur9,4(r6)
-   bdnz72b
-
-58:srwi.   r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
-   clrlwi  r5,r5,32-LG_CACHELINE_BYTES
-   li  r11,4
-   mtctr   r0
-   beq 63f
-53:
-   dcbzr11,r6
-   COPY_16_BYTES

[RFC PATCH 2/2] WIP: PowerPC cache cleanup

2011-11-14 Thread Kyle Moffett
This badly needs breaking up, and a better changelog... oh well...

The big changes:

* The ppc64_caches structure is now powerpc_caches and is used on
  both PPC32 and PPC64.  I hated staring at the pages and pages of
  assembly code, so nearly all of the functions are now C with tiny
  snippets of inline ASM in the loops.

* Lots of ugly assembly functions in arch/powerpc/kernel/misc_*.S were
  rewritten as cleaner inline ASM in arch/powerpc/mm/cache.c

* I'm not sure that the physical address functions from those files
  actually came out cleaner, but they are now more correct.

* I'm not 100% sure I like the new FOR_EACH_CACHE_LINE() macro, but it
  sure does make a lot of the other code much cleaner.

* I have a bit of a temptation to try to merge the 32/64-bit variants
  of copy_page() into a single C function.  A quick test seems to show
  that I can get nearly identical output to the 64-bit ASM with very
  little work.

---
 arch/powerpc/include/asm/cache.h |  155 ---
 arch/powerpc/include/asm/cacheflush.h|3 -
 arch/powerpc/include/asm/page.h  |6 +
 arch/powerpc/include/asm/page_32.h   |4 +-
 arch/powerpc/include/asm/page_64.h   |   17 --
 arch/powerpc/kernel/align.c  |7 +-
 arch/powerpc/kernel/asm-offsets.c|   13 +-
 arch/powerpc/kernel/head_32.S|9 +-
 arch/powerpc/kernel/head_64.S|2 +-
 arch/powerpc/kernel/misc_32.S|  193 --
 arch/powerpc/kernel/misc_64.S|  182 -
 arch/powerpc/kernel/ppc_ksyms.c  |3 -
 arch/powerpc/kernel/setup-common.c   |  103 ++
 arch/powerpc/kernel/setup.h  |1 +
 arch/powerpc/kernel/setup_32.c   |   11 +-
 arch/powerpc/kernel/setup_64.c   |  118 +--
 arch/powerpc/kernel/vdso.c   |   27 +--
 arch/powerpc/lib/copypage_64.S   |   10 +-
 arch/powerpc/mm/Makefile |2 +-
 arch/powerpc/mm/cache.c  |  279 ++
 arch/powerpc/mm/dma-noncoherent.c|2 +-
 arch/powerpc/platforms/52xx/lite5200_sleep.S |9 +-
 arch/powerpc/platforms/powermac/pci.c|2 +-
 arch/powerpc/xmon/xmon.c |   53 +++---
 drivers/macintosh/smu.c  |8 +-
 25 files changed, 599 insertions(+), 620 deletions(-)
 create mode 100644 arch/powerpc/mm/cache.c

diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 4b50941..b1dc08f 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -3,47 +3,142 @@
 
 #ifdef __KERNEL__
 
-
-/* bytes per L1 cache line */
-#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
-#define L1_CACHE_SHIFT 4
-#define MAX_COPY_PREFETCH  1
+/*
+ * Various PowerPC CPUs which are otherwise compatible have different L1
+ * cache line sizes.
+ *
+ * Unfortunately, lots of kernel code assumes that L1_CACHE_BYTES and
+ * L1_CACHE_SHIFT are compile-time constants that can be used to align
+ * data-structures to avoid false cacheline sharing, so we can't just
+ * compute them at runtime from the cputable values.
+ *
+ * So for alignment purposes, we will compute these values as safe maximums
+ * of all the CPU support compiled into the kernel.
+ */
+#if defined(CONFIG_PPC64) || defined(CONFIG_PPC_47x)
+# define L1_CACHE_SHIFT_MAX 7 /* 128-byte cache blocks */
 #elif defined(CONFIG_PPC_E500MC)
-#define L1_CACHE_SHIFT 6
-#define MAX_COPY_PREFETCH  4
-#elif defined(CONFIG_PPC32)
-#define MAX_COPY_PREFETCH  4
-#if defined(CONFIG_PPC_47x)
-#define L1_CACHE_SHIFT 7
+# define L1_CACHE_SHIFT_MAX 6 /* 64-byte cache blocks */
 #else
-#define L1_CACHE_SHIFT 5
+# define L1_CACHE_SHIFT_MAX 5 /* 32-byte cache blocks */
 #endif
+#define L1_CACHE_BYTES_MAX (1  L1_CACHE_SHIFT_MAX)
+
+#define L1_CACHE_SHIFT  L1_CACHE_SHIFT_MAX
+#define L1_CACHE_BYTES  L1_CACHE_BYTES_MAX
+#define SMP_CACHE_BYTES L1_CACHE_BYTES_MAX
+
+/*
+ * Unfortunately, for other purposes, we can't just use a safe maximum value
+ * because it gets used in loops when invalidating or clearing cachelines and
+ * it would be very bad to only flush/invalidate/zero/etc every 4th one.
+ *
+ * During early initialization we load these values from the device-tree and
+ * the cputable into the powerpc_caches structure, but we need to be able to
+ * clear pages before that occurs, so these need sane default values.
+ *
+ * As explained in the powerpc_caches structure definition, the defaults
+ * should be safe minimums, so that's what we compute here.
+ */
+#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
+# define L1_CACHE_SHIFT_MIN 4 /* 16-byte cache blocks */
+#elif defined(CONFIG_PPC32)
+# define L1_CACHE_SHIFT_MIN 5 /* 32-byte cache blocks */
 #else /* CONFIG_PPC64 */
-#define L1_CACHE_SHIFT 7
+# define 

Re: [RFC PATCH 00/17] powerpc/e500: separate e500 from e500mc

2011-11-14 Thread Kyle Moffett
On Mon, Nov 14, 2011 at 21:41, Tabi Timur-B04825 b04...@freescale.com wrote:
 Moffett, Kyle D wrote:
the PPC Book-E spec documents that the pagesize is an even multiple
 of the cacheline size and the cachelines are always page-aligned.

 cachelines are page aligned?

Whoops, good catch.  That should have been:

the PPC Book-E spec documents that the pagesize is an even multiple
of the cacheline size and that the pages are always cacheline-aligned.

Thanks!

Cheers,
Kyle Moffett

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[RFC PATCH 00/17] powerpc/e500: separate e500 from e500mc

2011-11-09 Thread Kyle Moffett
Hello,

I saw Baruch Siach's patch:
  powerpc: 85xx: separate e500 from e500mc

Unfortunately, that patch breaks the dependencies for the P5020DS
platform and does not fix the underlying code which does not
understand what the ambiguous CONFIG_E500 means.

In order to fix the issue at the fundamental level, I created the
following 17-patch series loosely based on Baruch's patch.

=== High-Level Summary ===

The e500v1/v2 and e500mc/e5500 CPU families are not compatible with
each other, yet they share the same CONFIG_E500 Kconfig option.

The following patch series splits the 32-bit CPU support into two
separate options: CONFIG_FSL_E500_V1_V2 and CONFIG_FSL_E500MC.
Additionally, the 64-bit e5500 support is separated to its own config
option (CONFIG_FSL_E5500) which is automatically combined with
either 32-bit e500MC or 64-bit Book-3E when the P5020DS board support
is enabled.

I based the patches on v3.2-rc1, please let me know if I should
update the patches against a different tree.

The first 4 patches stand on their own merits; they are generic code
cleanups necessary to support the later patches.

I'd like to know what you all think.

Cheers,
Kyle Moffett

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[RFC PATCH 00/17] powerpc/e500: separate e500 from e500mc

2011-11-09 Thread Kyle Moffett
(Sorry for the repost, I accidentally omitted Baruch's email).

Hello,

I saw Baruch Siach's patch:
  powerpc: 85xx: separate e500 from e500mc

Unfortunately, that patch breaks the dependencies for the P5020DS
platform and does not fix the underlying code which does not
understand what the ambiguous CONFIG_E500 means.

In order to fix the issue at the fundamental level, I created the
following 17-patch series loosely based on Baruch's patch.

=== High-Level Summary ===

The e500v1/v2 and e500mc/e5500 CPU families are not compatible with
each other, yet they share the same CONFIG_E500 Kconfig option.

The following patch series splits the 32-bit CPU support into two
separate options: CONFIG_FSL_E500_V1_V2 and CONFIG_FSL_E500MC.
Additionally, the 64-bit e5500 support is separated to its own config
option (CONFIG_FSL_E5500) which is automatically combined with
either 32-bit e500MC or 64-bit Book-3E when the P5020DS board support
is enabled.

I based the patches on v3.2-rc1, please let me know if I should
update the patches against a different tree.

The first 4 patches stand on their own merits; they are generic code
cleanups necessary to support the later patches.

I'd like to know what you all think.

Cheers,
Kyle Moffett

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[RFC PATCH 01/17] powerpc/mpic: Fix bogus CONFIG_BOOKE conditional

2011-11-09 Thread Kyle Moffett
The code inside the conditional is only used by 85xx CoreNet fabric
platforms, so add a new config define and use it where necessary.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/85xx/Kconfig|5 +
 arch/powerpc/platforms/85xx/Makefile   |   11 ++-
 arch/powerpc/platforms/Kconfig.cputype |3 +++
 arch/powerpc/sysdev/mpic.c |6 ++
 4 files changed, 16 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/Kconfig 
b/arch/powerpc/platforms/85xx/Kconfig
index 45023e2..9088381 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -181,6 +181,7 @@ config P2041_RDB
select GPIO_MPC8XXX
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
+   select FSL_CORENET
help
  This option enables support for the P2041 RDB board
 
@@ -194,6 +195,7 @@ config P3041_DS
select GPIO_MPC8XXX
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
+   select FSL_CORENET
help
  This option enables support for the P3041 DS board
 
@@ -206,6 +208,7 @@ config P3060_QDS
select MPC8xxx_GPIO
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
+   select FSL_CORENET
help
  This option enables support for the P3060 QDS board
 
@@ -219,6 +222,7 @@ config P4080_DS
select GPIO_MPC8XXX
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
+   select FSL_CORENET
help
  This option enables support for the P4080 DS board
 
@@ -235,6 +239,7 @@ config P5020_DS
select GPIO_MPC8XXX
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
+   select FSL_CORENET
help
  This option enables support for the P5020 DS board
 
diff --git a/arch/powerpc/platforms/85xx/Makefile 
b/arch/powerpc/platforms/85xx/Makefile
index bc5acb9..c6d1334 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -13,11 +13,12 @@ obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o
 obj-$(CONFIG_P1010_RDB)   += p1010rdb.o
 obj-$(CONFIG_P1022_DS)+= p1022_ds.o
 obj-$(CONFIG_P1023_RDS)   += p1023_rds.o
-obj-$(CONFIG_P2041_RDB)   += p2041_rdb.o corenet_ds.o
-obj-$(CONFIG_P3041_DS)+= p3041_ds.o corenet_ds.o
-obj-$(CONFIG_P3060_QDS)   += p3060_qds.o corenet_ds.o
-obj-$(CONFIG_P4080_DS)+= p4080_ds.o corenet_ds.o
-obj-$(CONFIG_P5020_DS)+= p5020_ds.o corenet_ds.o
+obj-$(CONFIG_P2041_RDB)   += p2041_rdb.o
+obj-$(CONFIG_P3041_DS)+= p3041_ds.o
+obj-$(CONFIG_P3060_QDS)   += p3060_qds.o
+obj-$(CONFIG_P4080_DS)+= p4080_ds.o
+obj-$(CONFIG_P5020_DS)+= p5020_ds.o
+obj-$(CONFIG_FSL_CORENET) += corenet_ds.o
 obj-$(CONFIG_STX_GP3)+= stx_gp3.o
 obj-$(CONFIG_TQM85xx)+= tqm85xx.o
 obj-$(CONFIG_SBC8560) += sbc8560.o
diff --git a/arch/powerpc/platforms/Kconfig.cputype 
b/arch/powerpc/platforms/Kconfig.cputype
index fbecae0..9210e94 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -177,6 +177,9 @@ config FSL_BOOKE
select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT
default y
 
+config FSL_CORENET
+   bool
+
 # this is for common code between PPC32  PPC64 FSL BOOKE
 config PPC_FSL_BOOK3E
bool
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 0842c6f..1a3d84a 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1642,9 +1642,9 @@ unsigned int mpic_get_irq(void)
return mpic_get_one_irq(mpic);
 }
 
+#ifdef CONFIG_FSL_CORENET
 unsigned int mpic_get_coreint_irq(void)
 {
-#ifdef CONFIG_BOOKE
struct mpic *mpic = mpic_primary;
u32 src;
 
@@ -1664,10 +1664,8 @@ unsigned int mpic_get_coreint_irq(void)
}
 
return irq_linear_revmap(mpic-irqhost, src);
-#else
-   return NO_IRQ;
-#endif
 }
+#endif
 
 unsigned int mpic_get_mcirq(void)
 {
-- 
1.7.2.5

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[RFC PATCH 02/17] powerpc: Split up PHYS_64BIT config option to fix select issues

2011-11-09 Thread Kyle Moffett
The CONFIG_PHYS_64BIT option violates the Kconfig best-practices in
various colorful ways.  It has explicit dependencies, but it is also
selected by various CPUs and platforms.  It is not set on 64-bit
systems, but it is used by a number of pieces of powerpc code to enable
or disable 64-bit physical address support.

To resolve these issues, the option has now been split into 3:

  CONFIG_PHYS_64BIT_SUPPORTED:
This hidden option should be selected by any CPU type which supports
64-bit physical addresses.  This will enable the PHYS_64BIT option
to be selected.  It is (obviously) always set on PPC64.

  CONFIG_PHYS_64BIT_DT_REQUIRED:
This hidden option should be selected by any board or platform which
has 32-bit physical devices present in hardware.  If this is set
then the CONFIG_PHYS_64BIT option will be forcibly enabled and
hidden from the user.  It is (obviously) always set on PPC64.

  CONFIG_PHYS_64BIT:
This option is user-controllable, where allowed by CPU and platform
settings, and should never be pointed at with a select statement.
Due to the values of the above two options, this is never visible on
PPC64.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/Kconfig   |4 ++--
 arch/powerpc/platforms/82xx/Kconfig|2 +-
 arch/powerpc/platforms/83xx/Kconfig|2 +-
 arch/powerpc/platforms/85xx/Kconfig|   12 ++--
 arch/powerpc/platforms/86xx/Kconfig|1 +
 arch/powerpc/platforms/Kconfig.cputype |   25 ++---
 6 files changed, 29 insertions(+), 17 deletions(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index b177caa..27e31c5 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -18,10 +18,10 @@ config WORD_SIZE
default 32 if !PPC64
 
 config ARCH_PHYS_ADDR_T_64BIT
-   def_bool PPC64 || PHYS_64BIT
+   def_bool PHYS_64BIT
 
 config ARCH_DMA_ADDR_T_64BIT
-   def_bool ARCH_PHYS_ADDR_T_64BIT
+   def_bool PHYS_64BIT
 
 config MMU
bool
diff --git a/arch/powerpc/platforms/82xx/Kconfig 
b/arch/powerpc/platforms/82xx/Kconfig
index 7c7df40..849d403 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -1,6 +1,6 @@
 menuconfig PPC_82xx
bool 82xx-based boards (PQ II)
-   depends on 6xx
+   depends on 6xx  !PHYS_64BIT
 
 if PPC_82xx
 
diff --git a/arch/powerpc/platforms/83xx/Kconfig 
b/arch/powerpc/platforms/83xx/Kconfig
index 670a033..1ed8877 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -1,6 +1,6 @@
 menuconfig PPC_83xx
bool 83xx-based boards
-   depends on 6xx
+   depends on 6xx  !PHYS_64BIT
select PPC_UDBG_16550
select PPC_PCI_CHOICE
select FSL_PCI if PCI
diff --git a/arch/powerpc/platforms/85xx/Kconfig 
b/arch/powerpc/platforms/85xx/Kconfig
index 9088381..37f9de7 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -80,7 +80,7 @@ config P1010_RDB
 config P1022_DS
bool Freescale P1022 DS
select DEFAULT_UIMAGE
-   select PHYS_64BIT   # The DTS has 36-bit addresses
+   select PHYS_64BIT_DT_REQUIRED # The DTS has 36-bit addresses
select SWIOTLB
help
  This option enables support for the Freescale P1022DS reference board.
@@ -175,7 +175,7 @@ config P2041_RDB
bool Freescale P2041 RDB
select DEFAULT_UIMAGE
select PPC_E500MC
-   select PHYS_64BIT
+   select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
select GPIO_MPC8XXX
@@ -189,7 +189,7 @@ config P3041_DS
bool Freescale P3041 DS
select DEFAULT_UIMAGE
select PPC_E500MC
-   select PHYS_64BIT
+   select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
select GPIO_MPC8XXX
@@ -203,7 +203,7 @@ config P3060_QDS
bool Freescale P3060 QDS
select DEFAULT_UIMAGE
select PPC_E500MC
-   select PHYS_64BIT
+   select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select MPC8xxx_GPIO
select HAS_RAPIDIO
@@ -216,7 +216,7 @@ config P4080_DS
bool Freescale P4080 DS
select DEFAULT_UIMAGE
select PPC_E500MC
-   select PHYS_64BIT
+   select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
select GPIO_MPC8XXX
@@ -233,7 +233,7 @@ config P5020_DS
select DEFAULT_UIMAGE
select E500
select PPC_E500MC
-   select PHYS_64BIT
+   select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
select GPIO_MPC8XXX
diff --git a/arch/powerpc/platforms/86xx/Kconfig 
b/arch/powerpc/platforms/86xx/Kconfig
index 8d6599d..576eb43 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -5,6 +5,7 @@ menuconfig PPC_86xx

[RFC PATCH 03/17] fsl_rio: Remove FreeScale e500 conditionals

2011-11-09 Thread Kyle Moffett
The CONFIG_E500 conditional should be unnecessary.  The fsl_rio
hardware is only present on MPC85xx (e500/e500mc) anyways, although it
should build everywhere for better compile-test coverage.

The conditionally-defined fsl_rio_mcheck_exception() function lost its
two e500-specific constants in commit 82a9a4809f:
  powerpc/e500: fix breakage with fsl_rio_mcheck_exception

Specifically, the references to SPRN_MCSR and MCSR_BUS_RBERR were moved
to an e500-specific file.

This patch just removes the unnecessary #ifdef, as the entire file is
effectively dead code on non-e500 platforms anyways.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/sysdev/fsl_rio.c |2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index de170fd..783e25c 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -281,7 +281,6 @@ struct rio_priv {
 
 static void __iomem *rio_regs_win;
 
-#ifdef CONFIG_E500
 int fsl_rio_mcheck_exception(struct pt_regs *regs)
 {
const struct exception_table_entry *entry;
@@ -308,7 +307,6 @@ int fsl_rio_mcheck_exception(struct pt_regs *regs)
return 0;
 }
 EXPORT_SYMBOL_GPL(fsl_rio_mcheck_exception);
-#endif
 
 /**
  * fsl_rio_doorbell_send - Send a MPC85xx doorbell message
-- 
1.7.2.5

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[RFC PATCH 04/17] powerpc: Allow multiple machine-check handlers

2011-11-09 Thread Kyle Moffett
Certain processor types are co-supportable, and their machine-check
handlers will be referenced if the entries in cputable.c are actually
generated, so allow more than one machine-check handler to be built in.

This fixes a bug where configuring FreeScale E5500 support (P5020DS)
into the kernel would break machine-check handling on PPC64 A2 systems
by using a bogus machine_check_generic() handler that does nothing.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/kernel/traps.c |   18 --
 1 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 4e59082..e3113341 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -418,7 +418,8 @@ int machine_check_47x(struct pt_regs *regs)
 
return 0;
 }
-#elif defined(CONFIG_E500)
+#endif
+#if defined(CONFIG_FSL_E500MC) || defined(CONFIG_FSL_E5500)
 int machine_check_e500mc(struct pt_regs *regs)
 {
unsigned long mcsr = mfspr(SPRN_MCSR);
@@ -517,7 +518,8 @@ silent_out:
mtspr(SPRN_MCSR, mcsr);
return mfspr(SPRN_MCSR) == 0  recoverable;
 }
-
+#endif
+#ifdef CONFIG_FSL_E500_V1_V2
 int machine_check_e500(struct pt_regs *regs)
 {
unsigned long reason = get_mc_reason(regs);
@@ -557,12 +559,8 @@ int machine_check_e500(struct pt_regs *regs)
 
return 0;
 }
-
-int machine_check_generic(struct pt_regs *regs)
-{
-   return 0;
-}
-#elif defined(CONFIG_E200)
+#endif
+#ifdef CONFIG_E200
 int machine_check_e200(struct pt_regs *regs)
 {
unsigned long reason = get_mc_reason(regs);
@@ -587,7 +585,8 @@ int machine_check_e200(struct pt_regs *regs)
 
return 0;
 }
-#else
+#endif
+
 int machine_check_generic(struct pt_regs *regs)
 {
unsigned long reason = get_mc_reason(regs);
@@ -623,7 +622,6 @@ int machine_check_generic(struct pt_regs *regs)
}
return 0;
 }
-#endif /* everything else */
 
 void machine_check_exception(struct pt_regs *regs)
 {
-- 
1.7.2.5

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[RFC PATCH 05/17] powerpc/e500: Remove unused default e500 from CPU table

2011-11-09 Thread Kyle Moffett
As the 3 e500 variants are generally incompatible with each other,
(32bit-spe, 32bit-classic-fpu, 64bit-classic-fpu), there is no such
thing as a default e500 processor.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/kernel/cputable.c |   16 
 1 files changed, 0 insertions(+), 16 deletions(-)

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index edae5bb..e35f4fb 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1992,22 +1992,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check  = machine_check_e500mc,
.platform   = ppce5500,
},
-#ifdef CONFIG_PPC32
-   {   /* default match */
-   .pvr_mask   = 0x,
-   .pvr_value  = 0x,
-   .cpu_name   = (generic E500 PPC),
-   .cpu_features   = CPU_FTRS_E500,
-   .cpu_user_features  = COMMON_USER_BOOKE |
-   PPC_FEATURE_HAS_SPE_COMP |
-   PPC_FEATURE_HAS_EFP_SINGLE_COMP,
-   .mmu_features   = MMU_FTR_TYPE_FSL_E,
-   .icache_bsize   = 32,
-   .dcache_bsize   = 32,
-   .machine_check  = machine_check_e500,
-   .platform   = powerpc,
-   }
-#endif /* CONFIG_PPC32 */
 #endif /* CONFIG_E500 */
 
 #ifdef CONFIG_PPC_A2
-- 
1.7.2.5

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[RFC PATCH 06/17] powerpc/e500: Split FreeScale e500v1/v2 and e500mc config options

2011-11-09 Thread Kyle Moffett
Kernels built for e500 and e500mc are fundamentally incompatible with
each other due to different cacheline sizes, support for SPE
instructions, etc.

Unfortuantely, there is a lot of support code with a morass of config
options which mostly mean the same things (E500/E500MC/PPC_85xx/etc).

As preparation for fixing up all the support code, split the config
options into two separate parts.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/Kconfig.cputype |   34 +++
 1 files changed, 25 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/platforms/Kconfig.cputype 
b/arch/powerpc/platforms/Kconfig.cputype
index 0ab01b0..1108586 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -10,13 +10,15 @@ choice
prompt Processor Type
depends on PPC32
help
- There are five families of 32 bit PowerPC chips supported.
+ There are six families of 32 bit PowerPC chips supported.
+
  The most common ones are the desktop and server CPUs (601, 603,
  604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
  embedded 512x/52xx/82xx/83xx/86xx counterparts.
- The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
- (85xx) each form a family of their own that is not compatible
- with the others.
+
+ The other embedded parts, namely 4xx, 8xx, e200, e500, and e500mc
+ each form a family of their own that is not compatible with the
+ others.
 
  If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
 
@@ -24,10 +26,21 @@ config PPC_BOOK3S_32
bool 512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx
select PPC_FPU
 
-config PPC_85xx
-   bool Freescale 85xx
+config FSL_E200
+   bool Freescale e200 (also known as MPC5xx/MPC55xx)
+   select E200
+
+config FSL_E500_V1_V2
+   bool Freescale e500v1/e500v2 (also known as MPC85xx)
select PHYS_64BIT_SUPPORTED
select E500
+   select PPC_85xx
+
+config FSL_E500MC
+   bool Freescale e500mc (also e5500 in 32-bit mode)
+   select PHYS_64BIT_SUPPORTED
+   select E500
+   select PPC_85xx
 
 config PPC_8xx
bool Freescale 8xx
@@ -51,9 +64,6 @@ config 44x
select PHYS_64BIT_SUPPORTED
select PHYS_64BIT_DT_REQUIRED
 
-config E200
-   bool Freescale e200
-
 endchoice
 
 choice
@@ -131,6 +141,12 @@ config TUNE_CELL
 config 8xx
bool
 
+config E200
+   bool
+
+config PPC_85xx
+   bool
+
 config E500
select FSL_EMB_PERFMON
select PPC_FSL_BOOK3E
-- 
1.7.2.5

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[RFC PATCH 07/17] powerpc/e200: Rename CONFIG_E200 = CONFIG_FSL_E200

2011-11-09 Thread Kyle Moffett
Match the config symbols for FreeScale e500/e5500 chips by using FSL
in the name of the config symbol.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/Kconfig   |2 +-
 arch/powerpc/Makefile  |2 +-
 arch/powerpc/include/asm/cputable.h|2 +-
 arch/powerpc/include/asm/reg.h |2 +-
 arch/powerpc/include/asm/reg_booke.h   |2 +-
 arch/powerpc/kernel/cputable.c |4 ++--
 arch/powerpc/kernel/head_fsl_booke.S   |   10 +-
 arch/powerpc/kernel/traps.c|2 +-
 arch/powerpc/platforms/Kconfig.cputype |   12 
 9 files changed, 17 insertions(+), 21 deletions(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 27e31c5..e3412a1 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -288,7 +288,7 @@ config HUGETLB_PAGE_SIZE_VARIABLE
 
 config MATH_EMULATION
bool Math emulation
-   depends on 4xx || 8xx || E200 || PPC_MPC832x || E500
+   depends on 4xx || 8xx || FSL_E200 || PPC_MPC832x || E500
---help---
  Some PowerPC chips designed for embedded applications do not have
  a floating-point unit and therefore do not implement the
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 57af16e..c17bc29 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -134,7 +134,7 @@ cpu-as-$(CONFIG_4xx)+= -Wa,-m405
 cpu-as-$(CONFIG_6xx)   += -Wa,-maltivec
 cpu-as-$(CONFIG_POWER4)+= -Wa,-maltivec
 cpu-as-$(CONFIG_E500)  += -Wa,-me500
-cpu-as-$(CONFIG_E200)  += -Wa,-me200
+cpu-as-$(CONFIG_FSL_E200)  += -Wa,-me200
 
 KBUILD_AFLAGS += $(cpu-as-y)
 KBUILD_CFLAGS += $(cpu-as-y)
diff --git a/arch/powerpc/include/asm/cputable.h 
b/arch/powerpc/include/asm/cputable.h
index e30442c..b69f255 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -522,7 +522,7 @@ enum {
 #ifdef CONFIG_44x
CPU_FTRS_44X  CPU_FTRS_440x6 
 #endif
-#ifdef CONFIG_E200
+#ifdef CONFIG_FSL_E200
CPU_FTRS_E200 
 #endif
 #ifdef CONFIG_E500
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 559da19..f5b4f457 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -893,7 +893,7 @@
 #define SPRN_SPRG_WSCRATCH_MC  SPRN_SPRG1
 #define SPRN_SPRG_RSCRATCH4SPRN_SPRG7R
 #define SPRN_SPRG_WSCRATCH4SPRN_SPRG7W
-#ifdef CONFIG_E200
+#ifdef CONFIG_FSL_E200
 #define SPRN_SPRG_RSCRATCH_DBG SPRN_SPRG6R
 #define SPRN_SPRG_WSCRATCH_DBG SPRN_SPRG6W
 #else
diff --git a/arch/powerpc/include/asm/reg_booke.h 
b/arch/powerpc/include/asm/reg_booke.h
index 28cdbd9..81cd987 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -237,7 +237,7 @@
 #define MCSR_BSL2_ERR  0x0001UL /* Backside L2 cache error */
 #endif
 
-#ifdef CONFIG_E200
+#ifdef CONFIG_FSL_E200
 #define MCSR_MCP   0x8000UL /* Machine Check Input Pin */
 #define MCSR_CP_PERR   0x2000UL /* Cache Push Parity Error */
 #define MCSR_CPERR 0x1000UL /* Cache Parity Error */
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index e35f4fb..e5b142c 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1871,7 +1871,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
.platform   = ppc440,
}
 #endif /* CONFIG_44x */
-#ifdef CONFIG_E200
+#ifdef CONFIG_FSL_E200
{   /* e200z5 */
.pvr_mask   = 0xfff0,
.pvr_value  = 0x8100,
@@ -1915,7 +1915,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check  = machine_check_e200,
.platform   = ppc5554,
}
-#endif /* CONFIG_E200 */
+#endif /* CONFIG_FSL_E200 */
 #endif /* CONFIG_PPC32 */
 #ifdef CONFIG_E500
 #ifdef CONFIG_PPC32
diff --git a/arch/powerpc/kernel/head_fsl_booke.S 
b/arch/powerpc/kernel/head_fsl_booke.S
index 9f5d210..134b2b8 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -137,7 +137,7 @@ _ENTRY(__early_start)
 
/* Setup the defaults for TLB entries */
li  r2,(MAS4_TSIZED(BOOK3E_PAGESZ_4K))@l
-#ifdef CONFIG_E200
+#ifdef CONFIG_FSL_E200
orisr2,r2,MAS4_TLBSELD(1)@h
 #endif
mtspr   SPRN_MAS4, r2
@@ -304,7 +304,7 @@ interrupt_base:
CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
 
/* Machine Check Interrupt */
-#ifdef CONFIG_E200
+#ifdef CONFIG_FSL_E200
/* no RFMCI, MCSRRs on E200 */
CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
 #else
@@ -340,7 +340,7 @@ interrupt_base:
 #ifdef CONFIG_PPC_FPU
FP_UNAVAILABLE_EXCEPTION
 #else
-#ifdef CONFIG_E200
+#ifdef CONFIG_FSL_E200
/* E200 treats 'normal' floating point instructions as FP Unavail

[RFC PATCH 08/17] powerpc/e500: Remove conditional lwsync substitution

2011-11-09 Thread Kyle Moffett
As FreeScale e500 systems have different cacheline sizes from e500mc, it
is basically impossible for the kernel to support both in a single
system image at present.

Given that one is SPE-float and the other is classic-float, they are not
generally userspace-compatible either.

This patch updates the conditional to depend on whether the system is
actually targetting an e500 or e500mc core and entirely removes the
unused sync-to-lwsync-replacement on e500v1/e500v2 systems.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/synch.h |   16 
 1 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h
index d7cab44..3d518b6 100644
--- a/arch/powerpc/include/asm/synch.h
+++ b/arch/powerpc/include/asm/synch.h
@@ -5,8 +5,11 @@
 #include linux/stringify.h
 #include asm/feature-fixups.h
 
-#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC)
+#if defined(__powerpc64__) || defined(CONFIG_FSL_E500MC)
 #define __SUBARCH_HAS_LWSYNC
+#define LWSYNC lwsync
+#else
+#define LWSYNC sync
 #endif
 
 #ifndef __ASSEMBLY__
@@ -25,17 +28,6 @@ static inline void isync(void)
 }
 #endif /* __ASSEMBLY__ */
 
-#if defined(__powerpc64__)
-#define LWSYNC lwsync
-#elif defined(CONFIG_E500)
-#define LWSYNC \
-   START_LWSYNC_SECTION(96);   \
-   sync;   \
-   MAKE_LWSYNC_SECTION_ENTRY(96, __lwsync_fixup);
-#else
-#define LWSYNC sync
-#endif
-
 #ifdef CONFIG_SMP
 #define __PPC_ACQUIRE_BARRIER  \
START_LWSYNC_SECTION(97);   \
-- 
1.7.2.5

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[RFC PATCH 11/17] powerpc/e500: Use the correct assembler flags for e500mc and e5500

2011-11-09 Thread Kyle Moffett
The -me500 assembler option is intended only for use on e500v1 or
e500v2 systems.  On modern binutils it will refuse to assemble standard
floating point opcodes, and it will translate lwsync into sync.

This fixes the e500mc/e5500 kernel build on recent binutils.

For e500mc/e5500 with standard PowerPC floating point, the assembler
options -me500mc or -me500mc64 should be used, although they are not
strictly necessary depending on which opcodes are in use.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/Makefile |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index c17bc29..bd443ee2 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -133,7 +133,8 @@ endif
 cpu-as-$(CONFIG_4xx)   += -Wa,-m405
 cpu-as-$(CONFIG_6xx)   += -Wa,-maltivec
 cpu-as-$(CONFIG_POWER4)+= -Wa,-maltivec
-cpu-as-$(CONFIG_E500)  += -Wa,-me500
+cpu-as-$(CONFIG_FSL_E500_V1_V2)+= -Wa,-me500
+cpu-as-$(CONFIG_FSL_E500MC)+= -Wa,-me500mc
 cpu-as-$(CONFIG_FSL_E200)  += -Wa,-me200
 
 KBUILD_AFLAGS += $(cpu-as-y)
-- 
1.7.2.5

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[RFC PATCH 09/17] powerpc/e500: Split idle handlers for e500v1/v2 and e500mc

2011-11-09 Thread Kyle Moffett
These are totally different (more so in fact than 6xx vs. e500v1/v2), so
there isn't really a good reason to keep them in the same file.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/machdep.h  |1 +
 arch/powerpc/kernel/Makefile|3 +-
 arch/powerpc/kernel/idle_e500.S |   12 ---
 arch/powerpc/kernel/idle_e500mc.S   |   56 +++
 arch/powerpc/kernel/setup_32.c  |2 +-
 arch/powerpc/platforms/85xx/p2041_rdb.c |2 +-
 arch/powerpc/platforms/85xx/p3041_ds.c  |2 +-
 arch/powerpc/platforms/85xx/p3060_qds.c |2 +-
 arch/powerpc/platforms/85xx/p4080_ds.c  |2 +-
 arch/powerpc/platforms/85xx/p5020_ds.c  |2 +-
 10 files changed, 65 insertions(+), 19 deletions(-)
 create mode 100644 arch/powerpc/kernel/idle_e500mc.S

diff --git a/arch/powerpc/include/asm/machdep.h 
b/arch/powerpc/include/asm/machdep.h
index b540d6f..995a2ec 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -253,6 +253,7 @@ struct machdep_calls {
 };
 
 extern void e500_idle(void);
+extern void e500mc_idle(void);
 extern void power4_idle(void);
 extern void power7_idle(void);
 extern void ppc6xx_idle(void);
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index ce4f7f1..8627dda 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -61,7 +61,8 @@ obj-$(CONFIG_IBMEBUS)   += ibmebus.o
 obj-$(CONFIG_GENERIC_TBSYNC)   += smp-tbsync.o
 obj-$(CONFIG_CRASH_DUMP)   += crash_dump.o
 ifeq ($(CONFIG_PPC32),y)
-obj-$(CONFIG_E500) += idle_e500.o
+obj-$(CONFIG_FSL_E500_V1_V2)   += idle_e500.o
+obj-$(CONFIG_FSL_E500MC)   += idle_e500mc.o
 endif
 obj-$(CONFIG_6xx)  += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
 obj-$(CONFIG_TAU)  += tau_6xx.o
diff --git a/arch/powerpc/kernel/idle_e500.S b/arch/powerpc/kernel/idle_e500.S
index 4f0ab85..47a1a98 100644
--- a/arch/powerpc/kernel/idle_e500.S
+++ b/arch/powerpc/kernel/idle_e500.S
@@ -26,17 +26,6 @@ _GLOBAL(e500_idle)
ori r4,r4,_TLF_NAPPING  /* so when we take an exception */
stw r4,TI_LOCAL_FLAGS(r3)   /* it will return to our caller */
 
-#ifdef CONFIG_PPC_E500MC
-   wrteei  1
-1: wait
-
-   /*
-* Guard against spurious wakeups (e.g. from a hypervisor) --
-* any real interrupt will cause us to return to LR due to
-* _TLF_NAPPING.
-*/
-   b   1b
-#else
/* Check if we can nap or doze, put HID0 mask in r3 */
lis r3,0
 BEGIN_FTR_SECTION
@@ -83,7 +72,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_L2CSR|CPU_FTR_CAN_NAP)
mtmsr   r7
isync
 2: b   2b
-#endif /* !E500MC */
 
 /*
  * Return from NAP/DOZE mode, restore some CPU specific registers,
diff --git a/arch/powerpc/kernel/idle_e500mc.S 
b/arch/powerpc/kernel/idle_e500mc.S
new file mode 100644
index 000..4806942
--- /dev/null
+++ b/arch/powerpc/kernel/idle_e500mc.S
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ * Dave Liu dave...@freescale.com
+ * copy from idle_6xx.S and modify for e500 based processor,
+ * implement the power_save function in idle.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include linux/threads.h
+#include asm/reg.h
+#include asm/page.h
+#include asm/cputable.h
+#include asm/thread_info.h
+#include asm/ppc_asm.h
+#include asm/asm-offsets.h
+
+   .text
+
+_GLOBAL(e500mc_idle)
+   rlwinm  r3,r1,0,0,31-THREAD_SHIFT   /* current thread_info */
+   lwz r4,TI_LOCAL_FLAGS(r3)   /* set napping bit */
+   ori r4,r4,_TLF_NAPPING  /* so when we take an exception */
+   stw r4,TI_LOCAL_FLAGS(r3)   /* it will return to our caller */
+   wrteei  1
+1: wait
+
+   /*
+* Guard against spurious wakeups (e.g. from a hypervisor) --
+* any real interrupt will cause us to return to LR due to
+* _TLF_NAPPING.
+*/
+   b   1b
+
+/*
+ * Return from NAP/DOZE mode, restore some CPU specific registers,
+ * r2 containing physical address of current.
+ * r11 points to the exception frame (physical address).
+ * We have to preserve r10.
+ */
+_GLOBAL(power_save_ppc32_restore)
+   lwz r9,_LINK(r11)   /* interrupted in e500mc_idle */
+   stw r9,_NIP(r11)/* make it do a blr */
+
+#ifdef CONFIG_SMP
+   rlwinm  r12,r1,0,0,31-THREAD_SHIFT
+   lwz r11,TI_CPU(r12) /* get cpu number * 4 */
+   slwir11,r11,2
+#else
+   li  r11,0
+#endif
+
+   b   transfer_to_handler_cont
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index c1ce863..b14aabd 100644

[RFC PATCH 10/17] powerpc/e500: Fix up the last references to CONFIG_PPC_E500MC

2011-11-09 Thread Kyle Moffett
This moves the select PPC_FPU from PPC_E500MC to the new FSL_E500MC
processor selection, where it belongs.

The only actual difference that this patch introduces is the P5020DS
board (FreeScale e5500 CPU) will not set FSL_E500MC when building in
64-bit mode.

This is OK as all of the existing code that the 64-bit P5020DS needs is
still conditional on CONFIG_E500 or CONFIG_PPC_FPU, which are both set
properly on the P5020DS (PPC_FPU is always enabled on 64-bit).

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/cache.h   |2 +-
 arch/powerpc/platforms/85xx/Kconfig|   10 +-
 arch/powerpc/platforms/Kconfig.cputype |8 ++--
 3 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 4b50941..10988a2 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -8,7 +8,7 @@
 #if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
 #define L1_CACHE_SHIFT 4
 #define MAX_COPY_PREFETCH  1
-#elif defined(CONFIG_PPC_E500MC)
+#elif defined(CONFIG_FSL_E500MC)
 #define L1_CACHE_SHIFT 6
 #define MAX_COPY_PREFETCH  4
 #elif defined(CONFIG_PPC32)
diff --git a/arch/powerpc/platforms/85xx/Kconfig 
b/arch/powerpc/platforms/85xx/Kconfig
index 37f9de7..248f87c 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -173,8 +173,8 @@ config SBC8560
 
 config P2041_RDB
bool Freescale P2041 RDB
+   depends on FSL_E500MC
select DEFAULT_UIMAGE
-   select PPC_E500MC
select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
@@ -187,8 +187,8 @@ config P2041_RDB
 
 config P3041_DS
bool Freescale P3041 DS
+   depends on FSL_E500MC
select DEFAULT_UIMAGE
-   select PPC_E500MC
select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
@@ -201,8 +201,8 @@ config P3041_DS
 
 config P3060_QDS
bool Freescale P3060 QDS
+   depends on FSL_E500MC
select DEFAULT_UIMAGE
-   select PPC_E500MC
select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select MPC8xxx_GPIO
@@ -214,8 +214,8 @@ config P3060_QDS
 
 config P4080_DS
bool Freescale P4080 DS
+   depends on FSL_E500MC
select DEFAULT_UIMAGE
-   select PPC_E500MC
select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
@@ -230,9 +230,9 @@ endif # PPC32
 
 config P5020_DS
bool Freescale P5020 DS
+   depends on FSL_E500MC || PPC_BOOK3E_64
select DEFAULT_UIMAGE
select E500
-   select PPC_E500MC
select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/powerpc/platforms/Kconfig.cputype 
b/arch/powerpc/platforms/Kconfig.cputype
index 9770564..fd37bb2 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -38,6 +38,7 @@ config FSL_E500_V1_V2
 config FSL_E500MC
bool Freescale e500mc (also e5500 in 32-bit mode)
select PHYS_64BIT_SUPPORTED
+   select PPC_FPU
select E500
select PPC_85xx
 
@@ -148,11 +149,6 @@ config E500
select PPC_FSL_BOOK3E
bool
 
-config PPC_E500MC
-   bool e500mc Support
-   select PPC_FPU
-   depends on E500
-
 config PPC_FPU
bool
default y if PPC64
@@ -280,7 +276,7 @@ config PPC_ICSWX
 
 config SPE
bool SPE Support
-   depends on FSL_E200 || (E500  !PPC_E500MC)
+   depends on FSL_E200 || FSL_E500_V1_V2
default y
---help---
  This option enables kernel support for the Signal Processing
-- 
1.7.2.5

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[RFC PATCH 12/17] powerpc/e500: Separate e500mc CPU table entries from e500v1/e500v2

2011-11-09 Thread Kyle Moffett
The e500mc CPUs have a classic FPU and are not compatible with e500v1 or
e500v2.  This patch fixes the 32-bit CPU feature tables so that e500mc
entries are not present on e500v1/e500v2 systems and vice versa.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/cputable.h |   16 ++--
 arch/powerpc/kernel/cputable.c  |8 +---
 2 files changed, 15 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/include/asm/cputable.h 
b/arch/powerpc/include/asm/cputable.h
index b69f255..c7c2582 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -480,9 +480,11 @@ enum {
 #ifdef CONFIG_E200
CPU_FTRS_E200 |
 #endif
-#ifdef CONFIG_E500
-   CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC |
-   CPU_FTRS_E5500 |
+#ifdef CONFIG_FSL_E500_V1_V2
+   CPU_FTRS_E500 | CPU_FTRS_E500_2 |
+#endif
+#ifdef CONFIG_FSL_E500MC
+   CPU_FTRS_E500MC | CPU_FTRS_E5500 |
 #endif
0,
 };
@@ -525,9 +527,11 @@ enum {
 #ifdef CONFIG_FSL_E200
CPU_FTRS_E200 
 #endif
-#ifdef CONFIG_E500
-   CPU_FTRS_E500  CPU_FTRS_E500_2  CPU_FTRS_E500MC 
-   CPU_FTRS_E5500 
+#ifdef CONFIG_FSL_E500_V1_V2
+   CPU_FTRS_E500  CPU_FTRS_E500_2 
+#endif
+#ifdef CONFIG_FSL_E500MC
+   CPU_FTRS_E500MC  CPU_FTRS_E5500 
 #endif
CPU_FTRS_POSSIBLE,
 };
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index e5b142c..a6f2544 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1917,8 +1917,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
}
 #endif /* CONFIG_FSL_E200 */
 #endif /* CONFIG_PPC32 */
-#ifdef CONFIG_E500
-#ifdef CONFIG_PPC32
+#ifdef CONFIG_FSL_E500_V1_V2
{   /* e500 */
.pvr_mask   = 0x,
.pvr_value  = 0x8020,
@@ -1956,6 +1955,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check  = machine_check_e500,
.platform   = ppc8548,
},
+#endif /* CONFIG_FSL_E500_V1_V2 */
+#ifdef CONFIG_FSL_E500MC
{   /* e500mc */
.pvr_mask   = 0x,
.pvr_value  = 0x8023,
@@ -1973,7 +1974,8 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check  = machine_check_e500mc,
.platform   = ppce500mc,
},
-#endif /* CONFIG_PPC32 */
+#endif /* CONFIG_FSL_E500MC */
+#ifdef CONFIG_E500 /* FIXME */
{   /* e5500 */
.pvr_mask   = 0x,
.pvr_value  = 0x8024,
-- 
1.7.2.5

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[RFC PATCH 13/17] powerpc/e500: Add a new CONFIG_FSL_E5500 option for the e5500

2011-11-09 Thread Kyle Moffett
As part of splitting CONFIG_E500 into separate options for e500v1/v2 and
e500mc/e5500, some code only needs to be built when e5500 support is
required.

This adds a new internal-use config option for both 32-bit and 64-bit
builds that enables only the e5500 support code.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/85xx/Kconfig|2 +-
 arch/powerpc/platforms/Kconfig.cputype |4 
 2 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/Kconfig 
b/arch/powerpc/platforms/85xx/Kconfig
index 248f87c..72488d4 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -231,8 +231,8 @@ endif # PPC32
 config P5020_DS
bool Freescale P5020 DS
depends on FSL_E500MC || PPC_BOOK3E_64
+   select FSL_E5500
select DEFAULT_UIMAGE
-   select E500
select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/powerpc/platforms/Kconfig.cputype 
b/arch/powerpc/platforms/Kconfig.cputype
index fd37bb2..cff45e3 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -144,6 +144,10 @@ config 8xx
 config PPC_85xx
bool
 
+config FSL_E5500
+   bool
+   select E500
+
 config E500
select FSL_EMB_PERFMON
select PPC_FSL_BOOK3E
-- 
1.7.2.5

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[RFC PATCH 14/17] powerpc/e500: Don't make kgdb use e500v1/e500v2 registers on e500mc

2011-11-09 Thread Kyle Moffett
The only systems which need the sparse PowerPC register map are the
e500v1/e500v2.

NOTE: The kgdb code does not otherwise use CONFIG_E500, so this support
is probably still buggy on e500v1/e500v2, but I don't know kgdb enough
to fix it.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/kgdb.h |   17 ++---
 1 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/include/asm/kgdb.h b/arch/powerpc/include/asm/kgdb.h
index 9db24e7..4dea066 100644
--- a/arch/powerpc/include/asm/kgdb.h
+++ b/arch/powerpc/include/asm/kgdb.h
@@ -46,14 +46,17 @@ static inline void arch_kgdb_breakpoint(void)
 #define NUMREGBYTES((68 * 8) + (3 * 4))
 #define NUMCRITREGBYTES184
 #else /* CONFIG_PPC32 */
-/* On non-E500 family PPC32 we determine the size by picking the last
- * register we need, but on E500 we skip sections so we list what we
- * need to store, and add it up. */
-#ifndef CONFIG_E500
-#define MAXREG (PT_FPSCR+1)
-#else
+/*
+ * On FreeScale e500v1 or e500v2 processors we need to skip some register
+ * sections, so just add up a list of what we need to store.
+ *
+ * On all other 32-bit PowerPC we can just pick the last needed register.
+ */
+#ifdef CONFIG_FSL_E500_V1_V2
 /* 32 GPRs (8 bytes), nip, msr, ccr, link, ctr, xer, acc (8 bytes), spefscr*/
-#define MAXREG ((32*2)+6+2+1)
+#define MAXREG ((32*2)+6+2+1)
+#else
+#define MAXREG (PT_FPSCR+1)
 #endif
 #define NUMREGBYTES(MAXREG * sizeof(int))
 /* CR/LR, R1, R2, R13-R31 inclusive. */
-- 
1.7.2.5

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[RFC PATCH 15/17] powerpc/e500: Fix up all remaining code uses of CONFIG_E500

2011-11-09 Thread Kyle Moffett
The CONFIG_E500 config option is ambiguous and used incorrectly in many
places to refer to some combination of e500v1/v2, e500mc, and e5500.

Fix up each reference to use the correct combinations of the following
config options:
  CONFIG_FSL_E500_V1_V2
  CONFIG_FSL_E500MC
  CONFIG_FSL_E5500

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/Kconfig   |2 +-
 arch/powerpc/include/asm/reg_booke.h   |   17 ++---
 arch/powerpc/kernel/cputable.c |8 
 arch/powerpc/kernel/entry_32.S |8 +---
 arch/powerpc/kvm/Kconfig   |3 ++-
 arch/powerpc/platforms/Kconfig.cputype |   22 ++
 6 files changed, 32 insertions(+), 28 deletions(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index e3412a1..53c5acf 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -288,7 +288,7 @@ config HUGETLB_PAGE_SIZE_VARIABLE
 
 config MATH_EMULATION
bool Math emulation
-   depends on 4xx || 8xx || FSL_E200 || PPC_MPC832x || E500
+   depends on 4xx || 8xx || FSL_E200 || PPC_MPC832x || FSL_E500_V1_V2
---help---
  Some PowerPC chips designed for embedded applications do not have
  a floating-point unit and therefore do not implement the
diff --git a/arch/powerpc/include/asm/reg_booke.h 
b/arch/powerpc/include/asm/reg_booke.h
index 81cd987..845a069 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -206,12 +206,10 @@
 #define PPC47x_MCSR_FPR0x0080 /* FPR parity error */
 #define PPC47x_MCSR_IPR0x0040 /* Imprecise Machine Check Exception 
*/
 
-#ifdef CONFIG_E500
-/* All e500 */
-#define MCSR_MCP   0x8000UL /* Machine Check Input Pin */
-#define MCSR_ICPERR0x4000UL /* I-Cache Parity Error */
-
 /* e500v1/v2 */
+#ifdef CONFIG_FSL_E500_V1_V2
+#define MCSR_MCP   0x8000UL /* Machine Check Input Pin */
+#define MCSR_ICPERR0x4000UL /* I-Cache Parity Error */
 #define MCSR_DCP_PERR  0x2000UL /* D-Cache Push Parity Error */
 #define MCSR_DCPERR0x1000UL /* D-Cache Parity Error */
 #define MCSR_BUS_IAERR 0x0080UL /* Instruction Address Error */
@@ -222,8 +220,12 @@
 #define MCSR_BUS_WBERR 0x0004UL /* Write Data Bus Error */
 #define MCSR_BUS_IPERR 0x0002UL /* Instruction parity Error */
 #define MCSR_BUS_RPERR 0x0001UL /* Read parity Error */
+#endif
 
-/* e500mc */
+/* e500mc/e5500 */
+#if defined(CONFIG_FSL_E500MC) || defined(CONFIG_FSL_E5500)
+#define MCSR_MCP   0x8000UL /* Machine Check Input Pin */
+#define MCSR_ICPERR0x4000UL /* I-Cache Parity Error */
 #define MCSR_DCPERR_MC 0x2000UL /* D-Cache Parity Error */
 #define MCSR_L2MMU_MHIT0x0400UL /* Hit on multiple TLB entries */
 #define MCSR_NMI   0x0010UL /* Non-Maskable Interrupt */
@@ -250,7 +252,8 @@
 #endif
 
 /* Bit definitions for the HID1 */
-#ifdef CONFIG_E500
+#if defined(CONFIG_FSL_E500_V1_V2) || defined(CONFIG_FSL_E500MC) \
+   || defined(CONFIG_FSL_E5500)
 /* e500v1/v2 */
 #define HID1_PLL_CFG_MASK 0xfc00   /* PLL_CFG input pins */
 #define HID1_RFXE  0x0002  /* Read fault exception enable */
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index a6f2544..3fd01ca 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -69,10 +69,10 @@ extern void __setup_cpu_power7(unsigned long offset, struct 
cpu_spec* spec);
 extern void __restore_cpu_power7(void);
 extern void __restore_cpu_a2(void);
 #endif /* CONFIG_PPC64 */
-#if defined(CONFIG_E500)
+#ifdef CONFIG_FSL_E5500
 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
 extern void __restore_cpu_e5500(void);
-#endif /* CONFIG_E500 */
+#endif /* CONFIG_FSL_E5500 */
 
 /* This table only contains desktop CPUs, it need to be filled with embedded
  * ones as well...
@@ -1975,7 +1975,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
.platform   = ppce500mc,
},
 #endif /* CONFIG_FSL_E500MC */
-#ifdef CONFIG_E500 /* FIXME */
+#ifdef CONFIG_FSL_E5500
{   /* e5500 */
.pvr_mask   = 0x,
.pvr_value  = 0x8024,
@@ -1994,7 +1994,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check  = machine_check_e500mc,
.platform   = ppce5500,
},
-#endif /* CONFIG_E500 */
+#endif /* CONFIG_FSL_E5500 */
 
 #ifdef CONFIG_PPC_A2
{   /* Standard A2 (= DD2) + FPU core */
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 56212bc..373cdc4 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -178,14 +178,15 @@ transfer_to_handler:
cmplw   r1,r9   /* if r1 = ksp_limit */
ble-stack_ovf

[RFC PATCH 16/17] powerpc/e500: Make __setup_cpu_{e200, e500, e500mc, e5500} optional

2011-11-09 Thread Kyle Moffett
Only build the setup functions when the corresponding entries are
included in the CPU table.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/kernel/cpu_setup_fsl_booke.S |   14 +-
 1 files changed, 13 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S 
b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 8053db0..77721b2 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -17,6 +17,8 @@
 #include asm/cputable.h
 #include asm/ppc_asm.h
 
+#if defined(CONFIG_FSL_E500_V1_V2) || defined(CONFIG_FSL_E500MC) \
+   || defined(CONFIG_FSL_E5500)
 _GLOBAL(__e500_icache_setup)
mfspr   r0, SPRN_L1CSR1
andi.   r3, r0, L1CSR1_ICE
@@ -50,14 +52,18 @@ _GLOBAL(__e500_dcache_setup)
mtspr   SPRN_L1CSR0, r0 /* Enable */
isync
blr
+#endif /* CONFIG_FSL_E500_V1_V2 || CONFIG_FSL_E500MC || CONFIG_FSL_E5500 */
 
-#ifdef CONFIG_PPC32
+#ifdef CONFIG_FSL_E200
 _GLOBAL(__setup_cpu_e200)
/* enable dedicated debug exception handling resources (Debug APU) */
mfspr   r3,SPRN_HID0
ori r3,r3,HID0_DAPUEN@l
mtspr   SPRN_HID0,r3
b   __setup_e200_ivors
+#endif
+
+#ifdef CONFIG_FSL_E500_V1_V2
 _GLOBAL(__setup_cpu_e500v1)
 _GLOBAL(__setup_cpu_e500v2)
mflrr4
@@ -72,6 +78,9 @@ _GLOBAL(__setup_cpu_e500v2)
 #endif
mtlrr4
blr
+#endif
+
+#ifdef CONFIG_FSL_E500MC
 _GLOBAL(__setup_cpu_e500mc)
mflrr4
bl  __e500_icache_setup
@@ -80,7 +89,9 @@ _GLOBAL(__setup_cpu_e500mc)
mtlrr4
blr
 #endif
+
 /* Right now, restore and setup are the same thing */
+#ifdef CONFIG_FSL_E5500
 _GLOBAL(__restore_cpu_e5500)
 _GLOBAL(__setup_cpu_e5500)
mflrr4
@@ -96,3 +107,4 @@ _GLOBAL(__setup_cpu_e5500)
 #endif
mtlrr4
blr
+#endif
-- 
1.7.2.5

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[RFC PATCH 17/17] powerpc/e500: Finally remove CONFIG_E500

2011-11-09 Thread Kyle Moffett
This ambiguous config option is now only present as a Kconfig stub.
Remove it and fix up the users.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/Kconfig.cputype |   10 --
 1 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/platforms/Kconfig.cputype 
b/arch/powerpc/platforms/Kconfig.cputype
index 22df19d..d4faa6f 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -32,14 +32,16 @@ config FSL_E200
 config FSL_E500_V1_V2
bool Freescale e500v1/e500v2 (also known as MPC85xx)
select PHYS_64BIT_SUPPORTED
-   select E500
+   select FSL_EMB_PERFMON
+   select PPC_FSL_BOOK3E
select PPC_85xx
 
 config FSL_E500MC
bool Freescale e500mc (also e5500 in 32-bit mode)
select PHYS_64BIT_SUPPORTED
select PPC_FPU
-   select E500
+   select FSL_EMB_PERFMON
+   select PPC_FSL_BOOK3E
select PPC_85xx
 
 config PPC_8xx
@@ -146,12 +148,8 @@ config PPC_85xx
 
 config FSL_E5500
bool
-   select E500
-
-config E500
select FSL_EMB_PERFMON
select PPC_FSL_BOOK3E
-   bool
 
 config PPC_FPU
bool
-- 
1.7.2.5

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[PATCH] powerpc: Remove buggy 9-year-old test for binutils 2.12.1

2011-11-07 Thread Kyle Moffett
Recent binutils refuses to assemble AltiVec opcodes when in e500/SPE
mode, as some of those opcodes alias the SPE instructions.  This
triggers an ancient binutils version check even when building a kernel
with CONFIG_ALTIVEC disabled.

In theory, the check could be conditionalized on CONFIG_ALTIVEC, but in
practice it has long outlived its utility.  It is virtually impossible
to find binutils older than 2.12.1 (released 2002) in the wild anymore.
Even ancient RedHat Enterprise Linux 4 has binutils-2.14.

To fix the kernel build when done natively on e500 systems with this new
binutils, the test is simply removed.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/Makefile |6 --
 1 files changed, 0 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 57af16e..70ba0c0 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -255,12 +255,6 @@ checkbin:
echo 'disable kernel modules' ; \
false ; \
fi
-   @if ! /bin/echo dssall | $(AS) -many -o $(TOUT) /dev/null 21 ; then \
-   echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build ' 
; \
-   echo 'correctly with old versions of binutils.' ; \
-   echo '*** Please upgrade your binutils to 2.12.1 or newer' ; \
-   false ; \
-   fi
 
 CLEAN_FILES += $(TOUT)
 
-- 
1.7.2.5

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[RFC PATCH 00/10] powerpc/mpic: General cleanup patch series

2011-10-31 Thread Kyle Moffett
Hello,

I've been tinkering with a series of patches to clean up the PowerPC
MPIC/OpenPIC init recently as part of a new board port I'm working on.

It's reached the point where I'd like some feedback on the general
approach.  The code itself hasn't been tested at all yet, and probably
does not compile right now (though that is my next step).

(Oh, actually, the first patch isn't really even about the MPIC code,
it should probably be reviewed on its own; oh well...)

Please let me know what you think.

Cheers,
Kyle Moffett

--
Curious about my work on the Debian powerpcspe port?
I'm keeping a blog here: http://pureperl.blogspot.com/

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[RFC PATCH 01/10] powerpc/85xx: Move mpc85xx_smp_init() decl to a new smp.h

2011-10-31 Thread Kyle Moffett
This removes a bunch of extern declarations and CONFIG_SMP ifdefs.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/platforms/85xx/corenet_ds.c  |7 +--
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |6 +-
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |7 +--
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |7 +--
 arch/powerpc/platforms/85xx/p1022_ds.c|7 +--
 arch/powerpc/platforms/85xx/p1023_rds.c   |5 +
 arch/powerpc/platforms/85xx/smp.c |1 +
 arch/powerpc/platforms/85xx/smp.h |   15 +++
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |6 +-
 9 files changed, 23 insertions(+), 38 deletions(-)
 create mode 100644 arch/powerpc/platforms/85xx/smp.h

diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 802ad11..435074d 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -31,6 +31,7 @@
 #include linux/of_platform.h
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
+#include smp.h
 
 void __init corenet_ds_pic_init(void)
 {
@@ -65,10 +66,6 @@ void __init corenet_ds_pic_init(void)
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-void __init mpc85xx_smp_init(void);
-#endif
-
 void __init corenet_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -77,9 +74,7 @@ void __init corenet_ds_setup_arch(void)
 #endif
dma_addr_t max = 0x;
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
 #ifdef CONFIG_PCI
for_each_node_by_type(np, pci) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c 
b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 1b9a8cf..52d2a3e 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -35,6 +35,7 @@
 
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
+#include smp.h
 
 #undef DEBUG
 
@@ -152,9 +153,6 @@ static int mpc85xx_exclude_device(struct pci_controller 
*hose,
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
 static void __init mpc85xx_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -187,9 +185,7 @@ static void __init mpc85xx_ds_setup_arch(void)
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
 #ifdef CONFIG_SWIOTLB
if (memblock_end_of_DRAM()  max) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c 
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 973b3f4..074be05 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -52,6 +52,7 @@
 #include asm/qe_ic.h
 #include asm/mpic.h
 #include asm/swiotlb.h
+#include smp.h
 
 #undef DEBUG
 #ifdef DEBUG
@@ -154,10 +155,6 @@ static int mpc8568_mds_phy_fixups(struct phy_device 
*phydev)
  * Setup the architecture
  *
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
-
 #ifdef CONFIG_QUICC_ENGINE
 static struct of_device_id mpc85xx_qe_ids[] __initdata = {
{ .type = qe, },
@@ -382,9 +379,7 @@ static void __init mpc85xx_mds_setup_arch(void)
}
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
mpc85xx_mds_qe_init();
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c 
b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index f5ff911..cd49898 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -29,6 +29,7 @@
 
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
+#include smp.h
 
 #undef DEBUG
 
@@ -82,9 +83,6 @@ void __init mpc85xx_rdb_pic_init(void)
 /*
  * Setup the architecture
  */
-#ifdef CONFIG_SMP
-extern void __init mpc85xx_smp_init(void);
-#endif
 static void __init mpc85xx_rdb_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -102,10 +100,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
 
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
-
printk(KERN_INFO MPC85xx RDB board from Freescale Semiconductor\n);
 }
 
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c 
b/arch/powerpc/platforms/85xx/p1022_ds.c
index 266b3aa..7e90e24 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -26,6 +26,7 @@
 #include sysdev/fsl_soc.h
 #include sysdev/fsl_pci.h
 #include asm/fsl_guts.h
+#include smp.h
 
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
 
@@ -265,10 +266,6 @@ void __init p1022_ds_pic_init(void)
mpic_init(mpic);
 }
 
-#ifdef CONFIG_SMP
-void __init mpc85xx_smp_init(void);
-#endif
-
 /*
  * Setup the architecture
  */
@@ -309,9 +306,7 @@ static void __init p1022_ds_setup_arch(void)
diu_ops.set_sysfs_monitor_port  = p1022ds_set_sysfs_monitor_port;
 #endif
 
-#ifdef CONFIG_SMP
mpc85xx_smp_init();
-#endif
 
 #ifdef

[RFC PATCH 02/10] powerpc: Consolidate mpic_alloc() OF address translation

2011-10-31 Thread Kyle Moffett
Instead of using the open-coded reg property lookup and address
translation in mpic_alloc(), directly call of_address_to_resource().
This includes various workarounds for special cases which the naive
of_address_translate() does not.

Afterwards it is possible to remove the copiously copy-pasted calls to
of_address_translate() from the 85xx/86xx/powermac platforms.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/platforms/85xx/corenet_ds.c  |9 +
 arch/powerpc/platforms/85xx/ksi8560.c |9 +
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |9 +
 arch/powerpc/platforms/85xx/mpc85xx_ads.c |9 +
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |9 +
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |   11 +
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |9 +
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |   11 +
 arch/powerpc/platforms/85xx/p1010rdb.c|9 +
 arch/powerpc/platforms/85xx/p1022_ds.c|9 +
 arch/powerpc/platforms/85xx/p1023_rds.c   |9 +
 arch/powerpc/platforms/85xx/sbc8548.c |9 +
 arch/powerpc/platforms/85xx/sbc8560.c |9 +
 arch/powerpc/platforms/85xx/socrates.c|9 +
 arch/powerpc/platforms/85xx/stx_gp3.c |9 +
 arch/powerpc/platforms/85xx/tqm85xx.c |9 +
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |9 +
 arch/powerpc/platforms/86xx/pic.c |4 +-
 arch/powerpc/platforms/powermac/pic.c |7 +---
 arch/powerpc/sysdev/mpic.c|   63 +++--
 20 files changed, 54 insertions(+), 177 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 435074d..7893ad3 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -36,7 +36,6 @@
 void __init corenet_ds_pic_init(void)
 {
struct mpic *mpic;
-   struct resource r;
struct device_node *np = NULL;
unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
@@ -48,16 +47,10 @@ void __init corenet_ds_pic_init(void)
return;
}
 
-   if (of_address_to_resource(np, 0, r)) {
-   printk(KERN_ERR Failed to map mpic register space\n);
-   of_node_put(np);
-   return;
-   }
-
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
 
-   mpic = mpic_alloc(np, r.start, flags, 0, 256,  OpenPIC  );
+   mpic = mpic_alloc(np, 0, flags, 0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
 
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c 
b/arch/powerpc/platforms/85xx/ksi8560.c
index c46f935..b20c07d 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -68,7 +68,6 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc 
*desc)
 static void __init ksi8560_pic_init(void)
 {
struct mpic *mpic;
-   struct resource r;
struct device_node *np;
 #ifdef CONFIG_CPM2
int irq;
@@ -81,13 +80,7 @@ static void __init ksi8560_pic_init(void)
return;
}
 
-   if (of_address_to_resource(np, 0, r)) {
-   printk(KERN_ERR Could not map mpic register space\n);
-   of_node_put(np);
-   return;
-   }
-
-   mpic = mpic_alloc(np, r.start,
+   mpic = mpic_alloc(np, 0,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c 
b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index f79f2f1..03173ba 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -35,7 +35,6 @@
 void __init mpc8536_ds_pic_init(void)
 {
struct mpic *mpic;
-   struct resource r;
struct device_node *np;
 
np = of_find_node_by_type(NULL, open-pic);
@@ -44,13 +43,7 @@ void __init mpc8536_ds_pic_init(void)
return;
}
 
-   if (of_address_to_resource(np, 0, r)) {
-   printk(KERN_ERR Failed to map mpic register space\n);
-   of_node_put(np);
-   return;
-   }
-
-   mpic = mpic_alloc(np, r.start,
+   mpic = mpic_alloc(np, 0,
  MPIC_PRIMARY | MPIC_WANTS_RESET |
  MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
0, 256,  OpenPIC  );
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c 
b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 3b2c9bb..5cb797b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms

[RFC PATCH 03/10] powerpc/mpic: Assume a device-node was passed in mpic_alloc()

2011-10-31 Thread Kyle Moffett
All of the existing callers of mpic_alloc() pass in a non-NULL
device-node pointer, so the checks for a NULL device-node may be
removed.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/sysdev/mpic.c |   50 ++-
 1 files changed, 21 insertions(+), 29 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index d6ef4d9..f7de33e 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1139,19 +1139,17 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
unsigned int irq_count,
const char *name)
 {
-   struct mpic *mpic;
-   u32 greg_feature;
-   const char  *vers;
-   int i;
-   int intvec_top;
+   int i, psize, intvec_top;
+   struct mpic *mpic;
+   u32 greg_feature;
+   const char *vers;
+   const u32 *psrc;
 
-   /*
-* If no phyiscal address was specified then all of the phyiscal
-* addressing parameters must come from the device-tree.
-*/
-   if (!phys_addr) {
-   BUG_ON(!node);
+   /* This code assumes that a non-NULL device node is passed in */
+   BUG_ON(!node);
 
+   /* Pick the physical address from the device tree if unspecified */
+   if (!phys_addr) {
/* Check if it is DCR-based */
if (of_get_property(node, dcr-reg)) {
flags |= MPIC_USES_DCR;
@@ -1218,28 +1216,22 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
mpic-spurious_vec  = intvec_top;
 
/* Check for big-endian in device-tree */
-   if (node  of_get_property(node, big-endian, NULL) != NULL)
+   if (of_get_property(node, big-endian, NULL) != NULL)
mpic-flags |= MPIC_BIG_ENDIAN;
-   if (node  of_device_is_compatible(node, fsl,mpic))
+   if (of_device_is_compatible(node, fsl,mpic))
mpic-flags |= MPIC_FSL;
 
/* Look for protected sources */
-   if (node) {
-   int psize;
-   unsigned int bits, mapsize;
-   const u32 *psrc =
-   of_get_property(node, protected-sources, psize);
-   if (psrc) {
-   psize /= 4;
-   bits = intvec_top + 1;
-   mapsize = BITS_TO_LONGS(bits) * sizeof(unsigned long);
-   mpic-protected = kzalloc(mapsize, GFP_KERNEL);
-   BUG_ON(mpic-protected == NULL);
-   for (i = 0; i  psize; i++) {
-   if (psrc[i]  intvec_top)
-   continue;
-   __set_bit(psrc[i], mpic-protected);
-   }
+   psrc = of_get_property(node, protected-sources, psize);
+   if (psrc) {
+   /* Allocate a bitmap with one bit per interrupt */
+   unsigned int mapsize = BITS_TO_LONGS(intvec_top + 1);
+   mpic-protected = kzalloc(mapsize*sizeof(long), GFP_KERNEL);
+   BUG_ON(mpic-protected == NULL);
+   for (i = 0; i  psize/sizeof(u32); i++) {
+   if (psrc[i]  intvec_top)
+   continue;
+   __set_bit(psrc[i], mpic-protected);
}
}
 
-- 
1.7.2.5

___
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[RFC PATCH 04/10] powerpc/mpic: Save computed phys_addr for board-specific code

2011-10-31 Thread Kyle Moffett
The MPIC code can already perform an automatic OF address translation
step as part of mpic_alloc(), but several boards need to use that base
address when they perform mpic_assign_isu().

The easiest solution is to save the computed physical address into the
struct mpic for later use by the board code.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/mpic.h   |3 +++
 arch/powerpc/platforms/embedded6xx/holly.c|   15 +++
 arch/powerpc/platforms/embedded6xx/linkstation.c  |   14 --
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |   16 +++-
 arch/powerpc/platforms/embedded6xx/storcenter.c   |   16 +++-
 arch/powerpc/platforms/pasemi/setup.c |2 +-
 arch/powerpc/sysdev/mpic.c|   11 ++-
 7 files changed, 23 insertions(+), 54 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index df18989..49bab41 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -295,6 +295,9 @@ struct mpic
/* Register access method */
enum mpic_reg_type  reg_type;
 
+   /* The physical base address of the MPIC */
+   phys_addr_t paddr;
+
/* The various ioremap'ed bases */
struct mpic_reg_bankgregs;
struct mpic_reg_banktmregs;
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c 
b/arch/powerpc/platforms/embedded6xx/holly.c
index 487bda0..80b2e2a 100644
--- a/arch/powerpc/platforms/embedded6xx/holly.c
+++ b/arch/powerpc/platforms/embedded6xx/holly.c
@@ -147,7 +147,6 @@ static void __init holly_setup_arch(void)
 static void __init holly_init_IRQ(void)
 {
struct mpic *mpic;
-   phys_addr_t mpic_paddr = 0;
struct device_node *tsi_pic;
 #ifdef CONFIG_PCI
unsigned int cascade_pci_irq;
@@ -156,20 +155,12 @@ static void __init holly_init_IRQ(void)
 #endif
 
tsi_pic = of_find_node_by_type(NULL, open-pic);
-   if (tsi_pic) {
-   unsigned int size;
-   const void *prop = of_get_property(tsi_pic, reg, size);
-   mpic_paddr = of_translate_address(tsi_pic, prop);
-   }
-
-   if (mpic_paddr == 0) {
+   if (!tsi_pic) {
printk(KERN_ERR %s: No tsi108 PIC found !\n, __func__);
return;
}
 
-   pr_debug(%s: tsi108 pic phys_addr = 0x%x\n, __func__, (u32) 
mpic_paddr);
-
-   mpic = mpic_alloc(tsi_pic, mpic_paddr,
+   mpic = mpic_alloc(tsi_pic, 0,
MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
24,
@@ -178,7 +169,7 @@ static void __init holly_init_IRQ(void)
 
BUG_ON(mpic == NULL);
 
-   mpic_assign_isu(mpic, 0, mpic_paddr + 0x100);
+   mpic_assign_isu(mpic, 0, mpic-paddr + 0x100);
 
mpic_init(mpic);
 
diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c 
b/arch/powerpc/platforms/embedded6xx/linkstation.c
index 244f997..72b3685 100644
--- a/arch/powerpc/platforms/embedded6xx/linkstation.c
+++ b/arch/powerpc/platforms/embedded6xx/linkstation.c
@@ -82,28 +82,22 @@ static void __init linkstation_init_IRQ(void)
 {
struct mpic *mpic;
struct device_node *dnp;
-   const u32 *prop;
-   int size;
-   phys_addr_t paddr;
 
dnp = of_find_node_by_type(NULL, open-pic);
if (dnp == NULL)
return;
 
-   prop = of_get_property(dnp, reg, size);
-   paddr = (phys_addr_t)of_translate_address(dnp, prop);
-
-   mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET, 4, 32,  
EPIC );
+   mpic = mpic_alloc(dnp, 0, MPIC_PRIMARY | MPIC_WANTS_RESET, 4, 32,  
EPIC );
BUG_ON(mpic == NULL);
 
/* PCI IRQs */
-   mpic_assign_isu(mpic, 0, paddr + 0x10200);
+   mpic_assign_isu(mpic, 0, mpic-paddr + 0x10200);
 
/* I2C */
-   mpic_assign_isu(mpic, 1, paddr + 0x11000);
+   mpic_assign_isu(mpic, 1, mpic-paddr + 0x11000);
 
/* ttyS0, ttyS1 */
-   mpic_assign_isu(mpic, 2, paddr + 0x11100);
+   mpic_assign_isu(mpic, 2, mpic-paddr + 0x11100);
 
mpic_init(mpic);
 }
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c 
b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index 1cb907c..28082f9 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -101,7 +101,6 @@ static void __init mpc7448_hpc2_setup_arch(void)
 static void __init mpc7448_hpc2_init_IRQ(void)
 {
struct mpic *mpic;
-   phys_addr_t mpic_paddr = 0;
struct device_node *tsi_pic;
 #ifdef CONFIG_PCI
unsigned int cascade_pci_irq;
@@ -110,21 +109,12 @@ static void __init mpc7448_hpc2_init_IRQ(void)
 #endif
 
tsi_pic = of_find_node_by_type(NULL, open-pic);
-   if (tsi_pic

[RFC PATCH 05/10] powerpc/mpic: Search for open-pic device-tree node if NULL

2011-10-31 Thread Kyle Moffett
Almost all PowerPC platforms use a standard open-pic device node so
the mpic_alloc() function now accepts NULL for the device-node.  This
will cause it to perform a default search with of_find_matching_node().

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/85xx/corenet_ds.c  |   10 +-
 arch/powerpc/platforms/85xx/ksi8560.c |   13 ++---
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |   13 +
 arch/powerpc/platforms/85xx/mpc85xx_ads.c |   12 ++--
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |   15 +--
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |   14 +++---
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |   10 +-
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |   14 ++
 arch/powerpc/platforms/85xx/p1022_ds.c|   14 +-
 arch/powerpc/platforms/85xx/sbc8548.c |   16 +---
 arch/powerpc/platforms/85xx/sbc8560.c |   13 ++---
 arch/powerpc/platforms/85xx/socrates.c|   11 +--
 arch/powerpc/platforms/85xx/stx_gp3.c |   13 ++---
 arch/powerpc/platforms/85xx/tqm85xx.c |   13 ++---
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |   13 +
 arch/powerpc/platforms/embedded6xx/holly.c|   10 +-
 arch/powerpc/platforms/embedded6xx/linkstation.c  |8 ++--
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |   10 +-
 arch/powerpc/platforms/embedded6xx/storcenter.c   |   10 +-
 arch/powerpc/sysdev/mpic.c|   19 +--
 20 files changed, 45 insertions(+), 206 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 7893ad3..134e1f8 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -36,21 +36,13 @@
 void __init corenet_ds_pic_init(void)
 {
struct mpic *mpic;
-   struct device_node *np = NULL;
unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
 
-   np = of_find_node_by_type(np, open-pic);
-
-   if (np == NULL) {
-   printk(KERN_ERR Could not find open-pic node\n);
-   return;
-   }
-
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;
 
-   mpic = mpic_alloc(np, 0, flags, 0, 256,  OpenPIC  );
+   mpic = mpic_alloc(NULL, 0, flags, 0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
 
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c 
b/arch/powerpc/platforms/85xx/ksi8560.c
index b20c07d..d49dbc4 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -68,24 +68,15 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc 
*desc)
 static void __init ksi8560_pic_init(void)
 {
struct mpic *mpic;
-   struct device_node *np;
 #ifdef CONFIG_CPM2
+   struct device_node *np;
int irq;
 #endif
 
-   np = of_find_node_by_type(NULL, open-pic);
-
-   if (np == NULL) {
-   printk(KERN_ERR Could not find open-pic node\n);
-   return;
-   }
-
-   mpic = mpic_alloc(np, 0,
+   mpic = mpic_alloc(NULL, 0,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
-   of_node_put(np);
-
mpic_init(mpic);
 
 #ifdef CONFIG_CPM2
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c 
b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 03173ba..2c928f0 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -34,22 +34,11 @@
 
 void __init mpc8536_ds_pic_init(void)
 {
-   struct mpic *mpic;
-   struct device_node *np;
-
-   np = of_find_node_by_type(NULL, open-pic);
-   if (np == NULL) {
-   printk(KERN_ERR Could not find open-pic node\n);
-   return;
-   }
-
-   mpic = mpic_alloc(np, 0,
+   struct mpic *mpic = mpic_alloc(NULL, 0,
  MPIC_PRIMARY | MPIC_WANTS_RESET |
  MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
-   of_node_put(np);
-
mpic_init(mpic);
 }
 
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c 
b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 5cb797b..2b443ba 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -64,23 +64,15 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc 
*desc)
 static void __init mpc85xx_ads_pic_init(void)
 {
struct mpic *mpic;
-   struct device_node *np = NULL;
 #ifdef CONFIG_CPM2
+   struct

[RFC PATCH 06/10] powerpc/mpic: Invert the meaning of MPIC_PRIMARY

2011-10-31 Thread Kyle Moffett
It turns out that there are only 2 in-tree platforms which use MPICs
which are not primary:  IBM Cell and PowerMac.  To reduce the
complexity of the typical board setup code, invert the MPIC_PRIMARY bit
into MPIC_SECONDARY.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/mpic.h   |8 
 arch/powerpc/platforms/44x/iss4xx.c   |2 +-
 arch/powerpc/platforms/85xx/corenet_ds.c  |2 +-
 arch/powerpc/platforms/85xx/ksi8560.c |2 +-
 arch/powerpc/platforms/85xx/mpc8536_ds.c  |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_ads.c |3 +--
 arch/powerpc/platforms/85xx/mpc85xx_cds.c |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_ds.c  |3 +--
 arch/powerpc/platforms/85xx/mpc85xx_mds.c |2 +-
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |3 +--
 arch/powerpc/platforms/85xx/p1010rdb.c|2 +-
 arch/powerpc/platforms/85xx/p1022_ds.c|2 +-
 arch/powerpc/platforms/85xx/p1023_rds.c   |2 +-
 arch/powerpc/platforms/85xx/sbc8548.c |2 +-
 arch/powerpc/platforms/85xx/sbc8560.c |2 +-
 arch/powerpc/platforms/85xx/socrates.c|2 +-
 arch/powerpc/platforms/85xx/stx_gp3.c |2 +-
 arch/powerpc/platforms/85xx/tqm85xx.c |2 +-
 arch/powerpc/platforms/85xx/xes_mpc85xx.c |2 +-
 arch/powerpc/platforms/86xx/pic.c |2 +-
 arch/powerpc/platforms/cell/setup.c   |2 +-
 arch/powerpc/platforms/chrp/setup.c   |3 +--
 arch/powerpc/platforms/embedded6xx/holly.c|2 +-
 arch/powerpc/platforms/embedded6xx/linkstation.c  |2 +-
 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c |2 +-
 arch/powerpc/platforms/embedded6xx/storcenter.c   |2 +-
 arch/powerpc/platforms/maple/setup.c  |2 +-
 arch/powerpc/platforms/pasemi/setup.c |2 +-
 arch/powerpc/platforms/powermac/pic.c |2 +-
 arch/powerpc/platforms/pseries/setup.c|3 +--
 arch/powerpc/sysdev/mpic.c|   14 +++---
 31 files changed, 40 insertions(+), 45 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 49bab41..a241076 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -336,11 +336,11 @@ struct mpic
  * Note setting any ID (leaving those bits to 0) means standard MPIC
  */
 
-/* This is the primary controller, only that one has IPIs and
- * has afinity control. A non-primary MPIC always uses CPU0
- * registers only
+/*
+ * This is a secondary (chained) controller; it only uses the CPU0
+ * registers.  Primary controllers have IPIs and affinity control.
  */
-#define MPIC_PRIMARY   0x0001
+#define MPIC_SECONDARY 0x0001
 
 /* Set this for a big-endian MPIC */
 #define MPIC_BIG_ENDIAN0x0002
diff --git a/arch/powerpc/platforms/44x/iss4xx.c 
b/arch/powerpc/platforms/44x/iss4xx.c
index 19395f1..5b8cdbb 100644
--- a/arch/powerpc/platforms/44x/iss4xx.c
+++ b/arch/powerpc/platforms/44x/iss4xx.c
@@ -71,7 +71,7 @@ static void __init iss4xx_init_irq(void)
/* The MPIC driver will get everything it needs from the
 * device-tree, just pass 0 to all arguments
 */
-   struct mpic *mpic = mpic_alloc(np, 0, MPIC_PRIMARY, 0, 0,
+   struct mpic *mpic = mpic_alloc(np, 0, 0, 0, 0,
MPIC );
BUG_ON(mpic == NULL);
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c 
b/arch/powerpc/platforms/85xx/corenet_ds.c
index 134e1f8..7b737a9 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -36,7 +36,7 @@
 void __init corenet_ds_pic_init(void)
 {
struct mpic *mpic;
-   unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
+   unsigned int flags = MPIC_BIG_ENDIAN |
MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
 
if (ppc_md.get_irq == mpic_get_coreint_irq)
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c 
b/arch/powerpc/platforms/85xx/ksi8560.c
index d49dbc4..278962b 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -74,7 +74,7 @@ static void __init ksi8560_pic_init(void)
 #endif
 
mpic = mpic_alloc(NULL, 0,
-   MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+   MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
0, 256,  OpenPIC  );
BUG_ON(mpic == NULL);
mpic_init(mpic);
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c 
b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 2c928f0..d1aece5 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c

[RFC PATCH 07/10] powerpc/mpic: Don't open-code dcr_resource_start

2011-10-31 Thread Kyle Moffett
Don't open-code the OpenFirmware dcr-reg property lookup trying to map
DCR resources.  This makes the code a bit easier to read.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/sysdev/mpic.c |7 ++-
 1 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 31a9ada..0342ab8 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -319,11 +319,8 @@ static void _mpic_map_dcr(struct mpic *mpic, struct 
device_node *node,
  struct mpic_reg_bank *rb,
  unsigned int offset, unsigned int size)
 {
-   const u32 *dbasep;
-
-   dbasep = of_get_property(node, dcr-reg, NULL);
-
-   rb-dhost = dcr_map(node, *dbasep + offset, size);
+   phys_addr_t phys_addr = dcr_resource_start(node);
+   rb-dhost = dcr_map(mpic-node, phys_addr + offset, size);
BUG_ON(!DCR_MAP_OK(rb-dhost));
 }
 
-- 
1.7.2.5

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[RFC PATCH 08/10] powerpc/mpic: Put pic-no-reset test back into the MPIC code

2011-10-31 Thread Kyle Moffett
There's not really any reason to have this one-liner in a separate
static inline function, given that all the other similar tests are
already in the alloc_mpic() code.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/sysdev/mpic.c |7 +--
 1 files changed, 1 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 0342ab8..8b4f022 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1120,11 +1120,6 @@ static struct irq_host_ops mpic_host_ops = {
.xlate = mpic_host_xlate,
 };
 
-static int mpic_reset_prohibited(struct device_node *node)
-{
-   return node  of_get_property(node, pic-no-reset, NULL);
-}
-
 /*
  * Exported functions
  */
@@ -1269,7 +1264,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
/* When using a device-node, reset requests are only honored if the MPIC
 * is allowed to reset.
 */
-   if (mpic_reset_prohibited(node))
+   if (of_get_property(node, pic-no-reset, NULL))
mpic-flags |= MPIC_NO_RESET;
 
if ((flags  MPIC_WANTS_RESET)  !(mpic-flags  MPIC_NO_RESET)) {
-- 
1.7.2.5

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[RFC PATCH 10/10] powerpc/mpic: Add in-core support for cascaded MPICs

2011-10-31 Thread Kyle Moffett
The Cell and PowerMac platforms use virtually identical cascaded-IRQ
setup code, so just merge it into the core.  This does the obvious thing
when an MPIC device-node specifies an interrupts property.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/cell/setup.c   |   22 
 arch/powerpc/platforms/powermac/pic.c |   36 
 arch/powerpc/sysdev/mpic.c|   27 ++-
 3 files changed, 30 insertions(+), 55 deletions(-)

diff --git a/arch/powerpc/platforms/cell/setup.c 
b/arch/powerpc/platforms/cell/setup.c
index 392cbdb..8708a71 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -183,19 +183,6 @@ static int __init cell_publish_devices(void)
 }
 machine_subsys_initcall(cell, cell_publish_devices);
 
-static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
-{
-   struct irq_chip *chip = irq_desc_get_chip(desc);
-   struct mpic *mpic = irq_desc_get_handler_data(desc);
-   unsigned int virq;
-
-   virq = mpic_get_one_irq(mpic);
-   if (virq != NO_IRQ)
-   generic_handle_irq(virq);
-
-   chip-irq_eoi(desc-irq_data);
-}
-
 static void __init mpic_init_IRQ(void)
 {
struct device_node *dn;
@@ -214,15 +201,6 @@ static void __init mpic_init_IRQ(void)
if (mpic == NULL)
continue;
mpic_init(mpic);
-
-   virq = irq_of_parse_and_map(dn, 0);
-   if (virq == NO_IRQ)
-   continue;
-
-   printk(KERN_INFO %s : hooking up to IRQ %d\n,
-  dn-full_name, virq);
-   irq_set_handler_data(virq, mpic);
-   irq_set_chained_handler(virq, cell_mpic_cascade);
}
 }
 
diff --git a/arch/powerpc/platforms/powermac/pic.c 
b/arch/powerpc/platforms/powermac/pic.c
index f4dc247..e02cd79 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -466,18 +466,6 @@ int of_irq_map_oldworld(struct device_node *device, int 
index,
 }
 #endif /* CONFIG_PPC32 */
 
-static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc)
-{
-   struct irq_chip *chip = irq_desc_get_chip(desc);
-   struct mpic *mpic = irq_desc_get_handler_data(desc);
-   unsigned int cascade_irq = mpic_get_one_irq(mpic);
-
-   if (cascade_irq != NO_IRQ)
-   generic_handle_irq(cascade_irq);
-
-   chip-irq_eoi(desc-irq_data);
-}
-
 static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic)
 {
 #if defined(CONFIG_XMON)  defined(CONFIG_PPC32)
@@ -529,7 +517,6 @@ static int __init pmac_pic_probe_mpic(void)
 {
struct mpic *mpic1, *mpic2;
struct device_node *np, *master = NULL, *slave = NULL;
-   unsigned int cascade;
 
/* We can have up to 2 MPICs cascaded */
for (np = NULL; (np = of_find_node_by_type(np, open-pic))
@@ -565,27 +552,14 @@ static int __init pmac_pic_probe_mpic(void)
 
of_node_put(master);
 
-   /* No slave, let's go out */
-   if (slave == NULL)
-   return 0;
-
-   /* Get/Map slave interrupt */
-   cascade = irq_of_parse_and_map(slave, 0);
-   if (cascade == NO_IRQ) {
-   printk(KERN_ERR Failed to map cascade IRQ\n);
-   return 0;
-   }
-
-   mpic2 = pmac_setup_one_mpic(slave, 0);
-   if (mpic2 == NULL) {
-   printk(KERN_ERR Failed to setup slave MPIC\n);
+   /* Set up a cascaded controller, if present */
+   if (slave) {
+   mpic2 = pmac_setup_one_mpic(slave, 0);
+   if (mpic2 == NULL)
+   printk(KERN_ERR Failed to setup slave MPIC\n);
of_node_put(slave);
-   return 0;
}
-   irq_set_handler_data(cascade, mpic2);
-   irq_set_chained_handler(cascade, pmac_u3_cascade);
 
-   of_node_put(slave);
return 0;
 }
 
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 1826dae..d5cf276 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1113,6 +1113,21 @@ static int mpic_host_xlate(struct irq_host *h, struct 
device_node *ct,
return 0;
 }
 
+/* IRQ handler for a secondary MPIC cascaded from another IRQ controller */
+static void mpic_cascade(unsigned int irq, struct irq_desc *desc)
+{
+   struct irq_chip *chip = irq_desc_get_chip(desc);
+   struct mpic *mpic = irq_desc_get_handler_data(desc);
+
+   BUG_ON(!(mpic-flags  MPIC_SECONDARY));
+
+   unsigned int virq = mpic_get_one_irq(mpic);
+   if (virq != NO_IRQ)
+   generic_handle_irq(virq);
+
+   chip-irq_eoi(desc-irq_data);
+}
+
 static struct irq_host_ops mpic_host_ops = {
.match = mpic_host_match,
.map = mpic_host_map,
@@ -1384,8 +1399,7 @@ void __init mpic_set_default_senses(struct mpic *mpic, u8 
*senses, int count)
 
 void __init mpic_init(struct mpic

[RFC PATCH 09/10] powerpc/mpic: Cache the device-tree node in struct mpic

2011-10-31 Thread Kyle Moffett
Store the node pointer in the MPIC during initialization so that all of
the later operational code can just reuse the cached pointer.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/include/asm/mpic.h |3 +++
 arch/powerpc/sysdev/mpic.c  |   32 
 2 files changed, 19 insertions(+), 16 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index a241076..db78b89 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -251,6 +251,9 @@ struct mpic_irq_save {
 /* The instance data of a given MPIC */
 struct mpic
 {
+   /* The OpenFirmware dt node for this MPIC */
+   struct device_node *node;
+
/* The remapper for this MPIC */
struct irq_host *irqhost;
 
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 8b4f022..1826dae 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -315,26 +315,25 @@ static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t 
phys_addr,
 }
 
 #ifdef CONFIG_PPC_DCR
-static void _mpic_map_dcr(struct mpic *mpic, struct device_node *node,
- struct mpic_reg_bank *rb,
+static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb,
  unsigned int offset, unsigned int size)
 {
-   phys_addr_t phys_addr = dcr_resource_start(node);
+   phys_addr_t phys_addr = dcr_resource_start(mpic-node);
rb-dhost = dcr_map(mpic-node, phys_addr + offset, size);
BUG_ON(!DCR_MAP_OK(rb-dhost));
 }
 
-static inline void mpic_map(struct mpic *mpic, struct device_node *node,
+static inline void mpic_map(struct mpic *mpic,
phys_addr_t phys_addr, struct mpic_reg_bank *rb,
unsigned int offset, unsigned int size)
 {
if (mpic-flags  MPIC_USES_DCR)
-   _mpic_map_dcr(mpic, node, rb, offset, size);
+   _mpic_map_dcr(mpic, rb, offset, size);
else
_mpic_map_mmio(mpic, phys_addr, rb, offset, size);
 }
 #else /* CONFIG_PPC_DCR */
-#define mpic_map(m,n,p,b,o,s)  _mpic_map_mmio(m,p,b,o,s)
+#define mpic_map(m,p,b,o,s)_mpic_map_mmio(m,p,b,o,s)
 #endif /* !CONFIG_PPC_DCR */
 
 
@@ -1178,6 +1177,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
return NULL;
 
mpic-name = name;
+   mpic-node = node;
mpic-paddr = phys_addr;
 
mpic-hc_irq = mpic_irq_chip;
@@ -1224,13 +1224,13 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
mpic-spurious_vec  = intvec_top;
 
/* Check for big-endian in device-tree */
-   if (of_get_property(node, big-endian, NULL) != NULL)
+   if (of_get_property(mpic-node, big-endian, NULL) != NULL)
mpic-flags |= MPIC_BIG_ENDIAN;
-   if (of_device_is_compatible(node, fsl,mpic))
+   if (of_device_is_compatible(mpic-node, fsl,mpic))
mpic-flags |= MPIC_FSL;
 
/* Look for protected sources */
-   psrc = of_get_property(node, protected-sources, psize);
+   psrc = of_get_property(mpic-node, protected-sources, psize);
if (psrc) {
/* Allocate a bitmap with one bit per interrupt */
unsigned int mapsize = BITS_TO_LONGS(intvec_top + 1);
@@ -1256,15 +1256,15 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
mpic-reg_type = mpic_access_mmio_le;
 
/* Map the global registers */
-   mpic_map(mpic, node, mpic-paddr, mpic-gregs, MPIC_INFO(GREG_BASE), 
0x1000);
-   mpic_map(mpic, node, mpic-paddr, mpic-tmregs, MPIC_INFO(TIMER_BASE), 
0x1000);
+   mpic_map(mpic, mpic-paddr, mpic-gregs, MPIC_INFO(GREG_BASE), 0x1000);
+   mpic_map(mpic, mpic-paddr, mpic-tmregs, MPIC_INFO(TIMER_BASE), 
0x1000);
 
/* Reset */
 
/* When using a device-node, reset requests are only honored if the MPIC
 * is allowed to reset.
 */
-   if (of_get_property(node, pic-no-reset, NULL))
+   if (of_get_property(mpic-node, pic-no-reset, NULL))
mpic-flags |= MPIC_NO_RESET;
 
if ((flags  MPIC_WANTS_RESET)  !(mpic-flags  MPIC_NO_RESET)) {
@@ -1306,7 +1306,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
 
/* Map the per-CPU registers */
for (i = 0; i  mpic-num_cpus; i++) {
-   mpic_map(mpic, node, mpic-paddr, mpic-cpuregs[i],
+   mpic_map(mpic, mpic-paddr, mpic-cpuregs[i],
 MPIC_INFO(CPU_BASE) + i * MPIC_INFO(CPU_STRIDE),
 0x1000);
}
@@ -1314,13 +1314,13 @@ struct mpic * __init mpic_alloc(struct device_node 
*node,
/* Initialize main ISU if none provided */
if (mpic-isu_size == 0) {
mpic-isu_size = mpic-num_sources;
-   mpic_map(mpic, node, mpic-paddr, mpic-isus[0],
+   mpic_map(mpic, mpic-paddr, mpic-isus[0

[RFC PATCH 13/17] mpc836x: Move board-specific bcm5481 fixup out of the PHY driver

2011-10-20 Thread Kyle Moffett
By comparing the BCM5481 registers modified in the -config_aneg()
method with the datasheet I have for the BCM5482, it appears that the
register writes are adjusting signal timing to work around a known
trace-length issue on the PCB.

Such hardware workarounds don't belong in the generic driver, and should
instead be placed in a board-specific PHY fixup.

NOTE: Needs testing by somebody with the hardware.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/platforms/83xx/mpc836x_rdk.c |   35 
 drivers/net/phy/broadcom.c|   36 -
 2 files changed, 35 insertions(+), 36 deletions(-)

diff --git a/arch/powerpc/platforms/83xx/mpc836x_rdk.c 
b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
index b0090aa..b7cc607 100644
--- a/arch/powerpc/platforms/83xx/mpc836x_rdk.c
+++ b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
@@ -14,6 +14,7 @@
 
 #include linux/kernel.h
 #include linux/pci.h
+#include linux/phy.h
 #include linux/of_platform.h
 #include linux/io.h
 #include asm/prom.h
@@ -38,6 +39,36 @@ static int __init 
mpc836x_rdk_declare_of_platform_devices(void)
 }
 machine_device_initcall(mpc836x_rdk, mpc836x_rdk_declare_of_platform_devices);
 
+static int mpc836x_rdk_bcm5481_fixup(struct phy_device *phydev)
+{
+   int reg;
+
+   if (phydev-interface != PHY_INTERFACE_MODE_RGMII_RXID)
+   return;
+
+   /*
+* There is no BCM5481 specification available, so down
+* here is everything we know about register 0x18. This
+* at least helps BCM5481 to successfuly receive packets
+* on MPC8360E-RDK board. Peter Barada pet...@logicpd.com
+* says: This sets delay between the RXD and RXC signals
+* instead of using trace lengths to achieve timing.
+*/
+
+   /* Set RDX clk delay. */
+   reg = 0x7 | (0x7  12);
+   phy_write(phydev, 0x18, reg);
+   reg = phy_read(phydev, 0x18);
+   if (reg  0)
+   return reg;
+
+   /* Set RDX-RXC skew. */
+   reg |= (1  8);
+   /* Write bits 14:0. */
+   reg |= (1  15);
+   return phy_write(phydev, 0x18, reg);
+}
+
 static void __init mpc836x_rdk_setup_arch(void)
 {
 #ifdef CONFIG_PCI
@@ -54,6 +85,10 @@ static void __init mpc836x_rdk_setup_arch(void)
 #ifdef CONFIG_QUICC_ENGINE
qe_reset();
 #endif
+#ifdef CONFIG_BROADCOM_PHY
+   phy_register_fixup_for_uid(0x0143bca0, 0xfff0,
+   mpc836x_rdk_bcm5481_phy_fixup);
+#endif
 }
 
 static void __init mpc836x_rdk_init_IRQ(void)
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index 1b83f75..8c03ebc 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -539,41 +539,6 @@ static int bcm54xx_config_intr(struct phy_device *phydev)
return err;
 }
 
-static int bcm5481_config_aneg(struct phy_device *phydev)
-{
-   int ret;
-
-   /* Aneg firsly. */
-   ret = genphy_config_aneg(phydev);
-
-   /* Then we can set up the delay. */
-   if (phydev-interface == PHY_INTERFACE_MODE_RGMII_RXID) {
-   u16 reg;
-
-   /*
-* There is no BCM5481 specification available, so down
-* here is everything we know about register 0x18. This
-* at least helps BCM5481 to successfuly receive packets
-* on MPC8360E-RDK board. Peter Barada pet...@logicpd.com
-* says: This sets delay between the RXD and RXC signals
-* instead of using trace lengths to achieve timing.
-*/
-
-   /* Set RDX clk delay. */
-   reg = 0x7 | (0x7  12);
-   phy_write(phydev, 0x18, reg);
-
-   reg = phy_read(phydev, 0x18);
-   /* Set RDX-RXC skew. */
-   reg |= (1  8);
-   /* Write bits 14:0. */
-   reg |= (1  15);
-   phy_write(phydev, 0x18, reg);
-   }
-
-   return ret;
-}
-
 static int brcm_phy_setbits(struct phy_device *phydev, int reg, int set)
 {
int val;
@@ -736,7 +701,6 @@ static struct phy_driver broadcom_drivers[] = { {
  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
.flags  = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
.config_init= bcm54xx_config_init,
-   .config_aneg= bcm5481_config_aneg,
.ack_interrupt  = bcm54xx_ack_interrupt,
.config_intr= bcm54xx_config_intr,
.driver = { .owner = THIS_MODULE },
-- 
1.7.2.5

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[RFC PATCH 17/17] phy_device: Rename phy_start_aneg() to phy_start_link()

2011-10-20 Thread Kyle Moffett
The name of the phy_start_aneg() function is very confusing, because
it also handles forced-mode (AUTONEG_DISABLE) links.

Rename the function to phy_start_link() and fix up all users.

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 Documentation/networking/phy.txt   |2 +-
 drivers/net/arm/ixp4xx_eth.c   |2 +-
 drivers/net/dnet.c |2 +-
 drivers/net/greth.c|2 +-
 drivers/net/lantiq_etop.c  |2 +-
 drivers/net/mv643xx_eth.c  |2 +-
 drivers/net/octeon/octeon_mgmt.c   |2 +-
 drivers/net/phy/phy.c  |   12 ++--
 drivers/net/pxa168_eth.c   |2 +-
 drivers/net/sh_eth.c   |2 +-
 drivers/net/smsc911x.c |2 +-
 drivers/net/smsc9420.c |2 +-
 drivers/net/stmmac/stmmac_ethtool.c|2 +-
 drivers/net/tg3.c  |8 
 drivers/net/ucc_geth_ethtool.c |2 +-
 drivers/staging/octeon/ethernet-mdio.c |4 ++--
 include/linux/phy.h|2 +-
 net/dsa/slave.c|2 +-
 18 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/Documentation/networking/phy.txt b/Documentation/networking/phy.txt
index 0db8c81..6f862e5 100644
--- a/Documentation/networking/phy.txt
+++ b/Documentation/networking/phy.txt
@@ -190,7 +190,7 @@ Doing it all yourself
driver if none was found during bus initialization.  Passes in
any phy-specific flags as needed.
 
- int phy_start_aneg(struct phy_device *phydev);
+ int phy_start_link(struct phy_device *phydev);

Using variables inside the phydev structure, either configures advertising
and resets autonegotiation, or disables autonegotiation, and configures
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index de51e84..8864be5 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -998,7 +998,7 @@ static int ixp4xx_set_settings(struct net_device *dev, 
struct ethtool_cmd *cmd)
 static int ixp4xx_nway_reset(struct net_device *dev)
 {
struct port *port = netdev_priv(dev);
-   return phy_start_aneg(port-phydev);
+   return phy_start_link(port-phydev);
 }
 
 static const struct ethtool_ops ixp4xx_ethtool_ops = {
diff --git a/drivers/net/dnet.c b/drivers/net/dnet.c
index c1063d1..edb4635 100644
--- a/drivers/net/dnet.c
+++ b/drivers/net/dnet.c
@@ -669,7 +669,7 @@ static int dnet_open(struct net_device *dev)
napi_enable(bp-napi);
dnet_init_hw(bp);
 
-   phy_start_aneg(bp-phy_dev);
+   phy_start_link(bp-phy_dev);
 
/* schedule a link state check */
phy_start(bp-phy_dev);
diff --git a/drivers/net/greth.c b/drivers/net/greth.c
index e7f268f..0ad3f14 100644
--- a/drivers/net/greth.c
+++ b/drivers/net/greth.c
@@ -1363,7 +1363,7 @@ static int greth_mdio_init(struct greth_private *greth)
 
/* If Ethernet debug link is used make autoneg happen right away */
if (greth-edcl  greth_edcl == 1) {
-   phy_start_aneg(greth-phy);
+   phy_start_link(greth-phy);
timeout = jiffies + 6*HZ;
while (!phy_aneg_done(greth-phy)  time_before(jiffies, 
timeout)) {
}
diff --git a/drivers/net/lantiq_etop.c b/drivers/net/lantiq_etop.c
index 45f252b..c8795aa 100644
--- a/drivers/net/lantiq_etop.c
+++ b/drivers/net/lantiq_etop.c
@@ -326,7 +326,7 @@ ltq_etop_nway_reset(struct net_device *dev)
 {
struct ltq_etop_priv *priv = netdev_priv(dev);
 
-   return phy_start_aneg(priv-phydev);
+   return phy_start_link(priv-phydev);
 }
 
 static const struct ethtool_ops ltq_etop_ethtool_ops = {
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index d3e223c..0ce514c 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -2775,7 +2775,7 @@ static void phy_init(struct mv643xx_eth_private *mp, int 
speed, int duplex)
phy-speed = speed;
phy-duplex = duplex;
}
-   phy_start_aneg(phy);
+   phy_start_link(phy);
 }
 
 static void init_pscr(struct mv643xx_eth_private *mp, int speed, int duplex)
diff --git a/drivers/net/octeon/octeon_mgmt.c b/drivers/net/octeon/octeon_mgmt.c
index 429e08c..fcdf28a 100644
--- a/drivers/net/octeon/octeon_mgmt.c
+++ b/drivers/net/octeon/octeon_mgmt.c
@@ -686,7 +686,7 @@ static int octeon_mgmt_init_phy(struct net_device *netdev)
return -1;
}
 
-   phy_start_aneg(p-phydev);
+   phy_start_link(p-phydev);
 
return 0;
 }
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 5f72055..fc486fe 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -232,7 +232,7 @@ static void phy_sanitize_settings(struct phy_device *phydev)
  * A few notes about parameter checking:
  * - We don't set port or transceiver, so we don't care what they
  *   were set to.
- * - phy_start_aneg

Re: RFC: x86: kill binutils 2.16.x?

2011-03-08 Thread Kyle Moffett
On Thu, Mar 3, 2011 at 03:30, Ingo Molnar mi...@elte.hu wrote:
 This is how specific GAS functionality is tested in arch/powerpc:

        @if ! /bin/echo dssall | $(AS) -many -o $(TOUT) /dev/null 21 ; then 
 \
                echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build 
 ' ; \
                echo 'correctly with old versions of binutils.' ; \
                echo '*** Please upgrade your binutils to 2.12.1 or newer' ; \
                false ; \
        fi

 This would also be a 'constructive' (and safest) way of blacklisting 
 binutils: we'd
 really only exclude binutils that is truly buggy.

Hrm... well... actually...

It's funny that you brought up this particular case.  While I agree
that it's good in general, it's causing problems for me building a
kernel using a recent e500 gcc/binutils (triplet
powerpc-linux-gnuspe).

Specifically the e500 doesn't have a normal PowerPC FPU, it has a
custom FPU built using extended integer registers instead, and it
happens to borrow the AltiVec opcode range to do it.

When trying to port Debian to the platform we were getting SIGILL's
all over the place until binutils got updated to reject all of the
unsupported opcodes on this particular platform.  Now of course we get
build errors, but that's a lot easier to debug and fix. :-D

Basically, binutils no longer supports -many (because too many
opcodes conflict), and the test itself would fail anyways (because
dssall is not valid on any PowerPC).

So while I think that it is entirely reasonable to add a similar test
for buggy x86 binutils, I'm actually about to send a patch to remove
that particular check from the powerpc Makefile.  Since the required
binutils 2.12.1 was released in May 2002 (almost 9 years ago) it's
probably not even worth testing for anymore.

Cheers,
Kyle Moffett
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Re: RFC: x86: kill binutils 2.16.x?

2011-03-08 Thread Kyle Moffett
On Tue, Mar 8, 2011 at 16:28, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
 On Tue, 2011-03-08 at 14:57 -0500, Kyle Moffett wrote:
 Specifically the e500 doesn't have a normal PowerPC FPU, it has a
 custom FPU built using extended integer registers instead, and it
 happens to borrow the AltiVec opcode range to do it.

 When trying to port Debian to the platform we were getting SIGILL's
 all over the place until binutils got updated to reject all of the
 unsupported opcodes on this particular platform.  Now of course we get
 build errors, but that's a lot easier to debug and fix. :-D

 Basically, binutils no longer supports -many (because too many
 opcodes conflict), and the test itself would fail anyways (because
 dssall is not valid on any PowerPC).

 Note that this freescale SPE fiasco is just that ... a fiasco :-) I
 don't think there's that many cases of opcode overlap outside of it.

I absolutely agree on the fiasco part, although I'm pretty sure that
there's a large number of incompatible ARM variants (even 16-bit vs.
32-bit opcodes).  Unfortunately there's a lot of shipped hardware to
be supported and maintained...


 Now regarding the kernel, the best is probably for nasty cases like that
 to use hand coded opcodes (see ppc-opcodes.h) and stick to a more
 generic setting for binutils, since it should be possible to build
 kernels that support multiple types of BookE CPUs with different
 floating point units.

The problem is not with the kernel compile itself, but with the 2.12
dssall binutils test.  Basically, recent binutils treats e500 as
effectively a separate architecture that happens to share *most* of
the opcodes with regular PowerPC.  Any opcode which is not understood
by the e500 chip is either convert to an equivalent opcode which is
understood (IE: lwsync = sync), or failed with an error.  This means
that the kernel compile aborts early telling me to upgrade to a newer
version of binutils.

This was *critical* for getting an actual Debian distribution
bootstrapped on the e500 cores, because so much software assumes
PowerPC == altivec (ffmpeg), hardcodes 'asm(lwsync)' for memory
barriers (80+ packages in Debian), or includes hand-coded
floating-point ASM instructions (libffi).  Noisy build errors are
better than silent runtime failures any day of the week.

At the very least that test needs to be turned off if
CONFIG_ALTIVEC=n, because the kernel builds and runs fine otherwise.

Cheers,
Kyle Moffett
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Re: RFC: x86: kill binutils 2.16.x?

2011-03-08 Thread Kyle Moffett
On Tue, Mar 8, 2011 at 18:13, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
 On Tue, 2011-03-08 at 16:59 -0500, Kyle Moffett wrote:

 The problem is not with the kernel compile itself, but with the 2.12
 dssall binutils test.  Basically, recent binutils treats e500 as
 effectively a separate architecture that happens to share *most* of
 the opcodes with regular PowerPC.

 This is bogus. Newer e500 don't have that SPE crap afaik and BookI and
 II of the architecture have been converged. In fact, Scott, don't newer
 FSL chips also support real lwsync ?

When I'm talking about e500 I'm specifically referring to the SPE
stuff.  The e500mc cores are a whole different beast with a regular
FPU, but those have their own Kconfig option: PPC_E500MC.

Actually, looking at it again, the PPC_E500MC depends on E500, it
should select PPC_FSL_BOOK3E instead.  There are probably bugs
lurking here.

There really is fundamentally no good way to build a single system
image that supports both E500 (spe-based) and E500MC (classic FPU).
You can sort-of run classic FPU emulation on the E500, but the
performance is terrifyingly bad.

The naming confusion really is really bad too, IMO.

  Any opcode which is not understood
 by the e500 chip is either convert to an equivalent opcode which is
 understood (IE: lwsync = sync), or failed with an error.  This means
 that the kernel compile aborts early telling me to upgrade to a newer
 version of binutils.

 This is more bogosity in binutils. lwsync is designed to fallback as
 sync if not supported in -HW-, binutils shouldn't silently swallow it.

 Or is it that FSL failed on the original e500 and make lwsync actually
 trap ?

Yeah... for some reason FreeScale made the lwsync operation trap on
e500 (again, only talking about e500 with SPE, not e500mc).

Unfortunately it's used frequently enough that there's a very
noticeable performance gain (~5% for some programs) by substituting it
in binutils, so that's what happens.


 This was *critical* for getting an actual Debian distribution
 bootstrapped on the e500 cores, because so much software assumes
 PowerPC == altivec (ffmpeg), hardcodes 'asm(lwsync)' for memory
 barriers (80+ packages in Debian), or includes hand-coded
 floating-point ASM instructions (libffi).  Noisy build errors are
 better than silent runtime failures any day of the week.

 At the very least that test needs to be turned off if
 CONFIG_ALTIVEC=n, because the kernel builds and runs fine otherwise.

 I think the right thing is to keep that as e500-legacy or something,
 because afaik, newer e500's don't have most of these issues and could be
 treated as normal powerpc again.

There is a separate -me500mc option for GAS that does the right
thing, but the kernel currently does not seem to use it.

arch/powerpc/Makefile has this:
cpu-as-$(CONFIG_4xx) += -Wa,-m405
cpu-as-$(CONFIG_6xx) += -Wa,-maltivec
cpu-as-$(CONFIG_POWER4) += -Wa,-maltivec
cpu-as-$(CONFIG_E500) += -Wa,-me500
cpu-as-$(CONFIG_E200) += -Wa,-me200

As it is, I strongly suspect that the kernel is broken for
CONFIG_E500MC with current development releases of binutils.

The real solution is that e500 needs to be treated as an almost
entirely different architecture from all other powerpc (including
e500mc).  Userspace is only ABI-compatible if you use -msoft-float
on both sides.

I've been dealing with it for a while now, it really is a fiasco all around...

After a month of wrestling with the official Debian powerpc port we
gave up and created a new port powerpcspe specifically for the
e500 SPE-based chips.  Then we tripped over 3 relatively major GCC
bugs which had been lurking since e500 support was initially added.

See http://wiki.debian.org/PowerPCSPEPort for a very out-of-date
status on that whole thing.

Cheers,
Kyle Moffett
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powerpc/e500: binutils tests [Was: RFC: x86: kill binutils 2.16.x?]

2011-03-08 Thread Kyle Moffett
On Tue, Mar 8, 2011 at 23:39, Segher Boessenkool
seg...@kernel.crashing.org wrote:
 The problem is not with the kernel compile itself, but with the 2.12
 dssall binutils test.  Basically, recent binutils treats e500 as
 effectively a separate architecture that happens to share *most* of
 the opcodes with regular PowerPC.  Any opcode which is not understood
 by the e500 chip is either convert to an equivalent opcode which is
 understood (IE: lwsync = sync), or failed with an error.  This means
 that the kernel compile aborts early telling me to upgrade to a newer
 version of binutils.

 $ echo dssall | powerpc-linux-as -many -me500
 $ powerpc-linux-objdump -d a.out | grep 0:
   0:   7e 00 06 6c     dssall
 $ powerpc-linux-as --version | head -1
 GNU assembler (GNU Binutils) 2.21.51.20110309

 What version of binutils does not work?  (I also checked with
 -me500x2, -me500mc, -mspe, and various combinations.  lwsync
 is indeed converted to a regular sync (well, msync) for e500
 and e500x2).

Hmm, something's fishy here.

Just going based on this changeset, the floating point and AltiVec
opcodes are *supposed* to generate hard errors:
  http://sourceware.org/ml/binutils-cvs/2010-06/msg00070.html

Oh... that patch only disables the opcodes if -many is not specified.

Aha! The native compiler on my Debian e500 boxes right now is hidden
behind a small wrapper script which removes -many and -Wa,-many
and generates errors for anything else that isn't -me500.  My GCC
also excludes the -many option when calling the linker directly.

So I think this is only a local problem right now, actually, sorry
for the noise and confusion.  If I log into that system and run echo
dssall | as, I get the expected hard error, and due to the wrapper
scripts in place I get the same error from echo dssall | as -me500x2
-many

Unfortunately I still need to have the assembler generate hard errors
when someone tries to natively compile code with AltiVec or
classic-FPU instructions, otherwise I have no way of detecting
unported software at build-time.

Would a patch to make the Altivec dssall test conditional on
CONFIG_ALTIVEC be acceptable?  That really is the only test that
causes the kernel compile to fail with the strict wrappers.

Cheers,
Kyle Moffett
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Re: [PATCH 1/5] scripts: dtc: Merge in changes from the dtc repository

2010-11-16 Thread Kyle Moffett
On Tue, Nov 16, 2010 at 15:49, John Bonesio bo...@secretlab.ca wrote:
 Pull in recent changes from the main dtc repository. These changes primarily
 allow multiple device trees to be declared which are merged by dtc. This
 feature allows us to include a basic dts file and then provide more 
 information
 for the specific system through the merging functionality.

Hmm, is there some documentation for how to use this feature?
Specifically I have a custom board with multiple discrete computers on
it which are only very slightly physically different from each other
and I'd like to be able to avoid maintaining 2 nearly-exact copies of
the same DTS file.

Cheers,
Kyle Moffett
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[PATCH] powerpc/kvm/e500_tlb: Fix a minor copy-paste tracing bug

2010-08-30 Thread Kyle Moffett
The kvmppc_e500_stlbe_invalidate() function was trying to pass too many
parameters to trace_kvm_stlb_inval().  This appears to be a bad
copy-paste from a call to trace_kvm_stlb_write().

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com

---
Alex,

This is the rebased patch to re-enable the tracepoint.

I also pushed a tree with this patch on top of kvm-ppc-next out to:
  git://opensource.exmeritus.com/hww-1u-1a/linux.git kvm-ppc-patches
  http://opensource.exmeritus.com/git/hww-1u-1a/linux.git/kvm-ppc-patches

Thanks again!

Cheers,
Kyle Moffett

---
 arch/powerpc/kvm/e500_tlb.c |6 +-
 1 files changed, 1 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
index 66845a5..a413883 100644
--- a/arch/powerpc/kvm/e500_tlb.c
+++ b/arch/powerpc/kvm/e500_tlb.c
@@ -226,11 +226,7 @@ static void kvmppc_e500_stlbe_invalidate(struct 
kvmppc_vcpu_e500 *vcpu_e500,
 
kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel);
stlbe-mas1 = 0;
-   /* XXX doesn't compile */
-#if 0
-   trace_kvm_stlb_inval(index_of(tlbsel, esel), stlbe-mas1, stlbe-mas2,
-stlbe-mas3, stlbe-mas7);
-#endif
+   trace_kvm_stlb_inval(index_of(tlbsel, esel));
 }
 
 static void kvmppc_e500_tlb1_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
-- 
1.7.1

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[PATCH] powerpc/kvm/e500_tlb: Fix a minor copy-paste tracing bug

2010-08-27 Thread Kyle Moffett
The kvmppc_e500_stlbe_invalidate() function was trying to pass too many
parameters to trace_kvm_stlb_inval().  This appears to be a bad
copy-paste from a call to trace_kvm_stlb_write().

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
 arch/powerpc/kvm/e500_tlb.c |3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
index 21011e1..1261a21 100644
--- a/arch/powerpc/kvm/e500_tlb.c
+++ b/arch/powerpc/kvm/e500_tlb.c
@@ -226,8 +226,7 @@ static void kvmppc_e500_stlbe_invalidate(struct 
kvmppc_vcpu_e500 *vcpu_e500,
 
kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel);
stlbe-mas1 = 0;
-   trace_kvm_stlb_inval(index_of(tlbsel, esel), stlbe-mas1, stlbe-mas2,
-stlbe-mas3, stlbe-mas7);
+   trace_kvm_stlb_inval(index_of(tlbsel, esel));
 }
 
 static void kvmppc_e500_tlb1_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
-- 
1.7.1

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Re: [PATCH] powerpc/kvm/e500_tlb: Fix a minor copy-paste tracing bug

2010-08-27 Thread Kyle Moffett
On Fri, Aug 27, 2010 at 20:58, Alexander Graf ag...@suse.de wrote:
 On 27.08.2010, at 21:06, Kyle Moffett wrote:
 The kvmppc_e500_stlbe_invalidate() function was trying to pass too many
 parameters to trace_kvm_stlb_inval().  This appears to be a bad
 copy-paste from a call to trace_kvm_stlb_write().

 Which kernel is this against? That trace point is already commented out in my 
 tree.

Oh, hm, I guess I haven't rebased this patch since 2.6.35-ish.  The
trace point seems to work correctly with the fixed arguments; if
you'll tell me which tree I should base it on I can easily resubmit.

Cheers,
Kyle Moffett
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Re: of-flash: Unable to ioremap() both 128MB NOR flashes on 32-bit system with 2GB+ RAM

2010-06-24 Thread Kyle Moffett
Oops... put the old linuxppc list on the CC, sorry!

On Thu, Jun 24, 2010 at 23:45, Kyle Moffett k...@moffetthome.net wrote:
 Hello,

 I've got a new P2020 (32bit mpc85xx family) board I'm working on a
 port for that includes 2 NOR flashes (128MB each) and a removable
 SO-RDIMM of 2GB or 4GB.  Unfortunately when I configure both flashes
 in the device-tree off my elbc, Linux is completely unable to access
 the second one because it attempts to ioremap() the entire virtual
 address space of both FLASH chips.

 Even with only one flash chip enabled, there's a bit of a noticeable
 performance degradation because the mapping consumes almost all of my
 available vmalloc space and forces bounce-buffering for all my
 HIGHMEM.

 It looks like the of-flash driver currently requires that the whole
 chip be mapped in the kernel at once.  I would much rather have a 50%
 performance penalty on flash accesses (which are already very slow)
 and regain most of the vmap space.

 So the question is, is there a way to convince the MTD layer to
 iomap() only what it needs to access to do reads and writes?  If not,
 what changes would need to be made to MTD and/or of-flash to create
 such functionality?

 Cheers,
 Kyle Moffett

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Re: New P2020-based board (mpc85xx) gets Processor 1 is stuck on 2.6.34, not on 2.6.32

2010-06-24 Thread Kyle Moffett
Oops, put the old linuxppc list on the CC, sorry!

On Thu, Jun 24, 2010 at 23:32, Kyle Moffett k...@moffetthome.net wrote:
 Hello,

 I'm working on a new board port for a P2020-based board, and I'm
 having problems with my second core not starting up on 2.6.34, even
 though it starts up fine on 2.6.32.

 In adding various debugs to mpc85xx_kick_cpu(), it looks like the
 virtual address is detected as 0x7280 on both, and it seems to
 ioremap it to the same address.  Furthermore, both of them get the
 ack from the other CPU almost immediately (within 1ms).
 Unfortunately, after that the second core fails to rendezvous
 elsewhere in the SMP code and as a result I get Processor 1 is
 stuck.

 Unfortunately I've had no luck looking through git log
 v2.6.32..v2.6.34 -- arch/powerpc/ by hand, and there are enough
 mechanical merge conflicts with my patchset to make bisection very
 painful (IE: git bisect, git cherry-pick, test, git reset --hard
 HEAD^, repeat)

 Any additional suggestions on where to look would be much appreciated.

 Cheers,
 Kyle Moffett

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Re: Porting the ibm_newemac driver to use phylib (and other PHY/MAC questions)

2009-05-02 Thread Kyle Moffett
On Thu, Apr 30, 2009 at 6:21 PM, Kyle Moffett k...@moffetthome.net wrote:
 I'm also curious about the intent of the mdio_instance pointer (IE:
 the mdio-device property).  Is that used when all the PHY devices
 are attached to the MDIO bus of only one of the (multiple) emac
 devices?

 It's common especially on older SoCs using EMAC to have only one of
 the EMAC instance with an MDIO bus for configuring the PHYs. This is one
 of the reasons why I have the mutex in the low level MDIO access
 routines since 2 EMACs can try to talk to the same MDIO, and this is the
 problem I had with phylib back then which was doing everything in atomic
 contexts.

 Ok, good, the current mdiobus code seems to make handling this a good
 deal easier.

Ok, I've dug through the docs on the 460EPx (the CPU I'm using), and
I'd like some confirmation of the following:

*  The EMAC hardware itself internally has its own dedicated
MDIO/MDClk lines, driven by the STACR register.

*  On many/most cpus, there is only a single set of external
MDIO/MDClk pins, driven either off the ZMII bridge or the RGMII
bridge.

*  Both bridge-types have their own internal register for switching
the external MDIO/MDClk pins between the two sets of internal
EMAC=bridge links.

*  Some SoCs have both an ZMII and an RGMII bridge, and the external
MDIO/MDClk pins are only connected to one of the two bridges (How do I
know which one?  Alternatively, do I just program both and hope for
the best?).

*  Some older SoCs simply export the MDIO/MDClk pins from one of their
internal EMAC chips and don't bother with running it through the
multiplexing bridge.

Are there any SoCs which actually export the MDIO/MDClk pins from
both/all of their EMACs?

Cheers,
Kyle Moffett
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Re: Porting the ibm_newemac driver to use phylib (and other PHY/MAC questions)

2009-04-30 Thread Kyle Moffett
On Wed, Apr 22, 2009 at 4:21 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
 On Mon, 2009-04-20 at 20:10 -0400, Kyle Moffett wrote:
  IIRC, Ben had some issues with how phylib and the EMAC would need to
  interact.  Not sure if he has those written down somewhere or not.
  (CC'd).

 Hmm, yeah, I'd be interested to see those.  There's enough similar
 between phylib and the EMAC and sungem drivers that I'm considering a
 series of somewhat-mechanical patches to make EMAC and sungem use the
 struct phy_device and struct mii_bus from phylib, possibly
 abstracting out some helper functions along the way.

 Yup, emac and sungem predate phylib.

 I had a quick look at what it would take to port at least emac over, the
 main issue was that I want to be able to sleep (ie, take a mutex) in my
 mdio read/write functions, and back then, phylib wouldn't let me do that
 due to spinlock and timer/softirq usage.

Ok, I've made some progress in the port, but right now I'm trying to
puzzle out what the gpcs bits in the code are.  From the few
publicly available docs and some mailing list posts, the gpcs address
appears to be some kind of integrated virtual PHY used when 460GT-ish
chips are communicating via an SGMII bus.  My current plan of action
is to separate the gpcs out into a separate PHY device controlled by
the emac code.

I'm also curious about the intent of the mdio_instance pointer (IE:
the mdio-device property).  Is that used when all the PHY devices
are attached to the MDIO bus of only one of the (multiple) emac
devices?  Or is that for when two emac chipsets are connected to the
same MDIO bus wire?  (or both?)  What keeps the emac_instance pointed
to by the mdio_instance from going away while the other emac chipset
is using it?

In either case, I plan to have the device actually holding the MDIO
bus run the mdiobus_alloc() and mdiobus_register() functions, then the
other emac instance will simply take a reference to that MDIO bus
(which would also pin down the emac instance that owns it).

Cheers,
Kyle Moffett
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Re: Porting the ibm_newemac driver to use phylib (and other PHY/MAC questions)

2009-04-30 Thread Kyle Moffett
On Thu, Apr 30, 2009 at 11:11 AM, Grant Likely
grant.lik...@secretlab.ca wrote:
 Just a heads up Kyle; there are changes queued in the netdev tree
 which add OF helpers for MDIO bus drivers and MAC drivers.  See here:

 http://git.kernel.org/?p=linux/kernel/git/davem/net-next-2.6.git;a=commit;h=8bc487d150b939e69830c39322df4ee486efe381

 and here is an example of a driver change:

 http://git.kernel.org/?p=linux/kernel/git/davem/net-next-2.6.git;a=commit;h=1dd2d06c0459a2f1bffc56765e3cc57427818867

Hmm, very interesting!  Thanks!  Although I'm not sure that those OF
helpers are entirely usable for the emac driver at the moment, as the
device trees for the existing boards simply don't have PHYs present in
them.  Most of the ibm_newemac board device-trees just have one of:
phy-address = 4, phy-mask = 0x, or nothing at all (for
autodetection).  I will probably need to leave in support for the old
PHY mask parsing to preserve backwards compatibility.

My main concern at the moment is cleaning up the driver's general PHY
handling.  I got started on this whole mess when I was trying to write
some hackish PHY drivers for a weird custom board I've got here.  I
couldn't figure out why the hell all my PHY register changes in the
phy_ops-init function kept getting cleared, until I noticed 2 things:
 The emac_reset_phy() function gets called occasionally and does not
call the -init() function again afterwards.  The
genmii_setup_forced() function (in the EMAC driver) unconditionally
ORs the BCMR_RESET flag into the MII_BCMR register.  Both of those
meant that any early setup I did for my PHY was getting completely
cleared on a regular basis, with no decent way for me to patch it back
up again.

Cheers,
Kyle Moffett
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Re: Porting the ibm_newemac driver to use phylib (and other PHY/MAC questions)

2009-04-30 Thread Kyle Moffett
On Thu, Apr 30, 2009 at 5:18 PM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
 Well... GPCS is indeed some kind of internal PHY if you like but it's
 not MDIO controlled and I don't really see a need to move it to the
 phylib as it's so specific to the NIC itself. But if you think it cleans
 the code up significantly... There are also some subtle differences in
 how the NIC is programmed when using GPCS vs. xMII

Ok, thanks, that's helpful information.  Mainly I was trying to puzzle
out why the driver sometimes resets the GPCS and other times resets
the real PHY.  It seems to be rather inconsistent when it resets
different devices.  For instance, one of the Marvell PHY's init()
helper resets the PHY, which was getting in the way of me ensuring
that the init() helpers are called after every PHY reset (because I
need to reinitialize the state that just got erased by the reset).

The challenge is working out which of the implicit ordering is
required for correct operation and which is simply an artifact of the
current implementation.


 I'm also curious about the intent of the mdio_instance pointer (IE:
 the mdio-device property).  Is that used when all the PHY devices
 are attached to the MDIO bus of only one of the (multiple) emac
 devices?

 It's common especially on older SoCs using EMAC to have only one of
 the EMAC instance with an MDIO bus for configuring the PHYs. This is one
 of the reasons why I have the mutex in the low level MDIO access
 routines since 2 EMACs can try to talk to the same MDIO, and this is the
 problem I had with phylib back then which was doing everything in atomic
 contexts.

Ok, good, the current mdiobus code seems to make handling this a good
deal easier.


 What keeps the emac_instance pointed
 to by the mdio_instance from going away while the other emac chipset
 is using it?

 Nothing other than those are all in a SoC and so generally don't do
 hotplug, but I suppose that with things like kvm which could potentially
 hotplug devices between partitions, one would have to get a bit more
 careful.

Yeah, I was experimenting with fiddling with the bind/unbind files in
sysfs and determined that the device-removal code is completely
broken.  As far as I can tell, any attempts to unregister one of the
emac devices cause an OOPS, even if it isn't used by another emac for
MDIO.  I may just start by nuking the broken device-removal code
entirely, and re-implement it properly once the rework is done.

Thanks for the info!

Cheers,
Kyle Moffett
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Re: Porting the ibm_newemac driver to use phylib (and other PHY/MAC questions)

2009-04-20 Thread Kyle Moffett
On Mon, Apr 20, 2009 at 8:29 AM, Josh Boyer jwbo...@linux.vnet.ibm.com wrote:
 On Fri, Apr 17, 2009 at 8:32 PM, Kyle Moffett k...@moffetthome.net wrote:
 Hello,

 I'm currently fiddling with a custom embedded prototype board using
 the ibm_newemac driver with some currently-unsupported PHYs.  Those
 PHYs *are* supported by phylib, but the emac driver seems to have its
 own PHY layer cribbed from the sungem driver.  I'm curious if there's
 some particular reason it hasn't been ported (aside from nobody has
 bothered yet).

 IIRC, Ben had some issues with how phylib and the EMAC would need to
 interact.  Not sure if he has those written down somewhere or not.
 (CC'd).

Hmm, yeah, I'd be interested to see those.  There's enough similar
between phylib and the EMAC and sungem drivers that I'm considering a
series of somewhat-mechanical patches to make EMAC and sungem use the
struct phy_device and struct mii_bus from phylib, possibly
abstracting out some helper functions along the way.

 Also, if I end up
 going that route, are there others available with other hardware
 variants who would be willing to test my patches on their boards?

 I have a large variety of boards that I can test with since the entire
 4xx line relies on this driver for on-board network.

Wonderful!  If/when I hack together a patch series I'll make sure to
put you on the CC list.  Thanks!

Cheers,
Kyle Moffett
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