RE: [PATCH 2/2] mtd/nand : workaround for Freescale FCM to supportlarge-page Nand chip

2011-06-28 Thread Mike Hench

Any boot ideas ?
Will the FCM load 2k and run it?

Thanks for any insight you might have.
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev


RE: NAND BBT corruption on MPC83xx

2011-06-18 Thread Mike Hench
Scott Wood wrote:
 As for the corruption, could it be degradation from repeated reads of
that
 one page?

Read Disturb. I Did not know SLC did that.
It just takes 10x as long as MLC, on the order of a million reads.
Supposedly erasing the block fixes it.
It is not a permanent damage thing.
I was seeing ~9 hours before failure with heavy writes.
~4GByte/hour = 2M pages, total ~18 million reads before errors in that
last block showed up.

Cool. Now we know.
Thanks.

Mike Hench


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev


[PATCH] mpc83xx SPI glitch

2008-03-31 Thread Mike Hench
dont write SPMODE reg unless mode changed.
it causes SPI to go hi-z momentarily
which can cause a spike on the CLK line
this is a problem in MMC where /CS is held asserted
across multiple transactions.

Signed-off-by: Mike Hench [EMAIL PROTECTED]

---

--- linux-2.6.25-rc5.orig/drivers/spi/spi_mpc83xx.c 2008-03-10
00:22:27.0 -0500
+++ linux-2.6.25-rc5/drivers/spi/spi_mpc83xx.c  2008-03-31
07:37:37.0 -0500
@@ -147,6 +147,7 @@
 
if (value == BITBANG_CS_ACTIVE) {
u32 regval =
mpc83xx_spi_read_reg(mpc83xx_spi-base-mode);
+   u32 regval0 = regval;
u32 len = spi-bits_per_word;
u8 pm;
 
@@ -188,9 +189,16 @@
regval |= SPMODE_PM(pm);
}
 
-   /* Turn off SPI unit prior changing mode */
-   mpc83xx_spi_write_reg(mpc83xx_spi-base-mode, 0);
-   mpc83xx_spi_write_reg(mpc83xx_spi-base-mode, regval);
+   // dont write reg unless mode changed.
+   // it causes SPI to go hi-z momentarily
+   // which can cause a spike on the CLK line
+   // this is a problem in MMC where /CS is held asserted
+   // across multiple transactions.
+   if(regval != regval0) {
+   /* Turn off SPI unit prior changing mode */
+   mpc83xx_spi_write_reg(mpc83xx_spi-base-mode,
0);
+   mpc83xx_spi_write_reg(mpc83xx_spi-base-mode,
regval);
+   }
if (mpc83xx_spi-activate_cs)
mpc83xx_spi-activate_cs(spi-chip_select, pol);
}

___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev


[PATCH] MPC813 NAND fixes

2008-03-19 Thread Mike Hench
 

 



From: Mike Hench 
Sent: Wednesday, March 19, 2008 10:22 AM
To: '[EMAIL PROTECTED]'
Subject: [PATCH] MPC813 NAND fixes

 

Fix a race condition in fsl_elbc_run_command

Declare a variable written by an interrupt volatile.

Added parentheses to make timeout non-zero

Fix incorrect usage of clearbits32 that bashed option register

Remove work around for bashed register

 

Signed-off-by: Mike Hench [EMAIL PROTECTED]

 

---

 

--- linux-2.6.25-rc5.orig/drivers/mtd/nand/fsl_elbc_nand.c   2008-03-10
00:22:27.0 -0500

+++ linux-2.6.25-rc5/drivers/mtd/nand/fsl_elbc_nand.c   2008-03-19
10:08:22.0 -0500

@@ -264,7 +264,7 @@ struct fsl_elbc_ctrl {

struct elbc_regs __iomem *regs;

int irq;

wait_queue_head_t irq_wait;

-   unsigned int irq_status; /* status read from LTESR by irq
handler */

+  volatile unsigned int irq_status; /* status read from LTESR
by irq handler */

u8 __iomem *addr;/* Address of assigned FCM buffer
*/

unsigned int page;   /* Last page written to / read from
*/

unsigned int read_bytes; /* Number of bytes read during
command   */

@@ -379,13 +379,13 @@ static int fsl_elbc_run_command(struct m

 in_be32(lbc-fbar), in_be32(lbc-fpar),

 in_be32(lbc-fbcr), priv-bank);

 

+  ctrl-irq_status = 0;

/* execute special operation */

out_be32(lbc-lsor, priv-bank);

 

/* wait for FCM complete flag or timeout */

-   ctrl-irq_status = 0;

wait_event_timeout(ctrl-irq_wait, ctrl-irq_status,

-  FCM_TIMEOUT_MSECS * HZ/1000);

+ (FCM_TIMEOUT_MSECS * HZ)/1000);

ctrl-status = ctrl-irq_status;

 

/* store mdr value in case it was needed */

@@ -861,7 +861,7 @@ static int fsl_elbc_chip_init_tail(struc

/* adjust Option Register and ECC to match Flash page size
*/

if (mtd-writesize == 512) {

priv-page_size = 0;

-   clrbits32(lbc-bank[priv-bank].or,
~OR_FCM_PGS);

+  clrbits32(lbc-bank[priv-bank].or, OR_FCM_PGS);

} else if (mtd-writesize == 2048) {

priv-page_size = 1;

setbits32(lbc-bank[priv-bank].or,
OR_FCM_PGS);

@@ -882,11 +882,6 @@ static int fsl_elbc_chip_init_tail(struc

return -1;

}

 

-   /* The default u-boot configuration on MPC8313ERDB causes
errors;

-   * more delay is needed.  This should be safe for other
boards

-   * as well.

-   */

-   setbits32(lbc-bank[priv-bank].or, 0x70);

return 0;

 }

 

___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev

[[PATCH] corrected MPC8313 NAND fixes

2008-03-19 Thread Mike Hench
Fix a race condition in fsl_elbc_run_command
Fix incorrect usage of clearbits32 that bashed option register
Remove work around for bashed register

Signed-off-by: Mike Hench [EMAIL PROTECTED]

---

--- linux-2.6.25-rc5.orig/drivers/mtd/nand/fsl_elbc_nand.c
2008-03-10 00:22:27.0 -0500
+++ linux-2.6.25-rc5/drivers/mtd/nand/fsl_elbc_nand.c   2008-03-19
12:34:36.0 -0500
@@ -379,11 +379,11 @@ static int fsl_elbc_run_command(struct m
 in_be32(lbc-fbar), in_be32(lbc-fpar),
 in_be32(lbc-fbcr), priv-bank);
 
+   ctrl-irq_status = 0;
/* execute special operation */
out_be32(lbc-lsor, priv-bank);
 
/* wait for FCM complete flag or timeout */
-   ctrl-irq_status = 0;
wait_event_timeout(ctrl-irq_wait, ctrl-irq_status,
   FCM_TIMEOUT_MSECS * HZ/1000);
ctrl-status = ctrl-irq_status;
@@ -861,7 +861,7 @@ static int fsl_elbc_chip_init_tail(struc
/* adjust Option Register and ECC to match Flash page size */
if (mtd-writesize == 512) {
priv-page_size = 0;
-   clrbits32(lbc-bank[priv-bank].or, ~OR_FCM_PGS);
+   clrbits32(lbc-bank[priv-bank].or, OR_FCM_PGS);
} else if (mtd-writesize == 2048) {
priv-page_size = 1;
setbits32(lbc-bank[priv-bank].or, OR_FCM_PGS);
@@ -882,11 +882,6 @@ static int fsl_elbc_chip_init_tail(struc
return -1;
}
 
-   /* The default u-boot configuration on MPC8313ERDB causes
errors;
-* more delay is needed.  This should be safe for other boards
-* as well.
-*/
-   setbits32(lbc-bank[priv-bank].or, 0x70);
return 0;
 }

___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev


question about of_platform vs 'platform'

2008-03-19 Thread Mike Hench
Sorry if this is a stupid question
I am new to PPC.
I am trying to make the SPI work on a MPC8313erdb board.
It isn't loading.
To that end, I added a printk to drivers/base/dd.c __driver_match
function

dmesg |grep -i spi

bus: 'of_platform': driver_probe_device: matching device e0007000.spi
with drive
r fsl-elbc
bus: 'platform': driver_probe_device: matching device fsl-usb2-udc.0
with driver
 mpc83xx_spi
bus: 'platform': driver_probe_device: matching device mpc83xx_wdt.0 with
driver
mpc83xx_spi
bus: 'platform': driver_probe_device: matching device fsl-i2c.0 with
driver mpc8
3xx_spi
bus: 'platform': driver_probe_device: matching device fsl-i2c.1 with
driver mpc8
3xx_spi
bus: 'platform': driver_probe_device: matching device Fixed MDIO bus.0
with driv
er mpc83xx_spi

it seems there is some sort of mismatch
how did the kernel decide that SPI was an 'of_platform' device.
The driver just uses 'platform' sorts of calls.
As opposed to the mpc52xx driver which uses of_platform.
The DTS file spi entry look similar to the i2c entries.
Those are treated as 'platform' devices.

A nudge/shove in the right direction would be appreciated.

Thanks.
Mike

___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev