[PATCH v16 05/10]USB/ppc4xx: Add Synopsys DWC OTG HCD interrupt function
FImplements DWC OTG USB HCD interrupt service routine.
Signed-off-by: Rupjyoti Sarmah rsar...@apm.com
Signed-off-by: Tirumala R Marri tma...@apm.com
Signed-off-by: Fushen Chen fc...@apm.com
Signed-off-by: Mark Miesfeld mmiesf...@apm.com
---
drivers/usb/dwc/hcd_intr.c | 1472
1 files changed, 1472 insertions(+), 0 deletions(-)
create mode 100644 drivers/usb/dwc/hcd_intr.c
diff --git a/drivers/usb/dwc/hcd_intr.c b/drivers/usb/dwc/hcd_intr.c
new file mode 100644
index 000..1239c78
--- /dev/null
+++ b/drivers/usb/dwc/hcd_intr.c
@@ -0,0 +1,1472 @@
+/*
+ * DesignWare HS OTG controller driver
+ * Copyright (C) 2006 Synopsys, Inc.
+ * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
+ *
+ * This program is free software: you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License version 2 for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see http://www.gnu.org/licenses
+ * or write to the Free Software Foundation, Inc., 51 Franklin Street,
+ * Suite 500, Boston, MA 02110-1335 USA.
+ *
+ * Based on Synopsys driver version 2.60a
+ * Modified by Mark Miesfeld mmiesf...@apm.com
+ * Modified by Stefan Roese s...@denx.de, DENX Software Engineering
+ * Modified by Chuck Meade ch...@theptrgroup.com
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include hcd.h
+
+/* This file contains the implementation of the HCD Interrupt handlers.
*/
+static const int erratum_usb09_patched;
+static const int deferral_on = 1;
+static const int nak_deferral_delay = 8;
+static const int nyet_deferral_delay = 1;
+
+/**
+ * Handles the start-of-frame interrupt in host mode. Non-periodic
+ * transactions may be queued to the DWC_otg controller for the current
+ * (micro)frame. Periodic transactions may be queued to the controller for the
+ * next (micro)frame.
+ */
+static int dwc_otg_hcd_handle_sof_intr(struct dwc_hcd *hcd)
+{
+ u32 hfnum;
+ struct list_head *qh_entry;
+ struct dwc_qh *qh;
+ enum dwc_transaction_type tr_type;
+ u32 gintsts = 0;
+
+ hfnum =
+ dwc_reg_read(hcd-core_if-host_if-host_global_regs,
+ DWC_HFNUM);
+
+ hcd-frame_number = DWC_HFNUM_FRNUM_RD(hfnum);
+
+ /* Determine whether any periodic QHs should be executed. */
+ qh_entry = hcd-periodic_sched_inactive.next;
+ while (qh_entry != hcd-periodic_sched_inactive) {
+ qh = list_entry(qh_entry, struct dwc_qh, qh_list_entry);
+ qh_entry = qh_entry-next;
+
+ /*
+* If needed, move QH to the ready list to be executed next
+* (micro)frame.
+*/
+ if (dwc_frame_num_le(qh-sched_frame, hcd-frame_number))
+ list_move(qh-qh_list_entry,
+ hcd-periodic_sched_ready);
+ }
+
+ tr_type = dwc_otg_hcd_select_transactions(hcd);
+ if (tr_type != DWC_OTG_TRANSACTION_NONE)
+ dwc_otg_hcd_queue_transactions(hcd, tr_type);
+
+ /* Clear interrupt */
+ gintsts |= DWC_INTMSK_STRT_OF_FRM;
+ dwc_reg_write(gintsts_reg(hcd), 0, gintsts);
+ return 1;
+}
+
+/**
+ * Handles the Rx Status Queue Level Interrupt, which indicates that there is
at
+ * least one packet in the Rx FIFO. The packets are moved from the FIFO to
+ * memory if the DWC_otg controller is operating in Slave mode.
+ */
+static int dwc_otg_hcd_handle_rx_status_q_level_intr(struct dwc_hcd *hcd)
+{
+ u32 grxsts;
+ struct dwc_hc *hc;
+
+ grxsts = dwc_reg_read(hcd-core_if-core_global_regs, DWC_GRXSTSP);
+ hc = hcd-hc_ptr_array[grxsts DWC_HM_RXSTS_CHAN_NUM_RD(grxsts)];
+
+ /* Packet Status */
+ switch (DWC_HM_RXSTS_PKT_STS_RD(grxsts)) {
+ case DWC_GRXSTS_PKTSTS_IN:
+ /* Read the data
[PATCH v16 06/10]USB/ppc4xx: Add Synopsys DWC OTG HCD queue function
Implements functions to manage Queue Heads and Queue
Transfer Descriptors of DWC USB OTG Controller.
Signed-off-by: Rupjyoti Sarmah rsar...@apm.com
Signed-off-by: Tirumala R Marri tma...@apm.com
Signed-off-by: Fushen Chen fc...@apm.com
Signed-off-by: Mark Miesfeld mmiesf...@apm.com
---
drivers/usb/dwc/hcd_queue.c | 696 +++
1 files changed, 696 insertions(+), 0 deletions(-)
create mode 100644 drivers/usb/dwc/hcd_queue.c
diff --git a/drivers/usb/dwc/hcd_queue.c b/drivers/usb/dwc/hcd_queue.c
new file mode 100644
index 000..67f0409
--- /dev/null
+++ b/drivers/usb/dwc/hcd_queue.c
@@ -0,0 +1,696 @@
+/*
+ * DesignWare HS OTG controller driver
+ * Copyright (C) 2006 Synopsys, Inc.
+ * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
+ *
+ * This program is free software: you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License version 2 for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see http://www.gnu.org/licenses
+ * or write to the Free Software Foundation, Inc., 51 Franklin Street,
+ * Suite 500, Boston, MA 02110-1335 USA.
+ *
+ * Based on Synopsys driver version 2.60a
+ * Modified by Mark Miesfeld mmiesf...@apm.com
+ * Modified by Stefan Roese s...@denx.de, DENX Software Engineering
+ * Modified by Chuck Meade ch...@theptrgroup.com
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * This file contains the functions to manage Queue Heads and Queue
+ * Transfer Descriptors.
+ */
+
+#include hcd.h
+
+static inline int is_fs_ls(enum usb_device_speed speed)
+{
+ return speed == USB_SPEED_FULL || speed == USB_SPEED_LOW;
+}
+
+/* Allocates memory for a QH structure. */
+static inline struct dwc_qh *dwc_otg_hcd_qh_alloc(void)
+{
+ return kmalloc(sizeof(struct dwc_qh), GFP_ATOMIC);
+}
+
+/**
+ * Initializes a QH structure to initialize the QH.
+ */
+#define SCHEDULE_SLOP 10
+static void dwc_otg_hcd_qh_init(struct dwc_hcd *hcd, struct dwc_qh *qh,
+ struct urb *urb)
+{
+ memset(qh, 0, sizeof(struct dwc_qh));
+
+ /* Initialize QH */
+ switch (usb_pipetype(urb-pipe)) {
+ case PIPE_CONTROL:
+ qh-ep_type = USB_ENDPOINT_XFER_CONTROL;
+ break;
+ case PIPE_BULK:
+ qh-ep_type = USB_ENDPOINT_XFER_BULK;
+ break;
+ case PIPE_ISOCHRONOUS:
+ qh-ep_type = USB_ENDPOINT_XFER_ISOC;
+ break;
+ case PIPE_INTERRUPT:
+ qh-ep_type = USB_ENDPOINT_XFER_INT;
+ break;
+ }
+
+ qh-ep_is_in = usb_pipein(urb-pipe) ? 1 : 0;
+ qh-data_toggle = DWC_OTG_HC_PID_DATA0;
+ qh-maxp = usb_maxpacket(urb-dev, urb-pipe, !(usb_pipein(urb-pipe)));
+
+ INIT_LIST_HEAD(qh-qtd_list);
+ INIT_LIST_HEAD(qh-qh_list_entry);
+
+ qh-channel = NULL;
+ qh-speed = urb-dev-speed;
+
+ /*
+* FS/LS Enpoint on HS Hub NOT virtual root hub
+*/
+ qh-do_split = 0;
+ if (is_fs_ls(urb-dev-speed) urb-dev-tt urb-dev-tt-hub
+ urb-dev-tt-hub-devnum != 1)
+ qh-do_split = 1;
+
+ if (qh-ep_type == USB_ENDPOINT_XFER_INT ||
+ qh-ep_type == USB_ENDPOINT_XFER_ISOC) {
+ /* Compute scheduling parameters once and save them. */
+ u32 hprt;
+ int bytecount = dwc_hb_mult(qh-maxp) *
+ dwc_max_packet(qh-maxp);
+
+ qh-usecs = NS_TO_US(usb_calc_bus_time(urb-dev-speed,
+ usb_pipein(urb-pipe),
+ (qh-ep_type ==
+ USB_ENDPOINT_XFER_ISOC),
+ bytecount));
+
+ /* Start in a slightly future (micro)frame
[PATCH v16 07/10]USB/ppc4xx: Add Synopsys DWC OTG PCD function
The PCD is responsible for translating requests from the gadget driver
to appropriate actions on the DWC OTG controller.
Signed-off-by: Rupjyoti Sarmah rsar...@apm.com
Signed-off-by: Tirumala R Marri tma...@apm.com
Signed-off-by: Fushen Chen fc...@apm.com
Signed-off-by: Mark Miesfeld mmiesf...@apm.com
---
drivers/usb/dwc/pcd.c | 1817 +
drivers/usb/dwc/pcd.h | 139
2 files changed, 1956 insertions(+), 0 deletions(-)
create mode 100644 drivers/usb/dwc/pcd.c
create mode 100644 drivers/usb/dwc/pcd.h
diff --git a/drivers/usb/dwc/pcd.c b/drivers/usb/dwc/pcd.c
new file mode 100644
index 000..f486d2d
--- /dev/null
+++ b/drivers/usb/dwc/pcd.c
@@ -0,0 +1,1817 @@
+/*
+ * DesignWare HS OTG controller driver
+ * Copyright (C) 2006 Synopsys, Inc.
+ * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
+ *
+ * This program is free software: you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License version 2 for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see http://www.gnu.org/licenses
+ * or write to the Free Software Foundation, Inc., 51 Franklin Street,
+ * Suite 500, Boston, MA 02110-1335 USA.
+ *
+ * Based on Synopsys driver version 2.60a
+ * Modified by Mark Miesfeld mmiesf...@apm.com
+ * Modified by Stefan Roese s...@denx.de, DENX Software Engineering
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * This file implements the Peripheral Controller Driver.
+ *
+ * The Peripheral Controller Driver (PCD) is responsible for
+ * translating requests from the Function Driver into the appropriate
+ * actions on the DWC_otg controller. It isolates the Function Driver
+ * from the specifics of the controller by providing an API to the
+ * Function Driver.
+ *
+ * The Peripheral Controller Driver for Linux will implement the
+ * Gadget API, so that the existing Gadget drivers can be used.
+ * (Gadget Driver is the Linux terminology for a Function Driver.)
+ *
+ * The Linux Gadget API is defined in the header file linux/usb/gadget.h. The
+ * USB EP operations API is defined in the structure usb_ep_ops and the USB
+ * Controller API is defined in the structure usb_gadget_ops
+ *
+ * An important function of the PCD is managing interrupts generated
+ * by the DWC_otg controller. The implementation of the DWC_otg device
+ * mode interrupt service routines is in dwc_otg_pcd_intr.c.
+ */
+
+#include linux/dma-mapping.h
+#include linux/delay.h
+
+#include pcd.h
+
+/*
+ * Static PCD pointer for use in usb_gadget_register_driver and
+ * usb_gadget_unregister_driver. Initialized in dwc_otg_pcd_init.
+ */
+static struct dwc_pcd *s_pcd;
+
+static inline int need_stop_srp_timer(struct core_if *core_if)
+{
+ if (core_if-core_params-phy_type != DWC_PHY_TYPE_PARAM_FS ||
+ !core_if-core_params-i2c_enable)
+ return core_if-srp_timer_started ? 1 : 0;
+ return 0;
+}
+
+/**
+ * Tests if the module is set to FS or if the PHY_TYPE is FS. If so, then the
+ * gadget should not report as dual-speed capable.
+ */
+static inline int check_is_dual_speed(struct core_if *core_if)
+{
+ if (core_if-core_params-speed == DWC_SPEED_PARAM_FULL ||
+ (DWC_HWCFG2_HS_PHY_TYPE_RD(core_if-hwcfg2) == 2
+DWC_HWCFG2_P_2_P_RD(core_if-hwcfg2) == 1
+core_if-core_params-ulpi_fs_ls))
+ return 0;
+ return 1;
+}
+
+/**
+ * Tests if driver is OTG capable.
+ */
+static inline int check_is_otg(struct core_if *core_if)
+{
+ if (DWC_HWCFG2_OP_MODE_RD(core_if-hwcfg2) ==
+ DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE ||
+ DWC_HWCFG2_OP_MODE_RD(core_if-hwcfg2) ==
+ DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST ||
+ DWC_HWCFG2_OP_MODE_RD(core_if-hwcfg2) ==
+ DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE ||
+ DWC_HWCFG2_OP_MODE_RD(core_if
[PATCH v16 09/10]USB/ppc4xx: Add Synopsys DWC OTG driver kernel configuration and Makefile
Add Synopsys DesignWare HS USB OTG driver kernel configuration. Synopsys OTG driver may operate in host only, device only, or OTG mode. The driver also allows user configure the core to use its internal DMA or Slave (PIO) mode. Signed-off-by: Rupjyoti Sarmah rsar...@apm.com Signed-off-by: Tirumala R Marri tma...@apm.com Signed-off-by: Fushen Chen fc...@apm.com Signed-off-by: Mark Miesfeld mmiesf...@apm.com --- drivers/Makefile |1 + drivers/usb/Kconfig |2 + drivers/usb/dwc/Kconfig | 84 ++ drivers/usb/dwc/Makefile | 19 ++ 4 files changed, 106 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/dwc/Kconfig create mode 100644 drivers/usb/dwc/Makefile diff --git a/drivers/Makefile b/drivers/Makefile index 262b19d..bae5eb9 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -70,6 +70,7 @@ obj-$(CONFIG_PARIDE) += block/paride/ obj-$(CONFIG_TC) += tc/ obj-$(CONFIG_UWB) += uwb/ obj-$(CONFIG_USB_OTG_UTILS)+= usb/ +obj-$(CONFIG_USB_DWC_OTG) += usb/dwc/ obj-$(CONFIG_USB) += usb/ obj-$(CONFIG_PCI) += usb/ obj-$(CONFIG_USB_GADGET) += usb/ diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index cbd8f5f..6812758 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -133,6 +133,8 @@ source drivers/usb/host/Kconfig source drivers/usb/musb/Kconfig +source drivers/usb/dwc/Kconfig + source drivers/usb/renesas_usbhs/Kconfig source drivers/usb/class/Kconfig diff --git a/drivers/usb/dwc/Kconfig b/drivers/usb/dwc/Kconfig new file mode 100644 index 000..eafc5ed --- /dev/null +++ b/drivers/usb/dwc/Kconfig @@ -0,0 +1,84 @@ +# +# USB Dual Role (OTG-ready) Controller Drivers +# for silicon based on Synopsys DesignWare IP +# + +comment Enable Host or Gadget support for DesignWare OTG controller + depends on !USB USB_GADGET=n + +config USB_DWC_OTG + tristate Synopsys DWC OTG Controller + depends on USB || USB_GADGET + select NOP_USB_XCEIV + select USB_OTG_UTILS + default USB_GADGET + help + This driver provides USB Device Controller support for the + Synopsys DesignWare USB OTG Core used on the AppliedMicro PowerPC SoC. + +config DWC_DEBUG + bool Enable DWC Debugging + depends on USB_DWC_OTG + default n + help + Enable DWC driver debugging + +choice + prompt DWC Mode Selection + depends on USB_DWC_OTG + default DWC_HOST_ONLY + help + Select the DWC Core in OTG, Host only, or Device only mode. + +config DWC_HOST_ONLY + bool DWC Host Only Mode + +config DWC_OTG_MODE + bool DWC OTG Mode + select USB_GADGET_SELECTED + +config DWC_DEVICE_ONLY + bool DWC Device Only Mode + select USB_GADGET_SELECTED + +endchoice + +# enable peripheral support (including with OTG) +choice + prompt DWC DMA/SlaveMode Selection + depends on USB_DWC_OTG + default DWC_DMA_MODE + help + Select the DWC DMA or Slave Mode. + DMA mode uses the DWC core internal DMA engines. + Slave mode uses the processor PIO to tranfer data. + In Slave mode, processor's DMA channels can be used if available. + +config DWC_SLAVE + bool DWC Slave Mode + +config DWC_DMA_MODE + bool DWC DMA Mode + +endchoice + +config DWC_OTG_REG_LE + bool DWC Little Endian Register + depends on USB_DWC_OTG + default y + help + OTG core register access is Little-Endian. + +config DWC_OTG_FIFO_LE + bool DWC FIFO Little Endian + depends on USB_DWC_OTG + default n + help + OTG core FIFO access is Little-Endian. + +config DWC_LIMITED_XFER_SIZE + bool DWC Endpoint Limited Xfer Size + depends on USB_GADGET_DWC_HDRC + default n + help + Bit fields in the Device EP Transfer Size Register is 11 bits. diff --git a/drivers/usb/dwc/Makefile b/drivers/usb/dwc/Makefile new file mode 100644 index 000..4102add --- /dev/null +++ b/drivers/usb/dwc/Makefile @@ -0,0 +1,19 @@ +# +# OTG infrastructure and transceiver drivers +# +obj-$(CONFIG_USB_DWC_OTG) += dwc.o + +dwc-objs := cil.o cil_intr.o param.o + +ifeq ($(CONFIG_4xx_SOC),y) +dwc-objs += apmppc.o +endif + +ifneq ($(CONFIG_DWC_DEVICE_ONLY),y) +dwc-objs += hcd.o hcd_intr.o \ + hcd_queue.o +endif + +ifneq ($(CONFIG_DWC_HOST_ONLY),y) +dwc-objs += pcd.o pcd_intr.o +endif -- 1.7.0.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v16 10/10]USB/ppc4xx:Synopsys DWC OTG driver enable gadget support
Enable gadget support Signed-off-by: Rupjyoti Sarmah rsar...@apm.com Signed-off-by: Tirumala R Marri tma...@apm.com Signed-off-by: Fushen Chen fc...@apm.com Signed-off-by: Mark Miesfeld mmiesf...@apm.com --- drivers/usb/gadget/Kconfig| 11 +++ drivers/usb/gadget/gadget_chips.h |9 - 2 files changed, 19 insertions(+), 1 deletions(-) diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 2633f75..4bca4dc 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -329,6 +329,17 @@ config USB_GADGET_MUSB_HDRC This OTG-capable silicon IP is used in dual designs including the TI DaVinci, OMAP 243x, OMAP 343x, TUSB 6010, and ADI Blackfin +# dwc_otg builds in ../dwc along with host support +config USB_GADGET_DWC_HDRC + boolean DesignWare USB Peripheral + depends on DWC_OTG_MODE || DWC_DEVICE_ONLY + select USB_GADGET_DUALSPEED + select USB_GADGET_SELECTED + select USB_GADGET_DWC_OTG + help + This OTG-capable Designware USB IP which has host and device + modes. + config USB_M66592 tristate Renesas M66592 USB Peripheral Controller select USB_GADGET_DUALSPEED diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index a8855d0..ab1ea6e 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -51,6 +51,12 @@ #define gadget_is_s3c_hsotg(g) (!strcmp(s3c-hsotg, (g)-name)) #define gadget_is_s3c_hsudc(g) (!strcmp(s3c-hsudc, (g)-name)) +#if defined(CONFIG_DWC_OTG_MODE) || defined(CONFIG_DWC_DEVICE_ONLY) +#define gadget_is_dwc_otg_pcd(g) (!strcmp(dwc_otg_pcd, (g)-name)) +#else +#define gadget_is_dwc_otg_pcd(g) 0 +#endif + /** * usb_gadget_controller_number - support bcdDevice id convention * @gadget: the controller being driven @@ -118,11 +124,12 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x31; else if (gadget_is_dwc3(gadget)) return 0x32; + else if (gadget_is_dwc_otg_pcd(gadget)) + return 0x33; return -ENOENT; } - /** * gadget_supports_altsettings - return true if altsettings work * @gadget: the gadget in question -- 1.7.0.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v16 02/10]USB/ppc4xx-Add-Synopsys-DWC-OTG-driver-framework
Platform probing is in apmppc.c.
Driver parameter and parameter checking are in param.c.
Signed-off-by: Rupjyoti Sarmah rsar...@apm.com
Signed-off-by: Tirumala R Marri tma...@apm.com
Signed-off-by: Fushen Chen fc...@apm.com
Signed-off-by: Mark Miesfeld mmiesf...@apm.com
---
drivers/usb/dwc/apmppc.c | 350 ++
drivers/usb/dwc/driver.h | 76 ++
drivers/usb/dwc/param.c | 180
3 files changed, 606 insertions(+), 0 deletions(-)
create mode 100644 drivers/usb/dwc/apmppc.c
create mode 100644 drivers/usb/dwc/driver.h
create mode 100644 drivers/usb/dwc/param.c
diff --git a/drivers/usb/dwc/apmppc.c b/drivers/usb/dwc/apmppc.c
new file mode 100644
index 000..9b444dc
--- /dev/null
+++ b/drivers/usb/dwc/apmppc.c
@@ -0,0 +1,350 @@
+/*
+ * DesignWare HS OTG controller driver
+ * Copyright (C) 2006 Synopsys, Inc.
+ * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
+ *
+ * This program is free software: you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License version 2 for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see http://www.gnu.org/licenses
+ * or write to the Free Software Foundation, Inc., 51 Franklin Street,
+ * Suite 500, Boston, MA 02110-1335 USA.
+ *
+ * Based on Synopsys driver version 2.60a
+ * Modified by Mark Miesfeld mmiesf...@apm.com
+ * Modified by Stefan Roese s...@denx.de, DENX Software Engineering
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * The dwc_otg module provides the initialization and cleanup entry
+ * points for the dwcotg driver. This module will be dynamically installed
+ * after Linux is booted using the insmod command. When the module is
+ * installed, the dwc_otg_driver_init function is called. When the module is
+ * removed (using rmmod), the dwc_otg_driver_cleanup function is called.
+ *
+ * This module also defines a data structure for the dwc_otg driver, which is
+ * used in conjunction with the standard device structure. These
+ * structures allow the OTG driver to comply with the standard Linux driver
+ * model in which devices and drivers are registered with a bus driver. This
+ * has the benefit that Linux can expose attributes of the driver and device
+ * in its special sysfs file system. Users can then read or write files in
+ * this file system to perform diagnostics on the driver components or the
+ * device.
+ */
+#include linux/module.h
+
+#include linux/of_platform.h
+
+#include driver.h
+
+#define DWC_DRIVER_VERSION 1.05
+#define DWC_DRIVER_DESCHS OTG USB Controller driver
+static const char dwc_driver_name[] = dwc_otg;
+
+static irqreturn_t dwc_otg_common_irq(int _irq, void *dev)
+{
+ struct dwc_otg_device *dwc_dev = dev;
+ int retval;
+ struct dwc_hcd *dwc_hcd;
+
+ dwc_hcd = dwc_dev-hcd;
+ spin_lock(dwc_hcd-lock);
+ retval = dwc_otg_handle_common_intr(dwc_dev-core_if);
+ spin_unlock(dwc_hcd-lock);
+ return IRQ_RETVAL(retval);
+}
+
+static irqreturn_t dwc_otg_externalchgpump_irq(int _irq, void *dev)
+{
+ struct dwc_otg_device *dwc_dev = dev;
+
+ if (dwc_otg_is_host_mode(dwc_dev-core_if)) {
+ struct dwc_hcd *dwc_hcd;
+ u32 hprt0 = 0;
+
+ dwc_hcd = dwc_dev-hcd;
+ spin_lock(dwc_hcd-lock);
+ hprt0 = DWC_HPRT0_PRT_PWR_RW(hprt0, 0);
+ dwc_reg_write(dwc_dev-core_if-host_if-hprt0, 0, hprt0);
+ spin_unlock(dwc_hcd-lock);
+ } else {
+ /* Device mode - This int is n/a for device mode */
+ dev_dbg(dev, DeviceMode: OTG OverCurrent Detected\n);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static int __devexit dwc_otg_driver_remove(struct platform_device *ofdev)
+{
+ struct device *dev = ofdev-dev;
+ struct
[PATCH v16 01/10]USB/ppc4xx: Add Synopsys DWC OTG Register definitions
Add Synopsys Design Ware core register definitions. Signed-off-by: Rupjyoti Sarmah rsar...@apm.com Signed-off-by: Tirumala R Marri tma...@apm.com Signed-off-by: Fushen Chen fc...@apm.com Signed-off-by: Mark Miesfeld mmiesf...@apm.com --- drivers/usb/dwc/regs.h | 1326 1 files changed, 1326 insertions(+), 0 deletions(-) create mode 100644 drivers/usb/dwc/regs.h diff --git a/drivers/usb/dwc/regs.h b/drivers/usb/dwc/regs.h new file mode 100644 index 000..c03252c --- /dev/null +++ b/drivers/usb/dwc/regs.h @@ -0,0 +1,1326 @@ +/* + * DesignWare HS OTG controller driver + * Copyright (C) 2006 Synopsys, Inc. + * Portions Copyright (C) 2010 Applied Micro Circuits Corporation. + * + * This program is free software: you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License version 2 for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see http://www.gnu.org/licenses + * or write to the Free Software Foundation, Inc., 51 Franklin Street, + * Suite 500, Boston, MA 02110-1335 USA. + * + * Based on Synopsys driver version 2.60a + * Modified by Mark Miesfeld mmiesf...@apm.com + * + * Revamped register difinitions by Tirumala R Marri(tma...@apm.com) + * Updated by Rupjyoti Sarmah rsar...@apm.com + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS AS IS + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES + * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef __DWC_OTG_REGS_H__ +#define __DWC_OTG_REGS_H__ + +#include linux/types.h +/*Bit fields in the Device EP Transfer Size Register is 11 bits */ +#undef DWC_LIMITED_XFER_SIZE +/* + * This file contains the Macro defintions for accessing the DWC_otg core + * registers. + * + * The application interfaces with the HS OTG core by reading from and + * writing to the Control and Status Register (CSR) space through the + * AHB Slave interface. These registers are 32 bits wide, and the + * addresses are 32-bit-block aligned. + * CSRs are classified as follows: + * - Core Global Registers + * - Device Mode Registers + * - Device Global Registers + * - Device Endpoint Specific Registers + * - Host Mode Registers + * - Host Global Registers + * - Host Port CSRs + * - Host Channel Specific Registers + * + * Only the Core Global registers can be accessed in both Device and + * Host modes. When the HS OTG core is operating in one mode, either + * Device or Host, the application must not access registers from the + * other mode. When the core switches from one mode to another, the + * registers in the new mode of operation must be reprogrammed as they + * would be after a power-on reset. + */ + +/* + * DWC_otg Core registers. The core_global_regs structure defines the + * size and relative field offsets for the Core Global registers. + */ +#defineDWC_GOTGCTL 0x000 +#defineDWC_GOTGINT 0x004 +#defineDWC_GAHBCFG 0x008 +#defineDWC_GUSBCFG 0x00C +#defineDWC_GRSTCTL 0x010 +#defineDWC_GINTSTS 0x014 +#defineDWC_GINTMSK 0x018 +#defineDWC_GRXSTSR 0x01C +#defineDWC_GRXSTSP 0x020 +#defineDWC_GRXFSIZ 0x024 +#defineDWC_GNPTXFSIZ 0x028 +#defineDWC_GNPTXSTS0x02C +#defineDWC_GI2CCTL 0x030 +#defineDWC_VDCTL 0x034 +#defineDWC_GGPIO 0x038 +#defineDWC_GUID0x03C +#defineDWC_GSNPSID 0x040 +#defineDWC_GHWCFG1 0x044 +#defineDWC_GHWCFG2 0x048 +#defineDWC_GHWCFG3 0x04c +#defineDWC_GHWCFG4 0x050 +#defineDWC_HPTXFSIZ0x100 +#defineDWC_DPTX_FSIZ_DIPTXF(x) (0x104 + x * 4) /* 15 = x 1 */ + +#define DWC_GLBINTRMASK0x0001 +#define DWC_DMAENABLE 0x0020
[PATCH v6] ppc44x:PHY fixup for USB on canyonlands board
This fix is a reset for USB PHY that requires some amount of time for power to
be stable on Canyonlands.
Signed-off-by: Rupjyoti Sarmah rsar...@apm.com
---
changes from previous version:
-- error paths updated
-- leakage of a node corrected
-- iounmap is called on vaddr
arch/powerpc/boot/dts/canyonlands.dts | 11 +++
arch/powerpc/platforms/44x/44x.h |4 +
arch/powerpc/platforms/44x/Kconfig |1 -
arch/powerpc/platforms/44x/Makefile|1 +
arch/powerpc/platforms/44x/canyonlands.c | 134
arch/powerpc/platforms/44x/ppc44x_simple.c |1 -
6 files changed, 150 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/platforms/44x/canyonlands.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index a303703..8ff1f3f 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -224,6 +224,11 @@
};
};
+ c...@2,0 {
+ compatible = amcc,ppc460ex-bcsr;
+ reg = 2 0x0 0x9;
+ };
+
n...@3,0 {
compatible = ibm,ndfc;
reg = 0x0003 0x
0x2000;
@@ -320,6 +325,12 @@
interrupts = 0x3 0x4;
};
+ GPIO0: g...@ef600b00 {
+ compatible = ibm,ppc4xx-gpio;
+ reg = 0xef600b00 0x0048;
+ gpio-controller;
+ };
+
ZMII0: emac-z...@ef600d00 {
compatible = ibm,zmii-460ex, ibm,zmii;
reg = 0xef600d00 0x000c;
diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h
index dbc4d2b..63f703e 100644
--- a/arch/powerpc/platforms/44x/44x.h
+++ b/arch/powerpc/platforms/44x/44x.h
@@ -4,4 +4,8 @@
extern u8 as1_readb(volatile u8 __iomem *addr);
extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
+#define GPIO0_OSRH 0xC
+#define GPIO0_TSRH 0x14
+#define GPIO0_ISR1H0x34
+
#endif /* __POWERPC_PLATFORMS_44X_44X_H */
diff --git a/arch/powerpc/platforms/44x/Kconfig
b/arch/powerpc/platforms/44x/Kconfig
index 0f979c5..f485fc5 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -115,7 +115,6 @@ config CANYONLANDS
bool Canyonlands
depends on 44x
default n
- select PPC44x_SIMPLE
select 460EX
select PCI
select PPC4xx_PCI_EXPRESS
diff --git a/arch/powerpc/platforms/44x/Makefile
b/arch/powerpc/platforms/44x/Makefile
index 82ff326..6854e73 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o
obj-$(CONFIG_ISS4xx) += iss4xx.o
+obj-$(CONFIG_CANYONLANDS)+= canyonlands.o
diff --git a/arch/powerpc/platforms/44x/canyonlands.c
b/arch/powerpc/platforms/44x/canyonlands.c
new file mode 100644
index 000..afc5e8e
--- /dev/null
+++ b/arch/powerpc/platforms/44x/canyonlands.c
@@ -0,0 +1,134 @@
+/*
+ * This contain platform specific code for APM PPC460EX based Canyonlands
+ * board.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Rupjyoti Sarmah rsar...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include linux/kernel.h
+#include linux/init.h
+#include asm/pci-bridge.h
+#include asm/ppc4xx.h
+#include asm/udbg.h
+#include asm/uic.h
+#include linux/of_platform.h
+#include linux/delay.h
+#include 44x.h
+
+#define BCSR_USB_EN0x11
+
+static __initdata struct of_device_id ppc460ex_of_bus[] = {
+ { .compatible = ibm,plb4, },
+ { .compatible = ibm,opb, },
+ { .compatible = ibm,ebc, },
+ { .compatible = simple-bus, },
+ {},
+};
+
+static int __init ppc460ex_device_probe(void)
+{
+ of_platform_bus_probe(NULL, ppc460ex_of_bus, NULL
[PATCH v5] ppc44x:PHY fixup for USB on canyonlands board
This fix is a reset for USB PHY that requires some amount of time for power to
be stable on Canyonlands.
Signed-off-by: Rupjyoti Sarmah rsar...@apm.com
---
changes from previous version:
-- dts node correction, removed the address and size parameters
-- Kconfig file updated removing dependency on PPC44x_SIMPLE
-- 44x prefixes in the function names changed
-- Error paths updated in canyonlands.c
arch/powerpc/boot/dts/canyonlands.dts | 11 +++
arch/powerpc/platforms/44x/44x.h |4 +
arch/powerpc/platforms/44x/Kconfig |1 -
arch/powerpc/platforms/44x/Makefile|1 +
arch/powerpc/platforms/44x/canyonlands.c | 125
arch/powerpc/platforms/44x/ppc44x_simple.c |1 -
6 files changed, 141 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/platforms/44x/canyonlands.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index a303703..8ff1f3f 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -224,6 +224,11 @@
};
};
+ c...@2,0 {
+ compatible = amcc,ppc460ex-bcsr;
+ reg = 2 0x0 0x9;
+ };
+
n...@3,0 {
compatible = ibm,ndfc;
reg = 0x0003 0x
0x2000;
@@ -320,6 +325,12 @@
interrupts = 0x3 0x4;
};
+ GPIO0: g...@ef600b00 {
+ compatible = ibm,ppc4xx-gpio;
+ reg = 0xef600b00 0x0048;
+ gpio-controller;
+ };
+
ZMII0: emac-z...@ef600d00 {
compatible = ibm,zmii-460ex, ibm,zmii;
reg = 0xef600d00 0x000c;
diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h
index dbc4d2b..63f703e 100644
--- a/arch/powerpc/platforms/44x/44x.h
+++ b/arch/powerpc/platforms/44x/44x.h
@@ -4,4 +4,8 @@
extern u8 as1_readb(volatile u8 __iomem *addr);
extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
+#define GPIO0_OSRH 0xC
+#define GPIO0_TSRH 0x14
+#define GPIO0_ISR1H0x34
+
#endif /* __POWERPC_PLATFORMS_44X_44X_H */
diff --git a/arch/powerpc/platforms/44x/Kconfig
b/arch/powerpc/platforms/44x/Kconfig
index 0f979c5..f485fc5 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -115,7 +115,6 @@ config CANYONLANDS
bool Canyonlands
depends on 44x
default n
- select PPC44x_SIMPLE
select 460EX
select PCI
select PPC4xx_PCI_EXPRESS
diff --git a/arch/powerpc/platforms/44x/Makefile
b/arch/powerpc/platforms/44x/Makefile
index 82ff326..6854e73 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o
obj-$(CONFIG_ISS4xx) += iss4xx.o
+obj-$(CONFIG_CANYONLANDS)+= canyonlands.o
diff --git a/arch/powerpc/platforms/44x/canyonlands.c
b/arch/powerpc/platforms/44x/canyonlands.c
new file mode 100644
index 000..9639709
--- /dev/null
+++ b/arch/powerpc/platforms/44x/canyonlands.c
@@ -0,0 +1,125 @@
+/*
+ * This contain platform specific code for APM PPC460EX based Canyonlands
+ * board.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Rupjyoti Sarmah rsar...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include linux/kernel.h
+#include linux/init.h
+#include asm/pci-bridge.h
+#include asm/ppc4xx.h
+#include asm/udbg.h
+#include asm/uic.h
+#include linux/of_platform.h
+#include linux/delay.h
+#include 44x.h
+
+#define BCSR_USB_EN0x11
+
+static __initdata struct of_device_id ppc460ex_of_bus[] = {
+ { .compatible = ibm,plb4, },
+ { .compatible = ibm,opb, },
+ { .compatible = ibm,ebc, },
+ { .compatible = simple-bus
RE: [v4] ppc44x:PHY fixup for USB on canyonlands board
I prepared these comments for v1, but aparently forgot to send them, so I'll do so now. Thanks for your inputs. I will resubmit an updated patch soon with the changes. Regards, Rup ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v4] ppc44x:PHY fixup for USB on canyonlands board
This fix is a reset for USB PHY that requires some amount of time for power to
be stable on Canyonlands.
Signed-off-by: Rupjyoti Sarmah rsar...@apm.com
---
changes from previous version:
-- changed the dts node names for consistency
-- corrected the indentation pointed by Wolfgang Denk
arch/powerpc/boot/dts/canyonlands.dts | 13 +++
arch/powerpc/platforms/44x/44x.h |4 +
arch/powerpc/platforms/44x/Makefile|1 +
arch/powerpc/platforms/44x/canyonlands.c | 120
arch/powerpc/platforms/44x/ppc44x_simple.c |1 -
5 files changed, 138 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/platforms/44x/canyonlands.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index a303703..3c5d63c 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -224,6 +224,13 @@
};
};
+ c...@2,0 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = amcc,ppc460ex-bcsr;
+ reg = 2 0x0 0x9;
+ };
+
n...@3,0 {
compatible = ibm,ndfc;
reg = 0x0003 0x
0x2000;
@@ -320,6 +327,12 @@
interrupts = 0x3 0x4;
};
+ GPIO0: g...@ef600b00 {
+ compatible = ibm,ppc4xx-gpio;
+ reg = 0xef600b00 0x0048;
+ gpio-controller;
+ };
+
ZMII0: emac-z...@ef600d00 {
compatible = ibm,zmii-460ex, ibm,zmii;
reg = 0xef600d00 0x000c;
diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h
index dbc4d2b..63f703e 100644
--- a/arch/powerpc/platforms/44x/44x.h
+++ b/arch/powerpc/platforms/44x/44x.h
@@ -4,4 +4,8 @@
extern u8 as1_readb(volatile u8 __iomem *addr);
extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
+#define GPIO0_OSRH 0xC
+#define GPIO0_TSRH 0x14
+#define GPIO0_ISR1H0x34
+
#endif /* __POWERPC_PLATFORMS_44X_44X_H */
diff --git a/arch/powerpc/platforms/44x/Makefile
b/arch/powerpc/platforms/44x/Makefile
index 82ff326..6854e73 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o
obj-$(CONFIG_ISS4xx) += iss4xx.o
+obj-$(CONFIG_CANYONLANDS)+= canyonlands.o
diff --git a/arch/powerpc/platforms/44x/canyonlands.c
b/arch/powerpc/platforms/44x/canyonlands.c
new file mode 100644
index 000..4917c31
--- /dev/null
+++ b/arch/powerpc/platforms/44x/canyonlands.c
@@ -0,0 +1,120 @@
+/*
+ * This contain platform specific code for APM PPC460EX based Canyonlands
+ * board.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Rupjyoti Sarmah rsar...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include linux/kernel.h
+#include linux/init.h
+#include asm/pci-bridge.h
+#include asm/ppc4xx.h
+#include asm/udbg.h
+#include asm/uic.h
+#include linux/of_platform.h
+#include linux/delay.h
+#include 44x.h
+
+#define BCSR_USB_EN0x11
+
+static __initdata struct of_device_id ppc44x_of_bus[] = {
+ { .compatible = ibm,plb4, },
+ { .compatible = ibm,opb, },
+ { .compatible = ibm,ebc, },
+ { .compatible = simple-bus, },
+ {},
+};
+
+static int __init ppc44x_device_probe(void)
+{
+ of_platform_bus_probe(NULL, ppc44x_of_bus, NULL);
+
+ return 0;
+}
+machine_device_initcall(canyonlands, ppc44x_device_probe);
+
+/* Using this code only for the Canyonlands board. */
+
+static int __init ppc44x_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+ if (of_flat_dt_is_compatible(root, amcc,canyonlands)) {
+ ppc_pci_set_flags
[PATCH v3] ppc44x:PHY fixup for USB on canyonlands board
This fix is a reset for USB PHY that requires some amount of time for power to
be stable on Canyonlands.
Signed-off-by: Rupjyoti Sarmah rsar...@apm.com
---
changes from previous version:
- moved a Macro from header file to the source file
- corrected updated comments
- replaced the out_be32 calls by setbits32 calls
- bootup delay reduced, udelay is replaced by msleep
arch/powerpc/boot/dts/canyonlands.dts | 13 +++
arch/powerpc/platforms/44x/44x.h |4 +
arch/powerpc/platforms/44x/Makefile|1 +
arch/powerpc/platforms/44x/canyonlands.c | 120
arch/powerpc/platforms/44x/ppc44x_simple.c |1 -
5 files changed, 138 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/platforms/44x/canyonlands.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index a303703..a9f7538 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -224,6 +224,13 @@
};
};
+ c...@2,0 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = apm,ppc460ex-bcsr;
+ reg = 2 0x0 0x9;
+ };
+
n...@3,0 {
compatible = ibm,ndfc;
reg = 0x0003 0x
0x2000;
@@ -320,6 +327,12 @@
interrupts = 0x3 0x4;
};
+ GPIO0: g...@ef600b00 {
+ compatible = ibm,ppc4xx-gpio;
+ reg = 0xef600b00 0x0048;
+ gpio-controller;
+ };
+
ZMII0: emac-z...@ef600d00 {
compatible = ibm,zmii-460ex, ibm,zmii;
reg = 0xef600d00 0x000c;
diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h
index dbc4d2b..63f703e 100644
--- a/arch/powerpc/platforms/44x/44x.h
+++ b/arch/powerpc/platforms/44x/44x.h
@@ -4,4 +4,8 @@
extern u8 as1_readb(volatile u8 __iomem *addr);
extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
+#define GPIO0_OSRH 0xC
+#define GPIO0_TSRH 0x14
+#define GPIO0_ISR1H0x34
+
#endif /* __POWERPC_PLATFORMS_44X_44X_H */
diff --git a/arch/powerpc/platforms/44x/Makefile
b/arch/powerpc/platforms/44x/Makefile
index 82ff326..6854e73 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o
obj-$(CONFIG_ISS4xx) += iss4xx.o
+obj-$(CONFIG_CANYONLANDS)+= canyonlands.o
diff --git a/arch/powerpc/platforms/44x/canyonlands.c
b/arch/powerpc/platforms/44x/canyonlands.c
new file mode 100644
index 000..61e80ce
--- /dev/null
+++ b/arch/powerpc/platforms/44x/canyonlands.c
@@ -0,0 +1,120 @@
+/*
+ * This contain platform specific code for Canyonlands board based on
+ * APM ppc44x series of processors.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Rupjyoti Sarmah rsar...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include linux/kernel.h
+#include linux/init.h
+#include asm/pci-bridge.h
+#include asm/ppc4xx.h
+#include asm/udbg.h
+#include asm/uic.h
+#include linux/of_platform.h
+#include linux/delay.h
+#include 44x.h
+
+#define BCSR_USB_EN0x11
+
+static __initdata struct of_device_id ppc44x_of_bus[] = {
+ { .compatible = ibm,plb4, },
+ { .compatible = ibm,opb, },
+ { .compatible = ibm,ebc, },
+ { .compatible = simple-bus, },
+ {},
+};
+
+static int __init ppc44x_device_probe(void)
+{
+ of_platform_bus_probe(NULL, ppc44x_of_bus, NULL);
+
+ return 0;
+}
+machine_device_initcall(canyonlands, ppc44x_device_probe);
+
+/* Using this code only for the Canyonlands board. */
+
+static int __init ppc44x_probe(void)
+{
+ unsigned long root
RE: [PATCH v3] ppc44x:PHY fixup for USB on canyonlands board
Hi Wolfgang, This results in a mix of amcc, and apm, strings. Are there any plans to unify this? We can make all as apm, but right now I believe there is no plan to do so. Earlier versions of the patch included a delay after the clrbits8() call as well. Is it intentional that you dropped this now? It is dropped intentionally. Rest of your suggestions, I will modify and resubmit. Thanks. Regards, Rup ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v1] ppc44x:PHY fixup for USB on canyonlands board
This fix is a reset for USB PHY that requires some amount of time for power to
be stable on Canyonlands.
Signed-off-by: Rupjyoti Sarmah rsar...@apm.com
---
arch/powerpc/boot/dts/canyonlands.dts | 13 +++
arch/powerpc/platforms/44x/44x.h |5 +
arch/powerpc/platforms/44x/Makefile|1 +
arch/powerpc/platforms/44x/canyonlands.c | 122
arch/powerpc/platforms/44x/ppc44x_simple.c |1 -
5 files changed, 141 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/platforms/44x/canyonlands.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index a303703..a9f7538 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -224,6 +224,13 @@
};
};
+ c...@2,0 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = apm,ppc460ex-bcsr;
+ reg = 2 0x0 0x9;
+ };
+
n...@3,0 {
compatible = ibm,ndfc;
reg = 0x0003 0x
0x2000;
@@ -320,6 +327,12 @@
interrupts = 0x3 0x4;
};
+ GPIO0: g...@ef600b00 {
+ compatible = ibm,ppc4xx-gpio;
+ reg = 0xef600b00 0x0048;
+ gpio-controller;
+ };
+
ZMII0: emac-z...@ef600d00 {
compatible = ibm,zmii-460ex, ibm,zmii;
reg = 0xef600d00 0x000c;
diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h
index dbc4d2b..bc2ab7a 100644
--- a/arch/powerpc/platforms/44x/44x.h
+++ b/arch/powerpc/platforms/44x/44x.h
@@ -4,4 +4,9 @@
extern u8 as1_readb(volatile u8 __iomem *addr);
extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
+#define BCSR_USB_EN0x11
+#define GPIO0_OSRH 0xC
+#define GPIO0_TSRH 0x14
+#define GPIO0_ISR1H0x34
+
#endif /* __POWERPC_PLATFORMS_44X_44X_H */
diff --git a/arch/powerpc/platforms/44x/Makefile
b/arch/powerpc/platforms/44x/Makefile
index 82ff326..6854e73 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o
obj-$(CONFIG_ISS4xx) += iss4xx.o
+obj-$(CONFIG_CANYONLANDS)+= canyonlands.o
diff --git a/arch/powerpc/platforms/44x/canyonlands.c
b/arch/powerpc/platforms/44x/canyonlands.c
new file mode 100644
index 000..f13b62f
--- /dev/null
+++ b/arch/powerpc/platforms/44x/canyonlands.c
@@ -0,0 +1,122 @@
+/*
+ * This contain platform specific code for Canyonalnds board based on
+ * APM ppc44x series of processors.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Rupjyoti Sarmah rsar...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include linux/kernel.h
+#include linux/init.h
+#include asm/pci-bridge.h
+#include asm/ppc4xx.h
+#include asm/udbg.h
+#include asm/uic.h
+#include linux/of_platform.h
+#include 44x.h
+
+static __initdata struct of_device_id ppc44x_of_bus[] = {
+ { .compatible = ibm,plb4, },
+ { .compatible = ibm,opb, },
+ { .compatible = ibm,ebc, },
+ { .compatible = simple-bus, },
+ {},
+};
+
+static int __init ppc44x_device_probe(void)
+{
+ of_platform_bus_probe(NULL, ppc44x_of_bus, NULL);
+
+ return 0;
+}
+machine_device_initcall(canyonlands, ppc44x_device_probe);
+
+/* Using this code only for the Canyonlands board. */
+
+static int __init ppc44x_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+ if (of_flat_dt_is_compatible(root, amcc,canyonlands)) {
+ ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
+ return 1;
+ }
+ return 0;
+}
+
+/* PHY fixup
RE: [PATCH v1] ppc44x:PHY fixup for USB on canyonlands board
+#define BCSR_USB_EN 0x11 This define is wrong here. Its not common for all 44x platforms but Canyonlands specific. So, do you suggest to move this macro to the canyonlands.c ? Or introduce canyonlands.h ? Regards, Rup ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] ppc44x:PHY fixup for USB on canyonlands board
This fix is a reset for USB PHY that requires some amount of time for power to
be stable on Canyonlands.
Signed-off-by: Rupjyoti Sarmah rsar...@apm.com
---
arch/powerpc/boot/dts/canyonlands.dts | 11
arch/powerpc/platforms/44x/44x.h |5 ++
arch/powerpc/platforms/44x/Kconfig|7 ++
arch/powerpc/platforms/44x/Makefile |1 +
arch/powerpc/platforms/44x/ppc44x_fixup.c | 90 +
5 files changed, 114 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/44x/ppc44x_fixup.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index a303703..d6e9ba2 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -171,6 +171,11 @@
0x5 0x4; /* AHBDMA */
};
+ CPLD: c...@e100 {
+ compatible = apm, ppc460ex-bcsr;
+ reg = 4 0xe100 0x9;
+ };
+
POB0: opb {
compatible = ibm,opb-460ex, ibm,opb;
#address-cells = 1;
@@ -320,6 +325,12 @@
interrupts = 0x3 0x4;
};
+ GPIO0: g...@ef600b00 {
+ compatible = apm,ppc44x-gpio-base;
+ reg = 0xef600b00 0x0048;
+ gpio-controller;
+ };
+
ZMII0: emac-z...@ef600d00 {
compatible = ibm,zmii-460ex, ibm,zmii;
reg = 0xef600d00 0x000c;
diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h
index dbc4d2b..bc2ab7a 100644
--- a/arch/powerpc/platforms/44x/44x.h
+++ b/arch/powerpc/platforms/44x/44x.h
@@ -4,4 +4,9 @@
extern u8 as1_readb(volatile u8 __iomem *addr);
extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
+#define BCSR_USB_EN0x11
+#define GPIO0_OSRH 0xC
+#define GPIO0_TSRH 0x14
+#define GPIO0_ISR1H0x34
+
#endif /* __POWERPC_PLATFORMS_44X_44X_H */
diff --git a/arch/powerpc/platforms/44x/Kconfig
b/arch/powerpc/platforms/44x/Kconfig
index 0f979c5..9ca4aaa 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -117,12 +117,19 @@ config CANYONLANDS
default n
select PPC44x_SIMPLE
select 460EX
+ select 44X_FIXUP
select PCI
select PPC4xx_PCI_EXPRESS
select IBM_NEW_EMAC_RGMII
select IBM_NEW_EMAC_ZMII
help
This option enables support for the AMCC PPC460EX evaluation board.
+config 44X_FIXUP
+ bool 4xx_fixup
+ depends on 44x
+ default n
+ help
+ This option enables supporting APM PPC4XX based evaluation board
fixups.
config GLACIER
bool Glacier
diff --git a/arch/powerpc/platforms/44x/Makefile
b/arch/powerpc/platforms/44x/Makefile
index 82ff326..d4bfb97 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -1,6 +1,7 @@
obj-$(CONFIG_44x) := misc_44x.o idle.o
obj-$(CONFIG_PPC44x_SIMPLE) += ppc44x_simple.o
obj-$(CONFIG_EBONY)+= ebony.o
+obj-$(CONFIG_44X_FIXUP) += ppc44x_fixup.o
obj-$(CONFIG_SAM440EP) += sam440ep.o
obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
diff --git a/arch/powerpc/platforms/44x/ppc44x_fixup.c
b/arch/powerpc/platforms/44x/ppc44x_fixup.c
new file mode 100644
index 000..4e254eb
--- /dev/null
+++ b/arch/powerpc/platforms/44x/ppc44x_fixup.c
@@ -0,0 +1,90 @@
+/*
+ * This contain fixup code for Applied Micro ppc44x series of processors.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Rupjyoti Sarmah rsar...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/io.h
+#include linux/of.h
+#include 44x.h
+
+/* PHY fixup code on Canyonlands kit. */
+
+static int __init ppc460ex_canyonlands_fixup(void)
+{
+ u8 __iomem *bcsr ;
+ void __iomem *vaddr;
+ struct device_node *np;
+ u32 val ;
+
+ np = of_find_compatible_node(NULL, NULL, apm
RE: [PATCH] ppc44x:PHY fixup for USB on canyonlands board
Is this just for canyonlands? If so, it's probably better off in a caynonlands specific file, or a function that gets called in the common platform file if the model matches canyonlands. It seems a bit overkill to introduce an entire new file and Kconfig option for this. We want to have a file that will have fixup codes for all the ppc44x specific boards. Within this ppc44x_fixup.c file we would like to place any fixup code that might come later for any of the ppc44x based boards. Although I released it only with Canyonlands code, it would be ppc44x specific file. Do let me know if that is ok. Regards, Rup ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE:
Hi Wolfgang, The current mainline 2.6.36-rc3 does not report any error while building the SATA driver. Regards, Rup -Original Message- From: Rupjyoti Sarmah [mailto:rsar...@apm.com] Sent: Thursday, September 02, 2010 8:22 PM To: 'Wolfgang Denk' Cc: 'linuxppc-...@ozlabs.org'; 'Prodyut Hazarika'; 'Mark Miesfeld' Subject: RE: Hi Wolfgang, Sorry that I did not have a chance to check it recently. Regards, Rup -Original Message- From: Wolfgang Denk [mailto:w...@denx.de] Sent: Thursday, September 02, 2010 11:44 AM To: Rupjyoti Sarmah; Prodyut Hazarika; Mark Miesfeld Cc: linuxppc-...@ozlabs.org Subject: Re: Dear Rupjyoti, Prodyut, Mark, two weeks ago I wrote: In message 20100818205646.57783157...@gemini.denx.de you wrote: drivers/ata/sata_dwc_460ex.c fails to build in current mainline: ... Do you have any hints how to fix that? Any comments or ideas how to fix this? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Time is an illusion perpetrated by the manufacturers of space. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE:
Hi Wolfgang, Sorry that I did not have a chance to check it recently. Regards, Rup -Original Message- From: Wolfgang Denk [mailto:w...@denx.de] Sent: Thursday, September 02, 2010 11:44 AM To: Rupjyoti Sarmah; Prodyut Hazarika; Mark Miesfeld Cc: linuxppc-...@ozlabs.org Subject: Re: Dear Rupjyoti, Prodyut, Mark, two weeks ago I wrote: In message 20100818205646.57783157...@gemini.denx.de you wrote: drivers/ata/sata_dwc_460ex.c fails to build in current mainline: ... Do you have any hints how to fix that? Any comments or ideas how to fix this? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Time is an illusion perpetrated by the manufacturers of space. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH v2]460EX on-chip SATA driverresubmisison
Hi Sergei,
Thanks for your suggestions.
I would look into them and submit a patch for style improvement some time
later.
Regards,
Rup
-Original Message-
From: Sergei Shtylyov [mailto:sshtyl...@mvista.com]
Sent: Saturday, July 17, 2010 9:21 PM
To: Rupjyoti Sarmah
Cc: linux-...@vger.kernel.org; linux-ker...@vger.kernel.org;
rsar...@apm.com; jgar...@pobox.com; s...@denx.de; linuxppc-...@ozlabs.org
Subject: Re: [PATCH v2]460EX on-chip SATA driverresubmisison
Hello.
Rupjyoti Sarmah wrote:
This patch enables the on-chip DWC SATA controller of the AppliedMicro
processor 460EX.
Too bad thius has already been applied but here's my (mostly
stylistic)
comments anyway:
Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com
Signed-off-by: Mark Miesfeld mmiesf...@appliedmicro.com
Signed-off-by: Prodyut Hazarika phazar...@appliedmicro.com
[...]
diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c
new file mode 100644
index 000..ea24c1e
--- /dev/null
+++ b/drivers/ata/sata_dwc_460ex.c
@@ -0,0 +1,1756 @@
+/*
+ * drivers/ata/sata_dwc_460ex.c
Filenames in the heading comments have long been frowned upon.
+#ifdef CONFIG_SATA_DWC_DEBUG
I don't see this option defined anywahere.
+#define DEBUG
+#endif
+
+#ifdef CONFIG_SATA_DWC_VDEBUG
The same about this one.
+#define VERBOSE_DEBUG
+#define DEBUG_NCQ
+#endif
[...]
+/* SATA DMA driver Globals */
+#define DMA_NUM_CHANS1
+#define DMA_NUM_CHAN_REGS8
+
+/* SATA DMA Register definitions */
+#define AHB_DMA_BRST_DFLT64 /* 16 data items burst length*/
Please put a space before */.
+struct ahb_dma_regs {
+ struct dma_chan_regschan_regs[DMA_NUM_CHAN_REGS];
+ struct dma_interrupt_regs interrupt_raw;/* Raw Interrupt
*/
+ struct dma_interrupt_regs interrupt_status; /* Interrupt
Status */
+ struct dma_interrupt_regs interrupt_mask; /* Interrupt Mask
*/
+ struct dma_interrupt_regs interrupt_clear; /* Interrupt Clear
*/
+ struct dmareg statusInt; /* Interrupt combined*/
No camelCase please, rename it to status_int.
+#define DMA_CTL_BLK_TS(size)((size) 0x00FFF) /* Blk
Transfer size */
+#define DMA_CHANNEL(ch) (0x0001 (ch))/* Select
channel */
+ /* Enable channel */
+#define DMA_ENABLE_CHAN(ch) ((0x0001 (ch)) |
\
+ ((0x1 (ch)) 8))
+ /* Disable channel */
+#define DMA_DISABLE_CHAN(ch)(0x | ((0x1
(ch)) 8))
What's the point of OR'ing with zero?
+/*
+ * Commonly used DWC SATA driver Macros
+ */
+#define HSDEV_FROM_HOST(host) ((struct sata_dwc_device *)\
+ (host)-private_data)
+#define HSDEV_FROM_AP(ap) ((struct sata_dwc_device *)\
+ (ap)-host-private_data)
+#define HSDEVP_FROM_AP(ap) ((struct sata_dwc_device_port *)\
+ (ap)-private_data)
+#define HSDEV_FROM_QC(qc)((struct sata_dwc_device *)\
+ (qc)-ap-host-private_data)
+#define HSDEV_FROM_HSDEVP(p) ((struct sata_dwc_device *)\
+ (hsdevp)-hsdev)
Are you sure it's '(hsdevp)', not '(p)'?
+struct sata_dwc_host_priv {
+ void__iomem *scr_addr_sstatus;
+ u32 sata_dwc_sactive_issued ;
+ u32 sata_dwc_sactive_queued ;
Remove spaces befoer semicolons, please.
+static void sata_dwc_tf_dump(struct ata_taskfile *tf)
+{
+ dev_vdbg(host_pvt.dwc_dev, taskfile cmd: 0x%02x protocol: %s
flags:
+ 0x%lx device: %x\n, tf-command, ata_get_cmd_descript\
There's no need to use \ outside macro defintions.
+/*
+ * Function: get_burst_length_encode
+ * arguments: datalength: length in bytes of data
+ * returns value to be programmed in register corrresponding to data
length
+ * This value is effectively the log(base 2) of the length
+ */
+static int get_burst_length_encode(int datalength)
+{
+ int items = datalength 2;/* div by 4 to get lword count */
+
+ if (items = 64)
+ return 5;
+
+ if (items = 32)
+ return 4;
+
+ if (items = 16)
+ return 3;
+
+ if (items = 8)
+ return 2;
+
+ if (items = 4)
+ return 1;
+
+ return 0;
+}
Hmm, there should be a function in the kernel to calculate 2^n order
from
size, something like get_count_order()...
+/*
+ * Function: dma_dwc_interrupt
+ * arguments: irq, dev_id, pt_regs
+ * returns channel number if available else -1
+ * Interrupt Handler for DW AHB SATA DMA
+ */
+static irqreturn_t dma_dwc_interrupt(int irq, void *hsdev_instance)
+{
+ int chan;
+ u32 tfr_reg, err_reg;
+ unsigned long flags;
+ struct sata_dwc_device *hsdev =
+ (struct sata_dwc_device *)hsdev_instance
[PATCH v2]460EX on-chip SATA driverresubmisison
This patch enables the on-chip DWC SATA controller of the AppliedMicro
processor 460EX.
Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com
Signed-off-by: Mark Miesfeld mmiesf...@appliedmicro.com
Signed-off-by: Prodyut Hazarika phazar...@appliedmicro.com
---
This patch incorporates the changes advised in the mailing list. The device
tree changes were submitted as a seperate patch. Kconfig file is fixed in this
version.
drivers/ata/Kconfig |9 +
drivers/ata/Makefile |1 +
drivers/ata/sata_dwc_460ex.c | 1756 ++
3 files changed, 1766 insertions(+), 0 deletions(-)
create mode 100644 drivers/ata/sata_dwc_460ex.c
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index aa85a98..f06e313 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -187,6 +187,15 @@ config ATA_PIIX
If unsure, say N.
+config SATA_DWC
+ tristate DesignWare Cores SATA support
+ depends on 460EX
+ help
+ This option enables support for the on-chip SATA controller of the
+ AppliedMicro processor 460EX.
+
+ If unsure, say N.
+
config SATA_MV
tristate Marvell SATA support
help
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 7ef89d7..d863e66 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_SATA_AHCI_PLATFORM) += ahci_platform.o libahci.o
obj-$(CONFIG_SATA_FSL) += sata_fsl.o
obj-$(CONFIG_SATA_INIC162X)+= sata_inic162x.o
obj-$(CONFIG_SATA_SIL24) += sata_sil24.o
+obj-$(CONFIG_SATA_DWC) += sata_dwc_460ex.o
# SFF w/ custom DMA
obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c
new file mode 100644
index 000..ea24c1e
--- /dev/null
+++ b/drivers/ata/sata_dwc_460ex.c
@@ -0,0 +1,1756 @@
+/*
+ * drivers/ata/sata_dwc_460ex.c
+ *
+ * Synopsys DesignWare Cores (DWC) SATA host driver
+ *
+ * Author: Mark Miesfeld mmiesf...@amcc.com
+ *
+ * Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese s...@denx.de
+ * Copyright 2008 DENX Software Engineering
+ *
+ * Based on versions provided by AMCC and Synopsys which are:
+ * Copyright 2006 Applied Micro Circuits Corporation
+ * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifdef CONFIG_SATA_DWC_DEBUG
+#define DEBUG
+#endif
+
+#ifdef CONFIG_SATA_DWC_VDEBUG
+#define VERBOSE_DEBUG
+#define DEBUG_NCQ
+#endif
+
+#include linux/kernel.h
+#include linux/module.h
+#include linux/init.h
+#include linux/device.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/libata.h
+#include linux/slab.h
+#include libata.h
+
+#include scsi/scsi_host.h
+#include scsi/scsi_cmnd.h
+
+#define DRV_NAMEsata-dwc
+#define DRV_VERSION 1.0
+
+/* SATA DMA driver Globals */
+#define DMA_NUM_CHANS 1
+#define DMA_NUM_CHAN_REGS 8
+
+/* SATA DMA Register definitions */
+#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length*/
+
+struct dmareg {
+ u32 low;/* Low bits 0-31 */
+ u32 high; /* High bits 32-63 */
+};
+
+/* DMA Per Channel registers */
+struct dma_chan_regs {
+ struct dmareg sar; /* Source Address */
+ struct dmareg dar; /* Destination address */
+ struct dmareg llp; /* Linked List Pointer */
+ struct dmareg ctl; /* Control */
+ struct dmareg sstat;/* Source Status not implemented in core */
+ struct dmareg dstat;/* Destination Status not implemented in core*/
+ struct dmareg sstatar; /* Source Status Address not impl in core */
+ struct dmareg dstatar; /* Destination Status Address not implemente */
+ struct dmareg cfg; /* Config */
+ struct dmareg sgr; /* Source Gather */
+ struct dmareg dsr; /* Destination Scatter */
+};
+
+/* Generic Interrupt Registers */
+struct dma_interrupt_regs {
+ struct dmareg tfr; /* Transfer Interrupt */
+ struct dmareg block;/* Block Interrupt */
+ struct dmareg srctran; /* Source Transfer Interrupt */
+ struct dmareg dsttran; /* Dest Transfer Interrupt */
+ struct dmareg error;/* Error */
+};
+
+struct ahb_dma_regs {
+ struct dma_chan_regschan_regs[DMA_NUM_CHAN_REGS];
+ struct dma_interrupt_regs interrupt_raw;/* Raw Interrupt */
+ struct dma_interrupt_regs interrupt_status; /* Interrupt Status */
+ struct dma_interrupt_regs interrupt_mask; /* Interrupt Mask */
+ struct dma_interrupt_regs interrupt_clear; /* Interrupt Clear */
+ struct dmareg statusInt
RE: [PATCH v1]460EX on-chip SATA driverresubmisison
Dear All, The Synopsis design ware core is task file orientated so the driver would still need CONFIG_ATA_SFF. I would be fixing the Kconfig file to make it dependent on the CONFIG_ATA_SFF. Regards, Rup -Original Message- From: Wolfgang Denk [mailto:w...@denx.de] Sent: Thursday, July 01, 2010 4:25 AM To: Josh Boyer Cc: Jeff Garzik; linux-...@vger.kernel.org; s...@denx.de; Rupjyoti Sarmah; linux-ker...@vger.kernel.org; linuxppc-...@ozlabs.org Subject: Re: [PATCH v1]460EX on-chip SATA driverresubmisison Dear Josh Boyer, In message 20100630200325.gd7...@zod.rchland.ibm.com you wrote: The driver doesn't depend on CONFIG_ATA_SFF in it's Kconfig file, but seems to require it at build time. Isn't that something that needs fixing in the driver? Right. Next question is if this is really needed for this driver. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Copy from one, it's plagiarism; copy from two, it's research. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH v1]460EX on-chip SATA driverresubmisison
Hi Wolfgang, I took the mainline kernel v2.6.35-rc3 and downloaded using the git download link. I created the patch on 6/24/2010 after doing a git pull. With the kernel tree on 6/24/2010 the driver compiled. I also tested the functionality on the SATA drive it worked. Regards, Rup -Original Message- From: Wolfgang Denk [mailto:w...@denx.de] Sent: Wednesday, June 30, 2010 5:28 PM To: Rupjyoti Sarmah Cc: linux-...@vger.kernel.org; linux-ker...@vger.kernel.org; jgar...@pobox.com; s...@denx.de; rsar...@apm.com; linuxppc-...@ozlabs.org Subject: Re: [PATCH v1]460EX on-chip SATA driverresubmisison Dear Rupjyoti Sarmah, In message 201006241327.o5odry6m032...@amcc.com you wrote: This patch enables the on-chip DWC SATA controller of the AppliedMicro processor 460EX. Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com Signed-off-by: Mark Miesfeld mmiesf...@appliedmicro.com Signed-off-by: Prodyut Hazarika phazar...@appliedmicro.com --- This patch incorporates the changes advised in the mailing list. The device tree changes were submitted as a seperate patch. Which kernel is this patch supposed to be applied to? Using current mainline (v2.6.35-rc3-262-g984bc96) the patch applies without problems, but when I enable it in the kernel configuration I get this: drivers/ata/sata_dwc_460ex.c:43:1: warning: DRV_NAME redefined In file included from drivers/ata/sata_dwc_460ex.c:38: drivers/ata/libata.h:31:1: warning: this is the location of the previous definition drivers/ata/sata_dwc_460ex.c:44:1: warning: DRV_VERSION redefined drivers/ata/libata.h:32:1: warning: this is the location of the previous definition drivers/ata/sata_dwc_460ex.c: In function 'sata_dwc_scr_read': drivers/ata/sata_dwc_460ex.c:777: error: 'struct ata_port' has no member named 'ioaddr' drivers/ata/sata_dwc_460ex.c: In function 'sata_dwc_scr_write': drivers/ata/sata_dwc_460ex.c:793: error: 'struct ata_port' has no member named 'ioaddr' drivers/ata/sata_dwc_460ex.c: In function 'sata_dwc_error_intr': drivers/ata/sata_dwc_460ex.c:844: error: 'struct ata_port_operations' has no member named 'sff_check_status' drivers/ata/sata_dwc_460ex.c: In function 'sata_dwc_isr': drivers/ata/sata_dwc_460ex.c:953: error: 'struct ata_port_operations' has no member named 'sff_check_status' drivers/ata/sata_dwc_460ex.c:957: error: 'struct ata_port_operations' has no member named 'sff_check_status' drivers/ata/sata_dwc_460ex.c:991: error: implicit declaration of function 'ata_sff_hsm_move' drivers/ata/sata_dwc_460ex.c:1030: error: 'struct ata_port_operations' has no member named 'sff_check_status' drivers/ata/sata_dwc_460ex.c: At top level: drivers/ata/sata_dwc_460ex.c:1213: warning: 'struct ata_ioports' declared inside parameter list drivers/ata/sata_dwc_460ex.c:1213: warning: its scope is only this definition or declaration, which is probably not what you want drivers/ata/sata_dwc_460ex.c: In function 'sata_dwc_setup_port': drivers/ata/sata_dwc_460ex.c:1215: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1216: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1218: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1219: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1221: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1223: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1224: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1225: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1227: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1228: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1229: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1231: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c:1232: error: dereferencing pointer to incomplete type drivers/ata/sata_dwc_460ex.c: In function 'sata_dwc_port_start': drivers/ata/sata_dwc_460ex.c:1273: error: 'struct ata_port' has no member named 'bmdma_prd' drivers/ata/sata_dwc_460ex.c:1274: error: 'struct ata_port' has no member named 'bmdma_prd_dma' drivers/ata/sata_dwc_460ex.c: In function 'sata_dwc_exec_command_by_tag': drivers/ata/sata_dwc_460ex.c:1356: warning: passing argument 1 of 'ata_get_cmd_descript' makes integer from pointer without a cast drivers/ata/sata_dwc_460ex.c:1369: error: implicit declaration of function 'ata_sff_exec_command' drivers/ata/sata_dwc_460ex.c: In function 'sata_dwc_qc_issue': drivers/ata/sata_dwc_460ex.c:1512: error: 'struct ata_port_operations' has no member named 'sff_tf_load' drivers/ata/sata_dwc_460ex.c:1516: error: implicit declaration of function 'ata_sff_qc_issue' drivers/ata/sata_dwc_460ex.c: In function 'sata_dwc_error_handler': drivers/ata/sata_dwc_460ex.c:1545: error: implicit declaration of function
RE: [PATCH]460EX on-chip SATA driverkernel 2.6.33resubmission
Hi, Thanks for your feedback. I submitted an updated version of this patch later. I tried to limit the lines within 80 characters. Regards, Rup -Original Message- From: Marek Vasut [mailto:marek.va...@gmail.com] Sent: Tuesday, June 29, 2010 7:04 AM To: Rupjyoti Sarmah Cc: linux-...@vger.kernel.org; linux-ker...@vger.kernel.org; jgar...@pobox.com; s...@denx.de; linuxppc-...@ozlabs.org Subject: Re: [PATCH]460EX on-chip SATA driverkernel 2.6.33resubmission Dne Pá 4. června 2010 14:26:17 Rupjyoti Sarmah napsal(a): This patch enables the on-chip DWC SATA controller of the AppliedMicro processor 460EX. Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com Signed-off-by: Mark Miesfeld mmiesf...@appliedmicro.com Signed-off-by: Prodyut Hazarika phazar...@appliedmicro.com --SNIP-- + dev_err(ap-dev, %s: Command not pending cmd_issued=%d + (tag=%d) DMA NOT started\n, __func__, + hsdevp-cmd_issued[tag], tag); Just a nitpick, but don't break strings if possible. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v1]460EX on-chip SATA driverresubmisison
This patch enables the on-chip DWC SATA controller of the AppliedMicro
processor 460EX.
Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com
Signed-off-by: Mark Miesfeld mmiesf...@appliedmicro.com
Signed-off-by: Prodyut Hazarika phazar...@appliedmicro.com
---
This patch incorporates the changes advised in the mailing list. The device
tree changes were submitted as a seperate patch.
drivers/ata/Kconfig |9 +
drivers/ata/Makefile |1 +
drivers/ata/sata_dwc_460ex.c | 1756 ++
3 files changed, 1766 insertions(+), 0 deletions(-)
create mode 100644 drivers/ata/sata_dwc_460ex.c
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index aa85a98..29e29a2 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -98,6 +98,15 @@ config SATA_SIL24
If unsure, say N.
+config SATA_DWC
+ tristate DesignWare Cores SATA support
+ depends on 460EX
+ help
+ This option enables support for the on-chip SATA controller of the
+ AppliedMicro processor 460EX.
+
+ If unsure, say N.
+
config ATA_SFF
bool ATA SFF support
default y
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 7ef89d7..d863e66 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_SATA_AHCI_PLATFORM) += ahci_platform.o libahci.o
obj-$(CONFIG_SATA_FSL) += sata_fsl.o
obj-$(CONFIG_SATA_INIC162X)+= sata_inic162x.o
obj-$(CONFIG_SATA_SIL24) += sata_sil24.o
+obj-$(CONFIG_SATA_DWC) += sata_dwc_460ex.o
# SFF w/ custom DMA
obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c
new file mode 100644
index 000..ea24c1e
--- /dev/null
+++ b/drivers/ata/sata_dwc_460ex.c
@@ -0,0 +1,1756 @@
+/*
+ * drivers/ata/sata_dwc_460ex.c
+ *
+ * Synopsys DesignWare Cores (DWC) SATA host driver
+ *
+ * Author: Mark Miesfeld mmiesf...@amcc.com
+ *
+ * Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese s...@denx.de
+ * Copyright 2008 DENX Software Engineering
+ *
+ * Based on versions provided by AMCC and Synopsys which are:
+ * Copyright 2006 Applied Micro Circuits Corporation
+ * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifdef CONFIG_SATA_DWC_DEBUG
+#define DEBUG
+#endif
+
+#ifdef CONFIG_SATA_DWC_VDEBUG
+#define VERBOSE_DEBUG
+#define DEBUG_NCQ
+#endif
+
+#include linux/kernel.h
+#include linux/module.h
+#include linux/init.h
+#include linux/device.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/libata.h
+#include linux/slab.h
+#include libata.h
+
+#include scsi/scsi_host.h
+#include scsi/scsi_cmnd.h
+
+#define DRV_NAMEsata-dwc
+#define DRV_VERSION 1.0
+
+/* SATA DMA driver Globals */
+#define DMA_NUM_CHANS 1
+#define DMA_NUM_CHAN_REGS 8
+
+/* SATA DMA Register definitions */
+#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length*/
+
+struct dmareg {
+ u32 low;/* Low bits 0-31 */
+ u32 high; /* High bits 32-63 */
+};
+
+/* DMA Per Channel registers */
+struct dma_chan_regs {
+ struct dmareg sar; /* Source Address */
+ struct dmareg dar; /* Destination address */
+ struct dmareg llp; /* Linked List Pointer */
+ struct dmareg ctl; /* Control */
+ struct dmareg sstat;/* Source Status not implemented in core */
+ struct dmareg dstat;/* Destination Status not implemented in core*/
+ struct dmareg sstatar; /* Source Status Address not impl in core */
+ struct dmareg dstatar; /* Destination Status Address not implemente */
+ struct dmareg cfg; /* Config */
+ struct dmareg sgr; /* Source Gather */
+ struct dmareg dsr; /* Destination Scatter */
+};
+
+/* Generic Interrupt Registers */
+struct dma_interrupt_regs {
+ struct dmareg tfr; /* Transfer Interrupt */
+ struct dmareg block;/* Block Interrupt */
+ struct dmareg srctran; /* Source Transfer Interrupt */
+ struct dmareg dsttran; /* Dest Transfer Interrupt */
+ struct dmareg error;/* Error */
+};
+
+struct ahb_dma_regs {
+ struct dma_chan_regschan_regs[DMA_NUM_CHAN_REGS];
+ struct dma_interrupt_regs interrupt_raw;/* Raw Interrupt */
+ struct dma_interrupt_regs interrupt_status; /* Interrupt Status */
+ struct dma_interrupt_regs interrupt_mask; /* Interrupt Mask */
+ struct dma_interrupt_regs interrupt_clear; /* Interrupt Clear */
+ struct dmareg statusInt; /* Interrupt combined*/
+ struct dmareg
RE: [PATCH]Device tree update for the 460ex DWC SATAresubmission
Hi Josh, There was a suggestion from Sergei, I incorporated and resubmitted. Regards, Rup -Original Message- From: Josh Boyer [mailto:jwbo...@linux.vnet.ibm.com] Sent: Monday, June 07, 2010 12:18 AM To: Rupjyoti Sarmah Cc: linux-...@vger.kernel.org; linux-ker...@vger.kernel.org; linuxppc-...@ozlabs.org; s...@denx.de; rsar...@apm.com Subject: Re: [PATCH]Device tree update for the 460ex DWC SATAresubmission On Fri, Jun 04, 2010 at 03:33:12PM +0530, Rupjyoti Sarmah wrote: Device tree update for the Applied micro processor 460ex on-chip SATA Signed-off-by: Rupjyoti Sarmah rsar...@amcc.com You sent this same patch twice. Mistake, or was there supposed to be a difference? josh CONFIDENTIALITY NOTICE: This e-mail message, including any attachments, is for the sole use of the intended recipient(s) and contains information that is confidential and proprietary to AppliedMicro Corporation or its subsidiaries. It is to be used solely for the purpose of furthering the parties' business relationship. All unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH]Device tree update for the 460ex DWC SATAresubmission
Device tree update for the Applied micro processor 460ex on-chip SATA
Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com
---
arch/powerpc/boot/dts/canyonlands.dts |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index cd56bb5..3f86564 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -163,6 +163,14 @@
interrupts = 0x1e 4;
};
+ SATA0: s...@bffd1000 {
+ compatible = amcc,sata-460ex;
+ reg = 4 0xbffd1000 0x800 4 0xbffd0800 0x400;
+ interrupt-parent = UIC3;
+ interrupts = 0x0 0x4 /* SATA */
+ 0x5 0x4; /* AHBDMA */
+ };
+
POB0: opb {
compatible = ibm,opb-460ex, ibm,opb;
#address-cells = 1;
--
1.5.6.3
___
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https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH]Device tree update for the 460ex DWC SATAresubmission
Device tree update for the Applied micro processor 460ex on-chip SATA
Signed-off-by: Rupjyoti Sarmah rsar...@amcc.com
---
arch/powerpc/boot/dts/canyonlands.dts |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index cd56bb5..3f86564 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -163,6 +163,14 @@
interrupts = 0x1e 4;
};
+ SATA0: s...@bffd1000 {
+ compatible = amcc,sata-460ex;
+ reg = 4 0xbffd1000 0x800 4 0xbffd0800 0x400;
+ interrupt-parent = UIC3;
+ interrupts = 0x0 0x4 /* SATA */
+ 0x5 0x4; /* AHBDMA */
+ };
+
POB0: opb {
compatible = ibm,opb-460ex, ibm,opb;
#address-cells = 1;
--
1.5.6.3
___
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[PATCH]460EX on-chip SATA driverkernel 2.6.33resubmission
This patch enables the on-chip DWC SATA controller of the AppliedMicro
processor 460EX.
Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com
Signed-off-by: Mark Miesfeld mmiesf...@appliedmicro.com
Signed-off-by: Prodyut Hazarika phazar...@appliedmicro.com
---
drivers/ata/Kconfig |9 +
drivers/ata/Makefile |1 +
drivers/ata/sata_dwc_460ex.c | 1808 ++
3 files changed, 1818 insertions(+), 0 deletions(-)
create mode 100644 drivers/ata/sata_dwc_460ex.c
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 56c6374..bba7b8a 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -82,6 +82,15 @@ config SATA_FSL
If unsure, say N.
+config SATA_DWC
+ tristate DesignWare Cores SATA support
+ depends on 460EX
+ help
+ This option enables support for the on-chip SATA controller of the
+ AppliedMicro processor 460EX.
+
+ If unsure, say N.
+
config ATA_SFF
bool ATA SFF support
default y
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index fc936d4..96ff315 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o
obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
obj-$(CONFIG_SATA_FSL) += sata_fsl.o
obj-$(CONFIG_PATA_MACIO) += pata_macio.o
+obj-$(CONFIG_SATA_DWC) += sata_dwc_460ex.o
obj-$(CONFIG_PATA_ALI) += pata_ali.o
obj-$(CONFIG_PATA_AMD) += pata_amd.o
diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c
new file mode 100644
index 000..e6e2896
--- /dev/null
+++ b/drivers/ata/sata_dwc_460ex.c
@@ -0,0 +1,1808 @@
+/*
+ * drivers/ata/sata_dwc_460ex.c
+ *
+ * Synopsys DesignWare Cores (DWC) SATA host driver
+ *
+ * Author: Mark Miesfeld mmiesf...@amcc.com
+ *
+ * Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese s...@denx.de
+ * Copyright 2008 DENX Software Engineering
+ *
+ * Based on versions provided by AMCC and Synopsys which are:
+ * Copyright 2006 Applied Micro Circuits Corporation
+ * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifdef CONFIG_SATA_DWC_DEBUG
+#define DEBUG
+#endif
+
+#ifdef CONFIG_SATA_DWC_VDEBUG
+#define VERBOSE_DEBUG
+#define DEBUG_NCQ
+#endif
+
+#include linux/kernel.h
+#include linux/module.h
+#include linux/init.h
+#include linux/device.h
+#include linux/of_platform.h
+#include linux/libata.h
+#include libata.h
+
+#include scsi/scsi_host.h
+#include scsi/scsi_cmnd.h
+
+#define DRV_NAMEsata-dwc
+#define DRV_VERSION 1.0
+
+/* SATA DMA driver Globals */
+#define DMA_NUM_CHANS 1
+#define DMA_NUM_CHAN_REGS 8
+
+/* SATA DMA Register definitions */
+#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length*/
+
+struct dmareg {
+ u32 low;/* Low bits 0-31 */
+ u32 high; /* High bits 32-63 */
+};
+
+/* DMA Per Channel registers */
+
+struct dma_chan_regs {
+ struct dmareg sar; /* Source Address */
+ struct dmareg dar; /* Destination address */
+ struct dmareg llp; /* Linked List Pointer */
+ struct dmareg ctl; /* Control */
+ struct dmareg sstat;/* Source Status not implemented in core */
+ struct dmareg dstat;/* Destination Status not implemented in core*/
+ struct dmareg sstatar; /* Source Status Address not impl in core */
+ struct dmareg dstatar; /* Destination Status Address not implemente */
+ struct dmareg cfg; /* Config */
+ struct dmareg sgr; /* Source Gather */
+ struct dmareg dsr; /* Destination Scatter */
+};
+
+/* Generic Interrupt Registers */
+struct dma_interrupt_regs {
+ struct dmareg tfr; /* Transfer Interrupt */
+ struct dmareg block;/* Block Interrupt */
+ struct dmareg srctran; /* Source Transfer Interrupt */
+ struct dmareg dsttran; /* Dest Transfer Interrupt */
+ struct dmareg error;/* Error */
+};
+
+struct ahb_dma_regs {
+ struct dma_chan_regschan_regs[DMA_NUM_CHAN_REGS];
+ struct dma_interrupt_regs interrupt_raw;/* Raw Interrupt */
+ struct dma_interrupt_regs interrupt_status; /* Interrupt Status */
+ struct dma_interrupt_regs interrupt_mask; /* Interrupt Mask */
+ struct dma_interrupt_regs interrupt_clear; /* Interrupt Clear */
+ struct dmareg statusInt; /* Interrupt combined*/
+ struct dmareg rq_srcreg; /* Src Trans Req */
+ struct dmareg rq_dstreg; /* Dst Trans Req */
+ struct dmareg rq_sgl_srcreg; /* Sngl Src
[PATCH]Device tree update for the 460ex DWC SATA
Device tree update for the Applied micro processor 460ex on-chip SATA.
Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com
---
arch/powerpc/boot/dts/canyonlands.dts |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index cd56bb5..d3b2c99 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -163,6 +163,14 @@
interrupts = 0x1e 4;
};
+ SATA0: s...@bffd1000 {
+compatible = amcc,sata-460ex;
+ reg = 4 0xbffd1000 0x800 4 0xbffd0800 0x400;
+interrupt-parent = UIC3;
+interrupts = 0x0 0x4 /* SATA */
+ 0x5 0x4; /* AHBDMA */
+};
+
POB0: opb {
compatible = ibm,opb-460ex, ibm,opb;
#address-cells = 1;
--
1.5.6.3
___
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[PATCH]460EX on-chip SATA driver Kernel 2.6.33 resubmission
This patch enables the on-chip DWC SATA controller of the AppliedMicro
processor 460EX.
Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com
Signed-off-by: Mark Miesfeld mmiesf...@appliedmicro.com
Signed-off-by: Prodyut Hazarika phazar...@appliedmicro.com
---
arch/powerpc/boot/dts/canyonlands.dts |8 +
drivers/ata/Kconfig |9 +
drivers/ata/Makefile |1 +
drivers/ata/sata_dwc.c| 1827 +
4 files changed, 1845 insertions(+), 0 deletions(-)
create mode 100644 drivers/ata/sata_dwc.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index cd56bb5..d3b2c99 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -163,6 +163,14 @@
interrupts = 0x1e 4;
};
+ SATA0: s...@bffd1000 {
+compatible = amcc,sata-460ex;
+ reg = 4 0xbffd1000 0x800 4 0xbffd0800 0x400;
+interrupt-parent = UIC3;
+interrupts = 0x0 0x4 /* SATA */
+ 0x5 0x4; /* AHBDMA */
+};
+
POB0: opb {
compatible = ibm,opb-460ex, ibm,opb;
#address-cells = 1;
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 56c6374..bba7b8a 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -82,6 +82,15 @@ config SATA_FSL
If unsure, say N.
+config SATA_DWC
+ tristate DesignWare Cores SATA support
+ depends on 460EX
+ help
+ This option enables support for the on-chip SATA controller of the
+ AppliedMicro processor 460EX.
+
+ If unsure, say N.
+
config ATA_SFF
bool ATA SFF support
default y
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index fc936d4..0de7a33 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o
obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
obj-$(CONFIG_SATA_FSL) += sata_fsl.o
obj-$(CONFIG_PATA_MACIO) += pata_macio.o
+obj-$(CONFIG_SATA_DWC) += sata_dwc.o
obj-$(CONFIG_PATA_ALI) += pata_ali.o
obj-$(CONFIG_PATA_AMD) += pata_amd.o
diff --git a/drivers/ata/sata_dwc.c b/drivers/ata/sata_dwc.c
new file mode 100644
index 000..e499ac6
--- /dev/null
+++ b/drivers/ata/sata_dwc.c
@@ -0,0 +1,1827 @@
+/*
+ * drivers/ata/sata_dwc.c
+ *
+ * Synopsys DesignWare Cores (DWC) SATA host driver
+ *
+ * Author: Mark Miesfeld mmiesf...@amcc.com
+ *
+ * Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese s...@denx.de
+ * Copyright 2008 DENX Software Engineering
+ *
+ * Based on versions provided by AMCC and Synopsys which are:
+ * Copyright 2006 Applied Micro Circuits Corporation
+ * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifdef CONFIG_SATA_DWC_DEBUG
+#define DEBUG
+#endif
+
+#ifdef CONFIG_SATA_DWC_VDEBUG
+#define VERBOSE_DEBUG
+#define DEBUG_NCQ
+#endif
+
+#include linux/kernel.h
+#include linux/module.h
+#include linux/init.h
+#include linux/device.h
+#include linux/of_platform.h
+#include linux/libata.h
+#include libata.h
+
+#include scsi/scsi_host.h
+#include scsi/scsi_cmnd.h
+
+#define DRV_NAMEsata-dwc
+#define DRV_VERSION 1.0
+
+/* SATA DMA driver Globals */
+#define DMA_NUM_CHANS 1
+#define DMA_NUM_CHAN_REGS 8
+
+/* SATA DMA Register definitions */
+#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length*/
+
+struct dmareg {
+ u32 low;/* Low bits 0-31 */
+ u32 high; /* High bits 32-63 */
+};
+
+/* DMA Per Channel registers */
+
+struct dma_chan_regs {
+ struct dmareg sar; /* Source Address */
+ struct dmareg dar; /* Destination address */
+ struct dmareg llp; /* Linked List Pointer */
+ struct dmareg ctl; /* Control */
+ struct dmareg sstat;/* Source Status not implemented in core */
+ struct dmareg dstat;/* Destination Status not implemented in core*/
+ struct dmareg sstatar; /* Source Status Address not impl in core */
+ struct dmareg dstatar; /* Destination Status Address not implemente */
+ struct dmareg cfg; /* Config */
+ struct dmareg sgr; /* Source Gather */
+ struct dmareg dsr; /* Destination Scatter */
+};
+
+/* Generic Interrupt Registers */
+struct dma_interrupt_regs {
+ struct dmareg tfr; /* Transfer Interrupt */
+ struct dmareg block;/* Block Interrupt */
+ struct
RE: [PATCH] 460EX on-chip SATA driverkernel 2.6.33 resubmission : 02
Hi Jeff,
Thanks. I would go through your suggestions and resubmit a newer
version.
Regards,
Rup
-Original Message-
From: Jeff Garzik [mailto:jgpo...@gmail.com] On Behalf Of Jeff Garzik
Sent: Tuesday, April 06, 2010 8:46 PM
To: Rupjyoti Sarmah
Cc: linux-...@vger.kernel.org; linux-ker...@vger.kernel.org; s...@denx.de;
linuxppc-...@ozlabs.org
Subject: Re: [PATCH] 460EX on-chip SATA driverkernel 2.6.33
resubmission : 02
On 04/06/2010 07:41 AM, Rupjyoti Sarmah wrote:
General comment: remove inline and let the compiler select those
functions that need it.
+struct sata_dwc_host_priv {
+
+ void __iomem *scr_addr_sstatus;
+ u32 sata_dwc_sactive_issued;
+ u32 sata_dwc_sactive_queued;
+ u32 dma_interrupt_count;
+ struct ahb_dma_regs *sata_dma_regs;
+ struct device *dwc_dev;
+
+};
use proper indentation (separate type from member name with tabs)
+struct sata_dwc_host_priv host_pvt;
+
+/*
+ * Prototypes
+ */
+static void sata_dwc_bmdma_start_by_tag(struct ata_queued_cmd *qc, u8
tag);
+static int sata_dwc_qc_complete(struct ata_port *ap, struct
ata_queued_cmd *qc,
+ u32 check_status);
+static void sata_dwc_dma_xfer_complete(struct ata_port *ap, u32
check_status);
+static void sata_dwc_port_stop(struct ata_port *ap);
+static void sata_dwc_clear_dmacr(struct sata_dwc_device_port *hsdevp,
u8 tag);
+
+static int dma_dwc_init(struct sata_dwc_device *hsdev, int irq);
+static void dma_dwc_exit(struct sata_dwc_device *hsdev);
+static int dma_dwc_xfer_setup(struct scatterlist *sg, int num_elems,
+ struct lli *lli, dma_addr_t dma_lli,
+ void __iomem *addr, int dir);
+static void dma_dwc_xfer_start(int dma_ch);
+
+static const char *dir_2_txt(enum dma_data_direction dir)
+{
+ switch (dir) {
+ case DMA_BIDIRECTIONAL:
+ return bi;
+ case DMA_FROM_DEVICE:
+ return from;
+ case DMA_TO_DEVICE:
+ return to;
+ case DMA_NONE:
+ return none;
+ default:
+ return err;
+ }
+}
+
+static const char *prot_2_txt(enum ata_tf_protocols protocol)
+{
+ switch (protocol) {
+ case ATA_PROT_UNKNOWN:
+ return unknown;
+ case ATA_PROT_NODATA:
+ return nodata;
+ case ATA_PROT_PIO:
+ return pio;
+ case ATA_PROT_DMA:
+ return dma;
+ case ATA_PROT_NCQ:
+ return ncq;
+ case ATAPI_PROT_PIO:
+ return atapi pio;
+ case ATAPI_PROT_NODATA:
+ return atapi nodata;
+ case ATAPI_PROT_DMA:
+ return atapi dma;
+ default:
+ return err;
+ }
+}
+
+inline const char *ata_cmd_2_txt(const struct ata_taskfile *tf)
+{
+ switch (tf-command) {
+ case ATA_CMD_CHK_POWER:
+ return ATA_CMD_CHK_POWER;
+ case ATA_CMD_EDD:
+ return ATA_CMD_EDD;
+ case ATA_CMD_FLUSH:
+ return ATA_CMD_FLUSH;
+ case ATA_CMD_FLUSH_EXT:
+ return ATA_CMD_FLUSH_EXT;
+ case ATA_CMD_ID_ATA:
+ return ATA_CMD_ID_ATA;
+ case ATA_CMD_ID_ATAPI:
+ return ATA_CMD_ID_ATAPI;
+ case ATA_CMD_FPDMA_READ:
+ return ATA_CMD_FPDMA_READ;
+ case ATA_CMD_FPDMA_WRITE:
+ return ATA_CMD_FPDMA_WRITE;
+ case ATA_CMD_READ:
+ return ATA_CMD_READ;
+ case ATA_CMD_READ_EXT:
+ return ATA_CMD_READ_EXT;
+ case ATA_CMD_READ_NATIVE_MAX_EXT:
+ return ATA_CMD_READ_NATIVE_MAX_EXT;
+ case ATA_CMD_VERIFY_EXT:
+ return ATA_CMD_VERIFY_EXT;
+ case ATA_CMD_WRITE:
+ return ATA_CMD_WRITE;
+ case ATA_CMD_WRITE_EXT:
+ return ATA_CMD_WRITE_EXT;
+ case ATA_CMD_PIO_READ:
+ return ATA_CMD_PIO_READ;
+ case ATA_CMD_PIO_READ_EXT:
+ return ATA_CMD_PIO_READ_EXT;
+ case ATA_CMD_PIO_WRITE:
+ return ATA_CMD_PIO_WRITE;
+ case ATA_CMD_PIO_WRITE_EXT:
+ return ATA_CMD_PIO_WRITE_EXT;
+ case ATA_CMD_SET_FEATURES:
+ return ATA_CMD_SET_FEATURES;
+ case ATA_CMD_PACKET:
+ return ATA_CMD_PACKET;
+ default:
+ return ATA_CMD_???;
+ }
use ata_get_cmd_descript() rather than duplicating it
+static irqreturn_t dma_dwc_interrupt(int irq, void *hsdev_instance)
+{
+ int chan;
+ u32 tfr_reg, err_reg;
+
+ struct sata_dwc_device *hsdev =
+ (struct sata_dwc_device *) hsdev_instance;
+ struct ata_host *host = (struct ata_host *) hsdev-host;
+ struct ata_port *ap;
+ struct sata_dwc_device_port *hsdevp;
+ u8 tag = 0;
+ unsigned int port = 0;
+ struct sata_dwc_host_priv *hp;
+ hp = kmalloc(sizeof(*hp), GFP_KERNEL);
1) interrupt is not GFP_KERNEL
2) you must failure kmalloc failure
3) it is not clear to me where you
RE: [PATCH] 460EX on-chip SATA driverkernel 2.6.33 resubmission : 01
Hi Stephen, Thanks for your suggestions. I used git-send-email earlier and emails never appeared in the archive. This time I sent through outlook the message appeared in the archive. Looks like outlook did that word wrap. I am not sure why the emails from the git-send-email did not get delivered. At the time of sending I got message delivered logs. Regards, Rupjyoti Sarmah -Original Message- From: Stephen Rothwell [mailto:s...@canb.auug.org.au] Sent: Wednesday, March 17, 2010 10:30 AM To: Rupjyoti Sarmah Cc: linux-...@vger.kernel.org; Jeff Garzik; Rupjyoti Sarmah; linuxppc-...@ozlabs.org; Rupjyoti Sarmah; linux-ker...@vger.kernel.org Subject: Re: [PATCH] 460EX on-chip SATA driverkernel 2.6.33 resubmission : 01 Hi, Just a couple of quick points ... On Tue, 16 Mar 2010 21:23:16 -0700 Rupjyoti Sarmah rsar...@amcc.com wrote: This patch enables the on-chip DWC SATA controller of the AppliedMicro processor 460EX. Signed-off-by: Rupjyoti Sarmah rsar...@appliedmicro.com ,Mark Miesfeld mmiesf...@appliedmicro.com, Prodyut Hazarika phazar...@appliedmicro.com Please put one Signed-off-by line per person. --- arch/powerpc/boot/dts/canyonlands.dts |8 + drivers/ata/Kconfig |9 + drivers/ata/Makefile |1 + drivers/ata/sata_dwc.c| 1965 + 4 files changed, 1983 insertions(+), 0 deletions(-) create mode 100644 drivers/ata/sata_dwc.c This patch has been word wrapped by your mailer (or something along the way). -- Cheers, Stephen Rothwells...@canb.auug.org.au http://www.canb.auug.org.au/~sfr/ ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
