Re: [PATCH ppc-next] powerpc/fsl-booke: don't load early TLB at once

[York Sun]

On 09/21/2018 10:47 AM, Scott Wood wrote:
> On Fri, 2018-09-21 at 17:40 +0000, York Sun wrote:
>> On 09/20/2018 05:31 PM, Scott Wood wrote:
>>> On Fri, 2018-09-21 at 00:48 +0200, David Lamparter wrote:
>>>> This is a *partial* revert of "powerpc/85xx: Load all early TLB entries
>>>> at once" (d9e1831a420267a7ced708bb259d65b0a3c0344d.)
>>>>
>>>> My dusty old P4080DS just completely fails to boot (no output at all)
>>>> without this revert.  I have no clue what's going on here, I just
>>>> bisected it down and since it looks like an optimization to me I just
>>>> reverted it - and voilá, the P4080 boots again.
>>>
>>> It's not an optimization; it was required to get kdump working, at least
>>> for certain choices of crash kernel location.  I just tried booting a 32-
>>> bit kernel and did not see this problem -- but I don't have access to a
>>> p4080ds anymore.  I tried with qemu e500mc, and also running a 32-bit
>>> kernel on e6500 (needs a tiny change to get past SMP init, since 32-bit
>>> isn't really supported on e6500, but you do get output even without that).
>>>
>>> Do you have a JTAG that can be used to find out where it's hanging?  If
>>> not, I can try to get early debug working (needs an early IOMMU mapping).
>>>
>>> York, can you try booting the latest kernel on p4080ds?
>>>
>>
>> Scott,
>>
>> I haven't tried P4080DS for a long time. What defconfig do you use for
>> this board? I tried latest master branch (commit a27fb6d983c7b5) with
>> corenet_basic_defconfig, it didn't boot up. Kernel has an exception very
>> early (pc ae80).
>>
>> However, before I claimed the board, someone booted Linux 4.14.71 on
>> this board. I need to track down where the image came from.
> 
> Use corenet32_smp_defconfig
> 
> corenet_basic_defconfig is just a fragment used by the makefiles in assembling
> the final config.
> 

Thanks for the instruction. Linux comes up OK with corenet32_smp_defconfig.

root@p4080ds:~# uname -a
Linux p4080ds 4.19.0-rc4-00206-ga27fb6d #1 SMP Fri Sep 21 10:56:36 PDT
2018 ppc GNU/Linux

York

Re: [PATCH ppc-next] powerpc/fsl-booke: don't load early TLB at once

[York Sun]

On 09/20/2018 05:31 PM, Scott Wood wrote:
> On Fri, 2018-09-21 at 00:48 +0200, David Lamparter wrote:
>> This is a *partial* revert of "powerpc/85xx: Load all early TLB entries
>> at once" (d9e1831a420267a7ced708bb259d65b0a3c0344d.)
>>
>> My dusty old P4080DS just completely fails to boot (no output at all)
>> without this revert.  I have no clue what's going on here, I just
>> bisected it down and since it looks like an optimization to me I just
>> reverted it - and voilá, the P4080 boots again.
> 
> It's not an optimization; it was required to get kdump working, at least
> for certain choices of crash kernel location.  I just tried booting a 32-
> bit kernel and did not see this problem -- but I don't have access to a
> p4080ds anymore.  I tried with qemu e500mc, and also running a 32-bit
> kernel on e6500 (needs a tiny change to get past SMP init, since 32-bit
> isn't really supported on e6500, but you do get output even without that).
> 
> Do you have a JTAG that can be used to find out where it's hanging?  If
> not, I can try to get early debug working (needs an early IOMMU mapping).
> 
> York, can you try booting the latest kernel on p4080ds?
> 

Scott,

I haven't tried P4080DS for a long time. What defconfig do you use for
this board? I tried latest master branch (commit a27fb6d983c7b5) with
corenet_basic_defconfig, it didn't boot up. Kernel has an exception very
early (pc ae80).

However, before I claimed the board, someone booted Linux 4.14.71 on
this board. I need to track down where the image came from.

York

Re: [PATCH] QE GPIO: Add qe_gpio_set_multiple

[York Sun]

+Leo

On 07/03/2018 03:30 AM, Joakim Tjernlund wrote:
> On Tue, 2018-06-26 at 23:41 +1000, Michael Ellerman wrote:
>>
>> Joakim Tjernlund  writes:
>>> On Thu, 2018-06-21 at 02:38 +, Qiang Zhao wrote:
>>>> On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
>>>> -Original Message-
>>>> From: Linuxppc-dev 
>>>> [mailto:linuxppc-dev-bounces+qiang.zhao=nxp@lists.ozlabs.org] On 
>>>> Behalf Of Joakim Tjernlund
>>>> Sent: 2018年6月20日 0:22
>>>> To: York Sun ; linuxppc-dev 
>>>> 
>>>> Subject: [PATCH] QE GPIO: Add qe_gpio_set_multiple
>>>>
>>>> This cousin to gpio-mpc8xxx was lacking a multiple pins method, add one.
>>>>
>>>> Signed-off-by: Joakim Tjernlund 
>>>> ---
>>>>  drivers/soc/fsl/qe/gpio.c | 28 
>>>>  1 file changed, 28 insertions(+)
>>
>> ...
>>>>  static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)  {
>>>> struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); @@ -298,6 
>>>> +325,7 @@ static int __init qe_add_gpiochips(void)
>>>> gc->direction_output = qe_gpio_dir_out;
>>>> gc->get = qe_gpio_get;
>>>> gc->set = qe_gpio_set;
>>>> +   gc->set_multiple = qe_gpio_set_multiple;
>>>>
>>>> ret = of_mm_gpiochip_add_data(np, mm_gc, qe_gc);
>>>> if (ret)
>>>>
>>>> Reviewed-by: Qiang Zhao 
>>>>
>>>
>>> Who picks up this patch ? Is it queued somewhere already?
>>
>> Not me.
> 
> York? You seem to be the only one left.
> 

I am not a Linux maintainer. Even I want to, I can't merge this patch.

Leo, who can merge this patch and request a pull?

York

Re: [PATCH] QE GPIO: Add qe_gpio_set_multiple

[York Sun]

On 06/19/2018 09:22 AM, Joakim Tjernlund wrote:
> This cousin to gpio-mpc8xxx was lacking a multiple pins method,
> add one.
> 
> Signed-off-by: Joakim Tjernlund 
> ---
>  drivers/soc/fsl/qe/gpio.c | 28 
>  1 file changed, 28 insertions(+)
> 

Joakim,

I am not the maintainer for this driver. Adding Scott.

York

Re: [PATCH] spi/fsl-espi: Add missing cell-index OF property

[York Sun]

Joakim,

I am not the maintainer for this driver. Adding Mark Brown.

York

On 06/19/2018 09:23 AM, Joakim Tjernlund wrote:
> espi does not look for a OF cell-index property which
> makes the bus numbering dynamic only. This add an
> optional cell-index.
> 
> Signed-off-by: Joakim Tjernlund 
> ---
>  drivers/spi/spi-fsl-espi.c | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/spi/spi-fsl-espi.c b/drivers/spi/spi-fsl-espi.c
> index 1d332e23f6ed..56b71c5e2f10 100644
> --- a/drivers/spi/spi-fsl-espi.c
> +++ b/drivers/spi/spi-fsl-espi.c
> @@ -672,6 +672,14 @@ static int fsl_espi_probe(struct device *dev, struct 
> resource *mem,
>  
>   dev_set_drvdata(dev, master);
>  
> + if (dev->of_node) {
> + u32 cell_index;
> +
> + if (!of_property_read_u32(dev->of_node, "cell-index",
> +   _index))
> + master->bus_num = cell_index;
> + }
> +
>   master->mode_bits = SPI_RX_DUAL | SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
>   SPI_LSB_FIRST | SPI_LOOP;
>   master->dev.of_node = dev->of_node;
> 

Re: FSL serial 166550 errata broken?

[York Sun]

On 09/27/2017 04:03 AM, Joakim Tjernlund wrote:
> On Mon, 2017-09-25 at 17:26 +0000, York Sun wrote:
>> On 09/25/2017 09:55 AM, Joakim Tjernlund wrote:
>>> We got some "broken" boards(mpx8321) where UART RX is held low(BREAK)
>>> There we get a few:
>>> serial8250: too much work for irq18
>>> and the board freezes.
>>>
>>> Looking inte to driver/CPU there is an errtum(A-004737) w.r.t BREAK handling
>>> and I can see we are hitting the irq function fsl8250_handle_irq() added
>>> in commit: 9deaa53ac7fa373623123aa4f18828dd62292b1a
>>>"serial: add irq handler for Freescale 16550 errata."
>>> For all I can tell this workaround is broken and I cannot figure out why.
>>> Any pointers?
>>>
>>
>> Jocke,
>>
>> Did you mean MPC8321?
>>
>> I personally don't have experience debugging this erratum. Have you
>> tried to contact the patch author Paul Gortmaker to see how he managed
>> to get it work?
> 
> No, but I just found out it is u-boot related. If I use an very old u-boot it 
> works.
> Between then and now we did a massive upgrade of u-boot and now if breaks. 
> And no,
> bisect not possible due to local u-boot mods :)

How old? It is a good sign that an old U-Boot works. Git bisect would be 
a good tool if practical. Sometimes I have to reapply some local changes 
for every step of bisect to make it useful. You mileage may vary though.

> 
> Any idea what could be different? I cannot see and I have tested
> what I could see/think of but now I am out of ideas.

I don't believe we have much change for MPC8321 for a long time. If any 
change has impact on kernel but not U-Boot itself, it may be other 
errata workarounds.

I presume this happens on your own board. If I am in your shoes, I would 
try to reduce the number of local commits and reapply them to various 
U-Boot tags to further narrow down the search scope. In the mean time, 
getting register dump to compare the good and bad may be another way to go.

York

Re: FSL serial 166550 errata broken?

[York Sun]

On 09/25/2017 09:55 AM, Joakim Tjernlund wrote:
> We got some "broken" boards(mpx8321) where UART RX is held low(BREAK)
> There we get a few:
>serial8250: too much work for irq18
> and the board freezes.
> 
> Looking inte to driver/CPU there is an errtum(A-004737) w.r.t BREAK handling
> and I can see we are hitting the irq function fsl8250_handle_irq() added
> in commit: 9deaa53ac7fa373623123aa4f18828dd62292b1a
>   "serial: add irq handler for Freescale 16550 errata."
> For all I can tell this workaround is broken and I cannot figure out why.
> Any pointers?
> 

Jocke,

Did you mean MPC8321?

I personally don't have experience debugging this erratum. Have you 
tried to contact the patch author Paul Gortmaker to see how he managed 
to get it work?

York

Re: Machine Check in P2010(e500v2)

[York Sun]

Scott is no longer with Freescale/NXP. Adding Leo.

On 09/05/2017 01:40 AM, Joakim Tjernlund wrote:
> So after some debugging I found this bug:
> @@ -996,7 +998,7 @@ int fsl_pci_mcheck_exception(struct pt_regs *regs)
>  if (is_in_pci_mem_space(addr)) {
>  if (user_mode(regs)) {
>  pagefault_disable();
> -   ret = get_user(regs->nip, );
> +   ret = get_user(inst, (__u32 __user *)regs->nip);
>  pagefault_enable();
>  } else {
>  ret = probe_kernel_address(regs->nip, inst);
> 
> However, the kernel still locked up after fixing that.
> Now I wonder why this fixup is there in the first place? The routine
> will not really fixup the insn, just return 0x for the failing
> read and then advance the process NIP.
> 
> Removing the fixup does not help either, kernel still locks up:
> [   28.170532] Machine check in kernel mode.
> [   28.174538] Caused by (from MCSR=10008):
> [   28.182804] Bus - Read Data Bus Error: DAR:b7013000
> [   28.197079] Oops: Machine check, sig: 7 [#1]
> [   28.201343] P1010 RDB
> [   28.203608] Modules linked in: linux_bcm_knet(PO) linux_user_bde(PO) 
> linux_kernel_bde(PO)
> [   28.211796] CPU: 0 PID: 470 Comm: emxp2_hw_bl Tainted: P   O
> 4.1.38+ #201
> [   28.219540] task: db16ed10 ti: df122000 task.ti: df122000
> [   28.224935] NIP: 10a4e2f4 LR: 10a4e404 CTR: 10046c38
> [   28.229896] REGS: df123f10 TRAP: 0204   Tainted: P   O 
> (4.1.38+)
> [   28.236942] MSR: 0002d000   CR: 44002428  XER: 
> [   28.243306] DEAR: b7013000 ESR: 
> GPR00: 10a4e404 bfab2730 b7b354a0 132f9fa8 07006000 0700  132f9fd8
> GPR08: b6fd5000 b6fe5000 0003e000 bfab2720 24004424 11d6cf7c  
> GPR16: 10f6e29c 10f6c872 10f6db01 b541 b541 11d92fcc 0011 0001
> GPR24: 01a5bd3e 132ffbf0 11d6  07006000  132f9fa8 
> [   28.275547] NIP [10a4e2f4] 0x10a4e2f4
> [   28.279204] LR [10a4e404] 0x10a4e404
> [   28.282772] Call Trace:
> [   28.285213] ---[ end trace 9f8b64ab1e83f449 ]---
> [   28.289825]
> 
> 
>   Jocke
> 
> On Fri, 2017-09-01 at 13:32 +0200, Joakim Tjernlund wrote:
>> I am trying to debug a Machine Check for a P2010 (e500v2) CPU:
>>
>> [   28.111816] Caused by (from MCSR=10008): Bus - Read Data Bus Error
>> [   28.117998] Oops: Machine check, sig: 7 [#1]
>> [   28.122263] P1010 RDB
>> [   28.124529] Modules linked in: linux_bcm_knet(PO) linux_user_bde(PO) 
>> linux_kernel_bde(PO)
>> [   28.132718] CPU: 0 PID: 470 Comm: emxp2_hw_bl Tainted: P   O
>> 4.1.38+ #49
>> [   28.140376] task: db16cd10 ti: df128000 task.ti: df128000
>> [   28.145770] NIP:  LR: 10a4e404 CTR: 10046c38
>> [   28.150730] REGS: df129f10 TRAP: 0204   Tainted: P   O 
>> (4.1.38+)
>> [   28.157776] MSR: 0002d000   CR: 44002428  XER: 
>> [   28.164140] DEAR: b7187000 ESR: 
>> GPR00: 10a4e404 bf86ea30 b7ca94a0 132f9fa8 07006000 0700  
>> 132f9fd8
>> GPR08: b7149000 b7159000 0003e000 bf86ea20 24004424 11d6cf7c  
>> 
>> GPR16: 10f6e29c 10f6c872 10f6db01 b541 b541 11d92fcc 0011 
>> 0001
>> GPR24: 01a4d12d 132ffbf0 11d6  07006000  132f9fa8 
>> 
>> [   28.196375] NIP []   (null)
>> [   28.199859] LR [10a4e404] 0x10a4e404
>> [   28.203426] Call Trace:
>> [   28.205866] ---[ end trace f456255ddf9bee83 ]---
>>
>> I cannot figure out why NIP is NULL ? It LOOKs like NIP is set to
>> MCSRR0 early on but maybe it is lost somehow?
>>
>> Anyhow, looking at entry_32.S:
>>  .globl  mcheck_transfer_to_handler
>> mcheck_transfer_to_handler:
>>  mfspr   r0,SPRN_DSRR0
>>  stw r0,_DSRR0(r11)
>>  mfspr   r0,SPRN_DSRR1
>>  stw r0,_DSRR1(r11)
>>  /* fall through */
>>
>>  .globl  debug_transfer_to_handler
>> debug_transfer_to_handler:
>>  mfspr   r0,SPRN_CSRR0
>>  stw r0,_CSRR0(r11)
>>  mfspr   r0,SPRN_CSRR1
>>  stw r0,_CSRR1(r11)
>>  /* fall through */
>>
>>  .globl  crit_transfer_to_handler
>> crit_transfer_to_handler:
>>
>> It looks odd that DSRRx is assigned in mcheck and CSRRx in debug and
>> crit has none. Should not this assigment be shifted down one level?
>>
>>Jocke
> 

Re: [PATCH] fsl_pci: Correct fsl_pci_mcheck_exception

[York Sun]

On 09/05/2017 04:59 AM, Joakim Tjernlund wrote:
> get_user() had it args reversed causing NIP to be NULL:ed instead
> of fixing up the PCI access.
> 
> Note: This still hangs my P1020 Freescale CPU hard, but at least
> I get a NIP now.
> 
> Signed-off-by: Joakim Tjernlund 
> ---
>   arch/powerpc/sysdev/fsl_pci.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
> index 7c8b779c329a..9e64c12dff6a 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
> @@ -996,7 +996,7 @@ int fsl_pci_mcheck_exception(struct pt_regs *regs)
>   if (is_in_pci_mem_space(addr)) {
>   if (user_mode(regs)) {
>   pagefault_disable();
> - ret = get_user(regs->nip, );
> + ret = get_user(inst, (__u32 __user *)regs->nip);
>   pagefault_enable();
>   } else {
>   ret = probe_kernel_address(regs->nip, inst);
> 

Leo,

Can you take a look, or assign it to someone who is familiar with this code?

York

Re: [Patch v3 01/11] arch/powerpc/pci: Fix compiling error for mpc85xx_edac

[york sun]

On 08/05/2016 12:01 AM, Borislav Petkov wrote:
> On Fri, Aug 05, 2016 at 04:26:26AM +0000, york sun wrote:
>> I don't have deep knowledge of this driver. What I am trying is to
>> separate the common DDR part and share it with ARM platforms. Along the
>> way, I found the compiling error if build a module. If exposing these
>> functions becomes a concern, I can live without it.
>
> Perhaps you or Johannes could fix this properly to use pci_get_device()
> as the rest of the EDAC drivers do, instead of exporting core PCI
> functions...
>

Boris,

I'd like to separate the first two patches from this set. They are not 
really related to the DDR part I am working on. It will take me a while 
to sort out the correct fix.

York

Re: [Patch v3 01/11] arch/powerpc/pci: Fix compiling error for mpc85xx_edac

[york sun]

On 08/05/2016 02:09 PM, Scott Wood wrote:
> On Fri, 2016-08-05 at 20:29 +0000, york sun wrote:
>> On 08/04/2016 08:43 PM, Michael Ellerman wrote:
>>>
>>> Does the driver really need to use these routines? They're meant for use
>>> early in boot, before PCI is setup.
>>>
>>> AFAICS this is just a regular driver, so when it's probed the PCI
>>> devices should have already been scanned. In which case pci_get_device()
>>> could work couldn't it? (I see other edac drivers doing that).
>> I am trying to fix this but need some help. We are dealing with PCIe
>> controller here. Does it have a bus number assigned at this point? If
>> yes, how can I find it? I seem not able to find out where the
>> platform_data is filled as well. Can someone kindly point it out to me?
>
>
> The platform data comes from add_err_dev() in arch/powerpc/sysdev/fsl_pci.c.
>

Thanks, Scott.

When add_err_dev() is called, pci is not scanned, is using 
early_find_capability() justified?

York

Re: [Patch v3 01/11] arch/powerpc/pci: Fix compiling error for mpc85xx_edac

[york sun]

On 08/04/2016 08:43 PM, Michael Ellerman wrote:
> York Sun <york@nxp.com> writes:
>
>> Two symbols are missing if mpc85xx_edac driver is compiled as module.
>>
>> Signed-off-by: York Sun <york@nxp.com>
>>
>> ---
>> Change log
>>   v3: Change subject tag
>>   v2: no change
>>
>>  arch/powerpc/kernel/pci-common.c | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/powerpc/kernel/pci-common.c 
>> b/arch/powerpc/kernel/pci-common.c
>> index 0f7a60f..86bc484 100644
>> --- a/arch/powerpc/kernel/pci-common.c
>> +++ b/arch/powerpc/kernel/pci-common.c
>> @@ -226,6 +226,7 @@ struct pci_controller* 
>> pci_find_hose_for_OF_device(struct device_node* node)
>>  }
>>  return NULL;
>>  }
>> +EXPORT_SYMBOL(pci_find_hose_for_OF_device);
>>
>>  /*
>>   * Reads the interrupt pin to determine if interrupt is use by card.
>> @@ -1585,6 +1586,7 @@ int early_find_capability(struct pci_controller *hose, 
>> int bus, int devfn,
>>  {
>>  return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
>>  }
>> +EXPORT_SYMBOL(early_find_capability);
>
> Does the driver really need to use these routines? They're meant for use
> early in boot, before PCI is setup.
>
> AFAICS this is just a regular driver, so when it's probed the PCI
> devices should have already been scanned. In which case pci_get_device()
> could work couldn't it? (I see other edac drivers doing that).

I am trying to fix this but need some help. We are dealing with PCIe 
controller here. Does it have a bus number assigned at this point? If 
yes, how can I find it? I seem not able to find out where the 
platform_data is filled as well. Can someone kindly point it out to me?

York

Re: [Patch v3 01/11] arch/powerpc/pci: Fix compiling error for mpc85xx_edac

[york sun]

On 08/04/2016 04:36 PM, Andrew Donnellan wrote:
> On 05/08/16 08:58, York Sun wrote:
>> Two symbols are missing if mpc85xx_edac driver is compiled as module.
>>
>> Signed-off-by: York Sun <york@nxp.com>
>
> Good catch! One comment below.
>
> Reviewed-by: Andrew Donnellan <andrew.donnel...@au1.ibm.com>
>
>>  /*
>>   * Reads the interrupt pin to determine if interrupt is use by card.
>> @@ -1585,6 +1586,7 @@ int early_find_capability(struct pci_controller *hose, 
>> int bus, int devfn,
>>  {
>>  return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
>>  }
>> +EXPORT_SYMBOL(early_find_capability);
>
> It'd be nicer for this to be renamed as "pci_early_find_capability" or
> something like that with a "namespace", I think.
>

I will rename it if I respin this patch for any reason. Otherwise, I 
will send out another patch to rename it after merging.

York

Re: [Patch v3 01/11] arch/powerpc/pci: Fix compiling error for mpc85xx_edac

[york sun]

On 08/04/2016 08:43 PM, Michael Ellerman wrote:
> York Sun <york@nxp.com> writes:
>
>> Two symbols are missing if mpc85xx_edac driver is compiled as module.
>>
>> Signed-off-by: York Sun <york@nxp.com>
>>
>> ---
>> Change log
>>   v3: Change subject tag
>>   v2: no change
>>
>>  arch/powerpc/kernel/pci-common.c | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/powerpc/kernel/pci-common.c 
>> b/arch/powerpc/kernel/pci-common.c
>> index 0f7a60f..86bc484 100644
>> --- a/arch/powerpc/kernel/pci-common.c
>> +++ b/arch/powerpc/kernel/pci-common.c
>> @@ -226,6 +226,7 @@ struct pci_controller* 
>> pci_find_hose_for_OF_device(struct device_node* node)
>>  }
>>  return NULL;
>>  }
>> +EXPORT_SYMBOL(pci_find_hose_for_OF_device);
>>
>>  /*
>>   * Reads the interrupt pin to determine if interrupt is use by card.
>> @@ -1585,6 +1586,7 @@ int early_find_capability(struct pci_controller *hose, 
>> int bus, int devfn,
>>  {
>>  return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
>>  }
>> +EXPORT_SYMBOL(early_find_capability);
>
> Does the driver really need to use these routines? They're meant for use
> early in boot, before PCI is setup.
>
> AFAICS this is just a regular driver, so when it's probed the PCI
> devices should have already been scanned. In which case pci_get_device()
> could work couldn't it? (I see other edac drivers doing that).
>

I don't have deep knowledge of this driver. What I am trying is to 
separate the common DDR part and share it with ARM platforms. Along the 
way, I found the compiling error if build a module. If exposing these 
functions becomes a concern, I can live without it.

York

[Patch v3 01/11] arch/powerpc/pci: Fix compiling error for mpc85xx_edac

[York Sun]

Two symbols are missing if mpc85xx_edac driver is compiled as module.

Signed-off-by: York Sun <york@nxp.com>

---
Change log
  v3: Change subject tag
  v2: no change

 arch/powerpc/kernel/pci-common.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 0f7a60f..86bc484 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -226,6 +226,7 @@ struct pci_controller* pci_find_hose_for_OF_device(struct 
device_node* node)
}
return NULL;
 }
+EXPORT_SYMBOL(pci_find_hose_for_OF_device);
 
 /*
  * Reads the interrupt pin to determine if interrupt is use by card.
@@ -1585,6 +1586,7 @@ int early_find_capability(struct pci_controller *hose, 
int bus, int devfn,
 {
return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
 }
+EXPORT_SYMBOL(early_find_capability);
 
 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
 {
-- 
2.7.4

Re: [v2,1/2] powerpc/mpc8xxx: Change EDAC for FSL SoC

[York Sun]

On 05/28/2015 05:46 PM, Scott Wood wrote:
 On Thu, May 07, 2015 at 05:41:37PM +0800, songwenbin wrote:
 From: York Sun york...@freescale.com

 Remove mpc83xx and mpc85xx as dependency.

 Signed-off-by: York Sun york...@freescale.com
 Signed-off-by: songwenbin wenbin.s...@freescale.com
 ---
  drivers/edac/Kconfig | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 These patches need to be sent to the EDAC list and maintainer.
 
 diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
 index cb59619..ad07d4f 100644
 --- a/drivers/edac/Kconfig
 +++ b/drivers/edac/Kconfig
 @@ -262,10 +262,10 @@ config EDAC_SBRIDGE
  
  config EDAC_MPC85XX
  tristate Freescale MPC83xx / MPC85xx
 -depends on EDAC_MM_EDAC  FSL_SOC  (PPC_83xx || PPC_85xx)
 +depends on EDAC_MM_EDAC  FSL_SOC
  help
Support for error detection and correction on the Freescale
 -  MPC8349, MPC8560, MPC8540, MPC8548
 +  MPC8349, MPC8560, MPC8540, MPC8548, T4240
 
 Why T4240?  We're not really going to list every mpc85xx/QorIQ PPC chip
 here, are we?

T4240 was the one under debugging. It should be more generic since it removes
PPC_83xx and PPC_85xx.

Wenbin, do you mind update this patch?

York
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Re: [PATCH] fsl/smp: add low power boot support to replace spin boot

[York Sun]

On 01/14/2015 10:05 PM, Dongsheng Wang wrote:
 From: Wang Dongsheng dongsheng.w...@freescale.com
 
 U-boot put non-boot cpus into an low power state(PW10/PW20 or DOZE) when cpu
 powered up. To exit low power state kernel will send DOORBELL or MPIC-IPI
 signal to all those CPUs.
 
 e500/e500v2 use mpic to send IPI signal.
 e500mc and later use doorbell to send IPI signal.
 
 This feature tested on:
 POWER UP TEST:
 P1022DS(e500v2),96k times.
 P4080(e500mc),  110k times.
 T1024(e5500),   83k times.
 T4240(e6500),   150k times.
 
 CPU HOTPLUG TEST:
 P1022DS(e500v2),1.4 million times.
 P4080(e500mc),  1.8 million times.
 T1024(e5500),   1.3 million times.
 T4240(e6500),   1.1 million times.
 
 Signed-off-by: Wang Dongsheng dongsheng.w...@freescale.com
 

This is a very good move. Can you explain what has been tested for 100K times,
or over a million times?

Have you verified on older e500v2 platforms, such as MPC8572?

York
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Re: [5/7] powerpc/corenet64_smp_defconfig: Enable most SPI splash

[York Sun]

On 10/28/2013 05:28 PM, Scott Wood wrote:
 On Fri, Sep 06, 2013 at 08:43:17AM -0700, York Sun wrote:
 Enable CONFIG_MTD_M25P80 for corenet64_smp_defconfig. Verified on
 P5040DS.

 Signed-off-by: York Sun york...@freescale.com
 Reviewed-by: Wood Scott-B07421 scottw...@freescale.com
 Reviewed-by: Fleming Andrew-AFLEMING aflem...@freescale.com
 Tested-by: Fleming Andrew-AFLEMING aflem...@freescale.com

 ---
 arch/powerpc/configs/corenet64_smp_defconfig |1 +
  1 file changed, 1 insertion(+)

 diff --git a/arch/powerpc/configs/corenet64_smp_defconfig 
 b/arch/powerpc/configs/corenet64_smp_defconfig
 index 6c8b020..1ec6f0c 100644
 --- a/arch/powerpc/configs/corenet64_smp_defconfig
 +++ b/arch/powerpc/configs/corenet64_smp_defconfig
 @@ -66,6 +66,7 @@ CONFIG_MTD_CMDLINE_PARTS=y
  CONFIG_MTD_CHAR=y
  CONFIG_MTD_BLKDEVS=y
  CONFIG_MTD_BLOCK=y
 +CONFIG_MTD_M25P80=y
  CONFIG_FTL=y
  CONFIG_MTD_CFI=y
  CONFIG_MTD_GEN_PROBE=y
 
 This has already been enabled in corenet64_smp_config since
 commit 478a4829d815865b919c1fa20f0f33543a2291fb, over a year ago.
 

Oh. Thanks. Please drop it then.

York


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[Patch v2] powerpc/corenet64_smp_defconfig: Enable most SPI splash

[York Sun]

Enable CONFIG_MTD_M25P80 for corenet64_smp_defconfig. Verified on
P5040DS.

Signed-off-by: York Sun york...@freescale.com
---
Change log:
 v2: remote reviewed-by and tested-by lines added by gerrit

 arch/powerpc/configs/corenet64_smp_defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/configs/corenet64_smp_defconfig 
b/arch/powerpc/configs/corenet64_smp_defconfig
index 6c8b020..1ec6f0c 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -66,6 +66,7 @@ CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLKDEVS=y
 CONFIG_MTD_BLOCK=y
+CONFIG_MTD_M25P80=y
 CONFIG_FTL=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_GEN_PROBE=y
-- 
1.7.9.5


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[Patch v2 1/2] powerpc/t4240emu: Add device tree file for t4240emu

[York Sun]

T4240EMU is an emulator target with minimum peripherals. It is based on
T4240QDS and trimmed down most peripherals due to either not modeled or
lack of board level connections. The main purpose of this minimum dts is
to speed up booting on emulator.

Signed-off-by: York Sun york...@freescale.com
---
Change log:
 v2: remote reviewed-by and tested-by lines added by gerrit
 resync with t4240qds.dts

 arch/powerpc/boot/dts/t4240emu.dts |  270 
 1 file changed, 270 insertions(+)
 create mode 100644 arch/powerpc/boot/dts/t4240emu.dts

diff --git a/arch/powerpc/boot/dts/t4240emu.dts 
b/arch/powerpc/boot/dts/t4240emu.dts
new file mode 100644
index 000..44c5a0d
--- /dev/null
+++ b/arch/powerpc/boot/dts/t4240emu.dts
@@ -0,0 +1,270 @@
+/*
+ * T4240 emulator Device Tree Source
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *   names of its contributors may be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor AS IS AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/include/ fsl/e6500_power_isa.dtsi
+/ {
+   compatible = fsl,T4240;
+   #address-cells = 2;
+   #size-cells = 2;
+   interrupt-parent = mpic;
+
+   aliases {
+   ccsr = soc;
+
+   serial0 = serial0;
+   serial1 = serial1;
+   serial2 = serial2;
+   serial3 = serial3;
+   dma0 = dma0;
+   dma1 = dma1;
+   };
+
+   cpus {
+   #address-cells = 1;
+   #size-cells = 0;
+
+   cpu0: PowerPC,e6500@0 {
+   device_type = cpu;
+   reg = 0 1;
+   next-level-cache = L2_1;
+   };
+   cpu1: PowerPC,e6500@2 {
+   device_type = cpu;
+   reg = 2 3;
+   next-level-cache = L2_1;
+   };
+   cpu2: PowerPC,e6500@4 {
+   device_type = cpu;
+   reg = 4 5;
+   next-level-cache = L2_1;
+   };
+   cpu3: PowerPC,e6500@6 {
+   device_type = cpu;
+   reg = 6 7;
+   next-level-cache = L2_1;
+   };
+
+   cpu4: PowerPC,e6500@8 {
+   device_type = cpu;
+   reg = 8 9;
+   next-level-cache = L2_2;
+   };
+   cpu5: PowerPC,e6500@10 {
+   device_type = cpu;
+   reg = 10 11;
+   next-level-cache = L2_2;
+   };
+   cpu6: PowerPC,e6500@12 {
+   device_type = cpu;
+   reg = 12 13;
+   next-level-cache = L2_2;
+   };
+   cpu7: PowerPC,e6500@14 {
+   device_type = cpu;
+   reg = 14 15;
+   next-level-cache = L2_2;
+   };
+
+   cpu8: PowerPC,e6500@16 {
+   device_type = cpu;
+   reg = 16 17;
+   next-level-cache = L2_3;
+   };
+   cpu9: PowerPC,e6500@18 {
+   device_type = cpu;
+   reg = 18 19

[Patch v2 2/2] powerpc/b4860emu: Add device tree file for b4860emu

[York Sun]

B4860EMU is a emualtor target with minimum peripherals. It is based on
B4860QDS and trimmed down most peripherals due to either not modeled or
lack of board level connections. The main purpose of this minimum dts is
to speed up booting on emulator.

Signed-off-by: York Sun york...@freescale.com
---
Change log:
 v2: remote reviewed-by and tested-by lines added by gerrit
 resync with b4860qds.dts

 arch/powerpc/boot/dts/b4860emu.dts |  219 
 1 file changed, 219 insertions(+)
 create mode 100644 arch/powerpc/boot/dts/b4860emu.dts

diff --git a/arch/powerpc/boot/dts/b4860emu.dts 
b/arch/powerpc/boot/dts/b4860emu.dts
new file mode 100644
index 000..0f91230
--- /dev/null
+++ b/arch/powerpc/boot/dts/b4860emu.dts
@@ -0,0 +1,219 @@
+/*
+ * B4860 emulator Device Tree Source
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *   names of its contributors may be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor as is and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of
+ * this software, even if advised of the possibility of such damage.
+ */
+
+/dts-v1/;
+
+/include/ fsl/e6500_power_isa.dtsi
+
+/ {
+   compatible = fsl,B4860;
+   #address-cells = 2;
+   #size-cells = 2;
+   interrupt-parent = mpic;
+
+   aliases {
+   ccsr = soc;
+
+   serial0 = serial0;
+   serial1 = serial1;
+   serial2 = serial2;
+   serial3 = serial3;
+   dma0 = dma0;
+   dma1 = dma1;
+   };
+
+   cpus {
+   #address-cells = 1;
+   #size-cells = 0;
+
+   cpu0: PowerPC,e6500@0 {
+   device_type = cpu;
+   reg = 0 1;
+   next-level-cache = L2;
+   };
+   cpu1: PowerPC,e6500@2 {
+   device_type = cpu;
+   reg = 2 3;
+   next-level-cache = L2;
+   };
+   cpu2: PowerPC,e6500@4 {
+   device_type = cpu;
+   reg = 4 5;
+   next-level-cache = L2;
+   };
+   cpu3: PowerPC,e6500@6 {
+   device_type = cpu;
+   reg = 6 7;
+   next-level-cache = L2;
+   };
+   };
+};
+
+/ {
+   model = fsl,B4860QDS;
+   compatible = fsl,B4860EMU, fsl,B4860QDS;
+   #address-cells = 2;
+   #size-cells = 2;
+   interrupt-parent = mpic;
+
+   ifc: localbus@ffe124000 {
+   reg = 0xf 0xfe124000 0 0x2000;
+   ranges = 0 0 0xf 0xe800 0x0800
+ 2 0 0xf 0xff80 0x0001
+ 3 0 0xf 0xffdf 0x8000;
+
+   nor@0,0 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = cfi-flash;
+   reg = 0x0 0x0 0x800;
+   bank-width = 2;
+   device-width = 1;
+   };
+   };
+
+   memory {
+   device_type = memory;
+   };
+
+   soc: soc@ffe00 {
+   ranges = 0x 0xf 0xfe00 0x100;
+   reg = 0xf 0xfe00 0 0x1000;
+
+   };
+};
+
+ifc {
+   #address-cells = 2;
+   #size-cells = 1;
+   compatible = fsl,ifc, simple-bus

Re: [linuxppc-release] [Patch v2] powerpc/corenet64_smp_defconfig: Enable most SPI splash

[York Sun]

On 09/16/2013 04:35 PM, York Sun wrote:
 Enable CONFIG_MTD_M25P80 for corenet64_smp_defconfig. Verified on
 P5040DS.
 
 Signed-off-by: York Sun york...@freescale.com
 ---
 Change log:
  v2: remote reviewed-by and tested-by lines added by gerrit
 

Pardon my typo. I meant to type remove, instead of remote.

York

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Re: [linuxppc-release] [Patch v2 1/2] powerpc/t4240emu: Add device tree file for t4240emu

[York Sun]

On 09/16/2013 04:38 PM, York Sun wrote:
 T4240EMU is an emulator target with minimum peripherals. It is based on
 T4240QDS and trimmed down most peripherals due to either not modeled or
 lack of board level connections. The main purpose of this minimum dts is
 to speed up booting on emulator.
 
 Signed-off-by: York Sun york...@freescale.com
 ---
 Change log:
  v2: remote reviewed-by and tested-by lines added by gerrit
  resync with t4240qds.dts
 

Pardon my typo. I meant to type remove, instead of remote.

York


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[PATCH 2/7] powerpc/mpc8xxx: Change EDAC for FSL SoC

[York Sun]

Remove mpc83xx and mpc85xx as dependency.

Signed-off-by: York Sun york...@freescale.com
Reviewed-by: Fleming Andrew-AFLEMING aflem...@freescale.com
Tested-by: Fleming Andrew-AFLEMING aflem...@freescale.com
---
 drivers/edac/Kconfig |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 878f090..53bf163 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -254,10 +254,10 @@ config EDAC_SBRIDGE
 
 config EDAC_MPC85XX
tristate Freescale MPC83xx / MPC85xx
-   depends on EDAC_MM_EDAC  FSL_SOC  (PPC_83xx || PPC_85xx)
+   depends on EDAC_MM_EDAC  FSL_SOC
help
  Support for error detection and correction on the Freescale
- MPC8349, MPC8560, MPC8540, MPC8548
+ MPC8349, MPC8560, MPC8540, MPC8548, T4240
 
 config EDAC_MV64X60
tristate Marvell MV64x60
-- 
1.7.9.5


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[PATCH 3/7] i2c/rtc-ds3232: Fix irq for probing

[York Sun]

Driver shouldn't request irq when irq = 0. It is returned from parsing
device tree. 0 means no interrupt.

Signed-off-by: York Sun york...@freescale.com
Reviewed-by: Zang Tiefei-R61911 tie-fei.z...@freescale.com
Reviewed-by: Fleming Andrew-AFLEMING aflem...@freescale.com
Tested-by: Fleming Andrew-AFLEMING aflem...@freescale.com
---
 drivers/rtc/rtc-ds3232.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/rtc/rtc-ds3232.c b/drivers/rtc/rtc-ds3232.c
index b83bb5a5..ae8a28e 100644
--- a/drivers/rtc/rtc-ds3232.c
+++ b/drivers/rtc/rtc-ds3232.c
@@ -418,7 +418,7 @@ static int ds3232_probe(struct i2c_client *client,
return PTR_ERR(ds3232-rtc);
}
 
-   if (client-irq = 0) {
+   if (client-irq  0) {
ret = devm_request_irq(client-dev, client-irq, ds3232_irq, 0,
 ds3232, client);
if (ret) {
-- 
1.7.9.5


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[PATCH 6/7] powerpc/t4240emu: Add device tree file for t4240emu

[York Sun]

T4240EMU is an emulator target with minimum peripherals. It is based on
T4240QDS and trimmed down most peripherals due to either not modeled or
lack of board level connections. The main purpose of this minimum dts is
to speed up booting on emulator.

Signed-off-by: York Sun york...@freescale.com
Reviewed-by: Wood Scott-B07421 scottw...@freescale.com
Reviewed-by: Fleming Andrew-AFLEMING aflem...@freescale.com
Tested-by: Fleming Andrew-AFLEMING aflem...@freescale.com
---
 arch/powerpc/boot/dts/t4240emu.dts |  278 
 1 file changed, 278 insertions(+)
 create mode 100644 arch/powerpc/boot/dts/t4240emu.dts

diff --git a/arch/powerpc/boot/dts/t4240emu.dts 
b/arch/powerpc/boot/dts/t4240emu.dts
new file mode 100644
index 000..35a9c91
--- /dev/null
+++ b/arch/powerpc/boot/dts/t4240emu.dts
@@ -0,0 +1,278 @@
+/*
+ * T4240 emulator Device Tree Source
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *   names of its contributors may be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor AS IS AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/include/ fsl/e6500_power_isa.dtsi
+/ {
+   #address-cells = 2;
+   #size-cells = 2;
+   interrupt-parent = mpic;
+
+   aliases {
+   ccsr = soc;
+
+   serial0 = serial0;
+   serial1 = serial1;
+   serial2 = serial2;
+   serial3 = serial3;
+   dma0 = dma0;
+   dma1 = dma1;
+   };
+
+   cpus {
+   #address-cells = 1;
+   #size-cells = 0;
+
+   /*
+* Temporarily add next-level-cache info in each cpu node so
+* that uboot can do L2 cache fixup. This can be removed once
+* u-boot can create cpu node with cache info.
+*/
+   cpu0: PowerPC,e6500@0 {
+   device_type = cpu;
+   reg = 0 1;
+   next-level-cache = L2_1;
+   };
+   cpu1: PowerPC,e6500@2 {
+   device_type = cpu;
+   reg = 2 3;
+   next-level-cache = L2_1;
+   };
+   cpu2: PowerPC,e6500@4 {
+   device_type = cpu;
+   reg = 4 5;
+   next-level-cache = L2_1;
+   };
+   cpu3: PowerPC,e6500@6 {
+   device_type = cpu;
+   reg = 6 7;
+   next-level-cache = L2_1;
+   };
+
+   cpu4: PowerPC,e6500@8 {
+   device_type = cpu;
+   reg = 8 9;
+   next-level-cache = L2_2;
+   };
+   cpu5: PowerPC,e6500@10 {
+   device_type = cpu;
+   reg = 10 11;
+   next-level-cache = L2_2;
+   };
+   cpu6: PowerPC,e6500@12 {
+   device_type = cpu;
+   reg = 12 13;
+   next-level-cache = L2_2;
+   };
+   cpu7: PowerPC,e6500@14 {
+   device_type = cpu;
+   reg = 14 15;
+   next-level-cache = L2_2;
+   };
+
+   cpu8: PowerPC

[PATCH 5/7] powerpc/corenet64_smp_defconfig: Enable most SPI splash

[York Sun]

Enable CONFIG_MTD_M25P80 for corenet64_smp_defconfig. Verified on
P5040DS.

Signed-off-by: York Sun york...@freescale.com
Reviewed-by: Wood Scott-B07421 scottw...@freescale.com
Reviewed-by: Fleming Andrew-AFLEMING aflem...@freescale.com
Tested-by: Fleming Andrew-AFLEMING aflem...@freescale.com
---
 arch/powerpc/configs/corenet64_smp_defconfig |1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/configs/corenet64_smp_defconfig 
b/arch/powerpc/configs/corenet64_smp_defconfig
index 6c8b020..1ec6f0c 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -66,6 +66,7 @@ CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLKDEVS=y
 CONFIG_MTD_BLOCK=y
+CONFIG_MTD_M25P80=y
 CONFIG_FTL=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_GEN_PROBE=y
-- 
1.7.9.5


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[PATCH 7/7] powerpc/b4860emu: Add device tree file for b4860emu

[York Sun]

B4860EMU is a emualtor target with minimum peripherals. It is based on
B4860QDS and trimmed down most peripherals due to either not modeled or
lack of board level connections. The main purpose of this minimum dts is
to speed up booting on emulator.

Signed-off-by: York Sun york...@freescale.com
Reviewed-by: Wood Scott-B07421 scottw...@freescale.com
Reviewed-by: Fleming Andrew-AFLEMING aflem...@freescale.com
Tested-by: Fleming Andrew-AFLEMING aflem...@freescale.com
---
 arch/powerpc/boot/dts/b4860emu.dts |  201 
 1 file changed, 201 insertions(+)
 create mode 100644 arch/powerpc/boot/dts/b4860emu.dts

diff --git a/arch/powerpc/boot/dts/b4860emu.dts 
b/arch/powerpc/boot/dts/b4860emu.dts
new file mode 100644
index 000..cb927ba
--- /dev/null
+++ b/arch/powerpc/boot/dts/b4860emu.dts
@@ -0,0 +1,201 @@
+/*
+ * B4860 emulator Device Tree Source
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *   names of its contributors may be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/include/ fsl/e6500_power_isa.dtsi
+
+/ {
+   #address-cells = 2;
+   #size-cells = 2;
+   interrupt-parent = mpic;
+
+   aliases {
+   ccsr = soc;
+
+   serial0 = serial0;
+   serial1 = serial1;
+   serial2 = serial2;
+   serial3 = serial3;
+   dma0 = dma0;
+   dma1 = dma1;
+   };
+
+   cpus {
+   #address-cells = 1;
+   #size-cells = 0;
+
+   cpu0: PowerPC,e6500@0 {
+   device_type = cpu;
+   reg = 0 1;
+   next-level-cache = L2;
+   };
+   cpu1: PowerPC,e6500@2 {
+   device_type = cpu;
+   reg = 2 3;
+   next-level-cache = L2;
+   };
+   cpu2: PowerPC,e6500@4 {
+   device_type = cpu;
+   reg = 4 5;
+   next-level-cache = L2;
+   };
+   cpu3: PowerPC,e6500@6 {
+   device_type = cpu;
+   reg = 6 7;
+   next-level-cache = L2;
+   };
+   };
+};
+
+/ {
+   model = fsl,B4860QDS;
+   compatible = fsl,b4860emu, fsl,B4860QDS;
+   #address-cells = 2;
+   #size-cells = 2;
+   interrupt-parent = mpic;
+
+   ifc: localbus@ffe124000 {
+   reg = 0xf 0xfe124000 0 0x2000;
+   ranges = 0 0 0xf 0xe800 0x0800
+ 2 0 0xf 0xff80 0x0001
+ 3 0 0xf 0xffdf 0x8000;
+
+   nor@0,0 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = cfi-flash;
+   reg = 0x0 0x0 0x800;
+   bank-width = 2;
+   device-width = 1;
+   };
+   };
+
+   memory {
+   device_type = memory;
+   };
+
+   soc: soc@ffe00 {
+   ranges = 0x 0xf 0xfe00 0x100;
+   reg = 0xf 0xfe00 0 0x1000;
+
+   };
+};
+
+ifc {
+   #address-cells = 2;
+   #size-cells = 1

[PATCH 4/7] power/mpc85xx: Add delay after enabling I2C master

[York Sun]

Erratum A-006037 indicates I2C controller executes the write to I2CCR only
after it sees SCL idle for 64K cycle of internal I2C controller clocks. If
during this waiting period, I2C controller is disabled (I2CCR[MEN] set to
0), then the controller could end in bad state, and hang the future access
to I2C register.

The mpc_i2c_fixup() function tries to recover the bus from a stalled state
where the 9th clock pulse wasn't generated. However, this workaround
disables and enables I2C controller without meeting waiting requirement of
this erratum.

This erratum applies to some 85xx SoCs. It is safe to apply to all of them
for mpc_i2c_fixup().

Signed-off-by: York Sun york...@freescale.com
Reviewed-by: Wood Scott-B07421 scottw...@freescale.com
Reviewed-by: Fleming Andrew-AFLEMING aflem...@freescale.com
Tested-by: Fleming Andrew-AFLEMING aflem...@freescale.com
CC: linux-...@vger.kernel.org
---
 drivers/i2c/busses/i2c-mpc.c |   11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index b80c768..55dce43 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -106,7 +106,12 @@ static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
 static void mpc_i2c_fixup(struct mpc_i2c *i2c)
 {
int k;
-   u32 delay_val = 100 / i2c-real_clk + 1;
+   u32 delay_val;
+#ifdef CONFIG_PPC_85xx
+   delay_val = 65536 / (fsl_get_sys_freq() / 200); /* 64K cycle */
+#else
+   delay_val = 100 / i2c-real_clk + 1;
+#endif
 
if (delay_val  2)
delay_val = 2;
@@ -116,7 +121,11 @@ static void mpc_i2c_fixup(struct mpc_i2c *i2c)
writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
udelay(delay_val);
writeccr(i2c, CCR_MEN);
+#ifdef CONFIG_PPC_85xx
+   udelay(delay_val);
+#else
udelay(delay_val  1);
+#endif
}
 }
 
-- 
1.7.9.5


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Re: [RFC] power/mpc85xx: Add delay after enabling I2C master

[York Sun]

On 07/22/2013 05:33 PM, Scott Wood wrote:
 On Mon, May 13, 2013 at 02:27:08PM -0700, York Sun wrote:
 Erratum A-006037 indicates I2C controller executes the write to I2CCR only
 after it sees SCL idle for 64K cycle of internal I2C controller clocks. If
 during this waiting period, I2C controller is disabled (I2CCR[MEN] set to
 0), then the controller could end in bad state, and hang the future access
 to I2C register.

 The mpc_i2c_fixup() function tries to recover the bus from a stalled state
 where the 9th clock pulse wasn't generated. However, this workaround
 disables and enables I2C controller without meeting waiting requirement of
 this erratum.

 This erratum applies to some 85xx SoCs. It is safe to apply to all of them
 for mpc_i2c_fixup().

 Signed-off-by: York Sun york...@freescale.com

 ---
 I'd like to get rid of the #ifdef if mpc5121 is OK with the longer delay.
 
 Are mpc5121 and mpc85xx the only things that use this?

No. 83xx and 86xx also uses this file. But I am only unsure if mpc52xx
is OK with this extended delay. I guess they are but I don't have a
proof, or someone to confirm.

 
 Are you sure the delay always works out to be longer?  What is the
 relationship between fsl_get_sys_freq() and i2c-real_clk?

Yes. The max divider from sys clock to i2c clcok is 32K. i2c-real_clk
is the clock I2C controller pumps out, not its internal operation clock.

 
 In any case, you should send this patch to the i2c maintainer and list.
 

I don't have the name on top of my head. Is that linux-...@vger.kernel.org?

York


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Re: [RFC] power/mpc85xx: Add delay after enabling I2C master

[York Sun]

On 07/23/2013 11:43 AM, Scott Wood wrote:

 Yes. The max divider from sys clock to i2c clcok is 32K.
 i2c-real_clk is the clock I2C controller pumps out, not its internal
 operation clock.
 
 32K is the max for all implementations?

Yes, according to application note 2919 (published).

 
 BTW, Where does the 200 come from?  Shouldn't it be 100 if
 you're converting to usec?  If you're trying to add some slack, say so
 rather than having a comment suggest that the output of that formula is
 64K cycles.  Or is there an implicit assumption that i2c runs at half
 the system frequency?  Is that assumption true for all implementations
 that have this erratum?

The clock source is half the sysclk. This erratum applies to selected
85xx SoCs. I have confirmed with application team that it is safe to
apply the delay to all 85xx.

 
  In any case, you should send this patch to the i2c maintainer and list.
 

 I don't have the name on top of my head. Is that
 linux-...@vger.kernel.org?
 
 Yes, and Wolfram Sang w...@the-dreams.de is the maintainer.  This is
 listed in the MAINTAINERS file.
 

I can resubmit this patch after the feedback is addressed.

York



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[PATCH RFC] power/mpc85xx: Add delay after enabling I2C master

[York Sun]

Erratum A-006037 indicates I2C controller executes the write to I2CCR only
after it sees SCL idle for 64K cycle of internal I2C controller clocks. If
during this waiting period, I2C controller is disabled (I2CCR[MEN] set to
0), then the controller could end in bad state, and hang the future access
to I2C register.

The mpc_i2c_fixup() function tries to recover the bus from a stalled state
where the 9th clock pulse wasn't generated. However, this workaround
disables and enables I2C controller without meeting waiting requirement of
this erratum.

This erratum applies to some 85xx SoCs. It is safe to apply to all of them
for mpc_i2c_fixup().

Signed-off-by: York Sun york...@freescale.com
---
I'd like to get rid of the #ifdef if mpc5121 is OK with the longer delay.

 drivers/i2c/busses/i2c-mpc.c |   11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index a69459e..3e540ca 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -105,7 +105,12 @@ static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
 static void mpc_i2c_fixup(struct mpc_i2c *i2c)
 {
int k;
-   u32 delay_val = 100 / i2c-real_clk + 1;
+   u32 delay_val;
+#ifdef CONFIG_PPC_85xx
+   delay_val = 65536 / (fsl_get_sys_freq() / 200); /* 64K cycle */
+#else
+   delay_val = 100 / i2c-real_clk + 1;
+#endif
 
if (delay_val  2)
delay_val = 2;
@@ -115,7 +120,11 @@ static void mpc_i2c_fixup(struct mpc_i2c *i2c)
writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
udelay(delay_val);
writeccr(i2c, CCR_MEN);
+#ifdef CONFIG_PPC_85xx
+   udelay(delay_val);
+#else
udelay(delay_val  1);
+#endif
}
 }
 
-- 
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[PATCH] powerpc/mpc85xx: Change spin table to cached memory

[York Sun]

ePAPR v1.1 requires the spin table to be in cached memory. So we need
to change the call argument of ioremap to enable cache and coherence.
We also flush the cache after writing to spin table to keep it compatible
with previous cache-inhibit spin table. Flushing before and after
accessing spin table is recommended by ePAPR.

Signed-off-by: York Sun york...@freescale.com
Acked-by: Timur Tabi ti...@freescale.com
---
This patch applies to 
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git next branch.

 arch/powerpc/platforms/85xx/smp.c |   49 +++--
 1 file changed, 36 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/smp.c 
b/arch/powerpc/platforms/85xx/smp.c
index 6fcfa12..148c2f2 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -128,6 +128,19 @@ static void __cpuinit smp_85xx_mach_cpu_die(void)
 }
 #endif
 
+static inline void flush_spin_table(void *spin_table)
+{
+   flush_dcache_range((ulong)spin_table,
+   (ulong)spin_table + sizeof(struct epapr_spin_table));
+}
+
+static inline u32 read_spin_table_addr_l(void *spin_table)
+{
+   flush_dcache_range((ulong)spin_table,
+   (ulong)spin_table + sizeof(struct epapr_spin_table));
+   return in_be32(((struct epapr_spin_table *)spin_table)-addr_l);
+}
+
 static int __cpuinit smp_85xx_kick_cpu(int nr)
 {
unsigned long flags;
@@ -161,8 +174,8 @@ static int __cpuinit smp_85xx_kick_cpu(int nr)
 
/* Map the spin table */
if (ioremappable)
-   spin_table = ioremap(*cpu_rel_addr,
-   sizeof(struct epapr_spin_table));
+   spin_table = ioremap_prot(*cpu_rel_addr,
+   sizeof(struct epapr_spin_table), _PAGE_COHERENT);
else
spin_table = phys_to_virt(*cpu_rel_addr);
 
@@ -173,7 +186,16 @@ static int __cpuinit smp_85xx_kick_cpu(int nr)
generic_set_cpu_up(nr);
 
if (system_state == SYSTEM_RUNNING) {
+   /*
+* To keep it compatible with old boot program which uses
+* cache-inhibit spin table, we need to flush the cache
+* before accessing spin table to invalidate any staled data.
+* We also need to flush the cache after writing to spin
+* table to push data out.
+*/
+   flush_spin_table(spin_table);
out_be32(spin_table-addr_l, 0);
+   flush_spin_table(spin_table);
 
/*
 * We don't set the BPTR register here since it already points
@@ -181,9 +203,14 @@ static int __cpuinit smp_85xx_kick_cpu(int nr)
 */
mpic_reset_core(hw_cpu);
 
-   /* wait until core is ready... */
-   if (!spin_event_timeout(in_be32(spin_table-addr_l) == 1,
-   1, 100)) {
+   /*
+* wait until core is ready...
+* We need to invalidate the stale data, in case the boot
+* loader uses a cache-inhibited spin table.
+*/
+   if (!spin_event_timeout(
+   read_spin_table_addr_l(spin_table) == 1,
+   1, 100)) {
pr_err(%s: timeout waiting for core %d to reset\n,
__func__, hw_cpu);
ret = -ENOENT;
@@ -194,12 +221,10 @@ static int __cpuinit smp_85xx_kick_cpu(int nr)
__secondary_hold_acknowledge = -1;
}
 #endif
+   flush_spin_table(spin_table);
out_be32(spin_table-pir, hw_cpu);
out_be32(spin_table-addr_l, __pa(__early_start));
-
-   if (!ioremappable)
-   flush_dcache_range((ulong)spin_table,
-   (ulong)spin_table + sizeof(struct epapr_spin_table));
+   flush_spin_table(spin_table);
 
/* Wait a bit for the CPU to ack. */
if (!spin_event_timeout(__secondary_hold_acknowledge == hw_cpu,
@@ -213,13 +238,11 @@ out:
 #else
smp_generic_kick_cpu(nr);
 
+   flush_spin_table(spin_table);
out_be32(spin_table-pir, hw_cpu);
out_be64((u64 *)(spin_table-addr_h),
  __pa((u64)*((unsigned long long *)generic_secondary_smp_init)));
-
-   if (!ioremappable)
-   flush_dcache_range((ulong)spin_table,
-   (ulong)spin_table + sizeof(struct epapr_spin_table));
+   flush_spin_table(spin_table);
 #endif
 
local_irq_restore(flags);
-- 
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[PATCH] powerpc/85xx: Add back condition for smp

[York Sun]

The timebase synchronization is only necessary if we need to reset a
separate core.  Currently only KEXEC and CPU hotplug require resetting
a single core. The following code should be in the condition of
CONFIG_KEXEC or CONFIG_HOTPLUG_CPU

.give_timebase  = smp_generic_give_timebase,
.take_timebase  = smp_generic_take_timebase,

Signed-off-by: York Sun york...@freescale.com
Acked-by: Li Yang le...@freescale.com
---
 arch/powerpc/platforms/85xx/smp.c |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/smp.c 
b/arch/powerpc/platforms/85xx/smp.c
index 56942af..868c6d7 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -192,8 +192,10 @@ struct smp_ops_t smp_85xx_ops = {
.cpu_disable= generic_cpu_disable,
.cpu_die= generic_cpu_die,
 #endif
+#if defined(CONFIG_KEXEC) || defined(CONFIG_HOTPLUG_CPU)
.give_timebase  = smp_generic_give_timebase,
.take_timebase  = smp_generic_take_timebase,
+#endif
 };
 
 #ifdef CONFIG_KEXEC
-- 
1.7.0.4


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Re: [PATCH v3 09/11] powerpc/mpc5121: shared DIU framebuffer support

[York Sun]

On Tue, 2010-02-16 at 11:06 -0700, Grant Likely wrote:
 [...]
  diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
  index 72d68b3..29c7f31 100644
  --- a/drivers/video/fsl-diu-fb.c
  +++ b/drivers/video/fsl-diu-fb.c
  @@ -34,7 +34,7 @@
   #include linux/of_platform.h
 
   #include sysdev/fsl_soc.h
  -#include fsl-diu-fb.h
  +#include linux/fsl-diu-fb.h
 
   /*
   * These parameters give default parameters
  @@ -178,6 +178,21 @@ static struct fb_videomode __devinitdata 
  fsl_diu_mode_db[] = {
 .sync   = FB_SYNC_COMP_HIGH_ACT | 
  FB_SYNC_VERT_HIGH_ACT,
 .vmode  = FB_VMODE_NONINTERLACED
 },
  +   {
  +   .name   = 800x480-60,
  +   .refresh= 60,
  +   .xres   = 800,
  +   .yres   = 480,
  +   .pixclock   = 31250,
  +   .left_margin= 86,
  +   .right_margin   = 42,
  +   .upper_margin   = 33,
  +   .lower_margin   = 10,
  +   .hsync_len  = 128,
  +   .vsync_len  = 2,
  +   .sync   = FB_SYNC_COMP_HIGH_ACT | 
  FB_SYNC_VERT_HIGH_ACT,
  +   .vmode  = FB_VMODE_NONINTERLACED
  +   },
   };
 
 This hunk bothers me.  It looks like the type of data that belongs
 either in some common shared .c file, or encoded into the device tree.
  It seems to be data about the display panel, instead of data about
 the framebuffer driver.  I know that the driver already uses this
 pattern, but before I merge this patch and further rely on that
 pattern, I think it is worth discussing.
 
 Kumar, York, thoughts?
 
 g.
 

It is a hardware related configuration. It is only used during booting
before other configuration comes available.

I am OK to move it to anywhere as long as it doesn't get confused or
lost.

York


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[PATCH 1/2] Added virtual resolution and panning support.

[York Sun]

Application can now have the virtual resoltuion and use FBIOPAN_DISPLAY ioctl 
to pan.

Signed-off-by: York Sun [EMAIL PROTECTED]
---
 drivers/video/fsl-diu-fb.c |   28 +++-
 1 files changed, 23 insertions(+), 5 deletions(-)

diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index 9cd36c2..d67e79b 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -778,6 +778,22 @@ static void unmap_video_memory(struct fb_info *info)
 }
 
 /*
+ * Using the fb_var_screeninfo in fb_info we set the aoi of this
+ * particular framebuffer. It is a light version of fsl_diu_set_par.
+ */
+static int fsl_diu_set_aoi(struct fb_info *info)
+{
+   struct fb_var_screeninfo *var = info-var;
+   struct mfb_info *mfbi = info-par;
+   struct diu_ad *ad = mfbi-ad;
+
+   /* AOI should not be greater than display size */
+   ad-offset_xyi = cpu_to_le32((var-yoffset  16) | var-xoffset);
+   ad-offset_xyd = cpu_to_le32((mfbi-y_aoi_d  16) | mfbi-x_aoi_d);
+   return 0;
+}
+
+/*
  * Using the fb_var_screeninfo in fb_info we set the resolution of this
  * particular framebuffer. This function alters the fb_fix_screeninfo stored
  * in fb_info. It does not alter var in fb_info since we are using that
@@ -817,11 +833,11 @@ static int fsl_diu_set_par(struct fb_info *info)
diu_ops.get_pixel_format(var-bits_per_pixel,
 machine_data-monitor_port);
ad-addr= cpu_to_le32(info-fix.smem_start);
-   ad-src_size_g_alpha = cpu_to_le32((var-yres  12) |
-   var-xres) | mfbi-g_alpha;
-   /* fix me. AOI should not be greater than display size */
+   ad-src_size_g_alpha = cpu_to_le32((var-yres_virtual  12) |
+   var-xres_virtual) | mfbi-g_alpha;
+   /* AOI should not be greater than display size */
ad-aoi_size= cpu_to_le32((var-yres  16) | var-xres);
-   ad-offset_xyi = 0;
+   ad-offset_xyi = cpu_to_le32((var-yoffset  16) | var-xoffset);
ad-offset_xyd = cpu_to_le32((mfbi-y_aoi_d  16) | mfbi-x_aoi_d);
 
/* Disable chroma keying function */
@@ -921,6 +937,8 @@ static int fsl_diu_pan_display(struct fb_var_screeninfo 
*var,
else
info-var.vmode = ~FB_VMODE_YWRAP;
 
+   fsl_diu_set_aoi(info);
+
return 0;
 }
 
@@ -989,7 +1007,7 @@ static int fsl_diu_ioctl(struct fb_info *info, unsigned 
int cmd,
pr_debug(set AOI display offset of index %d to (%d,%d)\n,
 mfbi-index, aoi_d.x_aoi_d, aoi_d.y_aoi_d);
fsl_diu_check_var(info-var, info);
-   fsl_diu_set_par(info);
+   fsl_diu_set_aoi(info);
break;
case MFB_GET_AOID:
aoi_d.x_aoi_d = mfbi-x_aoi_d;
-- 
1.5.2.2

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[PATCH 2/2] Bug fix. Add sanity check for AOI position

[York Sun]

AOI position cannot be negative.

Signed-off-by: York Sun [EMAIL PROTECTED]
---
 drivers/video/fsl-diu-fb.c |4 
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index d67e79b..8898d2a 100644
--- a/drivers/video/fsl-diu-fb.c
+++ b/drivers/video/fsl-diu-fb.c
@@ -479,6 +479,10 @@ static void adjust_aoi_size_position(struct 
fb_var_screeninfo *var,
base_plane_width = machine_data-fsl_diu_info[0]-var.xres;
base_plane_height = machine_data-fsl_diu_info[0]-var.yres;
 
+   if (mfbi-x_aoi_d  0)
+   mfbi-x_aoi_d = 0;
+   if (mfbi-y_aoi_d  0)
+   mfbi-y_aoi_d = 0;
switch (index) {
case 0:
if (mfbi-x_aoi_d != 0)
-- 
1.5.2.2

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[PATCH 0/2] Add virtual resolution and panning for Freescale DIU

[York Sun]

This patch set adds virtual resolutoin suppport for Freescale DIU driver.
Applications such as fbset can set visible resolution and virtual resoltuion.
X window can use the virtual resolution if xorg.conf has the following option.

option virtual vxres vyres


The second patch fixes a bug of AOI position.

Regards,

York

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Re: [PATCH 2/2 v5] Add DIU platform code for MPC8610HPCD

[York Sun]

On Tue, 2008-04-01 at 14:00 -0700, Andrew Morton wrote:
 On Mon, 31 Mar 2008 11:23:25 -0500
 York Sun [EMAIL PROTECTED] wrote:
 
  Add platform code to support Freescale DIU. The platform code includes
  framebuffer memory allocation, pixel format, monitor port, etc.
  
  Signed-off-by: York Sun [EMAIL PROTECTED]
  Signed-off-by: Timur Tabi [EMAIL PROTECTED]
  ---
  This patch addes platform support for Freescale DIU driver, targeting 
  2.6.26 kernel.
  
   arch/powerpc/configs/mpc8610_hpcd_defconfig |  198 
  +++
   arch/powerpc/platforms/86xx/mpc8610_hpcd.c  |  190 
  --
   arch/powerpc/sysdev/fsl_soc.c   |   41 ++
   arch/powerpc/sysdev/fsl_soc.h   |   23 +++
   4 files changed, 413 insertions(+), 39 deletions(-)
 
 The defconfig change gets almost 100% rejects and probably isn't
 appropriate here and isn't very important.  I dropped that part of the
 patch.
 

It's OK.

York

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v5 patch to add FSL DIU framebuffer driver

[York Sun]

Thanks for the feedback from Scott and Anton. Here is the version 5 patch.
My previous patch didn't arrive at [EMAIL PROTECTED]
Hopefully this issue has been fixed and more feedback from the mailing list.

Regards,

York

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[PATCH 2/2 v5] Add DIU platform code for MPC8610HPCD

[York Sun]

Add platform code to support Freescale DIU. The platform code includes
framebuffer memory allocation, pixel format, monitor port, etc.

Signed-off-by: York Sun [EMAIL PROTECTED]
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch addes platform support for Freescale DIU driver, targeting 2.6.26 
kernel.

 arch/powerpc/configs/mpc8610_hpcd_defconfig |  198 +++
 arch/powerpc/platforms/86xx/mpc8610_hpcd.c  |  190 --
 arch/powerpc/sysdev/fsl_soc.c   |   41 ++
 arch/powerpc/sysdev/fsl_soc.h   |   23 +++
 4 files changed, 413 insertions(+), 39 deletions(-)

diff --git a/arch/powerpc/configs/mpc8610_hpcd_defconfig 
b/arch/powerpc/configs/mpc8610_hpcd_defconfig
index 2500ef4..98cef01 100644
--- a/arch/powerpc/configs/mpc8610_hpcd_defconfig
+++ b/arch/powerpc/configs/mpc8610_hpcd_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24-rc4
-# Thu Dec  6 16:48:56 2007
+# Linux kernel version: 2.6.25-rc5
+# Tue Mar 25 16:10:42 2008
 #
 # CONFIG_PPC64 is not set
 
@@ -29,6 +29,7 @@ CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
 CONFIG_IRQ_PER_CPU=y
 CONFIG_RWSEM_XCHGADD_ALGORITHM=y
 CONFIG_ARCH_HAS_ILOG2_U32=y
@@ -65,16 +66,20 @@ CONFIG_LOCALVERSION=
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
 # CONFIG_AUDIT is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
 # CONFIG_FAIR_GROUP_SCHED is not set
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
 CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -88,11 +93,13 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
+CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_VM_EVENT_COUNTERS=y
@@ -100,6 +107,13 @@ CONFIG_SLUB_DEBUG=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
@@ -122,6 +136,7 @@ CONFIG_DEFAULT_DEADLINE=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED=deadline
+CONFIG_CLASSIC_RCU=y
 
 #
 # Platform support
@@ -130,14 +145,15 @@ CONFIG_DEFAULT_IOSCHED=deadline
 # CONFIG_PPC_82xx is not set
 # CONFIG_PPC_83xx is not set
 CONFIG_PPC_86xx=y
-# CONFIG_PPC_MPC52xx is not set
-# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
 # CONFIG_PPC_CELL is not set
 # CONFIG_PPC_CELL_NATIVE is not set
 # CONFIG_PQ2ADS is not set
 # CONFIG_MPC8641_HPCN is not set
 CONFIG_MPC8610_HPCD=y
 CONFIG_MPC8610=y
+# CONFIG_IPIC is not set
 CONFIG_MPIC=y
 # CONFIG_MPIC_WEIRD is not set
 # CONFIG_PPC_I8259 is not set
@@ -148,7 +164,6 @@ CONFIG_MPIC=y
 # CONFIG_PPC_INDIRECT_IO is not set
 # CONFIG_GENERIC_IOMAP is not set
 # CONFIG_CPU_FREQ is not set
-# CONFIG_CPM2 is not set
 # CONFIG_FSL_ULI1575 is not set
 
 #
@@ -164,12 +179,16 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 # CONFIG_HZ_300 is not set
 CONFIG_HZ_1000=y
 CONFIG_HZ=1000
+# CONFIG_SCHED_HRTICK is not set
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
+# CONFIG_IOMMU_HELPER is not set
 CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
 CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_POPULATES_NODE_MAP=y
 CONFIG_SELECT_MEMORY_MODEL=y
@@ -188,10 +207,7 @@ CONFIG_VIRT_TO_BUS=y
 CONFIG_PROC_DEVICETREE=y
 # CONFIG_CMDLINE_BOOL is not set
 # CONFIG_PM is not set
-CONFIG_SUSPEND_UP_POSSIBLE=y
-CONFIG_HIBERNATION_UP_POSSIBLE=y
 # CONFIG_SECCOMP is not set
-# CONFIG_WANT_DEVICE_TREE is not set
 CONFIG_ISA_DMA_API=y
 
 #
@@ -243,6 +259,7 @@ CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
 # CONFIG_XFRM_SUB_POLICY is not set
 # CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -311,6 +328,7 @@ CONFIG_IPV6_SIT=y
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
@@ -357,7 +375,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16

[PATCH 1/2 v5] Driver for Freescale 8610 and 5121 DIU

[York Sun]

The following features are supported:
plane 0 works as a regular frame buffer, can be accessed by /dev/fb0
plane 1 has two AOIs (area of interest), can be accessed by /dev/fb1 and 
/dev/fb2
plane 2 has two AOIs, can be accessed by /dev/fb3 and /dev/fb4
Special ioctls support AOIs

All /dev/fb* can be used as regular frame buffer devices, except hardware 
change can
only be made through /dev/fb0. Changing pixel clock has no effect on other fbs.

Limitation of usage of AOIs:
AOIs on the same plane can not be horizonally overlapped
AOIs have horizonal order, i.e. AOI0 should be always on top of AOI1
AOIs can not beyond phisical display area. Application should check AOI geometry
before changing physical resolution on /dev/fb0

required command line parameters to preallocate memory for frame buffer
diufb=15M

optional command line parameters to set modes and monitor
video=fslfb:[resolution][,bpp][,monitor]
Syntax:

Resolution
xres x [EMAIL PROTECTED], the -bpp and @refresh_rate are optional
eg, 1024x768, 1280x1024, 1280x1024-32, [EMAIL PROTECTED], [EMAIL PROTECTED], 
[EMAIL PROTECTED]

Bpp
bpp=32, bpp=24, or bpp=16

Monitor
monitor=0, monitor=1, monitor=2
0 is DVI
1 is Single link LVDS
2 is Double link LVDS

Note: switching monitor is a board feather, not DIU feather. MPC8610HPCD has 
three
monitor ports to swtich to. MPC5121ADS doesn't have additional monitor port. So 
switching
monirot port for MPC5121ADS has no effect.

If compiled as a module, it takes pamameters mode, bpp, monitor with the same 
syntax above.

Signed-off-by: York Sun [EMAIL PROTECTED]
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch addes new feature of Freescale DIU driver, targeting 2.6.26 kernel.

 Documentation/powerpc/booting-without-of.txt |   33 +
 arch/powerpc/boot/dts/mpc8610_hpcd.dts   |   12 +
 drivers/video/Kconfig|   10 +
 drivers/video/Makefile   |1 +
 drivers/video/fsl-diu-fb.c   | 1721 ++
 drivers/video/fsl-diu-fb.h   |  223 
 6 files changed, 2000 insertions(+), 0 deletions(-)
 create mode 100644 drivers/video/fsl-diu-fb.c
 create mode 100644 drivers/video/fsl-diu-fb.h

diff --git a/Documentation/powerpc/booting-without-of.txt 
b/Documentation/powerpc/booting-without-of.txt
index 7b4e8a7..0c85500 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2816,6 +2816,39 @@ platforms are moved over to use the 
flattened-device-tree model.
   big-endian;
   };
 
+r) Freescale Display Interface Unit
+
+The Freescale DIU is a LCD controller, with proper hardware, it can also
+drive DVI monitors.
+
+Required properties:
+- compatible : should be fsl-diu.
+- reg : should contain at least address and length of the DIU register
+  set.
+- Interrupts : one DIU interrupt should be describe here.
+
+Example (MPC8610HPCD)
+   [EMAIL PROTECTED] {
+   compatible = fsl,diu;
+   reg = 0x2c000 100;
+   interrupts = 72 2;
+   interrupt-parent = mpic;
+   };
+
+s) Freescale on board FPGA
+
+This is the memory-mapped registers for on board FPGA.
+
+Required properities:
+- compatible : should be fsl,fpga-pixis.
+- reg : should contain the address and the lenght of the FPPGA register
+  set.
+
+Example (MPC8610HPCD)
+   [EMAIL PROTECTED] {
+   compatible = fsl,fpga-pixis;
+   reg = 0xe800 32;
+   };
 
More devices will be defined as this spec matures.
 
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts 
b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 16c947b..1f2f1e0 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -45,6 +45,11 @@
reg = 0x 0x2000;  // 512M at 0x0
};
 
+   [EMAIL PROTECTED] {
+   compatible = fsl,fpga-pixis;
+   reg = 0xe800 32;  // pixis at 0xe800
+   };
+
[EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 1;
@@ -104,6 +109,13 @@
interrupt-parent = mpic;
};
 
+   [EMAIL PROTECTED] {
+   compatible = fsl,diu;
+   reg = 0x2c000 100;
+   interrupts = 72 2;
+   interrupt-parent = mpic;
+   };
+
mpic: [EMAIL PROTECTED] {
clock-frequency = 0;
interrupt-controller;
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e0b0580..d9c6be4 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1779,6 +1779,16 @@ config FB_MBX_DEBUG
 
  If unsure, say N.
 
+config FB_FSL_DIU
+   tristate Freescale DIU framebuffer support
+   depends on FB  FSL_SOC
+   select

Re: [PATCH 1/2 v4] Driver for Freescale 8610 and 5121 DIU

[York Sun]

On Fri, 2008-03-28 at 20:48 +0300, Anton Vorontsov wrote:
  +  if (copy_from_user(pix_fmt, (void __user *)arg,
  +  sizeof(pix_fmt)))
  
  OK, you fixed the cast here...
 
 Maybe better would be to define buf at the top of this function as
 void __user *buf = (void __user *)arg;, i.e. just once?

I think it is a good idea.

 
  
  +  return -EFAULT;
  +  ad-pix_fmt = pix_fmt;
  +  pr_debug(Set pixel format to 0x%08x\n, ad-pix_fmt);
  +  break;
  +  case MFB_GET_PIXFMT:
  +  if (!arg)
  +  return -EINVAL;
 
 This if (!arg) appears to be everywhere except default: label, maybe
 this could be placed on top too?
Will do that, too.

York

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v4 patch to add FSL DIU framebuffer driver

[York Sun]

Thanks for the feedback. The following mails are the v4 patch to add Freescale 
DIU framebuffer driver.

York

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[PATCH 2/2 v4] Add DIU platform code for MPC8610HPCD

[York Sun]

Add platform code to support Freescale DIU. The platform code includes
framebuffer memory allocation, pixel format, monitor port, etc.

Signed-off-by: York Sun [EMAIL PROTECTED]
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch adds DIU platform support for MPC8610HPCD board, targeting 2.6.26 
kernel.

 arch/powerpc/configs/mpc8610_hpcd_defconfig |  198 +++
 arch/powerpc/platforms/86xx/mpc8610_hpcd.c  |  192 +--
 arch/powerpc/sysdev/fsl_soc.c   |   41 ++
 arch/powerpc/sysdev/fsl_soc.h   |   23 +++
 4 files changed, 415 insertions(+), 39 deletions(-)

diff --git a/arch/powerpc/configs/mpc8610_hpcd_defconfig 
b/arch/powerpc/configs/mpc8610_hpcd_defconfig
index 2500ef4..98cef01 100644
--- a/arch/powerpc/configs/mpc8610_hpcd_defconfig
+++ b/arch/powerpc/configs/mpc8610_hpcd_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24-rc4
-# Thu Dec  6 16:48:56 2007
+# Linux kernel version: 2.6.25-rc5
+# Tue Mar 25 16:10:42 2008
 #
 # CONFIG_PPC64 is not set
 
@@ -29,6 +29,7 @@ CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
 CONFIG_IRQ_PER_CPU=y
 CONFIG_RWSEM_XCHGADD_ALGORITHM=y
 CONFIG_ARCH_HAS_ILOG2_U32=y
@@ -65,16 +66,20 @@ CONFIG_LOCALVERSION=
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
 # CONFIG_AUDIT is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
 # CONFIG_FAIR_GROUP_SCHED is not set
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
 CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -88,11 +93,13 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
+CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_VM_EVENT_COUNTERS=y
@@ -100,6 +107,13 @@ CONFIG_SLUB_DEBUG=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
@@ -122,6 +136,7 @@ CONFIG_DEFAULT_DEADLINE=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED=deadline
+CONFIG_CLASSIC_RCU=y
 
 #
 # Platform support
@@ -130,14 +145,15 @@ CONFIG_DEFAULT_IOSCHED=deadline
 # CONFIG_PPC_82xx is not set
 # CONFIG_PPC_83xx is not set
 CONFIG_PPC_86xx=y
-# CONFIG_PPC_MPC52xx is not set
-# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
 # CONFIG_PPC_CELL is not set
 # CONFIG_PPC_CELL_NATIVE is not set
 # CONFIG_PQ2ADS is not set
 # CONFIG_MPC8641_HPCN is not set
 CONFIG_MPC8610_HPCD=y
 CONFIG_MPC8610=y
+# CONFIG_IPIC is not set
 CONFIG_MPIC=y
 # CONFIG_MPIC_WEIRD is not set
 # CONFIG_PPC_I8259 is not set
@@ -148,7 +164,6 @@ CONFIG_MPIC=y
 # CONFIG_PPC_INDIRECT_IO is not set
 # CONFIG_GENERIC_IOMAP is not set
 # CONFIG_CPU_FREQ is not set
-# CONFIG_CPM2 is not set
 # CONFIG_FSL_ULI1575 is not set
 
 #
@@ -164,12 +179,16 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 # CONFIG_HZ_300 is not set
 CONFIG_HZ_1000=y
 CONFIG_HZ=1000
+# CONFIG_SCHED_HRTICK is not set
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
+# CONFIG_IOMMU_HELPER is not set
 CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
 CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_POPULATES_NODE_MAP=y
 CONFIG_SELECT_MEMORY_MODEL=y
@@ -188,10 +207,7 @@ CONFIG_VIRT_TO_BUS=y
 CONFIG_PROC_DEVICETREE=y
 # CONFIG_CMDLINE_BOOL is not set
 # CONFIG_PM is not set
-CONFIG_SUSPEND_UP_POSSIBLE=y
-CONFIG_HIBERNATION_UP_POSSIBLE=y
 # CONFIG_SECCOMP is not set
-# CONFIG_WANT_DEVICE_TREE is not set
 CONFIG_ISA_DMA_API=y
 
 #
@@ -243,6 +259,7 @@ CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
 # CONFIG_XFRM_SUB_POLICY is not set
 # CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -311,6 +328,7 @@ CONFIG_IPV6_SIT=y
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
@@ -357,7 +375,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16

[PATCH 1/2 v4] Driver for Freescale 8610 and 5121 DIU

[York Sun]

The following features are supported:
plane 0 works as a regular frame buffer, can be accessed by /dev/fb0
plane 1 has two AOIs (area of interest), can be accessed by /dev/fb1 and 
/dev/fb2
plane 2 has two AOIs, can be accessed by /dev/fb3 and /dev/fb4
Special ioctls support AOIs

All /dev/fb* can be used as regular frame buffer devices, except hardware 
change can
only be made through /dev/fb0. Changing pixel clock has no effect on other fbs.

Limitation of usage of AOIs:
AOIs on the same plane can not be horizonally overlapped
AOIs have horizonal order, i.e. AOI0 should be always on top of AOI1
AOIs can not beyond phisical display area. Application should check AOI geometry
before changing physical resolution on /dev/fb0

required command line parameters to preallocate memory for frame buffer
diufb=15M

optional command line parameters to set modes and monitor
video=fslfb:[resolution][,bpp][,monitor]
Syntax:

Resolution
xres x [EMAIL PROTECTED], the -bpp and @refresh_rate are optional
eg, 1024x768, 1280x1024, 1280x1024-32, [EMAIL PROTECTED], [EMAIL PROTECTED], 
[EMAIL PROTECTED]

Bpp
bpp=32, bpp=24, or bpp=16

Monitor
monitor=0, monitor=1, monitor=2
0 is DVI
1 is Single link LVDS
2 is Double link LVDS

Note: switching monitor is a board feather, not DIU feather. MPC8610HPCD has 
three
monitor ports to swtich to. MPC5121ADS doesn't have additional monitor port. So 
switching
monirot port for MPC5121ADS has no effect.

If compiled as a module, it takes pamameters mode, bpp, monitor with the same 
syntax above.

Signed-off-by: York Sun [EMAIL PROTECTED]
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch addes new feature of Freescale Display Unit framebuffer driver, 
targeting 2.6.26 kernel.

 Documentation/powerpc/booting-without-of.txt |   33 +
 arch/powerpc/boot/dts/mpc8610_hpcd.dts   |   12 +
 drivers/video/Kconfig|   10 +
 drivers/video/Makefile   |1 +
 drivers/video/fsl-diu-fb.c   | 1741 ++
 drivers/video/fsl-diu-fb.h   |  223 
 6 files changed, 2020 insertions(+), 0 deletions(-)
 create mode 100644 drivers/video/fsl-diu-fb.c
 create mode 100644 drivers/video/fsl-diu-fb.h

diff --git a/Documentation/powerpc/booting-without-of.txt 
b/Documentation/powerpc/booting-without-of.txt
index 7b4e8a7..8ed644f 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2816,6 +2816,39 @@ platforms are moved over to use the 
flattened-device-tree model.
   big-endian;
   };
 
+r) Freescale Display Interface Unit
+
+The Freescale DIU is a LCD controller, with proper hardware, it can also
+drive DVI monitors.
+
+Required properties:
+- compatible : should be fsl-diu.
+- reg : should contain at least address and length of the DIU register
+  set.
+- Interrupts : one DIU interrupt should be describe here.
+
+Example (MPC8610HPCD)
+   [EMAIL PROTECTED] {
+   compatible = fsl,diu;
+   reg = 0x2c000 100;
+   interrupts = 72 2;
+   interrupt-parent = mpic;
+   };
+
+s) Freescale on board FPGA
+
+This is the memory-mapped registers for on board FPGA.
+
+Required properities:
+- compatible : should be fsl,fpga-pixis.
+- reg : should contain the address and the lenght of the FPPGA register
+  set.
+
+Example (MPC8610HPCD)
+   [EMAIL PROTECTED] {
+   compatible = fsl,fpga-pixis;
+   reg = 0xe800 20;
+   };
 
More devices will be defined as this spec matures.
 
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts 
b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 16c947b..7f3d64f 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -45,6 +45,11 @@
reg = 0x 0x2000;  // 512M at 0x0
};
 
+   [EMAIL PROTECTED] {
+   compatible = fsl,fpga-pixis;
+   reg = 0xe800 20;  // pixis at 0xe800
+   };
+
[EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 1;
@@ -104,6 +109,13 @@
interrupt-parent = mpic;
};
 
+   [EMAIL PROTECTED] {
+   compatible = fsl,diu;
+   reg = 0x2c000 100;
+   interrupts = 72 2;
+   interrupt-parent = mpic;
+   };
+
mpic: [EMAIL PROTECTED] {
clock-frequency = 0;
interrupt-controller;
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e0b0580..d9c6be4 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1779,6 +1779,16 @@ config FB_MBX_DEBUG
 
  If unsure, say N.
 
+config FB_FSL_DIU
+   tristate Freescale DIU framebuffer support
+   depends on FB

V3 Patch - Driver for Freescale 8610 and 5121 DIU

[York Sun]

The following two patches are the 3rd version of the DIU patch for Freescale 
8610 and 5121.
It fixed the issues according to the feedback from Andrew Morton.

Andrew, incremental patches are available if requested.

Regards,

York
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[PATCH 2/2 v3] Add DIU platform code for MPC8610HPCD

[York Sun]

Add platform code to support Freescale DIU. The platform code includes
framebuffer memory allocation, pixel format, monitor port, etc.

Signed-off-by: York Sun [EMAIL PROTECTED]
---
This patch enables Freescale DIU driver for MPC8610HPCD board.

 arch/powerpc/configs/mpc8610_hpcd_defconfig |  198 +++
 arch/powerpc/platforms/86xx/mpc8610_hpcd.c  |  190 -
 arch/powerpc/sysdev/fsl_soc.c   |   41 ++
 arch/powerpc/sysdev/fsl_soc.h   |   23 +++
 4 files changed, 414 insertions(+), 38 deletions(-)

diff --git a/arch/powerpc/configs/mpc8610_hpcd_defconfig 
b/arch/powerpc/configs/mpc8610_hpcd_defconfig
index 2500ef4..98cef01 100644
--- a/arch/powerpc/configs/mpc8610_hpcd_defconfig
+++ b/arch/powerpc/configs/mpc8610_hpcd_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.24-rc4
-# Thu Dec  6 16:48:56 2007
+# Linux kernel version: 2.6.25-rc5
+# Tue Mar 25 16:10:42 2008
 #
 # CONFIG_PPC64 is not set
 
@@ -29,6 +29,7 @@ CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
 CONFIG_IRQ_PER_CPU=y
 CONFIG_RWSEM_XCHGADD_ALGORITHM=y
 CONFIG_ARCH_HAS_ILOG2_U32=y
@@ -65,16 +66,20 @@ CONFIG_LOCALVERSION=
 # CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
-# CONFIG_USER_NS is not set
-# CONFIG_PID_NS is not set
 # CONFIG_AUDIT is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
 # CONFIG_FAIR_GROUP_SCHED is not set
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
 CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@@ -88,11 +93,13 @@ CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 # CONFIG_ELF_CORE is not set
+CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
 CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_VM_EVENT_COUNTERS=y
@@ -100,6 +107,13 @@ CONFIG_SLUB_DEBUG=y
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
 # CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
@@ -122,6 +136,7 @@ CONFIG_DEFAULT_DEADLINE=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED=deadline
+CONFIG_CLASSIC_RCU=y
 
 #
 # Platform support
@@ -130,14 +145,15 @@ CONFIG_DEFAULT_IOSCHED=deadline
 # CONFIG_PPC_82xx is not set
 # CONFIG_PPC_83xx is not set
 CONFIG_PPC_86xx=y
-# CONFIG_PPC_MPC52xx is not set
-# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
 # CONFIG_PPC_CELL is not set
 # CONFIG_PPC_CELL_NATIVE is not set
 # CONFIG_PQ2ADS is not set
 # CONFIG_MPC8641_HPCN is not set
 CONFIG_MPC8610_HPCD=y
 CONFIG_MPC8610=y
+# CONFIG_IPIC is not set
 CONFIG_MPIC=y
 # CONFIG_MPIC_WEIRD is not set
 # CONFIG_PPC_I8259 is not set
@@ -148,7 +164,6 @@ CONFIG_MPIC=y
 # CONFIG_PPC_INDIRECT_IO is not set
 # CONFIG_GENERIC_IOMAP is not set
 # CONFIG_CPU_FREQ is not set
-# CONFIG_CPM2 is not set
 # CONFIG_FSL_ULI1575 is not set
 
 #
@@ -164,12 +179,16 @@ CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 # CONFIG_HZ_300 is not set
 CONFIG_HZ_1000=y
 CONFIG_HZ=1000
+# CONFIG_SCHED_HRTICK is not set
 CONFIG_PREEMPT_NONE=y
 # CONFIG_PREEMPT_VOLUNTARY is not set
 # CONFIG_PREEMPT is not set
 CONFIG_BINFMT_ELF=y
 # CONFIG_BINFMT_MISC is not set
+# CONFIG_IOMMU_HELPER is not set
 CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
 CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_POPULATES_NODE_MAP=y
 CONFIG_SELECT_MEMORY_MODEL=y
@@ -188,10 +207,7 @@ CONFIG_VIRT_TO_BUS=y
 CONFIG_PROC_DEVICETREE=y
 # CONFIG_CMDLINE_BOOL is not set
 # CONFIG_PM is not set
-CONFIG_SUSPEND_UP_POSSIBLE=y
-CONFIG_HIBERNATION_UP_POSSIBLE=y
 # CONFIG_SECCOMP is not set
-# CONFIG_WANT_DEVICE_TREE is not set
 CONFIG_ISA_DMA_API=y
 
 #
@@ -243,6 +259,7 @@ CONFIG_XFRM=y
 CONFIG_XFRM_USER=y
 # CONFIG_XFRM_SUB_POLICY is not set
 # CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
 # CONFIG_NET_KEY is not set
 CONFIG_INET=y
 # CONFIG_IP_MULTICAST is not set
@@ -311,6 +328,7 @@ CONFIG_IPV6_SIT=y
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
@@ -357,7 +375,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=131072
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024

[PATCH 1/2 v3] Driver for Freescale 8610 and 5121 DIU

[York Sun]

The following features are supported:
plane 0 works as a regular frame buffer, can be accessed by /dev/fb0
plane 1 has two AOIs (area of interest), can be accessed by /dev/fb1 and 
/dev/fb2
plane 2 has two AOIs, can be accessed by /dev/fb3 and /dev/fb4
Special ioctls support AOIs

All /dev/fb* can be used as regular frame buffer devices, except hardware 
change can
only be made through /dev/fb0. Changing pixel clock has no effect on other fbs.

Limitation of usage of AOIs:
AOIs on the same plane can not be horizonally overlapped
AOIs have horizonal order, i.e. AOI0 should be always on top of AOI1
AOIs can not beyond phisical display area. Application should check AOI geometry
before changing physical resolution on /dev/fb0

required command line parameters to preallocate memory for frame buffer
diufb=15M

optional command line parameters to set modes and monitor
video=fslfb:[resolution][,bpp][,monitor]
Syntax:

Resolution
xres x [EMAIL PROTECTED], the -bpp and @refresh_rate are optional
eg, 1024x768, 1280x1024, 1280x1024-32, [EMAIL PROTECTED], [EMAIL PROTECTED], 
[EMAIL PROTECTED]

Bpp
bpp=32, bpp=24, or bpp=16

Monitor
monitor=0, monitor=1, monitor=2
0 is DVI
1 is Single link LVDS
2 is Double link LVDS

Note: switching monitor is a board feather, not DIU feather. MPC8610HPCD has 
three
monitor ports to swtich to. MPC5121ADS doesn't have additional monitor port. So 
switching
monirot port for MPC5121ADS has no effect.

If compiled as a module, it takes pamameters mode, bpp, monitor with the same 
syntax above.

Signed-off-by: York Sun [EMAIL PROTECTED]
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch addes new feature of Freescale DIU driver, targeting 2.6.26 kernel.

 Documentation/powerpc/booting-without-of.txt |   34 +
 arch/powerpc/boot/dts/mpc8610_hpcd.dts   |   13 +
 drivers/video/Kconfig|   10 +
 drivers/video/Makefile   |1 +
 drivers/video/fsl-diu-fb.c   | 1736 ++
 drivers/video/fsl-diu-fb.h   |  224 
 6 files changed, 2018 insertions(+), 0 deletions(-)
 create mode 100644 drivers/video/fsl-diu-fb.c
 create mode 100644 drivers/video/fsl-diu-fb.h

diff --git a/Documentation/powerpc/booting-without-of.txt 
b/Documentation/powerpc/booting-without-of.txt
index 7b4e8a7..f7ae14a 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2816,6 +2816,40 @@ platforms are moved over to use the 
flattened-device-tree model.
   big-endian;
   };
 
+r) Freescale Display Interface Unit
+
+The Freescale DIU is a LCD controller, with proper hardware, it can also
+drive DVI monitors.
+
+Required properties:
+- compatible : should be fsl-diu.
+- reg : should contain at least address and length of the DIU register
+  set.
+- Interrupts : one DIU interrupt should be describe here.
+
+Example (MPC8610HPCD)
+   [EMAIL PROTECTED] {
+   device_type = lcd;
+   compatible = fsl-diu;
+   reg = 0x2c000 100;
+   interrupts = 72 2;
+   interrupt-parent = mpic;
+   };
+
+s) Freescale on board FPGA
+
+This is the memory-mapped registers for on board FPGA.
+
+Required properities:
+- compatible : should be fsl,fpga-pixis.
+- reg : should contain the address and the lenght of the FPPGA register
+  set.
+
+Example (MPC8610HPCD)
+   fpga {
+   compatible = fsl,fpga-pixis;
+   reg = 0xe800 20;
+   };
 
More devices will be defined as this spec matures.
 
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts 
b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 16c947b..78c67ee 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -45,6 +45,11 @@
reg = 0x 0x2000;  // 512M at 0x0
};
 
+   fpga {
+   compatible = fsl,fpga-pixis;
+   reg = 0xe800 20;  // pixis at 0xe800
+   };
+
[EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 1;
@@ -104,6 +109,14 @@
interrupt-parent = mpic;
};
 
+   [EMAIL PROTECTED] {
+   device_type = lcd;
+   compatible = fsl-diu;
+   reg = 0x2c000 100;
+   interrupts = 72 2;
+   interrupt-parent = mpic;
+   };
+
mpic: [EMAIL PROTECTED] {
clock-frequency = 0;
interrupt-controller;
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e0b0580..5e03377 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1779,6 +1779,16 @@ config FB_MBX_DEBUG
 
  If unsure, say N.
 
+config FB_FSL_DIU
+   tristate Freescale MPC8610/MPC5121 DIU

v2 patch for Freescale DIU driver

[York Sun]

This is the version 2 patch for Freescale DIU driver. Thanks for all the 
feedback.

The first patch is the driver. The second patch adds platform support for 
MPC8610HPCD board.
To compile, enable the Freescale MPC8610/MPC5121 DIU framebuffer support in 
the menuconfig.
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[PATCH 2/2 v2] Add DIU platform code for MPC8610HPCD

[York Sun]

Add platform code to support Freescale DIU. The platform code includes
framebuffer memory allocation, pixel format, monitor port, etc.

Signed-off-by: York Sun [EMAIL PROTECTED]
---
This patch is targeting 2.6.26 kernel.

 arch/powerpc/platforms/86xx/mpc8610_hpcd.c |  182 +++-
 arch/powerpc/sysdev/fsl_soc.c  |   41 ++
 arch/powerpc/sysdev/fsl_soc.h  |   22 
 3 files changed, 243 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c 
b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 0b07485..e087aa3 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -3,6 +3,7 @@
  *
  * Initial author: Xianghua Xiao [EMAIL PROTECTED]
  * Recode: Jason Jin [EMAIL PROTECTED]
+ * York Sun [EMAIL PROTECTED]
  *
  * Rewrite the interrupt routing. remove the 8259PIC support,
  * All the integrated device in ULI use sideband interrupt.
@@ -38,6 +39,8 @@
 #include sysdev/fsl_pci.h
 #include sysdev/fsl_soc.h
 
+static unsigned char *pixis_bdcfg0, *pixis_arch;
+
 static struct of_device_id __initdata mpc8610_ids[] = {
{ .compatible = fsl,mpc8610-immr, },
{}
@@ -161,12 +164,160 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, 
quirk_uli5229);
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5288, final_uli5288);
 #endif /* CONFIG_PCI */
 
+#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
+
+static u32 get_busfreq(void)
+{
+   struct device_node *node;
+
+   u32 fs_busfreq = 0;
+   node = of_find_node_by_type(NULL, cpu);
+   if (node) {
+   unsigned int size;
+   const unsigned int *prop =
+   of_get_property(node, bus-frequency, size);
+   if (prop)
+   fs_busfreq = *prop;
+   of_node_put(node);
+   };
+   return fs_busfreq;
+}
+
+unsigned int mpc8610hpcd_get_pixel_format
+   (unsigned int bits_per_pixel, int monitor_port)
+{
+   static const unsigned long pixelformat[][3] = {
+   {0x2317, 0x88083218, 0x65052119},
+   {0x3316, 0x88082219, 0x65053118},
+   };
+   unsigned int pix_fmt, arch_monitor;
+
+   arch_monitor = ((*pixis_arch == 0x01)  (monitor_port == 0))? 0 : 1;
+   /* DVI port for board version 0x01 */
+
+   if (bits_per_pixel == 32)
+   pix_fmt = pixelformat[arch_monitor][0];
+   else if (bits_per_pixel == 24)
+   pix_fmt = pixelformat[arch_monitor][1];
+   else if (bits_per_pixel == 16)
+   pix_fmt = pixelformat[arch_monitor][2];
+   else
+   pix_fmt = pixelformat[1][0];
+
+   return pix_fmt;
+}
+
+void mpc8610hpcd_set_gamma_table(int monitor_port, char *gamma_table_base)
+{
+   int i;
+   if (monitor_port == 2) {/* dual link LVDS */
+   for (i = 0; i  256*3; i++)
+   gamma_table_base[i] = (gamma_table_base[i]  2) |
+((gamma_table_base[i]  6)  0x03);
+   }
+}
+
+void mpc8610hpcd_set_monitor_port(int monitor_port)
+{
+   static const u8 bdcfg[] = {0xBD, 0xB5, 0xA5};
+   if (monitor_port  3)
+   *pixis_bdcfg0 = bdcfg[monitor_port];
+}
+
+void mpc8610hpcd_set_pixel_clock(unsigned int pixclock)
+{
+   u32 __iomem *clkdvdr;
+   u32 temp;
+   /* variables for pixel clock calcs */
+   ulong  bestval, bestfreq, speed_ccb, minpixclock, maxpixclock;
+   ulong pixval;
+   long err;
+   int i;
+
+   clkdvdr = ioremap(get_immrbase() + 0xe0800, sizeof(u32));
+   if (!clkdvdr) {
+   printk(KERN_ERR Err: can't map clock divider register!\n);
+   return;
+   }
+
+   /* Pixel Clock configuration */
+   pr_debug(DIU: Bus Frequency = %d\n, get_busfreq());
+   speed_ccb = get_busfreq();
+
+   /* Calculate the pixel clock with the smallest error */
+   /* calculate the following in steps to avoid overflow */
+   pr_debug(DIU pixclock in ps - %d\n, pixclock);
+   temp = 10/pixclock;
+   temp *= 1000;
+   pixclock = temp;
+   pr_debug(DIU pixclock freq - %u\n, pixclock);
+
+   temp = pixclock * 5 / 100;
+   pr_debug(deviation = %d\n, temp);
+   minpixclock = pixclock - temp;
+   maxpixclock = pixclock + temp;
+   pr_debug(DIU minpixclock - %lu\n, minpixclock);
+   pr_debug(DIU maxpixclock - %lu\n, maxpixclock);
+   pixval = speed_ccb/pixclock;
+   pr_debug(DIU pixval = %lu\n, pixval);
+
+   err = 1;
+   bestval = pixval;
+   pr_debug(DIU bestval = %lu\n, bestval);
+
+   bestfreq = 0;
+   for (i = -1; i = 1; i++) {
+   temp = speed_ccb / ((pixval+i) + 1);
+   pr_debug(DIU test pixval i= %d, pixval=%lu, temp freq. = %u\n,
+   i, pixval, temp