[PATCH] mpc5200: support for the MAN mpc5200 based board mucmc52
- serial Console on PSC1
- 64MB SDRAM
- MTD CFI Flash
- Ethernet FEC
- I2C with PCF8563 and Temp. Sensor ADM9240
- IDE support
Signed-off-by: Heiko Schocher h...@denx.de
---
- based on:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git next
- checked with:
$ ./scripts/checkpatch.pl
0001-mpc5200-support-for-the-MAN-mpc5200-based-board-muc.patch
total: 0 errors, 0 warnings, 1714 lines checked
0001-mpc5200-support-for-the-MAN-mpc5200-based-board-muc.patch has no obvious
style problems and is ready for submission.
$
arch/powerpc/boot/dts/mucmc52.dts| 231
arch/powerpc/configs/52xx/mucmc52_defconfig | 1476 ++
arch/powerpc/platforms/52xx/mpc5200_simple.c |1 +
3 files changed, 1708 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/mucmc52.dts
create mode 100644 arch/powerpc/configs/52xx/mucmc52_defconfig
diff --git a/arch/powerpc/boot/dts/mucmc52.dts
b/arch/powerpc/boot/dts/mucmc52.dts
new file mode 100644
index 000..a4a7a20
--- /dev/null
+++ b/arch/powerpc/boot/dts/mucmc52.dts
@@ -0,0 +1,231 @@
+/*
+ * mucmc52 board Device Tree Source
+ *
+ * Copyright (C) 2009 DENX Software Engineering GmbH
+ * Heiko Schocher h...@denx.de
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = man,mucmc52;
+ compatible = man,mucmc52;
+ #address-cells = 1;
+ #size-cells = 1;
+ interrupt-parent = mpc5200_pic;
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,5...@0 {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 32;
+ i-cache-line-size = 32;
+ d-cache-size = 0x4000;// L1, 16K
+ i-cache-size = 0x4000;// L1, 16K
+ timebase-frequency = 0; // from bootloader
+ bus-frequency = 0;// from bootloader
+ clock-frequency = 0; // from bootloader
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x 0x0400; // 64MB
+ };
+
+ soc5...@f000 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,mpc5200-immr;
+ ranges = 0 0xf000 0xc000;
+ reg = 0xf000 0x0100;
+ bus-frequency = 0;// from bootloader
+ system-frequency = 0; // from bootloader
+
+ c...@200 {
+ compatible = fsl,mpc5200-cdm;
+ reg = 0x200 0x38;
+ };
+
+ mpc5200_pic: interrupt-control...@500 {
+ // 5200 interrupts are encoded into two levels;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ compatible = fsl,mpc5200-pic;
+ reg = 0x500 0x80;
+ };
+
+ ti...@600 { // General Purpose Timer
+ compatible = fsl,mpc5200-gpt;
+ reg = 0x600 0x10;
+ interrupts = 1 9 0;
+ gpio-controller;
+ };
+
+ gpio_simple: g...@b00 {
+ compatible = fsl,mpc5200-gpio;
+ reg = 0xb00 0x40;
+ interrupts = 1 7 0;
+ gpio-controller;
+ #gpio-cells = 2;
+ };
+
+ dma-control...@1200 {
+ device_type = dma-controller;
+ compatible = fsl,mpc5200-bestcomm;
+ reg = 0x1200 0x80;
+ interrupts = 3 0 0 3 1 0 3 2 0 3 3 0
+ 3 4 0 3 5 0 3 6 0 3 7 0
+ 3 8 0 3 9 0 3 10 0 3 11 0
+ 3 12 0 3 13 0 3 14 0 3 15 0;
+ };
+
+ x...@1f00 {
+ compatible = fsl,mpc5200-xlb;
+ reg = 0x1f00 0x100;
+ };
+
+ ser...@2000 { // PSC1
+ compatible = fsl,mpc5200-psc-uart;
+ reg = 0x2000 0x100;
+ interrupts = 2 1 0;
+ };
+
+ ser...@2200 { // PSC2
+ compatible = fsl,mpc5200-psc-uart;
+ reg = 0x2200 0x100;
+ interrupts = 2 2 0;
+ };
+
+ ser...@2c00 { // PSC6
+
Re: [PATCH] mpc5200: support for the MAN mpc5200 based board mucmc52
Hi,
+ mpc5200_pic: interrupt-control...@500 {
+ // 5200 interrupts are encoded into two levels;
Grant, maybe this comment could be dropped also for the in-kernel dts-files? I
think it is sufficently described in mpc5200.txt. I could prepare a patch if
you agree.
+ i...@3d40 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = fsl,mpc5200-i2c,fsl-i2c;
+ reg = 0x3d40 0x40;
+ interrupts = 2 16 0;
+ fsl5200-clocking;
Please drop the clocking-line. It became obsolete.
Regards,
Wolfram
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Industrial Linux Solutions | http://www.pengutronix.de/ |
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Re: [PATCH] mpc5200: support for the MAN mpc5200 based board mucmc52
Hi Heiko.
Comments below.
On Mon, Sep 14, 2009 at 2:05 AM, Heiko Schocher h...@denx.de wrote:
- serial Console on PSC1
- 64MB SDRAM
- MTD CFI Flash
- Ethernet FEC
- I2C with PCF8563 and Temp. Sensor ADM9240
- IDE support
Signed-off-by: Heiko Schocher h...@denx.de
arch/powerpc/boot/dts/mucmc52.dts | 231
arch/powerpc/configs/52xx/mucmc52_defconfig | 1476
++
Same comment as on your other patch. Drop the defconfig and add the
needed bits to mpc5200_defconfig (in a separate patch, and add drivers
as modules).
diff --git a/arch/powerpc/boot/dts/mucmc52.dts
b/arch/powerpc/boot/dts/mucmc52.dts
new file mode 100644
index 000..a4a7a20
--- /dev/null
+++ b/arch/powerpc/boot/dts/mucmc52.dts
@@ -0,0 +1,231 @@
+/*
+ * mucmc52 board Device Tree Source
+ *
+ * Copyright (C) 2009 DENX Software Engineering GmbH
+ * Heiko Schocher h...@denx.de
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = man,mucmc52;
+ compatible = man,mucmc52;
+ #address-cells = 1;
+ #size-cells = 1;
+ interrupt-parent = mpc5200_pic;
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,5...@0 {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 32;
+ i-cache-line-size = 32;
+ d-cache-size = 0x4000; // L1, 16K
+ i-cache-size = 0x4000; // L1, 16K
+ timebase-frequency = 0; // from bootloader
+ bus-frequency = 0; // from bootloader
+ clock-frequency = 0; // from bootloader
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x 0x0400; // 64MB
+ };
+
+ soc5...@f000 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,mpc5200-immr;
Does this board use the older and rarer non-'B' mpc5200 part? If not,
then fsl,mpc5200b-immr also needs to be in this list.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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Re: [PATCH] mpc5200: support for the MAN mpc5200 based board mucmc52
Hello Wolfram,
Wolfram Sang wrote:
Hi,
+mpc5200_pic: interrupt-control...@500 {
+// 5200 interrupts are encoded into two levels;
Grant, maybe this comment could be dropped also for the in-kernel dts-files? I
think it is sufficently described in mpc5200.txt. I could prepare a patch if
you agree.
+i...@3d40 {
+#address-cells = 1;
+#size-cells = 0;
+compatible = fsl,mpc5200-i2c,fsl-i2c;
+reg = 0x3d40 0x40;
+interrupts = 2 16 0;
+fsl5200-clocking;
Please drop the clocking-line. It became obsolete.
OK, I fix this.
Thanks for reviewing
bye
Heiko
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [PATCH] mpc5200: support for the MAN mpc5200 based board mucmc52
Hello Grant,
Grant Likely wrote:
Comments below.
On Mon, Sep 14, 2009 at 2:05 AM, Heiko Schocher h...@denx.de wrote:
- serial Console on PSC1
- 64MB SDRAM
- MTD CFI Flash
- Ethernet FEC
- I2C with PCF8563 and Temp. Sensor ADM9240
- IDE support
Signed-off-by: Heiko Schocher h...@denx.de
arch/powerpc/boot/dts/mucmc52.dts| 231
arch/powerpc/configs/52xx/mucmc52_defconfig | 1476
++
Same comment as on your other patch. Drop the defconfig and add the
needed bits to mpc5200_defconfig (in a separate patch, and add drivers
as modules).
Yep, thanks. I look, how this works.
diff --git a/arch/powerpc/boot/dts/mucmc52.dts
b/arch/powerpc/boot/dts/mucmc52.dts
new file mode 100644
index 000..a4a7a20
--- /dev/null
+++ b/arch/powerpc/boot/dts/mucmc52.dts
@@ -0,0 +1,231 @@
+/*
+ * mucmc52 board Device Tree Source
+ *
+ * Copyright (C) 2009 DENX Software Engineering GmbH
+ * Heiko Schocher h...@denx.de
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = man,mucmc52;
+ compatible = man,mucmc52;
+ #address-cells = 1;
+ #size-cells = 1;
+ interrupt-parent = mpc5200_pic;
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,5...@0 {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 32;
+ i-cache-line-size = 32;
+ d-cache-size = 0x4000;// L1, 16K
+ i-cache-size = 0x4000;// L1, 16K
+ timebase-frequency = 0; // from bootloader
+ bus-frequency = 0;// from bootloader
+ clock-frequency = 0; // from bootloader
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x 0x0400; // 64MB
+ };
+
+ soc5...@f000 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,mpc5200-immr;
Does this board use the older and rarer non-'B' mpc5200 part? If not,
then fsl,mpc5200b-immr also needs to be in this list.
OK, I add this too
Thanks
bye
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [PATCH] mpc5200: support for the MAN mpc5200 based board mucmc52
On Mon, Sep 14, 2009 at 2:03 AM, Wolfram Sang w.s...@pengutronix.de wrote:
Hi,
+ mpc5200_pic: interrupt-control...@500 {
+ // 5200 interrupts are encoded into two levels;
Grant, maybe this comment could be dropped also for the in-kernel dts-files? I
think it is sufficently described in mpc5200.txt. I could prepare a patch if
you agree.
Meh. I don't mind it being there. Interrupt encoding is confusing
enough as is for people unfamiliar with the device tree, that any
additional hints are a plus. In fact, if you want to prepare a patch,
instead of removing this comment, replace it with one that tells
readers where to look for the encoding documentation.
Cheers,
g.
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Secret Lab Technologies Ltd.
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Re: [PATCH] mpc5200: support for the MAN mpc5200 based board mucmc52
On Mon, Sep 14, 2009 at 8:32 AM, Heiko Schocher h...@denx.de wrote:
Grant Likely wrote:
On Mon, Sep 14, 2009 at 2:05 AM, Heiko Schocher h...@denx.de wrote:
+ soc5...@f000 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,mpc5200-immr;
Does this board use the older and rarer non-'B' mpc5200 part? If not,
then fsl,mpc5200b-immr also needs to be in this list.
OK, I add this too
Okay, then before you resubmit, do a side-by-side comparison between
this file and one of the existing mpc5200b dts files. There are
numerous fsl,mpc5200b-* compatible values that need to be present.
g.
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Secret Lab Technologies Ltd.
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