[PATCH] mpc5200: support for the MAN mpc5200 based board uc101
- serial Console on PSC1
- 64MB SDRAM
- MTD CFI Flash
- Ethernet FEC
- I2C with PCF8563 and Temp. Sensor ADM9240
- IDE support
Signed-off-by: Heiko Schocher h...@denx.de
---
- based on:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git next
- checked with:
$ ./scripts/checkpatch.pl
0001-mpc5200-support-for-the-MAN-mpc5200-based-board-uc1.patch
total: 0 errors, 0 warnings, 1622 lines checked
0001-mpc5200-support-for-the-MAN-mpc5200-based-board-uc1.patch has no obvious
style problems and is ready for submission.
$
arch/powerpc/boot/dts/uc101.dts | 312 ++
arch/powerpc/configs/52xx/uc101_defconfig| 1303 ++
arch/powerpc/platforms/52xx/mpc5200_simple.c |1 +
3 files changed, 1616 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/uc101.dts
create mode 100644 arch/powerpc/configs/52xx/uc101_defconfig
diff --git a/arch/powerpc/boot/dts/uc101.dts b/arch/powerpc/boot/dts/uc101.dts
new file mode 100644
index 000..28e1c90
--- /dev/null
+++ b/arch/powerpc/boot/dts/uc101.dts
@@ -0,0 +1,312 @@
+/*
+ * uc101 board Device Tree Source
+ *
+ * Copyright (C) 2009 DENX Software Engineering GmbH
+ * Heiko Schocher h...@denx.de
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = man,uc101;
+ compatible = man,uc101;
+ #address-cells = 1;
+ #size-cells = 1;
+ interrupt-parent = mpc5200_pic;
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,5...@0 {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 32;
+ i-cache-line-size = 32;
+ d-cache-size = 0x4000;// L1, 16K
+ i-cache-size = 0x4000;// L1, 16K
+ timebase-frequency = 0; // from bootloader
+ bus-frequency = 0;// from bootloader
+ clock-frequency = 0; // from bootloader
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x 0x0400; // 64MB
+ };
+
+ soc5...@f000 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,mpc5200-immr;
+ ranges = 0 0xf000 0xc000;
+ reg = 0xf000 0x0100;
+ bus-frequency = 0;// from bootloader
+ system-frequency = 0; // from bootloader
+
+ c...@200 {
+ compatible = fsl,mpc5200-cdm;
+ reg = 0x200 0x38;
+ };
+
+ mpc5200_pic: interrupt-control...@500 {
+ // 5200 interrupts are encoded into two levels;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ compatible = fsl,mpc5200-pic;
+ reg = 0x500 0x80;
+ interrupts = 0 0 3;
+ };
+
+ gpt1: ti...@610 { // General Purpose Timer 1 in GPIO mode
+ compatible =
fsl,mpc5200b-gpt-gpio,fsl,mpc5200-gpt-gpio;
+ reg = 0x610 0x10;
+ interrupts = 1 10 0;
+ gpio-controller;
+ };
+
+ gpt2: ti...@620 { // General Purpose Timer 2 in GPIO mode
+ compatible =
fsl,mpc5200b-gpt-gpio,fsl,mpc5200-gpt-gpio;
+ reg = 0x620 0x10;
+ interrupts = 1 11 0;
+ gpio-controller;
+ };
+
+ gpt3: ti...@630 { // General Purpose Timer 3 in GPIO mode
+ compatible =
fsl,mpc5200b-gpt-gpio,fsl,mpc5200-gpt-gpio;
+ reg = 0x630 0x10;
+ interrupts = 1 12 0;
+ gpio-controller;
+ #gpio-cells = 2;
+ };
+
+ gpio_simple: g...@b00 {
+ compatible = fsl,mpc5200-gpio;
+ reg = 0xb00 0x40;
+ interrupts = 1 7 0;
+ gpio-controller;
+ #gpio-cells = 2;
+ };
+
+ gpio_wkup: g...@c00 {
+ compatible = fsl,mpc5200-gpio-wkup;
+ reg = 0xc00 0x40;
+ interrupts = 1 8 0 0 3 0;
+ gpio-controller;
+ #gpio-cells = 2;
+ };
+
+ dma-control...@1200 {
+ device_type =
Re: [PATCH] mpc5200: support for the MAN mpc5200 based board uc101
Hi Heiko,
Thanks for the patch. Comments below.
g.
On Mon, Sep 14, 2009 at 2:05 AM, Heiko Schocher h...@denx.de wrote:
- serial Console on PSC1
- 64MB SDRAM
- MTD CFI Flash
- Ethernet FEC
- I2C with PCF8563 and Temp. Sensor ADM9240
- IDE support
Signed-off-by: Heiko Schocher h...@denx.de
---
- based on:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git next
- checked with:
$ ./scripts/checkpatch.pl
0001-mpc5200-support-for-the-MAN-mpc5200-based-board-uc1.patch
total: 0 errors, 0 warnings, 1622 lines checked
0001-mpc5200-support-for-the-MAN-mpc5200-based-board-uc1.patch has no obvious
style problems and is ready for submission.
$
arch/powerpc/boot/dts/uc101.dts | 312 ++
arch/powerpc/configs/52xx/uc101_defconfig | 1303
++
I generally don't like board specific defconfigs unless there is a
really compelling reason why it should be in the kernel tree. Please
add the stuff you need (as modules!) to mpc5200_defconfig.
g.
diff --git a/arch/powerpc/boot/dts/uc101.dts b/arch/powerpc/boot/dts/uc101.dts
new file mode 100644
index 000..28e1c90
--- /dev/null
+++ b/arch/powerpc/boot/dts/uc101.dts
@@ -0,0 +1,312 @@
+/*
+ * uc101 board Device Tree Source
+ *
+ * Copyright (C) 2009 DENX Software Engineering GmbH
+ * Heiko Schocher h...@denx.de
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = man,uc101;
+ compatible = man,uc101;
+ #address-cells = 1;
+ #size-cells = 1;
+ interrupt-parent = mpc5200_pic;
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,5...@0 {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 32;
+ i-cache-line-size = 32;
+ d-cache-size = 0x4000; // L1, 16K
+ i-cache-size = 0x4000; // L1, 16K
+ timebase-frequency = 0; // from bootloader
+ bus-frequency = 0; // from bootloader
+ clock-frequency = 0; // from bootloader
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x 0x0400; // 64MB
+ };
+
+ soc5...@f000 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,mpc5200-immr;
+ ranges = 0 0xf000 0xc000;
+ reg = 0xf000 0x0100;
+ bus-frequency = 0; // from bootloader
+ system-frequency = 0; // from bootloader
+
+ c...@200 {
+ compatible = fsl,mpc5200-cdm;
+ reg = 0x200 0x38;
+ };
+
+ mpc5200_pic: interrupt-control...@500 {
+ // 5200 interrupts are encoded into two levels;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ compatible = fsl,mpc5200-pic;
+ reg = 0x500 0x80;
+ interrupts = 0 0 3;
+ };
+
+ gpt1: ti...@610 { // General Purpose Timer 1 in GPIO
mode
+ compatible =
fsl,mpc5200b-gpt-gpio,fsl,mpc5200-gpt-gpio;
+ reg = 0x610 0x10;
+ interrupts = 1 10 0;
+ gpio-controller;
+ };
+
+ gpt2: ti...@620 { // General Purpose Timer 2 in GPIO
mode
+ compatible =
fsl,mpc5200b-gpt-gpio,fsl,mpc5200-gpt-gpio;
+ reg = 0x620 0x10;
+ interrupts = 1 11 0;
+ gpio-controller;
+ };
+
+ gpt3: ti...@630 { // General Purpose Timer 3 in GPIO
mode
+ compatible =
fsl,mpc5200b-gpt-gpio,fsl,mpc5200-gpt-gpio;
+ reg = 0x630 0x10;
+ interrupts = 1 12 0;
+ gpio-controller;
+ #gpio-cells = 2;
+ };
+
+ gpio_simple: g...@b00 {
+ compatible = fsl,mpc5200-gpio;
+ reg = 0xb00 0x40;
+ interrupts = 1 7 0;
+ gpio-controller;
+ #gpio-cells = 2;
+ };
+
+ gpio_wkup: g...@c00 {
+ compatible = fsl,mpc5200-gpio-wkup;
+ reg = 0xc00 0x40;
+
Re: [PATCH] mpc5200: support for the MAN mpc5200 based board uc101
Hello Grant,
Grant Likely wrote:
Thanks for the patch. Comments below.
g.
On Mon, Sep 14, 2009 at 2:05 AM, Heiko Schocher h...@denx.de wrote:
- serial Console on PSC1
- 64MB SDRAM
- MTD CFI Flash
- Ethernet FEC
- I2C with PCF8563 and Temp. Sensor ADM9240
- IDE support
Signed-off-by: Heiko Schocher h...@denx.de
---
- based on:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git next
- checked with:
$ ./scripts/checkpatch.pl
0001-mpc5200-support-for-the-MAN-mpc5200-based-board-uc1.patch
total: 0 errors, 0 warnings, 1622 lines checked
0001-mpc5200-support-for-the-MAN-mpc5200-based-board-uc1.patch has no
obvious style problems and is ready for submission.
$
arch/powerpc/boot/dts/uc101.dts | 312 ++
arch/powerpc/configs/52xx/uc101_defconfig| 1303
++
I generally don't like board specific defconfigs unless there is a
really compelling reason why it should be in the kernel tree. Please
add the stuff you need (as modules!) to mpc5200_defconfig.
OK, thanks for spotting this. I take a look how this works.
g.
diff --git a/arch/powerpc/boot/dts/uc101.dts
b/arch/powerpc/boot/dts/uc101.dts
new file mode 100644
index 000..28e1c90
--- /dev/null
+++ b/arch/powerpc/boot/dts/uc101.dts
@@ -0,0 +1,312 @@
+/*
+ * uc101 board Device Tree Source
+ *
+ * Copyright (C) 2009 DENX Software Engineering GmbH
+ * Heiko Schocher h...@denx.de
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = man,uc101;
+ compatible = man,uc101;
+ #address-cells = 1;
+ #size-cells = 1;
+ interrupt-parent = mpc5200_pic;
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,5...@0 {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 32;
+ i-cache-line-size = 32;
+ d-cache-size = 0x4000;// L1, 16K
+ i-cache-size = 0x4000;// L1, 16K
+ timebase-frequency = 0; // from bootloader
+ bus-frequency = 0;// from bootloader
+ clock-frequency = 0; // from bootloader
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x 0x0400; // 64MB
+ };
+
+ soc5...@f000 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,mpc5200-immr;
+ ranges = 0 0xf000 0xc000;
+ reg = 0xf000 0x0100;
+ bus-frequency = 0;// from bootloader
+ system-frequency = 0; // from bootloader
+
+ c...@200 {
+ compatible = fsl,mpc5200-cdm;
+ reg = 0x200 0x38;
+ };
+
+ mpc5200_pic: interrupt-control...@500 {
+ // 5200 interrupts are encoded into two levels;
+ interrupt-controller;
+ #interrupt-cells = 3;
+ compatible = fsl,mpc5200-pic;
+ reg = 0x500 0x80;
+ interrupts = 0 0 3;
+ };
+
+ gpt1: ti...@610 { // General Purpose Timer 1 in GPIO
mode
+ compatible =
fsl,mpc5200b-gpt-gpio,fsl,mpc5200-gpt-gpio;
+ reg = 0x610 0x10;
+ interrupts = 1 10 0;
+ gpio-controller;
+ };
+
+ gpt2: ti...@620 { // General Purpose Timer 2 in GPIO
mode
+ compatible =
fsl,mpc5200b-gpt-gpio,fsl,mpc5200-gpt-gpio;
+ reg = 0x620 0x10;
+ interrupts = 1 11 0;
+ gpio-controller;
+ };
+
+ gpt3: ti...@630 { // General Purpose Timer 3 in GPIO
mode
+ compatible =
fsl,mpc5200b-gpt-gpio,fsl,mpc5200-gpt-gpio;
+ reg = 0x630 0x10;
+ interrupts = 1 12 0;
+ gpio-controller;
+ #gpio-cells = 2;
+ };
+
+ gpio_simple: g...@b00 {
+ compatible = fsl,mpc5200-gpio;
+ reg = 0xb00 0x40;
+ interrupts = 1 7 0;
+ gpio-controller;
+ #gpio-cells = 2;
+ };
+
+ gpio_wkup: g...@c00 {
+
Re: [PATCH] mpc5200: support for the MAN mpc5200 based board uc101
Hello Heiko,
Heiko Schocher wrote:
Hello Grant,
Grant Likely wrote:
Thanks for the patch. Comments below.
g.
On Mon, Sep 14, 2009 at 2:05 AM, Heiko Schocher h...@denx.de wrote:
- serial Console on PSC1
- 64MB SDRAM
- MTD CFI Flash
- Ethernet FEC
- I2C with PCF8563 and Temp. Sensor ADM9240
- IDE support
Signed-off-by: Heiko Schocher h...@denx.de
...snip
+ i...@3d40 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = fsl,mpc5200-i2c,fsl-i2c;
+ reg = 0x3d40 0x40;
+ interrupts = 2 16 0;
+ fsl5200-clocking;
I believe fsl5200-clocking is no longer required. There is a patch
pending which removes this property from the other .dts files.
Right, it obsolete.
Ok, fix this.
Like it is, the I2C controller will use a fixed low speed fdt/dfsr
setting. You have two other options:
fsl,preserve-clocking;
clock-frequency = 40;
See also
http://lxr.linux.no/#linux+v2.6.31/Documentation/powerpc/dts-bindings/fsl/i2c.txt.
+
+ hw...@2c {
+ compatible = ad,adm9240;
+ reg = 0x2c;
+ };
+ r...@51 {
+ compatible = rtc,pcf8563;
rtc is not a proper vendor name. Should be nxp, IIRC.
Wolfgang.
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Re: [PATCH] mpc5200: support for the MAN mpc5200 based board uc101
Hello Wolfgang,
Wolfgang Grandegger wrote:
Heiko Schocher wrote:
Hello Grant,
Grant Likely wrote:
Thanks for the patch. Comments below.
g.
On Mon, Sep 14, 2009 at 2:05 AM, Heiko Schocher h...@denx.de wrote:
- serial Console on PSC1
- 64MB SDRAM
- MTD CFI Flash
- Ethernet FEC
- I2C with PCF8563 and Temp. Sensor ADM9240
- IDE support
Signed-off-by: Heiko Schocher h...@denx.de
...snip
+ i...@3d40 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = fsl,mpc5200-i2c,fsl-i2c;
+ reg = 0x3d40 0x40;
+ interrupts = 2 16 0;
+ fsl5200-clocking;
I believe fsl5200-clocking is no longer required. There is a patch
pending which removes this property from the other .dts files.
Right, it obsolete.
OK, I remove it.
Ok, fix this.
Like it is, the I2C controller will use a fixed low speed fdt/dfsr
setting. You have two other options:
fsl,preserve-clocking;
clock-frequency = 40;
See also
http://lxr.linux.no/#linux+v2.6.31/Documentation/powerpc/dts-bindings/fsl/i2c.txt.
Ah, ok, thanks for this info. I try this ...
+
+ hw...@2c {
+ compatible = ad,adm9240;
+ reg = 0x2c;
+ };
+ r...@51 {
+ compatible = rtc,pcf8563;
rtc is not a proper vendor name. Should be nxp, IIRC.
OK, fix it.
Thanks for reviewing
bye
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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