From: Michal Simek <[EMAIL PROTECTED]>
Signed-off-by: Michal Simek <[EMAIL PROTECTED]>
---
arch/microblaze/kernel/exceptions.c | 77 +
arch/microblaze/kernel/hw_exception_handler.S | 392 +
include/asm-microblaze/exceptions.h | 63
3 files changed, 532 insertions(+), 0 deletions(-)
create mode 100644 arch/microblaze/kernel/exceptions.c
create mode 100644 arch/microblaze/kernel/hw_exception_handler.S
create mode 100644 include/asm-microblaze/exceptions.h
diff --git a/arch/microblaze/kernel/exceptions.c
b/arch/microblaze/kernel/exceptions.c
new file mode 100644
index 000..734038e
--- /dev/null
+++ b/arch/microblaze/kernel/exceptions.c
@@ -0,0 +1,77 @@
+/*
+ * HW exception handling
+ *
+ * Copyright (C) 2007 Xilinx, Inc.
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include /* For KM CPU var */
+
+/* Initialize_exception_handlers() - called from setup.c/trap_init() */
+void initialize_exception_handlers(void)
+{
+}
+
+#define MICROBLAZE_ILL_OPCODE_EXCEPTION0x02
+#define MICROBLAZE_IOPB_BUS_EXCEPTION 0x03
+#define MICROBLAZE_DOPB_BUS_EXCEPTION 0x04
+#define MICROBLAZE_DIV_ZERO_EXCEPTION 0x05
+#define MICROBLAZE_FPU_EXCEPTION 0x06
+
+static void handle_unexpected_exception(unsigned int esr,
+ unsigned int kernel_mode, unsigned int addr)
+{
+ printk(KERN_WARNING "Unexpected exception %02x in %s mode, PC=%08x\n",
+ esr, kernel_mode ? "kernel" : "user", addr);
+}
+
+static void handle_exception(const char *message, int signal,
+ unsigned int kernel_mode, unsigned int addr)
+{
+ if (kernel_mode)
+ panic("%s in the kernel mode, PC=%08x\n", message, addr);
+ else
+ force_sig(signal, current);
+}
+
+asmlinkage void other_exception_handler(unsigned int esr, unsigned int addr)
+{
+ unsigned int kernel_mode = per_cpu(KM, 0);
+
+ switch (esr) {
+
+ case MICROBLAZE_ILL_OPCODE_EXCEPTION:
+ handle_exception("Illegal instruction", SIGILL,
+ kernel_mode, addr);
+ break;
+
+ case MICROBLAZE_IOPB_BUS_EXCEPTION:
+ handle_exception("Instruction bus error", SIGBUS,
+ kernel_mode, addr);
+ break;
+
+ case MICROBLAZE_DOPB_BUS_EXCEPTION:
+ handle_exception("Data bus error", SIGBUS, kernel_mode, addr);
+ break;
+
+ case MICROBLAZE_DIV_ZERO_EXCEPTION:
+ handle_exception("Divide by zero", SIGILL, kernel_mode, addr);
+ break;
+
+ case MICROBLAZE_FPU_EXCEPTION:
+ handle_exception("FPU error", SIGFPE, kernel_mode, addr);
+ break;
+
+ default:
+ handle_unexpected_exception(esr, kernel_mode, addr);
+ }
+
+ return;
+}
diff --git a/arch/microblaze/kernel/hw_exception_handler.S
b/arch/microblaze/kernel/hw_exception_handler.S
new file mode 100644
index 000..894ebd0
--- /dev/null
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -0,0 +1,392 @@
+/*
+ * Unaligned exception handling for Microblaze
+ *
+ * cleanup code (C) 2007 Michal Simek <[EMAIL PROTECTED]>
+ * uClinux customisation (C) 2005 John Williams
+ *
+ * Original code
+ * Copyright (C) 2004 Xilinx, Inc. All rights reserved.
+ *
+ * Xilinx, Inc.
+ * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
+ * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
+ * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR
+ * STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION
+ * IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE
+ * FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
+ * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
+ * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO
+ * ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE
+ * FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * $Id: hw_exception_handler.S,v 1.1.2.1 2007/03/16 16:09:57 imanuilov Exp $
+ *
+ */
+
+/*
+ * Microblaze HW Exception Handler
+ * - Non self-modifying exception handler for the following exception
conditions
+ * - Unalignment
+ * - Instruction bus error
+ * - Data bus error
+ * - Illegal instruction opcode
+ * - Divide-by-zero
+ *
+ * Note we disable interrupts during exception handling, otherwise we will
+ * possibly get multiple re-entrancy if interrupt handles themselves cause
+ * exceptions. JW
+ */
+
+#include
+#include
+#include
+
+/* Helpful Macros */
+#define EX_HANDLER_STACK_SIZ (4*19)
+#define RM
