Re: [PATCH 1/5 v3] powerpc: DTS file for the C2K
On Tue, May 20, 2008 at 09:38:08AM -0700, Remi Machet wrote:
On Tue, 2008-05-20 at 11:13 +1000, David Gibson wrote:
On Mon, May 19, 2008 at 05:00:23PM -0700, Remi Machet wrote:
Support for the C2K cPCI Single Board Computer from GEFanuc
(PowerPC MPC7448 with a Marvell MV64460 chipset)
All features of the board are not supported yet, but the board
boots, flash works, all Ethernet ports are working and PCI
devices are all found (USB and SATA on PCI1 do not work yet).
Part 1 of 5: DTS file describing the board peripherals. As far as I know
all peripherals except the FPGA are listed in there (I did not included
the FPGA because a lot of work is needed there).
[snip]
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = marvell,mv64360-eth-group;
+ reg = 0x2000 0x2000;
+ PHY0: [EMAIL PROTECTED] {
+ device_type = ethernet-phy;
+ interrupts = 76; /* GPP 12 */
+ interrupt-parent = PIC;
+ reg = 0;
+ };
+ [EMAIL PROTECTED] {
+ device_type = network;
+ compatible = marvell,mv64360-eth;
+ reg = 0;
+ interrupts = 32;
+ interrupt-parent = PIC;
+ phy = PHY0;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
Not sure if this is new, or I just didn't notice it before. Also not
sure if this is your mistake, or a mistake in the binding for the
marvell device here.
The address in reg should be unique within the bus the device
appears on. So having both the PHY and the MAC devices with the same
reg and same unit address here is bad.
Having both the PHYs and the MACs as children of the ethernet-group
node is possible, but the addresses must be encoded to distinguish
them (e.g. MACs are 0x0, 0x1, 0x2, PHYS are 0x1000 0x1001 0x1002).
It was an attempt at getting rid of the mdio group since the PHY is
effectively managed by the Ethernet hardware. The problem is that the
reg field must contain those values ... if I change this, I must change
the driver and other boards DTS files that depend on it which I would
rather not do at the same time I am pushing this patch through.
Right. Getting rid of the mdio node isn't an inherently bad idea, but
it constitutes a change in the binding, so as you've noticed it would
need the drivers to change, and can't just be done for one board
unilaterally.
I will put back the mdio group and add a reg field to it as you
suggested previously.
Ok.
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Re: [PATCH 1/5 v3] powerpc: DTS file for the C2K
On Tue, 2008-05-20 at 11:13 +1000, David Gibson wrote:
On Mon, May 19, 2008 at 05:00:23PM -0700, Remi Machet wrote:
Support for the C2K cPCI Single Board Computer from GEFanuc
(PowerPC MPC7448 with a Marvell MV64460 chipset)
All features of the board are not supported yet, but the board
boots, flash works, all Ethernet ports are working and PCI
devices are all found (USB and SATA on PCI1 do not work yet).
Part 1 of 5: DTS file describing the board peripherals. As far as I know
all peripherals except the FPGA are listed in there (I did not included
the FPGA because a lot of work is needed there).
[snip]
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = marvell,mv64360-eth-group;
+ reg = 0x2000 0x2000;
+ PHY0: [EMAIL PROTECTED] {
+ device_type = ethernet-phy;
+ interrupts = 76; /* GPP 12 */
+ interrupt-parent = PIC;
+ reg = 0;
+ };
+ [EMAIL PROTECTED] {
+ device_type = network;
+ compatible = marvell,mv64360-eth;
+ reg = 0;
+ interrupts = 32;
+ interrupt-parent = PIC;
+ phy = PHY0;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
Not sure if this is new, or I just didn't notice it before. Also not
sure if this is your mistake, or a mistake in the binding for the
marvell device here.
The address in reg should be unique within the bus the device
appears on. So having both the PHY and the MAC devices with the same
reg and same unit address here is bad.
Having both the PHYs and the MACs as children of the ethernet-group
node is possible, but the addresses must be encoded to distinguish
them (e.g. MACs are 0x0, 0x1, 0x2, PHYS are 0x1000 0x1001 0x1002).
It was an attempt at getting rid of the mdio group since the PHY is
effectively managed by the Ethernet hardware. The problem is that the
reg field must contain those values ... if I change this, I must change
the driver and other boards DTS files that depend on it which I would
rather not do at the same time I am pushing this patch through.
I will put back the mdio group and add a reg field to it as you
suggested previously.
Remi
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[PATCH 1/5 v3] powerpc: DTS file for the C2K
Support for the C2K cPCI Single Board Computer from GEFanuc
(PowerPC MPC7448 with a Marvell MV64460 chipset)
All features of the board are not supported yet, but the board
boots, flash works, all Ethernet ports are working and PCI
devices are all found (USB and SATA on PCI1 do not work yet).
Part 1 of 5: DTS file describing the board peripherals. As far as I know
all peripherals except the FPGA are listed in there (I did not included
the FPGA because a lot of work is needed there).
Signed-off-by: Remi Machet [EMAIL PROTECTED]
---
Changes:
v1: original patch
v2: cleaned up the file: removed i2c device_type, changed the name of
the cpu node and added aliases for the pci buses.
v3: removed the mdio entry because the PHY are handled by the Ethernet
driver on this board. Re-prganized the device controller entry to look
similar to other boards static buses (thanks to David Gibson for pointing
that out).
c2k.dts | 364
1 files changed, 364 insertions(+)
diff --git a/arch/powerpc/boot/dts/c2k.dts b/arch/powerpc/boot/dts/c2k.dts
new file mode 100644
index 000..5ef08b2
--- /dev/null
+++ b/arch/powerpc/boot/dts/c2k.dts
@@ -0,0 +1,364 @@
+/* Device Tree Source for GEFanuc C2K
+ *
+ * Author: Remi Machet [EMAIL PROTECTED]
+ *
+ * Originated from prpmc2800.dts
+ *
+ * 2008 (c) Stanford University
+ * 2007 (c) MontaVista, Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = 1;
+ #size-cells = 1;
+ model = C2K;
+ compatible = GEFanuc,C2K;
+ coherency-off;
+
+ aliases {
+ pci0 = PCI0;
+ pci1 = PCI1;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ [EMAIL PROTECTED] {
+ device_type = cpu;
+ compatible = PowerPC,7447;
+ reg = 0;
+ clock-frequency = 99600; /* 996 MHz */
+ bus-frequency = 16667;/* 166. MHz */
+ timebase-frequency = 4167;/* 166./4
MHz */
+ i-cache-line-size = 32;
+ d-cache-line-size = 32;
+ i-cache-size = 32768;
+ d-cache-size = 32768;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0x 0x4000; /* 1GB */
+ };
+
+ [EMAIL PROTECTED] { /* Marvell Discovery */
+ #address-cells = 1;
+ #size-cells = 1;
+ model = mv64460;
+ compatible = marvell,mv64360;
+ clock-frequency = 16667; /* 166.66... MHz */
+ reg = 0xd800 0x0001;
+ virtual-reg = 0xd800;
+ ranges = 0xd400 0xd400 0x0100 /* PCI 0 I/O
Space */
+ 0x8000 0x8000 0x0800 /* PCI 0 MEM
Space */
+ 0xd000 0xd000 0x0100 /* PCI 1 I/O
Space */
+ 0xa000 0xa000 0x0800 /* PCI 1 MEM
Space */
+ 0xd810 0xd810 0x0001 /* FPGA */
+ 0xd811 0xd811 0x0001 /* FPGA USARTs
*/
+ 0xf800 0xf800 0x0800 /* User FLASH */
+ 0x 0xd800 0x0001 /* Bridge's
regs */
+ 0xd814 0xd814 0x0004;/* Integrated
SRAM */
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = marvell,mv64360-eth-group;
+ reg = 0x2000 0x2000;
+ PHY0: [EMAIL PROTECTED] {
+ device_type = ethernet-phy;
+ interrupts = 76; /* GPP 12 */
+ interrupt-parent = PIC;
+ reg = 0;
+ };
+ [EMAIL PROTECTED] {
+ device_type = network;
+ compatible = marvell,mv64360-eth;
+ reg = 0;
+ interrupts = 32;
+ interrupt-parent = PIC;
+ phy = PHY0;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+ PHY1: [EMAIL PROTECTED] {
+ device_type = ethernet-phy;
+ interrupts = 76; /* GPP 12 */
+
Re: [PATCH 1/5 v3] powerpc: DTS file for the C2K
On Mon, May 19, 2008 at 05:00:23PM -0700, Remi Machet wrote:
Support for the C2K cPCI Single Board Computer from GEFanuc
(PowerPC MPC7448 with a Marvell MV64460 chipset)
All features of the board are not supported yet, but the board
boots, flash works, all Ethernet ports are working and PCI
devices are all found (USB and SATA on PCI1 do not work yet).
Part 1 of 5: DTS file describing the board peripherals. As far as I know
all peripherals except the FPGA are listed in there (I did not included
the FPGA because a lot of work is needed there).
[snip]
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = marvell,mv64360-eth-group;
+ reg = 0x2000 0x2000;
+ PHY0: [EMAIL PROTECTED] {
+ device_type = ethernet-phy;
+ interrupts = 76; /* GPP 12 */
+ interrupt-parent = PIC;
+ reg = 0;
+ };
+ [EMAIL PROTECTED] {
+ device_type = network;
+ compatible = marvell,mv64360-eth;
+ reg = 0;
+ interrupts = 32;
+ interrupt-parent = PIC;
+ phy = PHY0;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
Not sure if this is new, or I just didn't notice it before. Also not
sure if this is your mistake, or a mistake in the binding for the
marvell device here.
The address in reg should be unique within the bus the device
appears on. So having both the PHY and the MAC devices with the same
reg and same unit address here is bad.
Having both the PHYs and the MACs as children of the ethernet-group
node is possible, but the addresses must be encoded to distinguish
them (e.g. MACs are 0x0, 0x1, 0x2, PHYS are 0x1000 0x1001 0x1002).
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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