RE: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc
-Original Message- From: Anton Vorontsov [mailto:cbouatmai...@gmail.com] Sent: Friday, August 12, 2011 18:05 PM To: Zang Roy-R61911 Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; akpm@linux- foundation.org; Xu Lei-B33228; Kumar Gala; Wood Scott-B07421 Subject: Re: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc Hello, On Fri, Aug 12, 2011 at 09:44:26AM +, Zang Roy-R61911 wrote: [...] We try to not pollute generic sdhci.c driver with chip-specific quirks. Maybe you can do the fixups via IO accessors? Or by introducing some additional sdhci op? Anton, thanks for the comment, as we discussed, the original code use 8 bit byte operation, while in fact, on some powerpc platform, 32 bit operation is needed. should it be possible fixed by adding some wrapper in IO accessors or introduce additional sdhci op? I would do it in the IO accessors. Thanks, Any update for your comment? Roy ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc
I would do it in the IO accessors. Thanks, Any update for your comment? It is still valid. You can go that road. -- Pengutronix e.K. | Wolfram Sang| Industrial Linux Solutions | http://www.pengutronix.de/ | signature.asc Description: Digital signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc
-Original Message- From: Anton Vorontsov [mailto:cbouatmai...@gmail.com] Sent: Friday, August 12, 2011 18:05 PM To: Zang Roy-R61911 Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; akpm@linux- foundation.org; Xu Lei-B33228; Kumar Gala; Wood Scott-B07421 Subject: Re: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc Hello, On Fri, Aug 12, 2011 at 09:44:26AM +, Zang Roy-R61911 wrote: [...] We try to not pollute generic sdhci.c driver with chip-specific quirks. Maybe you can do the fixups via IO accessors? Or by introducing some additional sdhci op? Anton, thanks for the comment, as we discussed, the original code use 8 bit byte operation, while in fact, on some powerpc platform, 32 bit operation is needed. should it be possible fixed by adding some wrapper in IO accessors or introduce additional sdhci op? I would do it in the IO accessors. I may miss your email. I never see your patch about I would do it in the IO accessors . Thanks. Roy ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc
-Original Message- From: Anton Vorontsov [mailto:cbouatmai...@gmail.com] Sent: Friday, August 12, 2011 18:05 PM To: Zang Roy-R61911 Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; akpm@linux- foundation.org; Xu Lei-B33228; Kumar Gala; Wood Scott-B07421 Subject: Re: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc Hello, On Fri, Aug 12, 2011 at 09:44:26AM +, Zang Roy-R61911 wrote: [...] We try to not pollute generic sdhci.c driver with chip-specific quirks. Maybe you can do the fixups via IO accessors? Or by introducing some additional sdhci op? Anton, thanks for the comment, as we discussed, the original code use 8 bit byte operation, while in fact, on some powerpc platform, 32 bit operation is needed. should it be possible fixed by adding some wrapper in IO accessors or introduce additional sdhci op? I would do it in the IO accessors. I am looking forward to your patch. Roy ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc
-Original Message-
From: linux-mmc-ow...@vger.kernel.org [mailto:linux-mmc-ow...@vger.kernel.org]
On Behalf Of Anton Vorontsov
Sent: Friday, July 22, 2011 18:15 PM
To: Zang Roy-R61911
Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; akpm@linux-
foundation.org; Xu Lei-B33228; Kumar Gala
Subject: Re: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl
esdhc
On Fri, Jul 22, 2011 at 06:15:17PM +0800, Roy Zang wrote:
[...]
if (host-version = SDHCI_SPEC_200) {
- ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
- ctrl = ~SDHCI_CTRL_DMA_MASK;
- if ((host-flags SDHCI_REQ_USE_DMA)
- (host-flags SDHCI_USE_ADMA))
- ctrl |= SDHCI_CTRL_ADMA32;
- else
- ctrl |= SDHCI_CTRL_SDMA;
- sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
+ if (host-quirks SDHCI_QUIRK_QORIQ_PROCTL_WEIRD) {
+#define ESDHCI_PROCTL_DMAS_MASK0x0300
+#define ESDHCI_PROCTL_ADMA32 0x0200
+#define ESDHCI_PROCTL_SDMA 0x
+ ctrl = sdhci_readl(host, SDHCI_HOST_CONTROL);
+ ctrl = ~ESDHCI_PROCTL_DMAS_MASK;
+ if ((host-flags SDHCI_REQ_USE_DMA)
+ (host-flags SDHCI_USE_ADMA))
+ ctrl |= ESDHCI_PROCTL_ADMA32;
+ else
+ ctrl |= ESDHCI_PROCTL_SDMA;
+ sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL);
+ } else {
+ ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
+ ctrl = ~SDHCI_CTRL_DMA_MASK;
+ if ((host-flags SDHCI_REQ_USE_DMA)
+ (host-flags SDHCI_USE_ADMA))
+ ctrl |= SDHCI_CTRL_ADMA32;
+ else
+ ctrl |= SDHCI_CTRL_SDMA;
+ sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
We try to not pollute generic sdhci.c driver with chip-specific
quirks.
Maybe you can do the fixups via IO accessors? Or by introducing
some additional sdhci op?
Anton,
thanks for the comment, as we discussed, the original code use 8 bit byte
operation,
while in fact, on some powerpc platform, 32 bit operation is needed.
should it be possible fixed by adding some wrapper in IO accessors or introduce
additional sdhci op?
Please advice more.
Thanks.
Roy
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Re: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc
Hello, On Fri, Aug 12, 2011 at 09:44:26AM +, Zang Roy-R61911 wrote: [...] We try to not pollute generic sdhci.c driver with chip-specific quirks. Maybe you can do the fixups via IO accessors? Or by introducing some additional sdhci op? Anton, thanks for the comment, as we discussed, the original code use 8 bit byte operation, while in fact, on some powerpc platform, 32 bit operation is needed. should it be possible fixed by adding some wrapper in IO accessors or introduce additional sdhci op? I would do it in the IO accessors. Thanks, -- Anton Vorontsov Email: cbouatmai...@gmail.com ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc
-Original Message-
From: linux-mmc-ow...@vger.kernel.org [mailto:linux-mmc-ow...@vger.kernel.org]
On Behalf Of Anton Vorontsov
Sent: Friday, July 22, 2011 18:15 PM
To: Zang Roy-R61911
Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; akpm@linux-
foundation.org; Xu Lei-B33228; Kumar Gala
Subject: Re: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl
esdhc
On Fri, Jul 22, 2011 at 06:15:17PM +0800, Roy Zang wrote:
[...]
if (host-version = SDHCI_SPEC_200) {
- ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
- ctrl = ~SDHCI_CTRL_DMA_MASK;
- if ((host-flags SDHCI_REQ_USE_DMA)
- (host-flags SDHCI_USE_ADMA))
- ctrl |= SDHCI_CTRL_ADMA32;
- else
- ctrl |= SDHCI_CTRL_SDMA;
- sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
+ if (host-quirks SDHCI_QUIRK_QORIQ_PROCTL_WEIRD) {
+#define ESDHCI_PROCTL_DMAS_MASK0x0300
+#define ESDHCI_PROCTL_ADMA32 0x0200
+#define ESDHCI_PROCTL_SDMA 0x
+ ctrl = sdhci_readl(host, SDHCI_HOST_CONTROL);
+ ctrl = ~ESDHCI_PROCTL_DMAS_MASK;
+ if ((host-flags SDHCI_REQ_USE_DMA)
+ (host-flags SDHCI_USE_ADMA))
+ ctrl |= ESDHCI_PROCTL_ADMA32;
+ else
+ ctrl |= ESDHCI_PROCTL_SDMA;
+ sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL);
+ } else {
+ ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
+ ctrl = ~SDHCI_CTRL_DMA_MASK;
+ if ((host-flags SDHCI_REQ_USE_DMA)
+ (host-flags SDHCI_USE_ADMA))
+ ctrl |= SDHCI_CTRL_ADMA32;
+ else
+ ctrl |= SDHCI_CTRL_SDMA;
+ sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
We try to not pollute generic sdhci.c driver with chip-specific
quirks.
Maybe you can do the fixups via IO accessors? Or by introducing
some additional sdhci op?
[...]
if (power != (unsigned short)-1) {
switch (1 power) {
+#defineESDHCI_FSL_POWER_MASK 0x40
+#defineESDHCI_FSL_POWER_1800x00
+#defineESDHCI_FSL_POWER_3000x40
Same here. The driver will rot quickly if everyone would start
putting chip-specific quirks into sdhci.c. Please don't.
IO accessors or sdhci op might work, but it will look ugly
and less performance efficient for io access.
If you search sdhci.c, you will see other board specific quirks.
Thanks.
Roy
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[PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc
From: Xu lei b33...@freescale.com
When esdhc module was enabled in p5020, there were following errors:
mmc0: Timeout waiting for hardware interrupt.
mmc0: error -110 whilst initialising SD card
mmc0: Unexpected interrupt 0x0200.
mmc0: Timeout waiting for hardware interrupt.
mmc0: error -110 whilst initialising SD card
mmc0: Unexpected interrupt 0x0200.
It is because ESDHC controller has different bit setting for PROCTL
register, when kernel sets Power Control Register by method for standard
SD Host Specification, it would overwritten FSL ESDHC PROCTL[DMAS];
when it set Host Control Registers[DMAS], it sets PROCTL[EMODE] and
PROCTL[D3CD]. These operations will set bad bits for PROCTL Register
on FSL ESDHC Controller and cause errors, so this patch will make esdhc
driver access FSL PROCTL Register according to block guide instead of
standard SD Host Specification.
For some FSL chips, such as MPC8536/P2020, PROCTL[VOLT_SEL] and PROCTL[DMAS]
bits are reserved and even if they are set to wrong bits there is no error.
But considering that all FSL ESDHC Controller register map is not fully
compliant to standard SD Host Specification, we put the patch to all of
FSL ESDHC Controllers.
Signed-off-by: Lei Xu b33...@freescale.com
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
v2:v1 some minor code style fix according to Venkatraman's comment.
drivers/mmc/host/sdhci-of-core.c |3 ++
drivers/mmc/host/sdhci.c | 64 ++---
include/linux/mmc/sdhci.h|6 ++-
3 files changed, 59 insertions(+), 14 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-core.c b/drivers/mmc/host/sdhci-of-core.c
index 60e4186..fede43d 100644
--- a/drivers/mmc/host/sdhci-of-core.c
+++ b/drivers/mmc/host/sdhci-of-core.c
@@ -179,6 +179,9 @@ static int __devinit sdhci_of_probe(struct platform_device
*ofdev)
if (sdhci_of_wp_inverted(np))
host-quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
+ if (of_device_is_compatible(np, fsl,esdhc))
+ host-quirks |= SDHCI_QUIRK_QORIQ_PROCTL_WEIRD;
+
clk = of_get_property(np, clock-frequency, size);
if (clk size == sizeof(*clk) *clk)
of_host-clock = be32_to_cpup(clk);
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 58d5436..855fbe8 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -674,7 +674,7 @@ static void sdhci_set_transfer_irqs(struct sdhci_host *host)
static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command
*cmd)
{
u8 count;
- u8 ctrl;
+ u32 ctrl;
struct mmc_data *data = cmd-data;
int ret;
@@ -807,14 +807,28 @@ static void sdhci_prepare_data(struct sdhci_host *host,
struct mmc_command *cmd)
* is ADMA.
*/
if (host-version = SDHCI_SPEC_200) {
- ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
- ctrl = ~SDHCI_CTRL_DMA_MASK;
- if ((host-flags SDHCI_REQ_USE_DMA)
- (host-flags SDHCI_USE_ADMA))
- ctrl |= SDHCI_CTRL_ADMA32;
- else
- ctrl |= SDHCI_CTRL_SDMA;
- sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
+ if (host-quirks SDHCI_QUIRK_QORIQ_PROCTL_WEIRD) {
+#define ESDHCI_PROCTL_DMAS_MASK0x0300
+#define ESDHCI_PROCTL_ADMA32 0x0200
+#define ESDHCI_PROCTL_SDMA 0x
+ ctrl = sdhci_readl(host, SDHCI_HOST_CONTROL);
+ ctrl = ~ESDHCI_PROCTL_DMAS_MASK;
+ if ((host-flags SDHCI_REQ_USE_DMA)
+ (host-flags SDHCI_USE_ADMA))
+ ctrl |= ESDHCI_PROCTL_ADMA32;
+ else
+ ctrl |= ESDHCI_PROCTL_SDMA;
+ sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL);
+ } else {
+ ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
+ ctrl = ~SDHCI_CTRL_DMA_MASK;
+ if ((host-flags SDHCI_REQ_USE_DMA)
+ (host-flags SDHCI_USE_ADMA))
+ ctrl |= SDHCI_CTRL_ADMA32;
+ else
+ ctrl |= SDHCI_CTRL_SDMA;
+ sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
+ }
}
if (!(host-flags SDHCI_REQ_USE_DMA)) {
@@ -1138,19 +1152,32 @@ out:
static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
{
u8 pwr = 0;
+ u8 volt = 0;
if (power != (unsigned short)-1) {
switch (1 power) {
+#defineESDHCI_FSL_POWER_MASK 0x40
+#defineESDHCI_FSL_POWER_1800x00
+#defineESDHCI_FSL_POWER_3000x40
case MMC_VDD_165_195:
-
Re: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc
On Fri, Jul 22, 2011 at 06:15:17PM +0800, Roy Zang wrote:
[...]
if (host-version = SDHCI_SPEC_200) {
- ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
- ctrl = ~SDHCI_CTRL_DMA_MASK;
- if ((host-flags SDHCI_REQ_USE_DMA)
- (host-flags SDHCI_USE_ADMA))
- ctrl |= SDHCI_CTRL_ADMA32;
- else
- ctrl |= SDHCI_CTRL_SDMA;
- sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
+ if (host-quirks SDHCI_QUIRK_QORIQ_PROCTL_WEIRD) {
+#define ESDHCI_PROCTL_DMAS_MASK 0x0300
+#define ESDHCI_PROCTL_ADMA32 0x0200
+#define ESDHCI_PROCTL_SDMA 0x
+ ctrl = sdhci_readl(host, SDHCI_HOST_CONTROL);
+ ctrl = ~ESDHCI_PROCTL_DMAS_MASK;
+ if ((host-flags SDHCI_REQ_USE_DMA)
+ (host-flags SDHCI_USE_ADMA))
+ ctrl |= ESDHCI_PROCTL_ADMA32;
+ else
+ ctrl |= ESDHCI_PROCTL_SDMA;
+ sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL);
+ } else {
+ ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
+ ctrl = ~SDHCI_CTRL_DMA_MASK;
+ if ((host-flags SDHCI_REQ_USE_DMA)
+ (host-flags SDHCI_USE_ADMA))
+ ctrl |= SDHCI_CTRL_ADMA32;
+ else
+ ctrl |= SDHCI_CTRL_SDMA;
+ sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
We try to not pollute generic sdhci.c driver with chip-specific
quirks.
Maybe you can do the fixups via IO accessors? Or by introducing
some additional sdhci op?
[...]
if (power != (unsigned short)-1) {
switch (1 power) {
+#define ESDHCI_FSL_POWER_MASK 0x40
+#define ESDHCI_FSL_POWER_1800x00
+#define ESDHCI_FSL_POWER_3000x40
Same here. The driver will rot quickly if everyone would start
putting chip-specific quirks into sdhci.c. Please don't.
Thanks,
--
Anton Vorontsov
Email: cbouatmai...@gmail.com
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