---
Documentation/powerpc/booting-without-of.txt | 47 --
1 files changed, 44 insertions(+), 3 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index eb14dd5..3d959d6 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2521,9 +2521,9 @@ platforms are moved over to use the flattened-device-tree
model.
Required properties:
- compatible: compatible list, contains 2 entries, first is
-fsl,sata-CHIP, where CHIP is the processor
+fsl,CHIP-sata, where CHIP is the processor
(mpc8315, mpc8379, etc.) and the second is
-fsl,sata-pq2pro
+fsl,pq2pro-sata
- interrupts: interrupt mapping for SATA IRQ
- interrupt-parent : optional, if needed for interrupt mapping
- reg : registers mapping
@@ -2531,12 +2531,53 @@ platforms are moved over to use the
flattened-device-tree model.
Example:
[EMAIL PROTECTED] {
- compatible = fsl,mpc8315-sata, fsl,sata-pq2pro;
+ compatible = fsl,mpc8315-sata, fsl,pq2pro-sata;
reg = 19000 1000;
interrupts = 2d 8;
interrupt-parent = ipic ;
};
+ * Frescale Serial RapidIO bus controller
+
+ RapidIO is a definition of a system interconnect. This node add
+ the support for RapidIO processor in kernel. The node name is
+ suggested to be 'rapidio'.
+
+ Required properties:
+
+- compatible: compatible list, contains 2 entries, first is
+fsl,CHIP-rapidio, where CHIP is the processor
+(mpc8572, mpc8641, etc.) and the second is
+fsl,delta-rapidio
+- interrupts : interrupts are expected in the following
+ order:
+ * Error/port write
+ * Outbound Doorbell
+ * Inbound Doorbell
+ * Outbound Msg Unit 1
+ * Inbound Msg Unit 1
+ * Outbound Msg Unit 2
+ * Inbound Msg Unit 2
+- interrupt-parent : optional, if needed for interrupt mapping
+- reg : registers mapping
+- #address-cells : Should always be 2
+- #size--cells : Should always be 2
+- ranges : Details processor physical addr to RapidIO address
+
+ Example:
+
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8641-rapidio, fsl,delta-rapidio;
+ #address-cells = 2;
+ #size-cells = 2;
+ reg = c 2;
+ ranges = 0 0 c000 2000;
+ interrupt-parent = mpic;
+ /* err_irq bell_outb_irq bell_inb_irq msg1_tx_irq msg1_rx_irq
+ msg2_tx_irq msg2_rx_irq */
+ interrupts = 30 2 31 2 32 2 35 2 36 2 37 2 38 2;
+ };
+
More devices will be defined as this spec matures.
VII - Specifying interrupt information for devices
--
1.5.3.4
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