Re: [alsa-devel] [PATCH 2/3] ASoC: dt-bindings: fsl_easrc: Add document for EASRC

2020-02-12 Thread Shengjiu Wang
Hi

On Thu, Feb 13, 2020 at 1:26 AM Fabio Estevam  wrote:
>
> On Wed, Feb 12, 2020 at 1:35 AM Shengjiu Wang  wrote:
> >
> > EASRC (Enhanced Asynchronous Sample Rate Converter) is a new
> > IP module found on i.MX815.
>
> i.MX815 in an internal terminology. Please avoid it on the commit log.
>
Ok, will use i.MX8MN instead.


Re: [PATCH 2/3] ASoC: dt-bindings: fsl_easrc: Add document for EASRC

2020-02-12 Thread Fabio Estevam
On Wed, Feb 12, 2020 at 1:35 AM Shengjiu Wang  wrote:
>
> EASRC (Enhanced Asynchronous Sample Rate Converter) is a new
> IP module found on i.MX815.

i.MX815 in an internal terminology. Please avoid it on the commit log.

>
> Signed-off-by: Shengjiu Wang 
> ---
>  .../devicetree/bindings/sound/fsl,easrc.txt   | 57 +++
>  1 file changed, 57 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/sound/fsl,easrc.txt
>
> diff --git a/Documentation/devicetree/bindings/sound/fsl,easrc.txt 
> b/Documentation/devicetree/bindings/sound/fsl,easrc.txt
> new file mode 100644
> index ..0e8153165e3b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/fsl,easrc.txt
> @@ -0,0 +1,57 @@
> +NXP Asynchronous Sample Rate Converter (ASRC) Controller
> +
> +The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a
> +signal associated with an input clock into a signal associated with a 
> different
> +output clock. The driver currently works as a Front End of DPCM with other 
> Back
> +Ends Audio controller such as ESAI, SSI and SAI. It has four context to 
> support
> +four substreams within totally 32 channels.
> +
> +Required properties:
> +- compatible:Contains "fsl,imx8mn-easrc".
> +
> +- reg:   Offset and length of the register set for the
> +device.
> +
> +- interrupts:Contains the asrc interrupt.
> +
> +- dmas:  Generic dma devicetree binding as described in
> +Documentation/devicetree/bindings/dma/dma.txt.
> +
> +- dma-names: Contains "ctx0_rx", "ctx0_tx",
> + "ctx1_rx", "ctx1_tx",
> + "ctx2_rx", "ctx2_tx",
> + "ctx3_rx", "ctx3_tx".
> +
> +- clocks:Contains an entry for each entry in clock-names.
> +
> +- clock-names:   "mem" - Peripheral clock to driver module.
> +
> +- fsl,easrc-ram-script-name: The coefficient table for the filters
> +
> +- fsl,asrc-rate: Defines a mutual sample rate used by DPCM Back
> +Ends.
> +
> +- fsl,asrc-width:Defines a mutual sample width used by DPCM Back
> +Ends.
> +
> +Example:
> +
> +easrc: easrc@300C {
> +   compatible = "fsl,imx8mn-easrc";
> +   reg = <0x0 0x300C 0x0 0x1>;
> +   interrupts = ;
> +   clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
> +   clock-names = "mem";
> +   dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
> +  <&sdma2 18 23 0> , <&sdma2 19 23 0>,
> +  <&sdma2 20 23 0> , <&sdma2 21 23 0>,
> +  <&sdma2 22 23 0> , <&sdma2 23 23 0>;
> +   dma-names = "ctx0_rx", "ctx0_tx",
> +   "ctx1_rx", "ctx1_tx",
> +   "ctx2_rx", "ctx2_tx",
> +   "ctx3_rx", "ctx3_tx";
> +   fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
> +   fsl,asrc-rate  = <8000>;
> +   fsl,asrc-width = <16>;
> +   status = "disabled";
> +};
> --
> 2.21.0
>


[PATCH 2/3] ASoC: dt-bindings: fsl_easrc: Add document for EASRC

2020-02-11 Thread Shengjiu Wang
EASRC (Enhanced Asynchronous Sample Rate Converter) is a new
IP module found on i.MX815.

Signed-off-by: Shengjiu Wang 
---
 .../devicetree/bindings/sound/fsl,easrc.txt   | 57 +++
 1 file changed, 57 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/sound/fsl,easrc.txt

diff --git a/Documentation/devicetree/bindings/sound/fsl,easrc.txt 
b/Documentation/devicetree/bindings/sound/fsl,easrc.txt
new file mode 100644
index ..0e8153165e3b
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/fsl,easrc.txt
@@ -0,0 +1,57 @@
+NXP Asynchronous Sample Rate Converter (ASRC) Controller
+
+The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a
+signal associated with an input clock into a signal associated with a different
+output clock. The driver currently works as a Front End of DPCM with other Back
+Ends Audio controller such as ESAI, SSI and SAI. It has four context to support
+four substreams within totally 32 channels.
+
+Required properties:
+- compatible:Contains "fsl,imx8mn-easrc".
+
+- reg:   Offset and length of the register set for the
+device.
+
+- interrupts:Contains the asrc interrupt.
+
+- dmas:  Generic dma devicetree binding as described in
+Documentation/devicetree/bindings/dma/dma.txt.
+
+- dma-names: Contains "ctx0_rx", "ctx0_tx",
+ "ctx1_rx", "ctx1_tx",
+ "ctx2_rx", "ctx2_tx",
+ "ctx3_rx", "ctx3_tx".
+
+- clocks:Contains an entry for each entry in clock-names.
+
+- clock-names:   "mem" - Peripheral clock to driver module.
+
+- fsl,easrc-ram-script-name: The coefficient table for the filters
+
+- fsl,asrc-rate: Defines a mutual sample rate used by DPCM Back
+Ends.
+
+- fsl,asrc-width:Defines a mutual sample width used by DPCM Back
+Ends.
+
+Example:
+
+easrc: easrc@300C {
+   compatible = "fsl,imx8mn-easrc";
+   reg = <0x0 0x300C 0x0 0x1>;
+   interrupts = ;
+   clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
+   clock-names = "mem";
+   dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
+  <&sdma2 18 23 0> , <&sdma2 19 23 0>,
+  <&sdma2 20 23 0> , <&sdma2 21 23 0>,
+  <&sdma2 22 23 0> , <&sdma2 23 23 0>;
+   dma-names = "ctx0_rx", "ctx0_tx",
+   "ctx1_rx", "ctx1_tx",
+   "ctx2_rx", "ctx2_tx",
+   "ctx3_rx", "ctx3_tx";
+   fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin";
+   fsl,asrc-rate  = <8000>;
+   fsl,asrc-width = <16>;
+   status = "disabled";
+};
-- 
2.21.0