Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
On Wed, Jun 25, 2008 at 11:17:45AM -0500, Scott Wood wrote: > Gabriel Paubert wrote: > >On Wed, Jun 25, 2008 at 10:34:32AM -0500, Scott Wood wrote: > >>Kumar Gala wrote: > +/* Macros to workout the correct index for the FPR in the thread > struct */ > +#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) > +#define FPRHALF(i) (((i) - PT_FPR0) % 2) > >>>Have you looked at what the compiler spits out here to make sure we > >>>aren't getting a divide? Seems like we could use '& 0x1'. > >>GCC's not *that* dumb. However, you may get some unnecessary > >>sign-twiddling if "i" is signed. > > > >Not for modulo 2, it's only an even/odd choice and GCC > >implements that efficiently IIRC. For other powers of 2, > >making the left hand side unsigned helps the compiler. > > From this: > > int foo(int x) > { > return x % 2; > } > > I get this with -O3: > > foo: > mr 0,3 > srawi 3,3,1 > addze 3,3 > slwi 3,3,1 > subf 3,3,0 > blr > .size foo, .-foo > .ident "GCC: (GNU) 4.1.2" > Indeed. Signed modulo results can be negative... There are probably better ways to implement this case on PPC, for example: rlwinm tmp,input,4,27,28 ; make shift amount from LSB and MSB lis result,0xff01 srw result,result,tmp ; result is now 0x00 for even, 0x01 for odd positive, ; and 0xff for odd negative extsb result,result No carry, shorter dependency length (although srw may be slow on Cell it seems, but addze may be worse). > Changing it to "x & 1", or to unsigned, gives this: > > foo: > rlwinm 3,3,0,31,31 > blr > .size foo, .-foo > .ident "GCC: (GNU) 4.1.2" > > Maybe newer GCCs are better? Nope, but unsigned is often better for the right shift. Gabriel ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
In message <[EMAIL PROTECTED]> you wrote: > > On Jun 25, 2008, at 11:17 AM, Scott Wood wrote: > > > Gabriel Paubert wrote: > >> On Wed, Jun 25, 2008 at 10:34:32AM -0500, Scott Wood wrote: > >>> Kumar Gala wrote: > > +/* Macros to workout the correct index for the FPR in the > > thread struct */ > > +#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) > > +#define FPRHALF(i) (((i) - PT_FPR0) % 2) > Have you looked at what the compiler spits out here to make sure > we aren't getting a divide? Seems like we could use '& 0x1'. > >>> GCC's not *that* dumb. However, you may get some unnecessary sign- > >>> twiddling if "i" is signed. > >> Not for modulo 2, it's only an even/odd choice and GCC implements > >> that efficiently IIRC. For other powers of 2, > >> making the left hand side unsigned helps the compiler. > > > > From this: > > > > int foo(int x) > > { > > return x % 2; > > } > > > > I get this with -O3: > > > > foo: > >mr 0,3 > >srawi 3,3,1 > >addze 3,3 > >slwi 3,3,1 > >subf 3,3,0 > >blr > >.size foo, .-foo > >.ident "GCC: (GNU) 4.1.2" > > > > Changing it to "x & 1", or to unsigned, gives this: > > > > foo: > >rlwinm 3,3,0,31,31 > >blr > >.size foo, .-foo > >.ident "GCC: (GNU) 4.1.2" > > > > Maybe newer GCCs are better? > > Nope. gcc-4.3.0 from fedora 9: > > foo: > mr 0,3 > srawi 3,3,1 > addze 3,3 > slwi 3,3,1 > subf 3,3,0 > blr > > bar: > rlwinm 3,3,0,31,31 > blr > > if you make 'x' unsigned things are better. I've changed it to '& 0x1', which compiles to something better here. Mikey ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
Gabriel Paubert <[EMAIL PROTECTED]> writes: > On Wed, Jun 25, 2008 at 10:34:32AM -0500, Scott Wood wrote: >> Kumar Gala wrote: >> >>+/* Macros to workout the correct index for the FPR in the thread >> >>struct */ >> >>+#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) >> >>+#define FPRHALF(i) (((i) - PT_FPR0) % 2) >> > >> >Have you looked at what the compiler spits out here to make sure we >> >aren't getting a divide? Seems like we could use '& 0x1'. >> >> GCC's not *that* dumb. However, you may get some unnecessary >> sign-twiddling if "i" is signed. > > Not for modulo 2, it's only an even/odd choice That's wrong. -1 % 2 == -1, 1 % 2 == 1. Andreas. -- Andreas Schwab, SuSE Labs, [EMAIL PROTECTED] SuSE Linux Products GmbH, Maxfeldstraße 5, 90409 Nürnberg, Germany PGP key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5 "And now for something completely different." ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
On Jun 25, 2008, at 11:17 AM, Scott Wood wrote: Gabriel Paubert wrote: On Wed, Jun 25, 2008 at 10:34:32AM -0500, Scott Wood wrote: Kumar Gala wrote: +/* Macros to workout the correct index for the FPR in the thread struct */ +#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) +#define FPRHALF(i) (((i) - PT_FPR0) % 2) Have you looked at what the compiler spits out here to make sure we aren't getting a divide? Seems like we could use '& 0x1'. GCC's not *that* dumb. However, you may get some unnecessary sign- twiddling if "i" is signed. Not for modulo 2, it's only an even/odd choice and GCC implements that efficiently IIRC. For other powers of 2, making the left hand side unsigned helps the compiler. From this: int foo(int x) { return x % 2; } I get this with -O3: foo: mr 0,3 srawi 3,3,1 addze 3,3 slwi 3,3,1 subf 3,3,0 blr .size foo, .-foo .ident "GCC: (GNU) 4.1.2" Changing it to "x & 1", or to unsigned, gives this: foo: rlwinm 3,3,0,31,31 blr .size foo, .-foo .ident "GCC: (GNU) 4.1.2" Maybe newer GCCs are better? Nope. gcc-4.3.0 from fedora 9: foo: mr 0,3 srawi 3,3,1 addze 3,3 slwi 3,3,1 subf 3,3,0 blr bar: rlwinm 3,3,0,31,31 blr if you make 'x' unsigned things are better. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
On Wed, Jun 25, 2008 at 10:34:32AM -0500, Scott Wood wrote: > Kumar Gala wrote: > >>+/* Macros to workout the correct index for the FPR in the thread > >>struct */ > >>+#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) > >>+#define FPRHALF(i) (((i) - PT_FPR0) % 2) > > > >Have you looked at what the compiler spits out here to make sure we > >aren't getting a divide? Seems like we could use '& 0x1'. > > GCC's not *that* dumb. However, you may get some unnecessary > sign-twiddling if "i" is signed. Not for modulo 2, it's only an even/odd choice and GCC implements that efficiently IIRC. For other powers of 2, making the left hand side unsigned helps the compiler. The right shift OTOH might be faster if "i" is unsigned since right signed right shifts affect the carry on PPC (I really don't know if srawi is slower than srwi on some processors, srwi is a form of rlwinm which is always fast). Gabriel ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
Gabriel Paubert wrote: On Wed, Jun 25, 2008 at 10:34:32AM -0500, Scott Wood wrote: Kumar Gala wrote: +/* Macros to workout the correct index for the FPR in the thread struct */ +#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) +#define FPRHALF(i) (((i) - PT_FPR0) % 2) Have you looked at what the compiler spits out here to make sure we aren't getting a divide? Seems like we could use '& 0x1'. GCC's not *that* dumb. However, you may get some unnecessary sign-twiddling if "i" is signed. Not for modulo 2, it's only an even/odd choice and GCC implements that efficiently IIRC. For other powers of 2, making the left hand side unsigned helps the compiler. From this: int foo(int x) { return x % 2; } I get this with -O3: foo: mr 0,3 srawi 3,3,1 addze 3,3 slwi 3,3,1 subf 3,3,0 blr .size foo, .-foo .ident "GCC: (GNU) 4.1.2" Changing it to "x & 1", or to unsigned, gives this: foo: rlwinm 3,3,0,31,31 blr .size foo, .-foo .ident "GCC: (GNU) 4.1.2" Maybe newer GCCs are better? -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
Kumar Gala wrote: +/* Macros to workout the correct index for the FPR in the thread struct */ +#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) +#define FPRHALF(i) (((i) - PT_FPR0) % 2) Have you looked at what the compiler spits out here to make sure we aren't getting a divide? Seems like we could use '& 0x1'. GCC's not *that* dumb. However, you may get some unnecessary sign-twiddling if "i" is signed. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace32.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c @@ -64,6 +64,11 @@ static long compat_ptrace_old(struct tas return -EPERM; } +/* Macros to workout the correct index for the FPR in the thread struct */ +#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) +#define FPRHALF(i) (((i) - PT_FPR0) % 2) Have you looked at what the compiler spits out here to make sure we aren't getting a divide? Seems like we could use '& 0x1'. +#define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) + FPRHALF(i) + long compat_arch_ptrace(struct task_struct *child, compat_long_t request, compat_ulong_t caddr, compat_ulong_t cdata) { @@ -122,7 +127,8 @@ long compat_arch_ptrace(struct task_stru * to be an array of unsigned int (32 bits) - the * index passed in is based on this assumption. */ - tmp = ((unsigned int *)child->thread.fpr)[index - PT_FPR0]; + tmp = ((unsigned int *)child->thread.fpr) + [FPRINDEX(index)]; } ret = put_user((unsigned int)tmp, (u32 __user *)data); break; @@ -162,7 +168,8 @@ long compat_arch_ptrace(struct task_stru CHECK_FULL_REGS(child->thread.regs); if (numReg >= PT_FPR0) { flush_fp_to_thread(child); - tmp = ((unsigned long int *)child->thread.fpr)[numReg - PT_FPR0]; + tmp = ((unsigned long int *)child->thread.fpr) + [FPRINDEX(numReg)]; } else { /* register within PT_REGS struct */ tmp = ptrace_get_reg(child, numReg); } @@ -217,7 +224,8 @@ long compat_arch_ptrace(struct task_stru * to be an array of unsigned int (32 bits) - the * index passed in is based on this assumption. */ - ((unsigned int *)child->thread.fpr)[index - PT_FPR0] = data; + ((unsigned int *)child->thread.fpr) + [FPRINDEX(index)] = data; ret = 0; } break; - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored in the thread_struct, so in preparation add some macros to access the floating point registers. Update all code to use these new macros. Signed-off-by: Michael Neuling <[EMAIL PROTECTED]> --- arch/powerpc/kernel/align.c |6 ++-- arch/powerpc/kernel/process.c|2 - arch/powerpc/kernel/ptrace.c | 10 -- arch/powerpc/kernel/ptrace32.c | 14 +++-- arch/powerpc/kernel/softemu8xx.c |4 +- arch/powerpc/math-emu/math.c | 56 +++ include/asm-powerpc/ppc_asm.h|5 ++- include/asm-powerpc/processor.h |4 ++ 8 files changed, 58 insertions(+), 43 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/align.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/align.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/align.c @@ -366,7 +366,7 @@ static int emulate_multiple(struct pt_re static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr, unsigned int reg, unsigned int flags) { - char *ptr = (char *) ¤t->thread.fpr[reg]; + char *ptr = (char *) ¤t->thread.TS_FPR(reg); int i, ret; if (!(flags & F)) @@ -784,7 +784,7 @@ int fix_alignment(struct pt_regs *regs) return -EFAULT; } } else if (flags & F) { - data.dd = current->thread.fpr[reg]; + data.dd = current->thread.TS_FPR(reg); if (flags & S) { /* Single-precision FP store requires conversion... */ #ifdef CONFIG_PPC_FPU @@ -862,7 +862,7 @@ int fix_alignment(struct pt_regs *regs) if (unlikely(ret)) return -EFAULT; } else if (flags & F) - current->thread.fpr[reg] = data.dd; + current->thread.TS_FPR(reg) = data.dd; else regs->gpr[reg] = data.ll; Index: linux-2.6-ozlabs/arch/powerpc/kernel/process.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/process.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/process.c @@ -110,7 +110,7 @@ int dump_task_fpu(struct task_struct *ts return 0; flush_fp_to_thread(current); - memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs)); + memcpy(fpregs, &tsk->thread.TS_FPR(0), sizeof(*fpregs)); return 1; } Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c @@ -218,7 +218,7 @@ static int fpr_get(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &target->thread.fpr, 0, -1); @@ -231,7 +231,7 @@ static int fpr_set(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyin(&pos, &count, &kbuf, &ubuf, &target->thread.fpr, 0, -1); @@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi tmp = ptrace_get_reg(child, (int) index); } else { flush_fp_to_thread(child); - tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; + tmp = ((unsigned long *)child->thread.fpr) + [TS_FPRWIDTH * (index - PT_FPR0)]; } ret = put_user(tmp,(unsigned long __user *) data); break; @@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi ret = ptrace_put_reg(child, index, data); } else { flush_fp_to_thread(child); - ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data; + ((unsigned long *)child->thread.fpr) + [TS_FPRWIDTH * (index - PT_FPR0)] = data; ret = 0; } break; Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace32.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c @@ -64,6 +64,11 @@ static long compat_ptrace_old(struct tas return -EPERM; } +/* Macros to workout the correct index for the FPR i
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
In message <[EMAIL PROTECTED]> you wrote : > > On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote: > > > We are going to change where the floating point registers are stored > > in the thread_struct, so in preparation add some macros to access the > > floating point registers. Update all code to use these new macros. > > > > Signed-off-by: Michael Neuling <[EMAIL PROTECTED]> > > --- > > > > arch/powerpc/kernel/align.c |6 ++-- > > arch/powerpc/kernel/process.c|5 ++- > > arch/powerpc/kernel/ptrace.c | 14 + > > arch/powerpc/kernel/ptrace32.c | 14 +++-- > > arch/powerpc/kernel/softemu8xx.c |4 +- > > arch/powerpc/math-emu/math.c | 56 ++ > > + > > include/asm-powerpc/ppc_asm.h|5 ++- > > include/asm-powerpc/processor.h |3 ++ > > 8 files changed, 61 insertions(+), 46 deletions(-) > > > > > Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c > > === > > --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c > > +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c > > @@ -218,10 +218,10 @@ static int fpr_get(struct task_struct *t > > flush_fp_to_thread(target); > > > > BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != > > -offsetof(struct thread_struct, fpr[32])); > > +offsetof(struct thread_struct, TS_FPR(32))); > > > > return user_regset_copyout(&pos, &count, &kbuf, &ubuf, > > - &target->thread.fpr, 0, -1); > > + target->thread.fpr, 0, -1); > > is there a reason we can drop the '&'? (I'm only look at this as a > textual diff, not at what the code is trying to do). Oops.. I'll fix. > > > > } > > > > static int fpr_set(struct task_struct *target, const struct > > user_regset *regset, > > @@ -231,10 +231,10 @@ static int fpr_set(struct task_struct *t > > flush_fp_to_thread(target); > > > > BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != > > -offsetof(struct thread_struct, fpr[32])); > > +offsetof(struct thread_struct, TS_FPR(32))); > > > > return user_regset_copyin(&pos, &count, &kbuf, &ubuf, > > - &target->thread.fpr, 0, -1); > > + target->thread.fpr, 0, -1); > > ditto. > > > > } > > > > > > @@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi > > tmp = ptrace_get_reg(child, (int) index); > > } else { > > flush_fp_to_thread(child); > > - tmp = ((unsigned long *)child->thread.fpr)[index - PT_F PR0]; > > + tmp = ((unsigned long *)child->thread.fpr) > > + [TS_FPRSPACING * (index - PT_FPR0)]; > > } > > ret = put_user(tmp,(unsigned long __user *) data); > > break; > > @@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi > > ret = ptrace_put_reg(child, index, data); > > } else { > > flush_fp_to_thread(child); > > - ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data; > > + ((unsigned long *)child->thread.fpr) > > + [TS_FPRSPACING * (index - PT_FPR0)] = data; > > ret = 0; > > } > > break; > > Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c > > === > > --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace32.c > > +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c > > @@ -64,6 +64,11 @@ static long compat_ptrace_old(struct tas > > return -EPERM; > > } > > > > +/* Macros to workout the correct index for the FPR in the thread > > struct */ > > +#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) > > +#define FPRHALF(i) (((i) - PT_FPR0) % 2) > > +#define FPRINDEX(i) TS_FPRSPACING * FPRNUMBER(i) + FPRHALF(i) > > we should either use this macros in both ptrace.c and ptrace32.c or > drop them This set of macros is really only 32 bit specific since in ptrace 32 we access the registers as 32 bits (hence needing two accesses to get the full 64 bits), but in ptrace 64, we access them as 64 bit (hence only 1 access). Theses macros are really only here to deal with the unique indexing into the thread struct that we now need to do for ptrace 32 only (thanks to paulus who pointed out I got this wrong first time). The only macro here that could potentially be reused is FPRNUMER(i). > > > > > + > > long compat_arch_ptrace(struct task_struct *child, compat_long_t > > request, > > compat_ulong_t caddr, compat_ulong_t cdata) > > { > > @@ -122,7 +127,8 @@ long compat_arch_ptrace(struct task_stru > > * to be an array of unsigned int (32 bits) - the > > * index passed in is based on this assumption.
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
return user_regset_copyout(&pos, &count, &kbuf, &ubuf, - &target->thread.fpr, 0, -1); + target->thread.fpr, 0, -1); is there a reason we can drop the '&'? Yes, .fpr is an array. C is _such_ a fun language, heh. Segher ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
On Jun 24, 2008, at 5:57 AM, Michael Neuling wrote: We are going to change where the floating point registers are stored in the thread_struct, so in preparation add some macros to access the floating point registers. Update all code to use these new macros. Signed-off-by: Michael Neuling <[EMAIL PROTECTED]> --- arch/powerpc/kernel/align.c |6 ++-- arch/powerpc/kernel/process.c|5 ++- arch/powerpc/kernel/ptrace.c | 14 + arch/powerpc/kernel/ptrace32.c | 14 +++-- arch/powerpc/kernel/softemu8xx.c |4 +- arch/powerpc/math-emu/math.c | 56 ++ + include/asm-powerpc/ppc_asm.h|5 ++- include/asm-powerpc/processor.h |3 ++ 8 files changed, 61 insertions(+), 46 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c @@ -218,10 +218,10 @@ static int fpr_get(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyout(&pos, &count, &kbuf, &ubuf, - &target->thread.fpr, 0, -1); + target->thread.fpr, 0, -1); is there a reason we can drop the '&'? (I'm only look at this as a textual diff, not at what the code is trying to do). } static int fpr_set(struct task_struct *target, const struct user_regset *regset, @@ -231,10 +231,10 @@ static int fpr_set(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyin(&pos, &count, &kbuf, &ubuf, - &target->thread.fpr, 0, -1); + target->thread.fpr, 0, -1); ditto. } @@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi tmp = ptrace_get_reg(child, (int) index); } else { flush_fp_to_thread(child); - tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; + tmp = ((unsigned long *)child->thread.fpr) + [TS_FPRSPACING * (index - PT_FPR0)]; } ret = put_user(tmp,(unsigned long __user *) data); break; @@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi ret = ptrace_put_reg(child, index, data); } else { flush_fp_to_thread(child); - ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data; + ((unsigned long *)child->thread.fpr) + [TS_FPRSPACING * (index - PT_FPR0)] = data; ret = 0; } break; Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace32.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace32.c @@ -64,6 +64,11 @@ static long compat_ptrace_old(struct tas return -EPERM; } +/* Macros to workout the correct index for the FPR in the thread struct */ +#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) +#define FPRHALF(i) (((i) - PT_FPR0) % 2) +#define FPRINDEX(i) TS_FPRSPACING * FPRNUMBER(i) + FPRHALF(i) we should either use this macros in both ptrace.c and ptrace32.c or drop them + long compat_arch_ptrace(struct task_struct *child, compat_long_t request, compat_ulong_t caddr, compat_ulong_t cdata) { @@ -122,7 +127,8 @@ long compat_arch_ptrace(struct task_stru * to be an array of unsigned int (32 bits) - the * index passed in is based on this assumption. */ - tmp = ((unsigned int *)child->thread.fpr)[index - PT_FPR0]; + tmp = ((unsigned int *)child->thread.fpr) + [FPRINDEX(index)]; } ret = put_user((unsigned int)tmp, (u32 __user *)data); break; @@ -162,7 +168,8 @@ long compat_arch_ptrace(struct task_stru CHECK_FULL_REGS(child->thread.regs); if (numReg >= PT_FPR0) { flush_fp_to_thread(child); - tmp = ((unsigned long int *)child->thread.fpr)[numReg - PT_FPR0]; + tmp = ((unsigned long int *)child->thread.fpr) + [FPRINDEX(numReg)]; } else
[PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored in the thread_struct, so in preparation add some macros to access the floating point registers. Update all code to use these new macros. Signed-off-by: Michael Neuling <[EMAIL PROTECTED]> --- arch/powerpc/kernel/align.c |6 ++-- arch/powerpc/kernel/process.c|5 ++- arch/powerpc/kernel/ptrace.c | 14 + arch/powerpc/kernel/ptrace32.c | 14 +++-- arch/powerpc/kernel/softemu8xx.c |4 +- arch/powerpc/math-emu/math.c | 56 +++ include/asm-powerpc/ppc_asm.h|5 ++- include/asm-powerpc/processor.h |3 ++ 8 files changed, 61 insertions(+), 46 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/align.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/align.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/align.c @@ -366,7 +366,7 @@ static int emulate_multiple(struct pt_re static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr, unsigned int reg, unsigned int flags) { - char *ptr = (char *) ¤t->thread.fpr[reg]; + char *ptr = (char *) ¤t->thread.TS_FPR(reg); int i, ret; if (!(flags & F)) @@ -784,7 +784,7 @@ int fix_alignment(struct pt_regs *regs) return -EFAULT; } } else if (flags & F) { - data.dd = current->thread.fpr[reg]; + data.dd = current->thread.TS_FPR(reg); if (flags & S) { /* Single-precision FP store requires conversion... */ #ifdef CONFIG_PPC_FPU @@ -862,7 +862,7 @@ int fix_alignment(struct pt_regs *regs) if (unlikely(ret)) return -EFAULT; } else if (flags & F) - current->thread.fpr[reg] = data.dd; + current->thread.TS_FPR(reg) = data.dd; else regs->gpr[reg] = data.ll; Index: linux-2.6-ozlabs/arch/powerpc/kernel/process.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/process.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/process.c @@ -110,7 +110,7 @@ int dump_task_fpu(struct task_struct *ts return 0; flush_fp_to_thread(current); - memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs)); + memcpy(fpregs, &tsk->thread.TS_FPR(0), sizeof(*fpregs)); return 1; } @@ -689,7 +689,8 @@ void start_thread(struct pt_regs *regs, #endif discard_lazy_cpu_state(); - memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); + memset(current->thread.fpr, 0, + sizeof(current->thread.fpr)); current->thread.fpscr.val = 0; #ifdef CONFIG_ALTIVEC memset(current->thread.vr, 0, sizeof(current->thread.vr)); Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c @@ -218,10 +218,10 @@ static int fpr_get(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyout(&pos, &count, &kbuf, &ubuf, - &target->thread.fpr, 0, -1); + target->thread.fpr, 0, -1); } static int fpr_set(struct task_struct *target, const struct user_regset *regset, @@ -231,10 +231,10 @@ static int fpr_set(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyin(&pos, &count, &kbuf, &ubuf, - &target->thread.fpr, 0, -1); + target->thread.fpr, 0, -1); } @@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi tmp = ptrace_get_reg(child, (int) index); } else { flush_fp_to_thread(child); - tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; + tmp = ((unsigned long *)child->thread.fpr) + [TS_FPRSPACING * (index - PT_FPR0)]; } ret = put_user(tmp,(unsigned long __user *) data); break; @@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi ret = ptrace_put_reg(child, index, data); } else { flush_fp_to_thread(child); - ((unsigned long *)child->th
[PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored in the thread_struct, so in preparation add some macros to access the floating point registers. Update all code to use these new macros. Signed-off-by: Michael Neuling <[EMAIL PROTECTED]> --- arch/powerpc/kernel/align.c |6 ++-- arch/powerpc/kernel/process.c|5 ++- arch/powerpc/kernel/ptrace.c | 14 + arch/powerpc/kernel/ptrace32.c | 14 +++-- arch/powerpc/kernel/softemu8xx.c |4 +- arch/powerpc/math-emu/math.c | 56 +++ include/asm-powerpc/ppc_asm.h|5 ++- include/asm-powerpc/processor.h |3 ++ 8 files changed, 61 insertions(+), 46 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/align.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/align.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/align.c @@ -366,7 +366,7 @@ static int emulate_multiple(struct pt_re static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr, unsigned int reg, unsigned int flags) { - char *ptr = (char *) ¤t->thread.fpr[reg]; + char *ptr = (char *) ¤t->thread.TS_FPR(reg); int i, ret; if (!(flags & F)) @@ -784,7 +784,7 @@ int fix_alignment(struct pt_regs *regs) return -EFAULT; } } else if (flags & F) { - data.dd = current->thread.fpr[reg]; + data.dd = current->thread.TS_FPR(reg); if (flags & S) { /* Single-precision FP store requires conversion... */ #ifdef CONFIG_PPC_FPU @@ -862,7 +862,7 @@ int fix_alignment(struct pt_regs *regs) if (unlikely(ret)) return -EFAULT; } else if (flags & F) - current->thread.fpr[reg] = data.dd; + current->thread.TS_FPR(reg) = data.dd; else regs->gpr[reg] = data.ll; Index: linux-2.6-ozlabs/arch/powerpc/kernel/process.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/process.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/process.c @@ -110,7 +110,7 @@ int dump_task_fpu(struct task_struct *ts return 0; flush_fp_to_thread(current); - memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs)); + memcpy(fpregs, &tsk->thread.TS_FPR(0), sizeof(*fpregs)); return 1; } @@ -689,7 +689,8 @@ void start_thread(struct pt_regs *regs, #endif discard_lazy_cpu_state(); - memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); + memset(current->thread.fpr, 0, + sizeof(current->thread.fpr)); current->thread.fpscr.val = 0; #ifdef CONFIG_ALTIVEC memset(current->thread.vr, 0, sizeof(current->thread.vr)); Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c @@ -218,10 +218,10 @@ static int fpr_get(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyout(&pos, &count, &kbuf, &ubuf, - &target->thread.fpr, 0, -1); + target->thread.fpr, 0, -1); } static int fpr_set(struct task_struct *target, const struct user_regset *regset, @@ -231,10 +231,10 @@ static int fpr_set(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyin(&pos, &count, &kbuf, &ubuf, - &target->thread.fpr, 0, -1); + target->thread.fpr, 0, -1); } @@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi tmp = ptrace_get_reg(child, (int) index); } else { flush_fp_to_thread(child); - tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; + tmp = ((unsigned long *)child->thread.fpr) + [TS_FPRSPACING * (index - PT_FPR0)]; } ret = put_user(tmp,(unsigned long __user *) data); break; @@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi ret = ptrace_put_reg(child, index, data); } else { flush_fp_to_thread(child); - ((unsigned long *)child->th
[PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored in the thread_struct, so in preparation add some macros to access the floating point registers. Update all code to use these new macros. Signed-off-by: Michael Neuling <[EMAIL PROTECTED]> --- arch/powerpc/kernel/align.c |6 ++-- arch/powerpc/kernel/process.c|5 ++- arch/powerpc/kernel/ptrace.c | 14 + arch/powerpc/kernel/ptrace32.c |9 -- arch/powerpc/kernel/softemu8xx.c |4 +- arch/powerpc/math-emu/math.c | 56 +++ include/asm-powerpc/ppc_asm.h|5 ++- include/asm-powerpc/processor.h |3 ++ 8 files changed, 56 insertions(+), 46 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/align.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/align.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/align.c @@ -366,7 +366,7 @@ static int emulate_multiple(struct pt_re static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr, unsigned int reg, unsigned int flags) { - char *ptr = (char *) ¤t->thread.fpr[reg]; + char *ptr = (char *) ¤t->thread.TS_FPR(reg); int i, ret; if (!(flags & F)) @@ -784,7 +784,7 @@ int fix_alignment(struct pt_regs *regs) return -EFAULT; } } else if (flags & F) { - data.dd = current->thread.fpr[reg]; + data.dd = current->thread.TS_FPR(reg); if (flags & S) { /* Single-precision FP store requires conversion... */ #ifdef CONFIG_PPC_FPU @@ -862,7 +862,7 @@ int fix_alignment(struct pt_regs *regs) if (unlikely(ret)) return -EFAULT; } else if (flags & F) - current->thread.fpr[reg] = data.dd; + current->thread.TS_FPR(reg) = data.dd; else regs->gpr[reg] = data.ll; Index: linux-2.6-ozlabs/arch/powerpc/kernel/process.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/process.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/process.c @@ -110,7 +110,7 @@ int dump_task_fpu(struct task_struct *ts return 0; flush_fp_to_thread(current); - memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs)); + memcpy(fpregs, &tsk->thread.TS_FPR(0), sizeof(*fpregs)); return 1; } @@ -689,7 +689,8 @@ void start_thread(struct pt_regs *regs, #endif discard_lazy_cpu_state(); - memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); + memset(current->thread.fpr, 0, + sizeof(current->thread.fpr)); current->thread.fpscr.val = 0; #ifdef CONFIG_ALTIVEC memset(current->thread.vr, 0, sizeof(current->thread.vr)); Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c @@ -218,10 +218,10 @@ static int fpr_get(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyout(&pos, &count, &kbuf, &ubuf, - &target->thread.fpr, 0, -1); + target->thread.fpr, 0, -1); } static int fpr_set(struct task_struct *target, const struct user_regset *regset, @@ -231,10 +231,10 @@ static int fpr_set(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyin(&pos, &count, &kbuf, &ubuf, - &target->thread.fpr, 0, -1); + target->thread.fpr, 0, -1); } @@ -728,7 +728,8 @@ long arch_ptrace(struct task_struct *chi tmp = ptrace_get_reg(child, (int) index); } else { flush_fp_to_thread(child); - tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; + tmp = ((unsigned long *)child->thread.fpr) + [TS_FPRSPACING * (index - PT_FPR0)]; } ret = put_user(tmp,(unsigned long __user *) data); break; @@ -755,7 +756,8 @@ long arch_ptrace(struct task_struct *chi ret = ptrace_put_reg(child, index, data); } else { flush_fp_to_thread(child); - ((unsigned long *)child->threa
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
In message <[EMAIL PROTECTED]> you wrote : > > On Jun 19, 2008, at 11:13 PM, Michael Neuling wrote: > > > Index: linux-2.6-ozlabs/include/asm-powerpc/processor.h > > === > > --- linux-2.6-ozlabs.orig/include/asm-powerpc/processor.h > > +++ linux-2.6-ozlabs/include/asm-powerpc/processor.h > > @@ -136,6 +136,9 @@ typedef struct { > > unsigned long seg; > > } mm_segment_t; > > > > +#define TS_FPR(i) fpr[i] > > +#define TS_FPRSTART fpr > > + > > struct thread_struct { > > unsigned long ksp;/* Kernel stack pointer */ > > unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow * / > > @@ -197,12 +200,13 @@ struct thread_struct { > > .fpexc_mode = MSR_FE0 | MSR_FE1, \ > > } > > #else > > +#defineFPVSR_INIT_THREAD .fpr = {0} > > Being a bit nit picky, but doesn't seem like this patch should > introduce FPVSR. Yep.. a bit early, thanks. > > > > > #define INIT_THREAD { \ > > .ksp = INIT_SP, \ > > .ksp_limit = INIT_SP_LIMIT, \ > > .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \ > > .fs = KERNEL_DS, \ > > - .fpr = {0}, \ > > + FPVSR_INIT_THREAD, \ > > .fpscr = { .val = 0, }, \ > > .fpexc_mode = 0, \ > > } > > @@ -289,4 +293,5 @@ static inline void prefetchw(const void > > > > #endif /* __KERNEL__ */ > > #endif /* __ASSEMBLY__ */ > > +#define TS_FPRSPACING 1 > > #endif /* _ASM_POWERPC_PROCESSOR_H */ > ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
On Jun 19, 2008, at 11:13 PM, Michael Neuling wrote: Index: linux-2.6-ozlabs/include/asm-powerpc/processor.h === --- linux-2.6-ozlabs.orig/include/asm-powerpc/processor.h +++ linux-2.6-ozlabs/include/asm-powerpc/processor.h @@ -136,6 +136,9 @@ typedef struct { unsigned long seg; } mm_segment_t; +#define TS_FPR(i) fpr[i] +#define TS_FPRSTART fpr + struct thread_struct { unsigned long ksp;/* Kernel stack pointer */ unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */ @@ -197,12 +200,13 @@ struct thread_struct { .fpexc_mode = MSR_FE0 | MSR_FE1, \ } #else +#defineFPVSR_INIT_THREAD .fpr = {0} Being a bit nit picky, but doesn't seem like this patch should introduce FPVSR. #define INIT_THREAD { \ .ksp = INIT_SP, \ .ksp_limit = INIT_SP_LIMIT, \ .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \ .fs = KERNEL_DS, \ - .fpr = {0}, \ + FPVSR_INIT_THREAD, \ .fpscr = { .val = 0, }, \ .fpexc_mode = 0, \ } @@ -289,4 +293,5 @@ static inline void prefetchw(const void #endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ +#define TS_FPRSPACING 1 #endif /* _ASM_POWERPC_PROCESSOR_H */ ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored in the thread_struct, so in preparation add some macros to access the floating point registers. Update all code to use these new macros. Signed-off-by: Michael Neuling <[EMAIL PROTECTED]> --- arch/powerpc/kernel/align.c |6 ++-- arch/powerpc/kernel/asm-offsets.c |2 - arch/powerpc/kernel/process.c |5 ++- arch/powerpc/kernel/ptrace.c | 14 + arch/powerpc/kernel/ptrace32.c|9 -- arch/powerpc/kernel/signal_32.c |6 ++-- arch/powerpc/kernel/signal_64.c | 13 +--- arch/powerpc/kernel/softemu8xx.c |4 +- arch/powerpc/math-emu/math.c | 56 +++--- include/asm-powerpc/ppc_asm.h |5 ++- include/asm-powerpc/processor.h |7 11 files changed, 71 insertions(+), 56 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/align.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/align.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/align.c @@ -366,7 +366,7 @@ static int emulate_multiple(struct pt_re static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr, unsigned int reg, unsigned int flags) { - char *ptr = (char *) ¤t->thread.fpr[reg]; + char *ptr = (char *) ¤t->thread.TS_FPR(reg); int i, ret; if (!(flags & F)) @@ -784,7 +784,7 @@ int fix_alignment(struct pt_regs *regs) return -EFAULT; } } else if (flags & F) { - data.dd = current->thread.fpr[reg]; + data.dd = current->thread.TS_FPR(reg); if (flags & S) { /* Single-precision FP store requires conversion... */ #ifdef CONFIG_PPC_FPU @@ -862,7 +862,7 @@ int fix_alignment(struct pt_regs *regs) if (unlikely(ret)) return -EFAULT; } else if (flags & F) - current->thread.fpr[reg] = data.dd; + current->thread.TS_FPR(reg) = data.dd; else regs->gpr[reg] = data.ll; Index: linux-2.6-ozlabs/arch/powerpc/kernel/asm-offsets.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/asm-offsets.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/asm-offsets.c @@ -66,7 +66,7 @@ int main(void) DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit)); DEFINE(PT_REGS, offsetof(struct thread_struct, regs)); DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode)); - DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0])); + DEFINE(THREAD_FPR0, offsetof(struct thread_struct, TS_FPR(0))); DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr)); #ifdef CONFIG_ALTIVEC DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0])); Index: linux-2.6-ozlabs/arch/powerpc/kernel/process.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/process.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/process.c @@ -110,7 +110,7 @@ int dump_task_fpu(struct task_struct *ts return 0; flush_fp_to_thread(current); - memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs)); + memcpy(fpregs, &tsk->thread.TS_FPR(0), sizeof(*fpregs)); return 1; } @@ -689,7 +689,8 @@ void start_thread(struct pt_regs *regs, #endif discard_lazy_cpu_state(); - memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); + memset(current->thread.TS_FPRSTART, 0, + sizeof(current->thread.TS_FPRSTART)); current->thread.fpscr.val = 0; #ifdef CONFIG_ALTIVEC memset(current->thread.vr, 0, sizeof(current->thread.vr)); Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c @@ -218,10 +218,10 @@ static int fpr_get(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyout(&pos, &count, &kbuf, &ubuf, - &target->thread.fpr, 0, -1); + &target->thread.TS_FPRSTART, 0, -1); } static int fpr_set(struct task_struct *target, const struct user_regset *regset, @@ -231,10 +231,10 @@ static int fpr_set(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_r
[PATCH 2/9] powerpc: Add macros to access floating point registers in thread_struct.
We are going to change where the floating point registers are stored in the thread_struct, so in preparation add some macros to access the floating point registers. Update all code to use these new macros. Signed-off-by: Michael Neuling <[EMAIL PROTECTED]> --- arch/powerpc/kernel/align.c |6 ++-- arch/powerpc/kernel/asm-offsets.c |2 - arch/powerpc/kernel/process.c |5 ++- arch/powerpc/kernel/ptrace.c | 14 + arch/powerpc/kernel/ptrace32.c|9 -- arch/powerpc/kernel/signal_32.c |6 ++-- arch/powerpc/kernel/signal_64.c | 13 +--- arch/powerpc/kernel/softemu8xx.c |4 +- arch/powerpc/math-emu/math.c | 56 +++--- include/asm-powerpc/ppc_asm.h |5 ++- include/asm-powerpc/processor.h |7 11 files changed, 71 insertions(+), 56 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/kernel/align.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/align.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/align.c @@ -366,7 +366,7 @@ static int emulate_multiple(struct pt_re static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr, unsigned int reg, unsigned int flags) { - char *ptr = (char *) ¤t->thread.fpr[reg]; + char *ptr = (char *) ¤t->thread.TS_FPR(reg); int i, ret; if (!(flags & F)) @@ -784,7 +784,7 @@ int fix_alignment(struct pt_regs *regs) return -EFAULT; } } else if (flags & F) { - data.dd = current->thread.fpr[reg]; + data.dd = current->thread.TS_FPR(reg); if (flags & S) { /* Single-precision FP store requires conversion... */ #ifdef CONFIG_PPC_FPU @@ -862,7 +862,7 @@ int fix_alignment(struct pt_regs *regs) if (unlikely(ret)) return -EFAULT; } else if (flags & F) - current->thread.fpr[reg] = data.dd; + current->thread.TS_FPR(reg) = data.dd; else regs->gpr[reg] = data.ll; Index: linux-2.6-ozlabs/arch/powerpc/kernel/asm-offsets.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/asm-offsets.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/asm-offsets.c @@ -66,7 +66,7 @@ int main(void) DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit)); DEFINE(PT_REGS, offsetof(struct thread_struct, regs)); DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode)); - DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0])); + DEFINE(THREAD_FPR0, offsetof(struct thread_struct, TS_FPR(0))); DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr)); #ifdef CONFIG_ALTIVEC DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0])); Index: linux-2.6-ozlabs/arch/powerpc/kernel/process.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/process.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/process.c @@ -110,7 +110,7 @@ int dump_task_fpu(struct task_struct *ts return 0; flush_fp_to_thread(current); - memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs)); + memcpy(fpregs, &tsk->thread.TS_FPR(0), sizeof(*fpregs)); return 1; } @@ -689,7 +689,8 @@ void start_thread(struct pt_regs *regs, #endif discard_lazy_cpu_state(); - memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); + memset(current->thread.TS_FPRSTART, 0, + sizeof(current->thread.TS_FPRSTART)); current->thread.fpscr.val = 0; #ifdef CONFIG_ALTIVEC memset(current->thread.vr, 0, sizeof(current->thread.vr)); Index: linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/ptrace.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/ptrace.c @@ -218,10 +218,10 @@ static int fpr_get(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyout(&pos, &count, &kbuf, &ubuf, - &target->thread.fpr, 0, -1); + &target->thread.TS_FPRSTART, 0, -1); } static int fpr_set(struct task_struct *target, const struct user_regset *regset, @@ -231,10 +231,10 @@ static int fpr_set(struct task_struct *t flush_fp_to_thread(target); BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != -offsetof(struct thread_struct, fpr[32])); +offsetof(struct thread_struct, TS_FPR(32))); return user_r