Re: [PATCH V2 3/4] powerpc/mm/hash64: Store the slot information at the right offset.

[Ram Pai]

On Sun, Feb 11, 2018 at 08:30:08PM +0530, Aneesh Kumar K.V wrote:
> The hugetlb pte entries are at the PMD and PUD level. Use the right offset
> for them to get the second half of the table.
> 
> Signed-off-by: Aneesh Kumar K.V 
> ---
>  arch/powerpc/include/asm/book3s/64/hash-4k.h  |  3 ++-
>  arch/powerpc/include/asm/book3s/64/hash-64k.h |  9 +
>  arch/powerpc/include/asm/book3s/64/pgtable.h  |  2 +-
>  arch/powerpc/mm/hash64_4k.c   |  4 ++--
>  arch/powerpc/mm/hash64_64k.c  |  8 
>  arch/powerpc/mm/hugetlbpage-hash64.c  | 10 +++---
>  arch/powerpc/mm/tlb_hash64.c  |  9 +++--
>  7 files changed, 28 insertions(+), 17 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h 
> b/arch/powerpc/include/asm/book3s/64/hash-4k.h
> index 949d691094a4..67c5475311ee 100644
> diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c

snip...

> index 881ebd53ffc2..9b23f12e863c 100644
> --- a/arch/powerpc/mm/tlb_hash64.c
> +++ b/arch/powerpc/mm/tlb_hash64.c
> @@ -51,7 +51,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long 
> addr,
>   unsigned int psize;
>   int ssize;
>   real_pte_t rpte;
> - int i;
> + int i, offset;
> 
>   i = batch->index;
> 
> @@ -67,6 +67,10 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long 
> addr,
>   psize = get_slice_psize(mm, addr);
>   /* Mask the address for the correct page size */
>   addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1);
> + if (unlikely(psize == MMU_PAGE_16G))
> + offset = PTRS_PER_PUD;
> + else
> + offset = PTRS_PER_PMD;

I prefer to encapsulate this under some function/macro; somewhere in hugetlb.h, 
which returns
the offset given a mmu_size.  But no big deal..


Reviewed-by: Ram Pai 

RP

[PATCH V2 3/4] powerpc/mm/hash64: Store the slot information at the right offset.

[Aneesh Kumar K.V]

The hugetlb pte entries are at the PMD and PUD level. Use the right offset
for them to get the second half of the table.

Signed-off-by: Aneesh Kumar K.V 
---
 arch/powerpc/include/asm/book3s/64/hash-4k.h  |  3 ++-
 arch/powerpc/include/asm/book3s/64/hash-64k.h |  9 +
 arch/powerpc/include/asm/book3s/64/pgtable.h  |  2 +-
 arch/powerpc/mm/hash64_4k.c   |  4 ++--
 arch/powerpc/mm/hash64_64k.c  |  8 
 arch/powerpc/mm/hugetlbpage-hash64.c  | 10 +++---
 arch/powerpc/mm/tlb_hash64.c  |  9 +++--
 7 files changed, 28 insertions(+), 17 deletions(-)

diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h 
b/arch/powerpc/include/asm/book3s/64/hash-4k.h
index 949d691094a4..67c5475311ee 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-4k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h
@@ -63,7 +63,8 @@ static inline int hash__hugepd_ok(hugepd_t hpd)
  * keeping the prototype consistent across the two formats.
  */
 static inline unsigned long pte_set_hidx(pte_t *ptep, real_pte_t rpte,
-   unsigned int subpg_index, unsigned long hidx)
+unsigned int subpg_index, unsigned 
long hidx,
+int offset)
 {
return (hidx << H_PAGE_F_GIX_SHIFT) &
(H_PAGE_F_SECOND | H_PAGE_F_GIX);
diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h 
b/arch/powerpc/include/asm/book3s/64/hash-64k.h
index ee440fb3d240..3bcf269f8f55 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-64k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h
@@ -45,7 +45,7 @@
  * generic accessors and iterators here
  */
 #define __real_pte __real_pte
-static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep)
+static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep, int offset)
 {
real_pte_t rpte;
unsigned long *hidxp;
@@ -59,7 +59,7 @@ static inline real_pte_t __real_pte(pte_t pte, pte_t *ptep)
 */
smp_rmb();
 
-   hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);
+   hidxp = (unsigned long *)(ptep + offset);
rpte.hidx = *hidxp;
return rpte;
 }
@@ -86,9 +86,10 @@ static inline unsigned long __rpte_to_hidx(real_pte_t rpte, 
unsigned long index)
  * expected to modify the PTE bits accordingly and commit the PTE to memory.
  */
 static inline unsigned long pte_set_hidx(pte_t *ptep, real_pte_t rpte,
-   unsigned int subpg_index, unsigned long hidx)
+unsigned int subpg_index,
+unsigned long hidx, int offset)
 {
-   unsigned long *hidxp = (unsigned long *)(ptep + PTRS_PER_PTE);
+   unsigned long *hidxp = (unsigned long *)(ptep + offset);
 
rpte.hidx &= ~HIDX_BITS(0xfUL, subpg_index);
*hidxp = rpte.hidx  | HIDX_BITS(HIDX_SHIFT_BY_ONE(hidx), subpg_index);
diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h 
b/arch/powerpc/include/asm/book3s/64/pgtable.h
index 1c8c88e90553..a6b9f1d74600 100644
--- a/arch/powerpc/include/asm/book3s/64/pgtable.h
+++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
@@ -350,7 +350,7 @@ extern unsigned long pci_io_base;
  */
 #ifndef __real_pte
 
-#define __real_pte(e,p)((real_pte_t){(e)})
+#define __real_pte(e, p, o)((real_pte_t){(e)})
 #define __rpte_to_pte(r)   ((r).pte)
 #define __rpte_to_hidx(r,index)(pte_val(__rpte_to_pte(r)) >> 
H_PAGE_F_GIX_SHIFT)
 
diff --git a/arch/powerpc/mm/hash64_4k.c b/arch/powerpc/mm/hash64_4k.c
index 5a69b51d08a3..d573d7d07f25 100644
--- a/arch/powerpc/mm/hash64_4k.c
+++ b/arch/powerpc/mm/hash64_4k.c
@@ -55,7 +55,7 @@ int __hash_page_4K(unsigned long ea, unsigned long access, 
unsigned long vsid,
 * need to add in 0x1 if it's a read-only user page
 */
rflags = htab_convert_pte_flags(new_pte);
-   rpte = __real_pte(__pte(old_pte), ptep);
+   rpte = __real_pte(__pte(old_pte), ptep, PTRS_PER_PTE);
 
if (cpu_has_feature(CPU_FTR_NOEXECUTE) &&
!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
@@ -117,7 +117,7 @@ int __hash_page_4K(unsigned long ea, unsigned long access, 
unsigned long vsid,
return -1;
}
new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | H_PAGE_HASHPTE;
-   new_pte |= pte_set_hidx(ptep, rpte, 0, slot);
+   new_pte |= pte_set_hidx(ptep, rpte, 0, slot, PTRS_PER_PTE);
}
*ptep = __pte(new_pte & ~H_PAGE_BUSY);
return 0;
diff --git a/arch/powerpc/mm/hash64_64k.c b/arch/powerpc/mm/hash64_64k.c
index 2253bbc6a599..e601d95c3b20 100644
--- a/arch/powerpc/mm/hash64_64k.c
+++ b/arch/powerpc/mm/hash64_64k.c
@@ -86,7 +86,7 @@ int __hash_page_4K(unsigned long ea, unsigned long access, 
unsigned long vsid,
 
subpg_index = (ea & (PAGE_SIZE - 1)) >> shift;
vpn  = hpt_vpn(ea, vsid, ssize);
-   rpte =