Re: [PATCH v1 2/2] arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
On Wednesday 28 January 2015 09:53:25 Suman Tripathi wrote: I added the iommus in the IOMMU AHBC patch. Anything wrong in that ? In the next version Also I will remove the IOMMU hacks from arasan driver Hmm, I guess you have a required ordering between the patches either way, which makes it hard to merge in a way that is bisectable. You are correct that you should not merge a patch with the iommu reference before adding the iommu device node, because it would otherwise break building the mmc tree. One more point is the binding for IOMMU needs to be in the same patch in which the IOMMU support is added. So to provide the binding info of the master node we require the sdhc nodes to be merged first. Usually, the right answer is to merged the dts changes through the arm-soc tree, and then you can just add the node for the sdhc device after the one for the iommu device. On Wed, Jan 28, 2015 at 6:16 PM, Arnd Bergmann a...@arndb.de wrote: On Wednesday 28 January 2015 09:53:25 Suman Tripathi wrote: I added the iommus in the IOMMU AHBC patch. Anything wrong in that ? In the next version Also I will remove the IOMMU hacks from arasan driver Hmm, I guess you have a required ordering between the patches either way, which makes it hard to merge in a way that is bisectable. You are correct that you should not merge a patch with the iommu reference before adding the iommu device node, because it would otherwise break building the mmc tree. Usually, the right answer is to merged the dts changes through the arm-soc tree, and then you can just add the node for the sdhc device after the one for the iommu device. Arnd -- Thanks, with regards, Suman Tripathi ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v1 2/2] arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
On Wednesday 28 January 2015 09:53:25 Suman Tripathi wrote: I added the iommus in the IOMMU AHBC patch. Anything wrong in that ? In the next version Also I will remove the IOMMU hacks from arasan driver Hmm, I guess you have a required ordering between the patches either way, which makes it hard to merge in a way that is bisectable. You are correct that you should not merge a patch with the iommu reference before adding the iommu device node, because it would otherwise break building the mmc tree. Usually, the right answer is to merged the dts changes through the arm-soc tree, and then you can just add the node for the sdhc device after the one for the iommu device. Arnd ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v1 2/2] arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
This patch adds the arasan sdhc nodes to reuse the of-arasan
driver for APM X-Gene SoC.
Signed-off-by: Suman Tripathi stripa...@apm.com
---
arch/arm64/boot/dts/apm-storm.dtsi | 43 ++
1 file changed, 43 insertions(+)
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi
b/arch/arm64/boot/dts/apm-storm.dtsi
index f1ad9c2..52de7d3 100644
--- a/arch/arm64/boot/dts/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm-storm.dtsi
@@ -144,6 +144,40 @@
clock-output-names = socplldiv2;
};
+ ahbclk: ahbclk@1f2ac000 {
+ compatible = apm,xgene-device-clock;
+ #clock-cells = 1;
+ clocks = socplldiv2 0;
+ reg = 0x0 0x1f2ac000 0x0 0x1000
+ 0x0 0x1700 0x0 0x2000;
+ reg-names = csr-reg, div-reg;
+ csr-offset = 0x0;
+ csr-mask = 0x1;
+ enable-offset = 0x8;
+ enable-mask = 0x1;
+ divider-offset = 0x164;
+ divider-width = 0x5;
+ divider-shift = 0x0;
+ clock-output-names = ahbclk;
+ };
+
+ sdioclk: sdioclk@1f2ac000 {
+ compatible = apm,xgene-device-clock;
+ #clock-cells = 1;
+ clocks = socplldiv2 0;
+ reg = 0x0 0x1f2ac000 0x0 0x1000
+ 0x0 0x1700 0x0 0x2000;
+ reg-names = csr-reg, div-reg;
+ csr-offset = 0x0;
+ csr-mask = 0x2;
+ enable-offset = 0x8;
+ enable-mask = 0x2;
+ divider-offset = 0x178;
+ divider-width = 0x8;
+ divider-shift = 0x0;
+ clock-output-names = sdioclk;
+ };
+
qmlclk: qmlclk {
compatible = apm,xgene-device-clock;
#clock-cells = 1;
@@ -595,6 +629,15 @@
clocks = rtcclk 0;
};
+ sdhc0: sdhc@1c00 {
+ device_type = sdhc;
+ compatible = arasan,sdhci-8.9a;
+ reg = 0x0 0x1c00 0x0 0x100;
+ interrupts = 0x0 0x49 0x4;
+ clock-names = clk_xin, clk_ahb;
+ clocks = sdioclk 0, ahbclk 0;
+ };
+
menet: ethernet@1702 {
compatible = apm,xgene-enet;
status = disabled;
--
1.8.2.1
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Re: [PATCH v1 2/2] arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
On Tuesday 27 January 2015 22:51:00 Suman Tripathi wrote:
+ sdhc0: sdhc@1c00 {
+ device_type = sdhc;
+ compatible = arasan,sdhci-8.9a;
+ reg = 0x0 0x1c00 0x0 0x100;
+ interrupts = 0x0 0x49 0x4;
+ clock-names = clk_xin, clk_ahb;
+ clocks = sdioclk 0, ahbclk 0;
+ };
+
Here you don't provide an 'iommus' property, which means that the
device is unable to use the iommu.
Arnd
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Re: [PATCH v1 2/2] arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
Hi Arnd,
On Tuesday 27 January 2015 22:51:00 Suman Tripathi wrote:
+ sdhc0: sdhc@1c00 {
+ device_type = sdhc;
+ compatible = arasan,sdhci-8.9a;
+ reg = 0x0 0x1c00 0x0 0x100;
+ interrupts = 0x0 0x49 0x4;
+ clock-names = clk_xin, clk_ahb;
+ clocks = sdioclk 0, ahbclk 0;
+ };
+
Here you don't provide an 'iommus' property, which means that the
device is unable to use the iommu.
I added the iommus in the IOMMU AHBC patch. Anything wrong in that ? In the
next version Also I will remove the IOMMU hacks from arasan driver
On Wed, Jan 28, 2015 at 1:43 AM, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 27 January 2015 22:51:00 Suman Tripathi wrote:
+ sdhc0: sdhc@1c00 {
+ device_type = sdhc;
+ compatible = arasan,sdhci-8.9a;
+ reg = 0x0 0x1c00 0x0 0x100;
+ interrupts = 0x0 0x49 0x4;
+ clock-names = clk_xin, clk_ahb;
+ clocks = sdioclk 0, ahbclk 0;
+ };
+
Here you don't provide an 'iommus' property, which means that the
device is unable to use the iommu.
Arnd
--
Thanks,
with regards,
Suman Tripathi
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Re: [PATCH v1 2/2] arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
Hi Arnd,
I added the iommus in the IOMMU AHBC patch. Anything wrong in that ?
In the next version Also I will remove the IOMMU hacks from arasan
driver
On Wed, Jan 28, 2015 at 9:48 AM, Suman Tripathi stripa...@apm.com wrote:
Hi Arnd,
On Tuesday 27 January 2015 22:51:00 Suman Tripathi wrote:
+ sdhc0: sdhc@1c00 {
+ device_type = sdhc;
+ compatible = arasan,sdhci-8.9a;
+ reg = 0x0 0x1c00 0x0 0x100;
+ interrupts = 0x0 0x49 0x4;
+ clock-names = clk_xin, clk_ahb;
+ clocks = sdioclk 0, ahbclk 0;
+ };
+
Here you don't provide an 'iommus' property, which means that the
device is unable to use the iommu.
I added the iommus in the IOMMU AHBC patch. Anything wrong in that ? In the
next version Also I will remove the IOMMU hacks from arasan driver
On Wed, Jan 28, 2015 at 1:43 AM, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 27 January 2015 22:51:00 Suman Tripathi wrote:
+ sdhc0: sdhc@1c00 {
+ device_type = sdhc;
+ compatible = arasan,sdhci-8.9a;
+ reg = 0x0 0x1c00 0x0 0x100;
+ interrupts = 0x0 0x49 0x4;
+ clock-names = clk_xin, clk_ahb;
+ clocks = sdioclk 0, ahbclk 0;
+ };
+
Here you don't provide an 'iommus' property, which means that the
device is unable to use the iommu.
Arnd
--
Thanks,
with regards,
Suman Tripathi
--
Thanks,
with regards,
Suman Tripathi
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