Re: [patch 0/6] Strong Access Ordering page attributes for POWER7
We haven't defined a user-visible feature bit (and besides, we're really getting short on these...). This is becoming a bit of concern btw (the running out of bits). Maybe we should start defining an AT_HWCAP2 for powerpc and get libc updated to pick it up ? Joel, Any thoughts? Is it a required or optional feature of the 2.06 architecture spec? If it's required you could just use that. It doesn't solve the problem more generically if other archs decide to implement it though. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [patch 0/6] Strong Access Ordering page attributes for POWER7
On Mon, 2008-07-07 at 16:23 -0500, Joel Schopp wrote: We haven't defined a user-visible feature bit (and besides, we're really getting short on these...). This is becoming a bit of concern btw (the running out of bits). Maybe we should start defining an AT_HWCAP2 for powerpc and get libc updated to pick it up ? Joel, Any thoughts? Is it a required or optional feature of the 2.06 architecture spec? If it's required you could just use that. It doesn't solve the problem more generically if other archs decide to implement it though. And then we start having to expose 2.06S vs. 2.06E .. nah. I think for now, for SAO, the idea that one can try and if -EINVAL, try again without might work fine. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [patch 0/6] Strong Access Ordering page attributes for POWER7
On Wed, 2008-06-18 at 17:32 -0500, [EMAIL PROTECTED] wrote: Andrew, The first patch in this series hits architecture independent code, but the rest is contained in the powerpc subtree. Could you pick up the first patch into -mm? I can send the rest of them through the powerpc git tree. The first patch and the rest of the set are independent and can be merged in either order. ../.. I was wondering... how do we inform userspace that this is available ? Same question with adding the endian bit on 4xx which I plan to do using your infrastructure... We haven't defined a user-visible feature bit (and besides, we're really getting short on these...). This is becoming a bit of concern btw (the running out of bits). Maybe we should start defining an AT_HWCAP2 for powerpc and get libc updated to pick it up ? Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[patch 0/6] Strong Access Ordering page attributes for POWER7
Andrew, The first patch in this series hits architecture independent code, but the rest is contained in the powerpc subtree. Could you pick up the first patch into -mm? I can send the rest of them through the powerpc git tree. The first patch and the rest of the set are independent and can be merged in either order. Changes since I posted on June 10: - Fixed reversed logic in arch_validate_prot() in include/asm-powerpc/mman.h - Replace binary with logical in arch_validate_prot() - Got rid of HAVE_ARCH_PROT_BITS Allow an application to enable Strong Access Ordering on specific pages of memory on Power 7 hardware. Currently, power has a weaker memory model than x86. Implementing a stronger memory model allows an emulator to more efficiently translate x86 code into power code, resulting in faster code execution. On Power 7 hardware, storing 0b1110 in the WIMG bits of the hpte enables strong access ordering mode for the memory page. This patchset allows a user to specify which pages are thus enabled by passing a new protection bit through mmap() and mprotect(). I have tentatively defined this bit, PROT_SAO, as 0x10. In order to accomplish this, I had to modify the architecture-independent code to allow the architecture to deal with additional protection bits. Thanks, Shaggy -- ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
