How to set DDR data bus width to 16Bit
Hi all, Does anyone knows how to set the DDR data bus width to 16Bit in linux? I've found that option in U-Boot in the MPC8313ERDB_config file. (verfied with a memory dump of the CPU register (DDR_SDRAM_CFG) - the 16Bit DBW is set(10b) ). But after starting linux the value is set to 00b (=reseverd). We are using a customized MPC8313ERDB board. Thanks in advance Kind regards Frank Prepelica Software Design Engineer Ubidyne GmbH Lise-Meitner-Str.-14 89081 Ulm - Germany ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: How to set DDR data bus width to 16Bit
you have to do it via your bootloader (u-boot) which sets up the DDR memory controller. Linux (already) assumes memory is available. Are you sure linux kernel is changing DDR_SDRAM_CFG ? When our linux-2.6.28 kernel is up, it's still 0xc308 when I read physical address 0xe0002110. Btw. We did some performance tests with 16 bit bus-width (DDR2 memory) and surprisingly performance was almost as good as 32 bit bus-width --- N. van Bolhuis. Frank Prepelica wrote: Hi all, Does anyone knows how to set the DDR data bus width to 16Bit in linux? I've found that option in U-Boot in the MPC8313ERDB_config file. (verfied with a memory dump of the CPU register (DDR_SDRAM_CFG) - the 16Bit DBW is set(10b) ). But after starting linux the value is set to 00b (=reseverd). We are using a customized MPC8313ERDB board. Thanks in advance Kind regards Frank Prepelica Software Design Engineer Ubidyne GmbH Lise-Meitner-Str.-14 89081 Ulm - Germany ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
AW: How to set DDR data bus width to 16Bit
you have to do it via your bootloader (u-boot) which sets up the DDR memory controller. Linux (already) assumes memory is available. Are you sure linux kernel is changing DDR_SDRAM_CFG ? When our linux-2.6.28 kernel is up, it's still 0xc308 when I read physical address 0xe0002110. Hi Norbert, thank you for your fast reply! You are absolutly right! I made a silly mistake. I've read the value of the 0xe0002110 with a 8bit pointer. The value is actually 0xC310 which means the 16bit bus width is set. Just to be sure. Is this the only change (in the bootloader) I have to make that all data accesses are 16bit wide? Btw. We did some performance tests with 16 bit bus-width (DDR2 memory) and surprisingly performance was almost as good as 32 bit bus-width This is exactly our intention to test. Thanks for that hint. Very good to know! Thank you. Best regards Frank ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: AW: How to set DDR data bus width to 16Bit
Hi Frank, Yes, it's 0xC310 for 16 bit. I showed the 32bit value. Yes, to go to 16 bit bus-width (1 DDR(2) device), this is the only change needed in u-boot, assuming you have 2 DDR(2) devices (like 8313E-RDB) which together provide 16+16 = 32bit bus-width. Since, surprisingly, the 16 bit application/u-boot performance was almost as good as 32 bit we even tested with I-cache and D-cache turned off. u-boot provides commands for this (which I didn't know, see some previous emails from me on this mailing-list). Also with I-cache and D-cache turned off the 16 bit bus-width performance was almost as good as 32 bit. So our conclusion was that the 16/32 bit DDR2 memory access is not the limiting factor when it comes to SW performance. Therefore we decided to go for 16 bit bus-width for a new/tiny 8313 based design. Please let me know your test results. I would expect you to conclude more or less the same. Best Regards, Norbert. Frank Prepelica wrote: you have to do it via your bootloader (u-boot) which sets up the DDR memory controller. Linux (already) assumes memory is available. Are you sure linux kernel is changing DDR_SDRAM_CFG ? When our linux-2.6.28 kernel is up, it's still 0xc308 when I read physical address 0xe0002110. Hi Norbert, thank you for your fast reply! You are absolutly right! I made a silly mistake. I've read the value of the 0xe0002110 with a 8bit pointer. The value is actually 0xC310 which means the 16bit bus width is set. Just to be sure. Is this the only change (in the bootloader) I have to make that all data accesses are 16bit wide? Btw. We did some performance tests with 16 bit bus-width (DDR2 memory) and surprisingly performance was almost as good as 32 bit bus-width This is exactly our intention to test. Thanks for that hint. Very good to know! Thank you. Best regards Frank ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
