Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Wed, Apr 16, 2008 at 04:58:21PM -0500, Scott Wood wrote:
On Thu, Apr 17, 2008 at 01:00:42AM +0400, Anton Vorontsov wrote:
On Wed, Apr 16, 2008 at 01:44:42PM -0500, Scott Wood wrote:
A maximal timeout of ~65 ms is a little low... For use as a wakeup from
sleep mode, I'd like to be able to request timeouts as large as the
hardware allows.
That is about precision. You just need to implement gtm_reset_stimer()
is you want precision with a seconds, this will run a timer at 1 Hz.
Enh. I'm not crazy about having to call separately named functions,
rather than have the timer code set the reference clock to the highest
precision that has the needed range.
Heh. Scott, think about it. You have single 16bit timer with variable
frequency. To use it, you'd better know what exactly precision you need.
Then you limited to u16 for the interval for this chosen precision.
Yes, you can implement this:
#define MAX_PRESCALER (256 * 256 * 16)
int gtm_reset_weird_behaving_utimer16(struct gtm_timer *tmr,
unsigned long long usec,
bool free_run)
{
int freq = 100;
int min_hz2 = (tmr-gtm-freq / MAX_PRESCALER) 1;
while (!(freq 1) !(usec 1) freq = min_hz2) {
freq = 1;
usec = 1;
}
if (usec 0x)
return -EINVAL;
return gtm_reset_ref_timer16(tmr, freq, (u16)usec, free_run);
}
This function (depending on clock-frequency) will work for 1001 usecs,
but will return -EINVAL for 101 usecs, thought it will work for
100 usecs, and for 33300 it will work too, but will again
return -EINVAL for 33310 usecs. I hope this pattern is obvious.
This is really weird behaving, isn't it?
Oh, and later you can drop the 16 suffix and implement the dynamically
chosen cascading, depending if usec argument fits into single/double/quad
timer.
Though, I don't need all this stuff in the FHCI irq handlers, I do know
the precision I want. Like the most of kernel code does.
--
Anton Vorontsov
email: [EMAIL PROTECTED]
irc://irc.freenode.net/bd2
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Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Thu, Apr 17, 2008 at 04:52:35PM +0400, Anton Vorontsov wrote:
Heh. Scott, think about it. You have single 16bit timer with variable
frequency. To use it, you'd better know what exactly precision you need.
Why? I know the timeout I need.
Then you limited to u16 for the interval for this chosen precision.
Yes, you can implement this:
#define MAX_PRESCALER (256 * 256 * 16)
int gtm_reset_weird_behaving_utimer16(struct gtm_timer *tmr,
unsigned long long usec,
bool free_run)
{
int freq = 100;
int min_hz2 = (tmr-gtm-freq / MAX_PRESCALER) 1;
while (!(freq 1) !(usec 1) freq = min_hz2) {
freq = 1;
usec = 1;
}
if (usec 0x)
return -EINVAL;
return gtm_reset_ref_timer16(tmr, freq, (u16)usec, free_run);
}
Try something like this:
int gtm_reset_sane_behaving_timer(struct gtm_timer *tmr,
u64 usec, bool free_run)
{
int freq = 100;
int min_hz2 = (tmr-gtm-freq / MAX_PRESCALER) 1;
while (usec 0x freq = min_hz2) {
freq = 1;
usec = 1;
}
if (usec 0x)
return -EINVAL;
return gtm_reset_ref_timer16(tmr, freq, usec, free_run);
}
It could be made faster using cntlzw.
-Scott
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Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Wednesday 16 April 2008 20:39, Anton Vorontsov wrote:
On Tue, Mar 18, 2008 at 03:48:12PM -0500, Scott Wood wrote:
[...]
How about:
struct gtm_timer *gtm_get_specific_timer(struct gtm *gtm, int timer,
int width);
...with np-data used by the caller to figure out which gtm pointer to
pass in.
Thanks for the comments, I've tried to address them all.
Updated patch below (not for applying, still waiting for further
comments, if any).
- - - -
From: Anton Vorontsov [EMAIL PROTECTED]
Subject: [POWERPC] sysdev,qe_lib: implement FSL GTM support
GTM stands for General-purpose Timers Module and able to generate
timer{1,2,3,4} interrupts.
There are several limitations in this support:
1. Cascaded (32 bit) timers unimplemented (1-2, 3-4).
This is straightforward to implement when needed, two timers should
be marked as requested and configured as appropriate.
2. Super-cascaded (64 bit) timers unimplemented (1-2-3-4).
This is also straightforward to implement when needed, all timers
should be marked as requested and configured as appropriate.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
Documentation/powerpc/booting-without-of.txt | 32 +++-
arch/powerpc/Kconfig |5 +
arch/powerpc/sysdev/Makefile |1 +
arch/powerpc/sysdev/fsl_gtm.c| 322
++
include/asm-powerpc/fsl_gtm.h| 106 +
5 files changed, 465 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/sysdev/fsl_gtm.c
create mode 100644 include/asm-powerpc/fsl_gtm.h
[snip]
+/*
+ * This is back-end for the exported functions, it's used to reset single
+ * timer in reference mode.
+ */
+static int gtm_reset_ref_timer16(struct gtm_timer *tmr, int frequency,
+ int reference_value, bool free_run)
+{
+ struct gtm *gtm = tmr-gtm;
+ int num = tmr - gtm-timers[0];
+ unsigned int prescaler;
+ u8 iclk = GTMDR_ICLK_ICLK;
+ u8 psr;
+ u8 sps;
+ unsigned long flags;
+
+ prescaler = gtm-clock / frequency;
+ /*
+ * We have two 8 bit prescalers -- primary and secondary (psr, sps),
+ * plus slow go mode (clk / 16). So, total prescale value is
+ * 16 * (psr + 1) * (sps + 1).
+ */
+ if (prescaler 256 * 256 * 16)
+ return -EINVAL;
+
+ if (prescaler 256 * 256) {
+ iclk = GTMDR_ICLK_SLGO;
+ prescaler /= 16;
+ }
+
+ if (prescaler 256) {
+ psr = 256 - 1;
+ sps = prescaler / 256 - 1;
+ } else {
+ psr = prescaler - 1;
+ sps = 1 - 1;
+ }
Don't forget that the CPM2 doesn't support the primary prescaler.
+ spin_lock_irqsave(gtm-lock, flags);
+
+ /*
+ * Properly reset timers: stop, reset, set up prescalers, reference
+ * value and clear event register.
+ */
+ clrsetbits_8(tmr-gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)),
+ GTCFR_STP(num) | GTCFR_RST(num));
+
+ setbits8(tmr-gtcfr, GTCFR_STP(num));
+
+ out_be16(tmr-gtpsr, psr);
+ clrsetbits_be16(tmr-gtmdr, 0x, iclk | GTMDR_SPS(sps) |
+ GTMDR_ORI | (free_run ? GTMDR_FFR : 0));
+ out_be16(tmr-gtcnr, 0);
+ out_be16(tmr-gtrfr, reference_value);
+ out_be16(tmr-gtevr, 0x);
+
+ /* Let it be. */
+ clrbits8(tmr-gtcfr, GTCFR_STP(num));
+
+ spin_unlock_irqrestore(gtm-lock, flags);
+
+ return 0;
+}
--
Laurent Pinchart
CSE Semaphore Belgium
Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
F +32 (2) 387 42 75
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Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Thu, Apr 17, 2008 at 09:19:03AM -0500, Scott Wood wrote:
On Thu, Apr 17, 2008 at 04:52:35PM +0400, Anton Vorontsov wrote:
Heh. Scott, think about it. You have single 16bit timer with variable
frequency. To use it, you'd better know what exactly precision you need.
Why? I know the timeout I need.
Then you limited to u16 for the interval for this chosen precision.
Yes, you can implement this:
#define MAX_PRESCALER (256 * 256 * 16)
int gtm_reset_weird_behaving_utimer16(struct gtm_timer *tmr,
unsigned long long usec,
bool free_run)
{
int freq = 100;
int min_hz2 = (tmr-gtm-freq / MAX_PRESCALER) 1;
while (!(freq 1) !(usec 1) freq = min_hz2) {
freq = 1;
usec = 1;
}
if (usec 0x)
return -EINVAL;
return gtm_reset_ref_timer16(tmr, freq, (u16)usec, free_run);
}
Try something like this:
int gtm_reset_sane_behaving_timer(struct gtm_timer *tmr,
u64 usec, bool free_run)
{
int freq = 100;
int min_hz2 = (tmr-gtm-freq / MAX_PRESCALER) 1;
while (usec 0x freq = min_hz2) {
This isn't a timer with usec precision! This is a timer that silently
crops precision as it wants to. Ahh, I see you dropped u prefix.
Well. I'm not going to use it anyway, so just give it some name you
prefer and I'll wrap it into the patch. Preferably, drop a line here with
kerneldoc for it, so I'll not have to document its drawbacks. :-)
freq = 1;
usec = 1;
}
if (usec 0x)
return -EINVAL;
return gtm_reset_ref_timer16(tmr, freq, usec, free_run);
}
It could be made faster using cntlzw.
No need to cntlzw, there is fls() already. Though, here you'll need
two because of u64.
Btw, I hope you aware that single GTM timer running at 166MHz will give you
6 minutes of sleep, maximum. With cascaded timer you'll get much better
result of 310 days. Is that possible to use cascaded timer as a wakeup
event on 8313? If so, I'd suggest you to implement cascading firstly.
--
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email: [EMAIL PROTECTED]
irc://irc.freenode.net/bd2
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Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Thu, Apr 17, 2008 at 04:23:56PM +0200, Laurent Pinchart wrote:
[...]
+ /*
+* We have two 8 bit prescalers -- primary and secondary (psr, sps),
+* plus slow go mode (clk / 16). So, total prescale value is
+* 16 * (psr + 1) * (sps + 1).
+*/
+ if (prescaler 256 * 256 * 16)
+ return -EINVAL;
+
+ if (prescaler 256 * 256) {
+ iclk = GTMDR_ICLK_SLGO;
+ prescaler /= 16;
+ }
+
+ if (prescaler 256) {
+ psr = 256 - 1;
+ sps = prescaler / 256 - 1;
+ } else {
+ psr = prescaler - 1;
+ sps = 1 - 1;
+ }
Don't forget that the CPM2 doesn't support the primary prescaler.
I didn't know that, how can I possibly forget it? Oh, now I can.
Thanks for the info. :-)
--
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email: [EMAIL PROTECTED]
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Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Thu, Apr 17, 2008 at 04:23:56PM +0200, Laurent Pinchart wrote:
+ /*
+* We have two 8 bit prescalers -- primary and secondary (psr, sps),
+* plus slow go mode (clk / 16). So, total prescale value is
+* 16 * (psr + 1) * (sps + 1).
+*/
+ if (prescaler 256 * 256 * 16)
+ return -EINVAL;
+
+ if (prescaler 256 * 256) {
+ iclk = GTMDR_ICLK_SLGO;
+ prescaler /= 16;
+ }
+
+ if (prescaler 256) {
+ psr = 256 - 1;
+ sps = prescaler / 256 - 1;
+ } else {
+ psr = prescaler - 1;
+ sps = 1 - 1;
+ }
Don't forget that the CPM2 doesn't support the primary prescaler.
Here is incremental diff of how this is solved. I guess this should work.
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index b0ddd54..b89c56d 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2835,7 +2835,7 @@ platforms are moved over to use the flattened-device-tree
model.
Required properties:
- compatible : should be fsl,gtm (fsl,qe-gtm in addition for QE
- GTMs).
+ GTMs or fsl,cpm2-gtm for CPM2 GTMs).
- reg : should contain gtm registers location and length (0x40).
- interrupts : should contain four interrupts.
- interrupt-parent : interrupt source phandle.
diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c
index 6d86983..105c633 100644
--- a/arch/powerpc/sysdev/fsl_gtm.c
+++ b/arch/powerpc/sysdev/fsl_gtm.c
@@ -125,27 +125,32 @@ static int gtm_reset_ref_timer16(struct gtm_timer *tmr,
int frequency,
u8 psr;
u8 sps;
unsigned long flags;
+ int max_prescaler = 256 * 256 * 16;
+
+ /* CPM2 doesn't have primary prescaler */
+ if (!tmr-gtpsr)
+ max_prescaler /= 256;
prescaler = gtm-clock / frequency;
/*
* We have two 8 bit prescalers -- primary and secondary (psr, sps),
* plus slow go mode (clk / 16). So, total prescale value is
-* 16 * (psr + 1) * (sps + 1).
+* 16 * (psr + 1) * (sps + 1). Though, for CPM2 GTMs we losing psr.
*/
- if (prescaler 256 * 256 * 16)
+ if (prescaler max_prescaler)
return -EINVAL;
- if (prescaler 256 * 256) {
+ if (prescaler max_prescaler / 16) {
iclk = GTMDR_ICLK_SLGO;
prescaler /= 16;
}
- if (prescaler 256) {
+ if (prescaler = 256) {
+ psr = 0;
+ sps = prescaler - 1;
+ } else {
psr = 256 - 1;
sps = prescaler / 256 - 1;
- } else {
- psr = prescaler - 1;
- sps = 1 - 1;
}
spin_lock_irqsave(gtm-lock, flags);
@@ -159,7 +164,8 @@ static int gtm_reset_ref_timer16(struct gtm_timer *tmr, int
frequency,
setbits8(tmr-gtcfr, GTCFR_STP(num));
- out_be16(tmr-gtpsr, psr);
+ if (tmr-gtpsr)
+ out_be16(tmr-gtpsr, psr);
clrsetbits_be16(tmr-gtmdr, 0x, iclk | GTMDR_SPS(sps) |
GTMDR_ORI | (free_run ? GTMDR_FFR : 0));
out_be16(tmr-gtcnr, 0);
@@ -222,7 +228,8 @@ void gtm_stop_timer16(struct gtm_timer *tmr)
}
EXPORT_SYMBOL(gtm_stop_timer16);
-static void __init gtm_set_shortcuts(struct gtm_timer *timers,
+static void __init gtm_set_shortcuts(struct device_node *np,
+struct gtm_timer *timers,
struct gtm_timers_regs __iomem *regs)
{
/*
@@ -233,31 +240,35 @@ static void __init gtm_set_shortcuts(struct gtm_timer
*timers,
*/
timers[0].gtcfr = regs-gtcfr1;
timers[0].gtmdr = regs-gtmdr1;
- timers[0].gtpsr = regs-gtpsr1;
timers[0].gtcnr = regs-gtcnr1;
timers[0].gtrfr = regs-gtrfr1;
timers[0].gtevr = regs-gtevr1;
timers[1].gtcfr = regs-gtcfr1;
timers[1].gtmdr = regs-gtmdr2;
- timers[1].gtpsr = regs-gtpsr2;
timers[1].gtcnr = regs-gtcnr2;
timers[1].gtrfr = regs-gtrfr2;
timers[1].gtevr = regs-gtevr2;
timers[2].gtcfr = regs-gtcfr2;
timers[2].gtmdr = regs-gtmdr3;
- timers[2].gtpsr = regs-gtpsr3;
timers[2].gtcnr = regs-gtcnr3;
timers[2].gtrfr = regs-gtrfr3;
timers[2].gtevr = regs-gtevr3;
timers[3].gtcfr = regs-gtcfr2;
timers[3].gtmdr = regs-gtmdr4;
- timers[3].gtpsr = regs-gtpsr4;
timers[3].gtcnr = regs-gtcnr4;
timers[3].gtrfr = regs-gtrfr4;
timers[3].gtevr = regs-gtevr4;
+
+ /* CPM2 doesn't have primary prescaler */
+ if (!of_device_is_compatible(np, fsl,cpm2-gtm)) {
+ timers[0].gtpsr = regs-gtpsr1;
+ timers[1].gtpsr = regs-gtpsr2;
+ timers[2].gtpsr = regs-gtpsr3;
+
Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Thu, Apr 17, 2008 at 04:39:04AM +1000, Anton Vorontsov wrote: +#define GTMDR_FFR(1 3) This should be GTMDR_FRR according to the chip docs. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Thu, Apr 17, 2008 at 11:14:00AM -0500, Scott Wood wrote:
Anton Vorontsov wrote:
This isn't a timer with usec precision! This is a timer that silently
crops precision as it wants to. Ahh, I see you dropped u prefix.
It is a timer with usec precision, unless you ask for a timeout of more
than 65535 usec -- at which point the hardware can't provide usec
precision.
And s/as it wants to/as it needs to/.
Well. I'm not going to use it anyway, so just give it some name you
prefer and I'll wrap it into the patch. Preferably, drop a line here with
kerneldoc for it, so I'll not have to document its drawbacks. :-)
/**
* gtm_reset_timer16 - reset 16 bit timer with arbitrary precision
* @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
* @usec: timer interval in microseconds
* @reload: if set, the timer will reset upon expiry rather than
* continue running free.
*
* This function (re)sets the GTM timer so that it counts up to the
* requested interval value, and fires the interrupt when the value is
* reached. This function will reduce the precision of the timer as
* needed in order for the requested timeout to fit in a 16-bit
* register.
*/
int gtm_reset_timer16(struct gtm_timer *tmr, unsigned long usec,
bool reload)
{
...
}
Thanks!
It could be made faster using cntlzw.
No need to cntlzw, there is fls() already.
fls() uses cntlzw, does it not? I was just too lazy to look up what
Linux calls it. :-)
Yup, I looked it up. ;-)
Though, here you'll need two because of u64.
We can probably get away with 32 bits.
Btw, I hope you aware that single GTM timer running at 166MHz will give you
6 minutes of sleep, maximum.
Yes, but it's all we have on-chip that can do the job.
With cascaded timer you'll get much better
result of 310 days. Is that possible to use cascaded timer as a wakeup
event on 8313?
No, unfortunately. Only timer4 can be a wakeup source, and when
cascaded, timer4 is the input to timer3, rather than the other way
around.
Ok, very well.
--
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Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Tue, Mar 18, 2008 at 03:48:12PM -0500, Scott Wood wrote:
[...]
How about:
struct gtm_timer *gtm_get_specific_timer(struct gtm *gtm, int timer,
int width);
...with np-data used by the caller to figure out which gtm pointer to
pass in.
Thanks for the comments, I've tried to address them all.
Updated patch below (not for applying, still waiting for further
comments, if any).
- - - -
From: Anton Vorontsov [EMAIL PROTECTED]
Subject: [POWERPC] sysdev,qe_lib: implement FSL GTM support
GTM stands for General-purpose Timers Module and able to generate
timer{1,2,3,4} interrupts.
There are several limitations in this support:
1. Cascaded (32 bit) timers unimplemented (1-2, 3-4).
This is straightforward to implement when needed, two timers should
be marked as requested and configured as appropriate.
2. Super-cascaded (64 bit) timers unimplemented (1-2-3-4).
This is also straightforward to implement when needed, all timers
should be marked as requested and configured as appropriate.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
Documentation/powerpc/booting-without-of.txt | 32 +++-
arch/powerpc/Kconfig |5 +
arch/powerpc/sysdev/Makefile |1 +
arch/powerpc/sysdev/fsl_gtm.c| 322 ++
include/asm-powerpc/fsl_gtm.h| 106 +
5 files changed, 465 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/sysdev/fsl_gtm.c
create mode 100644 include/asm-powerpc/fsl_gtm.h
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index f19fe9f..ee14ecd 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -57,7 +57,8 @@ Table of Contents
n) 4xx/Axon EMAC ethernet nodes
o) Xilinx IP cores
p) Freescale Synchronous Serial Interface
- q) USB EHCI controllers
+ q) USB EHCI controllers
+ r) Freescale General-purpose Timers Module
VII - Specifying interrupt information for devices
1) interrupts property
@@ -2795,6 +2796,35 @@ platforms are moved over to use the
flattened-device-tree model.
big-endian;
};
+r) Freescale General-purpose Timers Module
+
+Required properties:
+ - compatible : should be fsl,gtm (fsl,qe-gtm in addition for QE
+ GTMs).
+ - reg : should contain gtm registers location and length (0x40).
+ - interrupts : should contain four interrupts.
+ - interrupt-parent : interrupt source phandle.
+ - clock-frequency : specifies the frequency driving the timer.
+
+Example:
+
+[EMAIL PROTECTED] {
+ compatible = fsl,gtm;
+ reg = 0x500 0x40;
+ interrupts = 90 8 78 8 84 8 72 8;
+ interrupt-parent = ipic;
+ /* filled by u-boot */
+ clock-frequency = 0;
+};
+
+[EMAIL PROTECTED] {
+ compatible = fsl,qe-gtm, fsl,gtm;
+ reg = 0x440 0x40;
+ interrupts = 12 13 14 15;
+ interrupt-parent = qeic;
+ /* filled by u-boot */
+ clock-frequency = 0;
+};
More devices will be defined as this spec matures.
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 00c5e79..dd30ea4 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -520,6 +520,11 @@ config FSL_LBC
help
Freescale Localbus support
+config FSL_GTM
+ bool
+ help
+ Freescale General-purpose Timers support
+
# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
config MCA
bool
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 42b44a1..3974412 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCI) += fsl_pci.o
obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
+obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE)+= tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c
new file mode 100644
index 000..6d86983
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_gtm.c
@@ -0,0 +1,322 @@
+/*
+ * Freescale General-purpose Timers Module
+ *
+ * Copyright (c) Freescale Semicondutor, Inc. 2006.
+ * Shlomi Gridish [EMAIL PROTECTED]
+ * Jerry Huang [EMAIL PROTECTED]
+ * Copyright (c) MontaVista Software, Inc. 2008.
+ * Anton Vorontsov [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Wed, Apr 16, 2008 at 10:39:04PM +0400, Anton Vorontsov wrote: +/** + * gtm_reset_utimer16 - reset 16 bits timer + * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer + * @usec:timer interval in microseconds + * @free_run:free run flag + * + * This function (re)sets GTM timer so it counts up to the interval value and + * fires the interrupt when the value is reached. If free_run flag was set, + * timer will also reset itself upon reference value, otherwise it continues to + * increment. + */ +int gtm_reset_utimer16(struct gtm_timer *tmr, u16 usec, bool free_run) A maximal timeout of ~65 ms is a little low... For use as a wakeup from sleep mode, I'd like to be able to request timeouts as large as the hardware allows. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Wed, Apr 16, 2008 at 01:44:42PM -0500, Scott Wood wrote: On Wed, Apr 16, 2008 at 10:39:04PM +0400, Anton Vorontsov wrote: +/** + * gtm_reset_utimer16 - reset 16 bits timer + * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer + * @usec: timer interval in microseconds + * @free_run: free run flag + * + * This function (re)sets GTM timer so it counts up to the interval value and + * fires the interrupt when the value is reached. If free_run flag was set, + * timer will also reset itself upon reference value, otherwise it continues to + * increment. + */ +int gtm_reset_utimer16(struct gtm_timer *tmr, u16 usec, bool free_run) A maximal timeout of ~65 ms is a little low... For use as a wakeup from sleep mode, I'd like to be able to request timeouts as large as the hardware allows. That is about precision. You just need to implement gtm_reset_stimer() is you want precision with a seconds, this will run a timer at 1 Hz. -- Anton Vorontsov email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Thu, Apr 17, 2008 at 01:00:42AM +0400, Anton Vorontsov wrote: On Wed, Apr 16, 2008 at 01:44:42PM -0500, Scott Wood wrote: A maximal timeout of ~65 ms is a little low... For use as a wakeup from sleep mode, I'd like to be able to request timeouts as large as the hardware allows. That is about precision. You just need to implement gtm_reset_stimer() is you want precision with a seconds, this will run a timer at 1 Hz. Enh. I'm not crazy about having to call separately named functions, rather than have the timer code set the reference clock to the highest precision that has the needed range. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Tuesday 11 March 2008 18:24, Anton Vorontsov wrote:
GTM stands for General-purpose Timers Module and able to generate
timer{1,2,3,4} interrupts.
There are several limitations in this support:
1. Cascaded (32 bit) timers unimplemented (1-2, 3-4).
This is straightforward to implement when needed, two timers should
be marked as requested and configured as appropriate.
2. Super-cascaded (64 bit) timers unimplemented (1-2-3-4).
This is also straightforward to implement when needed, all timers
should be marked as requested and configured as appropriate.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
[snip]
+void gtm_stop_timer_16(struct gtm_timer *tmr)
+{
+ struct gtm *gtm = tmr-gtm;
+ int num = tmr - gtm-timers[0];
+ unsigned long flags;
+
+ spin_lock_irqsave(gtm-lock, flags);
+
+ setbits8(tmr-gtcfr, GTCFR_STP(num));
Shouldn't we clear the timer events with
out_be16(tmr-gtevr, 0x);
here ? Otherwise the timer interrupt could still fire after the timer is
stopped. This introduces a race condition in drivers that blindly re-arm the
timer in the interrupt handler. I've been bitten by this while porting your
FHCI USB driver to a CPM2 platform.
+
+ spin_unlock_irqrestore(gtm-lock, flags);
+}
+EXPORT_SYMBOL(gtm_stop_timer_16);
--
Laurent Pinchart
CSE Semaphore Belgium
Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
F +32 (2) 387 42 75
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Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Tue, Apr 08, 2008 at 11:01:53AM +0200, Laurent Pinchart wrote:
On Tuesday 11 March 2008 18:24, Anton Vorontsov wrote:
GTM stands for General-purpose Timers Module and able to generate
timer{1,2,3,4} interrupts.
There are several limitations in this support:
1. Cascaded (32 bit) timers unimplemented (1-2, 3-4).
This is straightforward to implement when needed, two timers should
be marked as requested and configured as appropriate.
2. Super-cascaded (64 bit) timers unimplemented (1-2-3-4).
This is also straightforward to implement when needed, all timers
should be marked as requested and configured as appropriate.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
[snip]
+void gtm_stop_timer_16(struct gtm_timer *tmr)
+{
+ struct gtm *gtm = tmr-gtm;
+ int num = tmr - gtm-timers[0];
+ unsigned long flags;
+
+ spin_lock_irqsave(gtm-lock, flags);
+
+ setbits8(tmr-gtcfr, GTCFR_STP(num));
Shouldn't we clear the timer events with
out_be16(tmr-gtevr, 0x);
Yeah.
here ? Otherwise the timer interrupt could still fire after the timer is
stopped. This introduces a race condition in drivers that blindly re-arm the
timer in the interrupt handler. I've been bitten by this while porting your
FHCI USB driver to a CPM2 platform.
Thanks, will fix.
--
Anton Vorontsov
email: [EMAIL PROTECTED]
irc://irc.freenode.net/bd2
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Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Tue, Mar 11, 2008 at 08:24:29PM +0300, Anton Vorontsov wrote:
+Required properties:
+ - compatible : should be fsl,gtm (fsl,qe-gtm in addition for QE
+ GTMs).
+ - reg : should contain gtm registers location and length (0x40).
+ - interrupts : should contain four interrupts.
+ - interrupt-parent : interrupt source phandle.
interrupt-parent isn't required; it's perfectly valid to specify that in the
parent node instead.
+Example:
+
+[EMAIL PROTECTED] {
+ compatible = fsl,gtm;
+ reg = 0x500 0x40;
+ interrupts = 90 8 78 8 84 8 72 8;
+ interrupt-parent = ipic;
+};
+
+[EMAIL PROTECTED] {
+ compatible = fsl,qe-gtm, fsl,gtm;
+ reg = 0x440 0x40;
+ interrupts = 12 13 14 15;
+ interrupt-parent = qeic;
+};
timer would be a better node name than gtm.
+static int __init gtm_init_gtm(void)
Name seems rather redundant... what's wrong with gtm_init()?
+/*
+ * For now we just fixing up the clock -- it's brg-frequency for QE
+ * chips, generic code does not and should not know these details.
+ *
+ * Later we might want to set up BRGs, when QE will actually use
+ * them (there are TIMERCS bits in the CMXGCR register, but today
+ * these bits seem to be no-ops.
+ */
+static int __init qe_init_gtm(void)
+{
+ struct device_node *np;
+
+ for_each_compatible_node(np, NULL, fsl,qe-gtm) {
+ struct gtm *gtm = np-data;
+
+ if (!gtm) {
+ /* fsl,qe-gtm without fsl,gtm compatible? */
+ WARN_ON(1);
+ continue;
+ }
+
+ gtm-clock = qe_get_brg_clk();
+ }
+
+ return 0;
+}
+arch_initcall(qe_init_gtm);
If this happens before the gtm_init_gtm(), then np-data will not be set.
If this happens after gtm_init_gtm(), then gtm_init_gtm() will fail in
gtm_get_clock(), if there's no clock-frequency -- and if there is, then why
do we need qe_init_gtm() at all?
+/**
+ * gtm_get_timer - request GTM timer for use with the rest of GTM API
+ * @width: timer width (only 16 bits wide timers implemented so far)
+ *
+ * This function reserves GTM timer for later use. It returns gtm_timer
+ * structure to use with the rest of GTM API, you should use timer-irq
+ * to manage timer interrupt.
+ */
+extern struct gtm_timer *gtm_get_timer(int width);
To support using the GTM as a wakeup from deep sleep on 831x (which I've had
a patch pending for quite a while now), we'll need some way of reserving a
specific timer (only GTM1, timer 4 is supported).
+/**
+ * gtm_put_timer - release GTM timer
+ * @width: timer width (only 16 bits wide timers implemented so far)
+ *
+ * This function releases GTM timer sp others might request it.
+ */
+extern void gtm_put_timer(struct gtm_timer *tmr);
+
+/**
+ * gtm_reset_ref_timer_16 - (re)set single (16 bits) timer in reference mode
+ * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
+ * @hz: timer rate in Hz
+ * @ref: refernce value
How about period or expiry? And it'd be better to let the caller
request a time in some real unit (e.g. microseconds), and let the gtm driver
figure out how to divide that between prescaler and reference value,
especially in the absence of a way to ask for the allowable hz ranges.
+ * @ffr: free run flag
Could we call it something more intuitive such as freerun?
+ * Thus function (re)sets GTM timer so it counts up to the reference value
and
+ * fires the interrupt when the value is reached. If ffr flag is set, timer
+ * will also reset itself upon reference value, otherwise it continues to
+ * increment.
+ */
+extern int gtm_reset_ref_timer_16(struct gtm_timer *tmr, unsigned int hz,
+ u16 ref, bool ffr);
+
+/**
+ * gtm_ack_ref_timer_16 - acknowledge timer event (free-run timers only)
+ * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
+ *
+ * Thus function used to acknowledge timer interrupt event, use it inside the
+ * interrupt handler.
+ */
+static inline void gtm_ack_ref_timer_16(struct gtm_timer *tmr)
What does the ref mean in these names?
How about gtm_arm_timer16 and gtm_ack_timer16?
+{
+ out_be16(tmr-gtevr, 0x);
+}
You need to include asm/io.h for this.
Don't blindly clear all events, just the events that have been acted upon.
Either take the events as an argument, or make the ack function specific to
REF, and only set that bit.
-Scott
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Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Tue, Mar 18, 2008 at 12:43:29PM -0500, Scott Wood wrote:
On Tue, Mar 11, 2008 at 08:24:29PM +0300, Anton Vorontsov wrote:
+Required properties:
+ - compatible : should be fsl,gtm (fsl,qe-gtm in addition for QE
+ GTMs).
+ - reg : should contain gtm registers location and length (0x40).
+ - interrupts : should contain four interrupts.
+ - interrupt-parent : interrupt source phandle.
interrupt-parent isn't required; it's perfectly valid to specify that in the
parent node instead.
Ok
+Example:
+
+[EMAIL PROTECTED] {
+ compatible = fsl,gtm;
+ reg = 0x500 0x40;
+ interrupts = 90 8 78 8 84 8 72 8;
+ interrupt-parent = ipic;
+};
+
+[EMAIL PROTECTED] {
+ compatible = fsl,qe-gtm, fsl,gtm;
+ reg = 0x440 0x40;
+ interrupts = 12 13 14 15;
+ interrupt-parent = qeic;
+};
timer would be a better node name than gtm.
Ok
+static int __init gtm_init_gtm(void)
Name seems rather redundant... what's wrong with gtm_init()?
Probably :%s/// effect. Will fix.
+/*
+ * For now we just fixing up the clock -- it's brg-frequency for QE
+ * chips, generic code does not and should not know these details.
+ *
+ * Later we might want to set up BRGs, when QE will actually use
+ * them (there are TIMERCS bits in the CMXGCR register, but today
+ * these bits seem to be no-ops.
+ */
+static int __init qe_init_gtm(void)
+{
+ struct device_node *np;
+
+ for_each_compatible_node(np, NULL, fsl,qe-gtm) {
+ struct gtm *gtm = np-data;
+
+ if (!gtm) {
+ /* fsl,qe-gtm without fsl,gtm compatible? */
+ WARN_ON(1);
+ continue;
+ }
+
+ gtm-clock = qe_get_brg_clk();
+ }
+
+ return 0;
+}
+arch_initcall(qe_init_gtm);
If this happens before the gtm_init_gtm(),
If isn't possible, order is guaranteed.
then np-data will not be set.
It's a bug in the device tree or in the Linux code then.
If this happens after gtm_init_gtm(), then gtm_init_gtm() will fail in
gtm_get_clock(), if there's no clock-frequency -- and if there is, then why
do we need qe_init_gtm() at all?
Because for the QE clock-frequency != brg-frequency.
+/**
+ * gtm_get_timer - request GTM timer for use with the rest of GTM API
+ * @width: timer width (only 16 bits wide timers implemented so far)
+ *
+ * This function reserves GTM timer for later use. It returns gtm_timer
+ * structure to use with the rest of GTM API, you should use timer-irq
+ * to manage timer interrupt.
+ */
+extern struct gtm_timer *gtm_get_timer(int width);
To support using the GTM as a wakeup from deep sleep on 831x (which I've had
a patch pending for quite a while now), we'll need some way of reserving a
specific timer (only GTM1, timer 4 is supported).
You can add reserve function either in the PM driver (if any), or
you can do something in the device tree (wakeup-timer = ..). I don't
see any problems if you want to implement it.
+/**
+ * gtm_put_timer - release GTM timer
+ * @width: timer width (only 16 bits wide timers implemented so far)
+ *
+ * This function releases GTM timer sp others might request it.
+ */
+extern void gtm_put_timer(struct gtm_timer *tmr);
+
+/**
+ * gtm_reset_ref_timer_16 - (re)set single (16 bits) timer in reference
mode
+ * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
+ * @hz:timer rate in Hz
+ * @ref: refernce value
How about period or expiry? And it'd be better to let the caller
request a time in some real unit (e.g. microseconds), and let the gtm driver
figure out how to divide that between prescaler and reference value,
especially in the absence of a way to ask for the allowable hz ranges.
Will think about it.
+ * @ffr: free run flag
Could we call it something more intuitive such as freerun?
Easy.
+ * Thus function (re)sets GTM timer so it counts up to the reference value
and
+ * fires the interrupt when the value is reached. If ffr flag is set, timer
+ * will also reset itself upon reference value, otherwise it continues to
+ * increment.
+ */
+extern int gtm_reset_ref_timer_16(struct gtm_timer *tmr, unsigned int hz,
+ u16 ref, bool ffr);
+
+/**
+ * gtm_ack_ref_timer_16 - acknowledge timer event (free-run timers only)
+ * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
+ *
+ * Thus function used to acknowledge timer interrupt event, use it inside
the
+ * interrupt handler.
+ */
+static inline void gtm_ack_ref_timer_16(struct gtm_timer *tmr)
What does the ref mean in these names?
How about gtm_arm_timer16 and gtm_ack_timer16?
Ok.
+{
+ out_be16(tmr-gtevr, 0x);
+}
You need to include asm/io.h for this.
Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
Anton Vorontsov wrote: +arch_initcall(qe_init_gtm); If this happens before the gtm_init_gtm(), If isn't possible, order is guaranteed. You use arch_initcall for both, so you're relying on link order. I think this at least merits a comment. then np-data will not be set. It's a bug in the device tree or in the Linux code then. Hmm? It's set by gtm_init_gtm(). If this code runs before gtm_init_gtm(), what are you expecting to initialize np-data? If this happens after gtm_init_gtm(), then gtm_init_gtm() will fail in gtm_get_clock(), if there's no clock-frequency -- and if there is, then why do we need qe_init_gtm() at all? Because for the QE clock-frequency != brg-frequency. Sorry, I missed that you were getting clock-frequency from the parent, rather than the gtm node. If you do the latter, then you can just stick the relevant frequency in the gtm node and not worry about where it comes from. This would be analogous to how UART clocks are specified. Also, what if some arch_initcall runs between gtm_init_gtm and qe_init_gtm, that registers itself as a client of the gtm driver, and uses the wrong clock value? +extern struct gtm_timer *gtm_get_timer(int width); To support using the GTM as a wakeup from deep sleep on 831x (which I've had a patch pending for quite a while now), we'll need some way of reserving a specific timer (only GTM1, timer 4 is supported). You can add reserve function either in the PM driver (if any), or What I meant was that there needs to be some way of telling this driver not to hand the reserved timer out to some other client. you can do something in the device tree (wakeup-timer = ..). I don't see any problems if you want to implement it. How about simply having optional arguments to gtm_get_timer() to specify the GTM device and timer number, which will fail if it's already in use? Then, the PM driver simply needs to run early enough to grab the timer it needs. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
On Tue, Mar 18, 2008 at 02:55:14PM -0500, Scott Wood wrote: Anton Vorontsov wrote: +arch_initcall(qe_init_gtm); If this happens before the gtm_init_gtm(), If isn't possible, order is guaranteed. You use arch_initcall for both, so you're relying on link order. I think this at least merits a comment. then np-data will not be set. It's a bug in the device tree or in the Linux code then. Hmm? It's set by gtm_init_gtm(). If this code runs before gtm_init_gtm(), what are you expecting to initialize np-data? What code exactly? If this happens after gtm_init_gtm(), then gtm_init_gtm() will fail in gtm_get_clock(), if there's no clock-frequency -- and if there is, then why do we need qe_init_gtm() at all? Because for the QE clock-frequency != brg-frequency. Sorry, I missed that you were getting clock-frequency from the parent, rather than the gtm node. If you do the latter, then you can just stick the relevant frequency in the gtm node and not worry about where it comes from. This would be analogous to how UART clocks are specified. Ok. Also, what if some arch_initcall runs between gtm_init_gtm and qe_init_gtm, that registers itself as a client of the gtm driver, and uses the wrong clock value? Again, what code exactly? If it is a driver (for what this API is created for), it hardly will run earlier than arch/ code. If this is platform code (arch/powerpc/platform/), then it is hardly will run earlier than arch/sysdev/. Inside the arch/sysdev/ fsl_gtm.c is guaranteed to run earlier than qe_lib/gtm.c. So, where is the problem? Since I'll implement clock-frequency inside the timer node, this isn't relevant anymore... +extern struct gtm_timer *gtm_get_timer(int width); To support using the GTM as a wakeup from deep sleep on 831x (which I've had a patch pending for quite a while now), we'll need some way of reserving a specific timer (only GTM1, timer 4 is supported). You can add reserve function either in the PM driver (if any), or What I meant was that there needs to be some way of telling this driver not to hand the reserved timer out to some other client. you can do something in the device tree (wakeup-timer = ..). I don't see any problems if you want to implement it. How about simply having optional arguments to gtm_get_timer() to specify the GTM device and timer number, which will fail if it's already in use? Then, the PM driver simply needs to run early enough to grab the timer it needs. Ah. You need specific timer. No problem. I don't like idea of new arguments to the gtm_get_timer() function (complicates things), but we can just implement another one. gtm_get_timer_name, choice the name please. _specific, _2, _for, __gtm_get_timer, ... -- Anton Vorontsov email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
Anton Vorontsov wrote: On Tue, Mar 18, 2008 at 02:55:14PM -0500, Scott Wood wrote: Anton Vorontsov wrote: +arch_initcall(qe_init_gtm); If this happens before the gtm_init_gtm(), If isn't possible, order is guaranteed. You use arch_initcall for both, so you're relying on link order. I think this at least merits a comment. then np-data will not be set. It's a bug in the device tree or in the Linux code then. Hmm? It's set by gtm_init_gtm(). If this code runs before gtm_init_gtm(), what are you expecting to initialize np-data? What code exactly? Sorry, this code == qe_init_gtm(). Obviously, if you assume that gtm_init_gtm() will always be linked earlier, then it's not an issue. Also, what if some arch_initcall runs between gtm_init_gtm and qe_init_gtm, that registers itself as a client of the gtm driver, and uses the wrong clock value? Again, what code exactly? If it is a driver (for what this API is created for), it hardly will run earlier than arch/ code. If this is platform code (arch/powerpc/platform/), then it is hardly will run earlier than arch/sysdev/. Inside the arch/sysdev/ fsl_gtm.c is guaranteed to run earlier than qe_lib/gtm.c. So, where is the problem? That's a lot of implicit, undocumented dependency on link order... Things can be moved around, and driver-ish code can pop up in surprising places. All I meant was that having the gtm driver present itself as ready when it isn't, in a way which isn't readily apparent if it happens, is worrysome. Since I'll implement clock-frequency inside the timer node, this isn't relevant anymore... OK, good. Ah. You need specific timer. No problem. I don't like idea of new arguments to the gtm_get_timer() function (complicates things), but we can just implement another one. gtm_get_timer_name, choice the name please. _specific, _2, _for, __gtm_get_timer, ... How about: struct gtm_timer *gtm_get_specific_timer(struct gtm *gtm, int timer, int width); ...with np-data used by the caller to figure out which gtm pointer to pass in. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
