Virtual addresses in arch/powerpc/boot/dts/tqm8548*.dts ?
Hi, Looking at some of the PPC DTS files in arch/powerpc/boot/dts, there are some files that are mostly identical, except for some strange differences. For example, tqm8548.dts and tqm8548-bigflash.dts differ mostly in that the former file claims that the SoC registers start at 0xe000[1], but the latter file claims that the SoC registers start at 0xa000[2]. Commit 02b8a3d1eb2ae6353cfbce627ded22e299cf1989 (powerpc/85xx: support for the TQM8548 module using the big Flash) claims that: Some TQM85xx boards could be equipped with up to 1 GiB (NOR) flash memory and therefore a modified memory map is required and setup by the board loader. This patch adds an appropriate DTS file. So are these addresses virtual? My (perhaps incorrect) understanding of the device tree files was that they were intended to describe the physical memory map, rather than the virtual memory map. Or does this PowerPC variant have the ability to dynamically change its own physical address decoding? Or is something else going on? thanks for any clarification, - Paul 1. arch/powerpc/boot/dts/tqm8548.dts line 53, as of Linux v3.1-rc3: http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=arch/powerpc/boot/dts/tqm8548.dts;h=619776f72c904c611e9507d44db4bee1200e6688;hb=HEAD#l53 2. arch/powerpc/boot/dts/tqm8548-bigflash.dts line 53, as of Linux v3.1-rc3: http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=arch/powerpc/boot/dts/tqm8548-bigflash.dts;h=9452c3c05114e523033eebb278d7f78811890a87;hb=HEAD#l53 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Virtual addresses in arch/powerpc/boot/dts/tqm8548*.dts ?
On 2011-08-30 15:43, Paul Walmsley wrote: Hi, Looking at some of the PPC DTS files in arch/powerpc/boot/dts, there are some files that are mostly identical, except for some strange differences. For example, tqm8548.dts and tqm8548-bigflash.dts differ mostly in that the former file claims that the SoC registers start at 0xe000[1], but the latter file claims that the SoC registers start at 0xa000[2]. Commit 02b8a3d1eb2ae6353cfbce627ded22e299cf1989 (powerpc/85xx: support for the TQM8548 module using the big Flash) claims that: Some TQM85xx boards could be equipped with up to 1 GiB (NOR) flash memory and therefore a modified memory map is required and setup by the board loader. This patch adds an appropriate DTS file. So are these addresses virtual? My (perhaps incorrect) understanding of the device tree files was that they were intended to describe the physical memory map, rather than the virtual memory map. Or does this PowerPC variant have the ability to dynamically change its own physical address decoding? Or is something else going on? These addresses correspond to the internal registers which can be moved. The default address is set by hardware at reset time (check out the documentation on the hardware reset word). Obviously one board is strapped for the IMMR at one address, another board at a different address. I almost always configure my boards to use 0xF000 for the IMMR. thanks for any clarification, - Paul 1. arch/powerpc/boot/dts/tqm8548.dts line 53, as of Linux v3.1-rc3: http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=arch/powerpc/boot/dts/tqm8548.dts;h=619776f72c904c611e9507d44db4bee1200e6688;hb=HEAD#l53 2. arch/powerpc/boot/dts/tqm8548-bigflash.dts line 53, as of Linux v3.1-rc3: http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=arch/powerpc/boot/dts/tqm8548-bigflash.dts;h=9452c3c05114e523033eebb278d7f78811890a87;hb=HEAD#l53 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev -- Gary Thomas | Consulting for the MLB Associates |Embedded world ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Virtual addresses in arch/powerpc/boot/dts/tqm8548*.dts ?
On Tue, 30 Aug 2011, Gary Thomas wrote: On 2011-08-30 15:43, Paul Walmsley wrote: So are these addresses virtual? My (perhaps incorrect) understanding of the device tree files was that they were intended to describe the physical memory map, rather than the virtual memory map. Or does this PowerPC variant have the ability to dynamically change its own physical address decoding? Or is something else going on? These addresses correspond to the internal registers which can be moved. The default address is set by hardware at reset time (check out the documentation on the hardware reset word). Obviously one board is strapped for the IMMR at one address, another board at a different address. I almost always configure my boards to use 0xF000 for the IMMR. Got it. Thanks Gary. - Paul ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
