[PATCH 2/4] [PPC32] Add 440SPe support
On Thu, Sep 22, 2005 at 10:44:35PM -0700, Roland Dreier wrote: Eugene Roland, I recently added new field (.dcr_base) to this Eugene structure (as a preparation step for new EMAC driver), Eugene could you do this for 440SPe as well? It's not needed Eugene right now, but as soon as new EMAC driver is in, 440SPe Eugene will stop working. Eugene I think you probably missed this part :) Both fixed and pushed in a new git tree... Can you rebase off of Eugene's tree and resend patches? For the moment the new EMAC driver is the lynchpin in anything new PPC4xx. I want to hold off merging anything that involves current EMAC driver changes until the new driver is in. In any case, nothing like this can go upstream until after 2.6.14 is released. We are expecting the new EMAC driver to be merged at that point. If you have this stuff rebased from his tree we can easily merge them post-EMAC merge. -Matt
[PATCH 2/4] [PPC32] Add 440SPe support
On Thu, Sep 22, 2005 at 08:03:35PM -0700, Roland Dreier wrote: Add support for the AMCC PowerPC 440SPe SoC. Signed-off-by: Roland Dreier rolandd at cisco.com --- arch/ppc/kernel/cputable.c | 10 +++ arch/ppc/platforms/4xx/Kconfig |8 ++ arch/ppc/platforms/4xx/Makefile |1 arch/ppc/platforms/4xx/amcc440spe.c | 134 +++ arch/ppc/platforms/4xx/amcc440spe.h | 64 + Please change these new files to ppc440spe.*. After the new EMAC driver is merged, we are planning a Great Renaming(tm) to make the current filenames be vendor neutral. i.e. ibm4*-ppc4* -Matt
[PATCH 2/4] [PPC32] Add 440SPe support
Matt Can you rebase off of Eugene's tree and resend patches? For Matt the moment the new EMAC driver is the lynchpin in anything Matt new PPC4xx. I want to hold off merging anything that Matt involves current EMAC driver changes until the new driver is Matt in. In any case, nothing like this can go upstream until Matt after 2.6.14 is released. We are expecting the new EMAC Matt driver to be merged at that point. If you have this stuff Matt rebased from his tree we can easily merge them post-EMAC Matt merge. I've already sent patches to Eugene that are in his EMAC tree. So his driver will support 440SPe and can be merged before or after my patches. If it's before then just dump my ibm_emac patch on the floor. - R.
[PATCH 2/4] [PPC32] Add 440SPe support
Matt Please change these new files to ppc440spe.*. After the new Matt EMAC driver is merged, we are planning a Great Renaming(tm) Matt to make the current filenames be vendor neutral. i.e. ibm4*-ppc4* Okey-doke, will do. - R.
[PATCH 2/4] [PPC32] Add 440SPe support
Matt Please change these new files to ppc440spe.*. After the new Matt EMAC driver is merged, we are planning a Great Renaming(tm) Matt to make the current filenames be vendor neutral. i.e. ibm4*-ppc4* OK, I made these changes and rebased to Eugene's EMAC git tree. This tree passes some basic tests on my Yucca board. I just pushed this, so pending mirror delays, it will be at rsync://rsync.kernel.org/pub/scm/linux/kernel/git/roland/ppc440spe.git I can repost the patchset if anyone wants to see it. BTW, Eugene, you might want to do a 'git prune-packed' on your git tree. It's pretty wasteful to clone your tree now, because you have a lot of individual objects that also appear in Linus's packs. - R.
[PATCH 2/4] [PPC32] Add 440SPe support
On Fri, Sep 23, 2005 at 03:44:35PM -0700, Roland Dreier wrote: BTW, Eugene, you might want to do a 'git prune-packed' on your git tree. It's pretty wasteful to clone your tree now, because you have a lot of individual objects that also appear in Linus's packs. Yeah, I did this yesterday, so I guess your next pulls should be OK. You may need to do this on the cloned tree as well. -- Eugene
[PATCH 2/4] [PPC32] Add 440SPe support
On Thu, Sep 22, 2005 at 08:03:35PM -0700, Roland Dreier wrote:
Add support for the AMCC PowerPC 440SPe SoC.
[snip]
+static struct ocp_func_mal_data amc440spe_mal0_def = {
+ .num_tx_chans = 1,/* Number of TX channels */
+ .num_rx_chans = 1,/* Number of RX channels */
+ .txeob_irq = 38, /* TX End Of Buffer IRQ */
+ .rxeob_irq = 39, /* RX End Of Buffer IRQ */
+ .txde_irq = 34, /* TX Descriptor Error IRQ */
+ .rxde_irq = 35, /* RX Descriptor Error IRQ */
+ .serr_irq = 33, /* MAL System Error IRQ*/
+};
+OCP_SYSFS_MAL_DATA()
Roland, I recently added new field (.dcr_base) to this structure (as a
preparation step for new EMAC driver), could you do this for 440SPe as
well? It's not needed right now, but as soon as new EMAC driver is in,
440SPe will stop working.
[snip]
+static void __init ppc4xx_pic_impl_init(void)
+{
+ /* Enable cascade interrupts in UIC0 */
+ /* Enable cascade interrupt in UIC0 */
I think you probably missed this part :)
--
Eugene
[PATCH 2/4] [PPC32] Add 440SPe support
Eugene Roland, I recently added new field (.dcr_base) to this Eugene structure (as a preparation step for new EMAC driver), Eugene could you do this for 440SPe as well? It's not needed Eugene right now, but as soon as new EMAC driver is in, 440SPe Eugene will stop working. Eugene I think you probably missed this part :) Both fixed and pushed in a new git tree... - R.
