Problem in PCI resource allocation with MPC8245
Hi, I have a Freescale MPC8245 machine running Montavista Linux (kernel 2.4.20). There are two devices connected to the PCI bus: a USB host controller (VIA VT6212L) and a single-chip network switch (Broadcom BCM5650). Now BCM5650 is working but VT6212L is not. I tried to modify the PCI code but met some problems. Here are the PCI information and boot message: Bus 0, device 0, devfn 0 (id 1057-0006, headertype 0x00) region 0: mask 0x0008, now at 0x region 0: type mem, size 0 (0MB) region 1: mask 0xf000, now at 0x region 1: type mem, size 4096 (4KB) region 2: mask 0x0008, now at 0x region 2: type mem, size 0 (0MB) Bus 0, device 16, devfn 0 (id 14e4-5650, headertype 0x00) -- BCM5650 region 0: mask 0x0004, now at 0xbfff region 0: type mem, size 65536 (64KB) region 1: mask 0x00ff, now at 0x region 1: type I/O, size 65284 (65284B) Bus 0, device 17, devfn 0 (id 1106-3038, headertype 0x00) -- VT6212L (UHCI 1) region 4: mask 0xffe1, now at 0x00bfffe0 region 4: type I/O, size 32 (32B) Bus 0, device 17, devfn 1 (id 1106-3038, headertype 0x00) -- VT6212L (UHCI 2) region 4: mask 0xffe1, now at 0x00bfffc0 region 4: type I/O, size 32 (32B) Bus 0, device 17, devfn 2 (id 1106-3104, headertype 0x00) -- VT6212L (EHCI) region 0: mask 0xff00, now at 0xbffeff00 region 0: type mem, size 256 (256B) -- PCI: Probing PCI hardware PCI:00:00.0 Resource 0 [-] is unassigned PCI:00:00.0 Resource 1 [-0fff] is unassigned PCI:00:00.0 Resource 2 [-] is unassigned PCI: bridge rsrc 0..bf (100), parent c0179de4 PCI: bridge rsrc 8000..fcff (200), parent c0179e00 PCI:00:10.0: Resource 0: bfff-bfff (f=204) -- BCM5650 PCI:00:11.0: Resource 4: 00bfffe0-00bf (f=101)-- VT6212L (UHCI 1) PCI:00:11.1: Resource 4: 00bfffc0-00bfffdf (f=101) -- VT6212L (UHCI 2) PCI:00:11.2: Resource 0: bffeff00-bffe (f=200) -- VT6212L (EHCI) -- It seems no problem with the allocated resource regions for VT6212L, but I got Timeout message printed by USB driver. So, I modify the function mpc10x_bridge_set_resources in arch/ppc/kernel/mpc10x_common.c: case MPC10X_MEM_MAP_B: pci_init_resource(hose-io_resource, 0x, 0x, /* original value: 0x00bf, */ IORESOURCE_IO, PCI host bridge); -- and the defination of MPC10X_MAPB_PCI_IO_END in include/asm/mpc10x.h: #define MPC10X_MAPB_PCI_IO_END (0x0001 - 1)/* original value: (0x00c0 - 1) */ -- After modification, the USB 1.x driver (UHCI) is working, and EHCI is still not working. BUT I don't know why the UHCI works if I do the above modification? The PCI information after modification is shown below: Bus 0, device 17, function 0: Class 0c03: PCI device 1106:3038 (rev 97). IRQ 1. Master Capable. Latency=128. I/O at 0xffe0 [0x]. -- I/O change to 0xffe0 Bus 0, device 17, function 1: Class 0c03: PCI device 1106:3038 (rev 97). IRQ 1. Master Capable. Latency=128. I/O at 0xffc0 [0xffdf].-- I/O change to 0xffc0 Bus 0, device 17, function 2: Class 0c03: PCI device 1106:3104 (rev 99). IRQ 1. Master Capable. Latency=128. Non-prefetchable 32 bit memory at 0xbffeff00 [0xbffe]. -- I do the modification for the PCI memory configuration similar to the modification for PCI I/O configuration: [arch/ppc/kernel/mpc10x_common.c] case MPC10X_MEM_MAP_B: ... snipped pci_init_resource (hose-mem_resources[0], 0x, /* original value: 0x8000, */ 0x000f, /* original value: 0xfcff, */ IORESOURCE_MEM, PCI host bridge); -- [include/asm/mpc10x.h] #define MPC10X_MAPB_ISA_MEM_BASE0x /* original value: 0x8000 */ ... snipped #define MPC10X_MAPB_PCI_MEM_START 0x /* original value: 0x8000 */ #define MPC10X_MAPB_PCI_MEM_END(0x0010 - 1) /* original value: (0xC000 - 1) */ -- Surprisingly, after this modification, the USB2.0 driver (EHCI) can work. BUT, the BCM5650 driver failed... Here are the PCI information and boot message: Bus 0, device 16, function 0: Class 0280: PCI device 14e4:5650 (rev 17). Master Capable. Latency=128. Non-prefetchable 64 bit memory at 0xf [0xf]. -- BCM5650 PCI memory address change to 0xf Bus 0, device 17, function 0: Class 0c03: PCI device 1106:3038
Problem in PCI resource allocation with MPC8245
Hi, I have a Freescale MPC8245 machine running Montavista Linux (kernel 2.4.20). There are two devices connected to the PCI bus: a USB host controller (VIA VT6212L) and a single-chip network switch (Broadcom BCM5650). Now BCM5650 is working but VT6212L is not. I tried to modify the PCI code but met some problems. Here are the PCI information and boot message: Bus 0, device 0, devfn 0 (id 1057-0006, headertype 0x00) region 0: mask 0x0008, now at 0x region 0: type mem, size 0 (0MB) region 1: mask 0xf000, now at 0x region 1: type mem, size 4096 (4KB) region 2: mask 0x0008, now at 0x region 2: type mem, size 0 (0MB) Bus 0, device 16, devfn 0 (id 14e4-5650, headertype 0x00) -- BCM5650 region 0: mask 0x0004, now at 0xbfff region 0: type mem, size 65536 (64KB) region 1: mask 0x00ff, now at 0x region 1: type I/O, size 65284 (65284B) Bus 0, device 17, devfn 0 (id 1106-3038, headertype 0x00) -- VT6212L (UHCI 1) region 4: mask 0xffe1, now at 0x00bfffe0 region 4: type I/O, size 32 (32B) Bus 0, device 17, devfn 1 (id 1106-3038, headertype 0x00) -- VT6212L (UHCI 2) region 4: mask 0xffe1, now at 0x00bfffc0 region 4: type I/O, size 32 (32B) Bus 0, device 17, devfn 2 (id 1106-3104, headertype 0x00) -- VT6212L (EHCI) region 0: mask 0xff00, now at 0xbffeff00 region 0: type mem, size 256 (256B) -- PCI: Probing PCI hardware PCI:00:00.0 Resource 0 [-] is unassigned PCI:00:00.0 Resource 1 [-0fff] is unassigned PCI:00:00.0 Resource 2 [-] is unassigned PCI: bridge rsrc 0..bf (100), parent c0179de4 PCI: bridge rsrc 8000..fcff (200), parent c0179e00 PCI:00:10.0: Resource 0: bfff-bfff (f=204) -- BCM5650 PCI:00:11.0: Resource 4: 00bfffe0-00bf (f=101)-- VT6212L (UHCI 1) PCI:00:11.1: Resource 4: 00bfffc0-00bfffdf (f=101) -- VT6212L (UHCI 2) PCI:00:11.2: Resource 0: bffeff00-bffe (f=200) -- VT6212L (EHCI) -- It seems no problem with the allocated resource regions for VT6212L, but I got Timeout message printed by USB driver. So, I modify the function mpc10x_bridge_set_resources in arch/ppc/kernel/mpc10x_common.c: case MPC10X_MEM_MAP_B: pci_init_resource(hose-io_resource, 0x, 0x, /* original value: 0x00bf, */ IORESOURCE_IO, PCI host bridge); -- and the defination of MPC10X_MAPB_PCI_IO_END in include/asm/mpc10x.h: #define MPC10X_MAPB_PCI_IO_END (0x0001 - 1)/* original value: (0x00c0 - 1) */ -- After modification, the USB 1.x driver (UHCI) is working, and EHCI is still not working. BUT I don't know why the UHCI works if I do the above modification? The PCI information after modification is shown below: Bus 0, device 17, function 0: Class 0c03: PCI device 1106:3038 (rev 97). IRQ 1. Master Capable. Latency=128. I/O at 0xffe0 [0x]. -- I/O change to 0xffe0 Bus 0, device 17, function 1: Class 0c03: PCI device 1106:3038 (rev 97). IRQ 1. Master Capable. Latency=128. I/O at 0xffc0 [0xffdf].-- I/O change to 0xffc0 Bus 0, device 17, function 2: Class 0c03: PCI device 1106:3104 (rev 99). IRQ 1. Master Capable. Latency=128. Non-prefetchable 32 bit memory at 0xbffeff00 [0xbffe]. -- I do the modification for the PCI memory configuration similar to the modification for PCI I/O configuration: [arch/ppc/kernel/mpc10x_common.c] case MPC10X_MEM_MAP_B: ... snipped pci_init_resource (hose-mem_resources[0], 0x, /* original value: 0x8000, */ 0x000f, /* original value: 0xfcff, */ IORESOURCE_MEM, PCI host bridge); -- [include/asm/mpc10x.h] #define MPC10X_MAPB_ISA_MEM_BASE0x /* original value: 0x8000 */ ... snipped #define MPC10X_MAPB_PCI_MEM_START 0x /* original value: 0x8000 */ #define MPC10X_MAPB_PCI_MEM_END(0x0010 - 1) /* original value: (0xC000 - 1) */ -- Surprisingly, after this modification, the USB2.0 driver (EHCI) can work. BUT, the BCM5650 driver failed... Here are the PCI information and boot message: Bus 0, device 16, function 0: Class 0280: PCI device 14e4:5650 (rev 17). Master Capable. Latency=128. Non-prefetchable 64 bit memory at 0xf [0xf]. -- BCM5650 PCI memory address change to 0xf Bus 0, device 17, function 0: Class 0c03: PCI
