As discussed in this email thread:
https://sourceforge.net/p/linuxptp/mailman/message/37047555/
there is a desire to synchronize multiple DSA switches in a
boundary_clock_jbod setup, using a PPS signal, and the ts2phc program
already offers a solid base.
This patch series extends the ts2phc program to cater for that use case
by introducing a new '-a' option and friends ('--transportSpecific').
This makes it quite similar to phc2sys which has the same ability, just
that ts2phc can give much better performance if the hardware can assist
with that.
The overall board design for my use case is that there's an SoC with an
embedded DSA switch, and hanging off of 3 ports of that embedded switch
are 3 external switches. Every networking device (the DSA master for the
embedded switch, the embedded switch, as well as each individual
external switch) has a PTP clock. The topology for PPS signal
distribution is fixed - that is given by hardware ability - the
/dev/ptp1 clock can emit a valid PPS, and all external switches can
timestamp that PPS (it is connected in a sort-of simplex "bus" design),
and it cannot be any other way around. It looks like this:
+---+
| LS1028A /dev/ptp0 (unused) |
| +--+|
| | DSA master for Felix||
| |(internal ENETC port 2: eno2))||
| ++--+-+ |
| | Felix embedded L2 switch /dev/ptp1 | |
| | PPS source, sync target | |
| | +--+ +--+ +--+ | |
| | |DSA master for| |DSA master for| |DSA master for| | |
| | | SJA1105 1 | | SJA1105 2 | | SJA1105 3 | | |
| | |(Felix port 1)| |(Felix port 2)| |(Felix port 3)| | |
+--+-+--+---+--+---+--+--+--+
/dev/ptp2/dev/ptp3/dev/ptp4
PPS sink, sync reference PPS sink, sync target PPS sink, sync target
+---+ +---+ +---+
| SJA1105 switch 1| | SJA1105 switch 2| | SJA1105 switch 3|
+-+-+-+-+ +-+-+-+-+ +-+-+-+-+
|sw1p0|sw1p1|sw1p2|sw1p3| |sw2p0|sw2p1|sw2p2|sw2p3| |sw3p0|sw3p1|sw3p2|sw3p3|
+-+-+-+-+ +-+-+-+-+ +-+-+-+-+
^
|
GM connected here
In text, it would be described as this:
cat ts2phc.cfg
[global]
first_step_threshold0.2
step_threshold 0.2
ts2phc.pulsewidth 5
ts2phc.perout_phase 0
# Felix
[/dev/ptp1]
ts2phc.master 1
# SJA1105 switch 1
[/dev/ptp2]
ts2phc.channel 0
ts2phc.extts_polarity both
# SJA1105 switch 2
[/dev/ptp3]
ts2phc.channel 0
ts2phc.extts_polarity both
# SJA1105 switch 3
[/dev/ptp4]
ts2phc.channel 0
ts2phc.extts_polarity both
cat gPTP.cfg
[global]
gmCapable 1
priority1 248
priority2 248
logAnnounceInterval 0
logSyncInterval -3
syncReceiptTimeout 3
neighborPropDelayThresh 5
min_neighbor_prop_delay -2000
assume_two_step 1
path_trace_enabled 1
follow_up_info 1
transportSpecific 0x1
ptp_dst_mac 01:80:C2:00:00:0E
network_transport L2
delay_mechanism P2P
step_threshold 0.2
tx_timestamp_timeout20
boundary_clock_jbod 1
[sw1p0]
[sw1p1]
[sw1p2]
[sw1p3]
[sw2p0]
[sw2p1]
[sw2p2]
[sw2p3]
[sw3p0]
[sw3p1]
[sw3p2]
[sw3p3]
At a high level, what I have done is:
- I moved the PMC related code from phc2sys into pmc_common.c, for
ts2phc reuse
- I created an extra abstraction in ts2phc as "struct clock" that would
represent what's synchronizable. The "master" and "slave" concepts
retain their meaning, which is: "master" == the device that emits PPS,
and "slave" == the device that timestamps PPS.
- I added support for telling the PHC master to start emitting periodic
output using just phase information, and not an absolute time. This is
required for the kernel drivers I am working with.
- I added support for configuring the pulse width, not just hoping that
the value specified in ts2phc.cfg is representative of what the
hardware actually uses.
The changes should be
