[Lldb-commits] [PATCH] D139158: [LLDB][LoongArch] Make software single stepping work

2022-12-07 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added inline comments.



Comment at: 
lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.h:58
+   uint32_t reg_num) override;
+  lldb::addr_t ReadPC(bool *success);
+  bool WritePC(lldb::addr_t pc);

lh03061238 wrote:
> DavidSpickett wrote:
> > I think the older targets use this form but for riscv they went with 
> > `llvm::Optional ReadPC();` which I prefer over pointer plus 
> > addr_t.
> > I think the older targets use this form but for riscv they went with 
> > `llvm::Optional ReadPC();` which I prefer over pointer plus 
> > addr_t.
> 
> EmulateInstructionLoongArch is relatively simple Compared with riscv. If use 
> llvm::Optional ReadPC(), There will be more type 
> conversions here. I prefer to keep that definition for now, Considering the 
> complexity of the code at this stage.
> 
> Thank you.
@DavidSpickett Are you OK with the current code?


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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations

2022-11-23 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel updated this revision to Diff 477690.
seehearfeel added a comment.

(1) define *_OFFSET in RegisterInfoPOSIX_loongarch64.cpp
(2) remove the alias u0 for r21, use fp and s9 for r22


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  https://reviews.llvm.org/D138407/new/

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Files:
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
  lldb/source/Plugins/Process/Utility/CMakeLists.txt
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
  lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
  lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
  lldb/source/Utility/LoongArch_DWARF_Registers.h

Index: lldb/source/Utility/LoongArch_DWARF_Registers.h
===
--- /dev/null
+++ lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -0,0 +1,178 @@
+//===-- LoongArch_DWARF_Registers.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+#define LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+
+#include "lldb/lldb-private.h"
+
+namespace loongarch_dwarf {
+
+enum {
+  dwarf_gpr_r0 = 0,
+  dwarf_gpr_r1,
+  dwarf_gpr_r2,
+  dwarf_gpr_r3,
+  dwarf_gpr_r4,
+  dwarf_gpr_r5,
+  dwarf_gpr_r6,
+  dwarf_gpr_r7,
+  dwarf_gpr_r8,
+  dwarf_gpr_r9,
+  dwarf_gpr_r10,
+  dwarf_gpr_r11,
+  dwarf_gpr_r12,
+  dwarf_gpr_r13,
+  dwarf_gpr_r14,
+  dwarf_gpr_r15,
+  dwarf_gpr_r16,
+  dwarf_gpr_r17,
+  dwarf_gpr_r18,
+  dwarf_gpr_r19,
+  dwarf_gpr_r20,
+  dwarf_gpr_r21,
+  dwarf_gpr_r22,
+  dwarf_gpr_r23,
+  dwarf_gpr_r24,
+  dwarf_gpr_r25,
+  dwarf_gpr_r26,
+  dwarf_gpr_r27,
+  dwarf_gpr_r28,
+  dwarf_gpr_r29,
+  dwarf_gpr_r30,
+  dwarf_gpr_r31 = 31,
+
+  dwarf_gpr_orig_a0,
+  dwarf_gpr_pc,
+  dwarf_gpr_badv,
+
+  dwarf_gpr_reserved0 = 35,
+  dwarf_gpr_reserved1,
+  dwarf_gpr_reserved2,
+  dwarf_gpr_reserved3,
+  dwarf_gpr_reserved4,
+  dwarf_gpr_reserved5,
+  dwarf_gpr_reserved6,
+  dwarf_gpr_reserved7,
+  dwarf_gpr_reserved8,
+  dwarf_gpr_reserved9,
+
+  dwarf_fpr_f0 = 45,
+  dwarf_fpr_f1,
+  dwarf_fpr_f2,
+  dwarf_fpr_f3,
+  dwarf_fpr_f4,
+  dwarf_fpr_f5,
+  dwarf_fpr_f6,
+  dwarf_fpr_f7,
+  dwarf_fpr_f8,
+  dwarf_fpr_f9,
+  dwarf_fpr_f10,
+  dwarf_fpr_f11,
+  dwarf_fpr_f12,
+  dwarf_fpr_f13,
+  dwarf_fpr_f14,
+  dwarf_fpr_f15,
+  dwarf_fpr_f16,
+  dwarf_fpr_f17,
+  dwarf_fpr_f18,
+  dwarf_fpr_f19,
+  dwarf_fpr_f20,
+  dwarf_fpr_f21,
+  dwarf_fpr_f22,
+  dwarf_fpr_f23,
+  dwarf_fpr_f24,
+  dwarf_fpr_f25,
+  dwarf_fpr_f26,
+  dwarf_fpr_f27,
+  dwarf_fpr_f28,
+  dwarf_fpr_f29,
+  dwarf_fpr_f30,
+  dwarf_fpr_f31 = 76,
+
+  dwarf_fpr_fcc0,
+  dwarf_fpr_fcc1,
+  dwarf_fpr_fcc2,
+  dwarf_fpr_fcc3,
+  dwarf_fpr_fcc4,
+  dwarf_fpr_fcc5,
+  dwarf_fpr_fcc6,
+  dwarf_fpr_fcc7,
+  dwarf_fpr_fcsr,
+
+  // register name alias
+  dwarf_gpr_zero = dwarf_gpr_r0,
+  dwarf_gpr_ra = dwarf_gpr_r1,
+  dwarf_gpr_tp = dwarf_gpr_r2,
+  dwarf_gpr_sp = dwarf_gpr_r3,
+  dwarf_gpr_a0 = dwarf_gpr_r4,
+  dwarf_gpr_a1 = dwarf_gpr_r5,
+  dwarf_gpr_a2 = dwarf_gpr_r6,
+  dwarf_gpr_a3 = dwarf_gpr_r7,
+  dwarf_gpr_a4 = dwarf_gpr_r8,
+  dwarf_gpr_a5 = dwarf_gpr_r9,
+  dwarf_gpr_a6 = dwarf_gpr_r10,
+  dwarf_gpr_a7 = dwarf_gpr_r11,
+  dwarf_gpr_t0 = dwarf_gpr_r12,
+  dwarf_gpr_t1 = dwarf_gpr_r13,
+  dwarf_gpr_t2 = dwarf_gpr_r14,
+  dwarf_gpr_t3 = dwarf_gpr_r15,
+  dwarf_gpr_t4 = dwarf_gpr_r16,
+  dwarf_gpr_t5 = dwarf_gpr_r17,
+  dwarf_gpr_t6 = dwarf_gpr_r18,
+  dwarf_gpr_t7 = dwarf_gpr_r19,
+  dwarf_gpr_t8 = dwarf_gpr_r20,
+  dwarf_gpr_fp = dwarf_gpr_r22,
+  dwarf_gpr_s9 = dwarf_gpr_r22,
+  dwarf_gpr_s0 = dwarf_gpr_r23,
+  dwarf_gpr_s1 = dwarf_gpr_r24,
+  dwarf_gpr_s2 = dwarf_gpr_r25,
+  dwarf_gpr_s3 = dwarf_gpr_r26,
+  dwarf_gpr_s4 = dwarf_gpr_r27,
+  dwarf_gpr_s5 = dwarf_gpr_r28,
+  dwarf_gpr_s6 = dwarf_gpr_r29,
+  dwarf_gpr_s7 = dwarf_gpr_r30,
+  dwarf_gpr_s8 = dwarf_gpr_r31,
+
+  dwarf_fpr_fa0 = dwarf_fpr_f0,
+  dwarf_fpr_fa1 = dwarf_fpr_f1,
+  dwarf_fpr_fa2 = dwarf_fpr_f2,
+  dwarf_fpr_fa3 = dwarf_fpr_f3,
+  dwarf_fpr_fa4 = dwarf_fpr_f4,
+  dwarf_fpr_fa5 = dwarf_fpr_f5,
+  dwarf_fpr_fa6 = dwarf_fpr_f6,
+  dwarf_fpr_fa7 = dwarf_fpr_f7,
+  dwarf_fpr_ft0 = dwarf_fpr_f8,
+  dwarf_fpr_ft1 = dwarf_fpr_f9,
+  dwarf_fpr_ft2 = dwarf_fpr_f10,
+  dwarf_fpr_ft3 = dwarf_fpr_f11,
+  dwarf_fpr_ft4 = dwarf_fpr_f12,
+  dwarf_fpr_ft5 = dwarf_fpr_f13,
+  dwarf_fpr_ft6 = dwarf_fpr_f14,
+  dwarf_fpr_ft7 =

[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations

2022-11-23 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added inline comments.



Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:21
+#define GPR_OFFSET(idx) ((idx)*8 + 0)
+#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
+#define FCC_OFFSET(idx) ((idx)*1 + 32 * 8 + 
sizeof(RegisterInfoPOSIX_loongarch64::GPR))

SixWeining wrote:
> I'm not sure whether you could use `RegisterInfoPOSIX_loongarch64` in this 
> file directly because I think this file is a `common` file. What do you 
> think? @DavidSpickett
Maybe it is better to define them in RegisterInfoPOSIX_loongarch64.cpp, let me 
modify it, thank you.



Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:98
+DEFINE_GPR64_ALT(r20, t8, LLDB_INVALID_REGNUM),
+DEFINE_GPR64_ALT(r21, u0, LLDB_INVALID_REGNUM),
+DEFINE_GPR64_ALT(r22, fp, LLDB_REGNUM_GENERIC_FP),

xen0n wrote:
> SixWeining wrote:
> > `u0` is a unknown alias. Could we just use `DEFINE_GPR64`?
> FYI the `u0` name is [[ 
> https://www.kernel.org/doc/html/latest/loongarch/introduction.html | a 
> non-standard alias only seen in the Linux kernel ]]. It should be harmless to 
> just support `r21` but not `u0`, much like how we don't support `v0/v1` any 
> more.
> 
> While at it, `s9` in addition to `fp` may be supported too. (Arguably `s9` is 
> a better description of `r22` than `fp`, because FP usage can be disabled 
> while generating code, in which case it's just another ordinary callee-saved 
> register. But it seems some people believe so deeply that this usage is 
> acceptable that the name persisted into the final ABI document...)
OK,  according to Register Convention in LoongArch ELF ABI specification
https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html#_register_convention

let me remove the alias u0 for r21, use fp and s9 for r22, thank you.


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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations

2022-11-23 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel updated this revision to Diff 477650.
seehearfeel added a comment.

(1) Put elf.h before sys/uio.h
(2) Remove unnecessary indent
(3) Remove const cast of data_sp->GetBytes()
(4) Return k_num_register_sets in GetRegisterSetCount()
(5) Add register name alias


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Files:
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
  lldb/source/Plugins/Process/Utility/CMakeLists.txt
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
  lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
  lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
  lldb/source/Utility/LoongArch_DWARF_Registers.h

Index: lldb/source/Utility/LoongArch_DWARF_Registers.h
===
--- /dev/null
+++ lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -0,0 +1,178 @@
+//===-- LoongArch_DWARF_Registers.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+#define LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+
+#include "lldb/lldb-private.h"
+
+namespace loongarch_dwarf {
+
+enum {
+  dwarf_gpr_r0 = 0,
+  dwarf_gpr_r1,
+  dwarf_gpr_r2,
+  dwarf_gpr_r3,
+  dwarf_gpr_r4,
+  dwarf_gpr_r5,
+  dwarf_gpr_r6,
+  dwarf_gpr_r7,
+  dwarf_gpr_r8,
+  dwarf_gpr_r9,
+  dwarf_gpr_r10,
+  dwarf_gpr_r11,
+  dwarf_gpr_r12,
+  dwarf_gpr_r13,
+  dwarf_gpr_r14,
+  dwarf_gpr_r15,
+  dwarf_gpr_r16,
+  dwarf_gpr_r17,
+  dwarf_gpr_r18,
+  dwarf_gpr_r19,
+  dwarf_gpr_r20,
+  dwarf_gpr_r21,
+  dwarf_gpr_r22,
+  dwarf_gpr_r23,
+  dwarf_gpr_r24,
+  dwarf_gpr_r25,
+  dwarf_gpr_r26,
+  dwarf_gpr_r27,
+  dwarf_gpr_r28,
+  dwarf_gpr_r29,
+  dwarf_gpr_r30,
+  dwarf_gpr_r31 = 31,
+
+  dwarf_gpr_orig_a0,
+  dwarf_gpr_pc,
+  dwarf_gpr_badv,
+
+  dwarf_gpr_reserved0 = 35,
+  dwarf_gpr_reserved1,
+  dwarf_gpr_reserved2,
+  dwarf_gpr_reserved3,
+  dwarf_gpr_reserved4,
+  dwarf_gpr_reserved5,
+  dwarf_gpr_reserved6,
+  dwarf_gpr_reserved7,
+  dwarf_gpr_reserved8,
+  dwarf_gpr_reserved9,
+
+  dwarf_fpr_f0 = 45,
+  dwarf_fpr_f1,
+  dwarf_fpr_f2,
+  dwarf_fpr_f3,
+  dwarf_fpr_f4,
+  dwarf_fpr_f5,
+  dwarf_fpr_f6,
+  dwarf_fpr_f7,
+  dwarf_fpr_f8,
+  dwarf_fpr_f9,
+  dwarf_fpr_f10,
+  dwarf_fpr_f11,
+  dwarf_fpr_f12,
+  dwarf_fpr_f13,
+  dwarf_fpr_f14,
+  dwarf_fpr_f15,
+  dwarf_fpr_f16,
+  dwarf_fpr_f17,
+  dwarf_fpr_f18,
+  dwarf_fpr_f19,
+  dwarf_fpr_f20,
+  dwarf_fpr_f21,
+  dwarf_fpr_f22,
+  dwarf_fpr_f23,
+  dwarf_fpr_f24,
+  dwarf_fpr_f25,
+  dwarf_fpr_f26,
+  dwarf_fpr_f27,
+  dwarf_fpr_f28,
+  dwarf_fpr_f29,
+  dwarf_fpr_f30,
+  dwarf_fpr_f31 = 76,
+
+  dwarf_fpr_fcc0,
+  dwarf_fpr_fcc1,
+  dwarf_fpr_fcc2,
+  dwarf_fpr_fcc3,
+  dwarf_fpr_fcc4,
+  dwarf_fpr_fcc5,
+  dwarf_fpr_fcc6,
+  dwarf_fpr_fcc7,
+  dwarf_fpr_fcsr,
+
+  // register name alias
+  dwarf_gpr_zero = dwarf_gpr_r0,
+  dwarf_gpr_ra = dwarf_gpr_r1,
+  dwarf_gpr_tp = dwarf_gpr_r2,
+  dwarf_gpr_sp = dwarf_gpr_r3,
+  dwarf_gpr_a0 = dwarf_gpr_r4,
+  dwarf_gpr_a1 = dwarf_gpr_r5,
+  dwarf_gpr_a2 = dwarf_gpr_r6,
+  dwarf_gpr_a3 = dwarf_gpr_r7,
+  dwarf_gpr_a4 = dwarf_gpr_r8,
+  dwarf_gpr_a5 = dwarf_gpr_r9,
+  dwarf_gpr_a6 = dwarf_gpr_r10,
+  dwarf_gpr_a7 = dwarf_gpr_r11,
+  dwarf_gpr_t0 = dwarf_gpr_r12,
+  dwarf_gpr_t1 = dwarf_gpr_r13,
+  dwarf_gpr_t2 = dwarf_gpr_r14,
+  dwarf_gpr_t3 = dwarf_gpr_r15,
+  dwarf_gpr_t4 = dwarf_gpr_r16,
+  dwarf_gpr_t5 = dwarf_gpr_r17,
+  dwarf_gpr_t6 = dwarf_gpr_r18,
+  dwarf_gpr_t7 = dwarf_gpr_r19,
+  dwarf_gpr_t8 = dwarf_gpr_r20,
+  dwarf_gpr_u0 = dwarf_gpr_r21,
+  dwarf_gpr_fp = dwarf_gpr_r22,
+  dwarf_gpr_s0 = dwarf_gpr_r23,
+  dwarf_gpr_s1 = dwarf_gpr_r24,
+  dwarf_gpr_s2 = dwarf_gpr_r25,
+  dwarf_gpr_s3 = dwarf_gpr_r26,
+  dwarf_gpr_s4 = dwarf_gpr_r27,
+  dwarf_gpr_s5 = dwarf_gpr_r28,
+  dwarf_gpr_s6 = dwarf_gpr_r29,
+  dwarf_gpr_s7 = dwarf_gpr_r30,
+  dwarf_gpr_s8 = dwarf_gpr_r31,
+
+  dwarf_fpr_fa0 = dwarf_fpr_f0,
+  dwarf_fpr_fa1 = dwarf_fpr_f1,
+  dwarf_fpr_fa2 = dwarf_fpr_f2,
+  dwarf_fpr_fa3 = dwarf_fpr_f3,
+  dwarf_fpr_fa4 = dwarf_fpr_f4,
+  dwarf_fpr_fa5 = dwarf_fpr_f5,
+  dwarf_fpr_fa6 = dwarf_fpr_f6,
+  dwarf_fpr_fa7 = dwarf_fpr_f7,
+  dwarf_fpr_ft0 = dwarf_fpr_f8,
+  dwarf_fpr_ft1 = dwarf_fpr_f9,
+  dwarf_fpr_ft2 = dwarf_fpr_f10,
+  dwarf_fpr_ft3 = dwarf_fpr_f11,
+  dwarf_fpr_ft4 = dwarf_fpr_f12,
+

[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations

2022-11-23 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added inline comments.



Comment at: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221
+
+  uint8_t *src = const_cast(data_sp->GetBytes());
+  if (src == nullptr) {

DavidSpickett wrote:
> seehearfeel wrote:
> > DavidSpickett wrote:
> > > Possibly not needed const cast.
> > If no const cast, build failed:
> > 
> > ```
> > /home/loongson/llvm.git/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221:12:
> >  error: cannot initialize a variable of type 'uint8_t *' (aka 'unsigned 
> > char *') with an rvalue of type 'const uint8_t *' (aka 'const unsigned char 
> > *')
> >   uint8_t *src = data_sp->GetBytes();
> >^ ~~~
> > 1 error generated.
> > ```
> Yes, for the way you've written it that makes sense. But I realise I was 
> looking at the wrong thing here. It's fine that the GetBytes() is const 
> because this is a WriteRegister call, that's expected.
> 
> You should be fine using `const uint8_t*` here, because you can still 
> increment that pointer and memcpy from it. Since the pointer itself can 
> change but the data it points to is const.
> 
> https://godbolt.org/z/9M9oqr575 might explain it better.
The correct  code are:

In ReadAllRegisterValues()

```
uint8_t *dst = data_sp->GetBytes();
```

In WriteAllRegisterValues()

```
const uint8_t *src = data_sp->GetBytes();
```

Thank you.


Repository:
  rG LLVM Github Monorepo

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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations

2022-11-23 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added inline comments.



Comment at: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:27
+// NT_PRSTATUS and NT_FPREGSET definition
+#include 
+

SixWeining wrote:
> [[ https://llvm.org/docs/CodingStandards.html#include-style | Should be 
> sorted lexicographically by the full path ]]. So put it before `sys/uio.h`. 
OK, will modify it, thank you.



Comment at: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221
+
+  uint8_t *src = const_cast(data_sp->GetBytes());
+  if (src == nullptr) {

DavidSpickett wrote:
> Possibly not needed const cast.
If no const cast, build failed:

```
/home/loongson/llvm.git/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221:12:
 error: cannot initialize a variable of type 'uint8_t *' (aka 'unsigned char 
*') with an rvalue of type 'const uint8_t *' (aka 'const unsigned char *')
  uint8_t *src = data_sp->GetBytes();
   ^ ~~~
1 error generated.
```



Comment at: 
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:60
+  virtual bool WriteGPR() = 0;
+  virtual bool WriteFPR() = 0;
+};

DavidSpickett wrote:
> This doesn't look right, I'd expect `bool ... () override;` here.
Maybe we should leave it as is, the other archs do the same thing, 
they will be override in the following file which is not implemented now:
lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h/cpp,
otherwise build failed:

```
In file included from 
/home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp:19:
/home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:57:18:
 error: only virtual member functions can be marked 'override'
  bool ReadGPR() override;
 ^~~~
/home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:58:18:
 error: only virtual member functions can be marked 'override'
  bool ReadFPR() override;
 ^~~~
/home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:59:19:
 error: only virtual member functions can be marked 'override'
  bool WriteGPR() override;
  ^~~~
/home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:60:19:
 error: only virtual member functions can be marked 'override'
  bool WriteFPR() override;
  ^~~~
4 errors generated.
```



Comment at: 
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp:138
+size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetCount() const {
+  return k_num_register_sets - 1;
+}

DavidSpickett wrote:
> SixWeining wrote:
> > Why `-  1`?
> I had the same thought. From the few others I looked at, it seems that it's 
> count not the last index. So if you've got N sets it should return N.
You are right, will modify it, thank you.



Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:35
+  {
\
+loongarch_dwarf::dwarf_##reg, loongarch_dwarf::dwarf_##reg, generic_kind,  
\
+LLDB_INVALID_REGNUM, reg##_loongarch   
\

SixWeining wrote:
> unnecessary indent?
Yes, will modify it, thank you.



Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:56
+
+#define DEFINE_FPR64(reg, generic_kind)
\
+  {
\

SixWeining wrote:
> Not allow accessing FPR registers through ABI names?
Will modify it, thank you.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D138407/new/

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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations

2022-11-21 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel created this revision.
seehearfeel added reviewers: SixWeining, wangleiat, xen0n, xry111, MaskRay, 
DavidSpickett.
Herald added a subscriber: StephenFan.
Herald added a project: All.
seehearfeel requested review of this revision.
Herald added a project: LLDB.
Herald added a subscriber: lldb-commits.

Use the same register layout as Linux kernel, implement the
related read and write operations.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138407

Files:
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
  lldb/source/Plugins/Process/Utility/CMakeLists.txt
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
  lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
  lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
  lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
  lldb/source/Utility/LoongArch_DWARF_Registers.h

Index: lldb/source/Utility/LoongArch_DWARF_Registers.h
===
--- /dev/null
+++ lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -0,0 +1,117 @@
+//===-- LoongArch_DWARF_Registers.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+#define LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+
+#include "lldb/lldb-private.h"
+
+namespace loongarch_dwarf {
+
+enum {
+  dwarf_gpr_r0 = 0,
+  dwarf_gpr_r1,
+  dwarf_gpr_r2,
+  dwarf_gpr_r3,
+  dwarf_gpr_r4,
+  dwarf_gpr_r5,
+  dwarf_gpr_r6,
+  dwarf_gpr_r7,
+  dwarf_gpr_r8,
+  dwarf_gpr_r9,
+  dwarf_gpr_r10,
+  dwarf_gpr_r11,
+  dwarf_gpr_r12,
+  dwarf_gpr_r13,
+  dwarf_gpr_r14,
+  dwarf_gpr_r15,
+  dwarf_gpr_r16,
+  dwarf_gpr_r17,
+  dwarf_gpr_r18,
+  dwarf_gpr_r19,
+  dwarf_gpr_r20,
+  dwarf_gpr_r21,
+  dwarf_gpr_r22,
+  dwarf_gpr_r23,
+  dwarf_gpr_r24,
+  dwarf_gpr_r25,
+  dwarf_gpr_r26,
+  dwarf_gpr_r27,
+  dwarf_gpr_r28,
+  dwarf_gpr_r29,
+  dwarf_gpr_r30,
+  dwarf_gpr_r31 = 31,
+
+  dwarf_gpr_orig_a0,
+  dwarf_gpr_pc,
+  dwarf_gpr_badv,
+
+  dwarf_gpr_reserved0 = 35,
+  dwarf_gpr_reserved1,
+  dwarf_gpr_reserved2,
+  dwarf_gpr_reserved3,
+  dwarf_gpr_reserved4,
+  dwarf_gpr_reserved5,
+  dwarf_gpr_reserved6,
+  dwarf_gpr_reserved7,
+  dwarf_gpr_reserved8,
+  dwarf_gpr_reserved9,
+
+  dwarf_fpr_f0 = 45,
+  dwarf_fpr_f1,
+  dwarf_fpr_f2,
+  dwarf_fpr_f3,
+  dwarf_fpr_f4,
+  dwarf_fpr_f5,
+  dwarf_fpr_f6,
+  dwarf_fpr_f7,
+  dwarf_fpr_f8,
+  dwarf_fpr_f9,
+  dwarf_fpr_f10,
+  dwarf_fpr_f11,
+  dwarf_fpr_f12,
+  dwarf_fpr_f13,
+  dwarf_fpr_f14,
+  dwarf_fpr_f15,
+  dwarf_fpr_f16,
+  dwarf_fpr_f17,
+  dwarf_fpr_f18,
+  dwarf_fpr_f19,
+  dwarf_fpr_f20,
+  dwarf_fpr_f21,
+  dwarf_fpr_f22,
+  dwarf_fpr_f23,
+  dwarf_fpr_f24,
+  dwarf_fpr_f25,
+  dwarf_fpr_f26,
+  dwarf_fpr_f27,
+  dwarf_fpr_f28,
+  dwarf_fpr_f29,
+  dwarf_fpr_f30,
+  dwarf_fpr_f31 = 76,
+
+  dwarf_fpr_fcc0,
+  dwarf_fpr_fcc1,
+  dwarf_fpr_fcc2,
+  dwarf_fpr_fcc3,
+  dwarf_fpr_fcc4,
+  dwarf_fpr_fcc5,
+  dwarf_fpr_fcc6,
+  dwarf_fpr_fcc7,
+  dwarf_fpr_fcsr,
+
+  // register name alias
+  dwarf_gpr_ra = dwarf_gpr_r1,
+  dwarf_gpr_sp = dwarf_gpr_r3,
+  dwarf_gpr_fp = dwarf_gpr_r22,
+
+};
+
+} // namespace loongarch_dwarf
+
+#endif // LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
Index: lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
===
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
@@ -0,0 +1,116 @@
+//===-- lldb-loongarch-register-enums.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_LOONGARCH_REGISTER_ENUMS_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_LOONGARCH_REGISTER_ENUMS_H
+
+// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
+
+// Internal codes for all loongarch registers.
+enum {
+  // The same order as user_regs_struct in 
+  // note: these enum values are used as byte_offset
+  gpr_first_loongarch = 0,
+  gpr_r0_loongarch = gpr_first_loongarch,
+  gpr_r1_loongarch,
+  gpr_r2_loongarch,
+  gpr_r3_loongarch,
+  gpr_r4_loongarch,
+  gpr_r5_loongarch,
+

[Lldb-commits] [PATCH] D137519: [LLDB] Add LoongArch software breakpoint trap opcode

2022-11-06 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel updated this revision to Diff 473542.
seehearfeel retitled this revision from "[LLDB] Add LoongArch software 
breakpoint trap opcode" to " [LLDB] Add LoongArch software breakpoint trap 
opcode".
seehearfeel edited the summary of this revision.
seehearfeel added a comment.

Use "break 0x5" in the code comment.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137519/new/

https://reviews.llvm.org/D137519

Files:
  lldb/source/Host/common/NativeProcessProtocol.cpp
  lldb/source/Target/Platform.cpp


Index: lldb/source/Target/Platform.cpp
===
--- lldb/source/Target/Platform.cpp
+++ lldb/source/Target/Platform.cpp
@@ -1939,6 +1939,14 @@
 }
   } break;
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64: {
+static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+ 0x00}; // break 0x5
+trap_opcode = g_loongarch_opcode;
+trap_opcode_size = sizeof(g_loongarch_opcode);
+  } break;
+
   default:
 return 0;
   }
Index: lldb/source/Host/common/NativeProcessProtocol.cpp
===
--- lldb/source/Host/common/NativeProcessProtocol.cpp
+++ lldb/source/Host/common/NativeProcessProtocol.cpp
@@ -507,6 +507,8 @@
   static const uint8_t g_ppcle_opcode[] = {0x08, 0x00, 0xe0, 0x7f}; // trap
   static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
   static const uint8_t g_riscv_opcode_c[] = {0x02, 0x90};   // c.ebreak
+  static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+   0x00}; // break 0x5
 
   switch (GetArchitecture().GetMachine()) {
   case llvm::Triple::aarch64:
@@ -541,6 +543,10 @@
   : llvm::makeArrayRef(g_riscv_opcode);
   }
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
+return llvm::makeArrayRef(g_loongarch_opcode);
+
   default:
 return llvm::createStringError(llvm::inconvertibleErrorCode(),
"CPU type not supported!");
@@ -567,6 +573,8 @@
   case llvm::Triple::ppc64le:
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
 // On these architectures the PC doesn't get updated for breakpoint hits.
 return 0;
 


Index: lldb/source/Target/Platform.cpp
===
--- lldb/source/Target/Platform.cpp
+++ lldb/source/Target/Platform.cpp
@@ -1939,6 +1939,14 @@
 }
   } break;
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64: {
+static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+ 0x00}; // break 0x5
+trap_opcode = g_loongarch_opcode;
+trap_opcode_size = sizeof(g_loongarch_opcode);
+  } break;
+
   default:
 return 0;
   }
Index: lldb/source/Host/common/NativeProcessProtocol.cpp
===
--- lldb/source/Host/common/NativeProcessProtocol.cpp
+++ lldb/source/Host/common/NativeProcessProtocol.cpp
@@ -507,6 +507,8 @@
   static const uint8_t g_ppcle_opcode[] = {0x08, 0x00, 0xe0, 0x7f}; // trap
   static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
   static const uint8_t g_riscv_opcode_c[] = {0x02, 0x90};   // c.ebreak
+  static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+   0x00}; // break 0x5
 
   switch (GetArchitecture().GetMachine()) {
   case llvm::Triple::aarch64:
@@ -541,6 +543,10 @@
   : llvm::makeArrayRef(g_riscv_opcode);
   }
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
+return llvm::makeArrayRef(g_loongarch_opcode);
+
   default:
 return llvm::createStringError(llvm::inconvertibleErrorCode(),
"CPU type not supported!");
@@ -567,6 +573,8 @@
   case llvm::Triple::ppc64le:
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
 // On these architectures the PC doesn't get updated for breakpoint hits.
 return 0;
 
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[Lldb-commits] [PATCH] D137519: [LLDB][LoongArch] Add LoongArch software breakpoint trap code

2022-11-06 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel created this revision.
seehearfeel added reviewers: SixWeining, wangleiat, xen0n, xry111, MaskRay, 
DavidSpickett.
Herald added a subscriber: StephenFan.
Herald added a project: All.
seehearfeel requested review of this revision.
Herald added a project: LLDB.
Herald added a subscriber: lldb-commits.

Take LoongArch "break" instruction as breakpoint trap code, so
our breakpoint works as expected now.

By the way, LoongArch doesn't support hardware single stepping
yet in upstream Linux, ptrace(PTRACE_SINGLESTEP) returns -EIO
now, a software implementation may come in future commit.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D137519

Files:
  lldb/source/Host/common/NativeProcessProtocol.cpp
  lldb/source/Target/Platform.cpp


Index: lldb/source/Target/Platform.cpp
===
--- lldb/source/Target/Platform.cpp
+++ lldb/source/Target/Platform.cpp
@@ -1939,6 +1939,14 @@
 }
   } break;
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64: {
+static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+ 0x00}; // break
+trap_opcode = g_loongarch_opcode;
+trap_opcode_size = sizeof(g_loongarch_opcode);
+  } break;
+
   default:
 return 0;
   }
Index: lldb/source/Host/common/NativeProcessProtocol.cpp
===
--- lldb/source/Host/common/NativeProcessProtocol.cpp
+++ lldb/source/Host/common/NativeProcessProtocol.cpp
@@ -507,6 +507,7 @@
   static const uint8_t g_ppcle_opcode[] = {0x08, 0x00, 0xe0, 0x7f}; // trap
   static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
   static const uint8_t g_riscv_opcode_c[] = {0x02, 0x90};   // c.ebreak
+  static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a, 0x00}; // 
break
 
   switch (GetArchitecture().GetMachine()) {
   case llvm::Triple::aarch64:
@@ -541,6 +542,10 @@
   : llvm::makeArrayRef(g_riscv_opcode);
   }
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
+return llvm::makeArrayRef(g_loongarch_opcode);
+
   default:
 return llvm::createStringError(llvm::inconvertibleErrorCode(),
"CPU type not supported!");
@@ -567,6 +572,8 @@
   case llvm::Triple::ppc64le:
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
 // On these architectures the PC doesn't get updated for breakpoint hits.
 return 0;
 


Index: lldb/source/Target/Platform.cpp
===
--- lldb/source/Target/Platform.cpp
+++ lldb/source/Target/Platform.cpp
@@ -1939,6 +1939,14 @@
 }
   } break;
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64: {
+static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a,
+ 0x00}; // break
+trap_opcode = g_loongarch_opcode;
+trap_opcode_size = sizeof(g_loongarch_opcode);
+  } break;
+
   default:
 return 0;
   }
Index: lldb/source/Host/common/NativeProcessProtocol.cpp
===
--- lldb/source/Host/common/NativeProcessProtocol.cpp
+++ lldb/source/Host/common/NativeProcessProtocol.cpp
@@ -507,6 +507,7 @@
   static const uint8_t g_ppcle_opcode[] = {0x08, 0x00, 0xe0, 0x7f}; // trap
   static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
   static const uint8_t g_riscv_opcode_c[] = {0x02, 0x90};   // c.ebreak
+  static const uint8_t g_loongarch_opcode[] = {0x05, 0x00, 0x2a, 0x00}; // break
 
   switch (GetArchitecture().GetMachine()) {
   case llvm::Triple::aarch64:
@@ -541,6 +542,10 @@
   : llvm::makeArrayRef(g_riscv_opcode);
   }
 
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
+return llvm::makeArrayRef(g_loongarch_opcode);
+
   default:
 return llvm::createStringError(llvm::inconvertibleErrorCode(),
"CPU type not supported!");
@@ -567,6 +572,8 @@
   case llvm::Triple::ppc64le:
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch32:
+  case llvm::Triple::loongarch64:
 // On these architectures the PC doesn't get updated for breakpoint hits.
 return 0;
 
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[Lldb-commits] [PATCH] D137312: [LLDB] [LoongArch] Add loongarch64 case in ComputeHostArchitectureSupport()

2022-11-02 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel created this revision.
seehearfeel added reviewers: SixWeining, wangleiat, xen0n, xry111, MaskRay, 
DavidSpickett.
Herald added a subscriber: StephenFan.
Herald added a project: All.
seehearfeel requested review of this revision.
Herald added a project: LLDB.
Herald added a subscriber: lldb-commits.

This is a simple change, loongarch64 host also supports 32-bit binaries,
so note it.

Without this patch:

  [loongson@linux build]$ ./tools/lldb/unittests/Host/HostTests | tail -6
  [==] 78 tests from 18 test suites ran. (16 ms total)
  [  PASSED  ] 77 tests.
  [  FAILED  ] 1 test, listed below:
  [  FAILED  ] HostTest.GetProcessInfo
  
   1 FAILED TEST

With this patch:

  [loongson@linux build]$ ./tools/lldb/unittests/Host/HostTests | tail -2
  [==] 78 tests from 18 test suites ran. (15 ms total)
  [  PASSED  ] 78 tests.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D137312

Files:
  lldb/source/Host/common/HostInfoBase.cpp


Index: lldb/source/Host/common/HostInfoBase.cpp
===
--- lldb/source/Host/common/HostInfoBase.cpp
+++ lldb/source/Host/common/HostInfoBase.cpp
@@ -340,6 +340,7 @@
   case llvm::Triple::ppc64le:
   case llvm::Triple::x86_64:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch64:
 arch_64.SetTriple(triple);
 arch_32.SetTriple(triple.get32BitArchVariant());
 break;


Index: lldb/source/Host/common/HostInfoBase.cpp
===
--- lldb/source/Host/common/HostInfoBase.cpp
+++ lldb/source/Host/common/HostInfoBase.cpp
@@ -340,6 +340,7 @@
   case llvm::Triple::ppc64le:
   case llvm::Triple::x86_64:
   case llvm::Triple::riscv64:
+  case llvm::Triple::loongarch64:
 arch_64.SetTriple(triple);
 arch_32.SetTriple(triple.get32BitArchVariant());
 break;
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[Lldb-commits] [PATCH] D137057: [LLDB][LoongArch] Add LoongArch ArchSpec and subtype detection

2022-10-31 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel updated this revision to Diff 471973.
seehearfeel added a comment.

(1) Rename LOONGARCHSubType to LoongArchSubType
(2) Define min_opcode_byte_size as 4 for LoongArch


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137057/new/

https://reviews.llvm.org/D137057

Files:
  lldb/include/lldb/Utility/ArchSpec.h
  lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
  lldb/source/Utility/ArchSpec.cpp
  lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml

Index: lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml
===
--- /dev/null
+++ lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml
@@ -0,0 +1,24 @@
+# RUN: yaml2obj --docnum=1 %s > %t32
+# RUN: yaml2obj --docnum=2 %s > %t64
+# RUN: lldb-test object-file %t32 | FileCheck --check-prefix=CHECK-LA32 %s
+# RUN: lldb-test object-file %t64 | FileCheck --check-prefix=CHECK-LA64 %s
+
+# CHECK-LA32: Architecture: loongarch32--
+
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS32
+  Data:ELFDATA2LSB
+  Type:ET_EXEC
+  Machine: EM_LOONGARCH
+...
+
+# CHECK-LA64: Architecture: loongarch64--
+
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS64
+  Data:ELFDATA2LSB
+  Type:ET_EXEC
+  Machine: EM_LOONGARCH
+...
Index: lldb/source/Utility/ArchSpec.cpp
===
--- lldb/source/Utility/ArchSpec.cpp
+++ lldb/source/Utility/ArchSpec.cpp
@@ -220,6 +220,11 @@
 {eByteOrderLittle, 8, 2, 4, llvm::Triple::riscv64, ArchSpec::eCore_riscv64,
  "riscv64"},
 
+{eByteOrderLittle, 4, 4, 4, llvm::Triple::loongarch32,
+ ArchSpec::eCore_loongarch32, "loongarch32"},
+{eByteOrderLittle, 8, 4, 4, llvm::Triple::loongarch64,
+ ArchSpec::eCore_loongarch64, "loongarch64"},
+
 {eByteOrderLittle, 4, 4, 4, llvm::Triple::UnknownArch,
  ArchSpec::eCore_uknownMach32, "unknown-mach-32"},
 {eByteOrderLittle, 8, 4, 4, llvm::Triple::UnknownArch,
@@ -406,6 +411,12 @@
  ArchSpec::eRISCVSubType_riscv32, 0xu, 0xu}, // riscv32
 {ArchSpec::eCore_riscv64, llvm::ELF::EM_RISCV,
  ArchSpec::eRISCVSubType_riscv64, 0xu, 0xu}, // riscv64
+{ArchSpec::eCore_loongarch32, llvm::ELF::EM_LOONGARCH,
+ ArchSpec::eLoongArchSubType_loongarch32, 0xu,
+ 0xu}, // loongarch32
+{ArchSpec::eCore_loongarch64, llvm::ELF::EM_LOONGARCH,
+ ArchSpec::eLoongArchSubType_loongarch64, 0xu,
+ 0xu}, // loongarch64
 };
 
 static const ArchDefinition g_elf_arch_def = {
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -320,6 +320,18 @@
 return ArchSpec::eCore_ppc64_generic;
 }
 
+static uint32_t loongarchVariantFromElfFlags(const elf::ELFHeader ) {
+  uint32_t fileclass = header.e_ident[EI_CLASS];
+  switch (fileclass) {
+  case llvm::ELF::ELFCLASS32:
+return ArchSpec::eLoongArchSubType_loongarch32;
+  case llvm::ELF::ELFCLASS64:
+return ArchSpec::eLoongArchSubType_loongarch64;
+  default:
+return ArchSpec::eLoongArchSubType_unknown;
+  }
+}
+
 static uint32_t subTypeFromElfHeader(const elf::ELFHeader ) {
   if (header.e_machine == llvm::ELF::EM_MIPS)
 return mipsVariantFromElfFlags(header);
@@ -327,6 +339,8 @@
 return ppc64VariantFromElfFlags(header);
   else if (header.e_machine == llvm::ELF::EM_RISCV)
 return riscvVariantFromElfFlags(header);
+  else if (header.e_machine == llvm::ELF::EM_LOONGARCH)
+return loongarchVariantFromElfFlags(header);
 
   return LLDB_INVALID_CPUTYPE;
 }
Index: lldb/include/lldb/Utility/ArchSpec.h
===
--- lldb/include/lldb/Utility/ArchSpec.h
+++ lldb/include/lldb/Utility/ArchSpec.h
@@ -108,6 +108,12 @@
 eRISCVSubType_riscv64,
   };
 
+  enum LoongArchSubType {
+eLoongArchSubType_unknown,
+eLoongArchSubType_loongarch32,
+eLoongArchSubType_loongarch64,
+  };
+
   enum Core {
 eCore_arm_generic,
 eCore_arm_armv4,
@@ -204,6 +210,9 @@
 eCore_riscv32,
 eCore_riscv64,
 
+eCore_loongarch32,
+eCore_loongarch64,
+
 eCore_uknownMach32,
 eCore_uknownMach64,
 
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[Lldb-commits] [PATCH] D137057: [LLDB][LoongArch] Add LoongArch ArchSpec and subtype detection

2022-10-31 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added a comment.

In D137057#3895926 , @DavidSpickett 
wrote:

> Looks good to me.

Thanks for your review.

Let me update the diff to do some small modifications.


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[Lldb-commits] [PATCH] D137057: [LLDB][LoongArch] Add LoongArch ArchSpec and subtype detection

2022-10-31 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added inline comments.



Comment at: lldb/source/Utility/ArchSpec.cpp:223
 
+{eByteOrderLittle, 4, 1, 4, llvm::Triple::loongarch32,
+ ArchSpec::eCore_loongarch32, "loongarch32"},

SixWeining wrote:
> xen0n wrote:
> > `min_opcode_byte_size` should be 4 too, all LoongArch insns are 32 bits 
> > long. Same for `loongarch64`.
> Right. So, the test doesn't cover this change?
OK, thank you.

It is a bit confusing at the first glance.
Maybe "min_opcode_byte_size" should rename to "min_insn_byte_size",
and "max_opcode_byte_size" should rename to "max_insn_byte_size".


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[Lldb-commits] [PATCH] D137057: [LLDB][LoongArch] Add LoongArch ArchSpec and subtype detection

2022-10-31 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel created this revision.
seehearfeel added reviewers: SixWeining, wangleiat, xen0n, xry111, MaskRay, 
DavidSpickett.
Herald added subscribers: StephenFan, emaste.
Herald added a project: All.
seehearfeel requested review of this revision.
Herald added a project: LLDB.
Herald added a subscriber: lldb-commits.

Define LoongArch architecture subtypes, add the LoongArch ArchSpec bits,
and inspect the ELF header to detect the right subtype based on ELF class.

Here is a simple test:

  [loongson@linux ~]$ cat hello.c 
  #include 
  
  int main()
  {
printf("Hello, World!\n");
return 0;
  }
  [loongson@linux ~]$ clang hello.c -g -o hello

Without this patch:

  [loongson@linux ~]$ llvm-project/llvm/build/bin/lldb hello
  (lldb) target create "hello"
  error: '/home/loongson/hello' doesn't contain any 'host' platform 
architectures: unknown

With this patch:

  [loongson@linux ~]$ llvm-project/llvm/build/bin/lldb hello
  (lldb) target create "hello"
  Current executable set to '/home/loongson/hello' (loongarch64).
  (lldb) run
  Process 735167 launched: '/home/loongson/hello' (loongarch64)
  Hello, World!
  Process 735167 exited with status = 0 (0x) 
  (lldb) quit
  [loongson@linux ~]$ llvm-project/llvm/build/bin/llvm-lit 
llvm-project/lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml
  llvm-lit: /home/loongson/llvm-project/llvm/utils/lit/lit/llvm/config.py:456: 
note: using clang: /home/loongson/llvm-project/llvm/build/bin/clang
  -- Testing: 1 tests, 1 workers --
  PASS: lldb-shell :: ObjectFile/ELF/loongarch-arch.yaml (1 of 1)
  
  Testing Time: 0.09s
Passed: 1


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Files:
  lldb/include/lldb/Utility/ArchSpec.h
  lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
  lldb/source/Utility/ArchSpec.cpp
  lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml

Index: lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml
===
--- /dev/null
+++ lldb/test/Shell/ObjectFile/ELF/loongarch-arch.yaml
@@ -0,0 +1,24 @@
+# RUN: yaml2obj --docnum=1 %s > %t32
+# RUN: yaml2obj --docnum=2 %s > %t64
+# RUN: lldb-test object-file %t32 | FileCheck --check-prefix=CHECK-LA32 %s
+# RUN: lldb-test object-file %t64 | FileCheck --check-prefix=CHECK-LA64 %s
+
+# CHECK-LA32: Architecture: loongarch32--
+
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS32
+  Data:ELFDATA2LSB
+  Type:ET_EXEC
+  Machine: EM_LOONGARCH
+...
+
+# CHECK-LA64: Architecture: loongarch64--
+
+--- !ELF
+FileHeader:
+  Class:   ELFCLASS64
+  Data:ELFDATA2LSB
+  Type:ET_EXEC
+  Machine: EM_LOONGARCH
+...
Index: lldb/source/Utility/ArchSpec.cpp
===
--- lldb/source/Utility/ArchSpec.cpp
+++ lldb/source/Utility/ArchSpec.cpp
@@ -220,6 +220,11 @@
 {eByteOrderLittle, 8, 2, 4, llvm::Triple::riscv64, ArchSpec::eCore_riscv64,
  "riscv64"},
 
+{eByteOrderLittle, 4, 1, 4, llvm::Triple::loongarch32,
+ ArchSpec::eCore_loongarch32, "loongarch32"},
+{eByteOrderLittle, 8, 1, 4, llvm::Triple::loongarch64,
+ ArchSpec::eCore_loongarch64, "loongarch64"},
+
 {eByteOrderLittle, 4, 4, 4, llvm::Triple::UnknownArch,
  ArchSpec::eCore_uknownMach32, "unknown-mach-32"},
 {eByteOrderLittle, 8, 4, 4, llvm::Triple::UnknownArch,
@@ -406,6 +411,12 @@
  ArchSpec::eRISCVSubType_riscv32, 0xu, 0xu}, // riscv32
 {ArchSpec::eCore_riscv64, llvm::ELF::EM_RISCV,
  ArchSpec::eRISCVSubType_riscv64, 0xu, 0xu}, // riscv64
+{ArchSpec::eCore_loongarch32, llvm::ELF::EM_LOONGARCH,
+ ArchSpec::eLOONGARCHSubType_loongarch32, 0xu,
+ 0xu}, // loongarch32
+{ArchSpec::eCore_loongarch64, llvm::ELF::EM_LOONGARCH,
+ ArchSpec::eLOONGARCHSubType_loongarch64, 0xu,
+ 0xu}, // loongarch64
 };
 
 static const ArchDefinition g_elf_arch_def = {
Index: lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
===
--- lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+++ lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
@@ -320,6 +320,18 @@
 return ArchSpec::eCore_ppc64_generic;
 }
 
+static uint32_t loongarchVariantFromElfFlags(const elf::ELFHeader ) {
+  uint32_t fileclass = header.e_ident[EI_CLASS];
+  switch (fileclass) {
+  case llvm::ELF::ELFCLASS32:
+return ArchSpec::eLOONGARCHSubType_loongarch32;
+  case llvm::ELF::ELFCLASS64:
+return ArchSpec::eLOONGARCHSubType_loongarch64;
+  default:
+return ArchSpec::eLOONGARCHSubType_unknown;
+  }
+}
+
 static uint32_t subTypeFromElfHeader(const elf::ELFHeader ) {
   if (header.e_machine == llvm::ELF::EM_MIPS)
 return mipsVariantFromElfFlags(header);
@@ -327,6 +339,8 @@
 return ppc64VariantFromElfFlags(header);
   else if (header.e_machine == llvm::ELF::EM_RISCV)

[Lldb-commits] [PATCH] D136362: [LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV

2022-10-30 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added a comment.

I can reproduce this issue on x86_64 used with the latest gcc.

(1) Install Fedora36
https://download.fedoraproject.org/pub/fedora/linux/releases/36/Workstation/x86_64/iso/Fedora-Workstation-Live-x86_64-36-1.5.iso

$ uname -a
Linux fedora 5.17.5-300.fc36.x86_64 #1 SMP PREEMPT Thu Apr 28 15:51:30 UTC 2022 
x86_64 x86_64 x86_64 GNU/Linux

(2) Install some packages
sudo yum -y install llvm clang g++ cmake ninja-build bison flex texinfo

$ gcc --version
gcc (GCC) 12.2.1 20220819 (Red Hat 12.2.1-2)
$ c++ --version
c++ (GCC) 12.2.1 20220819 (Red Hat 12.2.1-2)
$ clang --version
clang version 14.0.5 (Fedora 14.0.5-1.fc36)
$ clang++ --version
clang version 14.0.5 (Fedora 14.0.5-1.fc36)

(3) Build llvm

  git clone https://github.com/llvm/llvm-project.git
  mkdir -p llvm-project/llvm/build
  cd llvm-project/llvm/build
  cmake .. -G "Ninja" -DLLVM_TARGETS_TO_BUILD="X86" \
   -DLLVM_ENABLE_PROJECTS="clang;lldb" \
   -DCMAKE_BUILD_TYPE=Release \
   -DLLVM_BUILD_RUNTIME=OFF
  ninja
  ninja check-lldb

This is OK used with gcc/c++ 12.

(4) Update gcc to the latest version
git clone git://gcc.gnu.org/git/gcc.git
cd gcc
./contrib/download_prerequisites
mkdir -p build
cd build
../configure --prefix=/usr/local/gcc --enable-checking=release 
--enable-languages=c,c++ --disable-multilib
make
sudo make install
export PATH=/usr/local/gcc/bin/:$PATH
export LD_LIBRARY_PATH=/usr/local/gcc/lib64:$LD_LIBRARY_PATH

$ gcc --version
gcc (GCC) 13.0.0 20221029 (experimental)
$ c++ --version
c++ (GCC) 13.0.0 20221029 (experimental)

(5) Do the above (3) again used with gcc/c++ 13

  git clone https://github.com/llvm/llvm-project.git
  mkdir -p llvm-project/llvm/build
  cd llvm-project/llvm/build
  cmake .. -G "Ninja" -DLLVM_TARGETS_TO_BUILD="X86" \
   -DLLVM_ENABLE_PROJECTS="clang;lldb" \
   -DCMAKE_BUILD_TYPE=Release \
   -DLLVM_BUILD_RUNTIME=OFF \
   -DCMAKE_C_COMPILER="/usr/local/gcc/bin/gcc" \
   -DCMAKE_CXX_COMPILER="/usr/local/gcc/bin/c++"
  ninja
  ninja check-lldb

We can see that "ninja check-lldb" failed due to OOM
used with gcc/c++ 13.


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[Lldb-commits] [PATCH] D136362: [LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV

2022-10-28 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added a subscriber: SixWeining.
seehearfeel added a comment.

In D136362#3890970 , @DavidSpickett 
wrote:

> Can you give us:
>
> - the full cmake command you used to configure the project



  git clone https://github.com/llvm/llvm-project.git
  mkdir -p llvm-project/llvm/build
  cd llvm-project/llvm/build
  cmake .. -G "Ninja" -DLLVM_TARGETS_TO_BUILD="BPF" \
   -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD="LoongArch" \
   -DLLVM_ENABLE_PROJECTS="clang;lldb" \
   -DCMAKE_BUILD_TYPE=Release \
   -DLLVM_BUILD_RUNTIME=OFF
  ninja
  ninja check-lldb -j1



> - the gcc/g++ version used

gcc (GCC) 13.0.0 20220919
g++ (GCC) 13.0.0 20220919

> - the distro used

clfs loongarch

> - the architecture (unlikely to matter but I'm assuming Loongson?)

LoongArch

> - the version of clang++ that did work

clang version 14.0.6

> Could be tripping over a bug in g++. If that version is >= the minimum llvm 
> requires we should look for a workaround.
>
> One thing you could try is removing parts of `TestRISCVEmulator.cpp` and 
> seeing what breaks the build. Though this is best done by @Emmmer, if it can 
> be reproduced elsewhere.

This is introduced in the following commit:

  $ git log -p lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp
  commit 05ae747a5353811f93f5814f24d2335e6229d78a
  Author: Emmmer 
  Date:   Thu Oct 20 23:05:37 2022 +0800
  
  [LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV

c++ OOM is related with this vector, if it is empty, building is OK, if it has 
one element at least, build failed.

  std::vector tests = {
   };

@SixWeining can also reproduce it on his local machine.


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[Lldb-commits] [PATCH] D136362: [LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV

2022-10-27 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added a comment.

In D136362#3888328 , @Emmmer wrote:

> In D136362#3887927 , @seehearfeel 
> wrote:
>
>> After commit 05ae747a5353811f93f5814f24d2335e6229d78a 
>>  
>> ("[LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV"),
>> build failed when "ninja check-lldb" on my local machine:
>>
>>   [1/3] Building CXX object 
>> tools/lldb/unittests/Instruction/CMakeFiles/EmulatorTests.dir/RISCV/TestRISCVEmulator.cpp.o
>>   FAILED: 
>> tools/lldb/unittests/Instruction/CMakeFiles/EmulatorTests.dir/RISCV/TestRISCVEmulator.cpp.o
>>  
>>   /usr/bin/c++ -DGTEST_HAS_RTTI=0 -DHAVE_ROUND -D_GNU_SOURCE 
>> -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS 
>> -I/home/loongson/llvm-project/llvm/build/tools/lldb/unittests/Instruction 
>> -I/home/loongson/llvm-project/lldb/unittests/Instruction 
>> -I/home/loongson/llvm-project/lldb/include 
>> -I/home/loongson/llvm-project/llvm/build/tools/lldb/include 
>> -I/home/loongson/llvm-project/llvm/build/include 
>> -I/home/loongson/llvm-project/llvm/include 
>> -I/home/loongson/llvm-project/llvm/../clang/include 
>> -I/home/loongson/llvm-project/llvm/build/tools/lldb/../clang/include 
>> -I/home/loongson/llvm-project/lldb/source 
>> -I/home/loongson/llvm-project/lldb/unittests 
>> -I/home/loongson/llvm-project/llvm/utils/unittest/googletest/include 
>> -I/home/loongson/llvm-project/llvm/utils/unittest/googlemock/include 
>> -isystem /usr/include/libxml2 -fPIC -fno-semantic-interposition 
>> -fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra 
>> -Wno-unused-parameter -Wwrite-strings -Wcast-qual 
>> -Wno-missing-field-initializers -pedantic -Wno-long-long 
>> -Wimplicit-fallthrough -Wno-maybe-uninitialized -Wno-class-memaccess 
>> -Wno-redundant-move -Wno-pessimizing-move -Wno-noexcept-type 
>> -Wdelete-non-virtual-dtor -Wsuggest-override -Wno-comment 
>> -Wno-misleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color 
>> -ffunction-sections -fdata-sections -Wno-deprecated-declarations 
>> -Wno-unknown-pragmas -Wno-strict-aliasing -Wno-stringop-truncation -O3 
>> -DNDEBUG  -include /home/loongson/llvm-project/lldb/unittests/gtest_common.h 
>> -Wno-variadic-macros -fno-exceptions -fno-rtti -Wno-suggest-override 
>> -std=c++17 -MD -MT 
>> tools/lldb/unittests/Instruction/CMakeFiles/EmulatorTests.dir/RISCV/TestRISCVEmulator.cpp.o
>>  -MF 
>> tools/lldb/unittests/Instruction/CMakeFiles/EmulatorTests.dir/RISCV/TestRISCVEmulator.cpp.o.d
>>  -o 
>> tools/lldb/unittests/Instruction/CMakeFiles/EmulatorTests.dir/RISCV/TestRISCVEmulator.cpp.o
>>  -c 
>> /home/loongson/llvm-project/lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp
>>   c++: fatal error: Killed signal terminated program cc1plus
>>   compilation terminated.
>>   ninja: build stopped: subcommand failed.
>>
>> After revert the changes in 
>> lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp, build successful.
>
> I failed to repro this error. :(
>
>> c++: fatal error: Killed signal terminated program cc1plus
>
> With such a vague error message it is hard to find the problematic part and 
> it does not look like a code problem. Would you mind checking your build 
> configuration and trying `ninja check-lldb -j1` for detailed information?

dmesg shows that the compiler is getting killed by the OOM-killer due to using 
to many resources.
Adding 64G swap, it  is still OOM. Ref: 
https://github.com/soedinglab/hh-suite/issues/280
Using clang++ to build TestRISCVEmulator.cpp is OK, so maybe this issue is 
related with gcc.


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[Lldb-commits] [PATCH] D136362: [LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV

2022-10-27 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added a comment.

After commit 05ae747a5353811f93f5814f24d2335e6229d78a 
 
("[LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV"),
build failed when "ninja check-lldb" on my local machine:

  [1/3] Building CXX object 
tools/lldb/unittests/Instruction/CMakeFiles/EmulatorTests.dir/RISCV/TestRISCVEmulator.cpp.o
  FAILED: 
tools/lldb/unittests/Instruction/CMakeFiles/EmulatorTests.dir/RISCV/TestRISCVEmulator.cpp.o
 
  /usr/bin/c++ -DGTEST_HAS_RTTI=0 -DHAVE_ROUND -D_GNU_SOURCE 
-D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS 
-I/home/loongson/llvm-project/llvm/build/tools/lldb/unittests/Instruction 
-I/home/loongson/llvm-project/lldb/unittests/Instruction 
-I/home/loongson/llvm-project/lldb/include 
-I/home/loongson/llvm-project/llvm/build/tools/lldb/include 
-I/home/loongson/llvm-project/llvm/build/include 
-I/home/loongson/llvm-project/llvm/include 
-I/home/loongson/llvm-project/llvm/../clang/include 
-I/home/loongson/llvm-project/llvm/build/tools/lldb/../clang/include 
-I/home/loongson/llvm-project/lldb/source 
-I/home/loongson/llvm-project/lldb/unittests 
-I/home/loongson/llvm-project/llvm/utils/unittest/googletest/include 
-I/home/loongson/llvm-project/llvm/utils/unittest/googlemock/include -isystem 
/usr/include/libxml2 -fPIC -fno-semantic-interposition 
-fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra 
-Wno-unused-parameter -Wwrite-strings -Wcast-qual 
-Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough 
-Wno-maybe-uninitialized -Wno-class-memaccess -Wno-redundant-move 
-Wno-pessimizing-move -Wno-noexcept-type -Wdelete-non-virtual-dtor 
-Wsuggest-override -Wno-comment -Wno-misleading-indentation 
-Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections 
-fdata-sections -Wno-deprecated-declarations -Wno-unknown-pragmas 
-Wno-strict-aliasing -Wno-stringop-truncation -O3 -DNDEBUG  -include 
/home/loongson/llvm-project/lldb/unittests/gtest_common.h -Wno-variadic-macros 
-fno-exceptions -fno-rtti -Wno-suggest-override -std=c++17 -MD -MT 
tools/lldb/unittests/Instruction/CMakeFiles/EmulatorTests.dir/RISCV/TestRISCVEmulator.cpp.o
 -MF 
tools/lldb/unittests/Instruction/CMakeFiles/EmulatorTests.dir/RISCV/TestRISCVEmulator.cpp.o.d
 -o 
tools/lldb/unittests/Instruction/CMakeFiles/EmulatorTests.dir/RISCV/TestRISCVEmulator.cpp.o
 -c 
/home/loongson/llvm-project/lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp
  c++: fatal error: Killed signal terminated program cc1plus
  compilation terminated.
  ninja: build stopped: subcommand failed.

After revert the changes in 
lldb/unittests/Instruction/RISCV/TestRISCVEmulator.cpp, build successful.


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[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Add minimal LoongArch support

2022-10-25 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added a comment.

In D136578#3881955 , @DavidSpickett 
wrote:

> This LGTM from the lldb side.

OK, thank you.

> Feel free to upload a series of patches in future if you want. You don't have 
> to do one at a time, just update the whole stack as needed. Plus it gives the 
> reviewers some context of what the changes are working towards.

I am a newcomer, here are some of my thoughts:
(1) Add the minimal changes to fix the build errors.
(2) Submit other more patches step by step to make
the basic command "run", "breakpoint", "next" ...
can be used to debug, single patch or patch series.
(3) Add more code to make more commands work well.

> Do you have commit access? If not it's fine to wait until you have 
> (https://llvm.org/docs/DeveloperPolicy.html#obtaining-commit-access), or 
> someone else can land on your behalf. Just provide a name and email address 
> you'd like to be on the commit.

I have no commit access now, @SixWeining luwein...@loongson.cn
can land on my behalf, here are my name and email:
Tiezhu Yang
yangtie...@loongson.cn


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[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Add minimal LoongArch support

2022-10-24 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel updated this revision to Diff 470345.
seehearfeel edited the summary of this revision.
seehearfeel set the repository for this revision to rG LLVM Github Monorepo.
seehearfeel added a comment.

Remove GPRegSet and FPRegSet definitions which are not used in this commit.
Use git clang-format to format the patch properly.


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Files:
  lldb/source/Plugins/Process/Linux/CMakeLists.txt
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
  lldb/source/Plugins/Process/Utility/CMakeLists.txt
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h

Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
===
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
@@ -0,0 +1,64 @@
+//===-- RegisterInfoPOSIX_loongarch64.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_LOONGARCH64_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_LOONGARCH64_H
+
+#include "RegisterInfoAndSetInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
+#include 
+
+class RegisterInfoPOSIX_loongarch64
+: public lldb_private::RegisterInfoAndSetInterface {
+public:
+  static const lldb_private::RegisterInfo *
+  GetRegisterInfoPtr(const lldb_private::ArchSpec _arch);
+  static uint32_t
+  GetRegisterInfoCount(const lldb_private::ArchSpec _arch);
+
+public:
+  struct GPR {
+uint64_t gpr[32];
+
+uint64_t orig_a0;
+uint64_t csr_era;
+uint64_t csr_badv;
+uint64_t reserved[10];
+  };
+
+  struct FPR {
+uint64_t fpr[32];
+uint64_t fcc;
+uint32_t fcsr;
+  };
+
+  RegisterInfoPOSIX_loongarch64(const lldb_private::ArchSpec _arch,
+lldb_private::Flags flags);
+
+  size_t GetGPRSize() const override;
+
+  size_t GetFPRSize() const override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
+
+  uint32_t GetRegisterCount() const override;
+
+  const lldb_private::RegisterSet *
+  GetRegisterSet(size_t reg_set) const override;
+
+  size_t GetRegisterSetCount() const override;
+
+  size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override;
+
+private:
+  const lldb_private::RegisterInfo *m_register_info_p;
+  uint32_t m_register_info_count;
+};
+
+#endif
Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
===
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
@@ -0,0 +1,68 @@
+//===-- RegisterInfoPOSIX_loongarch64.cpp ===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===-===//
+
+#include 
+#include 
+#include 
+
+#include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
+
+#include "RegisterInfoPOSIX_loongarch64.h"
+
+const lldb_private::RegisterInfo *
+RegisterInfoPOSIX_loongarch64::GetRegisterInfoPtr(
+const lldb_private::ArchSpec _arch) {
+  switch (target_arch.GetMachine()) {
+  default:
+assert(false && "Unhandled target architecture.");
+return nullptr;
+  }
+}
+
+uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterInfoCount(
+const lldb_private::ArchSpec _arch) {
+  switch (target_arch.GetMachine()) {
+  default:
+assert(false && "Unhandled target architecture.");
+return 0;
+  }
+}
+
+RegisterInfoPOSIX_loongarch64::RegisterInfoPOSIX_loongarch64(
+const lldb_private::ArchSpec _arch, lldb_private::Flags flags)
+: lldb_private::RegisterInfoAndSetInterface(target_arch),
+  m_register_info_p(GetRegisterInfoPtr(target_arch)),
+  m_register_info_count(GetRegisterInfoCount(target_arch)) {}
+
+uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterCount() const { return 0; }
+
+size_t RegisterInfoPOSIX_loongarch64::GetGPRSize() const {
+  return sizeof(struct RegisterInfoPOSIX_loongarch64::GPR);
+}
+
+size_t RegisterInfoPOSIX_loongarch64::GetFPRSize() const {
+  return sizeof(struct RegisterInfoPOSIX_loongarch64::FPR);
+}
+
+const lldb_private::RegisterInfo *

[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Add minimal LoongArch support

2022-10-24 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added inline comments.



Comment at: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h:24
+
+class NativeRegisterContextLinux_loongarch64 : public 
NativeRegisterContextLinux {
+public:

SixWeining wrote:
> Pls limit the columns count to 80 which can be done by `clang-format`. See: 
> https://llvm.org/docs/Contributing.html#how-to-submit-a-patch
OK, will do it and then update.



Comment at: 
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h:9
+
+#if defined(__loongarch__) && __loongarch_grlen == 64
+

SixWeining wrote:
> Seems `#if __loongarch_grlen == 64` is enough? But I'm fine with both.
Let us leave it as it is like riscv does, thank you.


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[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Add minimal LoongArch support

2022-10-24 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel added inline comments.



Comment at: 
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h:26
+public:
+  enum { GPRegSet = 0, FPRegSet };
+

tschuett wrote:
> Firstly, I prefer `ènum class`. Second, it is unused?
Now, GPRegSet and FPRegSet are not used,
I will remove them and update the diff in this commit,
and use
enum class { GPRegSet = 0, FPRegSet };
in the later patch, thank you.


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[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Add minimal LoongArch support

2022-10-24 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel marked an inline comment as done.
seehearfeel added a comment.

In D136578#3878476 , @xen0n wrote:

> Hi, I've edited the summary and patch title for you. It's generally not 
> necessary to add //that// much "politeness" when most of it is obvious from 
> context (e.g. the fact that you're new face here, that there's obviously no 
> LoongArch support in LLDB, and most of the methods being stubs). It didn't 
> help that much of the text was in Chinglish either.
>
> As for the changes, they look reasonable to me, but as I haven't tested it 
> out myself yet (and unable to, due to it being stub-only), I'll not give the 
> approval myself this time. Thanks for your contribution and welcome!

OK, thank you.




Comment at: 
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp:43
+uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterCount() const {
+  return 0;
+}

tschuett wrote:
> Stupid question: why is the register count 0?
It is just a stub function here to build successfully, actually it should 
return k_num_gpr_registers
after the following header file is added in the later patch.

lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h


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[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Fix build errors

2022-10-24 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel updated this revision to Diff 470059.
seehearfeel added a comment.

Use git diff -U99 to generate the patch so that we can get more context 
suggested by Weining.


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Files:
  lldb/source/Plugins/Process/Linux/CMakeLists.txt
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
  lldb/source/Plugins/Process/Utility/CMakeLists.txt
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h

Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
===
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
@@ -0,0 +1,66 @@
+//===-- RegisterInfoPOSIX_loongarch64.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_LOONGARCH64_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_LOONGARCH64_H
+
+#include "RegisterInfoAndSetInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
+#include 
+
+class RegisterInfoPOSIX_loongarch64
+: public lldb_private::RegisterInfoAndSetInterface {
+public:
+  static const lldb_private::RegisterInfo *
+  GetRegisterInfoPtr(const lldb_private::ArchSpec _arch);
+  static uint32_t
+  GetRegisterInfoCount(const lldb_private::ArchSpec _arch);
+
+public:
+  enum { GPRegSet = 0, FPRegSet };
+
+  struct GPR {
+uint64_t gpr[32];
+
+uint64_t orig_a0;
+uint64_t csr_era;
+uint64_t csr_badv;
+uint64_t reserved[10];
+  };
+
+  struct FPR {
+uint64_t fpr[32];
+uint64_t fcc;
+uint32_t fcsr;
+  };
+
+  RegisterInfoPOSIX_loongarch64(const lldb_private::ArchSpec _arch,
+lldb_private::Flags flags);
+
+  size_t GetGPRSize() const override;
+
+  size_t GetFPRSize() const override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
+
+  uint32_t GetRegisterCount() const override;
+
+  const lldb_private::RegisterSet *
+  GetRegisterSet(size_t reg_set) const override;
+
+  size_t GetRegisterSetCount() const override;
+
+  size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override;
+
+private:
+  const lldb_private::RegisterInfo *m_register_info_p;
+  uint32_t m_register_info_count;
+};
+
+#endif
Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
===
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
@@ -0,0 +1,71 @@
+//===-- RegisterInfoPOSIX_loongarch64.cpp ===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===-===//
+
+#include 
+#include 
+#include 
+
+#include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
+
+#include "RegisterInfoPOSIX_loongarch64.h"
+
+const lldb_private::RegisterInfo *RegisterInfoPOSIX_loongarch64::GetRegisterInfoPtr(
+const lldb_private::ArchSpec _arch) {
+  switch (target_arch.GetMachine()) {
+  default:
+assert(false && "Unhandled target architecture.");
+return nullptr;
+  }
+}
+
+uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterInfoCount(
+const lldb_private::ArchSpec _arch) {
+  switch (target_arch.GetMachine()) {
+  default:
+assert(false && "Unhandled target architecture.");
+return 0;
+  }
+}
+
+RegisterInfoPOSIX_loongarch64::RegisterInfoPOSIX_loongarch64(
+const lldb_private::ArchSpec _arch, lldb_private::Flags flags)
+: lldb_private::RegisterInfoAndSetInterface(target_arch),
+  m_register_info_p(GetRegisterInfoPtr(target_arch)),
+  m_register_info_count(GetRegisterInfoCount(target_arch)) {}
+
+uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterCount() const {
+  return 0;
+}
+
+size_t RegisterInfoPOSIX_loongarch64::GetGPRSize() const {
+  return sizeof(struct RegisterInfoPOSIX_loongarch64::GPR);
+}
+
+size_t RegisterInfoPOSIX_loongarch64::GetFPRSize() const {
+  return sizeof(struct RegisterInfoPOSIX_loongarch64::FPR);
+}
+
+const lldb_private::RegisterInfo *
+RegisterInfoPOSIX_loongarch64::GetRegisterInfo() const {
+  return m_register_info_p;
+}
+
+size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetCount() const {
+  return 0;
+}
+

[Lldb-commits] [PATCH] D136578: [LLDB] [LoongArch] Fix build errors

2022-10-24 Thread Tiezhu Yang via Phabricator via lldb-commits 
seehearfeel created this revision.
seehearfeel added reviewers: SixWeining, wangleiat, xen0n, xry111, MaskRay.
Herald added a subscriber: StephenFan.
Herald added a project: All.
seehearfeel requested review of this revision.
Herald added a project: LLDB.
Herald added a subscriber: lldb-commits.

When build LLDB on LoongArch used with the following commands:

git clone https://github.com/llvm/llvm-project.git
mkdir -p llvm-project/llvm/build
cd llvm-project/llvm/build
cmake .. -G "Ninja" -DLLVM_TARGETS_TO_BUILD="BPF" \

  -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD="LoongArch" \
  -DLLVM_ENABLE_PROJECTS="clang;lldb" \
  -DCMAKE_BUILD_TYPE=Release \
  -DLLVM_BUILD_RUNTIME=OFF

ninja

there exist some build errors:

undefined reference to 
`lldb_private::process_linux::NativeRegisterContextLinux::DetermineArchitecture(unsigned
 long)'
undefined reference to 
`lldb_private::process_linux::NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(...)'

Add the minimal changes as simple as possible for LoongArch
to fix the above issues, even there are some empty functions,
then the built binary lldb can be found in the build/bin/
directory.

This is the first step, we will submit other more patches
step by step in the future, these small patches make an
easily understood change that can be verified by reviewers.

Signed-off-by: Tiezhu Yang 


Repository:
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https://reviews.llvm.org/D136578

Files:
  lldb/source/Plugins/Process/Linux/CMakeLists.txt
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
  lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
  lldb/source/Plugins/Process/Utility/CMakeLists.txt
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
  lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h

Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
===
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
@@ -0,0 +1,66 @@
+//===-- RegisterInfoPOSIX_loongarch64.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_LOONGARCH64_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_LOONGARCH64_H
+
+#include "RegisterInfoAndSetInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
+#include 
+
+class RegisterInfoPOSIX_loongarch64
+: public lldb_private::RegisterInfoAndSetInterface {
+public:
+  static const lldb_private::RegisterInfo *
+  GetRegisterInfoPtr(const lldb_private::ArchSpec _arch);
+  static uint32_t
+  GetRegisterInfoCount(const lldb_private::ArchSpec _arch);
+
+public:
+  enum { GPRegSet = 0, FPRegSet };
+
+  struct GPR {
+uint64_t gpr[32];
+
+uint64_t orig_a0;
+uint64_t csr_era;
+uint64_t csr_badv;
+uint64_t reserved[10];
+  };
+
+  struct FPR {
+uint64_t fpr[32];
+uint64_t fcc;
+uint32_t fcsr;
+  };
+
+  RegisterInfoPOSIX_loongarch64(const lldb_private::ArchSpec _arch,
+lldb_private::Flags flags);
+
+  size_t GetGPRSize() const override;
+
+  size_t GetFPRSize() const override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
+
+  uint32_t GetRegisterCount() const override;
+
+  const lldb_private::RegisterSet *
+  GetRegisterSet(size_t reg_set) const override;
+
+  size_t GetRegisterSetCount() const override;
+
+  size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override;
+
+private:
+  const lldb_private::RegisterInfo *m_register_info_p;
+  uint32_t m_register_info_count;
+};
+
+#endif
Index: lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
===
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
@@ -0,0 +1,71 @@
+//===-- RegisterInfoPOSIX_loongarch64.cpp ===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===-===//
+
+#include 
+#include 
+#include 
+
+#include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
+
+#include "RegisterInfoPOSIX_loongarch64.h"
+
+const lldb_private::RegisterInfo *RegisterInfoPOSIX_loongarch64::GetRegisterInfoPtr(
+const lldb_private::ArchSpec _arch) {
+  switch (target_arch.GetMachine()) {
+  default:
+assert(false && "Unhandled target