[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 added a comment. @labath, if there is anything needed by me, please let me know. i'm new to phabricator patch system. :) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132510/new/ https://reviews.llvm.org/D132510 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 requested review of this revision. kasper81 added a comment. @MaskRay could you please take a look? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132510/new/ https://reviews.llvm.org/D132510 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 added a comment. @jasonmolenda, @Emmmer, any other feedback, or good to merge? i will work on `Plugins/Architecture/RISCV`, unless someone else beat me to it. :) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132510/new/ https://reviews.llvm.org/D132510 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 added a comment. @Emmmer, agreed that automated tests for ABI plugins would be a nice thing to have at some point in the future, but it is out of the scope of this initial bring up for RISCV, as tests are missing for all architectures. Also we need `Plugins/Architecture`port for RISCV to get the exotic use cases working. So best way is to make individual short patches with fast iterations rather than stuck on one thing for years. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132510/new/ https://reviews.llvm.org/D132510 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 marked 2 inline comments as done. kasper81 added a comment. Addressed review feedback. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132510/new/ https://reviews.llvm.org/D132510 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 updated this revision to Diff 455982.
kasper81 marked 3 inline comments as done.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D132510/new/
https://reviews.llvm.org/D132510
Files:
lldb/source/Plugins/ABI/CMakeLists.txt
lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
lldb/source/Target/Platform.cpp
Index: lldb/source/Target/Platform.cpp
===
--- lldb/source/Target/Platform.cpp
+++ lldb/source/Target/Platform.cpp
@@ -1928,10 +1928,17 @@
case llvm::Triple::riscv32:
case llvm::Triple::riscv64: {
+static const uint8_t g_riscv_c_opcode[] = {0x02, 0x90}; // c_ebreak
static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
-trap_opcode = g_riscv_opcode;
-trap_opcode_size = sizeof(g_riscv_opcode);
- } break;
+if (arch.GetFlags() & ArchSpec::eRISCV_rvc) {
+ trap_opcode = g_riscv_c_opcode;
+ trap_opcode_size = sizeof(g_riscv_c_opcode);
+} else {
+ trap_opcode = g_riscv_opcode;
+ trap_opcode_size = sizeof(g_riscv_opcode);
+}
+break;
+ }
default:
return 0;
Index: lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
===
--- /dev/null
+++ lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
@@ -0,0 +1,10 @@
+add_lldb_library(lldbPluginABIRISCV PLUGIN
+ ABISysV_riscv.cpp
+
+ LINK_LIBS
+lldbCore
+lldbSymbol
+lldbTarget
+ LINK_COMPONENTS
+Support
+)
Index: lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
===
--- /dev/null
+++ lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
@@ -0,0 +1,117 @@
+//===-- ABISysV_riscv.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_ABI_RISCV_ABISYSV_RISCV_H
+#define LLDB_SOURCE_PLUGINS_ABI_RISCV_ABISYSV_RISCV_H
+
+#include "lldb/Target/ABI.h"
+#include "lldb/lldb-private.h"
+
+class ABISysV_riscv : public lldb_private::MCBasedABI {
+ bool isRV64;
+
+public:
+ ~ABISysV_riscv() override = default;
+
+ size_t GetRedZoneSize() const override { return 0; }
+
+ bool PrepareTrivialCall(lldb_private::Thread , lldb::addr_t sp,
+ lldb::addr_t functionAddress,
+ lldb::addr_t returnAddress,
+ llvm::ArrayRef args) const override {
+// TODO: Implement
+return false;
+ }
+
+ bool GetArgumentValues(lldb_private::Thread ,
+ lldb_private::ValueList ) const override {
+// TODO: Implement
+return false;
+ }
+
+ lldb_private::Status
+ SetReturnValueObject(lldb::StackFrameSP _sp,
+ lldb::ValueObjectSP _value) override {
+// TODO: Implement
+lldb_private::Status error;
+error.SetErrorString("Not yet implemented");
+return error;
+ }
+
+ lldb::ValueObjectSP
+ GetReturnValueObjectImpl(lldb_private::Thread ,
+ lldb_private::CompilerType ) const override {
+// TODO: Implement
+lldb::ValueObjectSP return_valobj;
+return return_valobj;
+ }
+
+ bool
+ CreateFunctionEntryUnwindPlan(lldb_private::UnwindPlan _plan) override;
+
+ bool CreateDefaultUnwindPlan(lldb_private::UnwindPlan _plan) override;
+
+ bool RegisterIsVolatile(const lldb_private::RegisterInfo *reg_info) override;
+
+ bool CallFrameAddressIsValid(lldb::addr_t cfa) override {
+// Assume any address except zero is valid
+if (cfa == 0)
+ return false;
+return true;
+ }
+
+ bool CodeAddressIsValid(lldb::addr_t pc) override {
+// Ensure addresses are smaller than XLEN bits wide. Calls can use the least
+// significant bit to store auxiliary information, so no strict check is
+// done for alignment.
+if (!isRV64)
+ return (pc <= UINT32_MAX);
+return (pc <= UINT64_MAX);
+ }
+
+ lldb::addr_t FixCodeAddress(lldb::addr_t pc) override {
+// Since the least significant bit of a code address can be used to store
+// auxiliary information, that bit must be zeroed in any addresses.
+return pc & ~(lldb::addr_t)1;
+ }
+
+ // Static Functions
+
+ static void Initialize();
+
+ static void Terminate();
+
+ static lldb::ABISP CreateInstance(lldb::ProcessSP process_sp,
+const lldb_private::ArchSpec );
+
+ // PluginInterface protocol
+
+ static llvm::StringRef GetPluginNameStatic() { return "sysv-riscv"; }
+
+ llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); }
+
+protected:
+ bool
[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 updated this revision to Diff 455977.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D132510/new/
https://reviews.llvm.org/D132510
Files:
lldb/source/Plugins/ABI/CMakeLists.txt
lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
lldb/source/Target/Platform.cpp
Index: lldb/source/Target/Platform.cpp
===
--- lldb/source/Target/Platform.cpp
+++ lldb/source/Target/Platform.cpp
@@ -1928,10 +1928,17 @@
case llvm::Triple::riscv32:
case llvm::Triple::riscv64: {
+static const uint8_t g_riscv_c_opcode[] = {0x02, 0x90}; // c_ebreak
static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
-trap_opcode = g_riscv_opcode;
-trap_opcode_size = sizeof(g_riscv_opcode);
- } break;
+if (arch.GetFlags() & ArchSpec::eRISCV_rvc) {
+ trap_opcode = g_riscv_c_opcode;
+ trap_opcode_size = sizeof(g_riscv_c_opcode);
+} else {
+ trap_opcode = g_riscv_opcode;
+ trap_opcode_size = sizeof(g_riscv_opcode);
+}
+break;
+ }
default:
return 0;
Index: lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
===
--- /dev/null
+++ lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
@@ -0,0 +1,10 @@
+add_lldb_library(lldbPluginABIRISCV PLUGIN
+ ABISysV_riscv.cpp
+
+ LINK_LIBS
+lldbCore
+lldbSymbol
+lldbTarget
+ LINK_COMPONENTS
+Support
+)
Index: lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
===
--- /dev/null
+++ lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
@@ -0,0 +1,117 @@
+//===-- ABISysV_riscv.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_ABI_RISCV_ABISYSV_RISCV_H
+#define LLDB_SOURCE_PLUGINS_ABI_RISCV_ABISYSV_RISCV_H
+
+#include "lldb/Target/ABI.h"
+#include "lldb/lldb-private.h"
+
+class ABISysV_riscv : public lldb_private::MCBasedABI {
+ bool isRV64;
+
+public:
+ ~ABISysV_riscv() override = default;
+
+ size_t GetRedZoneSize() const override { return 0; }
+
+ bool PrepareTrivialCall(lldb_private::Thread , lldb::addr_t sp,
+ lldb::addr_t functionAddress,
+ lldb::addr_t returnAddress,
+ llvm::ArrayRef args) const override {
+// TODO: Implement
+return false;
+ }
+
+ bool GetArgumentValues(lldb_private::Thread ,
+ lldb_private::ValueList ) const override {
+// TODO: Implement
+return false;
+ }
+
+ lldb_private::Status
+ SetReturnValueObject(lldb::StackFrameSP _sp,
+ lldb::ValueObjectSP _value) override {
+// TODO: Implement
+lldb_private::Status error;
+error.SetErrorString("Not yet implemented");
+return error;
+ }
+
+ lldb::ValueObjectSP
+ GetReturnValueObjectImpl(lldb_private::Thread ,
+ lldb_private::CompilerType ) const override {
+// TODO: Implement
+lldb::ValueObjectSP return_valobj;
+return return_valobj;
+ }
+
+ bool
+ CreateFunctionEntryUnwindPlan(lldb_private::UnwindPlan _plan) override;
+
+ bool CreateDefaultUnwindPlan(lldb_private::UnwindPlan _plan) override;
+
+ bool RegisterIsVolatile(const lldb_private::RegisterInfo *reg_info) override;
+
+ bool CallFrameAddressIsValid(lldb::addr_t cfa) override {
+// Assume any address except zero is valid
+if (cfa == 0)
+ return false;
+return true;
+ }
+
+ bool CodeAddressIsValid(lldb::addr_t pc) override {
+// Ensure addresses are smaller than XLEN bits wide. Calls can use the least
+// significant bit to store auxiliary information, so no strict check is
+// done for alignment.
+if (!isRV64)
+ return (pc <= UINT32_MAX);
+return (pc <= UINT64_MAX);
+ }
+
+ lldb::addr_t FixCodeAddress(lldb::addr_t pc) override {
+// Since the least significant bit of a code address can be used to store
+// auxiliary information, that bit must be zeroed in any addresses.
+return pc & ~(lldb::addr_t)1;
+ }
+
+ // Static Functions
+
+ static void Initialize();
+
+ static void Terminate();
+
+ static lldb::ABISP CreateInstance(lldb::ProcessSP process_sp,
+const lldb_private::ArchSpec );
+
+ // PluginInterface protocol
+
+ static llvm::StringRef GetPluginNameStatic() { return "sysv-riscv"; }
+
+ llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); }
+
+protected:
+ bool RegisterIsCalleeSaved(const lldb_private::RegisterInfo
[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 added a comment. @jasonmolenda. @Emmmer, I've addressed your review feedback. Could you please take another look? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132510/new/ https://reviews.llvm.org/D132510 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 updated this revision to Diff 455371.
kasper81 added a comment.
Added a `FIXME` comment in `CreateDefaultUnwindPlan`, based on advice from
@jasonmolenda.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D132510/new/
https://reviews.llvm.org/D132510
Files:
lldb/source/Plugins/ABI/CMakeLists.txt
lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
lldb/source/Target/Platform.cpp
Index: lldb/source/Target/Platform.cpp
===
--- lldb/source/Target/Platform.cpp
+++ lldb/source/Target/Platform.cpp
@@ -1928,10 +1928,17 @@
case llvm::Triple::riscv32:
case llvm::Triple::riscv64: {
+static const uint8_t g_riscv_c_opcode[] = {0x02, 0x90}; // c_ebreak
static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
-trap_opcode = g_riscv_opcode;
-trap_opcode_size = sizeof(g_riscv_opcode);
- } break;
+if (arch.GetFlags() & ArchSpec::eRISCV_rvc) {
+ trap_opcode = g_riscv_c_opcode;
+ trap_opcode_size = sizeof(g_riscv_c_opcode);
+} else {
+ trap_opcode = g_riscv_opcode;
+ trap_opcode_size = sizeof(g_riscv_opcode);
+}
+break;
+ }
default:
return 0;
Index: lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
===
--- /dev/null
+++ lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
@@ -0,0 +1,10 @@
+add_lldb_library(lldbPluginABISysV_riscv PLUGIN
+ ABISysV_riscv.cpp
+
+ LINK_LIBS
+lldbCore
+lldbSymbol
+lldbTarget
+ LINK_COMPONENTS
+Support
+)
Index: lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
===
--- /dev/null
+++ lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
@@ -0,0 +1,119 @@
+//===-- ABISysV_riscv.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_ABI_RISCV_ABISYSV_RISCV_H
+#define LLDB_SOURCE_PLUGINS_ABI_RISCV_ABISYSV_RISCV_H
+
+#include "lldb/Target/ABI.h"
+#include "lldb/lldb-private.h"
+
+class ABISysV_riscv : public lldb_private::MCBasedABI {
+ bool isRV64;
+
+public:
+ ~ABISysV_riscv() override = default;
+
+ size_t GetRedZoneSize() const override { return 0; }
+
+ bool PrepareTrivialCall(lldb_private::Thread , lldb::addr_t sp,
+ lldb::addr_t functionAddress,
+ lldb::addr_t returnAddress,
+ llvm::ArrayRef args) const override {
+// TODO: Implement
+return false;
+ }
+
+ bool GetArgumentValues(lldb_private::Thread ,
+ lldb_private::ValueList ) const override {
+// TODO: Implement
+return false;
+ }
+
+ lldb_private::Status
+ SetReturnValueObject(lldb::StackFrameSP _sp,
+ lldb::ValueObjectSP _value) override {
+// TODO: Implement
+lldb_private::Status error;
+error.SetErrorString("Not yet implemented");
+return error;
+ }
+
+ lldb::ValueObjectSP
+ GetReturnValueObjectImpl(lldb_private::Thread ,
+ lldb_private::CompilerType ) const override {
+// TODO: Implement
+lldb::ValueObjectSP return_valobj;
+return return_valobj;
+ }
+
+ bool
+ CreateFunctionEntryUnwindPlan(lldb_private::UnwindPlan _plan) override;
+
+ bool CreateDefaultUnwindPlan(lldb_private::UnwindPlan _plan) override;
+
+ bool RegisterIsVolatile(const lldb_private::RegisterInfo *reg_info) override;
+
+ bool CallFrameAddressIsValid(lldb::addr_t cfa) override {
+// Assume any address except zero is valid
+if (cfa == 0)
+ return false;
+return true;
+ }
+
+ bool CodeAddressIsValid(lldb::addr_t pc) override {
+// Ensure addresses are smaller than XLEN bits wide. Calls can use the least
+// significant bit to store auxiliary information, so no strict check is
+// done for alignment.
+if (!isRV64)
+ return (pc <= UINT32_MAX);
+return (pc <= UINT64_MAX);
+ }
+
+ lldb::addr_t FixCodeAddress(lldb::addr_t pc) override {
+// Since the least significant bit of a code address can be used to store
+// auxiliary information, that bit must be zeroed in any addresses.
+return pc & ~(lldb::addr_t)1;
+ }
+
+ // Static Functions
+
+ static void Initialize();
+
+ static void Terminate();
+
+ static lldb::ABISP CreateInstance(lldb::ProcessSP process_sp,
+const lldb_private::ArchSpec );
+
+ // PluginInterface protocol
+
+ static lldb_private::ConstString GetPluginNameStatic();
+
+ lldb_private::ConstString GetPluginName()
[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 added inline comments.
Comment at: lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp:38
+
+enum riscv_dwarf_regnums {
+ dwarf_x0 = 0,
Emmmer wrote:
> This enum can be included from `lldb/source/Utility/RISCV_DWARF_Registers.h`
Thanks, I have reused that header.
Repository:
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[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 updated this revision to Diff 455177.
kasper81 marked an inline comment as done.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D132510/new/
https://reviews.llvm.org/D132510
Files:
lldb/source/Plugins/ABI/CMakeLists.txt
lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
lldb/source/Target/Platform.cpp
Index: lldb/source/Target/Platform.cpp
===
--- lldb/source/Target/Platform.cpp
+++ lldb/source/Target/Platform.cpp
@@ -1928,10 +1928,17 @@
case llvm::Triple::riscv32:
case llvm::Triple::riscv64: {
+static const uint8_t g_riscv_c_opcode[] = {0x02, 0x90}; // c_ebreak
static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
-trap_opcode = g_riscv_opcode;
-trap_opcode_size = sizeof(g_riscv_opcode);
- } break;
+if (arch.GetFlags() & ArchSpec::eRISCV_rvc) {
+ trap_opcode = g_riscv_c_opcode;
+ trap_opcode_size = sizeof(g_riscv_c_opcode);
+} else {
+ trap_opcode = g_riscv_opcode;
+ trap_opcode_size = sizeof(g_riscv_opcode);
+}
+break;
+ }
default:
return 0;
Index: lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
===
--- /dev/null
+++ lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
@@ -0,0 +1,10 @@
+add_lldb_library(lldbPluginABISysV_riscv PLUGIN
+ ABISysV_riscv.cpp
+
+ LINK_LIBS
+lldbCore
+lldbSymbol
+lldbTarget
+ LINK_COMPONENTS
+Support
+)
Index: lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
===
--- /dev/null
+++ lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
@@ -0,0 +1,119 @@
+//===-- ABISysV_riscv.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_ABI_RISCV_ABISYSV_RISCV_H
+#define LLDB_SOURCE_PLUGINS_ABI_RISCV_ABISYSV_RISCV_H
+
+#include "lldb/Target/ABI.h"
+#include "lldb/lldb-private.h"
+
+class ABISysV_riscv : public lldb_private::MCBasedABI {
+ bool isRV64;
+
+public:
+ ~ABISysV_riscv() override = default;
+
+ size_t GetRedZoneSize() const override { return 0; }
+
+ bool PrepareTrivialCall(lldb_private::Thread , lldb::addr_t sp,
+ lldb::addr_t functionAddress,
+ lldb::addr_t returnAddress,
+ llvm::ArrayRef args) const override {
+// TODO: Implement
+return false;
+ }
+
+ bool GetArgumentValues(lldb_private::Thread ,
+ lldb_private::ValueList ) const override {
+// TODO: Implement
+return false;
+ }
+
+ lldb_private::Status
+ SetReturnValueObject(lldb::StackFrameSP _sp,
+ lldb::ValueObjectSP _value) override {
+// TODO: Implement
+lldb_private::Status error;
+error.SetErrorString("Not yet implemented");
+return error;
+ }
+
+ lldb::ValueObjectSP
+ GetReturnValueObjectImpl(lldb_private::Thread ,
+ lldb_private::CompilerType ) const override {
+// TODO: Implement
+lldb::ValueObjectSP return_valobj;
+return return_valobj;
+ }
+
+ bool
+ CreateFunctionEntryUnwindPlan(lldb_private::UnwindPlan _plan) override;
+
+ bool CreateDefaultUnwindPlan(lldb_private::UnwindPlan _plan) override;
+
+ bool RegisterIsVolatile(const lldb_private::RegisterInfo *reg_info) override;
+
+ bool CallFrameAddressIsValid(lldb::addr_t cfa) override {
+// Assume any address except zero is valid
+if (cfa == 0)
+ return false;
+return true;
+ }
+
+ bool CodeAddressIsValid(lldb::addr_t pc) override {
+// Ensure addresses are smaller than XLEN bits wide. Calls can use the least
+// significant bit to store auxiliary information, so no strict check is
+// done for alignment.
+if (!isRV64)
+ return (pc <= UINT32_MAX);
+return (pc <= UINT64_MAX);
+ }
+
+ lldb::addr_t FixCodeAddress(lldb::addr_t pc) override {
+// Since the least significant bit of a code address can be used to store
+// auxiliary information, that bit must be zeroed in any addresses.
+return pc & ~(lldb::addr_t)1;
+ }
+
+ // Static Functions
+
+ static void Initialize();
+
+ static void Terminate();
+
+ static lldb::ABISP CreateInstance(lldb::ProcessSP process_sp,
+const lldb_private::ArchSpec );
+
+ // PluginInterface protocol
+
+ static lldb_private::ConstString GetPluginNameStatic();
+
+ lldb_private::ConstString GetPluginName() override;
+
+ uint32_t GetPluginVersion() override { return 1; }
+
[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 updated this revision to Diff 455176.
kasper81 added a comment.
Reuse existing dwarf enum.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D132510/new/
https://reviews.llvm.org/D132510
Files:
lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
Index: lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
===
--- lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
+++ lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
@@ -30,78 +30,13 @@
#include "lldb/Utility/RegisterValue.h"
#include "lldb/Utility/Status.h"
+#include "Utility/RISCV_DWARF_Registers.h"
+
using namespace lldb;
using namespace lldb_private;
LLDB_PLUGIN_DEFINE(ABISysV_riscv)
-enum riscv_dwarf_regnums {
- dwarf_x0 = 0,
- dwarf_x1,
- dwarf_x2,
- dwarf_x3,
- dwarf_x4,
- dwarf_x5,
- dwarf_x6,
- dwarf_x7,
- dwarf_x8,
- dwarf_x9,
- dwarf_x10,
- dwarf_x11,
- dwarf_x12,
- dwarf_x13,
- dwarf_x14,
- dwarf_x15,
- dwarf_x16,
- dwarf_x17,
- dwarf_x18,
- dwarf_x19,
- dwarf_x20,
- dwarf_x21,
- dwarf_x22,
- dwarf_x23,
- dwarf_x24,
- dwarf_x25,
- dwarf_x26,
- dwarf_x27,
- dwarf_x28,
- dwarf_x29,
- dwarf_x30,
- dwarf_x31,
- dwarf_f0 = 32,
- dwarf_f1,
- dwarf_f2,
- dwarf_f3,
- dwarf_f4,
- dwarf_f5,
- dwarf_f6,
- dwarf_f7,
- dwarf_f8,
- dwarf_f9,
- dwarf_f10,
- dwarf_f11,
- dwarf_f12,
- dwarf_f13,
- dwarf_f14,
- dwarf_f15,
- dwarf_f16,
- dwarf_f17,
- dwarf_f18,
- dwarf_f19,
- dwarf_f20,
- dwarf_f21,
- dwarf_f22,
- dwarf_f23,
- dwarf_f24,
- dwarf_f25,
- dwarf_f26,
- dwarf_f27,
- dwarf_f28,
- dwarf_f29,
- dwarf_f30,
- dwarf_f31
-};
-
bool ABISysV_riscv::CreateFunctionEntryUnwindPlan(UnwindPlan _plan) {
unwind_plan.Clear();
unwind_plan.SetRegisterKind(eRegisterKindGeneric);
@@ -173,11 +108,11 @@
std::pair
ABISysV_riscv::GetEHAndDWARFNums(llvm::StringRef name) {
if (name == "ra")
-return {LLDB_INVALID_REGNUM, riscv_dwarf_regnums::dwarf_x1};
+return {LLDB_INVALID_REGNUM, dwarf_gpr_x1};
if (name == "sp")
-return {LLDB_INVALID_REGNUM, riscv_dwarf_regnums::dwarf_x2};
+return {LLDB_INVALID_REGNUM, dwarf_gpr_x2};
if (name == "fp")
-return {LLDB_INVALID_REGNUM, riscv_dwarf_regnums::dwarf_x8};
+return {LLDB_INVALID_REGNUM, dwarf_gpr_x8};
return MCBasedABI::GetEHAndDWARFNums(name);
}
Index: lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
===
--- lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
+++ lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
@@ -30,78 +30,13 @@
#include "lldb/Utility/RegisterValue.h"
#include "lldb/Utility/Status.h"
+#include "Utility/RISCV_DWARF_Registers.h"
+
using namespace lldb;
using namespace lldb_private;
LLDB_PLUGIN_DEFINE(ABISysV_riscv)
-enum riscv_dwarf_regnums {
- dwarf_x0 = 0,
- dwarf_x1,
- dwarf_x2,
- dwarf_x3,
- dwarf_x4,
- dwarf_x5,
- dwarf_x6,
- dwarf_x7,
- dwarf_x8,
- dwarf_x9,
- dwarf_x10,
- dwarf_x11,
- dwarf_x12,
- dwarf_x13,
- dwarf_x14,
- dwarf_x15,
- dwarf_x16,
- dwarf_x17,
- dwarf_x18,
- dwarf_x19,
- dwarf_x20,
- dwarf_x21,
- dwarf_x22,
- dwarf_x23,
- dwarf_x24,
- dwarf_x25,
- dwarf_x26,
- dwarf_x27,
- dwarf_x28,
- dwarf_x29,
- dwarf_x30,
- dwarf_x31,
- dwarf_f0 = 32,
- dwarf_f1,
- dwarf_f2,
- dwarf_f3,
- dwarf_f4,
- dwarf_f5,
- dwarf_f6,
- dwarf_f7,
- dwarf_f8,
- dwarf_f9,
- dwarf_f10,
- dwarf_f11,
- dwarf_f12,
- dwarf_f13,
- dwarf_f14,
- dwarf_f15,
- dwarf_f16,
- dwarf_f17,
- dwarf_f18,
- dwarf_f19,
- dwarf_f20,
- dwarf_f21,
- dwarf_f22,
- dwarf_f23,
- dwarf_f24,
- dwarf_f25,
- dwarf_f26,
- dwarf_f27,
- dwarf_f28,
- dwarf_f29,
- dwarf_f30,
- dwarf_f31
-};
-
bool ABISysV_riscv::CreateFunctionEntryUnwindPlan(UnwindPlan _plan) {
unwind_plan.Clear();
unwind_plan.SetRegisterKind(eRegisterKindGeneric);
@@ -173,11 +108,11 @@
std::pair
ABISysV_riscv::GetEHAndDWARFNums(llvm::StringRef name) {
if (name == "ra")
-return {LLDB_INVALID_REGNUM, riscv_dwarf_regnums::dwarf_x1};
+return {LLDB_INVALID_REGNUM, dwarf_gpr_x1};
if (name == "sp")
-return {LLDB_INVALID_REGNUM, riscv_dwarf_regnums::dwarf_x2};
+return {LLDB_INVALID_REGNUM, dwarf_gpr_x2};
if (name == "fp")
-return {LLDB_INVALID_REGNUM, riscv_dwarf_regnums::dwarf_x8};
+return {LLDB_INVALID_REGNUM, dwarf_gpr_x8};
return MCBasedABI::GetEHAndDWARFNums(name);
}
___
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[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 added a comment. @jasonmolenda the problem with original review is that we were waiting for the wholesale support for 3.5 years, and it rendered into an impossible task for the author. I don't want to make this one "all or none" kind of a deal as well. This patch is n neither bringing 100% lldb support nor regressing. It is an incremental step forward to unblock a few more scenarios to initialize SysV ABI. After this, we probably first need RISCV support in `lldb/source/Plugins/Architecture` which will then be used in Core to unlock some other scenarios and then we can further enrich these features in small and fast iterations. @Emmmer has a better understanding of what is left. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132510/new/ https://reviews.llvm.org/D132510 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D132510: [RISCV][LLDB] Add initial SysV ABI support
kasper81 created this revision.
kasper81 added reviewers: DavidSpickett, Emmmer, tzb99.
kasper81 added a project: LLDB.
Herald added subscribers: sunshaoce, VincentWu, luke957, vkmr, frasercrmck,
evandro, luismarques, apazos, sameer.abuasal, JDevlieghere, s.egerton, Jim,
benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01,
edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal,
simoncook, johnrusso, rbar, asb, arichardson, mgorny.
Herald added a project: All.
kasper81 requested review of this revision.
Herald added subscribers: lldb-commits, pcwang-thead, eopXD, MaskRay.
Supersedes https://reviews.llvm.org/D62732, since author is not working on it
anymore (https://reviews.llvm.org/D62732?vs=on=341471#3561717).
This is to get the basic stuff working with DefaultUnwindPlan. We can
incrementally add more plans in the future and make the implementation more
robust. |
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D132510
Files:
lldb/source/Plugins/ABI/CMakeLists.txt
lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
lldb/source/Target/Platform.cpp
Index: lldb/source/Target/Platform.cpp
===
--- lldb/source/Target/Platform.cpp
+++ lldb/source/Target/Platform.cpp
@@ -1928,10 +1928,17 @@
case llvm::Triple::riscv32:
case llvm::Triple::riscv64: {
+static const uint8_t g_riscv_c_opcode[] = {0x02, 0x90}; // c_ebreak
static const uint8_t g_riscv_opcode[] = {0x73, 0x00, 0x10, 0x00}; // ebreak
-trap_opcode = g_riscv_opcode;
-trap_opcode_size = sizeof(g_riscv_opcode);
- } break;
+if (arch.GetFlags() & ArchSpec::eRISCV_rvc) {
+ trap_opcode = g_riscv_c_opcode;
+ trap_opcode_size = sizeof(g_riscv_c_opcode);
+} else {
+ trap_opcode = g_riscv_opcode;
+ trap_opcode_size = sizeof(g_riscv_opcode);
+}
+break;
+ }
default:
return 0;
Index: lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
===
--- /dev/null
+++ lldb/source/Plugins/ABI/RISCV/CMakeLists.txt
@@ -0,0 +1,10 @@
+add_lldb_library(lldbPluginABISysV_riscv PLUGIN
+ ABISysV_riscv.cpp
+
+ LINK_LIBS
+lldbCore
+lldbSymbol
+lldbTarget
+ LINK_COMPONENTS
+Support
+)
Index: lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
===
--- /dev/null
+++ lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.h
@@ -0,0 +1,119 @@
+//===-- ABISysV_riscv.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_ABI_RISCV_ABISYSV_RISCV_H
+#define LLDB_SOURCE_PLUGINS_ABI_RISCV_ABISYSV_RISCV_H
+
+#include "lldb/Target/ABI.h"
+#include "lldb/lldb-private.h"
+
+class ABISysV_riscv : public lldb_private::MCBasedABI {
+ bool isRV64;
+
+public:
+ ~ABISysV_riscv() override = default;
+
+ size_t GetRedZoneSize() const override { return 0; }
+
+ bool PrepareTrivialCall(lldb_private::Thread , lldb::addr_t sp,
+ lldb::addr_t functionAddress,
+ lldb::addr_t returnAddress,
+ llvm::ArrayRef args) const override {
+// TODO: Implement
+return false;
+ }
+
+ bool GetArgumentValues(lldb_private::Thread ,
+ lldb_private::ValueList ) const override {
+// TODO: Implement
+return false;
+ }
+
+ lldb_private::Status
+ SetReturnValueObject(lldb::StackFrameSP _sp,
+ lldb::ValueObjectSP _value) override {
+// TODO: Implement
+lldb_private::Status error;
+error.SetErrorString("Not yet implemented");
+return error;
+ }
+
+ lldb::ValueObjectSP
+ GetReturnValueObjectImpl(lldb_private::Thread ,
+ lldb_private::CompilerType ) const override {
+// TODO: Implement
+lldb::ValueObjectSP return_valobj;
+return return_valobj;
+ }
+
+ bool
+ CreateFunctionEntryUnwindPlan(lldb_private::UnwindPlan _plan) override;
+
+ bool CreateDefaultUnwindPlan(lldb_private::UnwindPlan _plan) override;
+
+ bool RegisterIsVolatile(const lldb_private::RegisterInfo *reg_info) override;
+
+ bool CallFrameAddressIsValid(lldb::addr_t cfa) override {
+// Assume any address except zero is valid
+if (cfa == 0)
+ return false;
+return true;
+ }
+
+ bool CodeAddressIsValid(lldb::addr_t pc) override {
+// Ensure addresses are smaller than XLEN bits wide. Calls can use the least
+// significant bit to store auxiliary information, so no strict check is
+// done for alignment.
+if
[Lldb-commits] [PATCH] D62732: [RISCV] Add SystemV ABI
kasper81 added a comment.
Hi Luis, are you planning on adding plugin architecture support (in
`lldb/source/Plugins/Architecture`) as part of this work?
Comment at: lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp:1152
+ triple.getArch() == llvm::Triple::riscv64)
+features_str += "+a,+c,+d,+f,+m";
+
jrtc27 wrote:
> This will override whatever the ELF says in its attributes section. This
> might make sense as a default for if you don't have a binary and are just
> poking at memory, but it makes things worse when you do, the common case that
> need to work as best as we can manage.
```
if (arch.GetFlags() & ArchSpec::eRISCV_arch_c) {
features_str += "+c,";
}
```
and so on (like the case with MIPS below). Maybe we can define a and m as well
in ArchSpec?
Repository:
rG LLVM Github Monorepo
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[Lldb-commits] [PATCH] D62732: [RISCV] Add SystemV ABI
kasper81 added a comment. > I think the main blocker for merging was testing. If it helps, I now have the > RISC-V server in my hands and I should be able to set up a buildbot soon. It certainly will help. Thank you! :) On July 27, 13.x will be branched out. If we can squeeze it in that would be a huge thing! I can help anyway you want with testing (I don't have the device atm, but can run the builds in Debian and Alpine qmeu-based chroot environments). Otherwise, we can request the maintainers later if they would cherry-pick this patch once merged. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62732/new/ https://reviews.llvm.org/D62732 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D62732: [RISCV] Add SystemV ABI
kasper81 added a comment. Hi, I have my fingers crossed since this request was opened in 2019. It seems like it compiles and usable to certain degree. Can this patch be merged and included in llvm 13 as initial riscv64 support? We can then improve it subsequently if bugs show up. Otherwise it will be one more year of waiting for the consumers. Thank you for your effort! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62732/new/ https://reviews.llvm.org/D62732 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
