[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
This revision was automatically updated to reflect the committed changes.
Closed by commit rGed34590c1acb: [LLDB] Add LoongArch register definitions and
operations (authored by seehearfeel, committed by SixWeining).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138407/new/
https://reviews.llvm.org/D138407
Files:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
lldb/source/Plugins/Process/Utility/CMakeLists.txt
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
lldb/source/Utility/LoongArch_DWARF_Registers.h
Index: lldb/source/Utility/LoongArch_DWARF_Registers.h
===
--- /dev/null
+++ lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -0,0 +1,178 @@
+//===-- LoongArch_DWARF_Registers.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+#define LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+
+#include "lldb/lldb-private.h"
+
+namespace loongarch_dwarf {
+
+enum {
+ dwarf_gpr_r0 = 0,
+ dwarf_gpr_r1,
+ dwarf_gpr_r2,
+ dwarf_gpr_r3,
+ dwarf_gpr_r4,
+ dwarf_gpr_r5,
+ dwarf_gpr_r6,
+ dwarf_gpr_r7,
+ dwarf_gpr_r8,
+ dwarf_gpr_r9,
+ dwarf_gpr_r10,
+ dwarf_gpr_r11,
+ dwarf_gpr_r12,
+ dwarf_gpr_r13,
+ dwarf_gpr_r14,
+ dwarf_gpr_r15,
+ dwarf_gpr_r16,
+ dwarf_gpr_r17,
+ dwarf_gpr_r18,
+ dwarf_gpr_r19,
+ dwarf_gpr_r20,
+ dwarf_gpr_r21,
+ dwarf_gpr_r22,
+ dwarf_gpr_r23,
+ dwarf_gpr_r24,
+ dwarf_gpr_r25,
+ dwarf_gpr_r26,
+ dwarf_gpr_r27,
+ dwarf_gpr_r28,
+ dwarf_gpr_r29,
+ dwarf_gpr_r30,
+ dwarf_gpr_r31 = 31,
+
+ dwarf_gpr_orig_a0,
+ dwarf_gpr_pc,
+ dwarf_gpr_badv,
+
+ dwarf_gpr_reserved0 = 35,
+ dwarf_gpr_reserved1,
+ dwarf_gpr_reserved2,
+ dwarf_gpr_reserved3,
+ dwarf_gpr_reserved4,
+ dwarf_gpr_reserved5,
+ dwarf_gpr_reserved6,
+ dwarf_gpr_reserved7,
+ dwarf_gpr_reserved8,
+ dwarf_gpr_reserved9,
+
+ dwarf_fpr_f0 = 45,
+ dwarf_fpr_f1,
+ dwarf_fpr_f2,
+ dwarf_fpr_f3,
+ dwarf_fpr_f4,
+ dwarf_fpr_f5,
+ dwarf_fpr_f6,
+ dwarf_fpr_f7,
+ dwarf_fpr_f8,
+ dwarf_fpr_f9,
+ dwarf_fpr_f10,
+ dwarf_fpr_f11,
+ dwarf_fpr_f12,
+ dwarf_fpr_f13,
+ dwarf_fpr_f14,
+ dwarf_fpr_f15,
+ dwarf_fpr_f16,
+ dwarf_fpr_f17,
+ dwarf_fpr_f18,
+ dwarf_fpr_f19,
+ dwarf_fpr_f20,
+ dwarf_fpr_f21,
+ dwarf_fpr_f22,
+ dwarf_fpr_f23,
+ dwarf_fpr_f24,
+ dwarf_fpr_f25,
+ dwarf_fpr_f26,
+ dwarf_fpr_f27,
+ dwarf_fpr_f28,
+ dwarf_fpr_f29,
+ dwarf_fpr_f30,
+ dwarf_fpr_f31 = 76,
+
+ dwarf_fpr_fcc0,
+ dwarf_fpr_fcc1,
+ dwarf_fpr_fcc2,
+ dwarf_fpr_fcc3,
+ dwarf_fpr_fcc4,
+ dwarf_fpr_fcc5,
+ dwarf_fpr_fcc6,
+ dwarf_fpr_fcc7,
+ dwarf_fpr_fcsr,
+
+ // register name alias
+ dwarf_gpr_zero = dwarf_gpr_r0,
+ dwarf_gpr_ra = dwarf_gpr_r1,
+ dwarf_gpr_tp = dwarf_gpr_r2,
+ dwarf_gpr_sp = dwarf_gpr_r3,
+ dwarf_gpr_a0 = dwarf_gpr_r4,
+ dwarf_gpr_a1 = dwarf_gpr_r5,
+ dwarf_gpr_a2 = dwarf_gpr_r6,
+ dwarf_gpr_a3 = dwarf_gpr_r7,
+ dwarf_gpr_a4 = dwarf_gpr_r8,
+ dwarf_gpr_a5 = dwarf_gpr_r9,
+ dwarf_gpr_a6 = dwarf_gpr_r10,
+ dwarf_gpr_a7 = dwarf_gpr_r11,
+ dwarf_gpr_t0 = dwarf_gpr_r12,
+ dwarf_gpr_t1 = dwarf_gpr_r13,
+ dwarf_gpr_t2 = dwarf_gpr_r14,
+ dwarf_gpr_t3 = dwarf_gpr_r15,
+ dwarf_gpr_t4 = dwarf_gpr_r16,
+ dwarf_gpr_t5 = dwarf_gpr_r17,
+ dwarf_gpr_t6 = dwarf_gpr_r18,
+ dwarf_gpr_t7 = dwarf_gpr_r19,
+ dwarf_gpr_t8 = dwarf_gpr_r20,
+ dwarf_gpr_fp = dwarf_gpr_r22,
+ dwarf_gpr_s9 = dwarf_gpr_r22,
+ dwarf_gpr_s0 = dwarf_gpr_r23,
+ dwarf_gpr_s1 = dwarf_gpr_r24,
+ dwarf_gpr_s2 = dwarf_gpr_r25,
+ dwarf_gpr_s3 = dwarf_gpr_r26,
+ dwarf_gpr_s4 = dwarf_gpr_r27,
+ dwarf_gpr_s5 = dwarf_gpr_r28,
+ dwarf_gpr_s6 = dwarf_gpr_r29,
+ dwarf_gpr_s7 = dwarf_gpr_r30,
+ dwarf_gpr_s8 = dwarf_gpr_r31,
+
+ dwarf_fpr_fa0 = dwarf_fpr_f0,
+ dwarf_fpr_fa1 = dwarf_fpr_f1,
+ dwarf_fpr_fa2 = dwarf_fpr_f2,
+ dwarf_fpr_fa3 = dwarf_fpr_f3,
+ dwarf_fpr_fa4 = dwarf_fpr_f4,
+ dwarf_fpr_fa5 = dwarf_fpr_f5,
+ dwarf_fpr_fa6 = dwarf_fpr_f6,
+ dwarf_fpr_fa7 = dwarf_fpr_f7,
+ dwarf_fpr_ft0 = dwarf_fpr_f8,
+ dwarf_fpr_ft1 = dwarf_fpr_f9,
+ dwarf_fpr_ft2 = dwarf_fpr_f10,
+ dwarf_fpr_ft3 = dwarf_fpr_f11,
+ dwarf_fpr_ft4 = dwarf_fpr_f12,
+ dwarf_fpr_ft5 =
[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
xen0n accepted this revision. xen0n added a comment. Also LGTM for the LoongArch bits. Thanks! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138407/new/ https://reviews.llvm.org/D138407 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
SixWeining accepted this revision. SixWeining added a comment. My comments are all addressed. LGTM from the LoongArch side. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138407/new/ https://reviews.llvm.org/D138407 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
DavidSpickett accepted this revision. DavidSpickett added a comment. This revision is now accepted and ready to land. Looks good from the LLDB side. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138407/new/ https://reviews.llvm.org/D138407 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
seehearfeel updated this revision to Diff 477690.
seehearfeel added a comment.
(1) define *_OFFSET in RegisterInfoPOSIX_loongarch64.cpp
(2) remove the alias u0 for r21, use fp and s9 for r22
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138407/new/
https://reviews.llvm.org/D138407
Files:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
lldb/source/Plugins/Process/Utility/CMakeLists.txt
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
lldb/source/Utility/LoongArch_DWARF_Registers.h
Index: lldb/source/Utility/LoongArch_DWARF_Registers.h
===
--- /dev/null
+++ lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -0,0 +1,178 @@
+//===-- LoongArch_DWARF_Registers.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+#define LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+
+#include "lldb/lldb-private.h"
+
+namespace loongarch_dwarf {
+
+enum {
+ dwarf_gpr_r0 = 0,
+ dwarf_gpr_r1,
+ dwarf_gpr_r2,
+ dwarf_gpr_r3,
+ dwarf_gpr_r4,
+ dwarf_gpr_r5,
+ dwarf_gpr_r6,
+ dwarf_gpr_r7,
+ dwarf_gpr_r8,
+ dwarf_gpr_r9,
+ dwarf_gpr_r10,
+ dwarf_gpr_r11,
+ dwarf_gpr_r12,
+ dwarf_gpr_r13,
+ dwarf_gpr_r14,
+ dwarf_gpr_r15,
+ dwarf_gpr_r16,
+ dwarf_gpr_r17,
+ dwarf_gpr_r18,
+ dwarf_gpr_r19,
+ dwarf_gpr_r20,
+ dwarf_gpr_r21,
+ dwarf_gpr_r22,
+ dwarf_gpr_r23,
+ dwarf_gpr_r24,
+ dwarf_gpr_r25,
+ dwarf_gpr_r26,
+ dwarf_gpr_r27,
+ dwarf_gpr_r28,
+ dwarf_gpr_r29,
+ dwarf_gpr_r30,
+ dwarf_gpr_r31 = 31,
+
+ dwarf_gpr_orig_a0,
+ dwarf_gpr_pc,
+ dwarf_gpr_badv,
+
+ dwarf_gpr_reserved0 = 35,
+ dwarf_gpr_reserved1,
+ dwarf_gpr_reserved2,
+ dwarf_gpr_reserved3,
+ dwarf_gpr_reserved4,
+ dwarf_gpr_reserved5,
+ dwarf_gpr_reserved6,
+ dwarf_gpr_reserved7,
+ dwarf_gpr_reserved8,
+ dwarf_gpr_reserved9,
+
+ dwarf_fpr_f0 = 45,
+ dwarf_fpr_f1,
+ dwarf_fpr_f2,
+ dwarf_fpr_f3,
+ dwarf_fpr_f4,
+ dwarf_fpr_f5,
+ dwarf_fpr_f6,
+ dwarf_fpr_f7,
+ dwarf_fpr_f8,
+ dwarf_fpr_f9,
+ dwarf_fpr_f10,
+ dwarf_fpr_f11,
+ dwarf_fpr_f12,
+ dwarf_fpr_f13,
+ dwarf_fpr_f14,
+ dwarf_fpr_f15,
+ dwarf_fpr_f16,
+ dwarf_fpr_f17,
+ dwarf_fpr_f18,
+ dwarf_fpr_f19,
+ dwarf_fpr_f20,
+ dwarf_fpr_f21,
+ dwarf_fpr_f22,
+ dwarf_fpr_f23,
+ dwarf_fpr_f24,
+ dwarf_fpr_f25,
+ dwarf_fpr_f26,
+ dwarf_fpr_f27,
+ dwarf_fpr_f28,
+ dwarf_fpr_f29,
+ dwarf_fpr_f30,
+ dwarf_fpr_f31 = 76,
+
+ dwarf_fpr_fcc0,
+ dwarf_fpr_fcc1,
+ dwarf_fpr_fcc2,
+ dwarf_fpr_fcc3,
+ dwarf_fpr_fcc4,
+ dwarf_fpr_fcc5,
+ dwarf_fpr_fcc6,
+ dwarf_fpr_fcc7,
+ dwarf_fpr_fcsr,
+
+ // register name alias
+ dwarf_gpr_zero = dwarf_gpr_r0,
+ dwarf_gpr_ra = dwarf_gpr_r1,
+ dwarf_gpr_tp = dwarf_gpr_r2,
+ dwarf_gpr_sp = dwarf_gpr_r3,
+ dwarf_gpr_a0 = dwarf_gpr_r4,
+ dwarf_gpr_a1 = dwarf_gpr_r5,
+ dwarf_gpr_a2 = dwarf_gpr_r6,
+ dwarf_gpr_a3 = dwarf_gpr_r7,
+ dwarf_gpr_a4 = dwarf_gpr_r8,
+ dwarf_gpr_a5 = dwarf_gpr_r9,
+ dwarf_gpr_a6 = dwarf_gpr_r10,
+ dwarf_gpr_a7 = dwarf_gpr_r11,
+ dwarf_gpr_t0 = dwarf_gpr_r12,
+ dwarf_gpr_t1 = dwarf_gpr_r13,
+ dwarf_gpr_t2 = dwarf_gpr_r14,
+ dwarf_gpr_t3 = dwarf_gpr_r15,
+ dwarf_gpr_t4 = dwarf_gpr_r16,
+ dwarf_gpr_t5 = dwarf_gpr_r17,
+ dwarf_gpr_t6 = dwarf_gpr_r18,
+ dwarf_gpr_t7 = dwarf_gpr_r19,
+ dwarf_gpr_t8 = dwarf_gpr_r20,
+ dwarf_gpr_fp = dwarf_gpr_r22,
+ dwarf_gpr_s9 = dwarf_gpr_r22,
+ dwarf_gpr_s0 = dwarf_gpr_r23,
+ dwarf_gpr_s1 = dwarf_gpr_r24,
+ dwarf_gpr_s2 = dwarf_gpr_r25,
+ dwarf_gpr_s3 = dwarf_gpr_r26,
+ dwarf_gpr_s4 = dwarf_gpr_r27,
+ dwarf_gpr_s5 = dwarf_gpr_r28,
+ dwarf_gpr_s6 = dwarf_gpr_r29,
+ dwarf_gpr_s7 = dwarf_gpr_r30,
+ dwarf_gpr_s8 = dwarf_gpr_r31,
+
+ dwarf_fpr_fa0 = dwarf_fpr_f0,
+ dwarf_fpr_fa1 = dwarf_fpr_f1,
+ dwarf_fpr_fa2 = dwarf_fpr_f2,
+ dwarf_fpr_fa3 = dwarf_fpr_f3,
+ dwarf_fpr_fa4 = dwarf_fpr_f4,
+ dwarf_fpr_fa5 = dwarf_fpr_f5,
+ dwarf_fpr_fa6 = dwarf_fpr_f6,
+ dwarf_fpr_fa7 = dwarf_fpr_f7,
+ dwarf_fpr_ft0 = dwarf_fpr_f8,
+ dwarf_fpr_ft1 = dwarf_fpr_f9,
+ dwarf_fpr_ft2 = dwarf_fpr_f10,
+ dwarf_fpr_ft3 = dwarf_fpr_f11,
+ dwarf_fpr_ft4 = dwarf_fpr_f12,
+ dwarf_fpr_ft5 = dwarf_fpr_f13,
+ dwarf_fpr_ft6 = dwarf_fpr_f14,
+ dwarf_fpr_ft7 =
[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
seehearfeel added inline comments. Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:21 +#define GPR_OFFSET(idx) ((idx)*8 + 0) +#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR)) +#define FCC_OFFSET(idx) ((idx)*1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR)) SixWeining wrote: > I'm not sure whether you could use `RegisterInfoPOSIX_loongarch64` in this > file directly because I think this file is a `common` file. What do you > think? @DavidSpickett Maybe it is better to define them in RegisterInfoPOSIX_loongarch64.cpp, let me modify it, thank you. Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:98 +DEFINE_GPR64_ALT(r20, t8, LLDB_INVALID_REGNUM), +DEFINE_GPR64_ALT(r21, u0, LLDB_INVALID_REGNUM), +DEFINE_GPR64_ALT(r22, fp, LLDB_REGNUM_GENERIC_FP), xen0n wrote: > SixWeining wrote: > > `u0` is a unknown alias. Could we just use `DEFINE_GPR64`? > FYI the `u0` name is [[ > https://www.kernel.org/doc/html/latest/loongarch/introduction.html | a > non-standard alias only seen in the Linux kernel ]]. It should be harmless to > just support `r21` but not `u0`, much like how we don't support `v0/v1` any > more. > > While at it, `s9` in addition to `fp` may be supported too. (Arguably `s9` is > a better description of `r22` than `fp`, because FP usage can be disabled > while generating code, in which case it's just another ordinary callee-saved > register. But it seems some people believe so deeply that this usage is > acceptable that the name persisted into the final ABI document...) OK, according to Register Convention in LoongArch ELF ABI specification https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html#_register_convention let me remove the alias u0 for r21, use fp and s9 for r22, thank you. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138407/new/ https://reviews.llvm.org/D138407 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
xen0n added inline comments. Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:98 +DEFINE_GPR64_ALT(r20, t8, LLDB_INVALID_REGNUM), +DEFINE_GPR64_ALT(r21, u0, LLDB_INVALID_REGNUM), +DEFINE_GPR64_ALT(r22, fp, LLDB_REGNUM_GENERIC_FP), SixWeining wrote: > `u0` is a unknown alias. Could we just use `DEFINE_GPR64`? FYI the `u0` name is [[ https://www.kernel.org/doc/html/latest/loongarch/introduction.html | a non-standard alias only seen in the Linux kernel ]]. It should be harmless to just support `r21` but not `u0`, much like how we don't support `v0/v1` any more. While at it, `s9` in addition to `fp` may be supported too. (Arguably `s9` is a better description of `r22` than `fp`, because FP usage can be disabled while generating code, in which case it's just another ordinary callee-saved register. But it seems some people believe so deeply that this usage is acceptable that the name persisted into the final ABI document...) CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138407/new/ https://reviews.llvm.org/D138407 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
SixWeining added inline comments. Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:21 +#define GPR_OFFSET(idx) ((idx)*8 + 0) +#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR)) +#define FCC_OFFSET(idx) ((idx)*1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR)) I'm not sure whether you could use `RegisterInfoPOSIX_loongarch64` in this file directly because I think this file is a `common` file. What do you think? @DavidSpickett Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:98 +DEFINE_GPR64_ALT(r20, t8, LLDB_INVALID_REGNUM), +DEFINE_GPR64_ALT(r21, u0, LLDB_INVALID_REGNUM), +DEFINE_GPR64_ALT(r22, fp, LLDB_REGNUM_GENERIC_FP), `u0` is a unknown alias. Could we just use `DEFINE_GPR64`? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138407/new/ https://reviews.llvm.org/D138407 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
seehearfeel updated this revision to Diff 477650.
seehearfeel added a comment.
(1) Put elf.h before sys/uio.h
(2) Remove unnecessary indent
(3) Remove const cast of data_sp->GetBytes()
(4) Return k_num_register_sets in GetRegisterSetCount()
(5) Add register name alias
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138407/new/
https://reviews.llvm.org/D138407
Files:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
lldb/source/Plugins/Process/Utility/CMakeLists.txt
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
lldb/source/Utility/LoongArch_DWARF_Registers.h
Index: lldb/source/Utility/LoongArch_DWARF_Registers.h
===
--- /dev/null
+++ lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -0,0 +1,178 @@
+//===-- LoongArch_DWARF_Registers.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+#define LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+
+#include "lldb/lldb-private.h"
+
+namespace loongarch_dwarf {
+
+enum {
+ dwarf_gpr_r0 = 0,
+ dwarf_gpr_r1,
+ dwarf_gpr_r2,
+ dwarf_gpr_r3,
+ dwarf_gpr_r4,
+ dwarf_gpr_r5,
+ dwarf_gpr_r6,
+ dwarf_gpr_r7,
+ dwarf_gpr_r8,
+ dwarf_gpr_r9,
+ dwarf_gpr_r10,
+ dwarf_gpr_r11,
+ dwarf_gpr_r12,
+ dwarf_gpr_r13,
+ dwarf_gpr_r14,
+ dwarf_gpr_r15,
+ dwarf_gpr_r16,
+ dwarf_gpr_r17,
+ dwarf_gpr_r18,
+ dwarf_gpr_r19,
+ dwarf_gpr_r20,
+ dwarf_gpr_r21,
+ dwarf_gpr_r22,
+ dwarf_gpr_r23,
+ dwarf_gpr_r24,
+ dwarf_gpr_r25,
+ dwarf_gpr_r26,
+ dwarf_gpr_r27,
+ dwarf_gpr_r28,
+ dwarf_gpr_r29,
+ dwarf_gpr_r30,
+ dwarf_gpr_r31 = 31,
+
+ dwarf_gpr_orig_a0,
+ dwarf_gpr_pc,
+ dwarf_gpr_badv,
+
+ dwarf_gpr_reserved0 = 35,
+ dwarf_gpr_reserved1,
+ dwarf_gpr_reserved2,
+ dwarf_gpr_reserved3,
+ dwarf_gpr_reserved4,
+ dwarf_gpr_reserved5,
+ dwarf_gpr_reserved6,
+ dwarf_gpr_reserved7,
+ dwarf_gpr_reserved8,
+ dwarf_gpr_reserved9,
+
+ dwarf_fpr_f0 = 45,
+ dwarf_fpr_f1,
+ dwarf_fpr_f2,
+ dwarf_fpr_f3,
+ dwarf_fpr_f4,
+ dwarf_fpr_f5,
+ dwarf_fpr_f6,
+ dwarf_fpr_f7,
+ dwarf_fpr_f8,
+ dwarf_fpr_f9,
+ dwarf_fpr_f10,
+ dwarf_fpr_f11,
+ dwarf_fpr_f12,
+ dwarf_fpr_f13,
+ dwarf_fpr_f14,
+ dwarf_fpr_f15,
+ dwarf_fpr_f16,
+ dwarf_fpr_f17,
+ dwarf_fpr_f18,
+ dwarf_fpr_f19,
+ dwarf_fpr_f20,
+ dwarf_fpr_f21,
+ dwarf_fpr_f22,
+ dwarf_fpr_f23,
+ dwarf_fpr_f24,
+ dwarf_fpr_f25,
+ dwarf_fpr_f26,
+ dwarf_fpr_f27,
+ dwarf_fpr_f28,
+ dwarf_fpr_f29,
+ dwarf_fpr_f30,
+ dwarf_fpr_f31 = 76,
+
+ dwarf_fpr_fcc0,
+ dwarf_fpr_fcc1,
+ dwarf_fpr_fcc2,
+ dwarf_fpr_fcc3,
+ dwarf_fpr_fcc4,
+ dwarf_fpr_fcc5,
+ dwarf_fpr_fcc6,
+ dwarf_fpr_fcc7,
+ dwarf_fpr_fcsr,
+
+ // register name alias
+ dwarf_gpr_zero = dwarf_gpr_r0,
+ dwarf_gpr_ra = dwarf_gpr_r1,
+ dwarf_gpr_tp = dwarf_gpr_r2,
+ dwarf_gpr_sp = dwarf_gpr_r3,
+ dwarf_gpr_a0 = dwarf_gpr_r4,
+ dwarf_gpr_a1 = dwarf_gpr_r5,
+ dwarf_gpr_a2 = dwarf_gpr_r6,
+ dwarf_gpr_a3 = dwarf_gpr_r7,
+ dwarf_gpr_a4 = dwarf_gpr_r8,
+ dwarf_gpr_a5 = dwarf_gpr_r9,
+ dwarf_gpr_a6 = dwarf_gpr_r10,
+ dwarf_gpr_a7 = dwarf_gpr_r11,
+ dwarf_gpr_t0 = dwarf_gpr_r12,
+ dwarf_gpr_t1 = dwarf_gpr_r13,
+ dwarf_gpr_t2 = dwarf_gpr_r14,
+ dwarf_gpr_t3 = dwarf_gpr_r15,
+ dwarf_gpr_t4 = dwarf_gpr_r16,
+ dwarf_gpr_t5 = dwarf_gpr_r17,
+ dwarf_gpr_t6 = dwarf_gpr_r18,
+ dwarf_gpr_t7 = dwarf_gpr_r19,
+ dwarf_gpr_t8 = dwarf_gpr_r20,
+ dwarf_gpr_u0 = dwarf_gpr_r21,
+ dwarf_gpr_fp = dwarf_gpr_r22,
+ dwarf_gpr_s0 = dwarf_gpr_r23,
+ dwarf_gpr_s1 = dwarf_gpr_r24,
+ dwarf_gpr_s2 = dwarf_gpr_r25,
+ dwarf_gpr_s3 = dwarf_gpr_r26,
+ dwarf_gpr_s4 = dwarf_gpr_r27,
+ dwarf_gpr_s5 = dwarf_gpr_r28,
+ dwarf_gpr_s6 = dwarf_gpr_r29,
+ dwarf_gpr_s7 = dwarf_gpr_r30,
+ dwarf_gpr_s8 = dwarf_gpr_r31,
+
+ dwarf_fpr_fa0 = dwarf_fpr_f0,
+ dwarf_fpr_fa1 = dwarf_fpr_f1,
+ dwarf_fpr_fa2 = dwarf_fpr_f2,
+ dwarf_fpr_fa3 = dwarf_fpr_f3,
+ dwarf_fpr_fa4 = dwarf_fpr_f4,
+ dwarf_fpr_fa5 = dwarf_fpr_f5,
+ dwarf_fpr_fa6 = dwarf_fpr_f6,
+ dwarf_fpr_fa7 = dwarf_fpr_f7,
+ dwarf_fpr_ft0 = dwarf_fpr_f8,
+ dwarf_fpr_ft1 = dwarf_fpr_f9,
+ dwarf_fpr_ft2 = dwarf_fpr_f10,
+ dwarf_fpr_ft3 = dwarf_fpr_f11,
+ dwarf_fpr_ft4 = dwarf_fpr_f12,
+
[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
DavidSpickett added inline comments.
Comment at:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221
+
+ uint8_t *src = const_cast(data_sp->GetBytes());
+ if (src == nullptr) {
seehearfeel wrote:
> DavidSpickett wrote:
> > seehearfeel wrote:
> > > DavidSpickett wrote:
> > > > Possibly not needed const cast.
> > > If no const cast, build failed:
> > >
> > > ```
> > > /home/loongson/llvm.git/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221:12:
> > > error: cannot initialize a variable of type 'uint8_t *' (aka 'unsigned
> > > char *') with an rvalue of type 'const uint8_t *' (aka 'const unsigned
> > > char *')
> > > uint8_t *src = data_sp->GetBytes();
> > >^ ~~~
> > > 1 error generated.
> > > ```
> > Yes, for the way you've written it that makes sense. But I realise I was
> > looking at the wrong thing here. It's fine that the GetBytes() is const
> > because this is a WriteRegister call, that's expected.
> >
> > You should be fine using `const uint8_t*` here, because you can still
> > increment that pointer and memcpy from it. Since the pointer itself can
> > change but the data it points to is const.
> >
> > https://godbolt.org/z/9M9oqr575 might explain it better.
> The correct code are:
>
> In ReadAllRegisterValues()
>
> ```
> uint8_t *dst = data_sp->GetBytes();
> ```
>
> In WriteAllRegisterValues()
>
> ```
> const uint8_t *src = data_sp->GetBytes();
> ```
>
> Thank you.
Yes, exactly!
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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
seehearfeel added inline comments.
Comment at:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221
+
+ uint8_t *src = const_cast(data_sp->GetBytes());
+ if (src == nullptr) {
DavidSpickett wrote:
> seehearfeel wrote:
> > DavidSpickett wrote:
> > > Possibly not needed const cast.
> > If no const cast, build failed:
> >
> > ```
> > /home/loongson/llvm.git/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221:12:
> > error: cannot initialize a variable of type 'uint8_t *' (aka 'unsigned
> > char *') with an rvalue of type 'const uint8_t *' (aka 'const unsigned char
> > *')
> > uint8_t *src = data_sp->GetBytes();
> >^ ~~~
> > 1 error generated.
> > ```
> Yes, for the way you've written it that makes sense. But I realise I was
> looking at the wrong thing here. It's fine that the GetBytes() is const
> because this is a WriteRegister call, that's expected.
>
> You should be fine using `const uint8_t*` here, because you can still
> increment that pointer and memcpy from it. Since the pointer itself can
> change but the data it points to is const.
>
> https://godbolt.org/z/9M9oqr575 might explain it better.
The correct code are:
In ReadAllRegisterValues()
```
uint8_t *dst = data_sp->GetBytes();
```
In WriteAllRegisterValues()
```
const uint8_t *src = data_sp->GetBytes();
```
Thank you.
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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
DavidSpickett added inline comments.
Comment at:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221
+
+ uint8_t *src = const_cast(data_sp->GetBytes());
+ if (src == nullptr) {
seehearfeel wrote:
> DavidSpickett wrote:
> > Possibly not needed const cast.
> If no const cast, build failed:
>
> ```
> /home/loongson/llvm.git/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221:12:
> error: cannot initialize a variable of type 'uint8_t *' (aka 'unsigned char
> *') with an rvalue of type 'const uint8_t *' (aka 'const unsigned char *')
> uint8_t *src = data_sp->GetBytes();
>^ ~~~
> 1 error generated.
> ```
Yes, for the way you've written it that makes sense. But I realise I was
looking at the wrong thing here. It's fine that the GetBytes() is const because
this is a WriteRegister call, that's expected.
You should be fine using `const uint8_t*` here, because you can still increment
that pointer and memcpy from it. Since the pointer itself can change but the
data it points to is const.
https://godbolt.org/z/9M9oqr575 might explain it better.
Comment at:
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:60
+ virtual bool WriteGPR() = 0;
+ virtual bool WriteFPR() = 0;
+};
seehearfeel wrote:
> DavidSpickett wrote:
> > This doesn't look right, I'd expect `bool ... () override;` here.
> Maybe we should leave it as is, the other archs do the same thing,
> they will be override in the following file which is not implemented now:
> lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h/cpp,
> otherwise build failed:
>
> ```
> In file included from
> /home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp:19:
> /home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:57:18:
> error: only virtual member functions can be marked 'override'
> bool ReadGPR() override;
> ^~~~
> /home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:58:18:
> error: only virtual member functions can be marked 'override'
> bool ReadFPR() override;
> ^~~~
> /home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:59:19:
> error: only virtual member functions can be marked 'override'
> bool WriteGPR() override;
> ^~~~
> /home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:60:19:
> error: only virtual member functions can be marked 'override'
> bool WriteFPR() override;
> ^~~~
> 4 errors generated.
> ```
Yes I think I was looking at one of the core file versions and didn't realise.
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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
seehearfeel added inline comments.
Comment at:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:27
+// NT_PRSTATUS and NT_FPREGSET definition
+#include
+
SixWeining wrote:
> [[ https://llvm.org/docs/CodingStandards.html#include-style | Should be
> sorted lexicographically by the full path ]]. So put it before `sys/uio.h`.
OK, will modify it, thank you.
Comment at:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221
+
+ uint8_t *src = const_cast(data_sp->GetBytes());
+ if (src == nullptr) {
DavidSpickett wrote:
> Possibly not needed const cast.
If no const cast, build failed:
```
/home/loongson/llvm.git/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221:12:
error: cannot initialize a variable of type 'uint8_t *' (aka 'unsigned char
*') with an rvalue of type 'const uint8_t *' (aka 'const unsigned char *')
uint8_t *src = data_sp->GetBytes();
^ ~~~
1 error generated.
```
Comment at:
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:60
+ virtual bool WriteGPR() = 0;
+ virtual bool WriteFPR() = 0;
+};
DavidSpickett wrote:
> This doesn't look right, I'd expect `bool ... () override;` here.
Maybe we should leave it as is, the other archs do the same thing,
they will be override in the following file which is not implemented now:
lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h/cpp,
otherwise build failed:
```
In file included from
/home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp:19:
/home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:57:18:
error: only virtual member functions can be marked 'override'
bool ReadGPR() override;
^~~~
/home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:58:18:
error: only virtual member functions can be marked 'override'
bool ReadFPR() override;
^~~~
/home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:59:19:
error: only virtual member functions can be marked 'override'
bool WriteGPR() override;
^~~~
/home/loongson/llvm.git/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:60:19:
error: only virtual member functions can be marked 'override'
bool WriteFPR() override;
^~~~
4 errors generated.
```
Comment at:
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp:138
+size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetCount() const {
+ return k_num_register_sets - 1;
+}
DavidSpickett wrote:
> SixWeining wrote:
> > Why `- 1`?
> I had the same thought. From the few others I looked at, it seems that it's
> count not the last index. So if you've got N sets it should return N.
You are right, will modify it, thank you.
Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:35
+ {
\
+loongarch_dwarf::dwarf_##reg, loongarch_dwarf::dwarf_##reg, generic_kind,
\
+LLDB_INVALID_REGNUM, reg##_loongarch
\
SixWeining wrote:
> unnecessary indent?
Yes, will modify it, thank you.
Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:56
+
+#define DEFINE_FPR64(reg, generic_kind)
\
+ {
\
SixWeining wrote:
> Not allow accessing FPR registers through ABI names?
Will modify it, thank you.
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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
DavidSpickett added inline comments.
Comment at:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:194
+
+ uint8_t *dst = const_cast(data_sp->GetBytes());
+ ::memcpy(dst, GetGPRBuffer(), GetGPRSize());
I'm not sure const cast is needed.
Comment at:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:221
+
+ uint8_t *src = const_cast(data_sp->GetBytes());
+ if (src == nullptr) {
Possibly not needed const cast.
Comment at:
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:32
+
+ virtual size_t GetGPRSize();
+
Some of these can be override I'm pretty sure.
If you don't want to check manually I think there is some "possible override"
warning in gcc at least.
(and they don't need to be virtual, unless there's some derived class of this
that I've missed)
Comment at:
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h:60
+ virtual bool WriteGPR() = 0;
+ virtual bool WriteFPR() = 0;
+};
This doesn't look right, I'd expect `bool ... () override;` here.
Comment at:
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp:138
+size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetCount() const {
+ return k_num_register_sets - 1;
+}
SixWeining wrote:
> Why `- 1`?
I had the same thought. From the few others I looked at, it seems that it's
count not the last index. So if you've got N sets it should return N.
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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
SixWeining added inline comments.
Comment at:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp:27
+// NT_PRSTATUS and NT_FPREGSET definition
+#include
+
[[ https://llvm.org/docs/CodingStandards.html#include-style | Should be sorted
lexicographically by the full path ]]. So put it before `sys/uio.h`.
Comment at:
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp:138
+size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetCount() const {
+ return k_num_register_sets - 1;
+}
Why `- 1`?
Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:35
+ {
\
+loongarch_dwarf::dwarf_##reg, loongarch_dwarf::dwarf_##reg, generic_kind,
\
+LLDB_INVALID_REGNUM, reg##_loongarch
\
unnecessary indent?
Comment at: lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h:56
+
+#define DEFINE_FPR64(reg, generic_kind)
\
+ {
\
Not allow accessing FPR registers through ABI names?
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[Lldb-commits] [PATCH] D138407: [LLDB] Add LoongArch register definitions and operations
seehearfeel created this revision.
seehearfeel added reviewers: SixWeining, wangleiat, xen0n, xry111, MaskRay,
DavidSpickett.
Herald added a subscriber: StephenFan.
Herald added a project: All.
seehearfeel requested review of this revision.
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Use the same register layout as Linux kernel, implement the
related read and write operations.
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Files:
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
lldb/source/Plugins/Process/Utility/CMakeLists.txt
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.h
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h
lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
lldb/source/Utility/LoongArch_DWARF_Registers.h
Index: lldb/source/Utility/LoongArch_DWARF_Registers.h
===
--- /dev/null
+++ lldb/source/Utility/LoongArch_DWARF_Registers.h
@@ -0,0 +1,117 @@
+//===-- LoongArch_DWARF_Registers.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+#define LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
+
+#include "lldb/lldb-private.h"
+
+namespace loongarch_dwarf {
+
+enum {
+ dwarf_gpr_r0 = 0,
+ dwarf_gpr_r1,
+ dwarf_gpr_r2,
+ dwarf_gpr_r3,
+ dwarf_gpr_r4,
+ dwarf_gpr_r5,
+ dwarf_gpr_r6,
+ dwarf_gpr_r7,
+ dwarf_gpr_r8,
+ dwarf_gpr_r9,
+ dwarf_gpr_r10,
+ dwarf_gpr_r11,
+ dwarf_gpr_r12,
+ dwarf_gpr_r13,
+ dwarf_gpr_r14,
+ dwarf_gpr_r15,
+ dwarf_gpr_r16,
+ dwarf_gpr_r17,
+ dwarf_gpr_r18,
+ dwarf_gpr_r19,
+ dwarf_gpr_r20,
+ dwarf_gpr_r21,
+ dwarf_gpr_r22,
+ dwarf_gpr_r23,
+ dwarf_gpr_r24,
+ dwarf_gpr_r25,
+ dwarf_gpr_r26,
+ dwarf_gpr_r27,
+ dwarf_gpr_r28,
+ dwarf_gpr_r29,
+ dwarf_gpr_r30,
+ dwarf_gpr_r31 = 31,
+
+ dwarf_gpr_orig_a0,
+ dwarf_gpr_pc,
+ dwarf_gpr_badv,
+
+ dwarf_gpr_reserved0 = 35,
+ dwarf_gpr_reserved1,
+ dwarf_gpr_reserved2,
+ dwarf_gpr_reserved3,
+ dwarf_gpr_reserved4,
+ dwarf_gpr_reserved5,
+ dwarf_gpr_reserved6,
+ dwarf_gpr_reserved7,
+ dwarf_gpr_reserved8,
+ dwarf_gpr_reserved9,
+
+ dwarf_fpr_f0 = 45,
+ dwarf_fpr_f1,
+ dwarf_fpr_f2,
+ dwarf_fpr_f3,
+ dwarf_fpr_f4,
+ dwarf_fpr_f5,
+ dwarf_fpr_f6,
+ dwarf_fpr_f7,
+ dwarf_fpr_f8,
+ dwarf_fpr_f9,
+ dwarf_fpr_f10,
+ dwarf_fpr_f11,
+ dwarf_fpr_f12,
+ dwarf_fpr_f13,
+ dwarf_fpr_f14,
+ dwarf_fpr_f15,
+ dwarf_fpr_f16,
+ dwarf_fpr_f17,
+ dwarf_fpr_f18,
+ dwarf_fpr_f19,
+ dwarf_fpr_f20,
+ dwarf_fpr_f21,
+ dwarf_fpr_f22,
+ dwarf_fpr_f23,
+ dwarf_fpr_f24,
+ dwarf_fpr_f25,
+ dwarf_fpr_f26,
+ dwarf_fpr_f27,
+ dwarf_fpr_f28,
+ dwarf_fpr_f29,
+ dwarf_fpr_f30,
+ dwarf_fpr_f31 = 76,
+
+ dwarf_fpr_fcc0,
+ dwarf_fpr_fcc1,
+ dwarf_fpr_fcc2,
+ dwarf_fpr_fcc3,
+ dwarf_fpr_fcc4,
+ dwarf_fpr_fcc5,
+ dwarf_fpr_fcc6,
+ dwarf_fpr_fcc7,
+ dwarf_fpr_fcsr,
+
+ // register name alias
+ dwarf_gpr_ra = dwarf_gpr_r1,
+ dwarf_gpr_sp = dwarf_gpr_r3,
+ dwarf_gpr_fp = dwarf_gpr_r22,
+
+};
+
+} // namespace loongarch_dwarf
+
+#endif // LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
Index: lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
===
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/lldb-loongarch-register-enums.h
@@ -0,0 +1,116 @@
+//===-- lldb-loongarch-register-enums.h -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_LOONGARCH_REGISTER_ENUMS_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_LOONGARCH_REGISTER_ENUMS_H
+
+// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
+
+// Internal codes for all loongarch registers.
+enum {
+ // The same order as user_regs_struct in
+ // note: these enum values are used as byte_offset
+ gpr_first_loongarch = 0,
+ gpr_r0_loongarch = gpr_first_loongarch,
+ gpr_r1_loongarch,
+ gpr_r2_loongarch,
+ gpr_r3_loongarch,
+ gpr_r4_loongarch,
+ gpr_r5_loongarch,
+
