[llvm-branch-commits] [lld] 764e282 - [LLD][COFF] Skip computation of the undefined symbols references that are not shown
Author: Sylvain Audi
Date: 2020-07-22T13:12:04+02:00
New Revision: 764e28231e4b3b04748ac1c85576402bb76919de
URL:
https://github.com/llvm/llvm-project/commit/764e28231e4b3b04748ac1c85576402bb76919de
DIFF:
https://github.com/llvm/llvm-project/commit/764e28231e4b3b04748ac1c85576402bb76919de.diff
LOG: [LLD][COFF] Skip computation of the undefined symbols references that are
not shown
The "undefined symbol" error message from lld-link displays up to 3 references
to that symbol, and the number of extra references not shown.
This patch removes the computation of the strings for those extra references.
It fixes a freeze of lld-link we accidentally encountered when activating asan
on a large project, without linking with the asan library.
In that case, __asan_report_load8 was referenced more than 2 million times,
causing the computation of that many display strings, of which only 3 were used.
Differential Revision: https://reviews.llvm.org/D83510
(cherry picked from commit 3a108ab256dba7b5a7304f0e83818673d334405f)
Added:
lld/test/COFF/Inputs/undefined-symbol-multi-lto.ll
Modified:
lld/COFF/SymbolTable.cpp
lld/test/COFF/undefined-symbol-multi.s
Removed:
diff --git a/lld/COFF/SymbolTable.cpp b/lld/COFF/SymbolTable.cpp
index d4d2a159a639..173e32f628ef 100644
--- a/lld/COFF/SymbolTable.cpp
+++ b/lld/COFF/SymbolTable.cpp
@@ -136,12 +136,16 @@ getFileLine(const SectionChunk *c, uint32_t addr) {
// of all references to that symbol from that file. If no debug information is
// available, returns just the name of the file, else one string per actual
// reference as described in the debug info.
-std::vector getSymbolLocations(ObjFile *file, uint32_t symIndex) {
+// Returns up to maxStrings string descriptions, along with the total number of
+// locations found.
+static std::pair, size_t>
+getSymbolLocations(ObjFile *file, uint32_t symIndex, size_t maxStrings) {
struct Location {
Symbol *sym;
std::pair fileLine;
};
std::vector locations;
+ size_t numLocations = 0;
for (Chunk *c : file->getChunks()) {
auto *sc = dyn_cast(c);
@@ -150,6 +154,10 @@ std::vector getSymbolLocations(ObjFile *file,
uint32_t symIndex) {
for (const coff_relocation &r : sc->getRelocs()) {
if (r.SymbolTableIndex != symIndex)
continue;
+ numLocations++;
+ if (locations.size() >= maxStrings)
+continue;
+
Optional> fileLine =
getFileLine(sc, r.VirtualAddress);
Symbol *sym = getSymbol(sc, r.VirtualAddress);
@@ -160,8 +168,12 @@ std::vector getSymbolLocations(ObjFile *file,
uint32_t symIndex) {
}
}
- if (locations.empty())
-return std::vector({"\n>>> referenced by " + toString(file)});
+ if (maxStrings == 0)
+return std::make_pair(std::vector(), numLocations);
+
+ if (numLocations == 0)
+return std::make_pair(
+std::vector{"\n>>> referenced by " + toString(file)}, 1);
std::vector symbolLocations(locations.size());
size_t i = 0;
@@ -175,17 +187,26 @@ std::vector getSymbolLocations(ObjFile
*file, uint32_t symIndex) {
if (loc.sym)
os << ":(" << toString(*loc.sym) << ')';
}
- return symbolLocations;
+ return std::make_pair(symbolLocations, numLocations);
+}
+
+std::vector getSymbolLocations(ObjFile *file, uint32_t symIndex) {
+ return getSymbolLocations(file, symIndex, SIZE_MAX).first;
}
-std::vector getSymbolLocations(InputFile *file,
-uint32_t symIndex) {
+static std::pair, size_t>
+getSymbolLocations(InputFile *file, uint32_t symIndex, size_t maxStrings) {
if (auto *o = dyn_cast(file))
-return getSymbolLocations(o, symIndex);
- if (auto *b = dyn_cast(file))
-return getSymbolLocations(b);
+return getSymbolLocations(o, symIndex, maxStrings);
+ if (auto *b = dyn_cast(file)) {
+std::vector symbolLocations = getSymbolLocations(b);
+size_t numLocations = symbolLocations.size();
+if (symbolLocations.size() > maxStrings)
+ symbolLocations.resize(maxStrings);
+return std::make_pair(symbolLocations, numLocations);
+ }
llvm_unreachable("unsupported file type passed to getSymbolLocations");
- return {};
+ return std::make_pair(std::vector(), (size_t)0);
}
// For an undefined symbol, stores all files referencing it and the index of
@@ -205,20 +226,21 @@ static void reportUndefinedSymbol(const UndefinedDiag
&undefDiag) {
os << "undefined symbol: " << toString(*undefDiag.sym);
const size_t maxUndefReferences = 3;
- size_t i = 0, numRefs = 0;
+ size_t numDisplayedRefs = 0, numRefs = 0;
for (const UndefinedDiag::File &ref : undefDiag.files) {
-std::vector symbolLocations =
-getSymbolLocations(ref.file, ref.symIndex);
-numRefs += symbolLocations.size();
+std::vector symbolLocations;
+size_t totalLocations = 0;
+std::tie(symbolLocations, totalLocations) = getSymbolLocati
[llvm-branch-commits] [llvm] c522fd0 - [PowerPC] Fix wrong codegen when stack pointer has to realign performing dynalloc
Author: Kai Luo
Date: 2020-07-22T16:01:53+02:00
New Revision: c522fd02da1b0dcadeae041d12fe35e52ce0973f
URL:
https://github.com/llvm/llvm-project/commit/c522fd02da1b0dcadeae041d12fe35e52ce0973f
DIFF:
https://github.com/llvm/llvm-project/commit/c522fd02da1b0dcadeae041d12fe35e52ce0973f.diff
LOG: [PowerPC] Fix wrong codegen when stack pointer has to realign performing
dynalloc
Current powerpc backend generates wrong code sequence if stack pointer
has to realign if `-fstack-clash-protection` enabled. When probing
dynamic stack allocation, current `PREPARE_PROBED_ALLOCA` takes
`NegSizeReg` as input and returns
`FinalStackPtr`. `FinalStackPtr=StackPtr+ActualNegSize` is calculated
correctly, however code following `PREPARE_PROBED_ALLOCA` still uses
value of `NegSizeReg`, which does not contain `ActualNegSize` if
`MaxAlign > TargetAlign`, to calculate loop trip count and residual
number of bytes.
This patch is part of fix of
https://bugs.llvm.org/show_bug.cgi?id=46759.
Differential Revision: https://reviews.llvm.org/D84152
(cherry picked from commit c3f9697f1f227296818fbaf1a770a29842ea454c)
Added:
Modified:
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/test/CodeGen/PowerPC/pr46759.ll
llvm/test/CodeGen/PowerPC/stack-clash-dynamic-alloca.ll
Removed:
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index ddfbd04e1ebc..11454841cab7 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -11950,18 +11950,34 @@ PPCTargetLowering::emitProbedAlloca(MachineInstr &MI,
Register SPReg = isPPC64 ? PPC::X1 : PPC::R1;
Register FinalStackPtr = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC);
Register FramePointer = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC);
-
- // Get the canonical FinalStackPtr like what
- // PPCRegisterInfo::lowerDynamicAlloc does.
- BuildMI(*MBB, {MI}, DL,
- TII->get(isPPC64 ? PPC::PREPARE_PROBED_ALLOCA_64
- : PPC::PREPARE_PROBED_ALLOCA_32),
- FramePointer)
- .addDef(FinalStackPtr)
+ Register ActualNegSizeReg = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC);
+
+ // Since value of NegSizeReg might be realigned in prologepilog, insert a
+ // PREPARE_PROBED_ALLOCA pseudo instruction to get actual FramePointer and
+ // NegSize.
+ unsigned ProbeOpc;
+ if (!MRI.hasOneNonDBGUse(NegSizeReg))
+ProbeOpc =
+isPPC64 ? PPC::PREPARE_PROBED_ALLOCA_64 :
PPC::PREPARE_PROBED_ALLOCA_32;
+ else
+// By introducing PREPARE_PROBED_ALLOCA_NEGSIZE_OPT, ActualNegSizeReg
+// and NegSizeReg will be allocated in the same phyreg to avoid
+// redundant copy when NegSizeReg has only one use which is current MI and
+// will be replaced by PREPARE_PROBED_ALLOCA then.
+ProbeOpc = isPPC64 ? PPC::PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64
+ : PPC::PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32;
+ BuildMI(*MBB, {MI}, DL, TII->get(ProbeOpc), FramePointer)
+ .addDef(ActualNegSizeReg)
.addReg(NegSizeReg)
.add(MI.getOperand(2))
.add(MI.getOperand(3));
+ // Calculate final stack pointer, which equals to SP + ActualNegSize.
+ BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::ADD8 : PPC::ADD4),
+ FinalStackPtr)
+ .addReg(SPReg)
+ .addReg(ActualNegSizeReg);
+
// Materialize a scratch register for update.
int64_t NegProbeSize = -(int64_t)ProbeSize;
assert(isInt<32>(NegProbeSize) && "Unhandled probe size!");
@@ -11982,7 +11998,7 @@ PPCTargetLowering::emitProbedAlloca(MachineInstr &MI,
// Probing leading residual part.
Register Div = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC);
BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::DIVD : PPC::DIVW), Div)
-.addReg(NegSizeReg)
+.addReg(ActualNegSizeReg)
.addReg(ScratchReg);
Register Mul = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC);
BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::MULLD : PPC::MULLW), Mul)
@@ -11991,7 +12007,7 @@ PPCTargetLowering::emitProbedAlloca(MachineInstr &MI,
Register NegMod = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC);
BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::SUBF8 : PPC::SUBF), NegMod)
.addReg(Mul)
-.addReg(NegSizeReg);
+.addReg(ActualNegSizeReg);
BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::STDUX : PPC::STWUX), SPReg)
.addReg(FramePointer)
.addReg(SPReg)
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index 1c457d4170d5..6956c40a70be 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -431,9 +431,14 @@ def PROBED_
[llvm-branch-commits] [llvm] e95e071 - [PowerPC] Fix wrong codegen when stack pointer has to realign in prologue
Author: Kai Luo
Date: 2020-07-22T15:58:00+02:00
New Revision: e95e071b6b68929527570cb830e5f3bc8b992e04
URL:
https://github.com/llvm/llvm-project/commit/e95e071b6b68929527570cb830e5f3bc8b992e04
DIFF:
https://github.com/llvm/llvm-project/commit/e95e071b6b68929527570cb830e5f3bc8b992e04.diff
LOG: [PowerPC] Fix wrong codegen when stack pointer has to realign in prologue
Current powerpc backend generates wrong code sequence if stack pointer
has to realign if -fstack-clash-protection enabled. When probing in
prologue, backend should generate a subtraction instruction rather
than a `stux` instruction to realign the stack pointer.
This patch is part of fix of
https://bugs.llvm.org/show_bug.cgi?id=46759.
Differential Revision: https://reviews.llvm.org/D84218
(cherry picked from commit 8912252252c87d8ef6623ecf9fdde444560ee4b9)
Added:
Modified:
llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
llvm/test/CodeGen/PowerPC/pr46759.ll
Removed:
diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
index bd9174c1973d..2ee394e9259d 100644
--- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -1466,11 +1466,10 @@ void PPCFrameLowering::inlineStackProbe(MachineFunction
&MF,
.addImm(0)
.addImm(32 - Log2(MaxAlign))
.addImm(31);
-BuildMI(PrologMBB, {MI}, DL, TII.get(isPPC64 ? PPC::STDUX : PPC::STWUX),
+BuildMI(PrologMBB, {MI}, DL, TII.get(isPPC64 ? PPC::SUBFC8 : PPC::SUBFC),
SPReg)
-.addReg(FPReg)
-.addReg(SPReg)
-.addReg(ScratchReg);
+.addReg(ScratchReg)
+.addReg(SPReg);
}
// Probe residual part.
if (NegResidualSize) {
diff --git a/llvm/test/CodeGen/PowerPC/pr46759.ll
b/llvm/test/CodeGen/PowerPC/pr46759.ll
index 2c0af8950099..4d3e8cadc21e 100644
--- a/llvm/test/CodeGen/PowerPC/pr46759.ll
+++ b/llvm/test/CodeGen/PowerPC/pr46759.ll
@@ -12,7 +12,7 @@ define void @foo(i32 %vla_size) #0 {
; CHECK-LE-NEXT:mr r12, r1
; CHECK-LE-NEXT:.cfi_def_cfa r12, 0
; CHECK-LE-NEXT:clrldi r0, r12, 53
-; CHECK-LE-NEXT:stdux r12, r1, r0
+; CHECK-LE-NEXT:subc r1, r1, r0
; CHECK-LE-NEXT:stdu r12, -2048(r1)
; CHECK-LE-NEXT:stdu r12, -4096(r1)
; CHECK-LE-NEXT:.cfi_def_cfa_register r1
___
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[llvm-branch-commits] [llvm] ba5bbd4 - [PowerPC] Precommit test case for PR46759. NFC.
Author: Kai Luo
Date: 2020-07-22T15:58:00+02:00
New Revision: ba5bbd4bd00f8aacf379cdcb738b149a1f63166a
URL:
https://github.com/llvm/llvm-project/commit/ba5bbd4bd00f8aacf379cdcb738b149a1f63166a
DIFF:
https://github.com/llvm/llvm-project/commit/ba5bbd4bd00f8aacf379cdcb738b149a1f63166a.diff
LOG: [PowerPC] Precommit test case for PR46759. NFC.
(cherry picked from commit 817767abeec8343b20de83f8b1b2c8c20bbbe00a)
Added:
llvm/test/CodeGen/PowerPC/pr46759.ll
Modified:
Removed:
diff --git a/llvm/test/CodeGen/PowerPC/pr46759.ll
b/llvm/test/CodeGen/PowerPC/pr46759.ll
new file mode 100644
index ..2c0af8950099
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/pr46759.ll
@@ -0,0 +1,58 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
+; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \
+; RUN: -check-prefix=CHECK-LE %s
+
+define void @foo(i32 %vla_size) #0 {
+; CHECK-LE-LABEL: foo:
+; CHECK-LE: # %bb.0: # %entry
+; CHECK-LE-NEXT:std r31, -8(r1)
+; CHECK-LE-NEXT:std r30, -16(r1)
+; CHECK-LE-NEXT:mr r30, r1
+; CHECK-LE-NEXT:mr r12, r1
+; CHECK-LE-NEXT:.cfi_def_cfa r12, 0
+; CHECK-LE-NEXT:clrldi r0, r12, 53
+; CHECK-LE-NEXT:stdux r12, r1, r0
+; CHECK-LE-NEXT:stdu r12, -2048(r1)
+; CHECK-LE-NEXT:stdu r12, -4096(r1)
+; CHECK-LE-NEXT:.cfi_def_cfa_register r1
+; CHECK-LE-NEXT:.cfi_def_cfa_register r30
+; CHECK-LE-NEXT:.cfi_offset r31, -8
+; CHECK-LE-NEXT:.cfi_offset r30, -16
+; CHECK-LE-NEXT:clrldi r3, r3, 32
+; CHECK-LE-NEXT:li r6, -4096
+; CHECK-LE-NEXT:ld r4, 0(r1)
+; CHECK-LE-NEXT:mr r31, r1
+; CHECK-LE-NEXT:addi r3, r3, 15
+; CHECK-LE-NEXT:rldicl r3, r3, 60, 4
+; CHECK-LE-NEXT:rldicl r3, r3, 4, 31
+; CHECK-LE-NEXT:neg r5, r3
+; CHECK-LE-NEXT:li r3, -2048
+; CHECK-LE-NEXT:divd r7, r5, r6
+; CHECK-LE-NEXT:and r3, r5, r3
+; CHECK-LE-NEXT:add r3, r1, r3
+; CHECK-LE-NEXT:mulld r6, r7, r6
+; CHECK-LE-NEXT:sub r5, r5, r6
+; CHECK-LE-NEXT:stdux r4, r1, r5
+; CHECK-LE-NEXT:cmpd r1, r3
+; CHECK-LE-NEXT:beq cr0, .LBB0_2
+; CHECK-LE-NEXT: .LBB0_1: # %entry
+; CHECK-LE-NEXT:#
+; CHECK-LE-NEXT:stdu r4, -4096(r1)
+; CHECK-LE-NEXT:cmpd r1, r3
+; CHECK-LE-NEXT:bne cr0, .LBB0_1
+; CHECK-LE-NEXT: .LBB0_2: # %entry
+; CHECK-LE-NEXT:addi r3, r1, 2048
+; CHECK-LE-NEXT:lbz r3, 0(r3)
+; CHECK-LE-NEXT:ld r1, 0(r1)
+; CHECK-LE-NEXT:ld r31, -8(r1)
+; CHECK-LE-NEXT:ld r30, -16(r1)
+; CHECK-LE-NEXT:blr
+entry:
+ %0 = zext i32 %vla_size to i64
+ %vla = alloca i8, i64 %0, align 2048
+ %1 = load volatile i8, i8* %vla, align 2048
+ ret void
+}
+
+attributes #0 = { "probe-stack"="inline-asm" }
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