[llvm-branch-commits] [lldb] a0b68a2 - [lldb] Deduplicate some tests in TestLldbGdbServer
Author: Pavel Labath
Date: 2020-12-29T09:37:01+01:00
New Revision: a0b68a2925fbe31f4b0af27677d55feaff6b1362
URL:
https://github.com/llvm/llvm-project/commit/a0b68a2925fbe31f4b0af27677d55feaff6b1362
DIFF:
https://github.com/llvm/llvm-project/commit/a0b68a2925fbe31f4b0af27677d55feaff6b1362.diff
LOG: [lldb] Deduplicate some tests in TestLldbGdbServer
Use the new gdb-remote test case factory to generate debugserver and
llgs variants, handling the simple cases first.
Added:
Modified:
lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
Removed:
diff --git a/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
b/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
index 0a93f2ceba08..58df3212f653 100644
--- a/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
+++ b/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
@@ -24,15 +24,7 @@ class
LldbGdbServerTestCase(gdbremote_testcase.GdbRemoteTestCaseBase, DwarfOpcod
mydir = TestBase.compute_mydir(__file__)
-@debugserver_test
-def test_exe_starts_debugserver(self):
-server = self.connect_to_debug_monitor()
-
-@llgs_test
-def test_exe_starts_llgs(self):
-server = self.connect_to_debug_monitor()
-
-def thread_suffix_supported(self):
+def test_thread_suffix_supported(self):
server = self.connect_to_debug_monitor()
self.assertIsNotNone(server)
@@ -44,15 +36,8 @@ def thread_suffix_supported(self):
self.expect_gdbremote_sequence()
-@debugserver_test
-def test_thread_suffix_supported_debugserver(self):
-self.thread_suffix_supported()
-
-@llgs_test
-def test_thread_suffix_supported_llgs(self):
-self.thread_suffix_supported()
-def list_threads_in_stop_reply_supported(self):
+def test_list_threads_in_stop_reply_supported(self):
server = self.connect_to_debug_monitor()
self.assertIsNotNone(server)
@@ -63,15 +48,8 @@ def list_threads_in_stop_reply_supported(self):
True)
self.expect_gdbremote_sequence()
-@debugserver_test
-def test_list_threads_in_stop_reply_supported_debugserver(self):
-self.list_threads_in_stop_reply_supported()
-
-@llgs_test
-def test_list_threads_in_stop_reply_supported_llgs(self):
-self.list_threads_in_stop_reply_supported()
-
-def c_packet_works(self):
+def test_c_packet_works(self):
+self.build()
procs = self.prep_debug_monitor_and_inferior()
self.test_sequence.add_log_lines(
["read packet: $c#63",
@@ -80,17 +58,9 @@ def c_packet_works(self):
self.expect_gdbremote_sequence()
-@debugserver_test
-def test_c_packet_works_debugserver(self):
-self.build()
-self.c_packet_works()
-
-@llgs_test
-def test_c_packet_works_llgs(self):
+@skipIfWindows # No pty support to test any inferior output
+def test_inferior_print_exit(self):
self.build()
-self.c_packet_works()
-
-def inferior_print_exit(self):
procs = self.prep_debug_monitor_and_inferior(
inferior_args=["hello, world"])
self.test_sequence.add_log_lines(
@@ -102,19 +72,8 @@ def inferior_print_exit(self):
context = self.expect_gdbremote_sequence()
self.assertIsNotNone(context)
-@debugserver_test
-def test_inferior_print_exit_debugserver(self):
-self.build()
-self.inferior_print_exit()
-
-@skipIfWindows # No pty support to test any inferior output
-@llgs_test
-@expectedFlakeyLinux("llvm.org/pr25652")
-def test_inferior_print_exit_llgs(self):
+def test_first_launch_stop_reply_thread_matches_first_qC(self):
self.build()
-self.inferior_print_exit()
-
-def first_launch_stop_reply_thread_matches_first_qC(self):
procs = self.prep_debug_monitor_and_inferior()
self.test_sequence.add_log_lines(["read packet: $qC#00",
{"direction": "send",
@@ -127,17 +86,9 @@ def first_launch_stop_reply_thread_matches_first_qC(self):
True)
self.expect_gdbremote_sequence()
-@debugserver_test
-def test_first_launch_stop_reply_thread_matches_first_qC_debugserver(self):
-self.build()
-self.first_launch_stop_reply_thread_matches_first_qC()
-
-@llgs_test
-def test_first_launch_stop_reply_thread_matches_first_qC_llgs(self):
+def test_attach_commandline_continue_app_exits(self):
self.build()
-self.first_launch_stop_reply_thread_matches_first_qC()
-
-def attach_commandline_continue_app_exits(self):
+self.set_inferior_startup_attach()
procs = self.prep_debug_monitor_and_inferior()
self.test_sequence.add_log_lines(
["read packet: $vCont;c#a8",
@@ -160,19 +111,8 @@ def attach_commandline_continue_app
[llvm-branch-commits] [clang] 5abfecc - [ARM][AArch64] Add Cortex-A78C Support for Clang and LLVM
Author: Mark Murray
Date: 2020-12-29T10:18:59Z
New Revision: 5abfeccf10bcbc0d673ece21ddd8d4ac4a0e7594
URL:
https://github.com/llvm/llvm-project/commit/5abfeccf10bcbc0d673ece21ddd8d4ac4a0e7594
DIFF:
https://github.com/llvm/llvm-project/commit/5abfeccf10bcbc0d673ece21ddd8d4ac4a0e7594.diff
LOG: [ARM][AArch64] Add Cortex-A78C Support for Clang and LLVM
This patch upstreams support for the Armv8-a Cortex-A78C
processor for AArch64 and ARM.
In detail:
Adding cortex-a78c as cpu option for aarch64 and arm targets in clang
Adding Cortex-A78C CPU name and ProcessorModel in llvm
Details of the CPU can be found here:
https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-a78c
Added:
Modified:
clang/test/Driver/aarch64-cpus.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/ARMTargetParser.def
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/Target/ARM/ARM.td
llvm/lib/Target/ARM/ARMSubtarget.cpp
llvm/lib/Target/ARM/ARMSubtarget.h
llvm/unittests/Support/TargetParserTest.cpp
Removed:
diff --git a/clang/test/Driver/aarch64-cpus.c
b/clang/test/Driver/aarch64-cpus.c
index 283660b321b3..7ac2473915e8 100644
--- a/clang/test/Driver/aarch64-cpus.c
+++ b/clang/test/Driver/aarch64-cpus.c
@@ -183,6 +183,8 @@
// CORTEXX1: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-x1"
// RUN: %clang -target aarch64 -mcpu=cortex-a78 -### -c %s 2>&1 | FileCheck
-check-prefix=CORTEXA78 %s
// CORTEXA78: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-a78"
+// RUN: %clang -target aarch64 -mcpu=cortex-a78c -### -c %s 2>&1 | FileCheck
-check-prefix=CORTEX-A78C %s
+// CORTEX-A78C: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu"
"cortex-a78c"
// RUN: %clang -target aarch64 -mcpu=neoverse-v1 -### -c %s 2>&1 | FileCheck
-check-prefix=NEOVERSE-V1 %s
// NEOVERSE-V1: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu"
"neoverse-v1"
@@ -475,6 +477,12 @@
// MCPU-MTUNE-THUNDERX2T99: "-cc1"{{.*}} "-triple" "aarch64{{.*}}"
"-target-cpu" "thunderx2t99"
// MCPU-MTUNE-THUNDERX3T110: "-cc1"{{.*}} "-triple" "aarch64{{.*}}"
"-target-cpu" "thunderx3t110"
+// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a78c -### -c %s 2>&1
| FileCheck -check-prefix=CHECK-CORTEX-A78C %s
+// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a78c
-mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck
-check-prefix=CHECK-CORTEX-A78C-MFPU %s
+// CHECK-CORTEX-A78C: "-cc1"{{.*}} "-triple" "armv8.2a-{{.*}} "-target-cpu"
"cortex-a78c"
+// CHECK-CORTEX-A78C-MFPU: "-cc1"{{.*}} "-target-feature" "+fp-armv8"
+// CHECK-CORTEX-A78C-MFPU: "-target-feature" "+crypto"
+
// RUN: %clang -target aarch64 -march=armv8.1a -### -c %s 2>&1 | FileCheck
-check-prefix=GENERICV81A %s
// RUN: %clang -target aarch64 -march=armv8.1-a -### -c %s 2>&1 | FileCheck
-check-prefix=GENERICV81A %s
// RUN: %clang -target aarch64 -mlittle-endian -march=armv8.1a -### -c %s 2>&1
| FileCheck -check-prefix=GENERICV81A %s
diff --git a/llvm/include/llvm/Support/AArch64TargetParser.def
b/llvm/include/llvm/Support/AArch64TargetParser.def
index 97172730e364..f1a5bf734a13 100644
--- a/llvm/include/llvm/Support/AArch64TargetParser.def
+++ b/llvm/include/llvm/Support/AArch64TargetParser.def
@@ -147,6 +147,9 @@ AARCH64_CPU_NAME("cortex-a77", ARMV8_2A,
FK_CRYPTO_NEON_FP_ARMV8, false,
AARCH64_CPU_NAME("cortex-a78", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC
|
AArch64::AEK_SSBS))
+AARCH64_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
+ (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC
|
+ AArch64::AEK_SSBS))
AARCH64_CPU_NAME("cortex-r82", ARMV8R, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_LSE))
AARCH64_CPU_NAME("cortex-x1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
diff --git a/llvm/include/llvm/Support/ARMTargetParser.def
b/llvm/include/llvm/Support/ARMTargetParser.def
index 76341a051dbf..37cf0a93bb04 100644
--- a/llvm/include/llvm/Support/ARMTargetParser.def
+++ b/llvm/include/llvm/Support/ARMTargetParser.def
@@ -300,8 +300,10 @@ ARM_CPU_NAME("cortex-a76ae", ARMV8_2A,
FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("cortex-a77", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
-ARM_CPU_NAME("cortex-a78",ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
+ARM_CPU_NAME("cortex-a78", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
+ARM_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
+ ARM::AEK_FP16 | ARM::AEK_DOTPROD)
ARM_CPU_NAME("cortex-x1", ARMV8_2A, FK_CRYPTO_NE
[llvm-branch-commits] [llvm] 0a19fc3 - [PowerPC] Disable CTR loops containing operations on half-precision
Author: Nemanja Ivanovic
Date: 2020-12-29T05:12:50-06:00
New Revision: 0a19fc3088f58f9a73fdb39a373cba7885be557f
URL:
https://github.com/llvm/llvm-project/commit/0a19fc3088f58f9a73fdb39a373cba7885be557f
DIFF:
https://github.com/llvm/llvm-project/commit/0a19fc3088f58f9a73fdb39a373cba7885be557f.diff
LOG: [PowerPC] Disable CTR loops containing operations on half-precision
On subtargets prior to Power9, conversions to/from half precision
are lowered to libcalls. This makes loops containing such operations
invalid candidates for HW loops.
Fixes: https://bugs.llvm.org/show_bug.cgi?id=48519
Added:
llvm/test/CodeGen/PowerPC/pr48519.ll
Modified:
llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
Removed:
diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
index 4de1f2aba416..71f867a617c8 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
@@ -629,6 +629,10 @@ bool PPCTTIImpl::mightUseCTR(BasicBlock *BB,
TargetLibraryInfo *LibInfo,
isLargeIntegerTy(!TM.isPPC64(), CI->getSrcTy()->getScalarType()) ||
isLargeIntegerTy(!TM.isPPC64(), CI->getDestTy()->getScalarType()))
return true;
+ if (!ST->isISA3_0() &&
+ (CI->getSrcTy()->getScalarType()->isHalfTy() ||
+ CI->getDestTy()->getScalarType()->isHalfTy()))
+return true;
} else if (isLargeIntegerTy(!TM.isPPC64(),
J->getType()->getScalarType()) &&
(J->getOpcode() == Instruction::UDiv ||
diff --git a/llvm/test/CodeGen/PowerPC/pr48519.ll
b/llvm/test/CodeGen/PowerPC/pr48519.ll
new file mode 100644
index ..777874e91c26
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/pr48519.ll
@@ -0,0 +1,55 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
+; RUN: -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s
+define void @julia__typed_vcat_20() #0 {
+; CHECK-LABEL: julia__typed_vcat_20:
+; CHECK: # %bb.0: # %top
+; CHECK-NEXT:mflr r0
+; CHECK-NEXT:std r30, -16(r1) # 8-byte Folded Spill
+; CHECK-NEXT:std r0, 16(r1)
+; CHECK-NEXT:stdu r1, -48(r1)
+; CHECK-NEXT:li r3, 1
+; CHECK-NEXT:li r30, 0
+; CHECK-NEXT:.p2align 4
+; CHECK-NEXT: .LBB0_1: # %L139
+; CHECK-NEXT:#
+; CHECK-NEXT:addi r3, r3, -1
+; CHECK-NEXT:mtfprd f0, r3
+; CHECK-NEXT:xscvsxdsp f1, f0
+; CHECK-NEXT:bl __gnu_f2h_ieee
+; CHECK-NEXT:nop
+; CHECK-NEXT:bl __gnu_h2f_ieee
+; CHECK-NEXT:nop
+; CHECK-NEXT:addi r30, r30, -1
+; CHECK-NEXT:li r3, 0
+; CHECK-NEXT:cmpldi r30, 0
+; CHECK-NEXT:bne+ cr0, .LBB0_1
+; CHECK-NEXT: # %bb.2: # %pass.1
+; CHECK-NEXT:bl __gnu_f2h_ieee
+; CHECK-NEXT:nop
+; CHECK-NEXT:sth r3, 0(r3)
+top:
+ %.sroa.6.0.copyload = load i64, i64 addrspace(11)* null, align 8
+ %0 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %.sroa.6.0.copyload,
i64 0)
+ %1 = extractvalue { i64, i1 } %0, 0
+ br label %L139
+
+L139: ; preds = %L139, %top
+ %value_phi21 = phi i64 [ %5, %L139 ], [ 1, %top ]
+ %value_phi23 = phi i64 [ 0, %L139 ], [ 1, %top ]
+ %2 = add nsw i64 %value_phi23, -1
+ %3 = add i64 %2, 0
+ %4 = sitofp i64 %3 to half
+ store half %4, half addrspace(13)* undef, align 2
+ %.not101.not = icmp eq i64 %value_phi21, 0
+ %5 = add i64 %value_phi21, 1
+ br i1 %.not101.not, label %pass.1, label %L139
+
+pass.1: ; preds = %L139
+ unreachable
+}
+
+; Function Attrs: nounwind readnone speculatable willreturn
+declare { i64, i1 } @llvm.ssub.with.overflow.i64(i64, i64) #0
+
+attributes #0 = { nounwind }
___
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[llvm-branch-commits] [llvm] aebb4a6 - [RISCV] Rewrite and simplify helper function. NFC.
Author: Fraser Cormack
Date: 2020-12-29T11:29:44Z
New Revision: aebb4a60522615ca4fd542e8ece8df1e4f42d657
URL:
https://github.com/llvm/llvm-project/commit/aebb4a60522615ca4fd542e8ece8df1e4f42d657
DIFF:
https://github.com/llvm/llvm-project/commit/aebb4a60522615ca4fd542e8ece8df1e4f42d657.diff
LOG: [RISCV] Rewrite and simplify helper function. NFC.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D93851
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 92bb316356c6..b643f76e1fb5 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -2487,19 +2487,14 @@ static bool CC_RISCV(const DataLayout &DL,
RISCVABI::ABI ABI, unsigned ValNo,
}
template
-static void preAssignMask(const ArgTy &Args,
- Optional &FirstMaskArgument,
- CCState &CCInfo) {
- unsigned NumArgs = Args.size();
- for (unsigned I = 0; I != NumArgs; ++I) {
-MVT ArgVT = Args[I].VT;
-if (!ArgVT.isScalableVector() ||
-ArgVT.getVectorElementType().SimpleTy != MVT::i1)
- continue;
-
-FirstMaskArgument = I;
-break;
+static Optional preAssignMask(const ArgTy &Args) {
+ for (const auto &ArgIdx : enumerate(Args)) {
+MVT ArgVT = ArgIdx.value().VT;
+if (ArgVT.isScalableVector() &&
+ArgVT.getVectorElementType().SimpleTy == MVT::i1)
+ return ArgIdx.index();
}
+ return None;
}
void RISCVTargetLowering::analyzeInputArgs(
@@ -2510,7 +2505,7 @@ void RISCVTargetLowering::analyzeInputArgs(
Optional FirstMaskArgument;
if (Subtarget.hasStdExtV())
-preAssignMask(Ins, FirstMaskArgument, CCInfo);
+FirstMaskArgument = preAssignMask(Ins);
for (unsigned i = 0; i != NumArgs; ++i) {
MVT ArgVT = Ins[i].VT;
@@ -2541,7 +2536,7 @@ void RISCVTargetLowering::analyzeOutputArgs(
Optional FirstMaskArgument;
if (Subtarget.hasStdExtV())
-preAssignMask(Outs, FirstMaskArgument, CCInfo);
+FirstMaskArgument = preAssignMask(Outs);
for (unsigned i = 0; i != NumArgs; i++) {
MVT ArgVT = Outs[i].VT;
@@ -3312,7 +3307,7 @@ bool RISCVTargetLowering::CanLowerReturn(
Optional FirstMaskArgument;
if (Subtarget.hasStdExtV())
-preAssignMask(Outs, FirstMaskArgument, CCInfo);
+FirstMaskArgument = preAssignMask(Outs);
for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
MVT VT = Outs[i].VT;
___
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[llvm-branch-commits] [llvm] 7486de1 - [PowerPC] Provide patterns for permuted scalar to vector for pre-P8
Author: Nemanja Ivanovic
Date: 2020-12-29T06:49:25-06:00
New Revision: 7486de1b2eced27b0b95598e9ab45039d700
URL:
https://github.com/llvm/llvm-project/commit/7486de1b2eced27b0b95598e9ab45039d700
DIFF:
https://github.com/llvm/llvm-project/commit/7486de1b2eced27b0b95598e9ab45039d700.diff
LOG: [PowerPC] Provide patterns for permuted scalar to vector for pre-P8
We will emit these permuted nodes on all VSX little endian subtargets
but don't have the patterns available to match them on subtargets
that don't have direct moves.
Fixes: https://bugs.llvm.org/show_bug.cgi?id=47916
Added:
llvm/test/CodeGen/PowerPC/pr47916.ll
Modified:
llvm/lib/Target/PowerPC/PPCInstrVSX.td
llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
llvm/test/CodeGen/PowerPC/load-and-splat.ll
Removed:
diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td
b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
index 4e086366af24..136a53e66d62 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
@@ -2412,6 +2412,7 @@ def MrgWords {
// [HasVSX, IsBigEndian]
// [HasVSX, IsLittleEndian]
// [HasVSX, NoP9Vector]
+// [HasVSX, NoP9Vector, IsLittleEndian]
// [HasVSX, HasOnlySwappingMemOps]
// [HasVSX, HasOnlySwappingMemOps, IsBigEndian]
// [HasVSX, HasP8Vector]
@@ -3005,6 +3006,19 @@ defm : ScalToVecWPermute<
VSFRC)), sub_64)>;
} // HasVSX, NoP9Vector
+// Any little endian pre-Power9 VSX subtarget.
+let Predicates = [HasVSX, NoP9Vector, IsLittleEndian] in {
+// Load-and-splat using only X-Form VSX loads.
+defm : ScalToVecWPermute<
+ v2i64, (i64 (load xoaddr:$src)),
+ (XXPERMDIs (XFLOADf64 xoaddr:$src), 2),
+ (SUBREG_TO_REG (i64 1), (XFLOADf64 xoaddr:$src), sub_64)>;
+defm : ScalToVecWPermute<
+ v2f64, (f64 (load xoaddr:$src)),
+ (XXPERMDIs (XFLOADf64 xoaddr:$src), 2),
+ (SUBREG_TO_REG (i64 1), (XFLOADf64 xoaddr:$src), sub_64)>;
+} // HasVSX, NoP9Vector, IsLittleEndian
+
// Any VSX subtarget that only has loads and stores that load in big endian
// order regardless of endianness. This is really pre-Power9 subtargets.
let Predicates = [HasVSX, HasOnlySwappingMemOps] in {
diff --git a/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
b/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
index b7ed8ce9f144..ff251f55afff 100644
--- a/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
+++ b/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
@@ -254,10 +254,11 @@ bool PPCVSXSwapRemoval::gatherVectorInstructions() {
if (!MO.isReg())
continue;
Register Reg = MO.getReg();
-if (isAnyVecReg(Reg, Partial)) {
+// All operands need to be checked because there are instructions that
+// operate on a partial register and produce a full register (such as
+// XXPERMDIs).
+if (isAnyVecReg(Reg, Partial))
RelevantInstr = true;
- break;
-}
}
if (!RelevantInstr)
diff --git a/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
b/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
index cdd04b33318e..35b590dec1b1 100644
--- a/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
+++ b/llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
@@ -8,6 +8,9 @@
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr8 -mattr=-vsx -ppc-asm-full-reg-names \
; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-NOVSX
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: -mcpu=pwr7 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN: FileCheck %s --check-prefix=CHECK-P7
define dso_local <16 x i8> @testmrghb(<16 x i8> %a, <16 x i8> %b)
local_unnamed_addr #0 {
; CHECK-P8-LABEL: testmrghb:
@@ -24,6 +27,11 @@ define dso_local <16 x i8> @testmrghb(<16 x i8> %a, <16 x
i8> %b) local_unnamed_
; CHECK-NOVSX: # %bb.0: # %entry
; CHECK-NOVSX-NEXT:vmrghb v2, v3, v2
; CHECK-NOVSX-NEXT:blr
+;
+; CHECK-P7-LABEL: testmrghb:
+; CHECK-P7: # %bb.0: # %entry
+; CHECK-P7-NEXT:vmrghb v2, v3, v2
+; CHECK-P7-NEXT:blr
entry:
%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32>
ret <16 x i8> %shuffle
@@ -46,6 +54,11 @@ define dso_local <16 x i8> @testmrghb2(<16 x i8> %a, <16 x
i8> %b) local_unnamed
; CHECK-NOVSX-NEXT:lvx v4, 0, r3
; CHECK-NOVSX-NEXT:vperm v2, v3, v2, v4
; CHECK-NOVSX-NEXT:blr
+;
+; CHECK-P7-LABEL: testmrghb2:
+; CHECK-P7: # %bb.0: # %entry
+; CHECK-P7-NEXT:vmrghb v2, v2, v3
+; CHECK-P7-NEXT:blr
entry:
%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32>
ret <16 x i8> %shuffle
@@ -65,6 +78,11 @@ define dso_local <16 x i8> @testmrghh(<16 x i8> %a, <16 x
i8> %b) local_unnamed_
; CHECK-NOVSX: # %bb.0: # %entry
; CH
[llvm-branch-commits] [llvm] 374ef57 - [InstCombine] 'hoist xor-by-constant from xor-by-value': completely give up on constant exprs
Author: Roman Lebedev
Date: 2020-12-29T16:28:18+03:00
New Revision: 374ef57f1379d3d3bbe5bfb19f1d2ea7e79b6db9
URL:
https://github.com/llvm/llvm-project/commit/374ef57f1379d3d3bbe5bfb19f1d2ea7e79b6db9
DIFF:
https://github.com/llvm/llvm-project/commit/374ef57f1379d3d3bbe5bfb19f1d2ea7e79b6db9.diff
LOG: [InstCombine] 'hoist xor-by-constant from xor-by-value': completely give
up on constant exprs
As Mikael Holmén is noting in the post-commit review for the first fix
https://reviews.llvm.org/rGd4ccef38d0bb#967466
not hoisting constantexprs is not enough,
because if the xor originally was a constantexpr (i.e. X is a constantexpr).
`SimplifyAssociativeOrCommutative()` in `visitXor()` will immediately
undo this transform, thus again causing an infinite combine loop.
This transform has resulted in a surprising number of constantexpr failures.
Added:
Modified:
llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor-by-value.ll
Removed:
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index c0823c950368..15dcf2d19c15 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -3459,9 +3459,11 @@ Instruction *InstCombinerImpl::visitXor(BinaryOperator
&I) {
// Otherwise, if all else failed, try to hoist the xor-by-constant:
// (X ^ C) ^ Y --> (X ^ Y) ^ C
- // Just like we do in other places, we avoid the fold for constantexprs,
- // at least to avoid endless combine loop.
- if (match(&I, m_c_Xor(m_OneUse(m_Xor(m_Value(X), m_ImmConstant(C1))),
+ // Just like we do in other places, we completely avoid the fold
+ // for constantexprs, at least to avoid endless combine loop.
+ if (match(&I, m_c_Xor(m_OneUse(m_Xor(m_CombineAnd(m_Value(X),
+
m_Unless(m_ConstantExpr())),
+ m_ImmConstant(C1))),
m_Value(Y
return BinaryOperator::CreateXor(Builder.CreateXor(X, Y), C1);
diff --git
a/llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor-by-value.ll
b/llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor-by-value.ll
index 14227d304df7..46bdb1a6092e 100644
---
a/llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor-by-value.ll
+++
b/llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor-by-value.ll
@@ -87,3 +87,23 @@ entry:
%r = xor i8 %or, xor (i8 xor (i8 ptrtoint (i32* @global_constant to i8), i8
-1), i8 xor (i8 ptrtoint (i32* @global_constant2 to i8), i8 -1))
ret i8 %r
}
+
+@global_constant3 = external global [6 x [1 x i64]], align 1
+@global_constant4 = external global i64, align 1
+@global_constant5 = external global i16*, align 1
+
+define i16 @constantexpr2() {
+; CHECK-LABEL: @constantexpr2(
+; CHECK-NEXT:[[I2:%.*]] = load i16*, i16** @global_constant5, align 1
+; CHECK-NEXT:[[I3:%.*]] = load i16, i16* [[I2]], align 1
+; CHECK-NEXT:[[I5:%.*]] = xor i16 [[I3]], xor (i16 zext (i1 icmp ne (i64*
getelementptr inbounds ([6 x [1 x i64]], [6 x [1 x i64]]* @global_constant3,
i64 0, i64 5, i64 0), i64* @global_constant4) to i16), i16 -1)
+; CHECK-NEXT:ret i16 [[I5]]
+;
+ %i0 = icmp ne i64* getelementptr inbounds ([6 x [1 x i64]], [6 x [1 x i64]]*
@global_constant3, i16 0, i16 5, i16 0), @global_constant4
+ %i1 = zext i1 %i0 to i16
+ %i2 = load i16*, i16** @global_constant5, align 1
+ %i3 = load i16, i16* %i2, align 1
+ %i4 = xor i16 %i3, %i1
+ %i5 = xor i16 %i4, -1
+ ret i16 %i5
+}
___
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[llvm-branch-commits] [llvm] b76014a - RegionInfo: use a range-based for loop [NFCI]
Author: Nicolai Hähnle
Date: 2020-12-29T16:00:26+01:00
New Revision: b76014a4f15ad9f3151862fcc6c6ab2f0f505199
URL:
https://github.com/llvm/llvm-project/commit/b76014a4f15ad9f3151862fcc6c6ab2f0f505199
DIFF:
https://github.com/llvm/llvm-project/commit/b76014a4f15ad9f3151862fcc6c6ab2f0f505199.diff
LOG: RegionInfo: use a range-based for loop [NFCI]
Change-Id: I9985d72191a2b0680195032acf8a14ad2ba954ed
Differential Revision: https://reviews.llvm.org/D92932
Added:
Modified:
llvm/include/llvm/Analysis/RegionInfoImpl.h
Removed:
diff --git a/llvm/include/llvm/Analysis/RegionInfoImpl.h
b/llvm/include/llvm/Analysis/RegionInfoImpl.h
index 8d9ec646f519..bbd3dd5dc0ea 100644
--- a/llvm/include/llvm/Analysis/RegionInfoImpl.h
+++ b/llvm/include/llvm/Analysis/RegionInfoImpl.h
@@ -585,10 +585,8 @@ bool RegionInfoBase::isRegion(BlockT *entry, BlockT
*exit) const {
// Exit is the header of a loop that contains the entry. In this case,
// the dominance frontier must only contain the exit.
if (!DT->dominates(entry, exit)) {
-for (typename DST::iterator SI = entrySuccs->begin(),
-SE = entrySuccs->end();
- SI != SE; ++SI) {
- if (*SI != exit && *SI != entry)
+for (BlockT *successor : *entrySuccs) {
+ if (successor != exit && successor != entry)
return false;
}
___
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[llvm-branch-commits] [mlir] cf21667 - [mlir][linalg] Add vectorization for linalg on tensor ops
Author: Thomas Raoux
Date: 2020-12-29T09:02:23-08:00
New Revision: cf216670a0bd1f2ce561a315e00649740f117e1c
URL:
https://github.com/llvm/llvm-project/commit/cf216670a0bd1f2ce561a315e00649740f117e1c
DIFF:
https://github.com/llvm/llvm-project/commit/cf216670a0bd1f2ce561a315e00649740f117e1c.diff
LOG: [mlir][linalg] Add vectorization for linalg on tensor ops
Support vectorization of linalg ops using tensor inputs/outputs.
Differential Revision: https://reviews.llvm.org/D93890
Added:
Modified:
mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
mlir/lib/Dialect/Vector/VectorOps.cpp
mlir/test/Dialect/Linalg/vectorization.mlir
Removed:
diff --git a/mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
b/mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
index 23e452df9184..2a1d4cd2ef57 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
@@ -119,34 +119,38 @@ static bool isElementwise(Operation *op) {
return hasOnlyScalarElementwiseOp(genericOp.getRegion());
}
-static VectorType extractVectorTypeFromScalarView(Value v) {
- MemRefType mt = v.getType().cast();
- return mt.getShape().empty()
- ? VectorType()
- : VectorType::get(mt.getShape(), mt.getElementType());
+static VectorType extractVectorTypeFromShapedValue(Value v) {
+ auto st = v.getType().cast();
+ if (st.isa() && st.getShape().empty())
+return VectorType();
+ return VectorType::get(st.getShape(), st.getElementType());
}
-static Value transferReadVector(OpBuilder &builder, Value memref) {
+static Value transferReadVector(OpBuilder &builder, Value source) {
edsc::ScopedContext scope(builder);
- auto memrefType = memref.getType().cast();
- if (VectorType vectorType = extractVectorTypeFromScalarView(memref)) {
-SmallVector indices(memrefType.getRank(), std_constant_index(0));
-return vector_transfer_read(vectorType, memref, indices);
+ auto shapedType = source.getType().cast();
+ if (VectorType vectorType = extractVectorTypeFromShapedValue(source)) {
+SmallVector indices(shapedType.getRank(), std_constant_index(0));
+return vector_transfer_read(vectorType, source, indices);
}
- return std_load(memref);
+ return std_load(source);
}
-static void transferWriteVector(OpBuilder &builder, Value value, Value memref)
{
+static Value transferWriteVector(OpBuilder &builder, Value value, Value dest) {
edsc::ScopedContext scope(builder);
- auto memrefType = memref.getType().cast();
- if (VectorType vectorType = extractVectorTypeFromScalarView(memref)) {
-SmallVector indices(memrefType.getRank(), std_constant_index(0));
+ Operation *write;
+ auto shapedType = dest.getType().cast();
+ if (VectorType vectorType = extractVectorTypeFromShapedValue(dest)) {
+SmallVector indices(shapedType.getRank(), std_constant_index(0));
if (vectorType != value.getType())
value = vector_broadcast(vectorType, value);
-vector_transfer_write(value, memref, indices);
+write = vector_transfer_write(value, dest, indices);
} else {
-std_store(value, memref);
+write = std_store(value, dest);
}
+ if (!write->getResults().empty())
+return write->getResult(0);
+ return Value();
}
namespace {
@@ -167,10 +171,12 @@ class GenericVectorizer {
void vectorize(Operation &scalarOp) {
auto yieldOp = dyn_cast(scalarOp);
if (yieldOp) {
- for (auto outputAndMemref :
- llvm::zip(yieldOp.values(), generic.getOutputBuffers())) {
-Value vectorValue = vectorize(std::get<0>(outputAndMemref));
-transferWriteVector(builder, vectorValue,
std::get<1>(outputAndMemref));
+ for (auto outputs : llvm::enumerate(yieldOp.values())) {
+Value vectorValue = vectorize(outputs.value());
+Value result = transferWriteVector(builder, vectorValue,
+ generic.getOutput(outputs.index()));
+if (result)
+ results.push_back(result);
}
return;
}
@@ -182,6 +188,8 @@ class GenericVectorizer {
}
}
+ llvm::ArrayRef getResults() { return results; }
+
private:
// Transforms a scalar value into its vectorized counterpart, recursively
// vectorizing operations as necessary using the underlying builder.
@@ -261,6 +269,7 @@ class GenericVectorizer {
OpBuilder &builder;
linalg::GenericOp generic;
llvm::DenseMap valueCache;
+ SmallVector results;
};
} // namespace
@@ -271,6 +280,8 @@ static void vectorizeElementwise(linalg::GenericOp op,
OpBuilder &builder) {
for (Operation &scalarOp : op.region().front()) {
vectorizer.vectorize(scalarOp);
}
+ if (!op->getResults().empty())
+op->replaceAllUsesWith(vectorizer.getResults());
}
LogicalResult mlir::linalg::vectorizeLinalgOpPrecondition(Operation *op) {
@@ -331,32 +342,14 @@ void mlir::linalg::vec
[llvm-branch-commits] [compiler-rt] c1e85b6 - sanitizer: fix typo/spelling: Dissassemble → Disassemble
Author: Michael Stapelberg
Date: 2020-12-29T12:26:57-05:00
New Revision: c1e85b6c1b4d83d24b130b191112e1b99cf74a8a
URL:
https://github.com/llvm/llvm-project/commit/c1e85b6c1b4d83d24b130b191112e1b99cf74a8a
DIFF:
https://github.com/llvm/llvm-project/commit/c1e85b6c1b4d83d24b130b191112e1b99cf74a8a.diff
LOG: sanitizer: fix typo/spelling: Dissassemble → Disassemble
Differential Revision: https://reviews.llvm.org/D93902
Added:
Modified:
compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
Removed:
diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
b/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
index 06301b83ea1f..c99a6ceaa562 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
@@ -211,7 +211,7 @@ static void ReportDeadlySignalImpl(const SignalContext
&sig, u32 tid,
Report("The signal is caused by a %s memory access.\n", access_type);
if (!sig.is_true_faulting_addr)
Report("Hint: this fault was caused by a dereference of a high value "
- "address (see register values below). Dissassemble the provided "
+ "address (see register values below). Disassemble the provided "
"pc to learn which register was used.\n");
else if (sig.addr < GetPageSizeCached())
Report("Hint: address points to the zero page.\n");
___
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[llvm-branch-commits] [llvm] 2ae760e - [RISCV] Add earlyclobber of destination register to vmsbf.m/vmsif.m/vmsof.m instructions
Author: Craig Topper
Date: 2020-12-29T10:00:04-08:00
New Revision: 2ae760e27e6ad27cf16603e2fa805bec45efc68c
URL:
https://github.com/llvm/llvm-project/commit/2ae760e27e6ad27cf16603e2fa805bec45efc68c
DIFF:
https://github.com/llvm/llvm-project/commit/2ae760e27e6ad27cf16603e2fa805bec45efc68c.diff
LOG: [RISCV] Add earlyclobber of destination register to
vmsbf.m/vmsif.m/vmsof.m instructions
The spec for these instructions include this note. "The destination register
cannot overlap either the source register or the mask register ('v0') if the
instruction is masked." So we need earlyclobber to enforce this constraint.
I've regenerated the tests with update_llc_test_checks.py to show the
effects of the earlyclobber.
Reviewed By: khchen, frasercrmck
Differential Revision: https://reviews.llvm.org/D93867
Added:
Modified:
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll
Removed:
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
index 0068b5af2a0e..b50109eecac0 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
@@ -820,11 +820,12 @@ multiclass VPseudoUnaryS_M {
}
multiclass VPseudoUnaryM_M {
+ defvar constraint = "@earlyclobber $rd";
foreach mti = AllMasks in
{
let VLMul = mti.LMul.value in {
- def "_M_" # mti.BX : VPseudoUnaryNoMask;
- def "_M_" # mti.BX # "_MASK" : VPseudoUnaryMask;
+ def "_M_" # mti.BX : VPseudoUnaryNoMask;
+ def "_M_" # mti.BX # "_MASK" : VPseudoUnaryMask;
}
}
}
diff --git a/llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
b/llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
index b0ee5ab3a27f..8be6aab802d8 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+experimental-v -verify-machineinstrs \
; RUN: --riscv-no-aliases < %s | FileCheck %s
declare @llvm.riscv.vmsbf.nxv1i1(
@@ -5,10 +6,13 @@ declare @llvm.riscv.vmsbf.nxv1i1(
i32);
define @intrinsic_vmsbf_m_nxv1i1( %0, i32
%1) nounwind {
+; CHECK-LABEL: intrinsic_vmsbf_m_nxv1i1:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT:vsetvli a0, a0, e8,mf8,ta,mu
+; CHECK-NEXT:vmsbf.m v25, v0
+; CHECK-NEXT:vmv1r.v v0, v25
+; CHECK-NEXT:jalr zero, 0(ra)
entry:
-; CHECK-LABEL: intrinsic_vmsbf_m_nxv1i1
-; CHECK: vsetvli {{.*}}, a0, e8,mf8,ta,mu
-; CHECK: vmsbf.m {{v[0-9]+}}, {{v[0-9]+}}
%a = call @llvm.riscv.vmsbf.nxv1i1(
%0,
i32 %1)
@@ -22,10 +26,15 @@ declare @llvm.riscv.vmsbf.mask.nxv1i1(
i32);
define @intrinsic_vmsbf_mask_m_nxv1i1_nxv1i1( %0, %1, %2, i32 %3) nounwind {
+; CHECK-LABEL: intrinsic_vmsbf_mask_m_nxv1i1_nxv1i1:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT:vmv1r.v v25, v0
+; CHECK-NEXT:vsetvli a0, a0, e8,mf8,ta,mu
+; CHECK-NEXT:vmv1r.v v0, v17
+; CHECK-NEXT:vmsbf.m v25, v16, v0.t
+; CHECK-NEXT:vmv1r.v v0, v25
+; CHECK-NEXT:jalr zero, 0(ra)
entry:
-; CHECK-LABEL: intrinsic_vmsbf_mask_m_nxv1i1
-; CHECK: vsetvli {{.*}}, a0, e8,mf8,ta,mu
-; CHECK: vmsbf.m {{v[0-9]+}}, {{v[0-9]+}}, v0.t
%a = call @llvm.riscv.vmsbf.mask.nxv1i1(
%0,
%1,
@@ -39,10 +48,13 @@ declare @llvm.riscv.vmsbf.nxv2i1(
i32);
define @intrinsic_vmsbf_m_nxv2i1( %0, i32
%1) nounwind {
+; CHECK-LABEL: intrinsic_vmsbf_m_nxv2i1:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT:vsetvli a0, a0, e8,mf4,ta,mu
+; CHECK-NEXT:vmsbf.m v25, v0
+; CHECK-NEXT:vmv1r.v v0, v25
+; CHECK-NEXT:jalr zero, 0(ra)
entry:
-; CHECK-LABEL: intrinsic_vmsbf_m_nxv2i1
-; CHECK: vsetvli {{.*}}, a0, e8,mf4,ta,mu
-; CHECK: vmsbf.m {{v[0-9]+}}, {{v[0-9]+}}
%a = call @llvm.riscv.vmsbf.nxv2i1(
%0,
i32 %1)
@@ -56,10 +68,15 @@ declare @llvm.riscv.vmsbf.mask.nxv2i1(
i32);
define @intrinsic_vmsbf_mask_m_nxv2i1_nxv2i1( %0, %1, %2, i32 %3) nounwind {
+; CHECK-LABEL: intrinsic_vmsbf_mask_m_nxv2i1_nxv2i1:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT:vmv1r.v v25, v0
+; CHECK-NEXT:vsetvli a0, a0, e8,mf4,ta,mu
+; CHECK-NEXT:vmv1r.v v0, v17
+; CHECK-NEXT:vmsbf.m v25, v16, v0.t
+; CHECK-NEXT:vmv1r.v v0, v25
+; CHECK-NEXT:jalr zero, 0(ra)
entry:
-; CHECK-LABEL: intrinsic_vmsbf_mask_m_nxv2i1
-; CHECK: vsetvli {{.*}}, a0, e8,mf4,ta,mu
-; CHECK: vmsbf.m {{v[0-9]+}}, {{v[0-9]+}}, v0.t
%a = call @llvm.riscv.vmsbf.mask.nxv2i1(
%0,
%1,
@@ -73,10 +90,13 @@ declare @llvm.riscv.vmsbf.nxv4i1(
[llvm-branch-commits] [llvm] b980bed - [MSSAUpdater] Skip renaming when inserting def in unreachable block.
Author: Florian Hahn
Date: 2020-12-29T18:22:12Z
New Revision: b980bed34b96a9a85c256b1627ef9339d82829eb
URL:
https://github.com/llvm/llvm-project/commit/b980bed34b96a9a85c256b1627ef9339d82829eb
DIFF:
https://github.com/llvm/llvm-project/commit/b980bed34b96a9a85c256b1627ef9339d82829eb.diff
LOG: [MSSAUpdater] Skip renaming when inserting def in unreachable block.
This fixes a updater crash when moving memory defs between unreachable
blocks.
Fixes PR48616.
Added:
Modified:
llvm/lib/Analysis/MemorySSAUpdater.cpp
llvm/test/Transforms/GVN/preserve-memoryssa.ll
Removed:
diff --git a/llvm/lib/Analysis/MemorySSAUpdater.cpp
b/llvm/lib/Analysis/MemorySSAUpdater.cpp
index f633fbe4e12b..4ff61d4324f8 100644
--- a/llvm/lib/Analysis/MemorySSAUpdater.cpp
+++ b/llvm/lib/Analysis/MemorySSAUpdater.cpp
@@ -431,10 +431,11 @@ void MemorySSAUpdater::insertDef(MemoryDef *MD, bool
RenameUses) {
if (NewPhiSize)
tryRemoveTrivialPhis(ArrayRef(&InsertedPHIs[NewPhiIndex],
NewPhiSize));
- // Now that all fixups are done, rename all uses if we are asked.
- if (RenameUses) {
+ // Now that all fixups are done, rename all uses if we are asked. Skip
+ // renaming for defs in unreachable blocks.
+ BasicBlock *StartBlock = MD->getBlock();
+ if (RenameUses && MSSA->getDomTree().getNode(StartBlock)) {
SmallPtrSet Visited;
-BasicBlock *StartBlock = MD->getBlock();
// We are guaranteed there is a def in the block, because we just got it
// handed to us in this function.
MemoryAccess *FirstDef = &*MSSA->getWritableBlockDefs(StartBlock)->begin();
diff --git a/llvm/test/Transforms/GVN/preserve-memoryssa.ll
b/llvm/test/Transforms/GVN/preserve-memoryssa.ll
index d9dc9b311e94..b78aba2238e4 100644
--- a/llvm/test/Transforms/GVN/preserve-memoryssa.ll
+++ b/llvm/test/Transforms/GVN/preserve-memoryssa.ll
@@ -141,6 +141,38 @@ define i32 @test_assume_false_to_store_undef_3(i32* %ptr,
i32* %ptr.2) {
ret i32 %lv
}
+; Test case for PR48616.
+define void @rename_unreachable_block(i1 %c) personality i32 (...)* undef {
+; CHECK-LABEL: @rename_unreachable_block(
+; CHECK-NEXT:ret void
+; CHECK: bb1:
+; CHECK-NEXT:[[LP:%.*]] = landingpad { i8*, i32 }
+; CHECK-NEXT:cleanup
+; CHECK-NEXT:ret void
+; CHECK: bb2:
+; CHECK-NEXT:invoke void @f()
+; CHECK-NEXT:to label [[BB4:%.*]] unwind label [[BB1:%.*]]
+; CHECK: bb4:
+; CHECK-NEXT:unreachable
+;
+ ret void
+
+bb1:
+ %lp = landingpad { i8*, i32 }
+ cleanup
+ ret void
+
+bb2:
+ br i1 %c, label %bb3, label %bb3
+
+bb3:
+ invoke void @f()
+ to label %bb4 unwind label %bb1
+
+bb4:
+ unreachable
+}
+
declare void @f()
declare void @llvm.assume(i1 noundef) #0
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[llvm-branch-commits] [llvm] 7ecbe0c - [NewPM][AMDGPU] Port amdgpu-lower-kernel-attributes
Author: Arthur Eubanks
Date: 2020-12-29T10:26:06-08:00
New Revision: 7ecbe0c7a01848fce88dcf3b6977cec866e9938b
URL:
https://github.com/llvm/llvm-project/commit/7ecbe0c7a01848fce88dcf3b6977cec866e9938b
DIFF:
https://github.com/llvm/llvm-project/commit/7ecbe0c7a01848fce88dcf3b6977cec866e9938b.diff
LOG: [NewPM][AMDGPU] Port amdgpu-lower-kernel-attributes
And add it to the AMDGPU opt pipeline.
This is a function pass instead of a module pass (like the legacy pass)
because it's getting added to a CGSCCPassManager, and you can't put a
module pass in a CGSCCPassManager.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D93885
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPU.h
llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/test/CodeGen/AMDGPU/reqd-work-group-size.ll
llvm/tools/opt/opt.cpp
Removed:
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 6a0ba20e8026..623bbb2db325 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -115,6 +115,11 @@ ModulePass *createAMDGPULowerKernelAttributesPass();
void initializeAMDGPULowerKernelAttributesPass(PassRegistry &);
extern char &AMDGPULowerKernelAttributesID;
+struct AMDGPULowerKernelAttributesPass
+: PassInfoMixin {
+ PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+};
+
void initializeAMDGPUPropagateAttributesEarlyPass(PassRegistry &);
extern char &AMDGPUPropagateAttributesEarlyID;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
index 00e12f808783..3406734d7c7f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
@@ -19,7 +19,9 @@
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/Function.h"
+#include "llvm/IR/InstIterator.h"
#include "llvm/IR/Instructions.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/IR/PatternMatch.h"
#include "llvm/Pass.h"
@@ -41,16 +43,11 @@ enum DispatchPackedOffsets {
};
class AMDGPULowerKernelAttributes : public ModulePass {
- Module *Mod = nullptr;
-
public:
static char ID;
AMDGPULowerKernelAttributes() : ModulePass(ID) {}
- bool processUse(CallInst *CI);
-
- bool doInitialization(Module &M) override;
bool runOnModule(Module &M) override;
StringRef getPassName() const override {
@@ -64,12 +61,7 @@ class AMDGPULowerKernelAttributes : public ModulePass {
} // end anonymous namespace
-bool AMDGPULowerKernelAttributes::doInitialization(Module &M) {
- Mod = &M;
- return false;
-}
-
-bool AMDGPULowerKernelAttributes::processUse(CallInst *CI) {
+static bool processUse(CallInst *CI) {
Function *F = CI->getParent()->getParent();
auto MD = F->getMetadata("reqd_work_group_size");
@@ -89,7 +81,7 @@ bool AMDGPULowerKernelAttributes::processUse(CallInst *CI) {
Value *GridSizeY = nullptr;
Value *GridSizeZ = nullptr;
- const DataLayout &DL = Mod->getDataLayout();
+ const DataLayout &DL = F->getParent()->getDataLayout();
// We expect to see several GEP users, casted to the appropriate type and
// loaded.
@@ -239,7 +231,7 @@ bool AMDGPULowerKernelAttributes::runOnModule(Module &M) {
StringRef DispatchPtrName
= Intrinsic::getName(Intrinsic::amdgcn_dispatch_ptr);
- Function *DispatchPtr = Mod->getFunction(DispatchPtrName);
+ Function *DispatchPtr = M.getFunction(DispatchPtrName);
if (!DispatchPtr) // Dispatch ptr not used.
return false;
@@ -267,3 +259,22 @@ char AMDGPULowerKernelAttributes::ID = 0;
ModulePass *llvm::createAMDGPULowerKernelAttributesPass() {
return new AMDGPULowerKernelAttributes();
}
+
+PreservedAnalyses
+AMDGPULowerKernelAttributesPass::run(Function &F, FunctionAnalysisManager &AM)
{
+ StringRef DispatchPtrName =
+ Intrinsic::getName(Intrinsic::amdgcn_dispatch_ptr);
+
+ Function *DispatchPtr = F.getParent()->getFunction(DispatchPtrName);
+ if (!DispatchPtr) // Dispatch ptr not used.
+return PreservedAnalyses::all();
+
+ for (Instruction &I : instructions(F)) {
+if (CallInst *CI = dyn_cast(&I)) {
+ if (CI->getCalledFunction() == DispatchPtr)
+processUse(CI);
+}
+ }
+
+ return PreservedAnalyses::all();
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 26d76dd7fede..7a09c91e62d7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -508,6 +508,10 @@ void
AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB,
PM.addPass(AMDGPUPromoteAllocaToVectorPass(*this));
return true;
}
+if (PassName == "amdgpu-lower-kernel-attributes") {
+ PM.addPa
[llvm-branch-commits] [llvm] 6df161a - [IROutliner] Adding a cost model, and debug option to turn the model off.
Author: Andrew Litteken
Date: 2020-12-29T12:43:41-06:00
New Revision: 6df161a2fbf62bd4ab7297fe1fb234cdc972a48b
URL:
https://github.com/llvm/llvm-project/commit/6df161a2fbf62bd4ab7297fe1fb234cdc972a48b
DIFF:
https://github.com/llvm/llvm-project/commit/6df161a2fbf62bd4ab7297fe1fb234cdc972a48b.diff
LOG: [IROutliner] Adding a cost model, and debug option to turn the model off.
This adds a cost model that takes into account the total number of
machine instructions to be removed from each region, the number of
instructions added by adding a new function with a set of instructions,
and the instructions added by handling arguments.
Tests not adding flags:
llvm/test/Transforms/IROutliner/outlining-cost-model.ll
Reviewers: jroelofs, paquette
Differential Revision: https://reviews.llvm.org/D87299
Added:
llvm/test/Transforms/IROutliner/outlining-cost-model.ll
llvm/test/Transforms/IROutliner/outlining-debug-statements.ll
Modified:
llvm/include/llvm/Transforms/IPO/IROutliner.h
llvm/lib/Transforms/IPO/IROutliner.cpp
llvm/test/Transforms/IROutliner/extraction.ll
llvm/test/Transforms/IROutliner/illegal-allocas.ll
llvm/test/Transforms/IROutliner/illegal-assumes.ll
llvm/test/Transforms/IROutliner/illegal-branches.ll
llvm/test/Transforms/IROutliner/illegal-callbr.ll
llvm/test/Transforms/IROutliner/illegal-calls.ll
llvm/test/Transforms/IROutliner/illegal-catchpad.ll
llvm/test/Transforms/IROutliner/illegal-cleanup.ll
llvm/test/Transforms/IROutliner/illegal-frozen.ll
llvm/test/Transforms/IROutliner/illegal-gep.ll
llvm/test/Transforms/IROutliner/illegal-invoke.ll
llvm/test/Transforms/IROutliner/illegal-landingpad.ll
llvm/test/Transforms/IROutliner/illegal-memcpy.ll
llvm/test/Transforms/IROutliner/illegal-memmove.ll
llvm/test/Transforms/IROutliner/illegal-memset.ll
llvm/test/Transforms/IROutliner/illegal-phi-nodes.ll
llvm/test/Transforms/IROutliner/illegal-vaarg.ll
llvm/test/Transforms/IROutliner/legal-debug.ll
llvm/test/Transforms/IROutliner/outlining-address-taken.ll
llvm/test/Transforms/IROutliner/outlining-commutative-fp.ll
llvm/test/Transforms/IROutliner/outlining-commutative.ll
llvm/test/Transforms/IROutliner/outlining-constants-vs-registers.ll
llvm/test/Transforms/IROutliner/outlining-different-constants.ll
llvm/test/Transforms/IROutliner/outlining-different-globals.ll
llvm/test/Transforms/IROutliner/outlining-different-output-blocks.ll
llvm/test/Transforms/IROutliner/outlining-different-structure.ll
llvm/test/Transforms/IROutliner/outlining-remapped-outputs.ll
llvm/test/Transforms/IROutliner/outlining-same-constants.ll
llvm/test/Transforms/IROutliner/outlining-same-globals.ll
llvm/test/Transforms/IROutliner/outlining-same-output-blocks.ll
Removed:
diff --git a/llvm/include/llvm/Transforms/IPO/IROutliner.h
b/llvm/include/llvm/Transforms/IPO/IROutliner.h
index 2048d6d6d1a1..0cba35f637c6 100644
--- a/llvm/include/llvm/Transforms/IPO/IROutliner.h
+++ b/llvm/include/llvm/Transforms/IPO/IROutliner.h
@@ -145,6 +145,12 @@ struct OutlinableRegion {
/// function has been extracted, the start and end of the BasicBlock
/// containing the called function.
void reattachCandidate();
+
+ /// Get the size of the code removed from the region.
+ ///
+ /// \param [in] TTI - The TargetTransformInfo for the parent function.
+ /// \returns the code size of the region
+ unsigned getBenefit(TargetTransformInfo &TTI);
};
/// This class is a pass that identifies similarity in a Module, extracts
@@ -201,6 +207,28 @@ class IROutliner {
void findAddInputsOutputs(Module &M, OutlinableRegion &Region,
DenseSet &NotSame);
+ /// Find the number of instructions that will be removed by extracting the
+ /// OutlinableRegions in \p CurrentGroup.
+ ///
+ /// \param [in] CurrentGroup - The collection of OutlinableRegions to be
+ /// analyzed.
+ /// \returns the number of outlined instructions across all regions.
+ unsigned findBenefitFromAllRegions(OutlinableGroup &CurrentGroup);
+
+ /// Find the number of instructions that will be added by reloading
arguments.
+ ///
+ /// \param [in] CurrentGroup - The collection of OutlinableRegions to be
+ /// analyzed.
+ /// \returns the number of added reload instructions across all regions.
+ unsigned findCostOutputReloads(OutlinableGroup &CurrentGroup);
+
+ /// Find the cost and the benefit of \p CurrentGroup and save it back to
+ /// \p CurrentGroup.
+ ///
+ /// \param [in] M - The module being analyzed
+ /// \param [in,out] CurrentGroup - The overall outlined section
+ void findCostBenefit(Module &M, OutlinableGroup &CurrentGroup);
+
/// Update the output mapping based on the load instruction, and the outputs
/// of the extracted function.
///
@@ -229,6 +257,11 @@ class IROutliner {
[llvm-branch-commits] [llvm] 21a3a02 - [SLP] replace local reduction enum with RecurrenceKind; NFCI
Author: Sanjay Patel
Date: 2020-12-29T14:52:11-05:00
New Revision: 21a3a0225d84cd35227fc9d4d08234918a54f8d3
URL:
https://github.com/llvm/llvm-project/commit/21a3a0225d84cd35227fc9d4d08234918a54f8d3
DIFF:
https://github.com/llvm/llvm-project/commit/21a3a0225d84cd35227fc9d4d08234918a54f8d3.diff
LOG: [SLP] replace local reduction enum with RecurrenceKind; NFCI
I'm not sure if the SLP enum was created before the IVDescriptor
RecurrenceDescriptor / RecurrenceKind existed, but the code in
SLP is now redundant with that class, so it just makes things
more complicated to have both. We eventually call LoopUtils
createSimpleTargetReduction() to create reduction ops, so we
might as well standardize on those enum names.
There's still a question of whether we need to use TTI::ReductionFlags
vs. MinMaxRecurrenceKind, but that can be another clean-up step.
Another option would just be to flatten the enums in RecurrenceDescriptor
into a single enum. There isn't much benefit (smaller switches?) to
having a min/max subset.
Added:
Modified:
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Removed:
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 9f1768907227..eff0690eda82 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -35,6 +35,7 @@
#include "llvm/Analysis/CodeMetrics.h"
#include "llvm/Analysis/DemandedBits.h"
#include "llvm/Analysis/GlobalsModRef.h"
+#include "llvm/Analysis/IVDescriptors.h"
#include "llvm/Analysis/LoopAccessAnalysis.h"
#include "llvm/Analysis/LoopInfo.h"
#include "llvm/Analysis/MemoryLocation.h"
@@ -6445,16 +6446,7 @@ class HorizontalReduction {
SmallVector ReducedVals;
// Use map vector to make stable output.
MapVector ExtraArgs;
-
- /// Kind of the reduction data.
- enum ReductionKind {
-RK_None, /// Not a reduction.
-RK_Arithmetic, /// Binary reduction data.
-RK_SMin, /// Signed minimum reduction data.
-RK_UMin, /// Unsigned minimum reduction data.
-RK_SMax, /// Signed maximum reduction data.
-RK_UMax, /// Unsigned maximum reduction data.
- };
+ using RD = RecurrenceDescriptor;
/// Contains info about operation, like its opcode, left and right operands.
class OperationData {
@@ -6462,20 +6454,27 @@ class HorizontalReduction {
unsigned Opcode = 0;
/// Kind of the reduction operation.
-ReductionKind Kind = RK_None;
+RD::RecurrenceKind Kind = RD::RK_NoRecurrence;
+TargetTransformInfo::ReductionFlags RdxFlags;
/// Checks if the reduction operation can be vectorized.
bool isVectorizable() const {
switch (Kind) {
- case RK_Arithmetic:
-return Opcode == Instruction::Add || Opcode == Instruction::FAdd ||
- Opcode == Instruction::Mul || Opcode == Instruction::FMul ||
- Opcode == Instruction::And || Opcode == Instruction::Or ||
- Opcode == Instruction::Xor;
- case RK_SMin:
- case RK_SMax:
- case RK_UMin:
- case RK_UMax:
+ case RD::RK_IntegerAdd:
+return Opcode == Instruction::Add;
+ case RD::RK_IntegerMult:
+return Opcode == Instruction::Mul;
+ case RD::RK_IntegerOr:
+return Opcode == Instruction::Or;
+ case RD::RK_IntegerAnd:
+return Opcode == Instruction::And;
+ case RD::RK_IntegerXor:
+return Opcode == Instruction::Xor;
+ case RD::RK_FloatAdd:
+return Opcode == Instruction::FAdd;
+ case RD::RK_FloatMult:
+return Opcode == Instruction::FMul;
+ case RD::RK_IntegerMinMax:
return Opcode == Instruction::ICmp;
default:
return false;
@@ -6485,33 +6484,31 @@ class HorizontalReduction {
/// Creates reduction operation with the current opcode.
Value *createOp(IRBuilder<> &Builder, Value *LHS, Value *RHS,
const Twine &Name) const {
- assert(isVectorizable() &&
- "Expected add|fadd or min/max reduction operation.");
- Value *Cmp = nullptr;
+ assert(isVectorizable() && "Unhandled reduction operation.");
switch (Kind) {
- case RK_Arithmetic:
+ case RD::RK_IntegerAdd:
+ case RD::RK_IntegerMult:
+ case RD::RK_IntegerOr:
+ case RD::RK_IntegerAnd:
+ case RD::RK_IntegerXor:
+ case RD::RK_FloatAdd:
+ case RD::RK_FloatMult:
return Builder.CreateBinOp((Instruction::BinaryOps)Opcode, LHS, RHS,
Name);
- case RK_SMin:
-assert(Opcode == Instruction::ICmp && "Expected integer types.");
-Cmp = Builder.CreateICmpSLT(LHS, RHS);
-return Builder.CreateSelect(Cmp, LHS, RHS, Name);
- case RK_SMax:
-assert(Opcode == Instruction::ICmp && "Expected integer types.");
-Cmp = Builder.CreateICmp
[llvm-branch-commits] [mlir] df7ddee - [mlir][python] Add FlatSymbolRef attribute.
Author: Stella Laurenzo
Date: 2020-12-29T12:24:28-08:00
New Revision: df7ddeea668af7b25ee01f282fd8e6b388155103
URL:
https://github.com/llvm/llvm-project/commit/df7ddeea668af7b25ee01f282fd8e6b388155103
DIFF:
https://github.com/llvm/llvm-project/commit/df7ddeea668af7b25ee01f282fd8e6b388155103.diff
LOG: [mlir][python] Add FlatSymbolRef attribute.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D93909
Added:
Modified:
mlir/lib/Bindings/Python/IRModules.cpp
mlir/test/Bindings/Python/ir_attributes.py
Removed:
diff --git a/mlir/lib/Bindings/Python/IRModules.cpp
b/mlir/lib/Bindings/Python/IRModules.cpp
index 8a77d60741b4..86d6f8206155 100644
--- a/mlir/lib/Bindings/Python/IRModules.cpp
+++ b/mlir/lib/Bindings/Python/IRModules.cpp
@@ -1643,6 +1643,33 @@ class PyBoolAttribute : public
PyConcreteAttribute {
}
};
+class PyFlatSymbolRefAttribute
+: public PyConcreteAttribute {
+public:
+ static constexpr IsAFunctionTy isaFunction = mlirAttributeIsAFlatSymbolRef;
+ static constexpr const char *pyClassName = "FlatSymbolRefAttr";
+ using PyConcreteAttribute::PyConcreteAttribute;
+
+ static void bindDerived(ClassTy &c) {
+c.def_static(
+"get",
+[](std::string value, DefaultingPyMlirContext context) {
+ MlirAttribute attr =
+ mlirFlatSymbolRefAttrGet(context->get(), toMlirStringRef(value));
+ return PyFlatSymbolRefAttribute(context->getRef(), attr);
+},
+py::arg("value"), py::arg("context") = py::none(),
+"Gets a uniqued FlatSymbolRef attribute");
+c.def_property_readonly(
+"value",
+[](PyFlatSymbolRefAttribute &self) {
+ MlirStringRef stringRef = mlirFlatSymbolRefAttrGetValue(self);
+ return py::str(stringRef.data, stringRef.length);
+},
+"Returns the value of the FlatSymbolRef attribute as a string");
+ }
+};
+
class PyStringAttribute : public PyConcreteAttribute {
public:
static constexpr IsAFunctionTy isaFunction = mlirAttributeIsAString;
@@ -3229,6 +3256,7 @@ void mlir::python::populateIRSubmodule(py::module &m) {
PyArrayAttribute::PyArrayAttributeIterator::bind(m);
PyIntegerAttribute::bind(m);
PyBoolAttribute::bind(m);
+ PyFlatSymbolRefAttribute::bind(m);
PyStringAttribute::bind(m);
PyDenseElementsAttribute::bind(m);
PyDenseIntElementsAttribute::bind(m);
diff --git a/mlir/test/Bindings/Python/ir_attributes.py
b/mlir/test/Bindings/Python/ir_attributes.py
index 84f313912547..ce85dc3cf87a 100644
--- a/mlir/test/Bindings/Python/ir_attributes.py
+++ b/mlir/test/Bindings/Python/ir_attributes.py
@@ -165,6 +165,20 @@ def testBoolAttr():
run(testBoolAttr)
+# CHECK-LABEL: TEST: testFlatSymbolRefAttr
+def testFlatSymbolRefAttr():
+ with Context() as ctx:
+sattr = FlatSymbolRefAttr(Attribute.parse('@symbol'))
+# CHECK: symattr value: symbol
+print("symattr value:", sattr.value)
+
+# Test factory methods.
+# CHECK: default_get: @foobar
+print("default_get:", FlatSymbolRefAttr.get("foobar"))
+
+run(testFlatSymbolRefAttr)
+
+
# CHECK-LABEL: TEST: testStringAttr
def testStringAttr():
with Context() as ctx:
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[llvm-branch-commits] [llvm] 8d18bc8 - [Utils] reduce code in createTargetReduction(); NFC
Author: Sanjay Patel
Date: 2020-12-29T15:56:19-05:00
New Revision: 8d18bc8e6db717352811a44a81e76a196530f612
URL:
https://github.com/llvm/llvm-project/commit/8d18bc8e6db717352811a44a81e76a196530f612
DIFF:
https://github.com/llvm/llvm-project/commit/8d18bc8e6db717352811a44a81e76a196530f612.diff
LOG: [Utils] reduce code in createTargetReduction(); NFC
The switch duplicated the translation in getRecurrenceBinOp().
This code is still weird because it translates to the TTI
ReductionFlags for min/max, but then createSimpleTargetReduction()
converts that back to RecurrenceDescriptor::MinMaxRecurrenceKind.
Added:
Modified:
llvm/lib/Transforms/Utils/LoopUtils.cpp
Removed:
diff --git a/llvm/lib/Transforms/Utils/LoopUtils.cpp
b/llvm/lib/Transforms/Utils/LoopUtils.cpp
index 1ac270814b00..653680e5dc1e 100644
--- a/llvm/lib/Transforms/Utils/LoopUtils.cpp
+++ b/llvm/lib/Transforms/Utils/LoopUtils.cpp
@@ -1063,7 +1063,6 @@ Value *llvm::createTargetReduction(IRBuilderBase &B,
bool NoNaN) {
// TODO: Support in-order reductions based on the recurrence descriptor.
using RD = RecurrenceDescriptor;
- RD::RecurrenceKind RecKind = Desc.getRecurrenceKind();
TargetTransformInfo::ReductionFlags Flags;
Flags.NoNaN = NoNaN;
@@ -1072,34 +1071,12 @@ Value *llvm::createTargetReduction(IRBuilderBase &B,
IRBuilderBase::FastMathFlagGuard FMFGuard(B);
B.setFastMathFlags(Desc.getFastMathFlags());
- switch (RecKind) {
- case RD::RK_FloatAdd:
-return createSimpleTargetReduction(B, TTI, Instruction::FAdd, Src, Flags);
- case RD::RK_FloatMult:
-return createSimpleTargetReduction(B, TTI, Instruction::FMul, Src, Flags);
- case RD::RK_IntegerAdd:
-return createSimpleTargetReduction(B, TTI, Instruction::Add, Src, Flags);
- case RD::RK_IntegerMult:
-return createSimpleTargetReduction(B, TTI, Instruction::Mul, Src, Flags);
- case RD::RK_IntegerAnd:
-return createSimpleTargetReduction(B, TTI, Instruction::And, Src, Flags);
- case RD::RK_IntegerOr:
-return createSimpleTargetReduction(B, TTI, Instruction::Or, Src, Flags);
- case RD::RK_IntegerXor:
-return createSimpleTargetReduction(B, TTI, Instruction::Xor, Src, Flags);
- case RD::RK_IntegerMinMax: {
-RD::MinMaxRecurrenceKind MMKind = Desc.getMinMaxRecurrenceKind();
-Flags.IsMaxOp = (MMKind == RD::MRK_SIntMax || MMKind == RD::MRK_UIntMax);
-Flags.IsSigned = (MMKind == RD::MRK_SIntMax || MMKind == RD::MRK_SIntMin);
-return createSimpleTargetReduction(B, TTI, Instruction::ICmp, Src, Flags);
- }
- case RD::RK_FloatMinMax: {
-Flags.IsMaxOp = Desc.getMinMaxRecurrenceKind() == RD::MRK_FloatMax;
-return createSimpleTargetReduction(B, TTI, Instruction::FCmp, Src, Flags);
- }
- default:
-llvm_unreachable("Unhandled RecKind");
- }
+ RD::MinMaxRecurrenceKind MMKind = Desc.getMinMaxRecurrenceKind();
+ Flags.IsMaxOp = MMKind == RD::MRK_SIntMax || MMKind == RD::MRK_UIntMax ||
+ MMKind == RD::MRK_FloatMax;
+ Flags.IsSigned = MMKind == RD::MRK_SIntMax || MMKind == RD::MRK_SIntMin;
+ return createSimpleTargetReduction(B, TTI, Desc.getRecurrenceBinOp(), Src,
+ Flags);
}
void llvm::propagateIRFlags(Value *I, ArrayRef VL, Value *OpValue) {
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[llvm-branch-commits] [llvm] 145cbef - Copy demangle changes from libcxxabi to llvm with cp_to_llvm.sh.
Author: James Y Knight
Date: 2020-12-29T16:18:10-05:00
New Revision: 145cbef5879c7fba8bacc2f78cfa426400f52f42
URL:
https://github.com/llvm/llvm-project/commit/145cbef5879c7fba8bacc2f78cfa426400f52f42
DIFF:
https://github.com/llvm/llvm-project/commit/145cbef5879c7fba8bacc2f78cfa426400f52f42.diff
LOG: Copy demangle changes from libcxxabi to llvm with cp_to_llvm.sh.
This includes changes from these commits:
5641b1dfddff847f7f3edc484537f9314c283225
8d313927539de66808e5bf3566fbd844aa78a916
Added:
Modified:
llvm/include/llvm/Demangle/ItaniumDemangle.h
llvm/include/llvm/Demangle/Utility.h
Removed:
diff --git a/llvm/include/llvm/Demangle/ItaniumDemangle.h
b/llvm/include/llvm/Demangle/ItaniumDemangle.h
index cef61756ef09..6bfc02d15379 100644
--- a/llvm/include/llvm/Demangle/ItaniumDemangle.h
+++ b/llvm/include/llvm/Demangle/ItaniumDemangle.h
@@ -2371,9 +2371,9 @@ template struct
AbstractManglingParser {
TemplateParamList Params;
public:
-ScopedTemplateParamList(AbstractManglingParser *Parser)
-: Parser(Parser),
- OldNumTemplateParamLists(Parser->TemplateParams.size()) {
+ScopedTemplateParamList(AbstractManglingParser *TheParser)
+: Parser(TheParser),
+ OldNumTemplateParamLists(TheParser->TemplateParams.size()) {
Parser->TemplateParams.push_back(&Params);
}
~ScopedTemplateParamList() {
@@ -5223,7 +5223,7 @@ Node *AbstractManglingParser::parseEncoding() {
decltype(TemplateParams) OldParams;
public:
-SaveTemplateParams(AbstractManglingParser *Parser) : Parser(Parser) {
+SaveTemplateParams(AbstractManglingParser *TheParser) : Parser(TheParser) {
OldParams = std::move(Parser->TemplateParams);
Parser->TemplateParams.clear();
}
diff --git a/llvm/include/llvm/Demangle/Utility.h
b/llvm/include/llvm/Demangle/Utility.h
index 04e1936ebbe7..846a5f0818e7 100644
--- a/llvm/include/llvm/Demangle/Utility.h
+++ b/llvm/include/llvm/Demangle/Utility.h
@@ -52,7 +52,7 @@ class OutputStream {
char *TempPtr = std::end(Temp);
while (N) {
- *--TempPtr = '0' + char(N % 10);
+ *--TempPtr = char('0' + N % 10);
N /= 10;
}
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[llvm-branch-commits] [llvm] 6027e05 - [SimplifyCFG] Teach SimplifyEqualityComparisonWithOnlyPredecessor() to preserve DomTree, part 1
Author: Roman Lebedev
Date: 2020-12-30T00:48:10+03:00
New Revision: 6027e05dbfc59a780bf6fc42d5a4f80a59878be1
URL:
https://github.com/llvm/llvm-project/commit/6027e05dbfc59a780bf6fc42d5a4f80a59878be1
DIFF:
https://github.com/llvm/llvm-project/commit/6027e05dbfc59a780bf6fc42d5a4f80a59878be1.diff
LOG: [SimplifyCFG] Teach SimplifyEqualityComparisonWithOnlyPredecessor() to
preserve DomTree, part 1
Added:
Modified:
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/2005-06-16-PHICrash.ll
Removed:
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 7d5f6daba7b2..7b08b95356fb 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -910,13 +910,18 @@ bool
SimplifyCFGOpt::SimplifyEqualityComparisonWithOnlyPredecessor(
(void)NI;
// Remove PHI node entries for the dead edge.
- ThisCases[0].Dest->removePredecessor(TI->getParent());
+ ThisCases[0].Dest->removePredecessor(PredDef);
LLVM_DEBUG(dbgs() << "Threading pred instr: " << *Pred->getTerminator()
<< "Through successor TI: " << *TI << "Leaving: " <<
*NI
<< "\n");
EraseTerminatorAndDCECond(TI);
+
+ if (DTU)
+DTU->applyUpdatesPermissive(
+{{DominatorTree::Delete, PredDef, ThisCases[0].Dest}});
+
return true;
}
diff --git a/llvm/test/Transforms/SimplifyCFG/2005-06-16-PHICrash.ll
b/llvm/test/Transforms/SimplifyCFG/2005-06-16-PHICrash.ll
index 8fd1fae34503..848aec7f6ad0 100644
--- a/llvm/test/Transforms/SimplifyCFG/2005-06-16-PHICrash.ll
+++ b/llvm/test/Transforms/SimplifyCFG/2005-06-16-PHICrash.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -simplifycfg -disable-output
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1
-disable-output
; PR584
@g_38098584 = external global i32 ; [#uses=1]
@g_60187400 = external global i32 ; [#uses=1]
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[llvm-branch-commits] [llvm] fe9bdd9 - [SimplifyCFG] Teach SimplifyEqualityComparisonWithOnlyPredecessor() to preserve DomTree, part 2
Author: Roman Lebedev
Date: 2020-12-30T00:48:10+03:00
New Revision: fe9bdd962152d6b3d1203f2b6129df122c462599
URL:
https://github.com/llvm/llvm-project/commit/fe9bdd962152d6b3d1203f2b6129df122c462599
DIFF:
https://github.com/llvm/llvm-project/commit/fe9bdd962152d6b3d1203f2b6129df122c462599.diff
LOG: [SimplifyCFG] Teach SimplifyEqualityComparisonWithOnlyPredecessor() to
preserve DomTree, part 2
Added:
Modified:
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/InfLoop.ll
llvm/test/Transforms/SimplifyCFG/implied-cond-matching-imm.ll
llvm/test/Transforms/SimplifyCFG/iterative-simplify.ll
Removed:
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 7b08b95356fb..41af29b82791 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -970,12 +970,15 @@ bool
SimplifyCFGOpt::SimplifyEqualityComparisonWithOnlyPredecessor(
if (!TheRealDest)
TheRealDest = ThisDef;
+ SmallVector Updates;
+
// Remove PHI node entries for dead edges.
BasicBlock *CheckEdge = TheRealDest;
for (BasicBlock *Succ : successors(TIBB))
-if (Succ != CheckEdge)
+if (Succ != CheckEdge) {
Succ->removePredecessor(TIBB);
-else
+ Updates.push_back({DominatorTree::Delete, TIBB, Succ});
+} else
CheckEdge = nullptr;
// Insert the new branch.
@@ -987,6 +990,8 @@ bool
SimplifyCFGOpt::SimplifyEqualityComparisonWithOnlyPredecessor(
<< "\n");
EraseTerminatorAndDCECond(TI);
+ if (DTU)
+DTU->applyUpdatesPermissive(Updates);
return true;
}
diff --git a/llvm/test/Transforms/SimplifyCFG/InfLoop.ll
b/llvm/test/Transforms/SimplifyCFG/InfLoop.ll
index a56076e42ce1..32c6b0353286 100644
--- a/llvm/test/Transforms/SimplifyCFG/InfLoop.ll
+++ b/llvm/test/Transforms/SimplifyCFG/InfLoop.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -simplifycfg -disable-output
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1
-disable-output
; END.
target datalayout =
"e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32"
diff --git a/llvm/test/Transforms/SimplifyCFG/implied-cond-matching-imm.ll
b/llvm/test/Transforms/SimplifyCFG/implied-cond-matching-imm.ll
index 60ef81365982..d7f5694ad737 100644
--- a/llvm/test/Transforms/SimplifyCFG/implied-cond-matching-imm.ll
+++ b/llvm/test/Transforms/SimplifyCFG/implied-cond-matching-imm.ll
@@ -1,4 +1,4 @@
-; RUN: opt %s -S -simplifycfg | FileCheck %s
+; RUN: opt %s -S -simplifycfg -simplifycfg-require-and-preserve-domtree=1 |
FileCheck %s
; cmp1 implies cmp2 is false
; CHECK-LABEL: @test1
diff --git a/llvm/test/Transforms/SimplifyCFG/iterative-simplify.ll
b/llvm/test/Transforms/SimplifyCFG/iterative-simplify.ll
index 60728b9a9578..ef2482134e7d 100644
--- a/llvm/test/Transforms/SimplifyCFG/iterative-simplify.ll
+++ b/llvm/test/Transforms/SimplifyCFG/iterative-simplify.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -simplifycfg -S | not grep bb17
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S |
not grep bb17
; PR1786
define i32 @main() {
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[llvm-branch-commits] [llvm] 18c407b - [SimplifyCFG] Teach HoistThenElseCodeToIf() to preserve DomTree
Author: Roman Lebedev
Date: 2020-12-30T00:48:10+03:00
New Revision: 18c407bf4c16800a836abe8096a7e4c41ce46b24
URL:
https://github.com/llvm/llvm-project/commit/18c407bf4c16800a836abe8096a7e4c41ce46b24
DIFF:
https://github.com/llvm/llvm-project/commit/18c407bf4c16800a836abe8096a7e4c41ce46b24.diff
LOG: [SimplifyCFG] Teach HoistThenElseCodeToIf() to preserve DomTree
Added:
Modified:
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/GVNSink/indirect-call.ll
llvm/test/Transforms/GVNSink/sink-common-code.ll
llvm/test/Transforms/SimplifyCFG/BrUnwind.ll
llvm/test/Transforms/SimplifyCFG/HoistCode.ll
llvm/test/Transforms/SimplifyCFG/UncondBranchToReturn.ll
llvm/test/Transforms/SimplifyCFG/X86/empty-cleanuppad.ll
llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll
llvm/test/Transforms/SimplifyCFG/hoist-common-code.ll
llvm/test/Transforms/SimplifyCFG/hoist-with-range.ll
llvm/test/Transforms/SimplifyCFG/pr39807.ll
Removed:
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 41af29b82791..6af60467cf45 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -1508,11 +1508,19 @@ bool SimplifyCFGOpt::HoistThenElseCodeToIf(BranchInst
*BI,
}
}
+ SmallVector Updates;
+
// Update any PHI nodes in our new successors.
- for (BasicBlock *Succ : successors(BB1))
+ for (BasicBlock *Succ : successors(BB1)) {
AddPredecessorToBlock(Succ, BIParent, BB1);
+Updates.push_back({DominatorTree::Insert, BIParent, Succ});
+ }
+ for (BasicBlock *Succ : successors(BI))
+Updates.push_back({DominatorTree::Delete, BIParent, Succ});
EraseTerminatorAndDCECond(BI);
+ if (DTU)
+DTU->applyUpdatesPermissive(Updates);
return Changed;
}
diff --git a/llvm/test/Transforms/GVNSink/indirect-call.ll
b/llvm/test/Transforms/GVNSink/indirect-call.ll
index 66c1a4f647a9..db84fe7410fd 100644
--- a/llvm/test/Transforms/GVNSink/indirect-call.ll
+++ b/llvm/test/Transforms/GVNSink/indirect-call.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn-sink -simplifycfg -hoist-common-insts=true
-simplifycfg-sink-common=false -S | FileCheck %s
+; RUN: opt < %s -gvn-sink -simplifycfg
-simplifycfg-require-and-preserve-domtree=1 -hoist-common-insts=true
-simplifycfg-sink-common=false -S | FileCheck %s
declare i8 @ext(i1)
diff --git a/llvm/test/Transforms/GVNSink/sink-common-code.ll
b/llvm/test/Transforms/GVNSink/sink-common-code.ll
index 4131fb37485f..d0b533b4ac57 100644
--- a/llvm/test/Transforms/GVNSink/sink-common-code.ll
+++ b/llvm/test/Transforms/GVNSink/sink-common-code.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -gvn-sink -simplifycfg -hoist-common-insts=true
-simplifycfg-sink-common=false -S | FileCheck %s
+; RUN: opt < %s -gvn-sink -simplifycfg
-simplifycfg-require-and-preserve-domtree=1 -hoist-common-insts=true
-simplifycfg-sink-common=false -S | FileCheck %s
define zeroext i1 @test1(i1 zeroext %flag, i32 %blksA, i32 %blksB, i32 %nblks)
{
entry:
diff --git a/llvm/test/Transforms/SimplifyCFG/BrUnwind.ll
b/llvm/test/Transforms/SimplifyCFG/BrUnwind.ll
index 6cd3ad6e4b02..c40f5513cebf 100644
--- a/llvm/test/Transforms/SimplifyCFG/BrUnwind.ll
+++ b/llvm/test/Transforms/SimplifyCFG/BrUnwind.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -simplifycfg -hoist-common-insts=true -S | \
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1
-hoist-common-insts=true -S | \
; RUN: not grep "br label"
define void @test(i1 %C) {
diff --git a/llvm/test/Transforms/SimplifyCFG/HoistCode.ll
b/llvm/test/Transforms/SimplifyCFG/HoistCode.ll
index 975107da4928..51baa5b7f9b3 100644
--- a/llvm/test/Transforms/SimplifyCFG/HoistCode.ll
+++ b/llvm/test/Transforms/SimplifyCFG/HoistCode.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=simplifycfg -hoist-common-insts=true -S | FileCheck %s
-; RUN: opt < %s -simplifycfg -hoist-common-insts=true -S | FileCheck %s
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1
-hoist-common-insts=true -S | FileCheck %s
define void @foo(i1 %C, i32* %P) {
; CHECK-LABEL: @foo(
diff --git a/llvm/test/Transforms/SimplifyCFG/UncondBranchToReturn.ll
b/llvm/test/Transforms/SimplifyCFG/UncondBranchToReturn.ll
index 78bcd345daf9..122368406118 100644
--- a/llvm/test/Transforms/SimplifyCFG/UncondBranchToReturn.ll
+++ b/llvm/test/Transforms/SimplifyCFG/UncondBranchToReturn.ll
@@ -2,7 +2,7 @@
; a PHI node and a return. Make sure the simplify cfg can straighten out this
; important case. This is basically the most trivial form of tail-duplication.
-; RUN: opt < %s -simplifycfg -hoist-common-insts=true -S | \
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1
-hoist-common-insts=true -S | \
; RUN:not grep "br label"
define
[llvm-branch-commits] [llvm] b8121b2 - [SimplifyCFG] Teach SinkCommonCodeFromPredecessors() to preserve DomTree
Author: Roman Lebedev
Date: 2020-12-30T00:48:11+03:00
New Revision: b8121b2e62d58ca42aa78b0dd644af9d096957a3
URL:
https://github.com/llvm/llvm-project/commit/b8121b2e62d58ca42aa78b0dd644af9d096957a3
DIFF:
https://github.com/llvm/llvm-project/commit/b8121b2e62d58ca42aa78b0dd644af9d096957a3.diff
LOG: [SimplifyCFG] Teach SinkCommonCodeFromPredecessors() to preserve DomTree
Added:
Modified:
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/sink-common-code.ll
Removed:
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 6af60467cf45..2fcfc557393a 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -1812,7 +1812,8 @@ namespace {
/// true, sink any common code from the predecessors to BB.
/// We also allow one predecessor to end with conditional branch (but no more
/// than one).
-static bool SinkCommonCodeFromPredecessors(BasicBlock *BB) {
+static bool SinkCommonCodeFromPredecessors(BasicBlock *BB,
+ DomTreeUpdater *DTU) {
// We support two situations:
// (1) all incoming arcs are unconditional
// (2) one incoming arc is conditional
@@ -1930,7 +1931,8 @@ static bool SinkCommonCodeFromPredecessors(BasicBlock
*BB) {
LLVM_DEBUG(dbgs() << "SINK: Splitting edge\n");
// We have a conditional edge and we're going to sink some instructions.
// Insert a new block postdominating all blocks we're going to sink from.
-if (!SplitBlockPredecessors(BB, UnconditionalPreds, ".sink.split"))
+if (!SplitBlockPredecessors(BB, UnconditionalPreds, ".sink.split",
+DTU ? &DTU->getDomTree() : nullptr))
// Edges couldn't be split.
return false;
Changed = true;
@@ -6461,7 +6463,7 @@ bool SimplifyCFGOpt::simplifyOnceImpl(BasicBlock *BB) {
return true;
if (SinkCommon && Options.SinkCommonInsts)
-Changed |= SinkCommonCodeFromPredecessors(BB);
+Changed |= SinkCommonCodeFromPredecessors(BB, DTU);
IRBuilder<> Builder(BB);
diff --git a/llvm/test/Transforms/SimplifyCFG/sink-common-code.ll
b/llvm/test/Transforms/SimplifyCFG/sink-common-code.ll
index 00329ae5d640..48dd2d92f4c3 100644
--- a/llvm/test/Transforms/SimplifyCFG/sink-common-code.ll
+++ b/llvm/test/Transforms/SimplifyCFG/sink-common-code.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -simplifycfg -sink-common-insts -S | FileCheck
-enable-var-scope %s
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1
-sink-common-insts -S | FileCheck -enable-var-scope %s
; RUN: opt < %s -passes='simplify-cfg' -S | FileCheck
-enable-var-scope %s
define zeroext i1 @test1(i1 zeroext %flag, i32 %blksA, i32 %blksB, i32 %nblks)
{
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[llvm-branch-commits] [llvm] d4c0abb - [SimplifyCFG] Teach FoldCondBranchOnPHI() to preserve DomTree
Author: Roman Lebedev
Date: 2020-12-30T00:48:11+03:00
New Revision: d4c0abb4a31a9e6a8fccb656d897f7140781022c
URL:
https://github.com/llvm/llvm-project/commit/d4c0abb4a31a9e6a8fccb656d897f7140781022c
DIFF:
https://github.com/llvm/llvm-project/commit/d4c0abb4a31a9e6a8fccb656d897f7140781022c.diff
LOG: [SimplifyCFG] Teach FoldCondBranchOnPHI() to preserve DomTree
Added:
Modified:
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
llvm/test/Transforms/SimplifyCFG/2004-12-10-SimplifyCFGCrash.ll
llvm/test/Transforms/SimplifyCFG/X86/critedge-assume.ll
llvm/test/Transforms/SimplifyCFG/branch-phi-thread.ll
llvm/test/Transforms/SimplifyCFG/debug-info-thread-phi.ll
llvm/test/Transforms/SimplifyCFG/pr46638.ll
llvm/test/Transforms/SimplifyCFG/unprofitable-pr.ll
Removed:
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 2fcfc557393a..95a5de09c18f 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -2344,8 +2344,8 @@ static bool BlockIsSimpleEnoughToThreadThrough(BasicBlock
*BB) {
/// If we have a conditional branch on a PHI node value that is defined in the
/// same block as the branch and if any PHI entries are constants, thread edges
/// corresponding to that entry to be branches to their ultimate destination.
-static bool FoldCondBranchOnPHI(BranchInst *BI, const DataLayout &DL,
-AssumptionCache *AC) {
+static bool FoldCondBranchOnPHI(BranchInst *BI, DomTreeUpdater *DTU,
+const DataLayout &DL, AssumptionCache *AC) {
BasicBlock *BB = BI->getParent();
PHINode *PN = dyn_cast(BI->getCondition());
// NOTE: we currently cannot transform this case if the PHI node is used
@@ -2381,6 +2381,8 @@ static bool FoldCondBranchOnPHI(BranchInst *BI, const
DataLayout &DL,
if (isa(PredBB->getTerminator()))
continue;
+SmallVector Updates;
+
// The dest block might have PHI nodes, other predecessors and other
//
diff icult cases. Instead of being smart about this, just insert a new
// block that jumps to the destination block, effectively splitting
@@ -2389,6 +2391,7 @@ static bool FoldCondBranchOnPHI(BranchInst *BI, const
DataLayout &DL,
BasicBlock::Create(BB->getContext(), RealDest->getName() + ".critedge",
RealDest->getParent(), RealDest);
BranchInst *CritEdgeBranch = BranchInst::Create(RealDest, EdgeBB);
+Updates.push_back({DominatorTree::Insert, EdgeBB, RealDest});
CritEdgeBranch->setDebugLoc(BI->getDebugLoc());
// Update PHI nodes.
@@ -2447,8 +2450,14 @@ static bool FoldCondBranchOnPHI(BranchInst *BI, const
DataLayout &DL,
PredBBTI->setSuccessor(i, EdgeBB);
}
+Updates.push_back({DominatorTree::Delete, PredBB, BB});
+Updates.push_back({DominatorTree::Insert, PredBB, EdgeBB});
+
+if (DTU)
+ DTU->applyUpdatesPermissive(Updates);
+
// Recurse, simplifying any other constants.
-return FoldCondBranchOnPHI(BI, DL, AC) || true;
+return FoldCondBranchOnPHI(BI, DTU, DL, AC) || true;
}
return false;
@@ -6331,7 +6340,7 @@ bool SimplifyCFGOpt::simplifyCondBranch(BranchInst *BI,
IRBuilder<> &Builder) {
// through this block if any PHI node entries are constants.
if (PHINode *PN = dyn_cast(BI->getCondition()))
if (PN->getParent() == BI->getParent())
- if (FoldCondBranchOnPHI(BI, DL, Options.AC))
+ if (FoldCondBranchOnPHI(BI, DTU, DL, Options.AC))
return requestResimplify();
// Scan predecessor blocks for conditional branches.
diff --git a/llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
b/llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
index 795df0caedd6..3c8d07356632 100644
--- a/llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
+++ b/llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1
-force-vector-interleave=2 -loop-vectorize -verify-loop-info -simplifycfg < %s
| FileCheck %s --check-prefix=UNROLL
+; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1
-force-vector-interleave=2 -loop-vectorize -verify-loop-info -simplifycfg
-simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s
--check-prefix=UNROLL
; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=1
-force-vector-interleave=2 -loop-vectorize -verify-loop-info < %s | FileCheck
%s --check-prefix=UNROLL-NOSIMPLIFY
-; RUN: opt -S -vectorize-num-stores-pred=1 -force-vector-width=2
-force-vector-interleave=1 -loop-vectorize -verify-loop-info -simplifycfg < %s
| FileCheck %s --check-prefix=VEC
+; RUN: opt -S -vectorize-num-stores-pred=1 -force
[llvm-branch-commits] [llvm] 3071562 - [SimplifyCFG] Teach mergeConditionalStoreToAddress() to preserve DomTree
Author: Roman Lebedev
Date: 2020-12-30T00:48:11+03:00
New Revision: 307156246f7d8a1ff5293b97414f5ba7f19298b7
URL:
https://github.com/llvm/llvm-project/commit/307156246f7d8a1ff5293b97414f5ba7f19298b7
DIFF:
https://github.com/llvm/llvm-project/commit/307156246f7d8a1ff5293b97414f5ba7f19298b7.diff
LOG: [SimplifyCFG] Teach mergeConditionalStoreToAddress() to preserve DomTree
Added:
Modified:
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/merge-cond-stores-2.ll
llvm/test/Transforms/SimplifyCFG/merge-cond-stores.ll
llvm/test/Transforms/SimplifyCFG/preserve-store-alignment.ll
Removed:
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 95a5de09c18f..03626abc3faf 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -3238,12 +3238,10 @@ static Value *ensureValueAvailableInSuccessor(Value *V,
BasicBlock *BB,
return PHI;
}
-static bool mergeConditionalStoreToAddress(BasicBlock *PTB, BasicBlock *PFB,
- BasicBlock *QTB, BasicBlock *QFB,
- BasicBlock *PostBB, Value *Address,
- bool InvertPCond, bool InvertQCond,
- const DataLayout &DL,
- const TargetTransformInfo &TTI) {
+static bool mergeConditionalStoreToAddress(
+BasicBlock *PTB, BasicBlock *PFB, BasicBlock *QTB, BasicBlock *QFB,
+BasicBlock *PostBB, Value *Address, bool InvertPCond, bool InvertQCond,
+DomTreeUpdater *DTU, const DataLayout &DL, const TargetTransformInfo &TTI)
{
// For every pointer, there must be exactly two stores, one coming from
// PTB or PFB, and the other from QTB or QFB. We don't support more than one
// store (to any address) in PTB,PFB or QTB,QFB.
@@ -3332,8 +3330,9 @@ static bool mergeConditionalStoreToAddress(BasicBlock
*PTB, BasicBlock *PFB,
// If QTB does not exist, then QFB's only predecessor has a conditional
// branch to QFB and PostBB.
BasicBlock *TruePred = QTB ? QTB : QFB->getSinglePredecessor();
-BasicBlock *NewBB = SplitBlockPredecessors(PostBB, { QFB, TruePred},
- "condstore.split");
+BasicBlock *NewBB =
+SplitBlockPredecessors(PostBB, {QFB, TruePred}, "condstore.split",
+ DTU ? &DTU->getDomTree() : nullptr);
if (!NewBB)
return false;
PostBB = NewBB;
@@ -3362,8 +3361,9 @@ static bool mergeConditionalStoreToAddress(BasicBlock
*PTB, BasicBlock *PFB,
QPred = QB.CreateNot(QPred);
Value *CombinedPred = QB.CreateOr(PPred, QPred);
- auto *T =
- SplitBlockAndInsertIfThen(CombinedPred, &*QB.GetInsertPoint(), false);
+ auto *T = SplitBlockAndInsertIfThen(
+ CombinedPred, &*QB.GetInsertPoint(), /*Unreachable=*/false,
+ /*BranchWeights=*/nullptr, DTU ? &DTU->getDomTree() : nullptr);
QB.SetInsertPoint(T);
StoreInst *SI = cast(QB.CreateStore(QPHI, Address));
AAMDNodes AAMD;
@@ -3383,7 +3383,7 @@ static bool mergeConditionalStoreToAddress(BasicBlock
*PTB, BasicBlock *PFB,
}
static bool mergeConditionalStores(BranchInst *PBI, BranchInst *QBI,
- const DataLayout &DL,
+ DomTreeUpdater *DTU, const DataLayout &DL,
const TargetTransformInfo &TTI) {
// The intention here is to find diamonds or triangles (see below) where each
// conditional block contains a store to the same address. Both of these
@@ -3485,12 +3485,12 @@ static bool mergeConditionalStores(BranchInst *PBI,
BranchInst *QBI,
bool Changed = false;
for (auto *Address : CommonAddresses)
-Changed |= mergeConditionalStoreToAddress(
-PTB, PFB, QTB, QFB, PostBB, Address, InvertPCond, InvertQCond, DL,
TTI);
+Changed |=
+mergeConditionalStoreToAddress(PTB, PFB, QTB, QFB, PostBB, Address,
+ InvertPCond, InvertQCond, DTU, DL, TTI);
return Changed;
}
-
/// If the previous block ended with a widenable branch, determine if reusing
/// the target block is profitable and legal. This will have the effect of
/// "widening" PBI, but doesn't require us to reason about hosting safety.
@@ -3536,6 +3536,7 @@ static bool tryWidenCondBranchToCondBranch(BranchInst
*PBI, BranchInst *BI) {
/// that PBI and BI are both conditional branches, and BI is in one of the
/// successor blocks of PBI - PBI branches to BI.
static bool SimplifyCondBranchToCondBranch(BranchInst *PBI, BranchInst *BI,
+ DomTreeUpdater *DTU,
const DataLayout &DL,
const TargetTran
[llvm-branch-commits] [llvm] ec0b671 - [SimplifyCFG] Teach SimplifyCondBranchToCondBranch() to preserve DomTree
Author: Roman Lebedev
Date: 2020-12-30T00:48:12+03:00
New Revision: ec0b671a6147f669a0ab155000b1b5f19b214b7d
URL:
https://github.com/llvm/llvm-project/commit/ec0b671a6147f669a0ab155000b1b5f19b214b7d
DIFF:
https://github.com/llvm/llvm-project/commit/ec0b671a6147f669a0ab155000b1b5f19b214b7d.diff
LOG: [SimplifyCFG] Teach SimplifyCondBranchToCondBranch() to preserve DomTree
Added:
Modified:
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll
llvm/test/Transforms/SimplifyCFG/extract-cost.ll
llvm/test/Transforms/SimplifyCFG/pr34131.ll
Removed:
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 03626abc3faf..d1851da69138 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -3668,6 +3668,8 @@ static bool SimplifyCondBranchToCondBranch(BranchInst
*PBI, BranchInst *BI,
LLVM_DEBUG(dbgs() << "FOLDING BRs:" << *PBI->getParent()
<< "AND: " << *BI->getParent());
+ SmallVector Updates;
+
// If OtherDest *is* BB, then BB is a basic block with a single conditional
// branch in it, where one edge (OtherDest) goes back to itself but the other
// exits. We don't *know* that the program avoids the infinite loop
@@ -3681,6 +3683,7 @@ static bool SimplifyCondBranchToCondBranch(BranchInst
*PBI, BranchInst *BI,
BasicBlock *InfLoopBlock =
BasicBlock::Create(BB->getContext(), "infloop", BB->getParent());
BranchInst::Create(InfLoopBlock, InfLoopBlock);
+Updates.push_back({DominatorTree::Insert, InfLoopBlock, InfLoopBlock});
OtherDest = InfLoopBlock;
}
@@ -3702,11 +3705,20 @@ static bool SimplifyCondBranchToCondBranch(BranchInst
*PBI, BranchInst *BI,
// Merge the conditions.
Value *Cond = Builder.CreateOr(PBICond, BICond, "brmerge");
+ for (auto *Successor : successors(PBI->getParent()))
+Updates.push_back({DominatorTree::Delete, PBI->getParent(), Successor});
+
// Modify PBI to branch on the new condition to the new dests.
PBI->setCondition(Cond);
PBI->setSuccessor(0, CommonDest);
PBI->setSuccessor(1, OtherDest);
+ for (auto *Successor : successors(PBI->getParent()))
+Updates.push_back({DominatorTree::Insert, PBI->getParent(), Successor});
+
+ if (DTU)
+DTU->applyUpdatesPermissive(Updates);
+
// Update branch weight for PBI.
uint64_t PredTrueWeight, PredFalseWeight, SuccTrueWeight, SuccFalseWeight;
uint64_t PredCommon, PredOther, SuccCommon, SuccOther;
diff --git a/llvm/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll
b/llvm/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll
index dee2e9b3294f..037428b7791e 100644
--- a/llvm/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll
+++ b/llvm/test/Transforms/SimplifyCFG/2008-07-13-InfLoopMiscompile.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -simplifycfg -S | FileCheck %s
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S |
FileCheck %s
; PR2540
; Outval should end up with a select from 0/2, not all constants.
diff --git a/llvm/test/Transforms/SimplifyCFG/extract-cost.ll
b/llvm/test/Transforms/SimplifyCFG/extract-cost.ll
index 0a544f585cd1..190ceba0ea95 100644
--- a/llvm/test/Transforms/SimplifyCFG/extract-cost.ll
+++ b/llvm/test/Transforms/SimplifyCFG/extract-cost.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -simplifycfg -S < %s | FileCheck %s
+; RUN: opt -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s |
FileCheck %s
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) #1
diff --git a/llvm/test/Transforms/SimplifyCFG/pr34131.ll
b/llvm/test/Transforms/SimplifyCFG/pr34131.ll
index b64b6876e04e..ddd1f538e8bd 100644
--- a/llvm/test/Transforms/SimplifyCFG/pr34131.ll
+++ b/llvm/test/Transforms/SimplifyCFG/pr34131.ll
@@ -1,4 +1,4 @@
-; RUN: opt -simplifycfg -S < %s | FileCheck %s
+; RUN: opt -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S < %s |
FileCheck %s
; Just checking for lack of crash here, but we should be able to check the IR?
; Earlier version using auto-generated checks from utils/update_test_checks.py
___
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[llvm-branch-commits] [llvm] 39a56f7 - [SimplifyCFG] Teach SimplifyTerminatorOnSelect() to preserve DomTree
Author: Roman Lebedev
Date: 2020-12-30T00:48:12+03:00
New Revision: 39a56f7f1722b1e917a3bd5c829ec1d7effd5a11
URL:
https://github.com/llvm/llvm-project/commit/39a56f7f1722b1e917a3bd5c829ec1d7effd5a11
DIFF:
https://github.com/llvm/llvm-project/commit/39a56f7f1722b1e917a3bd5c829ec1d7effd5a11.diff
LOG: [SimplifyCFG] Teach SimplifyTerminatorOnSelect() to preserve DomTree
Added:
Modified:
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/switch-on-const-select.ll
Removed:
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index d1851da69138..24572810be70 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -3805,6 +3805,8 @@ bool
SimplifyCFGOpt::SimplifyTerminatorOnSelect(Instruction *OldTerm,
BasicBlock *KeepEdge1 = TrueBB;
BasicBlock *KeepEdge2 = TrueBB != FalseBB ? FalseBB : nullptr;
+ SmallVector Updates;
+
// Then remove the rest.
for (BasicBlock *Succ : successors(OldTerm)) {
// Make sure only to keep exactly one copy of each edge.
@@ -3812,9 +3814,11 @@ bool
SimplifyCFGOpt::SimplifyTerminatorOnSelect(Instruction *OldTerm,
KeepEdge1 = nullptr;
else if (Succ == KeepEdge2)
KeepEdge2 = nullptr;
-else
+else {
Succ->removePredecessor(OldTerm->getParent(),
/*KeepOneInputPHIs=*/true);
+ Updates.push_back({DominatorTree::Delete, OldTerm->getParent(), Succ});
+}
}
IRBuilder<> Builder(OldTerm);
@@ -3822,14 +3826,17 @@ bool
SimplifyCFGOpt::SimplifyTerminatorOnSelect(Instruction *OldTerm,
// Insert an appropriate new terminator.
if (!KeepEdge1 && !KeepEdge2) {
-if (TrueBB == FalseBB)
+if (TrueBB == FalseBB) {
// We were only looking for one successor, and it was present.
// Create an unconditional branch to it.
Builder.CreateBr(TrueBB);
-else {
+ Updates.push_back({DominatorTree::Insert, OldTerm->getParent(), TrueBB});
+} else {
// We found both of the successors we were looking for.
// Create a conditional branch sharing the condition of the select.
BranchInst *NewBI = Builder.CreateCondBr(Cond, TrueBB, FalseBB);
+ Updates.push_back({DominatorTree::Insert, OldTerm->getParent(), TrueBB});
+ Updates.push_back({DominatorTree::Insert, OldTerm->getParent(),
FalseBB});
if (TrueWeight != FalseWeight)
setBranchWeights(NewBI, TrueWeight, FalseWeight);
}
@@ -3841,15 +3848,20 @@ bool
SimplifyCFGOpt::SimplifyTerminatorOnSelect(Instruction *OldTerm,
// One of the selected values was a successor, but the other wasn't.
// Insert an unconditional branch to the one that was found;
// the edge to the one that wasn't must be unreachable.
-if (!KeepEdge1)
+if (!KeepEdge1) {
// Only TrueBB was found.
Builder.CreateBr(TrueBB);
-else
+ Updates.push_back({DominatorTree::Insert, OldTerm->getParent(), TrueBB});
+} else {
// Only FalseBB was found.
Builder.CreateBr(FalseBB);
+ Updates.push_back({DominatorTree::Insert, OldTerm->getParent(),
FalseBB});
+}
}
EraseTerminatorAndDCECond(OldTerm);
+ if (DTU)
+DTU->applyUpdatesPermissive(Updates);
return true;
}
diff --git a/llvm/test/Transforms/SimplifyCFG/switch-on-const-select.ll
b/llvm/test/Transforms/SimplifyCFG/switch-on-const-select.ll
index 98c434a5a0ec..013096625b1c 100644
--- a/llvm/test/Transforms/SimplifyCFG/switch-on-const-select.ll
+++ b/llvm/test/Transforms/SimplifyCFG/switch-on-const-select.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -simplifycfg -S | FileCheck -enable-var-scope %s
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S |
FileCheck -enable-var-scope %s
; Test basic folding to a conditional branch.
define i32 @foo(i64 %x, i64 %y) nounwind {
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[llvm-branch-commits] [llvm] df4a931 - [IROutliner] Adding OptRemarks to the IROutliner Pass
Author: Andrew Litteken
Date: 2020-12-29T15:52:08-06:00
New Revision: df4a931c63b60db4589e348e8f8ab9a49e093aa7
URL:
https://github.com/llvm/llvm-project/commit/df4a931c63b60db4589e348e8f8ab9a49e093aa7
DIFF:
https://github.com/llvm/llvm-project/commit/df4a931c63b60db4589e348e8f8ab9a49e093aa7.diff
LOG: [IROutliner] Adding OptRemarks to the IROutliner Pass
This prints OptRemarks at each location where a decision is made to not
outline, or to outline a specific section for the IROutliner pass.
Test:
llvm/test/Transforms/IROutliner/opt-remarks.ll
Reviewers: jroelofs, paquette
Differential Revision: https://reviews.llvm.org/D87300
Added:
llvm/test/Transforms/IROutliner/opt-remarks.ll
Modified:
llvm/include/llvm/Transforms/IPO/IROutliner.h
llvm/lib/Transforms/IPO/IROutliner.cpp
Removed:
diff --git a/llvm/include/llvm/Transforms/IPO/IROutliner.h
b/llvm/include/llvm/Transforms/IPO/IROutliner.h
index 0cba35f637c6..6291af741184 100644
--- a/llvm/include/llvm/Transforms/IPO/IROutliner.h
+++ b/llvm/include/llvm/Transforms/IPO/IROutliner.h
@@ -162,8 +162,9 @@ struct OutlinableRegion {
class IROutliner {
public:
IROutliner(function_ref GTTI,
- function_ref GIRSI)
- : getTTI(GTTI), getIRSI(GIRSI) {}
+ function_ref GIRSI,
+ function_ref GORE)
+ : getTTI(GTTI), getIRSI(GIRSI), getORE(GORE) {}
bool run(Module &M);
private:
@@ -277,6 +278,9 @@ class IROutliner {
/// IRSimilarityIdentifier lambda to retrieve IRSimilarityIdentifier.
function_ref getIRSI;
+ /// The optimization remark emitter for the pass.
+ function_ref getORE;
+
/// The memory allocator used to allocate the CodeExtractors.
SpecificBumpPtrAllocator ExtractorAllocator;
diff --git a/llvm/lib/Transforms/IPO/IROutliner.cpp
b/llvm/lib/Transforms/IPO/IROutliner.cpp
index da90f1a12871..d972908f507d 100644
--- a/llvm/lib/Transforms/IPO/IROutliner.cpp
+++ b/llvm/lib/Transforms/IPO/IROutliner.cpp
@@ -13,6 +13,7 @@
#include "llvm/Transforms/IPO/IROutliner.h"
#include "llvm/Analysis/IRSimilarityIdentifier.h"
+#include "llvm/Analysis/OptimizationRemarkEmitter.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/PassManager.h"
@@ -216,6 +217,7 @@ constantMatches(Value *V, unsigned GVN,
DenseMap::iterator GVNToConstantIt;
bool Inserted;
+
// If we have a constant, try to make a new entry in the GVNToConstant.
std::tie(GVNToConstantIt, Inserted) =
GVNToConstant.insert(std::make_pair(GVN, CST));
@@ -1549,6 +1551,29 @@ unsigned IROutliner::doOutline(Module &M) {
if (CurrentGroup.Cost >= CurrentGroup.Benefit && CostModel) {
for (OutlinableRegion *OS : CurrentGroup.Regions)
OS->reattachCandidate();
+ OptimizationRemarkEmitter &ORE = getORE(
+ *CurrentGroup.Regions[0]->Candidate->getFunction());
+ ORE.emit([&]() {
+IRSimilarityCandidate *C = CurrentGroup.Regions[0]->Candidate;
+OptimizationRemarkMissed R(DEBUG_TYPE, "WouldNotDecreaseSize",
+ C->frontInstruction());
+R << "did not outline "
+ << ore::NV(std::to_string(CurrentGroup.Regions.size()))
+ << " regions due to estimated increase of "
+ << ore::NV("InstructionIncrease",
+ std::to_string(static_cast(CurrentGroup.Cost -
+ CurrentGroup.Benefit)))
+ << " instructions at locations ";
+interleave(
+CurrentGroup.Regions.begin(), CurrentGroup.Regions.end(),
+[&R](OutlinableRegion *Region) {
+ R << ore::NV(
+ "DebugLoc",
+ Region->Candidate->frontInstruction()->getDebugLoc());
+},
+[&R]() { R << " "; });
+return R;
+ });
continue;
}
@@ -1569,11 +1594,35 @@ unsigned IROutliner::doOutline(Module &M) {
}
}
+LLVM_DEBUG(dbgs() << "Outlined " << OutlinedRegions.size()
+ << " with benefit " << CurrentGroup.Benefit
+ << " and cost " << CurrentGroup.Cost << "\n");
+
CurrentGroup.Regions = std::move(OutlinedRegions);
if (CurrentGroup.Regions.empty())
continue;
+OptimizationRemarkEmitter &ORE =
+getORE(*CurrentGroup.Regions[0]->Call->getFunction());
+ORE.emit([&]() {
+ IRSimilarityCandidate *C = CurrentGroup.Regions[0]->Candidate;
+ OptimizationRemark R(DEBUG_TYPE, "Outlined", C->front()->Inst);
+ R << "outlined " << ore::NV(std::to_string(CurrentGroup.Regions.size()))
+<< " regions with decrease of "
+<< ore::NV("Benefit", std::to_string(static_cast(
+ CurrentGroup.Benefit - CurrentGroup.Cost)))
+<< " instructions at locations ";
+ interleave(
+ CurrentGroup.Regions.beg
[llvm-branch-commits] [mlir] e032669 - [mlir] Skip empty op-pipelines in inliner textual opt parsing
Author: Jacques Pienaar
Date: 2020-12-29T13:59:53-08:00
New Revision: e03266994af898efcde7b27936250e85f774f39f
URL:
https://github.com/llvm/llvm-project/commit/e03266994af898efcde7b27936250e85f774f39f
DIFF:
https://github.com/llvm/llvm-project/commit/e03266994af898efcde7b27936250e85f774f39f.diff
LOG: [mlir] Skip empty op-pipelines in inliner textual opt parsing
Avoids failing on cases like
inline{default-pipeline=canonicalize max-iterations=4 op-pipelines=},
as produced by crash reproducer.
Added:
Modified:
mlir/lib/Transforms/Inliner.cpp
Removed:
diff --git a/mlir/lib/Transforms/Inliner.cpp b/mlir/lib/Transforms/Inliner.cpp
index 364af20c0695..42ab8f0ce4df 100644
--- a/mlir/lib/Transforms/Inliner.cpp
+++ b/mlir/lib/Transforms/Inliner.cpp
@@ -764,6 +764,10 @@ LogicalResult InlinerPass::initializeOptions(StringRef
options) {
// Initialize the op specific pass pipelines.
llvm::StringMap pipelines;
for (StringRef pipeline : opPipelineStrs) {
+// Skip empty pipelines.
+if (pipeline.empty())
+ continue;
+
// Pipelines are expected to be of the form `()`.
size_t pipelineStart = pipeline.find_first_of('(');
if (pipelineStart == StringRef::npos || !pipeline.consume_back(")"))
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[llvm-branch-commits] [mlir] f5665a2 - [mlir][python] Add Operation.verify().
Author: Stella Laurenzo
Date: 2020-12-29T14:10:31-08:00
New Revision: f5665a24862163e8783ccf3fd2d2cab62d539e93
URL:
https://github.com/llvm/llvm-project/commit/f5665a24862163e8783ccf3fd2d2cab62d539e93
DIFF:
https://github.com/llvm/llvm-project/commit/f5665a24862163e8783ccf3fd2d2cab62d539e93.diff
LOG: [mlir][python] Add Operation.verify().
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D93913
Added:
Modified:
mlir/lib/Bindings/Python/IRModules.cpp
mlir/test/Bindings/Python/ir_operation.py
Removed:
diff --git a/mlir/lib/Bindings/Python/IRModules.cpp
b/mlir/lib/Bindings/Python/IRModules.cpp
index 86d6f8206155..cd58f291d2ec 100644
--- a/mlir/lib/Bindings/Python/IRModules.cpp
+++ b/mlir/lib/Bindings/Python/IRModules.cpp
@@ -3025,7 +3025,14 @@ void mlir::python::populateIRSubmodule(py::module &m) {
py::arg("enable_debug_info") = false,
py::arg("pretty_debug_info") = false,
py::arg("print_generic_op_form") = false,
- py::arg("use_local_scope") = false, kOperationGetAsmDocstring);
+ py::arg("use_local_scope") = false, kOperationGetAsmDocstring)
+ .def(
+ "verify",
+ [](PyOperationBase &self) {
+return mlirOperationVerify(self.getOperation());
+ },
+ "Verify the operation and return true if it passes, false if it "
+ "fails.");
py::class_(m, "Operation")
.def_static("create", &PyOperation::create, py::arg("name"),
diff --git a/mlir/test/Bindings/Python/ir_operation.py
b/mlir/test/Bindings/Python/ir_operation.py
index 1f6df8626a0a..1aa365a1f35d 100644
--- a/mlir/test/Bindings/Python/ir_operation.py
+++ b/mlir/test/Bindings/Python/ir_operation.py
@@ -31,6 +31,10 @@ def testTraverseOpRegionBlockIterators():
# CHECK: MODULE REGIONS=1 BLOCKS=1
print(f"MODULE REGIONS={len(regions)} BLOCKS={len(blocks)}")
+ # Should verify.
+ # CHECK: .verify = True
+ print(f".verify = {module.operation.verify()}")
+
# Get the regions and blocks from the default collections.
default_regions = list(op)
default_blocks = list(default_regions[0])
@@ -546,10 +550,12 @@ def testPrintInvalidOperation():
# This block does not have a terminator, it may crash the custom printer.
# Verify that we fallback to the generic printer for safety.
block = module.regions[0].blocks.append()
-print(module)
# CHECK: // Verification failed, printing generic form
# CHECK: "module"() ( {
# CHECK: }) : () -> ()
+print(module)
+# CHECK: .verify = False
+print(f".verify = {module.operation.verify()}")
run(testPrintInvalidOperation)
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[llvm-branch-commits] [mlir] 14056c8 - [mlir][Python] Add an Operation.name property
Author: Siddharth Krishna
Date: 2020-12-29T14:14:32-08:00
New Revision: 14056c88d668fe396eaa59439ddf56f59dd188ec
URL:
https://github.com/llvm/llvm-project/commit/14056c88d668fe396eaa59439ddf56f59dd188ec
DIFF:
https://github.com/llvm/llvm-project/commit/14056c88d668fe396eaa59439ddf56f59dd188ec.diff
LOG: [mlir][Python] Add an Operation.name property
Reviewed By: stellaraccident, mehdi_amini
Differential Revision: https://reviews.llvm.org/D93474
Added:
Modified:
mlir/lib/Bindings/Python/IRModules.cpp
mlir/test/Bindings/Python/ir_operation.py
Removed:
diff --git a/mlir/lib/Bindings/Python/IRModules.cpp
b/mlir/lib/Bindings/Python/IRModules.cpp
index cd58f291d2ec..8fe63f3d1a40 100644
--- a/mlir/lib/Bindings/Python/IRModules.cpp
+++ b/mlir/lib/Bindings/Python/IRModules.cpp
@@ -3042,6 +3042,13 @@ void mlir::python::populateIRSubmodule(py::module &m) {
py::arg("successors") = py::none(), py::arg("regions") = 0,
py::arg("loc") = py::none(), py::arg("ip") = py::none(),
kOperationCreateDocstring)
+ .def_property_readonly("name",
+ [](PyOperation &self) {
+ MlirOperation operation = self.get();
+ MlirStringRef name = mlirIdentifierStr(
+ mlirOperationGetName(operation));
+ return py::str(name.data, name.length);
+ })
.def_property_readonly(
"context",
[](PyOperation &self) { return self.getContext().getObject(); },
diff --git a/mlir/test/Bindings/Python/ir_operation.py
b/mlir/test/Bindings/Python/ir_operation.py
index 1aa365a1f35d..ba54e83f65e8 100644
--- a/mlir/test/Bindings/Python/ir_operation.py
+++ b/mlir/test/Bindings/Python/ir_operation.py
@@ -584,3 +584,22 @@ def testCreateWithInvalidAttributes():
# CHECK: Found an invalid (`None`?) attribute value for the key
"some_key" when attempting to create the operation "module"
print(e)
run(testCreateWithInvalidAttributes)
+
+
+# CHECK-LABEL: TEST: testOperationName
+def testOperationName():
+ ctx = Context()
+ ctx.allow_unregistered_dialects = True
+ module = Module.parse(r"""
+%0 = "custom.op1"() : () -> f32
+%1 = "custom.op2"() : () -> i32
+%2 = "custom.op1"() : () -> f32
+ """, ctx)
+
+ # CHECK: custom.op1
+ # CHECK: custom.op2
+ # CHECK: custom.op1
+ for op in module.body.operations:
+print(op.operation.name)
+
+run(testOperationName)
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[llvm-branch-commits] [mlir] 5fd2b3a - [mlir] Add error message when failing to add pass
Author: Jacques Pienaar
Date: 2020-12-29T14:20:19-08:00
New Revision: 5fd2b3a1246fee0ce1613931fcf1ed51412a6b3f
URL:
https://github.com/llvm/llvm-project/commit/5fd2b3a1246fee0ce1613931fcf1ed51412a6b3f
DIFF:
https://github.com/llvm/llvm-project/commit/5fd2b3a1246fee0ce1613931fcf1ed51412a6b3f.diff
LOG: [mlir] Add error message when failing to add pass
Ran into failure without any error message previously here.
Differential Revision: https://reviews.llvm.org/D93910
Added:
mlir/test/Pass/invalid-pass.mlir
Modified:
mlir/lib/Pass/PassRegistry.cpp
Removed:
diff --git a/mlir/lib/Pass/PassRegistry.cpp b/mlir/lib/Pass/PassRegistry.cpp
index f41ca72d7838..091fee5fcd9b 100644
--- a/mlir/lib/Pass/PassRegistry.cpp
+++ b/mlir/lib/Pass/PassRegistry.cpp
@@ -452,12 +452,15 @@ LogicalResult TextualPipeline::addToPipeline(
function_ref errorHandler) const {
for (auto &elt : elements) {
if (elt.registryEntry) {
- if (failed(
- elt.registryEntry->addToPipeline(pm, elt.options, errorHandler)))
-return failure();
+ if (failed(elt.registryEntry->addToPipeline(pm, elt.options,
+ errorHandler))) {
+return errorHandler("failed to add `" + elt.name + "` with options `" +
+elt.options + "`");
+ }
} else if (failed(addToPipeline(elt.innerPipeline, pm.nest(elt.name),
errorHandler))) {
- return failure();
+ return errorHandler("failed to add `" + elt.name + "` with options `" +
+ elt.options + "` to inner pipeline");
}
}
return success();
diff --git a/mlir/test/Pass/invalid-pass.mlir
b/mlir/test/Pass/invalid-pass.mlir
new file mode 100644
index ..2453b8d99ec9
--- /dev/null
+++ b/mlir/test/Pass/invalid-pass.mlir
@@ -0,0 +1,6 @@
+// RUN: not mlir-opt %s
-pass-pipeline='module(test-module-pass{test-option=a})' 2>&1 | FileCheck %s
+
+// CHECK: : no such option test-option
+// CHECK: failed to add `test-module-pass` with options `test-option=a`
+// CHECK: failed to add `module` with options `` to inner pipeline
+module {}
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[llvm-branch-commits] [lldb] 7e5a187 - CrashReason: Add MTE tag check faults to the list of crash reasons.
Author: Peter Collingbourne
Date: 2020-12-29T14:36:50-08:00
New Revision: 7e5a187de31358741f9868cdee7b0c63c1343d8d
URL:
https://github.com/llvm/llvm-project/commit/7e5a187de31358741f9868cdee7b0c63c1343d8d
DIFF:
https://github.com/llvm/llvm-project/commit/7e5a187de31358741f9868cdee7b0c63c1343d8d.diff
LOG: CrashReason: Add MTE tag check faults to the list of crash reasons.
As of Linux 5.10, the kernel may report either of the two following
crash reasons:
- SEGV_MTEAERR: async MTE tag check fault
- SEGV_MTESERR: sync MTE tag check fault
Teach LLDB about them.
Differential Revision: https://reviews.llvm.org/D93495
Added:
Modified:
lldb/source/Plugins/Process/POSIX/CrashReason.cpp
lldb/source/Plugins/Process/POSIX/CrashReason.h
Removed:
diff --git a/lldb/source/Plugins/Process/POSIX/CrashReason.cpp
b/lldb/source/Plugins/Process/POSIX/CrashReason.cpp
index 579077b45bf9..c6ede61cfe1b 100644
--- a/lldb/source/Plugins/Process/POSIX/CrashReason.cpp
+++ b/lldb/source/Plugins/Process/POSIX/CrashReason.cpp
@@ -58,6 +58,18 @@ CrashReason GetCrashReasonForSIGSEGV(const siginfo_t &info) {
#endif
case SEGV_BNDERR:
return CrashReason::eBoundViolation;
+#ifdef __linux__
+#ifndef SEGV_MTEAERR
+#define SEGV_MTEAERR 8
+#endif
+ case SEGV_MTEAERR:
+return CrashReason::eAsyncTagCheckFault;
+#ifndef SEGV_MTESERR
+#define SEGV_MTESERR 9
+#endif
+ case SEGV_MTESERR:
+return CrashReason::eSyncTagCheckFault;
+#endif // __linux__
}
return CrashReason::eInvalidCrashReason;
@@ -166,6 +178,13 @@ std::string GetCrashReasonString(CrashReason reason,
lldb::addr_t fault_addr) {
case CrashReason::eBoundViolation:
str = "signal SIGSEGV: bound violation";
break;
+ case CrashReason::eAsyncTagCheckFault:
+str = "signal SIGSEGV: async tag check fault";
+break;
+ case CrashReason::eSyncTagCheckFault:
+str = "signal SIGSEGV: sync tag check fault";
+AppendFaultAddr(str, fault_addr);
+break;
case CrashReason::eIllegalOpcode:
str = "signal SIGILL: illegal instruction";
break;
@@ -246,6 +265,12 @@ const char *CrashReasonAsString(CrashReason reason) {
case CrashReason::eBoundViolation:
str = "eBoundViolation";
break;
+ case CrashReason::eAsyncTagCheckFault:
+str = "eAsyncTagCheckFault";
+break;
+ case CrashReason::eSyncTagCheckFault:
+str = "eSyncTagCheckFault";
+break;
// SIGILL crash reasons.
case CrashReason::eIllegalOpcode:
diff --git a/lldb/source/Plugins/Process/POSIX/CrashReason.h
b/lldb/source/Plugins/Process/POSIX/CrashReason.h
index 9b4784a1e68e..f5213891d976 100644
--- a/lldb/source/Plugins/Process/POSIX/CrashReason.h
+++ b/lldb/source/Plugins/Process/POSIX/CrashReason.h
@@ -22,6 +22,8 @@ enum class CrashReason {
eInvalidAddress,
ePrivilegedAddress,
eBoundViolation,
+ eAsyncTagCheckFault,
+ eSyncTagCheckFault,
// SIGILL crash reasons.
eIllegalOpcode,
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[llvm-branch-commits] [llvm] fddb417 - [llvm-elfabi] Add flag to preserve timestamp when output is the same
Author: Haowei Wu
Date: 2020-12-29T14:43:47-08:00
New Revision: fddb41744958d21635a60622cfb4067122810bcc
URL:
https://github.com/llvm/llvm-project/commit/fddb41744958d21635a60622cfb4067122810bcc
DIFF:
https://github.com/llvm/llvm-project/commit/fddb41744958d21635a60622cfb4067122810bcc.diff
LOG: [llvm-elfabi] Add flag to preserve timestamp when output is the same
This change adds '--write-if-changed' flag to llvm-elfabi tool. When
enabled, llvm-elfabi will not overwrite the existing file if the
content of the file will not be changed, which preserves the
timestamp.
Differential Revision: https://reviews.llvm.org/D92902
Added:
llvm/test/tools/llvm-elfabi/preserve-dates-stub.test
llvm/test/tools/llvm-elfabi/preserve-dates-tbe.test
Modified:
llvm/include/llvm/InterfaceStub/ELFObjHandler.h
llvm/lib/InterfaceStub/ELFObjHandler.cpp
llvm/tools/llvm-elfabi/llvm-elfabi.cpp
Removed:
diff --git a/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
b/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
index cbb9420cb666..4ec158c1405f 100644
--- a/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
+++ b/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
@@ -16,6 +16,7 @@
#include "llvm/InterfaceStub/ELFStub.h"
#include "llvm/Object/ELFObjectFile.h"
#include "llvm/Object/ELFTypes.h"
+#include "llvm/Support/FileSystem.h"
namespace llvm {
@@ -35,8 +36,10 @@ Expected>
readELFFile(MemoryBufferRef Buf);
/// @param FilePath File path for writing the ELF binary.
/// @param Stub Source ELFStub to generate a binary ELF stub from.
/// @param OutputFormat Target ELFType to write binary as.
+/// @param WriteIfChanged Whether or not to preserve timestamp if
+///the output stays the same.
Error writeBinaryStub(StringRef FilePath, const ELFStub &Stub,
- ELFTarget OutputFormat);
+ ELFTarget OutputFormat, bool WriteIfChanged = false);
} // end namespace elfabi
} // end namespace llvm
diff --git a/llvm/lib/InterfaceStub/ELFObjHandler.cpp
b/llvm/lib/InterfaceStub/ELFObjHandler.cpp
index e50ebd7b8ba1..40d8afa88ad2 100644
--- a/llvm/lib/InterfaceStub/ELFObjHandler.cpp
+++ b/llvm/lib/InterfaceStub/ELFObjHandler.cpp
@@ -17,6 +17,7 @@
#include "llvm/Support/FileOutputBuffer.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/MemoryBuffer.h"
+#include "llvm/Support/Process.h"
using llvm::MemoryBufferRef;
using llvm::object::ELFObjectFile;
@@ -663,8 +664,25 @@ buildStub(const ELFObjectFile &ElfObj) {
/// @param FilePath File path for writing the ELF binary.
/// @param Stub Source ELFStub to generate a binary ELF stub from.
template
-static Error writeELFBinaryToFile(StringRef FilePath, const ELFStub &Stub) {
+static Error writeELFBinaryToFile(StringRef FilePath, const ELFStub &Stub,
+ bool WriteIfChanged) {
ELFStubBuilder Builder{Stub};
+ // Write Stub to memory first.
+ std::vector Buf(Builder.getSize());
+ Builder.write(Buf.data());
+
+ if (WriteIfChanged) {
+if (ErrorOr> BufOrError =
+MemoryBuffer::getFile(FilePath)) {
+ // Compare Stub output with existing Stub file.
+ // If Stub file unchanged, abort updating.
+ if ((*BufOrError)->getBufferSize() == Builder.getSize() &&
+ !memcmp((*BufOrError)->getBufferStart(), Buf.data(),
+ Builder.getSize()))
+return Error::success();
+}
+ }
+
Expected> BufOrError =
FileOutputBuffer::create(FilePath, Builder.getSize());
if (!BufOrError)
@@ -674,13 +692,10 @@ static Error writeELFBinaryToFile(StringRef FilePath,
const ELFStub &Stub) {
"` for writing");
// Write binary to file.
- std::unique_ptr Buf = std::move(*BufOrError);
- Builder.write(Buf->getBufferStart());
+ std::unique_ptr FileBuf = std::move(*BufOrError);
+ memcpy(FileBuf->getBufferStart(), Buf.data(), Buf.size());
- if (Error E = Buf->commit())
-return E;
-
- return Error::success();
+ return FileBuf->commit();
}
Expected> readELFFile(MemoryBufferRef Buf) {
@@ -705,15 +720,15 @@ Expected>
readELFFile(MemoryBufferRef Buf) {
// This function wraps the ELFT writeELFBinaryToFile() so writeBinaryStub()
// can be called without having to use ELFType templates directly.
Error writeBinaryStub(StringRef FilePath, const ELFStub &Stub,
- ELFTarget OutputFormat) {
+ ELFTarget OutputFormat, bool WriteIfChanged) {
if (OutputFormat == ELFTarget::ELF32LE)
-return writeELFBinaryToFile(FilePath, Stub);
+return writeELFBinaryToFile(FilePath, Stub, WriteIfChanged);
if (OutputFormat == ELFTarget::ELF32BE)
-return writeELFBinaryToFile(FilePath, Stub);
+return writeELFBinaryToFile(FilePath, Stub, WriteIfChanged);
if (OutputFormat == ELFTarget::ELF64LE)
-return writeELFBinaryToFile(FilePath, Stub);
+return writeELFBina
[llvm-branch-commits] [llvm] 2131494 - Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen pipeline"
Author: Yuanfang Chen
Date: 2020-12-29T15:17:23-08:00
New Revision: 21314940c4856e0cb81b664fd2d2117d1b7dc3e3
URL:
https://github.com/llvm/llvm-project/commit/21314940c4856e0cb81b664fd2d2117d1b7dc3e3
DIFF:
https://github.com/llvm/llvm-project/commit/21314940c4856e0cb81b664fd2d2117d1b7dc3e3.diff
LOG: Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build
codegen pipeline"
This reverts commit 94427af60c66ffea655a3084825c6c3a9deec1ad (relands
4646de5d75cfce3da4ddeffb6eb8e66e38238800 with fix).
Use "return std::move(AsmStreamer);" instead of "return AsmStreamer;" in
LVMTargetMachine::createMCStreamer. Unlike Clang, GCC seems having trouble
inserting a implicit lvalue->rvalue conversion.
Added:
llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
llvm/include/llvm/CodeGen/MachinePassRegistry.def
llvm/include/llvm/Target/CGPassBuilderOption.h
llvm/lib/CodeGen/CodeGenPassBuilder.cpp
Modified:
llvm/include/llvm/CodeGen/TargetPassConfig.h
llvm/include/llvm/Target/TargetMachine.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/LLVMTargetMachine.cpp
llvm/lib/CodeGen/TargetPassConfig.cpp
Removed:
diff --git a/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
b/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
new file mode 100644
index ..12c93a0c4cf2
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
@@ -0,0 +1,1143 @@
+//===- Construction of codegen pass pipelines --*- C++
-*--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+/// \file
+///
+/// Interfaces for registering analysis passes, producing common pass manager
+/// configurations, and parsing of pass pipelines.
+///
+//===--===//
+
+#ifndef LLVM_CODEGEN_CODEGENPASSBUILDER_H
+#define LLVM_CODEGEN_CODEGENPASSBUILDER_H
+
+#include "llvm/ADT/FunctionExtras.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/StringRef.h"
+#include "llvm/Analysis/AliasAnalysis.h"
+#include "llvm/Analysis/BasicAliasAnalysis.h"
+#include "llvm/Analysis/CFLAndersAliasAnalysis.h"
+#include "llvm/Analysis/CFLSteensAliasAnalysis.h"
+#include "llvm/Analysis/ScopedNoAliasAA.h"
+#include "llvm/Analysis/TargetTransformInfo.h"
+#include "llvm/Analysis/TypeBasedAliasAnalysis.h"
+#include "llvm/CodeGen/ExpandReductions.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachinePassManager.h"
+#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
+#include "llvm/CodeGen/UnreachableBlockElim.h"
+#include "llvm/IR/IRPrintingPasses.h"
+#include "llvm/IR/PassManager.h"
+#include "llvm/IR/Verifier.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCStreamer.h"
+#include "llvm/MC/MCTargetOptions.h"
+#include "llvm/Support/CodeGen.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/Error.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Target/CGPassBuilderOption.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Transforms/Scalar.h"
+#include "llvm/Transforms/Scalar/ConstantHoisting.h"
+#include "llvm/Transforms/Scalar/LoopPassManager.h"
+#include "llvm/Transforms/Scalar/LoopStrengthReduce.h"
+#include "llvm/Transforms/Scalar/LowerConstantIntrinsics.h"
+#include "llvm/Transforms/Scalar/MergeICmps.h"
+#include "llvm/Transforms/Scalar/PartiallyInlineLibCalls.h"
+#include "llvm/Transforms/Utils.h"
+#include "llvm/Transforms/Utils/EntryExitInstrumenter.h"
+#include "llvm/Transforms/Utils/LowerInvoke.h"
+#include
+#include
+#include
+#include
+#include
+
+namespace llvm {
+
+// FIXME: Dummy target independent passes definitions that have not yet been
+// ported to new pass manager. Once they do, remove these.
+#define DUMMY_FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR)
\
+ struct PASS_NAME : public PassInfoMixin {
\
+template PASS_NAME(Ts &&...) {}
\
+PreservedAnalyses run(Function &, FunctionAnalysisManager &) {
\
+ return PreservedAnalyses::all();
\
+}
\
+ };
+#define DUMMY_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR)
\
+ struct PASS_NAME : public PassInfoMixin {
\
+template PASS_NAME(Ts &&...) {}
\
+PreservedAnalyses run(Module &, ModuleAnalysisManager &) {
\
+ return PreservedAnalyses::all();
\
+}
\
+ };
+#define
[llvm-branch-commits] [llvm] 92207b2 - [gn build] Port 21314940c48
Author: LLVM GN Syncbot
Date: 2020-12-29T23:18:48Z
New Revision: 92207b2ccea2c192be2aee32efe199dc682fd36f
URL:
https://github.com/llvm/llvm-project/commit/92207b2ccea2c192be2aee32efe199dc682fd36f
DIFF:
https://github.com/llvm/llvm-project/commit/92207b2ccea2c192be2aee32efe199dc682fd36f.diff
LOG: [gn build] Port 21314940c48
Added:
Modified:
llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Removed:
diff --git a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
index 961cb0b0bc46..49cbd51de379 100644
--- a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
@@ -32,6 +32,7 @@ static_library("CodeGen") {
"CalcSpillWeights.cpp",
"CallingConvLower.cpp",
"CodeGen.cpp",
+"CodeGenPassBuilder.cpp",
"CodeGenPrepare.cpp",
"CommandFlags.cpp",
"CriticalAntiDepBreaker.cpp",
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[llvm-branch-commits] [mlir] 2c8f5bd - [MLIR] Make ComplexType buildable if its element type is buildable
Author: Chris Morin
Date: 2020-12-29T23:31:42Z
New Revision: 2c8f5bd53945a209cd3cd851c63df3713fa0f9bd
URL:
https://github.com/llvm/llvm-project/commit/2c8f5bd53945a209cd3cd851c63df3713fa0f9bd
DIFF:
https://github.com/llvm/llvm-project/commit/2c8f5bd53945a209cd3cd851c63df3713fa0f9bd.diff
LOG: [MLIR] Make ComplexType buildable if its element type is buildable
If a ComplexType's element type is buildable, then that ComplexType should be
buildable. This is accomplished by the introduction of a new ODS class called
`SameBuildabilityAs`. This can be used by other types that are conditionally
buildable.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D93892
Added:
Modified:
mlir/include/mlir/IR/OpBase.td
mlir/test/mlir-tblgen/types.mlir
Removed:
diff --git a/mlir/include/mlir/IR/OpBase.td b/mlir/include/mlir/IR/OpBase.td
index 857a652f17d9..c65cc22c90f0 100644
--- a/mlir/include/mlir/IR/OpBase.td
+++ b/mlir/include/mlir/IR/OpBase.td
@@ -333,6 +333,13 @@ class BuildableType {
code builderCall = builder;
}
+// A type that's buildable iff the type passed as an argument is buildable.
+// This is intended for use by types like container types, which are only
+// buildable if the type of their elements is buildable.
+class SameBuildabilityAs {
+ code builderCall = !if(!empty(type.builderCall), "", builder);
+}
+
// Any type at all.
def AnyType : Type, "any type">;
@@ -479,7 +486,9 @@ class Complex
"$_self.cast<::mlir::ComplexType>().getElementType()",
type.predicate>]>,
"complex type with " # type.description # " elements",
- "::mlir::ComplexType"> {
+ "::mlir::ComplexType">,
+ SameBuildabilityAs {
Type elementType = type;
}
diff --git a/mlir/test/mlir-tblgen/types.mlir
b/mlir/test/mlir-tblgen/types.mlir
index 5e4dac33012b..61727d18e68f 100644
--- a/mlir/test/mlir-tblgen/types.mlir
+++ b/mlir/test/mlir-tblgen/types.mlir
@@ -58,7 +58,7 @@ func @complex_f64_tensor_success() {
// -
func @complex_f64_failure() {
- // expected-error@+1 {{must be complex type with 64-bit float elements}}
+ // expected-error@+1 {{op inferred type incompatible with return type of
operation}}
"test.complex_f64"() : () -> (f64)
return
}
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[llvm-branch-commits] [mlir] 58ce477 - Fix DRR pattern when attributes and operands are interleaved and a dag subtree appears in the rewrite
Author: Mehdi Amini
Date: 2020-12-30T00:19:38Z
New Revision: 58ce477676c7bd9c6cee0c6d05f2708b4e178ff3
URL:
https://github.com/llvm/llvm-project/commit/58ce477676c7bd9c6cee0c6d05f2708b4e178ff3
DIFF:
https://github.com/llvm/llvm-project/commit/58ce477676c7bd9c6cee0c6d05f2708b4e178ff3.diff
LOG: Fix DRR pattern when attributes and operands are interleaved and a dag
subtree appears in the rewrite
This fixes an incorrect fatal error in TableGen. This code probably comes
from before attributes were allowed to interleave with operands in ODS.
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D93915
Added:
Modified:
mlir/test/mlir-tblgen/rewriter-indexing.td
mlir/tools/mlir-tblgen/RewriterGen.cpp
Removed:
diff --git a/mlir/test/mlir-tblgen/rewriter-indexing.td
b/mlir/test/mlir-tblgen/rewriter-indexing.td
index ed493d09008b..c21b04f6d0f6 100644
--- a/mlir/test/mlir-tblgen/rewriter-indexing.td
+++ b/mlir/test/mlir-tblgen/rewriter-indexing.td
@@ -47,3 +47,11 @@ def test1 : Pat<(BOp $attr, (AOp $input)),
// CHECK: castedOp0.getODSOperands(1).begin()).getDefiningOp()
def test2 : Pat<(COp $attr1, $op1, $attr2, (AOp $op2)),
(BOp $attr1, $op2)>;
+
+
+// Check rewriting with a DAG subtree in the result and remapping a location.
+// CHECK: struct test3 : public ::mlir::RewritePattern {
+// CHECK: rewriter.create((*a.getODSResults(0).begin()).getLoc()
+def test3 : Pat<(BOp $attr, (AOp:$a $input)),
+(BOp $attr, (AOp $input), (location $a))>;
+
diff --git a/mlir/tools/mlir-tblgen/RewriterGen.cpp
b/mlir/tools/mlir-tblgen/RewriterGen.cpp
index da189c65ec2a..96488d9cedc0 100644
--- a/mlir/tools/mlir-tblgen/RewriterGen.cpp
+++ b/mlir/tools/mlir-tblgen/RewriterGen.cpp
@@ -998,7 +998,7 @@ std::string PatternEmitter::handleOpCreation(DagNode tree,
int resultIndex,
// First go through all the child nodes who are nested DAG constructs to
// create ops for them and remember the symbol names for them, so that we can
// use the results in the current node. This happens in a recursive manner.
- for (int i = 0, e = resultOp.getNumOperands(); i != e; ++i) {
+ for (int i = 0, e = tree.getNumArgs() - hasLocationDirective; i != e; ++i) {
if (auto child = tree.getArgAsNestedDag(i))
childNodeNames[i] = handleResultPattern(child, i, depth + 1);
}
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[llvm-branch-commits] [llvm] 16c8f6e - Revert "Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen pipeline""
Author: Yuanfang Chen
Date: 2020-12-29T16:29:07-08:00
New Revision: 16c8f6e91344ec9840d6aa9ec6b8d0c87a104ca3
URL:
https://github.com/llvm/llvm-project/commit/16c8f6e91344ec9840d6aa9ec6b8d0c87a104ca3
DIFF:
https://github.com/llvm/llvm-project/commit/16c8f6e91344ec9840d6aa9ec6b8d0c87a104ca3.diff
LOG: Revert "Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help
build codegen pipeline""
This reverts commit 21314940c4856e0cb81b664fd2d2117d1b7dc3e3.
Build failure in some bots.
Added:
Modified:
llvm/include/llvm/CodeGen/TargetPassConfig.h
llvm/include/llvm/Target/TargetMachine.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/LLVMTargetMachine.cpp
llvm/lib/CodeGen/TargetPassConfig.cpp
Removed:
llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
llvm/include/llvm/CodeGen/MachinePassRegistry.def
llvm/include/llvm/Target/CGPassBuilderOption.h
llvm/lib/CodeGen/CodeGenPassBuilder.cpp
diff --git a/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
b/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
deleted file mode 100644
index 12c93a0c4cf2..
--- a/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
+++ /dev/null
@@ -1,1143 +0,0 @@
-//===- Construction of codegen pass pipelines --*- C++
-*--===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-/// \file
-///
-/// Interfaces for registering analysis passes, producing common pass manager
-/// configurations, and parsing of pass pipelines.
-///
-//===--===//
-
-#ifndef LLVM_CODEGEN_CODEGENPASSBUILDER_H
-#define LLVM_CODEGEN_CODEGENPASSBUILDER_H
-
-#include "llvm/ADT/FunctionExtras.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/Analysis/AliasAnalysis.h"
-#include "llvm/Analysis/BasicAliasAnalysis.h"
-#include "llvm/Analysis/CFLAndersAliasAnalysis.h"
-#include "llvm/Analysis/CFLSteensAliasAnalysis.h"
-#include "llvm/Analysis/ScopedNoAliasAA.h"
-#include "llvm/Analysis/TargetTransformInfo.h"
-#include "llvm/Analysis/TypeBasedAliasAnalysis.h"
-#include "llvm/CodeGen/ExpandReductions.h"
-#include "llvm/CodeGen/MachineModuleInfo.h"
-#include "llvm/CodeGen/MachinePassManager.h"
-#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
-#include "llvm/CodeGen/UnreachableBlockElim.h"
-#include "llvm/IR/IRPrintingPasses.h"
-#include "llvm/IR/PassManager.h"
-#include "llvm/IR/Verifier.h"
-#include "llvm/MC/MCAsmInfo.h"
-#include "llvm/MC/MCStreamer.h"
-#include "llvm/MC/MCTargetOptions.h"
-#include "llvm/Support/CodeGen.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/Error.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Target/CGPassBuilderOption.h"
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Transforms/Scalar.h"
-#include "llvm/Transforms/Scalar/ConstantHoisting.h"
-#include "llvm/Transforms/Scalar/LoopPassManager.h"
-#include "llvm/Transforms/Scalar/LoopStrengthReduce.h"
-#include "llvm/Transforms/Scalar/LowerConstantIntrinsics.h"
-#include "llvm/Transforms/Scalar/MergeICmps.h"
-#include "llvm/Transforms/Scalar/PartiallyInlineLibCalls.h"
-#include "llvm/Transforms/Utils.h"
-#include "llvm/Transforms/Utils/EntryExitInstrumenter.h"
-#include "llvm/Transforms/Utils/LowerInvoke.h"
-#include
-#include
-#include
-#include
-#include
-
-namespace llvm {
-
-// FIXME: Dummy target independent passes definitions that have not yet been
-// ported to new pass manager. Once they do, remove these.
-#define DUMMY_FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR)
\
- struct PASS_NAME : public PassInfoMixin {
\
-template PASS_NAME(Ts &&...) {}
\
-PreservedAnalyses run(Function &, FunctionAnalysisManager &) {
\
- return PreservedAnalyses::all();
\
-}
\
- };
-#define DUMMY_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR)
\
- struct PASS_NAME : public PassInfoMixin {
\
-template PASS_NAME(Ts &&...) {}
\
-PreservedAnalyses run(Module &, ModuleAnalysisManager &) {
\
- return PreservedAnalyses::all();
\
-}
\
- };
-#define DUMMY_MACHINE_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR)
\
- struct PASS_NAME : public PassInfoMixin {
\
-template PASS_NAME(Ts &&...) {}
\
-
[llvm-branch-commits] [llvm] a373eac - [gn build] Port 16c8f6e9134
Author: LLVM GN Syncbot
Date: 2020-12-30T00:29:58Z
New Revision: a373eacb567eca3c544e290a11706480eaa505ad
URL:
https://github.com/llvm/llvm-project/commit/a373eacb567eca3c544e290a11706480eaa505ad
DIFF:
https://github.com/llvm/llvm-project/commit/a373eacb567eca3c544e290a11706480eaa505ad.diff
LOG: [gn build] Port 16c8f6e9134
Added:
Modified:
llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Removed:
diff --git a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
index 49cbd51de379..961cb0b0bc46 100644
--- a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
@@ -32,7 +32,6 @@ static_library("CodeGen") {
"CalcSpillWeights.cpp",
"CallingConvLower.cpp",
"CodeGen.cpp",
-"CodeGenPassBuilder.cpp",
"CodeGenPrepare.cpp",
"CommandFlags.cpp",
"CriticalAntiDepBreaker.cpp",
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[llvm-branch-commits] [llvm] 480936e - Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen pipeline" (again)
Author: Yuanfang Chen
Date: 2020-12-29T16:39:55-08:00
New Revision: 480936e741d588d53b9e2d9c5935b5daa0fdee25
URL:
https://github.com/llvm/llvm-project/commit/480936e741d588d53b9e2d9c5935b5daa0fdee25
DIFF:
https://github.com/llvm/llvm-project/commit/480936e741d588d53b9e2d9c5935b5daa0fdee25.diff
LOG: Reland "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build
codegen pipeline" (again)
This reverts commit 16c8f6e91344ec9840d6aa9ec6b8d0c87a104ca3 with fix.
-Wswitch catched an unhandled enum value due to recent commits in
TargetPassConfig.cpp.
Added:
llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
llvm/include/llvm/CodeGen/MachinePassRegistry.def
llvm/include/llvm/Target/CGPassBuilderOption.h
llvm/lib/CodeGen/CodeGenPassBuilder.cpp
Modified:
llvm/include/llvm/CodeGen/TargetPassConfig.h
llvm/include/llvm/Target/TargetMachine.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/LLVMTargetMachine.cpp
llvm/lib/CodeGen/TargetPassConfig.cpp
Removed:
diff --git a/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
b/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
new file mode 100644
index ..e09cbf95793d
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
@@ -0,0 +1,1144 @@
+//===- Construction of codegen pass pipelines --*- C++
-*--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+/// \file
+///
+/// Interfaces for registering analysis passes, producing common pass manager
+/// configurations, and parsing of pass pipelines.
+///
+//===--===//
+
+#ifndef LLVM_CODEGEN_CODEGENPASSBUILDER_H
+#define LLVM_CODEGEN_CODEGENPASSBUILDER_H
+
+#include "llvm/ADT/FunctionExtras.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/StringRef.h"
+#include "llvm/Analysis/AliasAnalysis.h"
+#include "llvm/Analysis/BasicAliasAnalysis.h"
+#include "llvm/Analysis/CFLAndersAliasAnalysis.h"
+#include "llvm/Analysis/CFLSteensAliasAnalysis.h"
+#include "llvm/Analysis/ScopedNoAliasAA.h"
+#include "llvm/Analysis/TargetTransformInfo.h"
+#include "llvm/Analysis/TypeBasedAliasAnalysis.h"
+#include "llvm/CodeGen/ExpandReductions.h"
+#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachinePassManager.h"
+#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
+#include "llvm/CodeGen/UnreachableBlockElim.h"
+#include "llvm/IR/IRPrintingPasses.h"
+#include "llvm/IR/PassManager.h"
+#include "llvm/IR/Verifier.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCStreamer.h"
+#include "llvm/MC/MCTargetOptions.h"
+#include "llvm/Support/CodeGen.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/Error.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Target/CGPassBuilderOption.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Transforms/Scalar.h"
+#include "llvm/Transforms/Scalar/ConstantHoisting.h"
+#include "llvm/Transforms/Scalar/LoopPassManager.h"
+#include "llvm/Transforms/Scalar/LoopStrengthReduce.h"
+#include "llvm/Transforms/Scalar/LowerConstantIntrinsics.h"
+#include "llvm/Transforms/Scalar/MergeICmps.h"
+#include "llvm/Transforms/Scalar/PartiallyInlineLibCalls.h"
+#include "llvm/Transforms/Utils.h"
+#include "llvm/Transforms/Utils/EntryExitInstrumenter.h"
+#include "llvm/Transforms/Utils/LowerInvoke.h"
+#include
+#include
+#include
+#include
+#include
+
+namespace llvm {
+
+// FIXME: Dummy target independent passes definitions that have not yet been
+// ported to new pass manager. Once they do, remove these.
+#define DUMMY_FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR)
\
+ struct PASS_NAME : public PassInfoMixin {
\
+template PASS_NAME(Ts &&...) {}
\
+PreservedAnalyses run(Function &, FunctionAnalysisManager &) {
\
+ return PreservedAnalyses::all();
\
+}
\
+ };
+#define DUMMY_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR)
\
+ struct PASS_NAME : public PassInfoMixin {
\
+template PASS_NAME(Ts &&...) {}
\
+PreservedAnalyses run(Module &, ModuleAnalysisManager &) {
\
+ return PreservedAnalyses::all();
\
+}
\
+ };
+#define DUMMY_MACHINE_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR)
\
+ struct PASS_NAME : public PassInfoMixin {
\
+
[llvm-branch-commits] [llvm] 57b8afd - [gn build] Port 480936e741d
Author: LLVM GN Syncbot
Date: 2020-12-30T00:40:53Z
New Revision: 57b8afda10b620c7b576af0606cbbcd1c7b64a8a
URL:
https://github.com/llvm/llvm-project/commit/57b8afda10b620c7b576af0606cbbcd1c7b64a8a
DIFF:
https://github.com/llvm/llvm-project/commit/57b8afda10b620c7b576af0606cbbcd1c7b64a8a.diff
LOG: [gn build] Port 480936e741d
Added:
Modified:
llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Removed:
diff --git a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
index 961cb0b0bc46..49cbd51de379 100644
--- a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
@@ -32,6 +32,7 @@ static_library("CodeGen") {
"CalcSpillWeights.cpp",
"CallingConvLower.cpp",
"CodeGen.cpp",
+"CodeGenPassBuilder.cpp",
"CodeGenPrepare.cpp",
"CommandFlags.cpp",
"CriticalAntiDepBreaker.cpp",
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[llvm-branch-commits] [llvm] d034a94 - Revert "[llvm-elfabi] Add flag to preserve timestamp when output is the same"
Author: Haowei Wu
Date: 2020-12-29T17:26:22-08:00
New Revision: d034a94e7b3c8122acc91c4dad13110d15ed97d0
URL:
https://github.com/llvm/llvm-project/commit/d034a94e7b3c8122acc91c4dad13110d15ed97d0
DIFF:
https://github.com/llvm/llvm-project/commit/d034a94e7b3c8122acc91c4dad13110d15ed97d0.diff
LOG: Revert "[llvm-elfabi] Add flag to preserve timestamp when output is the
same"
This reverts commit fddb41744958d21635a60622cfb4067122810bcc. which
causes test failures on Mac builders.
Added:
Modified:
llvm/include/llvm/InterfaceStub/ELFObjHandler.h
llvm/lib/InterfaceStub/ELFObjHandler.cpp
llvm/tools/llvm-elfabi/llvm-elfabi.cpp
Removed:
llvm/test/tools/llvm-elfabi/preserve-dates-stub.test
llvm/test/tools/llvm-elfabi/preserve-dates-tbe.test
diff --git a/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
b/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
index 4ec158c1405f..cbb9420cb666 100644
--- a/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
+++ b/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
@@ -16,7 +16,6 @@
#include "llvm/InterfaceStub/ELFStub.h"
#include "llvm/Object/ELFObjectFile.h"
#include "llvm/Object/ELFTypes.h"
-#include "llvm/Support/FileSystem.h"
namespace llvm {
@@ -36,10 +35,8 @@ Expected>
readELFFile(MemoryBufferRef Buf);
/// @param FilePath File path for writing the ELF binary.
/// @param Stub Source ELFStub to generate a binary ELF stub from.
/// @param OutputFormat Target ELFType to write binary as.
-/// @param WriteIfChanged Whether or not to preserve timestamp if
-///the output stays the same.
Error writeBinaryStub(StringRef FilePath, const ELFStub &Stub,
- ELFTarget OutputFormat, bool WriteIfChanged = false);
+ ELFTarget OutputFormat);
} // end namespace elfabi
} // end namespace llvm
diff --git a/llvm/lib/InterfaceStub/ELFObjHandler.cpp
b/llvm/lib/InterfaceStub/ELFObjHandler.cpp
index 40d8afa88ad2..e50ebd7b8ba1 100644
--- a/llvm/lib/InterfaceStub/ELFObjHandler.cpp
+++ b/llvm/lib/InterfaceStub/ELFObjHandler.cpp
@@ -17,7 +17,6 @@
#include "llvm/Support/FileOutputBuffer.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/MemoryBuffer.h"
-#include "llvm/Support/Process.h"
using llvm::MemoryBufferRef;
using llvm::object::ELFObjectFile;
@@ -664,25 +663,8 @@ buildStub(const ELFObjectFile &ElfObj) {
/// @param FilePath File path for writing the ELF binary.
/// @param Stub Source ELFStub to generate a binary ELF stub from.
template
-static Error writeELFBinaryToFile(StringRef FilePath, const ELFStub &Stub,
- bool WriteIfChanged) {
+static Error writeELFBinaryToFile(StringRef FilePath, const ELFStub &Stub) {
ELFStubBuilder Builder{Stub};
- // Write Stub to memory first.
- std::vector Buf(Builder.getSize());
- Builder.write(Buf.data());
-
- if (WriteIfChanged) {
-if (ErrorOr> BufOrError =
-MemoryBuffer::getFile(FilePath)) {
- // Compare Stub output with existing Stub file.
- // If Stub file unchanged, abort updating.
- if ((*BufOrError)->getBufferSize() == Builder.getSize() &&
- !memcmp((*BufOrError)->getBufferStart(), Buf.data(),
- Builder.getSize()))
-return Error::success();
-}
- }
-
Expected> BufOrError =
FileOutputBuffer::create(FilePath, Builder.getSize());
if (!BufOrError)
@@ -692,10 +674,13 @@ static Error writeELFBinaryToFile(StringRef FilePath,
const ELFStub &Stub,
"` for writing");
// Write binary to file.
- std::unique_ptr FileBuf = std::move(*BufOrError);
- memcpy(FileBuf->getBufferStart(), Buf.data(), Buf.size());
+ std::unique_ptr Buf = std::move(*BufOrError);
+ Builder.write(Buf->getBufferStart());
- return FileBuf->commit();
+ if (Error E = Buf->commit())
+return E;
+
+ return Error::success();
}
Expected> readELFFile(MemoryBufferRef Buf) {
@@ -720,15 +705,15 @@ Expected>
readELFFile(MemoryBufferRef Buf) {
// This function wraps the ELFT writeELFBinaryToFile() so writeBinaryStub()
// can be called without having to use ELFType templates directly.
Error writeBinaryStub(StringRef FilePath, const ELFStub &Stub,
- ELFTarget OutputFormat, bool WriteIfChanged) {
+ ELFTarget OutputFormat) {
if (OutputFormat == ELFTarget::ELF32LE)
-return writeELFBinaryToFile(FilePath, Stub, WriteIfChanged);
+return writeELFBinaryToFile(FilePath, Stub);
if (OutputFormat == ELFTarget::ELF32BE)
-return writeELFBinaryToFile(FilePath, Stub, WriteIfChanged);
+return writeELFBinaryToFile(FilePath, Stub);
if (OutputFormat == ELFTarget::ELF64LE)
-return writeELFBinaryToFile(FilePath, Stub, WriteIfChanged);
+return writeELFBinaryToFile(FilePath, Stub);
if (OutputFormat == ELFTarget::ELF64BE)
-return writeELFBinaryToFile(FilePath, Stub, WriteIfChanged
[llvm-branch-commits] [mlir] 8a1f1a1 - [mlir][python] Aggressively avoid name collisions in generated python ODS code.
Author: Stella Laurenzo
Date: 2020-12-29T17:43:04-08:00
New Revision: 8a1f1a100cce6ed9b52aedbbf03da887833508be
URL:
https://github.com/llvm/llvm-project/commit/8a1f1a100cce6ed9b52aedbbf03da887833508be
DIFF:
https://github.com/llvm/llvm-project/commit/8a1f1a100cce6ed9b52aedbbf03da887833508be.diff
LOG: [mlir][python] Aggressively avoid name collisions in generated python ODS
code.
* When porting npcomp to use these bindings, I ran into enough patterns of
collisions that I decided to be somewhat draconian about not polluting the
namespace.
* With these changes all of the npcomp dialects generate and pass what tests we
have.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D93920
Added:
Modified:
mlir/include/mlir/Bindings/Python/Attributes.td
mlir/test/mlir-tblgen/op-python-bindings.td
mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
Removed:
diff --git a/mlir/include/mlir/Bindings/Python/Attributes.td
b/mlir/include/mlir/Bindings/Python/Attributes.td
index 4fe746d2a737..f9a7fa703f50 100644
--- a/mlir/include/mlir/Bindings/Python/Attributes.td
+++ b/mlir/include/mlir/Bindings/Python/Attributes.td
@@ -22,13 +22,13 @@ class PythonAttr {
}
// Mappings between supported builtin attribtues and Python types.
-def : PythonAttr<"::mlir::Attribute", "_ir.Attribute">;
-def : PythonAttr<"::mlir::BoolAttr", "_ir.BoolAttr">;
-def : PythonAttr<"::mlir::IntegerAttr", "_ir.IntegerAttr">;
-def : PythonAttr<"::mlir::FloatAttr", "_ir.FloatAttr">;
-def : PythonAttr<"::mlir::StringAttr", "_ir.StringAttr">;
-def : PythonAttr<"::mlir::DenseElementsAttr", "_ir.DenseElementsAttr">;
-def : PythonAttr<"::mlir::DenseIntElementsAttr", "_ir.DenseIntElementsAttr">;
-def : PythonAttr<"::mlir::DenseFPElementsAttr", "_ir.DenseFPElementsAttr">;
+def : PythonAttr<"::mlir::Attribute", "_ods_ir.Attribute">;
+def : PythonAttr<"::mlir::BoolAttr", "_ods_ir.BoolAttr">;
+def : PythonAttr<"::mlir::IntegerAttr", "_ods_ir.IntegerAttr">;
+def : PythonAttr<"::mlir::FloatAttr", "_ods_ir.FloatAttr">;
+def : PythonAttr<"::mlir::StringAttr", "_ods_ir.StringAttr">;
+def : PythonAttr<"::mlir::DenseElementsAttr", "_ods_ir.DenseElementsAttr">;
+def : PythonAttr<"::mlir::DenseIntElementsAttr",
"_ods_ir.DenseIntElementsAttr">;
+def : PythonAttr<"::mlir::DenseFPElementsAttr", "_ods_ir.DenseFPElementsAttr">;
#endif
diff --git a/mlir/test/mlir-tblgen/op-python-bindings.td
b/mlir/test/mlir-tblgen/op-python-bindings.td
index ef8b20fa2ccc..722cf9fb7e40 100644
--- a/mlir/test/mlir-tblgen/op-python-bindings.td
+++ b/mlir/test/mlir-tblgen/op-python-bindings.td
@@ -3,8 +3,8 @@
include "mlir/IR/OpBase.td"
include "mlir/Bindings/Python/Attributes.td"
-// CHECK: @_cext.register_dialect
-// CHECK: class _Dialect(_ir.Dialect):
+// CHECK: @_ods_cext.register_dialect
+// CHECK: class _Dialect(_ods_ir.Dialect):
// CHECK: DIALECT_NAMESPACE = "test"
// CHECK: pass
def Test_Dialect : Dialect {
@@ -14,8 +14,8 @@ def Test_Dialect : Dialect {
class TestOp traits = []> :
Op;
-// CHECK: @_cext.register_operation(_Dialect)
-// CHECK: class AttrSizedOperandsOp(_ir.OpView):
+// CHECK: @_ods_cext.register_operation(_Dialect)
+// CHECK: class AttrSizedOperandsOp(_ods_ir.OpView):
// CHECK-LABEL: OPERATION_NAME = "test.attr_sized_operands"
def AttrSizedOperandsOp : TestOp<"attr_sized_operands",
[AttrSizedOperandSegments]> {
@@ -23,36 +23,36 @@ def AttrSizedOperandsOp : TestOp<"attr_sized_operands",
// CHECK: operands = []
// CHECK: results = []
// CHECK: attributes = {}
- // CHECK: operand_segment_sizes = array.array('L')
+ // CHECK: operand_segment_sizes_ods = _ods_array.array('L')
// CHECK: operands += [*variadic1]
- // CHECK: operand_segment_sizes.append(len(variadic1))
+ // CHECK: operand_segment_sizes_ods.append(len(variadic1))
// CHECK: operands.append(non_variadic)
- // CHECK: operand_segment_sizes.append(1)
+ // CHECK: operand_segment_sizes_ods.append(1)
// CHECK: if variadic2 is not None: operands.append(variadic2)
- // CHECK: operand_segment_sizes.append(0 if variadic2 is None else 1)
- // CHECK: attributes["operand_segment_sizes"] =
_ir.DenseElementsAttr.get(operand_segment_sizes,
- // CHECK: context=_get_default_loc_context(loc))
- // CHECK: super().__init__(_ir.Operation.create(
+ // CHECK: operand_segment_sizes_ods.append(0 if variadic2 is None else 1)
+ // CHECK: attributes["operand_segment_sizes"] =
_ods_ir.DenseElementsAttr.get(operand_segment_sizes_ods,
+ // CHECK: context=_ods_get_default_loc_context(loc))
+ // CHECK: super().__init__(_ods_ir.Operation.create(
// CHECK: "test.attr_sized_operands", attributes=attributes,
operands=operands, results=results,
// CHECK: loc=loc, ip=ip))
// CHECK: @property
// CHECK: def variadic1(self):
- // CHECK: operand_range = _segme
[llvm-branch-commits] [llvm] 5efc71e - [ORC] Move Orc RPC code into Shared, rename some RPC types.
Author: Lang Hames
Date: 2020-12-30T12:48:20+11:00
New Revision: 5efc71e119d4eba235209d262e7d171361a0b9be
URL:
https://github.com/llvm/llvm-project/commit/5efc71e119d4eba235209d262e7d171361a0b9be
DIFF:
https://github.com/llvm/llvm-project/commit/5efc71e119d4eba235209d262e7d171361a0b9be.diff
LOG: [ORC] Move Orc RPC code into Shared, rename some RPC types.
Moves all headers from Orc/RPC to Orc/Shared, and from the llvm::orc::rpc
namespace into llvm::orc::shared. Also renames RPCTypeName to
SerializationTypeName and Function to RPCFunction.
In addition to being a more reasonable home for this code, this will make it
easier for the upcoming Orc runtime to re-use the Serialization system for
creating and parsing wrapper-function binary blobs.
Added:
llvm/include/llvm/ExecutionEngine/Orc/Shared/FDRawByteChannel.h
llvm/include/llvm/ExecutionEngine/Orc/Shared/RPCUtils.h
llvm/include/llvm/ExecutionEngine/Orc/Shared/RawByteChannel.h
llvm/include/llvm/ExecutionEngine/Orc/Shared/Serialization.h
Modified:
llvm/include/llvm/ExecutionEngine/Orc/OrcRPCTargetProcessControl.h
llvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetClient.h
llvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetRPCAPI.h
llvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetServer.h
llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/OrcRPCTPCServer.h
llvm/lib/ExecutionEngine/Orc/Shared/RPCError.cpp
llvm/tools/lli/ChildTarget/ChildTarget.cpp
llvm/tools/lli/RemoteJITUtils.h
llvm/tools/lli/lli.cpp
llvm/tools/llvm-jitlink/llvm-jitlink-executor/llvm-jitlink-executor.cpp
llvm/tools/llvm-jitlink/llvm-jitlink.cpp
llvm/tools/llvm-jitlink/llvm-jitlink.h
llvm/unittests/ExecutionEngine/Orc/QueueChannel.h
llvm/unittests/ExecutionEngine/Orc/RPCUtilsTest.cpp
Removed:
llvm/include/llvm/ExecutionEngine/Orc/RPC/FDRawByteChannel.h
llvm/include/llvm/ExecutionEngine/Orc/RPC/RPCSerialization.h
llvm/include/llvm/ExecutionEngine/Orc/RPC/RPCUtils.h
llvm/include/llvm/ExecutionEngine/Orc/RPC/RawByteChannel.h
diff --git
a/llvm/include/llvm/ExecutionEngine/Orc/OrcRPCTargetProcessControl.h
b/llvm/include/llvm/ExecutionEngine/Orc/OrcRPCTargetProcessControl.h
index 1856e0d78209..1097ae67b2a2 100644
--- a/llvm/include/llvm/ExecutionEngine/Orc/OrcRPCTargetProcessControl.h
+++ b/llvm/include/llvm/ExecutionEngine/Orc/OrcRPCTargetProcessControl.h
@@ -13,8 +13,8 @@
#ifndef LLVM_EXECUTIONENGINE_ORC_ORCRPCTARGETPROCESSCONTROL_H
#define LLVM_EXECUTIONENGINE_ORC_ORCRPCTARGETPROCESSCONTROL_H
-#include "llvm/ExecutionEngine/Orc/RPC/RPCUtils.h"
-#include "llvm/ExecutionEngine/Orc/RPC/RawByteChannel.h"
+#include "llvm/ExecutionEngine/Orc/Shared/RPCUtils.h"
+#include "llvm/ExecutionEngine/Orc/Shared/RawByteChannel.h"
#include "llvm/ExecutionEngine/Orc/TargetProcess/OrcRPCTPCServer.h"
#include "llvm/ExecutionEngine/Orc/TargetProcessControl.h"
#include "llvm/Support/MSVCErrorWorkarounds.h"
diff --git a/llvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetClient.h
b/llvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetClient.h
index dfed5e09e4d4..3d139740d677 100644
--- a/llvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetClient.h
+++ b/llvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetClient.h
@@ -54,7 +54,7 @@ namespace remote {
/// OrcRemoteTargetServer class) via an RPC system (see RPCUtils.h) to carry
out
/// its actions.
class OrcRemoteTargetClient
-: public rpc::SingleThreadedRPCEndpoint {
+: public shared::SingleThreadedRPCEndpoint {
public:
/// Remote-mapped RuntimeDyld-compatible memory manager.
class RemoteRTDyldMemoryManager : public RuntimeDyld::MemoryManager {
@@ -703,7 +703,7 @@ class OrcRemoteTargetClient
/// Channel is the ChannelT instance to communicate on. It is assumed that
/// the channel is ready to be read from and written to.
static Expected>
- Create(rpc::RawByteChannel &Channel, ExecutionSession &ES) {
+ Create(shared::RawByteChannel &Channel, ExecutionSession &ES) {
Error Err = Error::success();
auto Client = std::unique_ptr(
new OrcRemoteTargetClient(Channel, ES, Err));
@@ -805,9 +805,10 @@ class OrcRemoteTargetClient
Error terminateSession() { return callB(); }
private:
- OrcRemoteTargetClient(rpc::RawByteChannel &Channel, ExecutionSession &ES,
+ OrcRemoteTargetClient(shared::RawByteChannel &Channel, ExecutionSession &ES,
Error &Err)
- : rpc::SingleThreadedRPCEndpoint(Channel, true),
+ : shared::SingleThreadedRPCEndpoint(Channel,
+ true),
ES(ES) {
ErrorAsOutParameter EAO(&Err);
diff --git a/llvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetRPCAPI.h
b/llvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetRPCAPI.h
index 430ae2ca429b..367bfb369191 100644
--- a/llvm/include/llvm/ExecutionEngine/Orc
[llvm-branch-commits] [llvm] f904d50 - [PowerPC] Remaining KnownBits should be constant when performing non-sign comparison
Author: Kai Luo
Date: 2020-12-30T02:00:47Z
New Revision: f904d50c29f23510cdbae0579085ae7ffebc1f63
URL:
https://github.com/llvm/llvm-project/commit/f904d50c29f23510cdbae0579085ae7ffebc1f63
DIFF:
https://github.com/llvm/llvm-project/commit/f904d50c29f23510cdbae0579085ae7ffebc1f63.diff
LOG: [PowerPC] Remaining KnownBits should be constant when performing non-sign
comparison
In `PPCTargetLowering::DAGCombineTruncBoolExt`, when checking if it's correct
to perform the transformation for non-sign comparison, as the comment says
```
// This is neither a signed nor an unsigned comparison, just make sure
// that the high bits are equal.
```
Origin check
```
if (Op1Known.Zero != Op2Known.Zero || Op1Known.One != Op2Known.One)
return SDValue();
```
is not strong enough. For example,
```
Op1Known = 111x000x;
Op2Known = 111x000x;
```
Bit 4, besides bit 0, is still unknown and affects the final result.
This patch fixes https://bugs.llvm.org/show_bug.cgi?id=48388.
Reviewed By: nemanjai, #powerpc
Differential Revision: https://reviews.llvm.org/D93092
Added:
llvm/test/CodeGen/PowerPC/pr48388.ll
Modified:
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Removed:
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 18e35f5a0850f..e951679f92fa0 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -13237,11 +13237,13 @@ SDValue
PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
KnownBits Op2Known = DAG.computeKnownBits(N->getOperand(1));
// We don't really care about what is known about the first bit (if
- // anything), so clear it in all masks prior to comparing them.
- Op1Known.Zero.clearBit(0); Op1Known.One.clearBit(0);
- Op2Known.Zero.clearBit(0); Op2Known.One.clearBit(0);
+ // anything), so pretend that it is known zero for both to ensure they
can
+ // be compared as constants.
+ Op1Known.Zero.setBit(0); Op1Known.One.clearBit(0);
+ Op2Known.Zero.setBit(0); Op2Known.One.clearBit(0);
- if (Op1Known.Zero != Op2Known.Zero || Op1Known.One != Op2Known.One)
+ if (!Op1Known.isConstant() || !Op2Known.isConstant() ||
+ Op1Known.getConstant() != Op2Known.getConstant())
return SDValue();
}
}
diff --git a/llvm/test/CodeGen/PowerPC/pr48388.ll
b/llvm/test/CodeGen/PowerPC/pr48388.ll
new file mode 100644
index 0..822e5d8523171
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/pr48388.ll
@@ -0,0 +1,41 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le -ppc-asm-full-reg-names \
+; RUN: < %s | FileCheck %s
+
+define i64 @julia_div_i64(i64 %0, i64 %1) local_unnamed_addr #0 {
+; CHECK-LABEL: julia_div_i64:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT:divd r6, r3, r4
+; CHECK-NEXT:lis r5, -1592
+; CHECK-NEXT:ori r7, r5, 21321
+; CHECK-NEXT:ori r5, r5, 65519
+; CHECK-NEXT:cmpdi r3, 0
+; CHECK-NEXT:rldic r7, r7, 4, 17
+; CHECK-NEXT:rldic r5, r5, 4, 17
+; CHECK-NEXT:iselgt r9, r5, r7
+; CHECK-NEXT:cmpdi r4, 0
+; CHECK-NEXT:mulld r8, r6, r4
+; CHECK-NEXT:iselgt r4, r5, r7
+; CHECK-NEXT:xor r4, r9, r4
+; CHECK-NEXT:cntlzd r4, r4
+; CHECK-NEXT:rldicl r4, r4, 58, 63
+; CHECK-NEXT:xor r3, r8, r3
+; CHECK-NEXT:addic r5, r3, -1
+; CHECK-NEXT:subfe r3, r5, r3
+; CHECK-NEXT:and r3, r4, r3
+; CHECK-NEXT:add r3, r6, r3
+; CHECK-NEXT:blr
+entry:
+ %2 = sdiv i64 %0, %1
+ %3 = icmp sgt i64 %0, 0
+ %4 = icmp sgt i64 %1, 0
+ %5 = select i1 %3, i64 140735820070640, i64 140735819363472
+ %6 = select i1 %4, i64 140735820070640, i64 140735819363472
+ %7 = icmp eq i64 %5, %6
+ %8 = mul i64 %2, %1
+ %9 = icmp ne i64 %8, %0
+ %10 = and i1 %7, %9
+ %11 = zext i1 %10 to i64
+ %12 = add i64 %2, %11
+ ret i64 %12
+}
___
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[llvm-branch-commits] [llvm] e3e25cf - [PowerPC] Add mir test to show effect of `optimizeCompareInstr` when `equalityOnly` is true. NFC.
Author: Kai Luo
Date: 2020-12-30T02:23:05Z
New Revision: e3e25cfb44bc2a35e3b53d62d37c27b7d13157b6
URL:
https://github.com/llvm/llvm-project/commit/e3e25cfb44bc2a35e3b53d62d37c27b7d13157b6
DIFF:
https://github.com/llvm/llvm-project/commit/e3e25cfb44bc2a35e3b53d62d37c27b7d13157b6.diff
LOG: [PowerPC] Add mir test to show effect of `optimizeCompareInstr` when
`equalityOnly` is true. NFC.
Added:
llvm/test/CodeGen/PowerPC/peephole-cmp-eq.mir
Modified:
Removed:
diff --git a/llvm/test/CodeGen/PowerPC/peephole-cmp-eq.mir
b/llvm/test/CodeGen/PowerPC/peephole-cmp-eq.mir
new file mode 100644
index ..bac0a6988c53
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/peephole-cmp-eq.mir
@@ -0,0 +1,44 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=powerpc64le -simplify-mir -verify-machineinstrs \
+# RUN: -run-pass=peephole-opt %s -o - | FileCheck %s
+# Test to show effect of `optimizeCompareInstr` when `equalityOnly` is true.
+---
+name:h
+alignment: 16
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: g8rc }
+ - { id: 1, class: g8rc }
+ - { id: 2, class: g8rc_and_g8rc_nox0 }
+ - { id: 3, class: crrc }
+ - { id: 4, class: g8rc_and_g8rc_nox0 }
+ - { id: 5, class: g8rc }
+liveins:
+ - { reg: '$x3', virtual-reg: '%0' }
+ - { reg: '$x4', virtual-reg: '%1' }
+frameInfo:
+ maxAlignment:1
+machineFunctionInfo: {}
+body: |
+ bb.0:
+liveins: $x3, $x4
+
+; CHECK-LABEL: name: h
+; CHECK: liveins: $x3, $x4
+; CHECK: [[COPY:%[0-9]+]]:g8rc = COPY $x4
+; CHECK: [[COPY1:%[0-9]+]]:g8rc = COPY $x3
+; CHECK: [[SUBF8_rec:%[0-9]+]]:g8rc_and_g8rc_nox0 = SUBF8_rec [[COPY]],
[[COPY1]], implicit-def $cr0
+; CHECK: [[COPY2:%[0-9]+]]:crrc = COPY killed $cr0
+; CHECK: [[ISEL8_:%[0-9]+]]:g8rc = ISEL8 $zero8, [[SUBF8_rec]],
[[COPY2]].sub_eq
+; CHECK: $x3 = COPY [[ISEL8_]]
+; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3
+%1:g8rc = COPY $x4
+%0:g8rc = COPY $x3
+%2:g8rc_and_g8rc_nox0 = SUBF8 %1, %0
+%3:crrc = CMPLD %0, %1
+%4:g8rc_and_g8rc_nox0 = LI8 0
+%5:g8rc = ISEL8 %4, %2, %3.sub_eq
+$x3 = COPY %5
+BLR8 implicit $lr8, implicit $rm, implicit $x3
+
+...
___
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[llvm-branch-commits] [llvm] 096b02e - [RISCV] Add intrinsics for vcompress instruction
Author: ShihPo Hung
Date: 2020-12-29T18:38:15-08:00
New Revision: 096b02ebbff72c403379b28a40f14a8c48e640f8
URL:
https://github.com/llvm/llvm-project/commit/096b02ebbff72c403379b28a40f14a8c48e640f8
DIFF:
https://github.com/llvm/llvm-project/commit/096b02ebbff72c403379b28a40f14a8c48e640f8.diff
LOG: [RISCV] Add intrinsics for vcompress instruction
This patch defines vcompress intrinsics and lower to V instructions.
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez
Co-Authored-by: ShihPo Hung
Differential revision: https://reviews.llvm.org/D93809
Added:
llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll
Modified:
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Removed:
diff --git a/llvm/include/llvm/IR/IntrinsicsRISCV.td
b/llvm/include/llvm/IR/IntrinsicsRISCV.td
index 8e3d6f2ed675..430687d796ba 100644
--- a/llvm/include/llvm/IR/IntrinsicsRISCV.td
+++ b/llvm/include/llvm/IR/IntrinsicsRISCV.td
@@ -189,6 +189,13 @@ let TargetPrefix = "riscv" in {
LLVMPointerType>, llvm_anyvector_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
llvm_anyint_ty],
[NoCapture>, IntrWriteMem]>, RISCVVIntrinsic;
+ // For destination vector type is the same as first source vector (with
mask).
+ // Input: (maskedoff, vector_in, mask, vl)
+ class RISCVUnaryAAMask
+: Intrinsic<[llvm_anyvector_ty],
+[LLVMMatchType<0>, LLVMMatchType<0>,
+ LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
llvm_anyint_ty],
+[IntrNoMem]>, RISCVVIntrinsic;
// For destination vector type is the same as first and second source vector.
// Input: (vector_in, vector_in, vl)
class RISCVBinaryAAANoMask
@@ -680,6 +687,8 @@ let TargetPrefix = "riscv" in {
defm vrgather : RISCVBinaryAAX;
+ def "int_riscv_vcompress_mask" : RISCVUnaryAAMask;
+
defm vaaddu : RISCVSaturatingBinaryAAX;
defm vaadd : RISCVSaturatingBinaryAAX;
defm vasubu : RISCVSaturatingBinaryAAX;
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
index b0e3b455339f..6a89f34f9047 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
@@ -669,6 +669,27 @@ class VPseudoUnaryMOutMask:
let BaseInstr = !cast(PseudoToVInst.VInst);
}
+// Mask can be V0~V31
+class VPseudoUnaryAnyMask :
+ Pseudo<(outs RetClass:$rd),
+ (ins RetClass:$merge,
+ Op1Class:$rs2,
+ VR:$vm, GPR:$vl, ixlenimm:$sew),
+ []>,
+ RISCVVPseudo {
+ let mayLoad = 0;
+ let mayStore = 0;
+ let hasSideEffects = 0;
+ let usesCustomInserter = 1;
+ let Constraints = "@earlyclobber $rd, $rd = $merge";
+ let Uses = [VL, VTYPE];
+ let VLIndex = 4;
+ let SEWIndex = 5;
+ let MergeOpIndex = 1;
+ let BaseInstr = !cast(PseudoToVInst.VInst);
+}
+
class VPseudoBinaryNoMask;
+ }
+}
+
multiclass VPseudoBinary;
+class VPatUnaryAnyMask :
+ Pat<(result_type (!cast(intrinsic#"_mask")
+ (result_type result_reg_class:$merge),
+ (op1_type op1_reg_class:$rs1),
+ (mask_type VR:$rs2),
+ (XLenVT GPR:$vl))),
+ (!cast(inst#"_"#kind#"_"#vlmul.MX#"_MASK")
+ (result_type result_reg_class:$merge),
+ (op1_type op1_reg_class:$rs1),
+ (mask_type VR:$rs2),
+ (NoX0 GPR:$vl), sew)>;
+
class VPatBinaryNoMask vtilist> {
+ foreach vti = vtilist in {
+def : VPatUnaryAnyMask;
+ }
+}
+
multiclass VPatUnaryM_M
{
@@ -2645,6 +2704,11 @@ let Predicates = [HasStdExtV, HasStdExtF] in {
//===--===//
defm PseudoVRGATHER: VPseudoBinaryV_VV_VX_VI;
+//===--===//
+// 17.5. Vector Compress Instruction
+//===--===//
+defm PseudoVCOMPRESS : VPseudoUnaryV_V_AnyMask;
+
//===--===//
// Patterns.
//===--===//
@@ -3201,5 +3265,16 @@ let Predicates = [HasStdExtV, HasStdExtF] in {
AllFloatVectors, uimm5>;
} // Predicates = [HasStdExtV, HasStdExtF]
+//===--===//
+// 17.5. Vector Compress Instruction
+//===--===//
+let Predicates = [HasStdExtV] in {
+ defm "" : VPatUnaryV_V_AnyMask<"int_riscv_vcompress", "PseudoVCOMPRESS",
AllInteg
[llvm-branch-commits] [llvm] f76e83b - [Analysis] Use llvm::append_range (NFC)
Author: Kazu Hirata
Date: 2020-12-29T19:23:21-08:00
New Revision: f76e83bfbba9fcaf6f2e3d869774302d721ba1e4
URL:
https://github.com/llvm/llvm-project/commit/f76e83bfbba9fcaf6f2e3d869774302d721ba1e4
DIFF:
https://github.com/llvm/llvm-project/commit/f76e83bfbba9fcaf6f2e3d869774302d721ba1e4.diff
LOG: [Analysis] Use llvm::append_range (NFC)
Added:
Modified:
llvm/include/llvm/Analysis/DDG.h
llvm/include/llvm/Analysis/IntervalIterator.h
llvm/lib/Analysis/AliasSetTracker.cpp
llvm/lib/Analysis/DDG.cpp
llvm/lib/Analysis/DependenceGraphBuilder.cpp
llvm/lib/Analysis/IRSimilarityIdentifier.cpp
llvm/lib/Analysis/LazyValueInfo.cpp
llvm/lib/Analysis/ScalarEvolution.cpp
llvm/lib/Analysis/TargetLibraryInfo.cpp
Removed:
diff --git a/llvm/include/llvm/Analysis/DDG.h
b/llvm/include/llvm/Analysis/DDG.h
index 8d225c155cd4..e3bef33e55c3 100644
--- a/llvm/include/llvm/Analysis/DDG.h
+++ b/llvm/include/llvm/Analysis/DDG.h
@@ -152,7 +152,7 @@ class SimpleDDGNode : public DDGNode {
setKind((InstList.size() == 0 && Input.size() == 1)
? NodeKind::SingleInstruction
: NodeKind::MultiInstruction);
-InstList.insert(InstList.end(), Input.begin(), Input.end());
+llvm::append_range(InstList, Input);
}
void appendInstructions(const SimpleDDGNode &Input) {
appendInstructions(Input.getInstructions());
diff --git a/llvm/include/llvm/Analysis/IntervalIterator.h
b/llvm/include/llvm/Analysis/IntervalIterator.h
index 38bb3bbb1719..8e2273618a66 100644
--- a/llvm/include/llvm/Analysis/IntervalIterator.h
+++ b/llvm/include/llvm/Analysis/IntervalIterator.h
@@ -81,7 +81,7 @@ inline void addNodeToInterval(Interval *Int, BasicBlock *BB) {
// BasicBlocks are added to the interval.
inline void addNodeToInterval(Interval *Int, Interval *I) {
// Add all of the nodes in I as new nodes in Int.
- Int->Nodes.insert(Int->Nodes.end(), I->Nodes.begin(), I->Nodes.end());
+ llvm::append_range(Int->Nodes, I->Nodes);
}
template,
diff --git a/llvm/lib/Analysis/AliasSetTracker.cpp
b/llvm/lib/Analysis/AliasSetTracker.cpp
index 77dba3444e3d..9b21fbf4c9b7 100644
--- a/llvm/lib/Analysis/AliasSetTracker.cpp
+++ b/llvm/lib/Analysis/AliasSetTracker.cpp
@@ -83,7 +83,7 @@ void AliasSet::mergeSetIn(AliasSet &AS, AliasSetTracker &AST)
{
addRef();
}
} else if (ASHadUnknownInsts) {
-UnknownInsts.insert(UnknownInsts.end(), AS.UnknownInsts.begin(),
AS.UnknownInsts.end());
+llvm::append_range(UnknownInsts, AS.UnknownInsts);
AS.UnknownInsts.clear();
}
diff --git a/llvm/lib/Analysis/DDG.cpp b/llvm/lib/Analysis/DDG.cpp
index 280d9ef79efa..b2aa322454e7 100644
--- a/llvm/lib/Analysis/DDG.cpp
+++ b/llvm/lib/Analysis/DDG.cpp
@@ -49,7 +49,7 @@ bool DDGNode::collectInstructions(
assert(!isa(PN) && "Nested PiBlocks are not supported.");
SmallVector TmpIList;
PN->collectInstructions(Pred, TmpIList);
- IList.insert(IList.end(), TmpIList.begin(), TmpIList.end());
+ llvm::append_range(IList, TmpIList);
}
} else
llvm_unreachable("unimplemented type of node");
diff --git a/llvm/lib/Analysis/DependenceGraphBuilder.cpp
b/llvm/lib/Analysis/DependenceGraphBuilder.cpp
index 7a98d844e4cb..fbf0f6651599 100644
--- a/llvm/lib/Analysis/DependenceGraphBuilder.cpp
+++ b/llvm/lib/Analysis/DependenceGraphBuilder.cpp
@@ -492,8 +492,7 @@ void
AbstractDependenceGraphBuilder::sortNodesTopologically() {
// Put members of the pi-block right after the pi-block itself, for
// convenience.
const NodeListType &PiBlockMembers = getNodesInPiBlock(*N);
- NodesInPO.insert(NodesInPO.end(), PiBlockMembers.begin(),
- PiBlockMembers.end());
+ llvm::append_range(NodesInPO, PiBlockMembers);
}
NodesInPO.push_back(N);
}
diff --git a/llvm/lib/Analysis/IRSimilarityIdentifier.cpp
b/llvm/lib/Analysis/IRSimilarityIdentifier.cpp
index 4ee152450c05..141c1e0a5d03 100644
--- a/llvm/lib/Analysis/IRSimilarityIdentifier.cpp
+++ b/llvm/lib/Analysis/IRSimilarityIdentifier.cpp
@@ -138,10 +138,8 @@ void IRInstructionMapper::convertToUnsignedVec(
mapToIllegalUnsigned(It, IntegerMappingForBB, InstrListForBB, true);
for_each(InstrListForBB,
[this](IRInstructionData *ID) { this->IDL->push_back(*ID); });
-InstrList.insert(InstrList.end(), InstrListForBB.begin(),
- InstrListForBB.end());
-IntegerMapping.insert(IntegerMapping.end(), IntegerMappingForBB.begin(),
- IntegerMappingForBB.end());
+llvm::append_range(InstrList, InstrListForBB);
+llvm::append_range(IntegerMapping, IntegerMappingForBB);
}
}
@@ -639,11 +637,9 @@ void IRSimilarityIdentifier::populateMapper(
// Insert the InstrListForModule at the end of the overall InstrList so that
// we can have a long InstrList for the entire set of Modules be
[llvm-branch-commits] [llvm] 16d20e2 - [Transforms/Utils] Construct SmallVector with iterator ranges (NFC)
Author: Kazu Hirata
Date: 2020-12-29T19:23:23-08:00
New Revision: 16d20e2554e9e8aac7ecf98df640da29e8de69ce
URL:
https://github.com/llvm/llvm-project/commit/16d20e2554e9e8aac7ecf98df640da29e8de69ce
DIFF:
https://github.com/llvm/llvm-project/commit/16d20e2554e9e8aac7ecf98df640da29e8de69ce.diff
LOG: [Transforms/Utils] Construct SmallVector with iterator ranges (NFC)
Added:
Modified:
llvm/lib/Transforms/Utils/Local.cpp
llvm/lib/Transforms/Utils/LowerInvoke.cpp
llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Removed:
diff --git a/llvm/lib/Transforms/Utils/Local.cpp
b/llvm/lib/Transforms/Utils/Local.cpp
index e32b0f142f07..f2bc8a801a75 100644
--- a/llvm/lib/Transforms/Utils/Local.cpp
+++ b/llvm/lib/Transforms/Utils/Local.cpp
@@ -2050,7 +2050,7 @@ unsigned llvm::changeToUnreachable(Instruction *I, bool
UseLLVMTrap,
}
CallInst *llvm::createCallMatchingInvoke(InvokeInst *II) {
- SmallVector Args(II->arg_begin(), II->arg_end());
+ SmallVector Args(II->args());
SmallVector OpBundles;
II->getOperandBundlesAsDefs(OpBundles);
CallInst *NewCall = CallInst::Create(II->getFunctionType(),
@@ -2107,7 +2107,7 @@ BasicBlock
*llvm::changeToInvokeAndSplitBasicBlock(CallInst *CI,
BB->getInstList().pop_back();
// Create the new invoke instruction.
- SmallVector InvokeArgs(CI->arg_begin(), CI->arg_end());
+ SmallVector InvokeArgs(CI->args());
SmallVector OpBundles;
CI->getOperandBundlesAsDefs(OpBundles);
diff --git a/llvm/lib/Transforms/Utils/LowerInvoke.cpp
b/llvm/lib/Transforms/Utils/LowerInvoke.cpp
index 0b225e8abc4e..fe0ff5899d8f 100644
--- a/llvm/lib/Transforms/Utils/LowerInvoke.cpp
+++ b/llvm/lib/Transforms/Utils/LowerInvoke.cpp
@@ -48,7 +48,7 @@ static bool runImpl(Function &F) {
bool Changed = false;
for (BasicBlock &BB : F)
if (InvokeInst *II = dyn_cast(BB.getTerminator())) {
- SmallVector CallArgs(II->arg_begin(), II->arg_end());
+ SmallVector CallArgs(II->args());
SmallVector OpBundles;
II->getOperandBundlesAsDefs(OpBundles);
// Insert a normal call instruction...
diff --git a/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
b/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
index a59e8ec47a83..27b4b1f0740e 100644
--- a/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
+++ b/llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
@@ -740,7 +740,7 @@ void PromoteMem2Reg::run() {
continue;
// Get the preds for BB.
-SmallVector Preds(pred_begin(BB), pred_end(BB));
+SmallVector Preds(predecessors(BB));
// Ok, now we know that all of the PHI nodes are missing entries for some
// basic blocks. Start by sorting the incoming predecessors for efficient
diff --git a/llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
b/llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
index c7e37fe0d1b3..6c112b586f1a 100644
--- a/llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
+++ b/llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
@@ -309,7 +309,7 @@ static bool FactorOutConstant(const SCEV *&S, const SCEV
*&Remainder,
if (const SCEVConstant *FC = dyn_cast(Factor))
if (const SCEVConstant *C = dyn_cast(M->getOperand(0)))
if (!C->getAPInt().srem(FC->getAPInt())) {
- SmallVector NewMulOps(M->op_begin(), M->op_end());
+ SmallVector NewMulOps(M->operands());
NewMulOps[0] = SE.getConstant(C->getAPInt().sdiv(FC->getAPInt()));
S = SE.getMulExpr(NewMulOps);
return true;
@@ -911,7 +911,7 @@ static void ExposePointerBase(const SCEV *&Base, const SCEV
*&Rest,
}
if (const SCEVAddExpr *A = dyn_cast(Base)) {
Base = A->getOperand(A->getNumOperands()-1);
-SmallVector NewAddOps(A->op_begin(), A->op_end());
+SmallVector NewAddOps(A->operands());
NewAddOps.back() = Rest;
Rest = SE.getAddExpr(NewAddOps);
ExposePointerBase(Base, Rest, SE);
@@ -1556,7 +1556,7 @@ Value *SCEVExpander::visitAddRecExpr(const SCEVAddRecExpr
*S) {
// {X,+,F} --> X + {0,+,F}
if (!S->getStart()->isZero()) {
-SmallVector NewOps(S->op_begin(), S->op_end());
+SmallVector NewOps(S->operands());
NewOps[0] = SE.getConstant(Ty, 0);
const SCEV *Rest = SE.getAddRecExpr(NewOps, L,
S->getNoWrapFlags(SCEV::FlagNW));
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 24572810be70..5b60faee751a 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -1076,7 +1076,7 @@ bool
SimplifyCFGOpt::FoldValueComparisonIntoPredecessors(Instruction *TI,
++NumFoldValueComparisonIntoPredecessors;
});
- SmallVector Preds(pred_begin(BB), pred_end(BB));
+ SmallVe
[llvm-branch-commits] [llvm] 329b887 - [Analysis, IR] Use *Map::lookup (NFC)
Author: Kazu Hirata
Date: 2020-12-29T19:23:24-08:00
New Revision: 329b887286ab91872decd56adf1bb87aa30f9707
URL:
https://github.com/llvm/llvm-project/commit/329b887286ab91872decd56adf1bb87aa30f9707
DIFF:
https://github.com/llvm/llvm-project/commit/329b887286ab91872decd56adf1bb87aa30f9707.diff
LOG: [Analysis, IR] Use *Map::lookup (NFC)
Added:
Modified:
llvm/include/llvm/Analysis/RegionInfoImpl.h
llvm/include/llvm/Analysis/VectorUtils.h
llvm/lib/IR/PassRegistry.cpp
llvm/lib/IR/SafepointIRVerifier.cpp
Removed:
diff --git a/llvm/include/llvm/Analysis/RegionInfoImpl.h
b/llvm/include/llvm/Analysis/RegionInfoImpl.h
index bbd3dd5dc0ea..d28aee72dda5 100644
--- a/llvm/include/llvm/Analysis/RegionInfoImpl.h
+++ b/llvm/include/llvm/Analysis/RegionInfoImpl.h
@@ -815,8 +815,7 @@ void RegionInfoBase::verifyAnalysis() const {
// Region pass manager support.
template
typename Tr::RegionT *RegionInfoBase::getRegionFor(BlockT *BB) const {
- typename BBtoRegionMap::const_iterator I = BBtoRegion.find(BB);
- return I != BBtoRegion.end() ? I->second : nullptr;
+ return BBtoRegion.lookup(BB);
}
template
diff --git a/llvm/include/llvm/Analysis/VectorUtils.h
b/llvm/include/llvm/Analysis/VectorUtils.h
index c570bf25e92b..d8fb970a9f79 100644
--- a/llvm/include/llvm/Analysis/VectorUtils.h
+++ b/llvm/include/llvm/Analysis/VectorUtils.h
@@ -655,11 +655,7 @@ template class InterleaveGroup {
/// \returns nullptr if contains no such member.
InstTy *getMember(uint32_t Index) const {
int32_t Key = SmallestKey + Index;
-auto Member = Members.find(Key);
-if (Member == Members.end())
- return nullptr;
-
-return Member->second;
+return Members.lookup(Key);
}
/// Get the index for the given member. Unlike the key in the member
@@ -777,9 +773,7 @@ class InterleavedAccessInfo {
/// \returns nullptr if doesn't have such group.
InterleaveGroup *
getInterleaveGroup(const Instruction *Instr) const {
-if (InterleaveGroupMap.count(Instr))
- return InterleaveGroupMap.find(Instr)->second;
-return nullptr;
+return InterleaveGroupMap.lookup(Instr);
}
iterator_range *>>
diff --git a/llvm/lib/IR/PassRegistry.cpp b/llvm/lib/IR/PassRegistry.cpp
index 0572c4fe5237..94f607afec47 100644
--- a/llvm/lib/IR/PassRegistry.cpp
+++ b/llvm/lib/IR/PassRegistry.cpp
@@ -40,14 +40,12 @@ PassRegistry::~PassRegistry() = default;
const PassInfo *PassRegistry::getPassInfo(const void *TI) const {
sys::SmartScopedReader Guard(Lock);
- MapType::const_iterator I = PassInfoMap.find(TI);
- return I != PassInfoMap.end() ? I->second : nullptr;
+ return PassInfoMap.lookup(TI);
}
const PassInfo *PassRegistry::getPassInfo(StringRef Arg) const {
sys::SmartScopedReader Guard(Lock);
- StringMapType::const_iterator I = PassInfoStringMap.find(Arg);
- return I != PassInfoStringMap.end() ? I->second : nullptr;
+ return PassInfoStringMap.lookup(Arg);
}
//===--===//
diff --git a/llvm/lib/IR/SafepointIRVerifier.cpp
b/llvm/lib/IR/SafepointIRVerifier.cpp
index 6bf7caa50a12..8ed31b6668e0 100644
--- a/llvm/lib/IR/SafepointIRVerifier.cpp
+++ b/llvm/lib/IR/SafepointIRVerifier.cpp
@@ -561,8 +561,7 @@ GCPtrTracker::GCPtrTracker(const Function &F, const
DominatorTree &DT,
}
BasicBlockState *GCPtrTracker::getBasicBlockState(const BasicBlock *BB) {
- auto it = BlockMap.find(BB);
- return it != BlockMap.end() ? it->second : nullptr;
+ return BlockMap.lookup(BB);
}
const BasicBlockState *GCPtrTracker::getBasicBlockState(
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[llvm-branch-commits] [mlir] 11f41cd - [mlir][python] Install generated dialect sources.
Author: Stella Laurenzo
Date: 2020-12-29T20:15:07-08:00
New Revision: 11f41cd4451554d6ad6065dc7cd6c9349159c567
URL:
https://github.com/llvm/llvm-project/commit/11f41cd4451554d6ad6065dc7cd6c9349159c567
DIFF:
https://github.com/llvm/llvm-project/commit/11f41cd4451554d6ad6065dc7cd6c9349159c567.diff
LOG: [mlir][python] Install generated dialect sources.
Differential Revision: https://reviews.llvm.org/D93928
Added:
Modified:
mlir/lib/Bindings/Python/CMakeLists.txt
Removed:
diff --git a/mlir/lib/Bindings/Python/CMakeLists.txt
b/mlir/lib/Bindings/Python/CMakeLists.txt
index 0f51ce54ed09..83e978a6e046 100644
--- a/mlir/lib/Bindings/Python/CMakeLists.txt
+++ b/mlir/lib/Bindings/Python/CMakeLists.txt
@@ -71,4 +71,23 @@ if (NOT LLVM_ENABLE_IDE)
COMPONENT MLIRBindingsPythonSources)
endif()
+# Dialect sources are generated. Install separately.
+# Note that __pycache__ directories may have been left by tests and other
+# executions. And __init__.py is handled as a regular source file.
+install(
+ DIRECTORY ${PROJECT_BINARY_DIR}/python/mlir/dialects
+ DESTINATION python/mlir
+ COMPONENT MLIRBindingsPythonDialects
+ FILES_MATCHING PATTERN "*.py"
+ PATTERN "__pycache__" EXCLUDE
+ PATTERN "__init__.py" EXCLUDE
+)
+
+if (NOT LLVM_ENABLE_IDE)
+ add_llvm_install_targets(
+install-MLIRBindingsPythonDialects
+DEPENDS MLIRBindingsPythonSources
+COMPONENT MLIRBindingsPythonDialects)
+endif()
+
add_subdirectory(Transforms)
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[llvm-branch-commits] [llvm] a1d0589 - [llvm-elfabi] Add flag to preserve timestamp when output is the same
Author: Haowei Wu
Date: 2020-12-29T20:27:06-08:00
New Revision: a1d0589266865998785c996668d828445f10fc98
URL:
https://github.com/llvm/llvm-project/commit/a1d0589266865998785c996668d828445f10fc98
DIFF:
https://github.com/llvm/llvm-project/commit/a1d0589266865998785c996668d828445f10fc98.diff
LOG: [llvm-elfabi] Add flag to preserve timestamp when output is the same
This change adds '--write-if-changed' flag to llvm-elfabi tool. When
enabled, llvm-elfabi will not overwrite the existing file if the
content of the file will not be changed, which preserves the
timestamp.
Differential Revision: https://reviews.llvm.org/D92902
Added:
llvm/test/tools/llvm-elfabi/preserve-dates-stub.test
llvm/test/tools/llvm-elfabi/preserve-dates-tbe.test
Modified:
llvm/include/llvm/InterfaceStub/ELFObjHandler.h
llvm/lib/InterfaceStub/ELFObjHandler.cpp
llvm/tools/llvm-elfabi/llvm-elfabi.cpp
Removed:
diff --git a/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
b/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
index cbb9420cb666..4ec158c1405f 100644
--- a/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
+++ b/llvm/include/llvm/InterfaceStub/ELFObjHandler.h
@@ -16,6 +16,7 @@
#include "llvm/InterfaceStub/ELFStub.h"
#include "llvm/Object/ELFObjectFile.h"
#include "llvm/Object/ELFTypes.h"
+#include "llvm/Support/FileSystem.h"
namespace llvm {
@@ -35,8 +36,10 @@ Expected>
readELFFile(MemoryBufferRef Buf);
/// @param FilePath File path for writing the ELF binary.
/// @param Stub Source ELFStub to generate a binary ELF stub from.
/// @param OutputFormat Target ELFType to write binary as.
+/// @param WriteIfChanged Whether or not to preserve timestamp if
+///the output stays the same.
Error writeBinaryStub(StringRef FilePath, const ELFStub &Stub,
- ELFTarget OutputFormat);
+ ELFTarget OutputFormat, bool WriteIfChanged = false);
} // end namespace elfabi
} // end namespace llvm
diff --git a/llvm/lib/InterfaceStub/ELFObjHandler.cpp
b/llvm/lib/InterfaceStub/ELFObjHandler.cpp
index e50ebd7b8ba1..40d8afa88ad2 100644
--- a/llvm/lib/InterfaceStub/ELFObjHandler.cpp
+++ b/llvm/lib/InterfaceStub/ELFObjHandler.cpp
@@ -17,6 +17,7 @@
#include "llvm/Support/FileOutputBuffer.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/MemoryBuffer.h"
+#include "llvm/Support/Process.h"
using llvm::MemoryBufferRef;
using llvm::object::ELFObjectFile;
@@ -663,8 +664,25 @@ buildStub(const ELFObjectFile &ElfObj) {
/// @param FilePath File path for writing the ELF binary.
/// @param Stub Source ELFStub to generate a binary ELF stub from.
template
-static Error writeELFBinaryToFile(StringRef FilePath, const ELFStub &Stub) {
+static Error writeELFBinaryToFile(StringRef FilePath, const ELFStub &Stub,
+ bool WriteIfChanged) {
ELFStubBuilder Builder{Stub};
+ // Write Stub to memory first.
+ std::vector Buf(Builder.getSize());
+ Builder.write(Buf.data());
+
+ if (WriteIfChanged) {
+if (ErrorOr> BufOrError =
+MemoryBuffer::getFile(FilePath)) {
+ // Compare Stub output with existing Stub file.
+ // If Stub file unchanged, abort updating.
+ if ((*BufOrError)->getBufferSize() == Builder.getSize() &&
+ !memcmp((*BufOrError)->getBufferStart(), Buf.data(),
+ Builder.getSize()))
+return Error::success();
+}
+ }
+
Expected> BufOrError =
FileOutputBuffer::create(FilePath, Builder.getSize());
if (!BufOrError)
@@ -674,13 +692,10 @@ static Error writeELFBinaryToFile(StringRef FilePath,
const ELFStub &Stub) {
"` for writing");
// Write binary to file.
- std::unique_ptr Buf = std::move(*BufOrError);
- Builder.write(Buf->getBufferStart());
+ std::unique_ptr FileBuf = std::move(*BufOrError);
+ memcpy(FileBuf->getBufferStart(), Buf.data(), Buf.size());
- if (Error E = Buf->commit())
-return E;
-
- return Error::success();
+ return FileBuf->commit();
}
Expected> readELFFile(MemoryBufferRef Buf) {
@@ -705,15 +720,15 @@ Expected>
readELFFile(MemoryBufferRef Buf) {
// This function wraps the ELFT writeELFBinaryToFile() so writeBinaryStub()
// can be called without having to use ELFType templates directly.
Error writeBinaryStub(StringRef FilePath, const ELFStub &Stub,
- ELFTarget OutputFormat) {
+ ELFTarget OutputFormat, bool WriteIfChanged) {
if (OutputFormat == ELFTarget::ELF32LE)
-return writeELFBinaryToFile(FilePath, Stub);
+return writeELFBinaryToFile(FilePath, Stub, WriteIfChanged);
if (OutputFormat == ELFTarget::ELF32BE)
-return writeELFBinaryToFile(FilePath, Stub);
+return writeELFBinaryToFile(FilePath, Stub, WriteIfChanged);
if (OutputFormat == ELFTarget::ELF64LE)
-return writeELFBinaryToFile(FilePath, Stub);
+return writeELFBina
[llvm-branch-commits] [llvm] 18c3e79 - [Verifier] Remove declaration of method that was removed 8.5 years ago. NFC
Author: Craig Topper
Date: 2020-12-29T21:04:19-08:00
New Revision: 18c3e795f7ccecbc752d132e37306c5c051b5f8e
URL:
https://github.com/llvm/llvm-project/commit/18c3e795f7ccecbc752d132e37306c5c051b5f8e
DIFF:
https://github.com/llvm/llvm-project/commit/18c3e795f7ccecbc752d132e37306c5c051b5f8e.diff
LOG: [Verifier] Remove declaration of method that was removed 8.5 years ago. NFC
Added:
Modified:
llvm/lib/IR/Verifier.cpp
Removed:
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index aeca166a6023..1100d8da2f59 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -505,8 +505,6 @@ class Verifier : public InstVisitor,
VerifierSupport {
void verifySwiftErrorCall(CallBase &Call, const Value *SwiftErrorVal);
void verifySwiftErrorValue(const Value *SwiftErrorVal);
void verifyMustTailCall(CallInst &CI);
- bool performTypeCheck(Intrinsic::ID ID, Function *F, Type *Ty, int VT,
-unsigned ArgNo, std::string &Suffix);
bool verifyAttributeCount(AttributeList Attrs, unsigned Params);
void verifyAttributeTypes(AttributeSet Attrs, bool IsFunction,
const Value *V);
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[llvm-branch-commits] [llvm] bf286b0 - [X86][test] Improve global address offset folding tests
Author: Fangrui Song
Date: 2020-12-29T21:39:29-08:00
New Revision: bf286b00e9e860a85adaab1214271e374267a033
URL:
https://github.com/llvm/llvm-project/commit/bf286b00e9e860a85adaab1214271e374267a033
DIFF:
https://github.com/llvm/llvm-project/commit/bf286b00e9e860a85adaab1214271e374267a033.diff
LOG: [X86][test] Improve global address offset folding tests
Added:
Modified:
llvm/test/CodeGen/X86/fold-add.ll
Removed:
llvm/test/CodeGen/X86/fold-add-pcrel.ll
diff --git a/llvm/test/CodeGen/X86/fold-add-pcrel.ll
b/llvm/test/CodeGen/X86/fold-add-pcrel.ll
deleted file mode 100644
index 27a16b0ce61e..
--- a/llvm/test/CodeGen/X86/fold-add-pcrel.ll
+++ /dev/null
@@ -1,41 +0,0 @@
-; RUN: llc -mtriple=x86_64 -relocation-model=static < %s | FileCheck
--check-prefixes=CHECK,STATIC %s
-; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck
--check-prefixes=CHECK,PIC %s
-; RUN: llc -mtriple=x86_64 -code-model=medium -relocation-model=static < %s |
FileCheck --check-prefixes=CHECK,MSTATIC %s
-; RUN: llc -mtriple=x86_64 -code-model=medium -relocation-model=pic < %s |
FileCheck --check-prefixes=CHECK,MPIC %s
-
-@foo = internal global i32 0
-
-define dso_local i64 @zero() {
-; CHECK-LABEL: zero:
-; CHECK: # %bb.0:
-; STATIC-NEXT: movl $foo, %eax
-; STATIC-NEXT: retq
-; PIC-NEXT: leaq foo(%rip), %rax
-; PIC-NEXT: retq
-; MSTATIC-NEXT: movabsq $foo, %rax
-; MSTATIC-NEXT: retq
-; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx
-; MPIC-NEXT: movabsq $foo@GOTOFF, %rax
-; MPIC-NEXT: addq %rcx, %rax
-entry:
- ret i64 add (i64 ptrtoint (i32* @foo to i64), i64 0)
-}
-
-;; Check we don't fold a large offset into leaq, otherwise
-;; the large r_addend can easily cause a relocation overflow.
-define dso_local i64 @large() {
-; CHECK-LABEL: large:
-; CHECK: # %bb.0:
-; STATIC-NEXT: movl $1701208431, %eax
-; STATIC-NEXT: leaq foo(%rax), %rax
-; PIC-NEXT: leaq foo(%rip), %rax
-; PIC-NEXT: addq $1701208431, %rax
-; MSTATIC-NEXT: movabsq $foo, %rax
-; MSTATIC-NEXT: addq $1701208431, %rax
-; MSTATIC-NEXT: retq
-; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
-; MPIC-NEXT: movabsq $foo@GOTOFF, %rcx
-; MPIC-NEXT: leaq 1701208431(%rax,%rcx), %rax
-entry:
- ret i64 add (i64 ptrtoint (i32* @foo to i64), i64 1701208431)
-}
diff --git a/llvm/test/CodeGen/X86/fold-add.ll
b/llvm/test/CodeGen/X86/fold-add.ll
index e2d3b0588fe2..fc21e3b6e372 100644
--- a/llvm/test/CodeGen/X86/fold-add.ll
+++ b/llvm/test/CodeGen/X86/fold-add.ll
@@ -1,30 +1,105 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -mtriple=x86_64 -relocation-model=static < %s | FileCheck
--check-prefixes=CHECK,STATIC %s
+; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck
--check-prefixes=CHECK,PIC %s
+; RUN: llc -mtriple=x86_64 -code-model=medium -relocation-model=static < %s |
FileCheck --check-prefixes=CHECK,MSTATIC %s
+; RUN: llc -mtriple=x86_64 -code-model=medium -relocation-model=pic < %s |
FileCheck --check-prefixes=CHECK,MPIC %s
-target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-target triple = "x86_64-apple-darwin9.6"
-@prev_length = internal global i32 0 ; [#uses=1]
-@window = internal global [65536 x i8] zeroinitializer, align 32
; <[65536 x i8]*> [#uses=1]
-@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (i32)*
@longest_match to i8*)] ; <[1 x i8*]*> [#uses=0]
+@foo = internal global i32 0
-define fastcc i32 @longest_match(i32 %cur_match) nounwind {
-; CHECK-LABEL: longest_match:
-; CHECK-NOT: ret
-; CHECK: cmpb $0, (%r{{.*}},%r{{.*}})
-; CHECK: ret
+define dso_local i64 @zero() #0 {
+; CHECK-LABEL: zero:
+; CHECK: # %bb.0:
+; STATIC-NEXT: movl $foo, %eax
+; STATIC-NEXT: retq
+; PIC-NEXT: leaq foo(%rip), %rax
+; PIC-NEXT: retq
+; MSTATIC-NEXT: movabsq $foo, %rax
+; MSTATIC-NEXT: retq
+; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rcx
+; MPIC-NEXT: movabsq $foo@GOTOFF, %rax
+; MPIC-NEXT: addq %rcx, %rax
+entry:
+ ret i64 add (i64 ptrtoint (i32* @foo to i64), i64 0)
+}
+
+define dso_local i64 @one() #0 {
+; CHECK-LABEL: one:
+; CHECK: # %bb.0:
+; STATIC-NEXT: movl $foo+1, %eax
+; PIC-NEXT: leaq foo+1(%rip), %rax
+; MSTATIC-NEXT: movabsq $foo, %rax
+; MSTATIC-NEXT: incq %rax
+; MPIC-NEXT: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rax
+; MPIC-NEXT: movabsq $foo@GOTOFF, %rcx
+; MPIC-NEXT: leaq 1(%rax,%rcx), %rax
+entry:
+ ret i64 add (i64 ptrtoint (i32* @foo to i64), i64 1)
+}
+
+;; Check we don't fold a large offset into leaq, otherwise
+;; the large r_addend can easily cause a relocation overflow.
+define dso_local i64 @large() #0 {
+; CHECK-LABEL: large:
+; CHECK: # %bb.0:
+; STATIC-NEXT: movl $1701208431, %eax
+; STATIC-NEXT: leaq foo(%rax)
[llvm-branch-commits] [clang] 981a0bd - [X86] Add x86_amx type for intel AMX.
Author: Luo, Yuanke
Date: 2020-12-30T13:52:13+08:00
New Revision: 981a0bd85811fe49379fdbef35528e2c2f3511a3
URL:
https://github.com/llvm/llvm-project/commit/981a0bd85811fe49379fdbef35528e2c2f3511a3
DIFF:
https://github.com/llvm/llvm-project/commit/981a0bd85811fe49379fdbef35528e2c2f3511a3.diff
LOG: [X86] Add x86_amx type for intel AMX.
The x86_amx is used for AMX intrisics. <256 x i32> is bitcast to x86_amx when
it is used by AMX intrinsics, and x86_amx is bitcast to <256 x i32> when it
is used by load/store instruction. So amx intrinsics only operate on type
x86_amx.
It can help to separate amx intrinsics from llvm IR instructions (+-*/).
Thank Craig for the idea. This patch depend on https://reviews.llvm.org/D87981.
Differential Revision: https://reviews.llvm.org/D91927
Added:
Modified:
clang/test/CodeGen/X86/amx_api.c
llvm/include/llvm-c/Core.h
llvm/include/llvm/Bitcode/LLVMBitCodes.h
llvm/include/llvm/CodeGen/ValueTypes.td
llvm/include/llvm/IR/DataLayout.h
llvm/include/llvm/IR/Intrinsics.h
llvm/include/llvm/IR/Intrinsics.td
llvm/include/llvm/IR/IntrinsicsX86.td
llvm/include/llvm/IR/Type.h
llvm/include/llvm/Support/MachineValueType.h
llvm/lib/Analysis/ConstantFolding.cpp
llvm/lib/AsmParser/LLLexer.cpp
llvm/lib/Bitcode/Reader/BitcodeReader.cpp
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
llvm/lib/CodeGen/ValueTypes.cpp
llvm/lib/IR/AsmWriter.cpp
llvm/lib/IR/ConstantFold.cpp
llvm/lib/IR/Core.cpp
llvm/lib/IR/DataLayout.cpp
llvm/lib/IR/Function.cpp
llvm/lib/IR/LLVMContextImpl.cpp
llvm/lib/IR/LLVMContextImpl.h
llvm/lib/IR/Type.cpp
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86LowerAMXType.cpp
llvm/lib/Target/X86/X86RegisterInfo.td
llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
llvm/test/CodeGen/X86/AMX/amx-across-func.ll
llvm/test/CodeGen/X86/AMX/amx-config.ll
llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll
llvm/test/CodeGen/X86/AMX/amx-spill.ll
llvm/test/CodeGen/X86/AMX/amx-type.ll
llvm/utils/TableGen/CodeGenTarget.cpp
llvm/utils/TableGen/IntrinsicEmitter.cpp
Removed:
diff --git a/clang/test/CodeGen/X86/amx_api.c
b/clang/test/CodeGen/X86/amx_api.c
index c7fab8c6ed41..52eb9542228d 100644
--- a/clang/test/CodeGen/X86/amx_api.c
+++ b/clang/test/CodeGen/X86/amx_api.c
@@ -11,8 +11,8 @@ char buf2[1024];
// This is an example code and integration test.
void test_api(int cond, short row, short col) {
//CHECK-LABEL: @test_api
- //CHECK: call <256 x i32> @llvm.x86.tileloadd64.internal
- //CHECK: call <256 x i32> @llvm.x86.tdpbssd.internal
+ //CHECK: call x86_amx @llvm.x86.tileloadd64.internal
+ //CHECK: call x86_amx @llvm.x86.tdpbssd.internal
//CHECK: call void @llvm.x86.tilestored64.internal
__tile1024i a = {row, 8};
__tile1024i b = {8, col};
@@ -33,19 +33,22 @@ void test_api(int cond, short row, short col) {
void test_tile_loadd(short row, short col) {
//CHECK-LABEL: @test_tile_loadd
- //CHECK: call <256 x i32> @llvm.x86.tileloadd64.internal
+ //CHECK: call x86_amx @llvm.x86.tileloadd64.internal
+ //CHECK-NEXT: {{%.*}} = bitcast x86_amx {{%.*}} to <256 x i32>
__tile1024i a = {row, col};
__tile_loadd(&a, buf, STRIDE);
}
void test_tile_dpbsud(__tile1024i a, __tile1024i b, __tile1024i c) {
//CHECK-LABEL: @test_tile_dpbsud
- //CHECK: call <256 x i32> @llvm.x86.tdpbssd.internal
+ //CHECK: call x86_amx @llvm.x86.tdpbssd.internal
+ //CHECK-NEXT: {{%.*}} = bitcast x86_amx {{%.*}} to <256 x i32>
__tile_dpbsud(&c, a, b);
}
void test_tile_stored(__tile1024i c) {
//CHECK-LABEL: @test_tile_stored
- //CHECK: call void @llvm.x86.tilestored64.internal
+ //CHECK: {{%.*}} = bitcast <256 x i32> {{%.*}} to x86_amx
+ //CHECK-NEXT: call void @llvm.x86.tilestored64.internal
__tile_stored(buf, STRIDE, c);
}
diff --git a/llvm/include/llvm-c/Core.h b/llvm/include/llvm-c/Core.h
index 86de259ea53e..8274213aa839 100644
--- a/llvm/include/llvm-c/Core.h
+++ b/llvm/include/llvm-c/Core.h
@@ -160,6 +160,7 @@ typedef enum {
LLVMVectorTypeKind,/**< Fixed width SIMD vector type */
LLVMMetadataTypeKind, /**< Metadata */
LLVMX86_MMXTypeKind, /**< X86 MMX */
+ LLVMX86_AMXTypeKind, /**< X86 AMX */
LLVMTokenTypeKind, /**< Tokens */
LLVMScalableVectorTypeKind, /**< Scalable SIMD vector type */
LLVMBFloatTypeKind /**< 16 bit brain floating point type */
@@ -1493,6 +1494,11 @@ LLVMTypeRef LLVMLabelTypeInContext(LLVMContextRef C);
*/
LLVMTypeRef LLVMX86MMXTypeInContext(LLVMContextRef C);
+/**
+ * Create a X86 AMX type in a context.
+ */
+LLVMTypeRef LLVMX86AMXTypeInContext(LLVMContextRef C);
+
/**
* Create a token type in a context.
*/
@@ -1510,6 +1516,7 @@ LLVMTypeRef LLVMMetadataTypeInContext(LLVMContextRef C);
LLVMTypeRef LLVMVoidType(void
[llvm-branch-commits] [libc] ff6fd38 - [libc] Add implementations of rounding functions which depend rounding mode.
Author: Siva Chandra Reddy
Date: 2020-12-29T22:22:02-08:00
New Revision: ff6fd3855244bc90094e7de3f07853a5971cf8ef
URL:
https://github.com/llvm/llvm-project/commit/ff6fd3855244bc90094e7de3f07853a5971cf8ef
DIFF:
https://github.com/llvm/llvm-project/commit/ff6fd3855244bc90094e7de3f07853a5971cf8ef.diff
LOG: [libc] Add implementations of rounding functions which depend rounding
mode.
Namely, implementations for rint, rintf, rintl, lrint, lrintf, lrintl,
llrint, llrintf and llrintl have been added.
Reviewed By: lntue
Differential Revision: https://reviews.llvm.org/D93889
Added:
libc/src/math/llrint.cpp
libc/src/math/llrint.h
libc/src/math/llrintf.cpp
libc/src/math/llrintf.h
libc/src/math/llrintl.cpp
libc/src/math/llrintl.h
libc/src/math/lrint.cpp
libc/src/math/lrint.h
libc/src/math/lrintf.cpp
libc/src/math/lrintf.h
libc/src/math/lrintl.cpp
libc/src/math/lrintl.h
libc/src/math/rint.cpp
libc/src/math/rint.h
libc/src/math/rintf.cpp
libc/src/math/rintf.h
libc/src/math/rintl.cpp
libc/src/math/rintl.h
libc/test/src/math/RIntTest.h
libc/test/src/math/llrint_test.cpp
libc/test/src/math/llrintf_test.cpp
libc/test/src/math/llrintl_test.cpp
libc/test/src/math/lrint_test.cpp
libc/test/src/math/lrintf_test.cpp
libc/test/src/math/lrintl_test.cpp
libc/test/src/math/rint_test.cpp
libc/test/src/math/rintf_test.cpp
libc/test/src/math/rintl_test.cpp
Modified:
libc/config/linux/x86_64/entrypoints.txt
libc/spec/stdc.td
libc/src/math/CMakeLists.txt
libc/test/src/math/CMakeLists.txt
libc/test/src/math/RoundToIntegerTest.h
libc/utils/FPUtil/NearestIntegerOperations.h
libc/utils/MPFRWrapper/MPFRUtils.cpp
libc/utils/MPFRWrapper/MPFRUtils.h
Removed:
diff --git a/libc/config/linux/x86_64/entrypoints.txt
b/libc/config/linux/x86_64/entrypoints.txt
index d5a2f295d9d9..8e430afbcfc8 100644
--- a/libc/config/linux/x86_64/entrypoints.txt
+++ b/libc/config/linux/x86_64/entrypoints.txt
@@ -123,12 +123,18 @@ set(TARGET_LIBM_ENTRYPOINTS
libc.src.math.ldexp
libc.src.math.ldexpf
libc.src.math.ldexpl
+libc.src.math.llrint
+libc.src.math.llrintf
+libc.src.math.llrintl
libc.src.math.llround
libc.src.math.llroundf
libc.src.math.llroundl
libc.src.math.logb
libc.src.math.logbf
libc.src.math.logbl
+libc.src.math.lrint
+libc.src.math.lrintf
+libc.src.math.lrintl
libc.src.math.lround
libc.src.math.lroundf
libc.src.math.lroundl
@@ -141,6 +147,9 @@ set(TARGET_LIBM_ENTRYPOINTS
libc.src.math.remquof
libc.src.math.remquo
libc.src.math.remquol
+libc.src.math.rint
+libc.src.math.rintf
+libc.src.math.rintl
libc.src.math.round
libc.src.math.roundf
libc.src.math.roundl
diff --git a/libc/spec/stdc.td b/libc/spec/stdc.td
index aca9a1020b1e..0eea8e55701f 100644
--- a/libc/spec/stdc.td
+++ b/libc/spec/stdc.td
@@ -371,6 +371,18 @@ def StdC : StandardSpec<"stdc"> {
FunctionSpec<"llroundf", RetValSpec,
[ArgSpec]>,
FunctionSpec<"llroundl", RetValSpec,
[ArgSpec]>,
+ FunctionSpec<"rint", RetValSpec, [ArgSpec]>,
+ FunctionSpec<"rintf", RetValSpec, [ArgSpec]>,
+ FunctionSpec<"rintl", RetValSpec,
[ArgSpec]>,
+
+ FunctionSpec<"lrint", RetValSpec, [ArgSpec]>,
+ FunctionSpec<"lrintf", RetValSpec, [ArgSpec]>,
+ FunctionSpec<"lrintl", RetValSpec,
[ArgSpec]>,
+
+ FunctionSpec<"llrint", RetValSpec,
[ArgSpec]>,
+ FunctionSpec<"llrintf", RetValSpec,
[ArgSpec]>,
+ FunctionSpec<"llrintl", RetValSpec,
[ArgSpec]>,
+
FunctionSpec<"sqrt", RetValSpec, [ArgSpec]>,
FunctionSpec<"sqrtf", RetValSpec, [ArgSpec]>,
FunctionSpec<"sqrtl", RetValSpec,
[ArgSpec]>,
diff --git a/libc/src/math/CMakeLists.txt b/libc/src/math/CMakeLists.txt
index c4de1b1eae86..ff9d79131a60 100644
--- a/libc/src/math/CMakeLists.txt
+++ b/libc/src/math/CMakeLists.txt
@@ -308,6 +308,114 @@ add_entrypoint_object(
-O2
)
+add_entrypoint_object(
+ rint
+ SRCS
+rint.cpp
+ HDRS
+rint.h
+ DEPENDS
+libc.utils.FPUtil.fputil
+ COMPILE_OPTIONS
+-O2
+)
+
+add_entrypoint_object(
+ rintf
+ SRCS
+rintf.cpp
+ HDRS
+rintf.h
+ DEPENDS
+libc.utils.FPUtil.fputil
+ COMPILE_OPTIONS
+-O2
+)
+
+add_entrypoint_object(
+ rintl
+ SRCS
+rintl.cpp
+ HDRS
+rintl.h
+ DEPENDS
+libc.utils.FPUtil.fputil
+ COMPILE_OPTIONS
+-O2
+)
+
+add_entrypoint_object(
+ lrint
+ SRCS
+lrint.cpp
+ HDRS
+lrint.h
+ DEPENDS
+libc.utils.FPUtil.fputil
+ COMPILE_OPTIONS
+-O2
+)
+
+add_entrypoint_object(
+ lrintf
+ SRCS
+lrintf.cpp
+ HDRS
+lrintf.h
+ DEPENDS
+libc.utils.FPUtil.fputil
+ COMPILE_OPTIONS
+-O2
+)
+
+add_entrypoint_object(
+ lrintl
+ SRCS
+lrintl.
[llvm-branch-commits] [llvm] 109e073 - [ConstraintElimination] Add tests for select form and/or (NFC)
Author: Juneyoung Lee
Date: 2020-12-30T16:05:19+09:00
New Revision: 109e0736620cc3ca618e80ec3c1f2f267ee2e026
URL:
https://github.com/llvm/llvm-project/commit/109e0736620cc3ca618e80ec3c1f2f267ee2e026
DIFF:
https://github.com/llvm/llvm-project/commit/109e0736620cc3ca618e80ec3c1f2f267ee2e026.diff
LOG: [ConstraintElimination] Add tests for select form and/or (NFC)
Added:
Modified:
llvm/test/Transforms/ConstraintElimination/and.ll
llvm/test/Transforms/ConstraintElimination/or.ll
Removed:
diff --git a/llvm/test/Transforms/ConstraintElimination/and.ll
b/llvm/test/Transforms/ConstraintElimination/and.ll
index d8962b39ebd5..c9b633049757 100644
--- a/llvm/test/Transforms/ConstraintElimination/and.ll
+++ b/llvm/test/Transforms/ConstraintElimination/and.ll
@@ -48,6 +48,72 @@ bb1:
call void @use(i1 %t.3)
+ %c.3 = icmp ule i32 %x, %a
+ call void @use(i1 %c.3)
+
+ ret i32 10
+
+exit:
+ %c.4 = icmp ule i32 %x, %z
+ call void @use(i1 %c.4)
+
+ %c.5 = icmp ule i32 %x, %a
+ call void @use(i1 %c.5)
+
+ %c.6 = icmp ule i32 %x, %y
+ call void @use(i1 %c.6)
+
+ %c.7 = icmp ule i32 %y, %z
+ call void @use(i1 %c.7)
+
+ ret i32 20
+}
+
+define i32 @test_and_select_ule(i32 %x, i32 %y, i32 %z, i32 %a) {
+; CHECK-LABEL: @test_and_select_ule(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[C_1:%.*]] = icmp ule i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:[[C_2:%.*]] = icmp ule i32 [[Y]], [[Z:%.*]]
+; CHECK-NEXT:[[AND:%.*]] = select i1 [[C_1]], i1 [[C_2]], i1 false
+; CHECK-NEXT:br i1 [[AND]], label [[BB1:%.*]], label [[EXIT:%.*]]
+; CHECK: bb1:
+; CHECK-NEXT:[[T_1:%.*]] = icmp ule i32 [[X]], [[Z]]
+; CHECK-NEXT:call void @use(i1 [[T_1]])
+; CHECK-NEXT:[[T_2:%.*]] = icmp ule i32 [[X]], [[Y]]
+; CHECK-NEXT:call void @use(i1 [[T_2]])
+; CHECK-NEXT:[[T_3:%.*]] = icmp ule i32 [[Y]], [[Z]]
+; CHECK-NEXT:call void @use(i1 [[T_3]])
+; CHECK-NEXT:[[C_3:%.*]] = icmp ule i32 [[X]], [[A:%.*]]
+; CHECK-NEXT:call void @use(i1 [[C_3]])
+; CHECK-NEXT:ret i32 10
+; CHECK: exit:
+; CHECK-NEXT:[[C_4:%.*]] = icmp ule i32 [[X]], [[Z]]
+; CHECK-NEXT:call void @use(i1 [[C_4]])
+; CHECK-NEXT:[[C_5:%.*]] = icmp ule i32 [[X]], [[A]]
+; CHECK-NEXT:call void @use(i1 [[C_5]])
+; CHECK-NEXT:[[C_6:%.*]] = icmp ule i32 [[X]], [[Y]]
+; CHECK-NEXT:call void @use(i1 [[C_6]])
+; CHECK-NEXT:[[C_7:%.*]] = icmp ule i32 [[Y]], [[Z]]
+; CHECK-NEXT:call void @use(i1 [[C_7]])
+; CHECK-NEXT:ret i32 20
+;
+entry:
+ %c.1 = icmp ule i32 %x, %y
+ %c.2 = icmp ule i32 %y, %z
+ %and = select i1 %c.1, i1 %c.2, i1 false
+ br i1 %and, label %bb1, label %exit
+
+bb1:
+ %t.1 = icmp ule i32 %x, %z
+ call void @use(i1 %t.1)
+
+ %t.2 = icmp ule i32 %x, %y
+ call void @use(i1 %t.2)
+
+ %t.3 = icmp ule i32 %y, %z
+ call void @use(i1 %t.3)
+
+
%c.3 = icmp ule i32 %x, %a
call void @use(i1 %c.3)
diff --git a/llvm/test/Transforms/ConstraintElimination/or.ll
b/llvm/test/Transforms/ConstraintElimination/or.ll
index 31a1803d8621..b97887043eb9 100644
--- a/llvm/test/Transforms/ConstraintElimination/or.ll
+++ b/llvm/test/Transforms/ConstraintElimination/or.ll
@@ -62,3 +62,63 @@ exit:
ret i32 20
}
+
+define i32 @test_or_select_ule(i32 %x, i32 %y, i32 %z, i32 %a) {
+; CHECK-LABEL: @test_or_select_ule(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[C_1:%.*]] = icmp ule i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:[[C_2:%.*]] = icmp ule i32 [[Y]], [[Z:%.*]]
+; CHECK-NEXT:[[OR:%.*]] = select i1 [[C_1]], i1 true, i1 [[C_2]]
+; CHECK-NEXT:br i1 [[OR]], label [[BB1:%.*]], label [[EXIT:%.*]]
+; CHECK: bb1:
+; CHECK-NEXT:[[C_3:%.*]] = icmp ule i32 [[X]], [[Z]]
+; CHECK-NEXT:call void @use(i1 [[C_3]])
+; CHECK-NEXT:[[C_4:%.*]] = icmp ule i32 [[X]], [[A:%.*]]
+; CHECK-NEXT:call void @use(i1 [[C_4]])
+; CHECK-NEXT:ret i32 10
+; CHECK: exit:
+; CHECK-NEXT:[[F_1:%.*]] = icmp ule i32 [[X]], [[Z]]
+; CHECK-NEXT:call void @use(i1 [[F_1]])
+; CHECK-NEXT:[[C_5:%.*]] = icmp ule i32 [[X]], [[A]]
+; CHECK-NEXT:call void @use(i1 [[C_5]])
+; CHECK-NEXT:[[T_1:%.*]] = icmp ugt i32 [[Y]], [[Z]]
+; CHECK-NEXT:call void @use(i1 [[T_1]])
+; CHECK-NEXT:[[T_2:%.*]] = icmp ugt i32 [[X]], [[Y]]
+; CHECK-NEXT:call void @use(i1 [[T_2]])
+; CHECK-NEXT:[[T_3:%.*]] = icmp ugt i32 [[X]], [[Z]]
+; CHECK-NEXT:call void @use(i1 [[T_3]])
+; CHECK-NEXT:ret i32 20
+;
+entry:
+ %c.1 = icmp ule i32 %x, %y
+ %c.2 = icmp ule i32 %y, %z
+ %or = select i1 %c.1, i1 true, i1 %c.2
+ br i1 %or, label %bb1, label %exit
+
+bb1:
+ %c.3 = icmp ule i32 %x, %z
+ call void @use(i1 %c.3)
+
+ %c.4 = icmp ule i32 %x, %a
+ call void @use(i1 %c.4)
+
+ ret i32 10
+
+exit:
+ %f.1 = icmp ule i32 %x, %z
+ call void @use(i1 %f.1)
+
+ %c.5 = icmp ule i32 %x, %a
+ call void @use(i1 %c.5)
+
+ %t.1 = icmp ugt i32 %y, %z
+ call void @use(i1 %t.1)
+
+
[llvm-branch-commits] [llvm] 71867ed - [IROutliner] Adding support for swift errors
Author: Andrew Litteken
Date: 2020-12-30T01:14:55-06:00
New Revision: 71867ed5e6606a93f0c1413f205afe3bb16317fe
URL:
https://github.com/llvm/llvm-project/commit/71867ed5e6606a93f0c1413f205afe3bb16317fe
DIFF:
https://github.com/llvm/llvm-project/commit/71867ed5e6606a93f0c1413f205afe3bb16317fe.diff
LOG: [IROutliner] Adding support for swift errors
Added:
llvm/test/Transforms/IROutliner/outlining-swift-error.ll
Modified:
llvm/lib/Transforms/IPO/IROutliner.cpp
Removed:
diff --git a/llvm/lib/Transforms/IPO/IROutliner.cpp
b/llvm/lib/Transforms/IPO/IROutliner.cpp
index d972908f507d..5289826f4a9a 100644
--- a/llvm/lib/Transforms/IPO/IROutliner.cpp
+++ b/llvm/lib/Transforms/IPO/IROutliner.cpp
@@ -81,6 +81,10 @@ struct OutlinableGroup {
/// Regions.
unsigned Cost = 0;
+ /// The argument that needs to be marked with the swifterr attribute. If not
+ /// needed, there is no value.
+ Optional SwiftErrorArgument;
+
/// For the \ref Regions, we look at every Value. If it is a constant,
/// we check whether it is the same in Region.
///
@@ -352,6 +356,11 @@ Function *IROutliner::createFunction(Module &M,
OutlinableGroup &Group,
Group.OutlinedFunctionType, GlobalValue::InternalLinkage,
"outlined_ir_func_" + std::to_string(FunctionNameSuffix), M);
+ // Transfer the swifterr attribute to the correct function parameter.
+ if (Group.SwiftErrorArgument.hasValue())
+Group.OutlinedFunction->addParamAttr(Group.SwiftErrorArgument.getValue(),
+ Attribute::SwiftError);
+
Group.OutlinedFunction->addFnAttr(Attribute::OptimizeForSize);
Group.OutlinedFunction->addFnAttr(Attribute::MinSize);
@@ -570,8 +579,17 @@ findExtractedInputToOverallInputMapping(OutlinableRegion
&Region,
assert(InputOpt.hasValue() && "Global value number not found?");
Value *Input = InputOpt.getValue();
-if (!Group.InputTypesSet)
+if (!Group.InputTypesSet) {
Group.ArgumentTypes.push_back(Input->getType());
+ // If the input value has a swifterr attribute, make sure to mark the
+ // argument in the overall function.
+ if (Input->isSwiftError()) {
+assert(
+!Group.SwiftErrorArgument.hasValue() &&
+"Argument already marked with swifterr for this OutlinableGroup!");
+Group.SwiftErrorArgument = TypeIndex;
+ }
+}
// Check if we have a constant. If we do add it to the overall argument
// number to Constant map for the region, and continue to the next input.
@@ -792,6 +810,12 @@ CallInst *replaceCalledFunction(Module &M,
OutlinableRegion &Region) {
OldCall->eraseFromParent();
Region.Call = Call;
+ // Make sure that the argument in the new function has the SwiftError
+ // argument.
+ if (Group.SwiftErrorArgument.hasValue())
+Call->addParamAttr(Group.SwiftErrorArgument.getValue(),
+ Attribute::SwiftError);
+
return Call;
}
diff --git a/llvm/test/Transforms/IROutliner/outlining-swift-error.ll
b/llvm/test/Transforms/IROutliner/outlining-swift-error.ll
new file mode 100644
index ..a6012cdeb329
--- /dev/null
+++ b/llvm/test/Transforms/IROutliner/outlining-swift-error.ll
@@ -0,0 +1,47 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -verify -iroutliner -ir-outlining-no-cost < %s | FileCheck %s
+
+%swift.error = type opaque
+
+define void @outlining_swifterror1(%swift.error** swifterror %err) {
+; CHECK-LABEL: @outlining_swifterror1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[X:%.*]] = alloca i64, align 8
+; CHECK-NEXT:call void @outlined_ir_func_0(i64 5, i64* [[X]],
%swift.error** swifterror [[ERR:%.*]])
+; CHECK-NEXT:ret void
+;
+entry:
+ %x = alloca i64
+ %0 = mul i64 5, 5
+ %1 = add i64 %0, %0
+ store i64 %1, i64* %x
+ %casted = bitcast i64* %x to %swift.error*
+ store %swift.error* %casted, %swift.error** %err
+ ret void
+}
+
+define void @outlining_swifterror2(%swift.error** swifterror %err) {
+; CHECK-LABEL: @outlining_swifterror2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[X:%.*]] = alloca i64, align 8
+; CHECK-NEXT:call void @outlined_ir_func_0(i64 3, i64* [[X]],
%swift.error** swifterror [[ERR:%.*]])
+; CHECK-NEXT:ret void
+;
+entry:
+ %x = alloca i64
+ %0 = mul i64 3, 3
+ %1 = add i64 %0, %0
+ store i64 %1, i64* %x
+ %casted = bitcast i64* %x to %swift.error*
+ store %swift.error* %casted, %swift.error** %err
+ ret void
+}
+
+; CHECK: define internal void @outlined_ir_func_0(i64 [[ARG0:%.*]], i64*
[[ARG1:%.*]], %swift.error** swifterror [[ARG2:%.*]])
+; CHECK: entry_to_outline:
+; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[ARG0]], [[ARG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[TMP0]], [[TMP0]]
+; CHECK-NEXT: store i64 [[TMP1]], i64* [[ARG1]], align 4
+; CHECK-NEXT: %casted = bitcast i64* [[ARG1]] to %swift.error*
+; CHECK-NEXT: store %swi
[llvm-branch-commits] [llvm] eeb99c2 - Revert "[IROutliner] Adding support for swift errors"
Author: Andrew Litteken
Date: 2020-12-30T01:17:27-06:00
New Revision: eeb99c2ac2672c8a61085e94f66b1b31c524cd87
URL:
https://github.com/llvm/llvm-project/commit/eeb99c2ac2672c8a61085e94f66b1b31c524cd87
DIFF:
https://github.com/llvm/llvm-project/commit/eeb99c2ac2672c8a61085e94f66b1b31c524cd87.diff
LOG: Revert "[IROutliner] Adding support for swift errors"
This reverts commit 71867ed5e6606a93f0c1413f205afe3bb16317fe.
Reverting for lack of commit messages.
Added:
Modified:
llvm/lib/Transforms/IPO/IROutliner.cpp
Removed:
llvm/test/Transforms/IROutliner/outlining-swift-error.ll
diff --git a/llvm/lib/Transforms/IPO/IROutliner.cpp
b/llvm/lib/Transforms/IPO/IROutliner.cpp
index 5289826f4a9a..d972908f507d 100644
--- a/llvm/lib/Transforms/IPO/IROutliner.cpp
+++ b/llvm/lib/Transforms/IPO/IROutliner.cpp
@@ -81,10 +81,6 @@ struct OutlinableGroup {
/// Regions.
unsigned Cost = 0;
- /// The argument that needs to be marked with the swifterr attribute. If not
- /// needed, there is no value.
- Optional SwiftErrorArgument;
-
/// For the \ref Regions, we look at every Value. If it is a constant,
/// we check whether it is the same in Region.
///
@@ -356,11 +352,6 @@ Function *IROutliner::createFunction(Module &M,
OutlinableGroup &Group,
Group.OutlinedFunctionType, GlobalValue::InternalLinkage,
"outlined_ir_func_" + std::to_string(FunctionNameSuffix), M);
- // Transfer the swifterr attribute to the correct function parameter.
- if (Group.SwiftErrorArgument.hasValue())
-Group.OutlinedFunction->addParamAttr(Group.SwiftErrorArgument.getValue(),
- Attribute::SwiftError);
-
Group.OutlinedFunction->addFnAttr(Attribute::OptimizeForSize);
Group.OutlinedFunction->addFnAttr(Attribute::MinSize);
@@ -579,17 +570,8 @@ findExtractedInputToOverallInputMapping(OutlinableRegion
&Region,
assert(InputOpt.hasValue() && "Global value number not found?");
Value *Input = InputOpt.getValue();
-if (!Group.InputTypesSet) {
+if (!Group.InputTypesSet)
Group.ArgumentTypes.push_back(Input->getType());
- // If the input value has a swifterr attribute, make sure to mark the
- // argument in the overall function.
- if (Input->isSwiftError()) {
-assert(
-!Group.SwiftErrorArgument.hasValue() &&
-"Argument already marked with swifterr for this OutlinableGroup!");
-Group.SwiftErrorArgument = TypeIndex;
- }
-}
// Check if we have a constant. If we do add it to the overall argument
// number to Constant map for the region, and continue to the next input.
@@ -810,12 +792,6 @@ CallInst *replaceCalledFunction(Module &M,
OutlinableRegion &Region) {
OldCall->eraseFromParent();
Region.Call = Call;
- // Make sure that the argument in the new function has the SwiftError
- // argument.
- if (Group.SwiftErrorArgument.hasValue())
-Call->addParamAttr(Group.SwiftErrorArgument.getValue(),
- Attribute::SwiftError);
-
return Call;
}
diff --git a/llvm/test/Transforms/IROutliner/outlining-swift-error.ll
b/llvm/test/Transforms/IROutliner/outlining-swift-error.ll
deleted file mode 100644
index a6012cdeb329..
--- a/llvm/test/Transforms/IROutliner/outlining-swift-error.ll
+++ /dev/null
@@ -1,47 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -verify -iroutliner -ir-outlining-no-cost < %s | FileCheck %s
-
-%swift.error = type opaque
-
-define void @outlining_swifterror1(%swift.error** swifterror %err) {
-; CHECK-LABEL: @outlining_swifterror1(
-; CHECK-NEXT: entry:
-; CHECK-NEXT:[[X:%.*]] = alloca i64, align 8
-; CHECK-NEXT:call void @outlined_ir_func_0(i64 5, i64* [[X]],
%swift.error** swifterror [[ERR:%.*]])
-; CHECK-NEXT:ret void
-;
-entry:
- %x = alloca i64
- %0 = mul i64 5, 5
- %1 = add i64 %0, %0
- store i64 %1, i64* %x
- %casted = bitcast i64* %x to %swift.error*
- store %swift.error* %casted, %swift.error** %err
- ret void
-}
-
-define void @outlining_swifterror2(%swift.error** swifterror %err) {
-; CHECK-LABEL: @outlining_swifterror2(
-; CHECK-NEXT: entry:
-; CHECK-NEXT:[[X:%.*]] = alloca i64, align 8
-; CHECK-NEXT:call void @outlined_ir_func_0(i64 3, i64* [[X]],
%swift.error** swifterror [[ERR:%.*]])
-; CHECK-NEXT:ret void
-;
-entry:
- %x = alloca i64
- %0 = mul i64 3, 3
- %1 = add i64 %0, %0
- store i64 %1, i64* %x
- %casted = bitcast i64* %x to %swift.error*
- store %swift.error* %casted, %swift.error** %err
- ret void
-}
-
-; CHECK: define internal void @outlined_ir_func_0(i64 [[ARG0:%.*]], i64*
[[ARG1:%.*]], %swift.error** swifterror [[ARG2:%.*]])
-; CHECK: entry_to_outline:
-; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[ARG0]], [[ARG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[TMP0]], [[TMP0]]
-; CHECK-NEXT: store i64 [[TMP1]]
[llvm-branch-commits] [llvm] 30feb93 - [IROutliner] Adding support for swift errors in the IROutliner
Author: Andrew Litteken
Date: 2020-12-30T01:17:27-06:00
New Revision: 30feb93036ebb8ffc5233a9ab3960836c2407d95
URL:
https://github.com/llvm/llvm-project/commit/30feb93036ebb8ffc5233a9ab3960836c2407d95
DIFF:
https://github.com/llvm/llvm-project/commit/30feb93036ebb8ffc5233a9ab3960836c2407d95.diff
LOG: [IROutliner] Adding support for swift errors in the IROutliner
Since some values can be swift errors, we need to make sure that we
correctly propagate the parameter attributes.
Tests found at:
llvm/test/Transforms/IROutliner/outlining-swift-error.ll
Reviewers: jroelofs, paquette
Recommit of: 71867ed5e6606a93f0c1413f205afe3bb16317fe
Differential Revision: https://reviews.llvm.org/D87742
Added:
llvm/test/Transforms/IROutliner/outlining-swift-error.ll
Modified:
llvm/lib/Transforms/IPO/IROutliner.cpp
Removed:
diff --git a/llvm/lib/Transforms/IPO/IROutliner.cpp
b/llvm/lib/Transforms/IPO/IROutliner.cpp
index d972908f507d..5289826f4a9a 100644
--- a/llvm/lib/Transforms/IPO/IROutliner.cpp
+++ b/llvm/lib/Transforms/IPO/IROutliner.cpp
@@ -81,6 +81,10 @@ struct OutlinableGroup {
/// Regions.
unsigned Cost = 0;
+ /// The argument that needs to be marked with the swifterr attribute. If not
+ /// needed, there is no value.
+ Optional SwiftErrorArgument;
+
/// For the \ref Regions, we look at every Value. If it is a constant,
/// we check whether it is the same in Region.
///
@@ -352,6 +356,11 @@ Function *IROutliner::createFunction(Module &M,
OutlinableGroup &Group,
Group.OutlinedFunctionType, GlobalValue::InternalLinkage,
"outlined_ir_func_" + std::to_string(FunctionNameSuffix), M);
+ // Transfer the swifterr attribute to the correct function parameter.
+ if (Group.SwiftErrorArgument.hasValue())
+Group.OutlinedFunction->addParamAttr(Group.SwiftErrorArgument.getValue(),
+ Attribute::SwiftError);
+
Group.OutlinedFunction->addFnAttr(Attribute::OptimizeForSize);
Group.OutlinedFunction->addFnAttr(Attribute::MinSize);
@@ -570,8 +579,17 @@ findExtractedInputToOverallInputMapping(OutlinableRegion
&Region,
assert(InputOpt.hasValue() && "Global value number not found?");
Value *Input = InputOpt.getValue();
-if (!Group.InputTypesSet)
+if (!Group.InputTypesSet) {
Group.ArgumentTypes.push_back(Input->getType());
+ // If the input value has a swifterr attribute, make sure to mark the
+ // argument in the overall function.
+ if (Input->isSwiftError()) {
+assert(
+!Group.SwiftErrorArgument.hasValue() &&
+"Argument already marked with swifterr for this OutlinableGroup!");
+Group.SwiftErrorArgument = TypeIndex;
+ }
+}
// Check if we have a constant. If we do add it to the overall argument
// number to Constant map for the region, and continue to the next input.
@@ -792,6 +810,12 @@ CallInst *replaceCalledFunction(Module &M,
OutlinableRegion &Region) {
OldCall->eraseFromParent();
Region.Call = Call;
+ // Make sure that the argument in the new function has the SwiftError
+ // argument.
+ if (Group.SwiftErrorArgument.hasValue())
+Call->addParamAttr(Group.SwiftErrorArgument.getValue(),
+ Attribute::SwiftError);
+
return Call;
}
diff --git a/llvm/test/Transforms/IROutliner/outlining-swift-error.ll
b/llvm/test/Transforms/IROutliner/outlining-swift-error.ll
new file mode 100644
index ..a6012cdeb329
--- /dev/null
+++ b/llvm/test/Transforms/IROutliner/outlining-swift-error.ll
@@ -0,0 +1,47 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -verify -iroutliner -ir-outlining-no-cost < %s | FileCheck %s
+
+%swift.error = type opaque
+
+define void @outlining_swifterror1(%swift.error** swifterror %err) {
+; CHECK-LABEL: @outlining_swifterror1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[X:%.*]] = alloca i64, align 8
+; CHECK-NEXT:call void @outlined_ir_func_0(i64 5, i64* [[X]],
%swift.error** swifterror [[ERR:%.*]])
+; CHECK-NEXT:ret void
+;
+entry:
+ %x = alloca i64
+ %0 = mul i64 5, 5
+ %1 = add i64 %0, %0
+ store i64 %1, i64* %x
+ %casted = bitcast i64* %x to %swift.error*
+ store %swift.error* %casted, %swift.error** %err
+ ret void
+}
+
+define void @outlining_swifterror2(%swift.error** swifterror %err) {
+; CHECK-LABEL: @outlining_swifterror2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[X:%.*]] = alloca i64, align 8
+; CHECK-NEXT:call void @outlined_ir_func_0(i64 3, i64* [[X]],
%swift.error** swifterror [[ERR:%.*]])
+; CHECK-NEXT:ret void
+;
+entry:
+ %x = alloca i64
+ %0 = mul i64 3, 3
+ %1 = add i64 %0, %0
+ store i64 %1, i64* %x
+ %casted = bitcast i64* %x to %swift.error*
+ store %swift.error* %casted, %swift.error** %err
+ ret void
+}
+
+; CHECK: define internal void @outlined_ir_func_0(i64 [[ARG0:%.*]], i64*
[llvm-branch-commits] [llvm] 2820a2c - Move -fno-semantic-interposition dso_local logic from TargetMachine to Clang CodeGenModule
Author: Fangrui Song
Date: 2020-12-29T23:37:55-08:00
New Revision: 2820a2ca3a0e69c3f301845420e00672251b
URL:
https://github.com/llvm/llvm-project/commit/2820a2ca3a0e69c3f301845420e00672251b
DIFF:
https://github.com/llvm/llvm-project/commit/2820a2ca3a0e69c3f301845420e00672251b.diff
LOG: Move -fno-semantic-interposition dso_local logic from TargetMachine to
Clang CodeGenModule
This simplifies TargetMachine::shouldAssumeDSOLocal and and gives frontend the
decision to use dso_local. For LLVM synthesized functions/globals, they may lose
inferred dso_local but such optimizations are probably not very useful.
Note: the hasComdat() condition in canBenefitFromLocalAlias (D77429) may be
dead now.
(llvm/CodeGen/X86/semantic-interposition-comdat.ll)
(Investigate whether we need test coverage when Fuchsia C++ ABI is clearer)
Added:
clang/test/CodeGen/semantic-interposition-no.c
Modified:
clang/lib/CodeGen/CodeGenModule.cpp
llvm/lib/Target/TargetMachine.cpp
Removed:
llvm/test/CodeGen/X86/semantic-interposition-comdat.ll
llvm/test/CodeGen/X86/semantic-interposition-infer-dsolocal.ll
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp
b/clang/lib/CodeGen/CodeGenModule.cpp
index 93916e85a461..6d14298d9f5f 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -954,8 +954,17 @@ static bool shouldAssumeDSOLocal(const CodeGenModule &CGM,
const auto &CGOpts = CGM.getCodeGenOpts();
llvm::Reloc::Model RM = CGOpts.RelocationModel;
const auto &LOpts = CGM.getLangOpts();
- if (RM != llvm::Reloc::Static && !LOpts.PIE)
-return false;
+ if (RM != llvm::Reloc::Static && !LOpts.PIE) {
+// On ELF, if -fno-semantic-interposition is specified, we can set
dso_local
+// if using a local alias is preferable (can avoid GOT indirection).
+// Currently only x86 supports local alias.
+if (!TT.isOSBinFormatELF() ||
+!CGM.getLangOpts().ExplicitNoSemanticInterposition ||
+!GV->canBenefitFromLocalAlias())
+ return false;
+// The allowed targets need to match AsmPrinter::getSymbolPreferLocal.
+return TT.isX86();
+ }
// A definition cannot be preempted from an executable.
if (!GV->isDeclarationForLinker())
diff --git a/clang/test/CodeGen/semantic-interposition-no.c
b/clang/test/CodeGen/semantic-interposition-no.c
new file mode 100644
index ..cc53d1799f9d
--- /dev/null
+++ b/clang/test/CodeGen/semantic-interposition-no.c
@@ -0,0 +1,23 @@
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -emit-llvm -mrelocation-model pic
-pic-level 1 -fno-semantic-interposition %s -o - | FileCheck %s
+
+/// For ELF -fpic/-fPIC, if -fno-semantic-interposition is specified, mark
+/// defined variables and functions dso_local. ifunc isn't marked.
+
+// CHECK: @var = dso_local global i32 0, align 4
+// CHECK: @ext_var = external global i32, align 4
+int var;
+extern int ext_var;
+
+// CHECK: @ifunc = ifunc i32 (), bitcast (i8* ()* @ifunc_resolver to i32 ()*)
+int ifunc(void) __attribute__((ifunc("ifunc_resolver")));
+
+// CHECK: define dso_local i32 @func()
+// CHECK: declare i32 @ext()
+int func(void) { return 0; }
+int ext(void);
+
+static void *ifunc_resolver() { return func; }
+
+int foo() {
+ return var + ext_var + ifunc() + func() + ext();
+}
diff --git a/llvm/lib/Target/TargetMachine.cpp
b/llvm/lib/Target/TargetMachine.cpp
index ad0e90125258..b45b8e354b3a 100644
--- a/llvm/lib/Target/TargetMachine.cpp
+++ b/llvm/lib/Target/TargetMachine.cpp
@@ -163,14 +163,6 @@ bool TargetMachine::shouldAssumeDSOLocal(const Module &M,
// If the symbol is defined, it cannot be preempted.
if (!GV->isDeclarationForLinker())
return true;
- } else if (TT.isOSBinFormatELF()) {
-// If dso_local allows AsmPrinter::getSymbolPreferLocal to use a local
-// alias, set the flag. We cannot set dso_local for other global values,
-// because otherwise direct accesses to a probably interposable symbol
(even
-// if the codegen assumes not) will be rejected by the linker.
-if (!GV->canBenefitFromLocalAlias())
- return false;
-return TT.isX86() && M.noSemanticInterposition();
}
// ELF & wasm support preemption of other symbols.
diff --git a/llvm/test/CodeGen/X86/semantic-interposition-comdat.ll
b/llvm/test/CodeGen/X86/semantic-interposition-comdat.ll
deleted file mode 100644
index d11be2d6bd0c..
--- a/llvm/test/CodeGen/X86/semantic-interposition-comdat.ll
+++ /dev/null
@@ -1,28 +0,0 @@
-; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck %s
-
-$comdat_func = comdat any
-
-; CHECK-LABEL: func2:
-; CHECK-NOT: .Lfunc2$local
-
-declare void @func()
-
-define hidden void @func2() {
-entry:
- call void @func()
- ret void
-}
-
-; CHECK: comdat_func:
-; CHECK-NOT: .Lcomdat_func$local
-
-define hidden void @comdat_func() comdat {
-entry:
- call void @func()
- ret void
-}
-
-!ll
[llvm-branch-commits] [llvm] 6e9755b - [X86] Refactor AMX test case, remove unnecessary code.
Author: Luo, Yuanke
Date: 2020-12-30T15:40:20+08:00
New Revision: 6e9755bb80c8a913626f99905720f981f1027176
URL:
https://github.com/llvm/llvm-project/commit/6e9755bb80c8a913626f99905720f981f1027176
DIFF:
https://github.com/llvm/llvm-project/commit/6e9755bb80c8a913626f99905720f981f1027176.diff
LOG: [X86] Refactor AMX test case, remove unnecessary code.
Differential Revision: https://reviews.llvm.org/D93792
Added:
Modified:
llvm/test/CodeGen/X86/AMX/amx-across-func.ll
llvm/test/CodeGen/X86/AMX/amx-config.ll
llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll
llvm/test/CodeGen/X86/AMX/amx-spill.ll
llvm/test/CodeGen/X86/AMX/amx-type.ll
Removed:
diff --git a/llvm/test/CodeGen/X86/AMX/amx-across-func.ll
b/llvm/test/CodeGen/X86/AMX/amx-across-func.ll
index 84ffe4504c61..b115b3c8c3a8 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-across-func.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-across-func.ll
@@ -1,13 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8
-mattr=+avx512f -verify-machineinstrs | FileCheck %s
-target datalayout =
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-unknown-linux-gnu"
%struct.__tile_str = type <{ i16, i16, [60 x i8], <256 x i32> }>
@buf = dso_local global [3072 x i8] zeroinitializer, align 16
-define dso_local void @test_api(i16 signext %0, i16 signext %1)
local_unnamed_addr #2 {
+define dso_local void @test_api(i16 signext %0, i16 signext %1)
local_unnamed_addr {
; CHECK-LABEL: test_api:
; CHECK: # %bb.0:
; CHECK-NEXT:pushq %rbp
@@ -71,21 +69,17 @@ define dso_local void @test_api(i16 signext %0, i16 signext
%1) local_unnamed_ad
; CHECK-NEXT:.cfi_def_cfa_offset 8
; CHECK-NEXT:tilerelease
; CHECK-NEXT:retq
- %3 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %0, i16 8, i8*
getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 0), i64 32)
#4
- %4 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %1, i8*
getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 1024), i64
32) #4
- tail call void (...) @foo() #4
- %5 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %0, i16 %1, i8*
getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64
32) #4
- %6 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %0, i16 %1, i16 8,
x86_amx %5, x86_amx %3, x86_amx %4) #4
- tail call void @llvm.x86.tilestored64.internal(i16 %0, i16 %1, i8*
getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64
32, x86_amx %6) #4
+ %3 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %0, i16 8, i8*
getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 0), i64 32)
+ %4 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %1, i8*
getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 1024), i64
32)
+ tail call void (...) @foo()
+ %5 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %0, i16 %1, i8*
getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64
32)
+ %6 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %0, i16 %1, i16 8,
x86_amx %5, x86_amx %3, x86_amx %4)
+ tail call void @llvm.x86.tilestored64.internal(i16 %0, i16 %1, i8*
getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64
32, x86_amx %6)
ret void
}
-declare dso_local void @foo(...) local_unnamed_addr #3
+declare dso_local void @foo(...) local_unnamed_addr
-declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, i8*, i64) #4
-declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx,
x86_amx) #4
-declare void @llvm.x86.tilestored64.internal(i16, i16, i8*, i64, x86_amx) #4
-
-attributes #2 = { nounwind uwtable
"correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false"
"frame-pointer"="none" "less-precise-fpmad"="false"
"min-legal-vector-width"="8192" "no-infs-fp-math"="false"
"no-jump-tables"="false" "no-nans-fp-math"="false"
"no-signed-zeros-fp-math"="false" "no-trapping-math"="true"
"stack-protector-buffer-size"="8" "target-cpu"="x86-64"
"target-features"="+amx-int8,+amx-tile,+cx8,+fxsr,+mmx,+sse,+sse2,+x87"
"tune-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" }
-attributes #3 = { "correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "frame-pointer"="none"
"less-precise-fpmad"="false" "no-infs-fp-math"="false"
"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"
"no-trapping-math"="true" "stack-protector-buffer-size"="8"
"target-cpu"="x86-64"
"target-features"="+amx-int8,+amx-tile,+cx8,+fxsr,+mmx,+sse,+sse2,+x87"
"tune-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" }
-attributes #4 = { nounwind }
+declare x86_amx @llvm.x86.tileloa
