[llvm-branch-commits] [mlir] [mlir][Transforms] Support `replaceAllUsesWith` in dialect conversion (PR #84725)

[Matthias Springer via llvm-branch-commits]

https://github.com/matthias-springer created 
https://github.com/llvm/llvm-project/pull/84725

This commit adds support for `RewriterBase::replaceAllUsesWith` to the dialect 
conversion. Uses are not immediately replaced, but in a delayed fashion during 
the "commit" phase. No type conversions are performed; this is consistent with 
`ConversionPatternRewriter::replaceUsesOfBlockArgument`.

- `RewriterBase::replaceAllUsesWith` is now virtual, so that it can be 
overridden in the dialect conversion. Note: `RewriterBase::replaceOp` can now 
be turned into a non-virtual function in a follow-up commit.
- `ConversionPatternRewriter::replaceUsesOfBlockArgument` is generalized to 
`ConversionPatternRewriter::replaceAllUsesWith`, following the same 
implementation strategy.
- A new kind of "IR rewrite" is added: `ValueRewrite` with 
`ReplaceAllUsesRewrite` (replacing `ReplaceBlockArgRewrite`) as the only value 
rewrite for now.
- `replacedOps` is renamed to `erasedOps` to better capture its meaning.


>From 15c5ef4723628eae7dbfc1f1738a69f641dd5cc8 Mon Sep 17 00:00:00 2001
From: Matthias Springer 
Date: Mon, 11 Mar 2024 07:31:49 +
Subject: [PATCH] [mlir][Transforms] Support `replaceAllUsesWith` in dialect
 conversion

This commit adds support for `RewriterBase::replaceAllUsesWith` to the dialect 
conversion. Uses are not immediately replaced, but in a delayed fashion during 
the "commit" phase. No type conversions are performed; this is consistent with 
`ConversionPatternRewriter::replaceUsesOfBlockArgument`.

- `RewriterBase::replaceAllUsesWith` is now virtual, so that it can be 
overridden in the dialect conversion. Note: `RewriterBase::replaceOp` can now 
be turned into a non-virtual function in a follow-up commit.
- `ConversionPatternRewriter::replaceUsesOfBlockArgument` is generalized to 
`ConversionPatternRewriter::replaceAllUsesWith`, following the same 
implementation strategy.
- A new kind of "IR rewrite" is added: `ValueRewrite` with 
`ReplaceAllUsesRewrite` (replacing `ReplaceBlockArgRewrite`) as the only value 
rewrite for now.
- `replacedOps` is renamed to `erasedOps` to better capture its meaning.

BEGIN_PUBLIC
No public commit message needed for presubmit.
END_PUBLIC
---
 mlir/include/mlir/IR/PatternMatch.h   |   2 +-
 .../mlir/Transforms/DialectConversion.h   |   8 +-
 mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp |   2 +-
 .../Conversion/GPUCommon/GPUOpsLowering.cpp   |   2 +-
 .../Transforms/Utils/DialectConversion.cpp| 209 ++
 mlir/test/Transforms/test-legalizer.mlir  |  18 ++
 mlir/test/lib/Dialect/Test/TestOps.td |   1 +
 mlir/test/lib/Dialect/Test/TestPatterns.cpp   |  27 ++-
 8 files changed, 172 insertions(+), 97 deletions(-)

diff --git a/mlir/include/mlir/IR/PatternMatch.h 
b/mlir/include/mlir/IR/PatternMatch.h
index 2be1e2e2b40276..3e11e00b9d4b40 100644
--- a/mlir/include/mlir/IR/PatternMatch.h
+++ b/mlir/include/mlir/IR/PatternMatch.h
@@ -614,7 +614,7 @@ class RewriterBase : public OpBuilder {
 
   /// Find uses of `from` and replace them with `to`. Also notify the listener
   /// about every in-place op modification (for every use that was replaced).
-  void replaceAllUsesWith(Value from, Value to) {
+  virtual void replaceAllUsesWith(Value from, Value to) {
 for (OpOperand &operand : llvm::make_early_inc_range(from.getUses())) {
   Operation *op = operand.getOwner();
   modifyOpInPlace(op, [&]() { operand.set(to); });
diff --git a/mlir/include/mlir/Transforms/DialectConversion.h 
b/mlir/include/mlir/Transforms/DialectConversion.h
index 83198c9b0db545..1797ee0876e437 100644
--- a/mlir/include/mlir/Transforms/DialectConversion.h
+++ b/mlir/include/mlir/Transforms/DialectConversion.h
@@ -697,9 +697,6 @@ class ConversionPatternRewriter final : public 
PatternRewriter {
   Region *region, const TypeConverter &converter,
   ArrayRef blockConversions);
 
-  /// Replace all the uses of the block argument `from` with value `to`.
-  void replaceUsesOfBlockArgument(BlockArgument from, Value to);
-
   /// Return the converted value of 'key' with a type defined by the type
   /// converter of the currently executing pattern. Return nullptr in the case
   /// of failure, the remapped value otherwise.
@@ -720,6 +717,11 @@ class ConversionPatternRewriter final : public 
PatternRewriter {
   /// patterns even if a failure is encountered during the rewrite step.
   bool canRecoverFromRewriteFailure() const override { return true; }
 
+  /// Find uses of `from` and replace them with `to`.
+  ///
+  /// Note: This function does not convert types.
+  void replaceAllUsesWith(Value from, Value to) override;
+
   /// PatternRewriter hook for replacing an operation.
   void replaceOp(Operation *op, ValueRange newValues) override;
 
diff --git a/mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp 
b/mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
index 53b44aa3241bb1..d7ed9a196e8938 100644
--- a/mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
+++ b/mlir/

[llvm-branch-commits] [mlir] [mlir][Transforms] Support `replaceAllUsesWith` in dialect conversion (PR #84725)

[via llvm-branch-commits]

llvmbot wrote:



@llvm/pr-subscribers-mlir

@llvm/pr-subscribers-mlir-core

Author: Matthias Springer (matthias-springer)


Changes

This commit adds support for `RewriterBase::replaceAllUsesWith` to the dialect 
conversion. Uses are not immediately replaced, but in a delayed fashion during 
the "commit" phase. No type conversions are performed; this is consistent with 
`ConversionPatternRewriter::replaceUsesOfBlockArgument`.

- `RewriterBase::replaceAllUsesWith` is now virtual, so that it can be 
overridden in the dialect conversion. Note: `RewriterBase::replaceOp` can now 
be turned into a non-virtual function in a follow-up commit.
- `ConversionPatternRewriter::replaceUsesOfBlockArgument` is generalized to 
`ConversionPatternRewriter::replaceAllUsesWith`, following the same 
implementation strategy.
- A new kind of "IR rewrite" is added: `ValueRewrite` with 
`ReplaceAllUsesRewrite` (replacing `ReplaceBlockArgRewrite`) as the only value 
rewrite for now.
- `replacedOps` is renamed to `erasedOps` to better capture its meaning.


---

Patch is 25.74 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/84725.diff


8 Files Affected:

- (modified) mlir/include/mlir/IR/PatternMatch.h (+1-1) 
- (modified) mlir/include/mlir/Transforms/DialectConversion.h (+5-3) 
- (modified) mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp (+1-1) 
- (modified) mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp (+1-1) 
- (modified) mlir/lib/Transforms/Utils/DialectConversion.cpp (+121-88) 
- (modified) mlir/test/Transforms/test-legalizer.mlir (+18) 
- (modified) mlir/test/lib/Dialect/Test/TestOps.td (+1) 
- (modified) mlir/test/lib/Dialect/Test/TestPatterns.cpp (+24-3) 


``diff
diff --git a/mlir/include/mlir/IR/PatternMatch.h 
b/mlir/include/mlir/IR/PatternMatch.h
index 2be1e2e2b40276..3e11e00b9d4b40 100644
--- a/mlir/include/mlir/IR/PatternMatch.h
+++ b/mlir/include/mlir/IR/PatternMatch.h
@@ -614,7 +614,7 @@ class RewriterBase : public OpBuilder {
 
   /// Find uses of `from` and replace them with `to`. Also notify the listener
   /// about every in-place op modification (for every use that was replaced).
-  void replaceAllUsesWith(Value from, Value to) {
+  virtual void replaceAllUsesWith(Value from, Value to) {
 for (OpOperand &operand : llvm::make_early_inc_range(from.getUses())) {
   Operation *op = operand.getOwner();
   modifyOpInPlace(op, [&]() { operand.set(to); });
diff --git a/mlir/include/mlir/Transforms/DialectConversion.h 
b/mlir/include/mlir/Transforms/DialectConversion.h
index 83198c9b0db545..1797ee0876e437 100644
--- a/mlir/include/mlir/Transforms/DialectConversion.h
+++ b/mlir/include/mlir/Transforms/DialectConversion.h
@@ -697,9 +697,6 @@ class ConversionPatternRewriter final : public 
PatternRewriter {
   Region *region, const TypeConverter &converter,
   ArrayRef blockConversions);
 
-  /// Replace all the uses of the block argument `from` with value `to`.
-  void replaceUsesOfBlockArgument(BlockArgument from, Value to);
-
   /// Return the converted value of 'key' with a type defined by the type
   /// converter of the currently executing pattern. Return nullptr in the case
   /// of failure, the remapped value otherwise.
@@ -720,6 +717,11 @@ class ConversionPatternRewriter final : public 
PatternRewriter {
   /// patterns even if a failure is encountered during the rewrite step.
   bool canRecoverFromRewriteFailure() const override { return true; }
 
+  /// Find uses of `from` and replace them with `to`.
+  ///
+  /// Note: This function does not convert types.
+  void replaceAllUsesWith(Value from, Value to) override;
+
   /// PatternRewriter hook for replacing an operation.
   void replaceOp(Operation *op, ValueRange newValues) override;
 
diff --git a/mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp 
b/mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
index 53b44aa3241bb1..d7ed9a196e8938 100644
--- a/mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
+++ b/mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
@@ -310,7 +310,7 @@ static void modifyFuncOpToUseBarePtrCallingConv(
 Location loc = funcOp.getLoc();
 auto placeholder = rewriter.create(
 loc, typeConverter.convertType(memrefTy));
-rewriter.replaceUsesOfBlockArgument(arg, placeholder);
+rewriter.replaceAllUsesWith(arg, placeholder);
 
 Value desc = MemRefDescriptor::fromStaticShape(rewriter, loc, 
typeConverter,
memrefTy, arg);
diff --git a/mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp 
b/mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
index 73d418cb841327..c6d2ddac9dbb19 100644
--- a/mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
+++ b/mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
@@ -201,7 +201,7 @@ GPUFuncOpLowering::matchAndRewrite(gpu::GPUFuncOp 
gpuFuncOp, OpAdaptor adaptor,
   llvmFuncOp.getBody().getArgument(remapping->inputNo);
   auto placeholder = rewriter.create(
   loc, getTypeConv

[llvm-branch-commits] [llvm] release/18.x: [Mips] Fix missing sign extension in expansion of sub-word atomic max (#77072) (PR #84566)

[Brad Smith via llvm-branch-commits]

brad0 wrote:

@topperc 

https://github.com/llvm/llvm-project/pull/84566
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[llvm-branch-commits] [llvm] release/18.x: MIPS: fix emitDirectiveCpsetup on N32 (#80534) (PR #83198)

[Brad Smith via llvm-branch-commits]

https://github.com/brad0 approved this pull request.


https://github.com/llvm/llvm-project/pull/83198
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[llvm-branch-commits] [mlir] [mlir][IR][NFC] Make `replaceAllUsesWith` non-templatized (PR #84722)

[Ingo Müller via llvm-branch-commits]

https://github.com/ingomueller-net approved this pull request.

Yeah, makes sense. I have contemplated that possibility already [when I added 
the templated version](https://reviews.llvm.org/D142525#4079227).

https://github.com/llvm/llvm-project/pull/84722
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[llvm-branch-commits] [clang] [lld] [llvm] SystemZ release notes for 18.x. (PR #84560)

[Ulrich Weigand via llvm-branch-commits]

uweigand wrote:

Thanks @JonPsson1 !   In addition, I see the following user-visible changes:
- Support -munaligned-symbols command line option
- Support SystemZ target in llvm-objcopy
- Support OpenMP library on SystemZ

Can you add those as well?

https://github.com/llvm/llvm-project/pull/84560
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[llvm-branch-commits] [llvm] release/18.x: [X86] combineAndShuffleNot - ensure the type is legal before create X86ISD::ANDNP target nodes (PR #84698)

[Phoebe Wang via llvm-branch-commits]

phoebewang wrote:

LGTM.

https://github.com/llvm/llvm-project/pull/84698
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[llvm-branch-commits] [llvm] 2e66a2a - Revert "[RemoveDIs] Add additional debug-mode verifier checks (#84308)"

[via llvm-branch-commits]

Author: Orlando Cazalet-Hyams
Date: 2024-03-11T13:09:18Z
New Revision: 2e66a2ac2edcfb0fa6059f6bed090c16f10be5c0

URL: 
https://github.com/llvm/llvm-project/commit/2e66a2ac2edcfb0fa6059f6bed090c16f10be5c0
DIFF: 
https://github.com/llvm/llvm-project/commit/2e66a2ac2edcfb0fa6059f6bed090c16f10be5c0.diff

LOG: Revert "[RemoveDIs] Add additional debug-mode verifier checks (#84308)"

This reverts commit a84eb244129f288d609307ad42ab5e6c8e1cc795.

Added: 


Modified: 
llvm/lib/IR/Verifier.cpp

Removed: 




diff  --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index 0e6c01802cfb8c..ce090c3b8a7444 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -2691,11 +2691,6 @@ void Verifier::visitFunction(const Function &F) {
   Check(verifyAttributeCount(Attrs, FT->getNumParams()),
 "Attribute after last parameter!", &F);
 
-  CheckDI(F.IsNewDbgInfoFormat == F.getParent()->IsNewDbgInfoFormat,
-  "Function debug format should match parent module", &F,
-  F.IsNewDbgInfoFormat, F.getParent(),
-  F.getParent()->IsNewDbgInfoFormat);
-
   bool IsIntrinsic = F.isIntrinsic();
 
   // Check function attributes.
@@ -3039,11 +3034,6 @@ void Verifier::visitBasicBlock(BasicBlock &BB) {
 Check(I.getParent() == &BB, "Instruction has bogus parent pointer!");
   }
 
-  CheckDI(BB.IsNewDbgInfoFormat == BB.getParent()->IsNewDbgInfoFormat,
-  "BB debug format should match parent function", &BB,
-  BB.IsNewDbgInfoFormat, BB.getParent(),
-  BB.getParent()->IsNewDbgInfoFormat);
-
   // Confirm that no issues arise from the debug program.
   if (BB.IsNewDbgInfoFormat)
 CheckDI(!BB.getTrailingDPValues(), "Basic Block has trailing DbgRecords!",



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[llvm-branch-commits] [clang] [lld] [llvm] [openmp] SystemZ release notes for 18.x. (PR #84560)

[Jonas Paulsson via llvm-branch-commits]

https://github.com/JonPsson1 updated 
https://github.com/llvm/llvm-project/pull/84560

>From 639dceb13cf824e3f4e0f627becf8fb8f5ecb29c Mon Sep 17 00:00:00 2001
From: Jonas Paulsson 
Date: Fri, 8 Mar 2024 15:28:56 -0500
Subject: [PATCH 1/2] SystemZ release notes.

---
 clang/docs/ReleaseNotes.rst |  5 +
 lld/docs/ReleaseNotes.rst   |  5 +
 llvm/docs/ReleaseNotes.rst  | 10 ++
 3 files changed, 20 insertions(+)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index fc27297aea2d6c..6a038ed4b635c7 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -1325,6 +1325,11 @@ AIX Support
   or newer. Similar to the LTO support on AIX, ThinLTO is implemented with
   the libLTO.so plugin.
 
+SystemZ Support
+^^^
+- Properly support 16 byte atomic int/fp types and ops. Atomic __int128 (and
+  long double) variables are now aligned to 16 bytes by default (like gcc 14).
+
 WebAssembly Support
 ^^^
 
diff --git a/lld/docs/ReleaseNotes.rst b/lld/docs/ReleaseNotes.rst
index 56ba3463aeadc0..6ada711a20a6da 100644
--- a/lld/docs/ReleaseNotes.rst
+++ b/lld/docs/ReleaseNotes.rst
@@ -163,5 +163,10 @@ WebAssembly Improvements
   is read from object files within the archive.  This matches the behaviour of
   the ELF linker.
 
+SystemZ
+---
+
+* Add target support for SystemZ (s390x).
+
 Fixes
 #
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 5b3210138f2f89..7cfa83fc8b0565 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -215,6 +215,16 @@ Changes to the RISC-V Backend
 * ``-mcpu=sifive-p670`` was added.
 * Support for the Zicond extension is no longer experimental.
 
+Changes to the SystemZ Backend
+--
+
+* Properly support 16 byte atomic int/fp types and ops.
+* Support i128 as legal type in VRs.
+* Add an i128 cost model.
+* Support building individual functions with backchain using the
+  __attribute__((target("backchain"))) syntax.
+* Add exception handling for XPLINK.
+
 Changes to the WebAssembly Backend
 --
 

>From 1588c515a1dfddbf9f6e1b8e67f4500aba22ee92 Mon Sep 17 00:00:00 2001
From: Jonas Paulsson 
Date: Mon, 11 Mar 2024 09:28:14 -0400
Subject: [PATCH 2/2] llvm-objcopy and openmp release notes

---
 llvm/docs/ReleaseNotes.rst   | 1 +
 openmp/docs/ReleaseNotes.rst | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 7cfa83fc8b0565..27d305d36199e7 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -224,6 +224,7 @@ Changes to the SystemZ Backend
 * Support building individual functions with backchain using the
   __attribute__((target("backchain"))) syntax.
 * Add exception handling for XPLINK.
+* Add support for llvm-objcopy.
 
 Changes to the WebAssembly Backend
 --
diff --git a/openmp/docs/ReleaseNotes.rst b/openmp/docs/ReleaseNotes.rst
index 3eeaf5c900d800..a5b39f61b0b64c 100644
--- a/openmp/docs/ReleaseNotes.rst
+++ b/openmp/docs/ReleaseNotes.rst
@@ -19,3 +19,5 @@ from the `LLVM releases web site 
`_.
 
 Non-comprehensive list of changes in this release
 =
+
+* SystemZ support added.

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[llvm-branch-commits] [clang] [lld] [llvm] [openmp] SystemZ release notes for 18.x. (PR #84560)

[Jonas Paulsson via llvm-branch-commits]

JonPsson1 wrote:

Looks like https://github.com/llvm/llvm-project/pull/73511 "munaligned-symbols" 
34dd8ec never made it into the 18-release branch... 

https://github.com/llvm/llvm-project/pull/84560
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[llvm-branch-commits] [clang] [lld] [llvm] [openmp] SystemZ release notes for 18.x. (PR #84560)

[Ulrich Weigand via llvm-branch-commits]

uweigand wrote:

> Looks like #73511 "munaligned-symbols" 34dd8ec never made it into the 
> 18-release branch...

Ah OK, I had missed that.

https://github.com/llvm/llvm-project/pull/84560
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[llvm-branch-commits] [clang] [lld] [llvm] [openmp] SystemZ release notes for 18.x. (PR #84560)

[Ulrich Weigand via llvm-branch-commits]

https://github.com/uweigand approved this pull request.

LGTM, thanks!

https://github.com/llvm/llvm-project/pull/84560
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[llvm-branch-commits] [llvm] Lld mac fix (PR #84764)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar created 
https://github.com/llvm/llvm-project/pull/84764

None

>From 2ddb32b50752ca91ca9946cb9c9ea3d92c8616d0 Mon Sep 17 00:00:00 2001
From: Tom Stellard 
Date: Sat, 9 Mar 2024 14:26:47 -0800
Subject: [PATCH 1/2] Bump version to 18.1.2

---
 llvm/CMakeLists.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
index ddf95cbc6c5175..c5fa66390bba8d 100644
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -22,7 +22,7 @@ if(NOT DEFINED LLVM_VERSION_MINOR)
   set(LLVM_VERSION_MINOR 1)
 endif()
 if(NOT DEFINED LLVM_VERSION_PATCH)
-  set(LLVM_VERSION_PATCH 1)
+  set(LLVM_VERSION_PATCH 2)
 endif()
 if(NOT DEFINED LLVM_VERSION_SUFFIX)
   set(LLVM_VERSION_SUFFIX)

>From 57acd9c5beb3f8dd9cfedac38dca6fd66e68fb2e Mon Sep 17 00:00:00 2001
From: Tom Stellard 
Date: Mon, 11 Mar 2024 07:28:58 -0700
Subject: [PATCH 2/2] workflows: Add workaround for lld failures on MacOS

See #81967
---
 .github/workflows/llvm-project-tests.yml | 5 +
 1 file changed, 5 insertions(+)

diff --git a/.github/workflows/llvm-project-tests.yml 
b/.github/workflows/llvm-project-tests.yml
index 43b90193406fc9..5b28aed576641b 100644
--- a/.github/workflows/llvm-project-tests.yml
+++ b/.github/workflows/llvm-project-tests.yml
@@ -118,6 +118,11 @@ jobs:
   else
 builddir="$(pwd)"/build
   fi
+  if [ "${{ runner.os }}" == "MacOS" ]; then
+# Workaround test failure on some lld tests on MacOS
+# https://github.com/llvm/llvm-project/issues/81967
+extra_cmake_args="LLVM_DISABLE_ASSEMBLY_FILES=ON"
+  fi
   echo "llvm-builddir=$builddir" >> "$GITHUB_OUTPUT"
   cmake -G Ninja \
 -B "$builddir" \

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[llvm-branch-commits] [llvm] 2ad8fbd - Bump version to 18.1.2 (#84655)

[via llvm-branch-commits]

Author: Tom Stellard
Date: 2024-03-11T07:31:28-07:00
New Revision: 2ad8fbdbca06843db18f450c8a141d6e022d20b5

URL: 
https://github.com/llvm/llvm-project/commit/2ad8fbdbca06843db18f450c8a141d6e022d20b5
DIFF: 
https://github.com/llvm/llvm-project/commit/2ad8fbdbca06843db18f450c8a141d6e022d20b5.diff

LOG: Bump version to 18.1.2 (#84655)

Added: 


Modified: 
llvm/CMakeLists.txt

Removed: 




diff  --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
index ddf95cbc6c5175..c5fa66390bba8d 100644
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -22,7 +22,7 @@ if(NOT DEFINED LLVM_VERSION_MINOR)
   set(LLVM_VERSION_MINOR 1)
 endif()
 if(NOT DEFINED LLVM_VERSION_PATCH)
-  set(LLVM_VERSION_PATCH 1)
+  set(LLVM_VERSION_PATCH 2)
 endif()
 if(NOT DEFINED LLVM_VERSION_SUFFIX)
   set(LLVM_VERSION_SUFFIX)



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[llvm-branch-commits] [llvm] Lld mac fix (PR #84764)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-github-workflow

Author: Tom Stellard (tstellar)


Changes



---
Full diff: https://github.com/llvm/llvm-project/pull/84764.diff


2 Files Affected:

- (modified) .github/workflows/llvm-project-tests.yml (+5) 
- (modified) llvm/CMakeLists.txt (+1-1) 


``diff
diff --git a/.github/workflows/llvm-project-tests.yml 
b/.github/workflows/llvm-project-tests.yml
index 43b90193406fc9..5b28aed576641b 100644
--- a/.github/workflows/llvm-project-tests.yml
+++ b/.github/workflows/llvm-project-tests.yml
@@ -118,6 +118,11 @@ jobs:
   else
 builddir="$(pwd)"/build
   fi
+  if [ "${{ runner.os }}" == "MacOS" ]; then
+# Workaround test failure on some lld tests on MacOS
+# https://github.com/llvm/llvm-project/issues/81967
+extra_cmake_args="LLVM_DISABLE_ASSEMBLY_FILES=ON"
+  fi
   echo "llvm-builddir=$builddir" >> "$GITHUB_OUTPUT"
   cmake -G Ninja \
 -B "$builddir" \
diff --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
index ddf95cbc6c5175..c5fa66390bba8d 100644
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -22,7 +22,7 @@ if(NOT DEFINED LLVM_VERSION_MINOR)
   set(LLVM_VERSION_MINOR 1)
 endif()
 if(NOT DEFINED LLVM_VERSION_PATCH)
-  set(LLVM_VERSION_PATCH 1)
+  set(LLVM_VERSION_PATCH 2)
 endif()
 if(NOT DEFINED LLVM_VERSION_SUFFIX)
   set(LLVM_VERSION_SUFFIX)

``




https://github.com/llvm/llvm-project/pull/84764
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[llvm-branch-commits] [llvm] Bump version to 18.1.2 (PR #84655)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/84655
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[llvm-branch-commits] [clang] [lld] [llvm] [openmp] SystemZ release notes for 18.x. (PR #84560)

[Jonas Paulsson via llvm-branch-commits]

https://github.com/JonPsson1 updated 
https://github.com/llvm/llvm-project/pull/84560

>From a4534dec8267040d1dc6ab887a20893e302b7300 Mon Sep 17 00:00:00 2001
From: Jonas Paulsson 
Date: Fri, 8 Mar 2024 15:28:56 -0500
Subject: [PATCH] SystemZ release notes. llvm-objcopy and openmp release notes

---
 clang/docs/ReleaseNotes.rst  |  5 +
 lld/docs/ReleaseNotes.rst|  5 +
 llvm/docs/ReleaseNotes.rst   | 11 +++
 openmp/docs/ReleaseNotes.rst |  2 ++
 4 files changed, 23 insertions(+)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index fc27297aea2d6c..6a038ed4b635c7 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -1325,6 +1325,11 @@ AIX Support
   or newer. Similar to the LTO support on AIX, ThinLTO is implemented with
   the libLTO.so plugin.
 
+SystemZ Support
+^^^
+- Properly support 16 byte atomic int/fp types and ops. Atomic __int128 (and
+  long double) variables are now aligned to 16 bytes by default (like gcc 14).
+
 WebAssembly Support
 ^^^
 
diff --git a/lld/docs/ReleaseNotes.rst b/lld/docs/ReleaseNotes.rst
index 56ba3463aeadc0..6ada711a20a6da 100644
--- a/lld/docs/ReleaseNotes.rst
+++ b/lld/docs/ReleaseNotes.rst
@@ -163,5 +163,10 @@ WebAssembly Improvements
   is read from object files within the archive.  This matches the behaviour of
   the ELF linker.
 
+SystemZ
+---
+
+* Add target support for SystemZ (s390x).
+
 Fixes
 #
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 5b3210138f2f89..27d305d36199e7 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -215,6 +215,17 @@ Changes to the RISC-V Backend
 * ``-mcpu=sifive-p670`` was added.
 * Support for the Zicond extension is no longer experimental.
 
+Changes to the SystemZ Backend
+--
+
+* Properly support 16 byte atomic int/fp types and ops.
+* Support i128 as legal type in VRs.
+* Add an i128 cost model.
+* Support building individual functions with backchain using the
+  __attribute__((target("backchain"))) syntax.
+* Add exception handling for XPLINK.
+* Add support for llvm-objcopy.
+
 Changes to the WebAssembly Backend
 --
 
diff --git a/openmp/docs/ReleaseNotes.rst b/openmp/docs/ReleaseNotes.rst
index 3eeaf5c900d800..a5b39f61b0b64c 100644
--- a/openmp/docs/ReleaseNotes.rst
+++ b/openmp/docs/ReleaseNotes.rst
@@ -19,3 +19,5 @@ from the `LLVM releases web site 
`_.
 
 Non-comprehensive list of changes in this release
 =
+
+* SystemZ support added.

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[llvm-branch-commits] [clang] [lld] [llvm] [openmp] SystemZ release notes for 18.x. (PR #84560)

[Jonas Paulsson via llvm-branch-commits]

https://github.com/JonPsson1 updated 
https://github.com/llvm/llvm-project/pull/84560

>From a4534dec8267040d1dc6ab887a20893e302b7300 Mon Sep 17 00:00:00 2001
From: Jonas Paulsson 
Date: Fri, 8 Mar 2024 15:28:56 -0500
Subject: [PATCH] SystemZ release notes. llvm-objcopy and openmp release notes

---
 clang/docs/ReleaseNotes.rst  |  5 +
 lld/docs/ReleaseNotes.rst|  5 +
 llvm/docs/ReleaseNotes.rst   | 11 +++
 openmp/docs/ReleaseNotes.rst |  2 ++
 4 files changed, 23 insertions(+)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index fc27297aea2d6c..6a038ed4b635c7 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -1325,6 +1325,11 @@ AIX Support
   or newer. Similar to the LTO support on AIX, ThinLTO is implemented with
   the libLTO.so plugin.
 
+SystemZ Support
+^^^
+- Properly support 16 byte atomic int/fp types and ops. Atomic __int128 (and
+  long double) variables are now aligned to 16 bytes by default (like gcc 14).
+
 WebAssembly Support
 ^^^
 
diff --git a/lld/docs/ReleaseNotes.rst b/lld/docs/ReleaseNotes.rst
index 56ba3463aeadc0..6ada711a20a6da 100644
--- a/lld/docs/ReleaseNotes.rst
+++ b/lld/docs/ReleaseNotes.rst
@@ -163,5 +163,10 @@ WebAssembly Improvements
   is read from object files within the archive.  This matches the behaviour of
   the ELF linker.
 
+SystemZ
+---
+
+* Add target support for SystemZ (s390x).
+
 Fixes
 #
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 5b3210138f2f89..27d305d36199e7 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -215,6 +215,17 @@ Changes to the RISC-V Backend
 * ``-mcpu=sifive-p670`` was added.
 * Support for the Zicond extension is no longer experimental.
 
+Changes to the SystemZ Backend
+--
+
+* Properly support 16 byte atomic int/fp types and ops.
+* Support i128 as legal type in VRs.
+* Add an i128 cost model.
+* Support building individual functions with backchain using the
+  __attribute__((target("backchain"))) syntax.
+* Add exception handling for XPLINK.
+* Add support for llvm-objcopy.
+
 Changes to the WebAssembly Backend
 --
 
diff --git a/openmp/docs/ReleaseNotes.rst b/openmp/docs/ReleaseNotes.rst
index 3eeaf5c900d800..a5b39f61b0b64c 100644
--- a/openmp/docs/ReleaseNotes.rst
+++ b/openmp/docs/ReleaseNotes.rst
@@ -19,3 +19,5 @@ from the `LLVM releases web site 
`_.
 
 Non-comprehensive list of changes in this release
 =
+
+* SystemZ support added.

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[llvm-branch-commits] [clang] [lld] [llvm] [openmp] SystemZ release notes for 18.x. (PR #84560)

[Jonas Paulsson via llvm-branch-commits]

JonPsson1 wrote:

@tstellar This is intended for the 18-rel branch...



https://github.com/llvm/llvm-project/pull/84560
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[llvm-branch-commits] [llvm][lld][RISCV] Support x3_reg_usage (PR #84598)

[Paul Kirth via llvm-branch-commits]

@@ -1136,11 +1136,35 @@ static void mergeAtomic(DenseMap 
&intAttr,
   };
 }
 
+static void mergeX3RegUse(DenseMap &intAttr,
+  const InputSectionBase *oldSection,
+  const InputSectionBase *newSection,
+  unsigned int oldTag, unsigned int newTag) {
+  // X3/GP register usage ar incompatible and cannot be merged, with the
+  // exception of the UNKNOWN or 0 value
+  using RISCVAttrs::RISCVX3RegUse::X3RegUsage;
+  auto attr = RISCVAttrs::X3_REG_USAGE;
+  if (newTag == X3RegUsage::UNKNOWN)
+return;
+  if (oldTag == X3RegUsage::UNKNOWN) {
+intAttr[attr] = newTag;

ilovepi wrote:

yeah, I think that will work. Let me give that a try.

https://github.com/llvm/llvm-project/pull/84598
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[llvm-branch-commits] [llvm][lld][RISCV] Support x3_reg_usage (PR #84598)

[Paul Kirth via llvm-branch-commits]

@@ -24,6 +24,9 @@
 
 .attribute priv_spec_revision, 0
 # CHECK: attribute  12, 0
+

ilovepi wrote:

Thank you. There is a good chance that is the case.

https://github.com/llvm/llvm-project/pull/84598
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[llvm-branch-commits] [llvm][lld][RISCV] Support x3_reg_usage (PR #84598)

[Paul Kirth via llvm-branch-commits]

ilovepi wrote:

I forgot to mention that I'm still trying to figure out how to add the 
attribute. I know mechanically how, but AFAIK there isn't a target feature or 
anything we set when enabling SCS(except for Zcfiscs), so if there is an 
obvious way, a pointer would be welcome. I think that's something we need to 
set in STI, so I'm looking into changes to allow that.

https://github.com/llvm/llvm-project/pull/84598
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[llvm-branch-commits] [llvm][lld][RISCV] Support x3_reg_usage (PR #84598)

[Paul Kirth via llvm-branch-commits]

@@ -47,6 +48,15 @@ enum AtomicABI : unsigned {
 };
 } // namespace RISCVAtomicAbiTag
 
+namespace RISCVX3RegUse {
+enum X3RegUsage : unsigned {
+  UNKNOWN = 0,
+  GP = 0,

ilovepi wrote:

ugh, you are correct. I haven't tested this properly yet, since I'm not 100% 
sure what the correct way to add the attribute will be. But I'll up date these 
to have the proper values from the psABI.

https://github.com/llvm/llvm-project/pull/84598
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[llvm-branch-commits] [compiler-rt] [sanitizer_symbolizer] Add end to end test for symbolizer markup. (PR #77702)

[Andres Villegas via llvm-branch-commits]

=?utf-8?q?Andrés?= Villegas ,
=?utf-8?q?Andrés?= Villegas ,
=?utf-8?q?Andrés?= Villegas ,
=?utf-8?q?Andrés?= Villegas 
Message-ID:
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https://github.com/avillega updated 
https://github.com/llvm/llvm-project/pull/77702

>From a3220262a3236115d55235e4cc34acc8202268f4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andr=C3=A9s=20Villegas?= 
Date: Wed, 10 Jan 2024 23:56:45 +
Subject: [PATCH 1/5] Fix typo.

Created using spr 1.3.5
---
 .../test/asan/TestCases/use-after-free-symbolizer-markup.cpp| 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp 
b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
index 548ae57b5c3797..323de4ec7a36ed 100644
--- a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
+++ b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
@@ -1,5 +1,5 @@
 // COM: End to end test for the sanitizer symbolizer markup. Since it uses 
debug info
-// COM: to do offline symbolization we only check that the current module 
correctly is correctly symbolized  
+// COM: to do offline symbolization we only check that the current module is 
correctly symbolized  
 // REQUIRES: linux
 // RUN: %clangxx_asan %s -Wl,--build-id=0x12345678 -o %t.main
 // RUN: mkdir -p %t/.build-id/12

>From 29abe012394c582239b257a6a51b833b974743f1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andr=C3=A9s=20Villegas?= 
Date: Thu, 11 Jan 2024 17:25:29 +
Subject: [PATCH 2/5] run git clang-format

Created using spr 1.3.5
---
 .../asan/TestCases/use-after-free-symbolizer-markup.cpp  | 9 -
 compiler-rt/test/tsan/simple_stack_symbolizer_markup.cpp | 6 ++
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git 
a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp 
b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
index 323de4ec7a36ed..8d818217eb5b63 100644
--- a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
+++ b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
@@ -1,5 +1,5 @@
 // COM: End to end test for the sanitizer symbolizer markup. Since it uses 
debug info
-// COM: to do offline symbolization we only check that the current module is 
correctly symbolized  
+// COM: to do offline symbolization we only check that the current module is 
correctly symbolized
 // REQUIRES: linux
 // RUN: %clangxx_asan %s -Wl,--build-id=0x12345678 -o %t.main
 // RUN: mkdir -p %t/.build-id/12
@@ -9,9 +9,8 @@
 
 #include 
 
-[[gnu::noinline]]
-char *alloc() {
-  char *x = (char*)malloc(10 * sizeof(char));
+[[gnu::noinline]] char *alloc() {
+  char *x = (char *)malloc(10 * sizeof(char));
   return x;
 }
 int main() {
@@ -26,7 +25,7 @@ int main() {
 // CHECK: {{0x.* is located 5 bytes inside of 10-byte region .0x.*,0x.*}}
 // CHECK: {{freed by thread T0 here:}}
 // CHECK: {{#1 0x.* main 
.*use-after-free-symbolizer-markup.cpp:}}[[@LINE-9]]
-// CHECK: {{previously allocated by thread T0 here:}} 
+// CHECK: {{previously allocated by thread T0 here:}}
 // CHECK: {{#1 0x.* alloc\(\) 
.*use-after-free-symbolizer-markup.cpp:}}[[@LINE-16]]
 // CHECK: {{#2 0x.* main 
.*use-after-free-symbolizer-markup.cpp:}}[[@LINE-13]]
 // CHECK: Shadow byte legend (one shadow byte represents {{[0-9]+}} 
application bytes):
diff --git a/compiler-rt/test/tsan/simple_stack_symbolizer_markup.cpp 
b/compiler-rt/test/tsan/simple_stack_symbolizer_markup.cpp
index 5798986d73839e..a4f5e0e9d9fe46 100644
--- a/compiler-rt/test/tsan/simple_stack_symbolizer_markup.cpp
+++ b/compiler-rt/test/tsan/simple_stack_symbolizer_markup.cpp
@@ -1,5 +1,5 @@
 // REQUIRES: linux
-// RUN: %clangxx_tsan %s -Wl,--build-id=0x12345678 -O1 -o %t.main 
+// RUN: %clangxx_tsan %s -Wl,--build-id=0x12345678 -O1 -o %t.main
 // RUN: mkdir -p %t/.build-id/12
 // RUN: cp %t.main %t/.build-id/12/345678.debug
 // RUN: %env_tsan_opts=enable_symbolizer_markup=1 %deflake %run %t.main 
>%t/sanitizer.out
@@ -9,9 +9,7 @@
 
 int Global;
 
-void __attribute__((noinline)) foo1() {
-  Global = 42;
-}
+void __attribute__((noinline)) foo1() { Global = 42; }
 
 void __attribute__((noinline)) bar1() {
   volatile int tmp = 42;

>From 2f11f65aadc8411c544f60bd3af29529625bc177 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andr=C3=A9s=20Villegas?= 
Date: Thu, 11 Jan 2024 20:21:04 +
Subject: [PATCH 3/5] Fix review comments

Created using spr 1.3.5
---
 .../use-after-free-symbolizer-markup.cpp  | 32 ++-
 .../tsan/simple_stack_symbolizer_markup.cpp   | 29 +
 2 files changed, 32 insertions(+), 29 deletions(-)

diff --git 
a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp 
b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
index 8d818217eb5b63..2da07892daf6c5 100644
--- a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
+++ b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cp

[llvm-branch-commits] [compiler-rt] [sanitizer_symbolizer] Add end to end test for symbolizer markup. (PR #77702)

[Andres Villegas via llvm-branch-commits]

=?utf-8?q?Andrés?= Villegas ,
=?utf-8?q?Andrés?= Villegas ,
=?utf-8?q?Andrés?= Villegas ,
=?utf-8?q?Andrés?= Villegas 
Message-ID:
In-Reply-To: 


https://github.com/avillega updated 
https://github.com/llvm/llvm-project/pull/77702

>From a3220262a3236115d55235e4cc34acc8202268f4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andr=C3=A9s=20Villegas?= 
Date: Wed, 10 Jan 2024 23:56:45 +
Subject: [PATCH 1/5] Fix typo.

Created using spr 1.3.5
---
 .../test/asan/TestCases/use-after-free-symbolizer-markup.cpp| 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp 
b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
index 548ae57b5c3797..323de4ec7a36ed 100644
--- a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
+++ b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
@@ -1,5 +1,5 @@
 // COM: End to end test for the sanitizer symbolizer markup. Since it uses 
debug info
-// COM: to do offline symbolization we only check that the current module 
correctly is correctly symbolized  
+// COM: to do offline symbolization we only check that the current module is 
correctly symbolized  
 // REQUIRES: linux
 // RUN: %clangxx_asan %s -Wl,--build-id=0x12345678 -o %t.main
 // RUN: mkdir -p %t/.build-id/12

>From 29abe012394c582239b257a6a51b833b974743f1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andr=C3=A9s=20Villegas?= 
Date: Thu, 11 Jan 2024 17:25:29 +
Subject: [PATCH 2/5] run git clang-format

Created using spr 1.3.5
---
 .../asan/TestCases/use-after-free-symbolizer-markup.cpp  | 9 -
 compiler-rt/test/tsan/simple_stack_symbolizer_markup.cpp | 6 ++
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git 
a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp 
b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
index 323de4ec7a36ed..8d818217eb5b63 100644
--- a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
+++ b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
@@ -1,5 +1,5 @@
 // COM: End to end test for the sanitizer symbolizer markup. Since it uses 
debug info
-// COM: to do offline symbolization we only check that the current module is 
correctly symbolized  
+// COM: to do offline symbolization we only check that the current module is 
correctly symbolized
 // REQUIRES: linux
 // RUN: %clangxx_asan %s -Wl,--build-id=0x12345678 -o %t.main
 // RUN: mkdir -p %t/.build-id/12
@@ -9,9 +9,8 @@
 
 #include 
 
-[[gnu::noinline]]
-char *alloc() {
-  char *x = (char*)malloc(10 * sizeof(char));
+[[gnu::noinline]] char *alloc() {
+  char *x = (char *)malloc(10 * sizeof(char));
   return x;
 }
 int main() {
@@ -26,7 +25,7 @@ int main() {
 // CHECK: {{0x.* is located 5 bytes inside of 10-byte region .0x.*,0x.*}}
 // CHECK: {{freed by thread T0 here:}}
 // CHECK: {{#1 0x.* main 
.*use-after-free-symbolizer-markup.cpp:}}[[@LINE-9]]
-// CHECK: {{previously allocated by thread T0 here:}} 
+// CHECK: {{previously allocated by thread T0 here:}}
 // CHECK: {{#1 0x.* alloc\(\) 
.*use-after-free-symbolizer-markup.cpp:}}[[@LINE-16]]
 // CHECK: {{#2 0x.* main 
.*use-after-free-symbolizer-markup.cpp:}}[[@LINE-13]]
 // CHECK: Shadow byte legend (one shadow byte represents {{[0-9]+}} 
application bytes):
diff --git a/compiler-rt/test/tsan/simple_stack_symbolizer_markup.cpp 
b/compiler-rt/test/tsan/simple_stack_symbolizer_markup.cpp
index 5798986d73839e..a4f5e0e9d9fe46 100644
--- a/compiler-rt/test/tsan/simple_stack_symbolizer_markup.cpp
+++ b/compiler-rt/test/tsan/simple_stack_symbolizer_markup.cpp
@@ -1,5 +1,5 @@
 // REQUIRES: linux
-// RUN: %clangxx_tsan %s -Wl,--build-id=0x12345678 -O1 -o %t.main 
+// RUN: %clangxx_tsan %s -Wl,--build-id=0x12345678 -O1 -o %t.main
 // RUN: mkdir -p %t/.build-id/12
 // RUN: cp %t.main %t/.build-id/12/345678.debug
 // RUN: %env_tsan_opts=enable_symbolizer_markup=1 %deflake %run %t.main 
>%t/sanitizer.out
@@ -9,9 +9,7 @@
 
 int Global;
 
-void __attribute__((noinline)) foo1() {
-  Global = 42;
-}
+void __attribute__((noinline)) foo1() { Global = 42; }
 
 void __attribute__((noinline)) bar1() {
   volatile int tmp = 42;

>From 2f11f65aadc8411c544f60bd3af29529625bc177 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andr=C3=A9s=20Villegas?= 
Date: Thu, 11 Jan 2024 20:21:04 +
Subject: [PATCH 3/5] Fix review comments

Created using spr 1.3.5
---
 .../use-after-free-symbolizer-markup.cpp  | 32 ++-
 .../tsan/simple_stack_symbolizer_markup.cpp   | 29 +
 2 files changed, 32 insertions(+), 29 deletions(-)

diff --git 
a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp 
b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
index 8d818217eb5b63..2da07892daf6c5 100644
--- a/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cpp
+++ b/compiler-rt/test/asan/TestCases/use-after-free-symbolizer-markup.cp

[llvm-branch-commits] [llvm] release/18.x: [ARM] Switch to LiveRegUnits to fix r7 register allocation bug (PR #84475)

[via llvm-branch-commits]

https://github.com/AtariDreams updated 
https://github.com/llvm/llvm-project/pull/84475

>From 99ea19e4637a7bec7d6b3b9bc11715e88e50af0a Mon Sep 17 00:00:00 2001
From: Rose 
Date: Fri, 8 Mar 2024 07:59:02 -0500
Subject: [PATCH] [ARM] Switch to LiveRegUnits to fix r7 register allocation
 bug

This fixes a register allocation bug, because while r7 was marked as allowed to 
be used, LivePhysRegs always reported it as unavailable because it is reserved, 
despite this being an exception to the rule.
---
 llvm/lib/Target/ARM/Thumb1FrameLowering.cpp |  6 +++---
 llvm/test/CodeGen/Thumb/PR35481.ll  | 14 ++
 2 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp 
b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
index 0f4ece64bff532..a8cf036f363cdd 100644
--- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
+++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
@@ -612,11 +612,11 @@ bool Thumb1FrameLowering::needPopSpecialFixUp(const 
MachineFunction &MF) const {
 
 static void findTemporariesForLR(const BitVector &GPRsNoLRSP,
  const BitVector &PopFriendly,
- const LivePhysRegs &UsedRegs, unsigned 
&PopReg,
+ const LiveRegUnits &UsedRegs, unsigned 
&PopReg,
  unsigned &TmpReg, MachineRegisterInfo &MRI) {
   PopReg = TmpReg = 0;
   for (auto Reg : GPRsNoLRSP.set_bits()) {
-if (UsedRegs.available(MRI, Reg)) {
+if (UsedRegs.available(Reg)) {
   // Remember the first pop-friendly register and exit.
   if (PopFriendly.test(Reg)) {
 PopReg = Reg;
@@ -684,7 +684,7 @@ bool 
Thumb1FrameLowering::emitPopSpecialFixUp(MachineBasicBlock &MBB,
   // Look for a temporary register to use.
   // First, compute the liveness information.
   const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
-  LivePhysRegs UsedRegs(TRI);
+  LiveRegUnits UsedRegs(TRI);
   UsedRegs.addLiveOuts(MBB);
   // The semantic of pristines changed recently and now,
   // the callee-saved registers that are touched in the function
diff --git a/llvm/test/CodeGen/Thumb/PR35481.ll 
b/llvm/test/CodeGen/Thumb/PR35481.ll
index ad3215ecb94952..e48d1547782caf 100644
--- a/llvm/test/CodeGen/Thumb/PR35481.ll
+++ b/llvm/test/CodeGen/Thumb/PR35481.ll
@@ -18,11 +18,10 @@ define <4 x i32> @f() local_unnamed_addr #0 {
 ; CHECK-V4T-NEXT:movs r2, #3
 ; CHECK-V4T-NEXT:movs r3, #4
 ; CHECK-V4T-NEXT:bl g
+; CHECK-V4T-NEXT:ldr r7, [sp, #4]
+; CHECK-V4T-NEXT:mov lr, r7
 ; CHECK-V4T-NEXT:pop {r7}
-; CHECK-V4T-NEXT:mov r12, r0
-; CHECK-V4T-NEXT:pop {r0}
-; CHECK-V4T-NEXT:mov lr, r0
-; CHECK-V4T-NEXT:mov r0, r12
+; CHECK-V4T-NEXT:add sp, #4
 ; CHECK-V4T-NEXT:bx lr
 ;
 ; CHECK-V8M-LABEL: f:
@@ -36,11 +35,10 @@ define <4 x i32> @f() local_unnamed_addr #0 {
 ; CHECK-V8M-NEXT:movs r1, #2
 ; CHECK-V8M-NEXT:movs r2, #3
 ; CHECK-V8M-NEXT:movs r3, #4
+; CHECK-V8M-NEXT:ldr r7, [sp, #4]
+; CHECK-V8M-NEXT:mov lr, r7
 ; CHECK-V8M-NEXT:pop {r7}
-; CHECK-V8M-NEXT:mov r12, r0
-; CHECK-V8M-NEXT:pop {r0}
-; CHECK-V8M-NEXT:mov lr, r0
-; CHECK-V8M-NEXT:mov r0, r12
+; CHECK-V8M-NEXT:add sp, #4
 ; CHECK-V8M-NEXT:b g
 entry:
   %call = tail call i32 @h(i32 1)

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[llvm-branch-commits] [compiler-rt] [sanitizer_symbolizer] Add end to end test for symbolizer markup. (PR #77702)

[Andres Villegas via llvm-branch-commits]

=?utf-8?q?Andrés?= Villegas ,
=?utf-8?q?Andrés?= Villegas ,
=?utf-8?q?Andrés?= Villegas ,
=?utf-8?q?Andrés?= Villegas 
Message-ID:
In-Reply-To: 


https://github.com/avillega closed 
https://github.com/llvm/llvm-project/pull/77702
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[llvm-branch-commits] [llvm] 7cc43fe - Revert "[CMake][LIT] Add option to run lit testsuites in parallel (#82899)"

[via llvm-branch-commits]

Author: Jeff Niu
Date: 2024-03-11T11:43:54-07:00
New Revision: 7cc43fe37282c8bdf4b1d3de60faa3597c6bcbaa

URL: 
https://github.com/llvm/llvm-project/commit/7cc43fe37282c8bdf4b1d3de60faa3597c6bcbaa
DIFF: 
https://github.com/llvm/llvm-project/commit/7cc43fe37282c8bdf4b1d3de60faa3597c6bcbaa.diff

LOG: Revert "[CMake][LIT] Add option to run lit testsuites in parallel (#82899)"

This reverts commit 782147e82ab3e2d0e22f729ea4e54eeed7b3cb96.

Added: 


Modified: 
llvm/CMakeLists.txt
llvm/cmake/modules/AddLLVM.cmake
llvm/docs/CMake.rst

Removed: 




diff  --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
index d9a17a869acfa0..bd141619d03fd1 100644
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -712,8 +712,6 @@ if(LLVM_INDIVIDUAL_TEST_COVERAGE)
 endif()
 set(LLVM_LIT_ARGS "${LIT_ARGS_DEFAULT}" CACHE STRING "Default options for lit")
 
-option(LLVM_PARALLEL_LIT "Enable multiple lit suites to run in parallel" OFF)
-
 # On Win32 hosts, provide an option to specify the path to the GnuWin32 tools.
 if( WIN32 AND NOT CYGWIN )
   set(LLVM_LIT_TOOLS_DIR "" CACHE PATH "Path to GnuWin32 tools")

diff  --git a/llvm/cmake/modules/AddLLVM.cmake 
b/llvm/cmake/modules/AddLLVM.cmake
index 828de4bd9940d6..374f5e085d9118 100644
--- a/llvm/cmake/modules/AddLLVM.cmake
+++ b/llvm/cmake/modules/AddLLVM.cmake
@@ -1947,18 +1947,11 @@ function(add_lit_target target comment)
 list(APPEND LIT_COMMAND --param ${param})
   endforeach()
   if (ARG_UNPARSED_ARGUMENTS)
-if (LLVM_PARALLEL_LIT)
- add_custom_target(${target}
-   COMMAND ${LIT_COMMAND} ${ARG_UNPARSED_ARGUMENTS}
-   COMMENT "${comment}"
-   )
-else()
- add_custom_target(${target}
-   COMMAND ${LIT_COMMAND} ${ARG_UNPARSED_ARGUMENTS}
-   COMMENT "${comment}"
-   USES_TERMINAL
-   )
-endif()
+add_custom_target(${target}
+  COMMAND ${LIT_COMMAND} ${ARG_UNPARSED_ARGUMENTS}
+  COMMENT "${comment}"
+  USES_TERMINAL
+  )
   else()
 add_custom_target(${target}
   COMMAND ${CMAKE_COMMAND} -E echo "${target} does nothing, no tools 
built.")

diff  --git a/llvm/docs/CMake.rst b/llvm/docs/CMake.rst
index be5da5652e31e3..1490b38feb1eb5 100644
--- a/llvm/docs/CMake.rst
+++ b/llvm/docs/CMake.rst
@@ -762,12 +762,6 @@ enabled sub-projects. Nearly all of these variable names 
begin with
 **LLVM_PARALLEL_LINK_JOBS**:STRING
   Define the maximum number of concurrent link jobs.
 
-**LLVM_PARALLEL_LIT**:BOOL
-  Defaults to ``OFF``. If set to ``OFF``, lit testsuites will be configured
-  with CMake's ``USES_TERMINAL`` flag to give direct access to the terminal. If
-  set to ``ON``, that flag will be removed allowing Ninja to schedule multiple
-  lit testsuites in parallel.
-
 **LLVM_RAM_PER_COMPILE_JOB**:STRING
   Calculates the amount of Ninja compile jobs according to available resources.
   Value has to be in MB, overwrites LLVM_PARALLEL_COMPILE_JOBS. Compile jobs 



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[llvm-branch-commits] [clang] release/18.x: [ObjC] Check entire chain of superclasses to determine class layout (PR #84093)

[via llvm-branch-commits]

https://github.com/AtariDreams updated 
https://github.com/llvm/llvm-project/pull/84093

>From 78cded152725359c8b51845c3b183528ae9d33ec Mon Sep 17 00:00:00 2001
From: Rose 
Date: Tue, 5 Mar 2024 18:36:03 -0500
Subject: [PATCH] [ObjC] Check entire chain of superclasses to see if class
 layout is statically known

As of now, we only check if a class directly inherits from NSObject to 
determine if said class has fixed offsets and can therefore have its memory 
layout statically known.

However, if an NSObject subclass has fixed offsets, then so must the subclasses 
of that subclass, so this allows us to optimize instances of subclasses of 
subclasses that inherit from NSObject and so on.

To determine this, we need to find that the compiler can see the implementation 
of each intermediate class, as that means it is statically linked.
---
 clang/lib/CodeGen/CGObjCMac.cpp   |  20 ++--
 .../constant-non-fragile-ivar-offset.m| 102 ++
 2 files changed, 116 insertions(+), 6 deletions(-)

diff --git a/clang/lib/CodeGen/CGObjCMac.cpp b/clang/lib/CodeGen/CGObjCMac.cpp
index 517f7cddebc1a2..be628a909d89be 100644
--- a/clang/lib/CodeGen/CGObjCMac.cpp
+++ b/clang/lib/CodeGen/CGObjCMac.cpp
@@ -1593,12 +1593,20 @@ class CGObjCNonFragileABIMac : public CGObjCCommonMac {
   }
 
   bool isClassLayoutKnownStatically(const ObjCInterfaceDecl *ID) {
-// NSObject is a fixed size. If we can see the @implementation of a class
-// which inherits from NSObject then we know that all it's offsets also 
must
-// be fixed. FIXME: Can we do this if see a chain of super classes with
-// implementations leading to NSObject?
-return ID->getImplementation() && ID->getSuperClass() &&
-   ID->getSuperClass()->getName() == "NSObject";
+// Test a class by checking its superclasses up to
+// its base class if it has one.
+for (; ID; ID = ID->getSuperClass()) {
+  // The layout of base class NSObject
+  // is guaranteed to be statically known
+  if (ID->getIdentifier()->getName() == "NSObject")
+return true;
+
+  // If we cannot see the @implementation of a class,
+  // we cannot statically know the class layout.
+  if (!ID->getImplementation())
+return false;
+}
+return false;
   }
 
 public:
diff --git a/clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m 
b/clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m
index 788b3220af3067..8d55e6c7d23081 100644
--- a/clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m
+++ b/clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m
@@ -1,6 +1,13 @@
 // RUN: %clang_cc1 -triple x86_64-apple-macosx10.14.0 -emit-llvm %s -o - | 
FileCheck %s
 
 // CHECK: @"OBJC_IVAR_$_StaticLayout.static_layout_ivar" = hidden constant i64 
20
+// CHECK: @"OBJC_IVAR_$_SuperClass.superClassIvar" = hidden constant i64 20
+// CHECK: @"OBJC_IVAR_$_SuperClass._superClassProperty" = hidden constant i64 
24
+// CHECK: @"OBJC_IVAR_$_IntermediateClass.intermediateClassIvar" = constant 
i64 32
+// CHECK: @"OBJC_IVAR_$_IntermediateClass.intermediateClassIvar2" = constant 
i64 40
+// CHECK: @"OBJC_IVAR_$_IntermediateClass._intermediateProperty" = hidden 
constant i64 48
+// CHECK: @"OBJC_IVAR_$_SubClass.subClassIvar" = constant i64 56
+// CHECK: @"OBJC_IVAR_$_SubClass._subClassProperty" = hidden constant i64 64
 // CHECK: @"OBJC_IVAR_$_NotStaticLayout.not_static_layout_ivar" = hidden 
global i64 12
 
 @interface NSObject {
@@ -14,12 +21,105 @@ @interface StaticLayout : NSObject
 @implementation StaticLayout {
   int static_layout_ivar;
 }
+
+// CHECK-LABEL: define internal void @"\01-[StaticLayout meth]"
 -(void)meth {
   static_layout_ivar = 0;
   // CHECK-NOT: load i64, ptr @"OBJC_IVAR_$_StaticLayout
+  // CHECK: getelementptr inbounds i8, ptr %0, i64 20
+}
+@end
+
+@interface SuperClass : NSObject
+@property (nonatomic, assign) int superClassProperty;
+@end
+
+@implementation SuperClass {
+  int superClassIvar; // Declare an ivar
+}
+
+// CHECK-LABEL: define internal void @"\01-[SuperClass superClassMethod]"
+- (void)superClassMethod {
+_superClassProperty = 42;
+superClassIvar = 10;
+// CHECK-NOT: load i64, ptr @"OBJC_IVAR_$_SuperClass
+// CHECK: getelementptr inbounds i8, ptr %1, i64 20
+}
+
+// Implicitly synthesized method here
+// CHECK-LABEL: define internal i32 @"\01-[SuperClass superClassProperty]"
+// CHECK: getelementptr inbounds i8, ptr %0, i64 24
+
+// CHECK-LABEL: define internal void @"\01-[SuperClass setSuperClassProperty:]"
+// CHECK: getelementptr inbounds i8, ptr %1, i64 24
+@end
+
+@interface IntermediateClass : SuperClass {
+double intermediateClassIvar;
+
+@protected
+int intermediateClassIvar2;
+}
+@property (nonatomic, strong) SuperClass *intermediateProperty;
+@end
+
+@implementation IntermediateClass
+@synthesize intermediateProperty = _intermediateProperty;
+
+// CHECK-LABEL: define internal void @"\01-[IntermediateClass 
intermediateClassMetho

[llvm-branch-commits] [mlir] [mlir][IR][NFC] Make `replaceAllUsesWith` non-templatized (PR #84722)

[Mehdi Amini via llvm-branch-commits]

https://github.com/joker-eph approved this pull request.


https://github.com/llvm/llvm-project/pull/84722
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[llvm-branch-commits] [llvm] Backport ARM64EC variadic args fixes to LLVM 18 (PR #81800)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar updated 
https://github.com/llvm/llvm-project/pull/81800

>From 064dd621c19b3738af5db29afd5b986a6d739ab1 Mon Sep 17 00:00:00 2001
From: Billy Laws 
Date: Wed, 31 Jan 2024 02:32:15 +
Subject: [PATCH 1/3] [AArch64] Fix variadic tail-calls on ARM64EC (#79774)

ARM64EC varargs calls expect that x4 = sp at entry, special handling is
needed to ensure this with tail calls since they occur after the
epilogue and the x4 write happens before.

I tried going through AArch64MachineFrameLowering for this, hoping to
avoid creating the dummy object but this was the best I could do since
the stack info that uses isn't populated at this stage,
CreateFixedObject also explicitly forbids 0 sized objects.
---
 .../Target/AArch64/AArch64ISelLowering.cpp| 10 -
 llvm/test/CodeGen/AArch64/arm64ec-varargs.ll  | 37 +++
 llvm/test/CodeGen/AArch64/vararg-tallcall.ll  |  8 
 3 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp 
b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 0287856560e91a..196aa50cf4060b 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -8007,11 +8007,19 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
   }
 
   if (IsVarArg && Subtarget->isWindowsArm64EC()) {
+SDValue ParamPtr = StackPtr;
+if (IsTailCall) {
+  // Create a dummy object at the top of the stack that can be used to get
+  // the SP after the epilogue
+  int FI = MF.getFrameInfo().CreateFixedObject(1, FPDiff, true);
+  ParamPtr = DAG.getFrameIndex(FI, PtrVT);
+}
+
 // For vararg calls, the Arm64EC ABI requires values in x4 and x5
 // describing the argument list.  x4 contains the address of the
 // first stack parameter. x5 contains the size in bytes of all parameters
 // passed on the stack.
-RegsToPass.emplace_back(AArch64::X4, StackPtr);
+RegsToPass.emplace_back(AArch64::X4, ParamPtr);
 RegsToPass.emplace_back(AArch64::X5,
 DAG.getConstant(NumBytes, DL, MVT::i64));
   }
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll 
b/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
index dc16b3a1a0f270..844fc52ddade63 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
@@ -100,5 +100,42 @@ define void @varargs_many_argscalleer() nounwind {
   ret void
 }
 
+define void @varargs_caller_tail() nounwind {
+; CHECK-LABEL: varargs_caller_tail:
+; CHECK:// %bb.0:
+; CHECK-NEXT:sub sp, sp, #48
+; CHECK-NEXT:mov x4, sp
+; CHECK-NEXT:add x8, sp, #16
+; CHECK-NEXT:mov x9, #4617315517961601024// 
=0x4014
+; CHECK-NEXT:mov x0, #4607182418800017408// 
=0x3ff0
+; CHECK-NEXT:mov w1, #2  // =0x2
+; CHECK-NEXT:mov x2, #4613937818241073152// 
=0x4008
+; CHECK-NEXT:mov w3, #4  // =0x4
+; CHECK-NEXT:mov w5, #16 // =0x10
+; CHECK-NEXT:stp xzr, x30, [sp, #24] // 8-byte Folded 
Spill
+; CHECK-NEXT:stp x9, x8, [sp]
+; CHECK-NEXT:str xzr, [sp, #16]
+; CHECK-NEXT:.weak_anti_dep  varargs_callee
+; CHECK-NEXT:.set varargs_callee, "#varargs_callee"@WEAKREF
+; CHECK-NEXT:.weak_anti_dep  "#varargs_callee"
+; CHECK-NEXT:.set "#varargs_callee", varargs_callee@WEAKREF
+; CHECK-NEXT:bl  "#varargs_callee"
+; CHECK-NEXT:ldr x30, [sp, #32]  // 8-byte Folded 
Reload
+; CHECK-NEXT:add x4, sp, #48
+; CHECK-NEXT:mov x0, #4607182418800017408// 
=0x3ff0
+; CHECK-NEXT:mov w1, #4  // =0x4
+; CHECK-NEXT:mov w2, #3  // =0x3
+; CHECK-NEXT:mov w3, #2  // =0x2
+; CHECK-NEXT:mov x5, xzr
+; CHECK-NEXT:add sp, sp, #48
+; CHECK-NEXT:.weak_anti_dep  varargs_callee
+; CHECK-NEXT:.set varargs_callee, "#varargs_callee"@WEAKREF
+; CHECK-NEXT:.weak_anti_dep  "#varargs_callee"
+; CHECK-NEXT:.set "#varargs_callee", varargs_callee@WEAKREF
+; CHECK-NEXT:b   "#varargs_callee"
+  call void (double, ...) @varargs_callee(double 1.0, i32 2, double 3.0, i32 
4, double 5.0, <2 x double> )
+  tail call void (double, ...) @varargs_callee(double 1.0, i32 4, i32 3, i32 2)
+  ret void
+}
 
 declare void @llvm.va_start(ptr)
diff --git a/llvm/test/CodeGen/AArch64/vararg-tallcall.ll 
b/llvm/test/CodeGen/AArch64/vararg-tallcall.ll
index 2d6db1642247d7..812837639196e6 100644
--- a/llvm/test/CodeGen/AArch64/vararg-tallcall.ll
+++ b/llvm/test/CodeGen/AArch64/vararg-tallcall.ll
@@ -1,5 +1,6 @@
 ; RUN: llc -mtriple=aarch64-windows-msvc %s -o - | FileCheck %s
 

[llvm-branch-commits] [libcxx] release/18.x: [libc++][modules] Fixes naming inconsistency. (#83036) (PR #83156)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/83156

>From 439e6f81e772956200aa797eab819b72bb64f84b Mon Sep 17 00:00:00 2001
From: Mark de Wever 
Date: Tue, 27 Feb 2024 18:10:53 +0100
Subject: [PATCH] [libc++][modules] Fixes naming inconsistency. (#83036)

The modules used is-standard-library and is-std-library. The latter is
the name used in the SG15 proposal,

Fixes: https://github.com/llvm/llvm-project/issues/82879
(cherry picked from commit b50bcc7ffb6ad6caa4c141a22915ab59f725b7ae)
---
 libcxx/modules/modules.json.in | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libcxx/modules/modules.json.in b/libcxx/modules/modules.json.in
index ddc377f28f9194..759ac92d81f18e 100644
--- a/libcxx/modules/modules.json.in
+++ b/libcxx/modules/modules.json.in
@@ -5,7 +5,7 @@
 {
   "logical-name": "std",
   "source-path": "@LIBCXX_MODULE_RELATIVE_PATH@/std.cppm",
-  "is-standard-library": true,
+  "is-std-library": true,
   "local-arguments": {
 "system-include-directories": [
   "@LIBCXX_MODULE_RELATIVE_PATH@"

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[llvm-branch-commits] [libcxx] 439e6f8 - [libc++][modules] Fixes naming inconsistency. (#83036)

[Tom Stellard via llvm-branch-commits]

Author: Mark de Wever
Date: 2024-03-11T12:24:53-07:00
New Revision: 439e6f81e772956200aa797eab819b72bb64f84b

URL: 
https://github.com/llvm/llvm-project/commit/439e6f81e772956200aa797eab819b72bb64f84b
DIFF: 
https://github.com/llvm/llvm-project/commit/439e6f81e772956200aa797eab819b72bb64f84b.diff

LOG: [libc++][modules] Fixes naming inconsistency. (#83036)

The modules used is-standard-library and is-std-library. The latter is
the name used in the SG15 proposal,

Fixes: https://github.com/llvm/llvm-project/issues/82879
(cherry picked from commit b50bcc7ffb6ad6caa4c141a22915ab59f725b7ae)

Added: 


Modified: 
libcxx/modules/modules.json.in

Removed: 




diff  --git a/libcxx/modules/modules.json.in b/libcxx/modules/modules.json.in
index ddc377f28f9194..759ac92d81f18e 100644
--- a/libcxx/modules/modules.json.in
+++ b/libcxx/modules/modules.json.in
@@ -5,7 +5,7 @@
 {
   "logical-name": "std",
   "source-path": "@LIBCXX_MODULE_RELATIVE_PATH@/std.cppm",
-  "is-standard-library": true,
+  "is-std-library": true,
   "local-arguments": {
 "system-include-directories": [
   "@LIBCXX_MODULE_RELATIVE_PATH@"



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[llvm-branch-commits] [libcxx] release/18.x: [libc++][modules] Fixes naming inconsistency. (#83036) (PR #83156)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/83156
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[llvm-branch-commits] [llvm] release/18.x: MIPS: fix emitDirectiveCpsetup on N32 (#80534) (PR #83198)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/83198

>From 340ba4588c8073f97b03fd5da9a4fd5dc3b27d2e Mon Sep 17 00:00:00 2001
From: YunQiang Su 
Date: Tue, 27 Feb 2024 05:08:58 +0800
Subject: [PATCH] MIPS: fix emitDirectiveCpsetup on N32 (#80534)

In gas, .cpsetup may expand to one of two code sequences (one is related to 
`__gnu_local_gp`), depending on -mno-shared and -msym32.
Since Clang doesn't support -mno-shared or -msym32, .cpsetup expands to one 
code sequence.
The N32 condition incorrectly leads to the incorrect `__gnu_local_gp` code 
sequence.

```
 :
   0:   ffbc0008sd  gp,8(sp)
   4:   3c1clui gp,0x0
4: R_MIPS_HI16  __gnu_local_gp
   8:   279caddiu   gp,gp,0
8: R_MIPS_LO16  __gnu_local_gp
```

Fixes: #52785
(cherry picked from commit 860b6edfa9b344fbf8c500c17158c8212ea87d1c)
---
 .../Mips/MCTargetDesc/MipsTargetStreamer.cpp  | 12 +++--
 llvm/test/MC/Mips/cpsetup.s   | 47 ++-
 2 files changed, 44 insertions(+), 15 deletions(-)

diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp 
b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index 27d7f0f261d100..adfcea73615831 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -1255,7 +1255,9 @@ void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned 
RegNo,
 emitRRI(Mips::SD, GPReg, Mips::SP, RegOrOffset, SMLoc(), &STI);
   }
 
-  if (getABI().IsN32()) {
+#if 0
+  // We haven't support -mabicalls -mno-shared yet.
+  if (-mno-shared) {
 MCSymbol *GPSym = MCA.getContext().getOrCreateSymbol("__gnu_local_gp");
 const MipsMCExpr *HiExpr = MipsMCExpr::create(
 MipsMCExpr::MEK_HI, MCSymbolRefExpr::create(GPSym, MCA.getContext()),
@@ -1273,6 +1275,7 @@ void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned 
RegNo,
 
 return;
   }
+#endif
 
   const MipsMCExpr *HiExpr = MipsMCExpr::createGpOff(
   MipsMCExpr::MEK_HI, MCSymbolRefExpr::create(&Sym, MCA.getContext()),
@@ -1288,8 +1291,11 @@ void 
MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
   emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(),
   &STI);
 
-  // daddu  $gp, $gp, $funcreg
-  emitRRR(Mips::DADDu, GPReg, GPReg, RegNo, SMLoc(), &STI);
+  // (d)addu  $gp, $gp, $funcreg
+  if (getABI().IsN32())
+emitRRR(Mips::ADDu, GPReg, GPReg, RegNo, SMLoc(), &STI);
+  else
+emitRRR(Mips::DADDu, GPReg, GPReg, RegNo, SMLoc(), &STI);
 }
 
 void MipsTargetELFStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
diff --git a/llvm/test/MC/Mips/cpsetup.s b/llvm/test/MC/Mips/cpsetup.s
index 8e587aea3e7e69..4a027c6e796aea 100644
--- a/llvm/test/MC/Mips/cpsetup.s
+++ b/llvm/test/MC/Mips/cpsetup.s
@@ -4,8 +4,6 @@
 # RUN: llvm-mc -triple mips-unknown-linux -target-abi o32 %s | \
 # RUN:   FileCheck -check-prefixes=ASM,ASM-O32 %s
 
-# FIXME: Now we check .cpsetup expansion for `-mno-shared` case only.
-#We also need to implement/check the `-mshared` case.
 # RUN: llvm-mc -triple mips64-unknown-linux -target-abi n32 -filetype=obj -o - 
%s | \
 # RUN:   llvm-objdump --no-print-imm-hex -d -r -z - | \
 # RUN:   FileCheck -check-prefixes=ALL,NXX,N32 %s
@@ -35,11 +33,16 @@ t1:
 
 # NXX-NEXT: sd   $gp, 8($sp)
 # NXX-NEXT: lui  $gp, 0
-# N32-NEXT: R_MIPS_HI16 __gnu_local_gp
 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16  __cerror
+# N32-NEXT: R_MIPS_GPREL16 __cerror
+# N32-NEXT: R_MIPS_SUB
+# N32-NEXT: R_MIPS_HI16
 # NXX-NEXT: addiu$gp, $gp, 0
-# N32-NEXT: R_MIPS_LO16 __gnu_local_gp
 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16  __cerror
+# N32-NEXT: R_MIPS_GPREL16 __cerror
+# N32-NEXT: R_MIPS_SUB
+# N32-NEXT: R_MIPS_LO16
+# N32-NEXT: addu $gp, $gp, $25
 # N64-NEXT: daddu$gp, $gp, $25
 
 # ASM-NEXT: .cpsetup $25, 8, __cerror
@@ -64,11 +67,16 @@ t2:
 
 # NXX-NEXT: move $2, $gp
 # NXX-NEXT: lui  $gp, 0
-# N32-NEXT: R_MIPS_HI16 __gnu_local_gp
 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16  __cerror
+# N32-NEXT: R_MIPS_GPREL16 __cerror
+# N32-NEXT: R_MIPS_SUB
+# N32-NEXT: R_MIPS_HI16
 # NXX-NEXT: addiu$gp, $gp, 0
-# N32-NEXT: R_MIPS_LO16 __gnu_local_gp
 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16  __cerror
+# N32-NEXT: R_MIPS_GPREL16 __cerror
+# N32-NEXT: R_MIPS_SUB
+# N32-NEXT: R_MIPS_LO16
+# N32-NEXT: addu $gp, $gp, $25
 # N64-NEXT: daddu$gp, $gp, $25
 
 # ASM-NEXT: .cpsetup $25, $2, __cerror
@@ -101,11 +109,16 @@ t3:
 
 # NXX-NEXT: move $2, $gp
 # NXX-NEXT: lui  $gp, 0
-# N32-NEXT: {{^ *0+}}38: R_MIPS_HI16 __gnu_local_gp
 # N64-NEXT: {{^ *0+}}40: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 .text
+# N32-NEXT: {{^ *0+}}40: R_MIPS_GPREL16 .text
+# N32-NEXT: R_MIPS_SUB
+# N32-NEXT: R_MIPS_HI16
 # NXX-NEXT: addiu$gp, $gp, 0
-# N32-NEXT: {{^ *0+}}3c: R_MIPS_LO16 __gnu_local_gp
 # N64-NEXT: {{^ *0+}}44: R_MIPS_GPREL16/R_MIPS

[llvm-branch-commits] [llvm] 340ba45 - MIPS: fix emitDirectiveCpsetup on N32 (#80534)

[Tom Stellard via llvm-branch-commits]

Author: YunQiang Su
Date: 2024-03-11T12:32:11-07:00
New Revision: 340ba4588c8073f97b03fd5da9a4fd5dc3b27d2e

URL: 
https://github.com/llvm/llvm-project/commit/340ba4588c8073f97b03fd5da9a4fd5dc3b27d2e
DIFF: 
https://github.com/llvm/llvm-project/commit/340ba4588c8073f97b03fd5da9a4fd5dc3b27d2e.diff

LOG: MIPS: fix emitDirectiveCpsetup on N32 (#80534)

In gas, .cpsetup may expand to one of two code sequences (one is related to 
`__gnu_local_gp`), depending on -mno-shared and -msym32.
Since Clang doesn't support -mno-shared or -msym32, .cpsetup expands to one 
code sequence.
The N32 condition incorrectly leads to the incorrect `__gnu_local_gp` code 
sequence.

```
 :
   0:   ffbc0008sd  gp,8(sp)
   4:   3c1clui gp,0x0
4: R_MIPS_HI16  __gnu_local_gp
   8:   279caddiu   gp,gp,0
8: R_MIPS_LO16  __gnu_local_gp
```

Fixes: #52785
(cherry picked from commit 860b6edfa9b344fbf8c500c17158c8212ea87d1c)

Added: 


Modified: 
llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
llvm/test/MC/Mips/cpsetup.s

Removed: 




diff  --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp 
b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index 27d7f0f261d100..adfcea73615831 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -1255,7 +1255,9 @@ void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned 
RegNo,
 emitRRI(Mips::SD, GPReg, Mips::SP, RegOrOffset, SMLoc(), &STI);
   }
 
-  if (getABI().IsN32()) {
+#if 0
+  // We haven't support -mabicalls -mno-shared yet.
+  if (-mno-shared) {
 MCSymbol *GPSym = MCA.getContext().getOrCreateSymbol("__gnu_local_gp");
 const MipsMCExpr *HiExpr = MipsMCExpr::create(
 MipsMCExpr::MEK_HI, MCSymbolRefExpr::create(GPSym, MCA.getContext()),
@@ -1273,6 +1275,7 @@ void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned 
RegNo,
 
 return;
   }
+#endif
 
   const MipsMCExpr *HiExpr = MipsMCExpr::createGpOff(
   MipsMCExpr::MEK_HI, MCSymbolRefExpr::create(&Sym, MCA.getContext()),
@@ -1288,8 +1291,11 @@ void 
MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
   emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(),
   &STI);
 
-  // daddu  $gp, $gp, $funcreg
-  emitRRR(Mips::DADDu, GPReg, GPReg, RegNo, SMLoc(), &STI);
+  // (d)addu  $gp, $gp, $funcreg
+  if (getABI().IsN32())
+emitRRR(Mips::ADDu, GPReg, GPReg, RegNo, SMLoc(), &STI);
+  else
+emitRRR(Mips::DADDu, GPReg, GPReg, RegNo, SMLoc(), &STI);
 }
 
 void MipsTargetELFStreamer::emitDirectiveCpreturn(unsigned SaveLocation,

diff  --git a/llvm/test/MC/Mips/cpsetup.s b/llvm/test/MC/Mips/cpsetup.s
index 8e587aea3e7e69..4a027c6e796aea 100644
--- a/llvm/test/MC/Mips/cpsetup.s
+++ b/llvm/test/MC/Mips/cpsetup.s
@@ -4,8 +4,6 @@
 # RUN: llvm-mc -triple mips-unknown-linux -target-abi o32 %s | \
 # RUN:   FileCheck -check-prefixes=ASM,ASM-O32 %s
 
-# FIXME: Now we check .cpsetup expansion for `-mno-shared` case only.
-#We also need to implement/check the `-mshared` case.
 # RUN: llvm-mc -triple mips64-unknown-linux -target-abi n32 -filetype=obj -o - 
%s | \
 # RUN:   llvm-objdump --no-print-imm-hex -d -r -z - | \
 # RUN:   FileCheck -check-prefixes=ALL,NXX,N32 %s
@@ -35,11 +33,16 @@ t1:
 
 # NXX-NEXT: sd   $gp, 8($sp)
 # NXX-NEXT: lui  $gp, 0
-# N32-NEXT: R_MIPS_HI16 __gnu_local_gp
 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16  __cerror
+# N32-NEXT: R_MIPS_GPREL16 __cerror
+# N32-NEXT: R_MIPS_SUB
+# N32-NEXT: R_MIPS_HI16
 # NXX-NEXT: addiu$gp, $gp, 0
-# N32-NEXT: R_MIPS_LO16 __gnu_local_gp
 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16  __cerror
+# N32-NEXT: R_MIPS_GPREL16 __cerror
+# N32-NEXT: R_MIPS_SUB
+# N32-NEXT: R_MIPS_LO16
+# N32-NEXT: addu $gp, $gp, $25
 # N64-NEXT: daddu$gp, $gp, $25
 
 # ASM-NEXT: .cpsetup $25, 8, __cerror
@@ -64,11 +67,16 @@ t2:
 
 # NXX-NEXT: move $2, $gp
 # NXX-NEXT: lui  $gp, 0
-# N32-NEXT: R_MIPS_HI16 __gnu_local_gp
 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16  __cerror
+# N32-NEXT: R_MIPS_GPREL16 __cerror
+# N32-NEXT: R_MIPS_SUB
+# N32-NEXT: R_MIPS_HI16
 # NXX-NEXT: addiu$gp, $gp, 0
-# N32-NEXT: R_MIPS_LO16 __gnu_local_gp
 # N64-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16  __cerror
+# N32-NEXT: R_MIPS_GPREL16 __cerror
+# N32-NEXT: R_MIPS_SUB
+# N32-NEXT: R_MIPS_LO16
+# N32-NEXT: addu $gp, $gp, $25
 # N64-NEXT: daddu$gp, $gp, $25
 
 # ASM-NEXT: .cpsetup $25, $2, __cerror
@@ -101,11 +109,16 @@ t3:
 
 # NXX-NEXT: move $2, $gp
 # NXX-NEXT: lui  $gp, 0
-# N32-NEXT: {{^ *0+}}38: R_MIPS_HI16 __gnu_local_gp
 # N64-NEXT: {{^ *0+}}40: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 .text
+# N32-NEXT: {{^ *0+}}40: R_MIPS_GPREL16 .text
+# N32-NEXT: R_MIPS_SUB
+# N32-NEXT: R_MIPS_HI16
 # NXX-NEXT: addiu$gp, $g

[llvm-branch-commits] [llvm] release/18.x: MIPS: fix emitDirectiveCpsetup on N32 (#80534) (PR #83198)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/83198
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[llvm-branch-commits] [llvm] release/18.x: Allow .alt_entry symbols to pass the .cfi nesting check (#82268) (PR #83336)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/83336

>From 267d9b1a74c466fff6bde255a211732aa3bcd7e8 Mon Sep 17 00:00:00 2001
From: Jon Roelofs 
Date: Wed, 28 Feb 2024 13:03:35 -0800
Subject: [PATCH] Allow .alt_entry symbols to pass the .cfi nesting check
 (#82268)

A symbol with an `N_ALT_ENTRY` attribute may be defined in the middle of
a subsection, so it is reasonable to opt them out of the
`.cfi_{start,end}proc` nesting check.

Fixes: https://github.com/llvm/llvm-project/issues/82261
(cherry picked from commit 5b91647e3f82c9747c42c3239b7d7f3ade4542a7)
---
 llvm/lib/MC/MCParser/AsmParser.cpp| 4 +++-
 llvm/test/MC/AArch64/cfi-bad-nesting-darwin.s | 6 +-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/MC/MCParser/AsmParser.cpp 
b/llvm/lib/MC/MCParser/AsmParser.cpp
index 8e508dbdb1c69b..026d252ec5bcd7 100644
--- a/llvm/lib/MC/MCParser/AsmParser.cpp
+++ b/llvm/lib/MC/MCParser/AsmParser.cpp
@@ -44,6 +44,7 @@
 #include "llvm/MC/MCSection.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSymbol.h"
+#include "llvm/MC/MCSymbolMachO.h"
 #include "llvm/MC/MCTargetOptions.h"
 #include "llvm/MC/MCValue.h"
 #include "llvm/Support/Casting.h"
@@ -1950,7 +1951,8 @@ bool AsmParser::parseStatement(ParseStatementInfo &Info,
   Lex();
 }
 
-if (MAI.hasSubsectionsViaSymbols() && CFIStartProcLoc && Sym->isExternal())
+if (MAI.hasSubsectionsViaSymbols() && CFIStartProcLoc &&
+Sym->isExternal() && !cast(Sym)->isAltEntry())
   return Error(StartTokLoc, "non-private labels cannot appear between "
 ".cfi_startproc / .cfi_endproc pairs") &&
  Error(*CFIStartProcLoc, "previous .cfi_startproc was here");
diff --git a/llvm/test/MC/AArch64/cfi-bad-nesting-darwin.s 
b/llvm/test/MC/AArch64/cfi-bad-nesting-darwin.s
index 235b7d44809929..3a5af86defc592 100644
--- a/llvm/test/MC/AArch64/cfi-bad-nesting-darwin.s
+++ b/llvm/test/MC/AArch64/cfi-bad-nesting-darwin.s
@@ -8,6 +8,10 @@
.p2align2
 _locomotive:
.cfi_startproc
+   ; An N_ALT_ENTRY symbol can be defined in the middle of a subsection, so
+   ; these are opted out of the .cfi_{start,end}proc nesting check.
+   .alt_entry _engineer
+_engineer:
ret
 
; It is invalid to have a non-private label between .cfi_startproc and
@@ -17,7 +21,7 @@ _locomotive:
.p2align2
 _caboose:
 ; DARWIN: [[#@LINE-1]]:1: error: non-private labels cannot appear between 
.cfi_startproc / .cfi_endproc pairs
-; DARWIN: [[#@LINE-10]]:2: error: previous .cfi_startproc was here
+; DARWIN: [[#@LINE-14]]:2: error: previous .cfi_startproc was here
ret
.cfi_endproc
 

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[llvm-branch-commits] [llvm] 267d9b1 - Allow .alt_entry symbols to pass the .cfi nesting check (#82268)

[Tom Stellard via llvm-branch-commits]

Author: Jon Roelofs
Date: 2024-03-11T12:35:50-07:00
New Revision: 267d9b1a74c466fff6bde255a211732aa3bcd7e8

URL: 
https://github.com/llvm/llvm-project/commit/267d9b1a74c466fff6bde255a211732aa3bcd7e8
DIFF: 
https://github.com/llvm/llvm-project/commit/267d9b1a74c466fff6bde255a211732aa3bcd7e8.diff

LOG: Allow .alt_entry symbols to pass the .cfi nesting check (#82268)

A symbol with an `N_ALT_ENTRY` attribute may be defined in the middle of
a subsection, so it is reasonable to opt them out of the
`.cfi_{start,end}proc` nesting check.

Fixes: https://github.com/llvm/llvm-project/issues/82261
(cherry picked from commit 5b91647e3f82c9747c42c3239b7d7f3ade4542a7)

Added: 


Modified: 
llvm/lib/MC/MCParser/AsmParser.cpp
llvm/test/MC/AArch64/cfi-bad-nesting-darwin.s

Removed: 




diff  --git a/llvm/lib/MC/MCParser/AsmParser.cpp 
b/llvm/lib/MC/MCParser/AsmParser.cpp
index 8e508dbdb1c69b..026d252ec5bcd7 100644
--- a/llvm/lib/MC/MCParser/AsmParser.cpp
+++ b/llvm/lib/MC/MCParser/AsmParser.cpp
@@ -44,6 +44,7 @@
 #include "llvm/MC/MCSection.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSymbol.h"
+#include "llvm/MC/MCSymbolMachO.h"
 #include "llvm/MC/MCTargetOptions.h"
 #include "llvm/MC/MCValue.h"
 #include "llvm/Support/Casting.h"
@@ -1950,7 +1951,8 @@ bool AsmParser::parseStatement(ParseStatementInfo &Info,
   Lex();
 }
 
-if (MAI.hasSubsectionsViaSymbols() && CFIStartProcLoc && Sym->isExternal())
+if (MAI.hasSubsectionsViaSymbols() && CFIStartProcLoc &&
+Sym->isExternal() && !cast(Sym)->isAltEntry())
   return Error(StartTokLoc, "non-private labels cannot appear between "
 ".cfi_startproc / .cfi_endproc pairs") &&
  Error(*CFIStartProcLoc, "previous .cfi_startproc was here");

diff  --git a/llvm/test/MC/AArch64/cfi-bad-nesting-darwin.s 
b/llvm/test/MC/AArch64/cfi-bad-nesting-darwin.s
index 235b7d44809929..3a5af86defc592 100644
--- a/llvm/test/MC/AArch64/cfi-bad-nesting-darwin.s
+++ b/llvm/test/MC/AArch64/cfi-bad-nesting-darwin.s
@@ -8,6 +8,10 @@
.p2align2
 _locomotive:
.cfi_startproc
+   ; An N_ALT_ENTRY symbol can be defined in the middle of a subsection, so
+   ; these are opted out of the .cfi_{start,end}proc nesting check.
+   .alt_entry _engineer
+_engineer:
ret
 
; It is invalid to have a non-private label between .cfi_startproc and
@@ -17,7 +21,7 @@ _locomotive:
.p2align2
 _caboose:
 ; DARWIN: [[#@LINE-1]]:1: error: non-private labels cannot appear between 
.cfi_startproc / .cfi_endproc pairs
-; DARWIN: [[#@LINE-10]]:2: error: previous .cfi_startproc was here
+; DARWIN: [[#@LINE-14]]:2: error: previous .cfi_startproc was here
ret
.cfi_endproc
 



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[llvm-branch-commits] [llvm] release/18.x: Allow .alt_entry symbols to pass the .cfi nesting check (#82268) (PR #83336)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/83336
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[llvm-branch-commits] [llvm] Lld mac fix (PR #84764)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar updated 
https://github.com/llvm/llvm-project/pull/84764

>From 2ddb32b50752ca91ca9946cb9c9ea3d92c8616d0 Mon Sep 17 00:00:00 2001
From: Tom Stellard 
Date: Sat, 9 Mar 2024 14:26:47 -0800
Subject: [PATCH 1/2] Bump version to 18.1.2

---
 llvm/CMakeLists.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
index ddf95cbc6c5175..c5fa66390bba8d 100644
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -22,7 +22,7 @@ if(NOT DEFINED LLVM_VERSION_MINOR)
   set(LLVM_VERSION_MINOR 1)
 endif()
 if(NOT DEFINED LLVM_VERSION_PATCH)
-  set(LLVM_VERSION_PATCH 1)
+  set(LLVM_VERSION_PATCH 2)
 endif()
 if(NOT DEFINED LLVM_VERSION_SUFFIX)
   set(LLVM_VERSION_SUFFIX)

>From 9edcbcbb219c221521894b04e668b6f9f450497f Mon Sep 17 00:00:00 2001
From: Tom Stellard 
Date: Mon, 11 Mar 2024 07:28:58 -0700
Subject: [PATCH 2/2] workflows: Add workaround for lld failures on MacOS

See #81967
---
 .github/workflows/llvm-project-tests.yml | 5 +
 1 file changed, 5 insertions(+)

diff --git a/.github/workflows/llvm-project-tests.yml 
b/.github/workflows/llvm-project-tests.yml
index 43b90193406fc9..64788457fb6d60 100644
--- a/.github/workflows/llvm-project-tests.yml
+++ b/.github/workflows/llvm-project-tests.yml
@@ -118,6 +118,11 @@ jobs:
   else
 builddir="$(pwd)"/build
   fi
+  if [ "${{ runner.os }}" == "MacOS" ]; then
+# Workaround test failure on some lld tests on MacOS
+# https://github.com/llvm/llvm-project/issues/81967
+extra_cmake_args="-DLLVM_DISABLE_ASSEMBLY_FILES=ON"
+  fi
   echo "llvm-builddir=$builddir" >> "$GITHUB_OUTPUT"
   cmake -G Ninja \
 -B "$builddir" \

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[llvm-branch-commits] [clang] release/18.x: [clang][fat-lto-objects] Make module flags match non-FatLTO pipelines (#83159) (PR #84290)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/84290

>From 16ab0812d2010dad76f87d4d50da8e79e0e75e71 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Wed, 28 Feb 2024 19:11:55 -0800
Subject: [PATCH] [clang][fat-lto-objects] Make module flags match non-FatLTO
 pipelines (#83159)

In addition to being rather hard to follow, there isn't a good reason
why FatLTO shouldn't just share the same code for setting module flags
for (Thin)LTO. This patch simplifies the logic and makes sure we use set
these flags in a consistent way, independent of FatLTO.

Additionally, we now test that output in the .llvm.lto section actually
matches the output from Full and Thin LTO compilation.

(cherry picked from commit 7d8b50aaab8e0f935e3cb1f3f397e98b9e3ee241)
---
 clang/lib/CodeGen/BackendUtil.cpp| 32 ++--
 clang/test/CodeGen/fat-lto-objects.c | 21 +-
 2 files changed, 36 insertions(+), 17 deletions(-)

diff --git a/clang/lib/CodeGen/BackendUtil.cpp 
b/clang/lib/CodeGen/BackendUtil.cpp
index 7877e20d77f772..4f22d35f9d3a94 100644
--- a/clang/lib/CodeGen/BackendUtil.cpp
+++ b/clang/lib/CodeGen/BackendUtil.cpp
@@ -186,6 +186,14 @@ class EmitAssemblyHelper {
TargetTriple.getVendor() != llvm::Triple::Apple;
   }
 
+  /// Check whether we should emit a flag for UnifiedLTO.
+  /// The UnifiedLTO module flag should be set when UnifiedLTO is enabled for
+  /// ThinLTO or Full LTO with module summaries.
+  bool shouldEmitUnifiedLTOModueFlag() const {
+return CodeGenOpts.UnifiedLTO &&
+   (CodeGenOpts.PrepareForThinLTO || shouldEmitRegularLTOSummary());
+  }
+
 public:
   EmitAssemblyHelper(DiagnosticsEngine &_Diags,
  const HeaderSearchOptions &HeaderSearchOpts,
@@ -1029,7 +1037,8 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
   if (!actionRequiresCodeGen(Action) && CodeGenOpts.VerifyModule)
 MPM.addPass(VerifierPass());
 
-  if (Action == Backend_EmitBC || Action == Backend_EmitLL) {
+  if (Action == Backend_EmitBC || Action == Backend_EmitLL ||
+  CodeGenOpts.FatLTO) {
 if (CodeGenOpts.PrepareForThinLTO && !CodeGenOpts.DisableLLVMPasses) {
   if (!TheModule->getModuleFlag("EnableSplitLTOUnit"))
 TheModule->addModuleFlag(llvm::Module::Error, "EnableSplitLTOUnit",
@@ -1040,11 +1049,9 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
   if (!ThinLinkOS)
 return;
 }
-if (CodeGenOpts.UnifiedLTO)
-  TheModule->addModuleFlag(llvm::Module::Error, "UnifiedLTO", 
uint32_t(1));
 MPM.addPass(ThinLTOBitcodeWriterPass(
 *OS, ThinLinkOS ? &ThinLinkOS->os() : nullptr));
-  } else {
+  } else if (Action == Backend_EmitLL) {
 MPM.addPass(PrintModulePass(*OS, "", CodeGenOpts.EmitLLVMUseLists,
 /*EmitLTOSummary=*/true));
   }
@@ -1058,24 +1065,17 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
 if (!TheModule->getModuleFlag("EnableSplitLTOUnit"))
   TheModule->addModuleFlag(llvm::Module::Error, "EnableSplitLTOUnit",
uint32_t(1));
-if (CodeGenOpts.UnifiedLTO)
-  TheModule->addModuleFlag(llvm::Module::Error, "UnifiedLTO", 
uint32_t(1));
   }
-  if (Action == Backend_EmitBC)
+  if (Action == Backend_EmitBC) {
 MPM.addPass(BitcodeWriterPass(*OS, CodeGenOpts.EmitLLVMUseLists,
   EmitLTOSummary));
-  else
+  } else if (Action == Backend_EmitLL) {
 MPM.addPass(PrintModulePass(*OS, "", CodeGenOpts.EmitLLVMUseLists,
 EmitLTOSummary));
+  }
 }
-  }
-  if (CodeGenOpts.FatLTO) {
-// Set the EnableSplitLTOUnit and UnifiedLTO module flags, since FatLTO
-// uses a different action than Backend_EmitBC or Backend_EmitLL.
-if (!TheModule->getModuleFlag("EnableSplitLTOUnit"))
-  TheModule->addModuleFlag(llvm::Module::Error, "EnableSplitLTOUnit",
-   uint32_t(CodeGenOpts.EnableSplitLTOUnit));
-if (CodeGenOpts.UnifiedLTO && !TheModule->getModuleFlag("UnifiedLTO"))
+
+if (shouldEmitUnifiedLTOModueFlag())
   TheModule->addModuleFlag(llvm::Module::Error, "UnifiedLTO", uint32_t(1));
   }
 
diff --git a/clang/test/CodeGen/fat-lto-objects.c 
b/clang/test/CodeGen/fat-lto-objects.c
index afce798c5c8194..b50567c024fc8c 100644
--- a/clang/test/CodeGen/fat-lto-objects.c
+++ b/clang/test/CodeGen/fat-lto-objects.c
@@ -11,10 +11,11 @@
 // RUN: llvm-objcopy --dump-section=.llvm.lto=%t.full.split.bc %t.full.split.o
 // RUN: llvm-dis %t.full.split.bc -o - | FileCheck %s 
--check-prefixes=FULL,SPLIT,NOUNIFIED
 
+/// Full LTO always sets EnableSplitLTOUnit when the summary is used.
 // RUN: %clang -cc1 -triple x86_64-unknown-linux-gnu -flto=full 
-ffat-lto-objects -emit-obj < %s -o %t.full.nosplit.o
 // RUN: llvm-readelf -S %t.full.nosplit.o | FileCheck %s --check-prefixes=ELF
 // RUN:

[llvm-branch-commits] [clang] 16ab081 - [clang][fat-lto-objects] Make module flags match non-FatLTO pipelines (#83159)

[Tom Stellard via llvm-branch-commits]

Author: Paul Kirth
Date: 2024-03-11T12:47:52-07:00
New Revision: 16ab0812d2010dad76f87d4d50da8e79e0e75e71

URL: 
https://github.com/llvm/llvm-project/commit/16ab0812d2010dad76f87d4d50da8e79e0e75e71
DIFF: 
https://github.com/llvm/llvm-project/commit/16ab0812d2010dad76f87d4d50da8e79e0e75e71.diff

LOG: [clang][fat-lto-objects] Make module flags match non-FatLTO pipelines 
(#83159)

In addition to being rather hard to follow, there isn't a good reason
why FatLTO shouldn't just share the same code for setting module flags
for (Thin)LTO. This patch simplifies the logic and makes sure we use set
these flags in a consistent way, independent of FatLTO.

Additionally, we now test that output in the .llvm.lto section actually
matches the output from Full and Thin LTO compilation.

(cherry picked from commit 7d8b50aaab8e0f935e3cb1f3f397e98b9e3ee241)

Added: 


Modified: 
clang/lib/CodeGen/BackendUtil.cpp
clang/test/CodeGen/fat-lto-objects.c

Removed: 




diff  --git a/clang/lib/CodeGen/BackendUtil.cpp 
b/clang/lib/CodeGen/BackendUtil.cpp
index 7877e20d77f772..4f22d35f9d3a94 100644
--- a/clang/lib/CodeGen/BackendUtil.cpp
+++ b/clang/lib/CodeGen/BackendUtil.cpp
@@ -186,6 +186,14 @@ class EmitAssemblyHelper {
TargetTriple.getVendor() != llvm::Triple::Apple;
   }
 
+  /// Check whether we should emit a flag for UnifiedLTO.
+  /// The UnifiedLTO module flag should be set when UnifiedLTO is enabled for
+  /// ThinLTO or Full LTO with module summaries.
+  bool shouldEmitUnifiedLTOModueFlag() const {
+return CodeGenOpts.UnifiedLTO &&
+   (CodeGenOpts.PrepareForThinLTO || shouldEmitRegularLTOSummary());
+  }
+
 public:
   EmitAssemblyHelper(DiagnosticsEngine &_Diags,
  const HeaderSearchOptions &HeaderSearchOpts,
@@ -1029,7 +1037,8 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
   if (!actionRequiresCodeGen(Action) && CodeGenOpts.VerifyModule)
 MPM.addPass(VerifierPass());
 
-  if (Action == Backend_EmitBC || Action == Backend_EmitLL) {
+  if (Action == Backend_EmitBC || Action == Backend_EmitLL ||
+  CodeGenOpts.FatLTO) {
 if (CodeGenOpts.PrepareForThinLTO && !CodeGenOpts.DisableLLVMPasses) {
   if (!TheModule->getModuleFlag("EnableSplitLTOUnit"))
 TheModule->addModuleFlag(llvm::Module::Error, "EnableSplitLTOUnit",
@@ -1040,11 +1049,9 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
   if (!ThinLinkOS)
 return;
 }
-if (CodeGenOpts.UnifiedLTO)
-  TheModule->addModuleFlag(llvm::Module::Error, "UnifiedLTO", 
uint32_t(1));
 MPM.addPass(ThinLTOBitcodeWriterPass(
 *OS, ThinLinkOS ? &ThinLinkOS->os() : nullptr));
-  } else {
+  } else if (Action == Backend_EmitLL) {
 MPM.addPass(PrintModulePass(*OS, "", CodeGenOpts.EmitLLVMUseLists,
 /*EmitLTOSummary=*/true));
   }
@@ -1058,24 +1065,17 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
 if (!TheModule->getModuleFlag("EnableSplitLTOUnit"))
   TheModule->addModuleFlag(llvm::Module::Error, "EnableSplitLTOUnit",
uint32_t(1));
-if (CodeGenOpts.UnifiedLTO)
-  TheModule->addModuleFlag(llvm::Module::Error, "UnifiedLTO", 
uint32_t(1));
   }
-  if (Action == Backend_EmitBC)
+  if (Action == Backend_EmitBC) {
 MPM.addPass(BitcodeWriterPass(*OS, CodeGenOpts.EmitLLVMUseLists,
   EmitLTOSummary));
-  else
+  } else if (Action == Backend_EmitLL) {
 MPM.addPass(PrintModulePass(*OS, "", CodeGenOpts.EmitLLVMUseLists,
 EmitLTOSummary));
+  }
 }
-  }
-  if (CodeGenOpts.FatLTO) {
-// Set the EnableSplitLTOUnit and UnifiedLTO module flags, since FatLTO
-// uses a 
diff erent action than Backend_EmitBC or Backend_EmitLL.
-if (!TheModule->getModuleFlag("EnableSplitLTOUnit"))
-  TheModule->addModuleFlag(llvm::Module::Error, "EnableSplitLTOUnit",
-   uint32_t(CodeGenOpts.EnableSplitLTOUnit));
-if (CodeGenOpts.UnifiedLTO && !TheModule->getModuleFlag("UnifiedLTO"))
+
+if (shouldEmitUnifiedLTOModueFlag())
   TheModule->addModuleFlag(llvm::Module::Error, "UnifiedLTO", uint32_t(1));
   }
 

diff  --git a/clang/test/CodeGen/fat-lto-objects.c 
b/clang/test/CodeGen/fat-lto-objects.c
index afce798c5c8194..b50567c024fc8c 100644
--- a/clang/test/CodeGen/fat-lto-objects.c
+++ b/clang/test/CodeGen/fat-lto-objects.c
@@ -11,10 +11,11 @@
 // RUN: llvm-objcopy --dump-section=.llvm.lto=%t.full.split.bc %t.full.split.o
 // RUN: llvm-dis %t.full.split.bc -o - | FileCheck %s 
--check-prefixes=FULL,SPLIT,NOUNIFIED
 
+/// Full LTO always sets EnableSplitLTOUnit when the summary is used.
 // RUN: %clang -cc1 -triple x86_64-unknown-linux-gnu -flto=full 
-ffat-lto-objects -emit-obj < %s -o %t.full.nosplit.

[llvm-branch-commits] [clang] release/18.x: [clang][fat-lto-objects] Make module flags match non-FatLTO pipelines (#83159) (PR #84290)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/84290
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[llvm-branch-commits] [libcxx] release/18.x: [libc++] Enable availability based on the compiler instead of __has_extension (#84065) (PR #84374)

[Tom Stellard via llvm-branch-commits]

tstellar wrote:

@ldionne Is the test failure legitimate?

https://github.com/llvm/llvm-project/pull/84374
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[llvm-branch-commits] [llvm] release/18.x: [DSE] Delay deleting non-memory-defs until end of DSE. (#83411) (PR #84227)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/84227

>From bf45c3a07918c14577ef7a829f16ec339b9ed610 Mon Sep 17 00:00:00 2001
From: Florian Hahn 
Date: Sat, 2 Mar 2024 12:34:36 +
Subject: [PATCH] [DSE] Delay deleting non-memory-defs until end of DSE.
 (#83411)

DSE uses BatchAA, which caches queries using pairs of MemoryLocations.
At the moment, DSE may remove instructions that are used as pointers in
cached MemoryLocations. If a new instruction used by a new MemoryLoation
and this instruction gets allocated at the same address as a previosuly
cached and then removed instruction, we may access an incorrect entry in
the cache.

To avoid this delay removing all instructions except MemoryDefs until
the end of DSE. This should avoid removing any values used in BatchAA's
cache.

Test case by @vporpo from
https://github.com/llvm/llvm-project/pull/83181.
(Test not precommitted because the results are non-determinstic - memset
only sometimes gets removed)

PR: https://github.com/llvm/llvm-project/pull/83411
(cherry picked from commit 10f5e983a9e3162a569cbebeb32168716e391340)
---
 .../Scalar/DeadStoreElimination.cpp   |  31 ++-
 .../batchaa-caching-new-pointers.ll   | 189 ++
 2 files changed, 215 insertions(+), 5 deletions(-)
 create mode 100644 
llvm/test/Transforms/DeadStoreElimination/batchaa-caching-new-pointers.ll

diff --git a/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp 
b/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
index 11a91bfbe5baff..340fba4fb9c5a2 100644
--- a/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
@@ -857,6 +857,9 @@ struct DSEState {
   // no longer be captured.
   bool ShouldIterateEndOfFunctionDSE;
 
+  /// Dead instructions to be removed at the end of DSE.
+  SmallVector ToRemove;
+
   // Class contains self-reference, make sure it's not copied/moved.
   DSEState(const DSEState &) = delete;
   DSEState &operator=(const DSEState &) = delete;
@@ -1692,7 +1695,8 @@ struct DSEState {
 return {MaybeDeadAccess};
   }
 
-  // Delete dead memory defs
+  /// Delete dead memory defs and recursively add their operands to ToRemove if
+  /// they became dead.
   void deleteDeadInstruction(Instruction *SI) {
 MemorySSAUpdater Updater(&MSSA);
 SmallVector NowDeadInsts;
@@ -1708,8 +1712,11 @@ struct DSEState {
   salvageKnowledge(DeadInst);
 
   // Remove the Instruction from MSSA.
-  if (MemoryAccess *MA = MSSA.getMemoryAccess(DeadInst)) {
-if (MemoryDef *MD = dyn_cast(MA)) {
+  MemoryAccess *MA = MSSA.getMemoryAccess(DeadInst);
+  bool IsMemDef = MA && isa(MA);
+  if (MA) {
+if (IsMemDef) {
+  auto *MD = cast(MA);
   SkipStores.insert(MD);
   if (auto *SI = dyn_cast(MD->getMemoryInst())) {
 if (SI->getValueOperand()->getType()->isPointerTy()) {
@@ -1730,13 +1737,21 @@ struct DSEState {
   // Remove its operands
   for (Use &O : DeadInst->operands())
 if (Instruction *OpI = dyn_cast(O)) {
-  O = nullptr;
+  O.set(PoisonValue::get(O->getType()));
   if (isInstructionTriviallyDead(OpI, &TLI))
 NowDeadInsts.push_back(OpI);
 }
 
   EI.removeInstruction(DeadInst);
-  DeadInst->eraseFromParent();
+  // Remove memory defs directly if they don't produce results, but only
+  // queue other dead instructions for later removal. They may have been
+  // used as memory locations that have been cached by BatchAA. Removing
+  // them here may lead to newly created instructions to be allocated at 
the
+  // same address, yielding stale cache entries.
+  if (IsMemDef && DeadInst->getType()->isVoidTy())
+DeadInst->eraseFromParent();
+  else
+ToRemove.push_back(DeadInst);
 }
   }
 
@@ -2233,6 +2248,12 @@ static bool eliminateDeadStores(Function &F, 
AliasAnalysis &AA, MemorySSA &MSSA,
 
   MadeChange |= State.eliminateRedundantStoresOfExistingValues();
   MadeChange |= State.eliminateDeadWritesAtEndOfFunction();
+
+  while (!State.ToRemove.empty()) {
+Instruction *DeadInst = State.ToRemove.pop_back_val();
+DeadInst->eraseFromParent();
+  }
+
   return MadeChange;
 }
 } // end anonymous namespace
diff --git 
a/llvm/test/Transforms/DeadStoreElimination/batchaa-caching-new-pointers.ll 
b/llvm/test/Transforms/DeadStoreElimination/batchaa-caching-new-pointers.ll
new file mode 100644
index 00..ee9bd6912e2ae4
--- /dev/null
+++ b/llvm/test/Transforms/DeadStoreElimination/batchaa-caching-new-pointers.ll
@@ -0,0 +1,189 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 
UTC_ARGS: --version 4
+; RUN: opt -S -passes=dse < %s | FileCheck %s
+;
+; DSE kills `store i32 44, ptr %struct.byte.4, align 4` but should not kill
+; `call void @llvm.memset.p0.i64(...)`  because it has a clobber read:
+; `%ret = load ptr, ptr %struct.byte.8`
+
+
+%struct.type

[llvm-branch-commits] [llvm] release/18.x: [DSE] Delay deleting non-memory-defs until end of DSE. (#83411) (PR #84227)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/84227
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[llvm-branch-commits] [llvm] bf45c3a - [DSE] Delay deleting non-memory-defs until end of DSE. (#83411)

[Tom Stellard via llvm-branch-commits]

Author: Florian Hahn
Date: 2024-03-11T12:53:04-07:00
New Revision: bf45c3a07918c14577ef7a829f16ec339b9ed610

URL: 
https://github.com/llvm/llvm-project/commit/bf45c3a07918c14577ef7a829f16ec339b9ed610
DIFF: 
https://github.com/llvm/llvm-project/commit/bf45c3a07918c14577ef7a829f16ec339b9ed610.diff

LOG: [DSE] Delay deleting non-memory-defs until end of DSE. (#83411)

DSE uses BatchAA, which caches queries using pairs of MemoryLocations.
At the moment, DSE may remove instructions that are used as pointers in
cached MemoryLocations. If a new instruction used by a new MemoryLoation
and this instruction gets allocated at the same address as a previosuly
cached and then removed instruction, we may access an incorrect entry in
the cache.

To avoid this delay removing all instructions except MemoryDefs until
the end of DSE. This should avoid removing any values used in BatchAA's
cache.

Test case by @vporpo from
https://github.com/llvm/llvm-project/pull/83181.
(Test not precommitted because the results are non-determinstic - memset
only sometimes gets removed)

PR: https://github.com/llvm/llvm-project/pull/83411
(cherry picked from commit 10f5e983a9e3162a569cbebeb32168716e391340)

Added: 
llvm/test/Transforms/DeadStoreElimination/batchaa-caching-new-pointers.ll

Modified: 
llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp 
b/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
index 11a91bfbe5baff..340fba4fb9c5a2 100644
--- a/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
@@ -857,6 +857,9 @@ struct DSEState {
   // no longer be captured.
   bool ShouldIterateEndOfFunctionDSE;
 
+  /// Dead instructions to be removed at the end of DSE.
+  SmallVector ToRemove;
+
   // Class contains self-reference, make sure it's not copied/moved.
   DSEState(const DSEState &) = delete;
   DSEState &operator=(const DSEState &) = delete;
@@ -1692,7 +1695,8 @@ struct DSEState {
 return {MaybeDeadAccess};
   }
 
-  // Delete dead memory defs
+  /// Delete dead memory defs and recursively add their operands to ToRemove if
+  /// they became dead.
   void deleteDeadInstruction(Instruction *SI) {
 MemorySSAUpdater Updater(&MSSA);
 SmallVector NowDeadInsts;
@@ -1708,8 +1712,11 @@ struct DSEState {
   salvageKnowledge(DeadInst);
 
   // Remove the Instruction from MSSA.
-  if (MemoryAccess *MA = MSSA.getMemoryAccess(DeadInst)) {
-if (MemoryDef *MD = dyn_cast(MA)) {
+  MemoryAccess *MA = MSSA.getMemoryAccess(DeadInst);
+  bool IsMemDef = MA && isa(MA);
+  if (MA) {
+if (IsMemDef) {
+  auto *MD = cast(MA);
   SkipStores.insert(MD);
   if (auto *SI = dyn_cast(MD->getMemoryInst())) {
 if (SI->getValueOperand()->getType()->isPointerTy()) {
@@ -1730,13 +1737,21 @@ struct DSEState {
   // Remove its operands
   for (Use &O : DeadInst->operands())
 if (Instruction *OpI = dyn_cast(O)) {
-  O = nullptr;
+  O.set(PoisonValue::get(O->getType()));
   if (isInstructionTriviallyDead(OpI, &TLI))
 NowDeadInsts.push_back(OpI);
 }
 
   EI.removeInstruction(DeadInst);
-  DeadInst->eraseFromParent();
+  // Remove memory defs directly if they don't produce results, but only
+  // queue other dead instructions for later removal. They may have been
+  // used as memory locations that have been cached by BatchAA. Removing
+  // them here may lead to newly created instructions to be allocated at 
the
+  // same address, yielding stale cache entries.
+  if (IsMemDef && DeadInst->getType()->isVoidTy())
+DeadInst->eraseFromParent();
+  else
+ToRemove.push_back(DeadInst);
 }
   }
 
@@ -2233,6 +2248,12 @@ static bool eliminateDeadStores(Function &F, 
AliasAnalysis &AA, MemorySSA &MSSA,
 
   MadeChange |= State.eliminateRedundantStoresOfExistingValues();
   MadeChange |= State.eliminateDeadWritesAtEndOfFunction();
+
+  while (!State.ToRemove.empty()) {
+Instruction *DeadInst = State.ToRemove.pop_back_val();
+DeadInst->eraseFromParent();
+  }
+
   return MadeChange;
 }
 } // end anonymous namespace

diff  --git 
a/llvm/test/Transforms/DeadStoreElimination/batchaa-caching-new-pointers.ll 
b/llvm/test/Transforms/DeadStoreElimination/batchaa-caching-new-pointers.ll
new file mode 100644
index 00..ee9bd6912e2ae4
--- /dev/null
+++ b/llvm/test/Transforms/DeadStoreElimination/batchaa-caching-new-pointers.ll
@@ -0,0 +1,189 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 
UTC_ARGS: --version 4
+; RUN: opt -S -passes=dse < %s | FileCheck %s
+;
+; DSE kills `store i32 44, ptr %struct.byte.4, align 4` but should not kill
+; `call void @llvm.memset.p0.i64(...)`  because it has a clobber read:
+; `%ret = 

[llvm-branch-commits] [llvm] release/18.x: [ARM] Switch to LiveRegUnits to fix r7 register allocation bug (PR #84475)

[Eli Friedman via llvm-branch-commits]

https://github.com/efriedma-quic requested changes to this pull request.

This is, as far as I can tell, not a miscompile; probably not worth taking on 
the 18.x branch.

(Also, it's usually not a good idea to open a PR for a cherry-pick before the 
original patch is merged.)

https://github.com/llvm/llvm-project/pull/84475
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[llvm-branch-commits] [clang] release/18.x: [ObjC] Check entire chain of superclasses to determine class layout (PR #84093)

[Eli Friedman via llvm-branch-commits]

https://github.com/efriedma-quic requested changes to this pull request.

We usually only take bugfixes on release branches (miscompiles/crashes/etc.).

https://github.com/llvm/llvm-project/pull/84093
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[llvm-branch-commits] [compiler-rt] release/18.x: [test] Make two sanitize-coverage tests pass with glibc 2.39+ (PR #84239)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/84239

>From e90bfdb4ddced8dff215672ffeceece8ebe60426 Mon Sep 17 00:00:00 2001
From: Fangrui Song 
Date: Wed, 6 Mar 2024 13:17:43 -0800
Subject: [PATCH] [test] Make two sanitize-coverage tests pass with glibc 2.39+

glibc 2.39 added `nonnull` attribute to most libio functions accepting a
`FILE*` parameter, including fprintf[1]. The -fsanitize=undefined mode
checks the argument to fprintf and has extra counters, not expected by
two tests. Specify -fno-sanitize=nonnull-attribute to make the two tests
pass.

Fix #82883

[1]: 
https://sourceware.org/git/?p=glibc.git;a=commit;h=64b1a44183a3094672ed304532bedb9acc707554

Pull Request: https://github.com/llvm/llvm-project/pull/84231

(cherry picked from commit c3acbf6bb06f9039f9850e18e0ae2f2adef63905)
---
 .../sanitizer_coverage_inline8bit_counter_default_impl.cpp| 4 +++-
 .../TestCases/sanitizer_coverage_symbolize.cpp| 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git 
a/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline8bit_counter_default_impl.cpp
 
b/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline8bit_counter_default_impl.cpp
index 1ac04b53491e14..1d1fbf7299e8b4 100644
--- 
a/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline8bit_counter_default_impl.cpp
+++ 
b/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline8bit_counter_default_impl.cpp
@@ -3,7 +3,9 @@
 
 // REQUIRES: has_sancovcc,stable-runtime,linux,x86_64-target-arch
 
-// RUN: %clangxx -O0 %s -fsanitize-coverage=inline-8bit-counters,pc-table -o %t
+/// In glibc 2.39+, fprintf has a nonnull attribute. Disable nonnull-attribute,
+/// which would increase counters for ubsan.
+// RUN: %clangxx -O0 %s -fsanitize-coverage=inline-8bit-counters,pc-table 
-fno-sanitize=nonnull-attribute -o %t
 // RUN: rm -f %t-counters %t-pcs
 // RUN: env %tool_options="cov_8bit_counters_out=%t-counters 
cov_pcs_out=%t-pcs verbosity=1" %run %t 2>&1 | FileCheck %s
 
diff --git 
a/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp 
b/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp
index daa994c8116251..b168954a1c92cf 100644
--- 
a/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp
+++ 
b/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp
@@ -7,7 +7,9 @@
 // RUN: rm -rf $DIR
 // RUN: mkdir -p $DIR
 // RUN: cd $DIR
-// RUN: %clangxx -O0 -fsanitize-coverage=trace-pc-guard %s -o %t
+/// In glibc 2.39+, fprintf has a nonnull attribute. Disable nonnull-attribute,
+/// which would increase counters for ubsan.
+// RUN: %clangxx -O0 -fsanitize-coverage=trace-pc-guard 
-fno-sanitize=nonnull-attribute %s -o %t
 // RUN: %env_tool_opts=coverage=1 %t 2>&1 | FileCheck %s
 // RUN: rm -rf $DIR
 

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[llvm-branch-commits] [compiler-rt] e90bfdb - [test] Make two sanitize-coverage tests pass with glibc 2.39+

[Tom Stellard via llvm-branch-commits]

Author: Fangrui Song
Date: 2024-03-11T13:07:50-07:00
New Revision: e90bfdb4ddced8dff215672ffeceece8ebe60426

URL: 
https://github.com/llvm/llvm-project/commit/e90bfdb4ddced8dff215672ffeceece8ebe60426
DIFF: 
https://github.com/llvm/llvm-project/commit/e90bfdb4ddced8dff215672ffeceece8ebe60426.diff

LOG: [test] Make two sanitize-coverage tests pass with glibc 2.39+

glibc 2.39 added `nonnull` attribute to most libio functions accepting a
`FILE*` parameter, including fprintf[1]. The -fsanitize=undefined mode
checks the argument to fprintf and has extra counters, not expected by
two tests. Specify -fno-sanitize=nonnull-attribute to make the two tests
pass.

Fix #82883

[1]: 
https://sourceware.org/git/?p=glibc.git;a=commit;h=64b1a44183a3094672ed304532bedb9acc707554

Pull Request: https://github.com/llvm/llvm-project/pull/84231

(cherry picked from commit c3acbf6bb06f9039f9850e18e0ae2f2adef63905)

Added: 


Modified: 

compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline8bit_counter_default_impl.cpp
compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp

Removed: 




diff  --git 
a/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline8bit_counter_default_impl.cpp
 
b/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline8bit_counter_default_impl.cpp
index 1ac04b53491e14..1d1fbf7299e8b4 100644
--- 
a/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline8bit_counter_default_impl.cpp
+++ 
b/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_inline8bit_counter_default_impl.cpp
@@ -3,7 +3,9 @@
 
 // REQUIRES: has_sancovcc,stable-runtime,linux,x86_64-target-arch
 
-// RUN: %clangxx -O0 %s -fsanitize-coverage=inline-8bit-counters,pc-table -o %t
+/// In glibc 2.39+, fprintf has a nonnull attribute. Disable nonnull-attribute,
+/// which would increase counters for ubsan.
+// RUN: %clangxx -O0 %s -fsanitize-coverage=inline-8bit-counters,pc-table 
-fno-sanitize=nonnull-attribute -o %t
 // RUN: rm -f %t-counters %t-pcs
 // RUN: env %tool_options="cov_8bit_counters_out=%t-counters 
cov_pcs_out=%t-pcs verbosity=1" %run %t 2>&1 | FileCheck %s
 

diff  --git 
a/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp 
b/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp
index daa994c8116251..b168954a1c92cf 100644
--- 
a/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp
+++ 
b/compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_symbolize.cpp
@@ -7,7 +7,9 @@
 // RUN: rm -rf $DIR
 // RUN: mkdir -p $DIR
 // RUN: cd $DIR
-// RUN: %clangxx -O0 -fsanitize-coverage=trace-pc-guard %s -o %t
+/// In glibc 2.39+, fprintf has a nonnull attribute. Disable nonnull-attribute,
+/// which would increase counters for ubsan.
+// RUN: %clangxx -O0 -fsanitize-coverage=trace-pc-guard 
-fno-sanitize=nonnull-attribute %s -o %t
 // RUN: %env_tool_opts=coverage=1 %t 2>&1 | FileCheck %s
 // RUN: rm -rf $DIR
 



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[llvm-branch-commits] [compiler-rt] release/18.x: [test] Make two sanitize-coverage tests pass with glibc 2.39+ (PR #84239)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/84239
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[llvm-branch-commits] [libcxx] release/18.x: [libc++] Enable availability based on the compiler instead of __has_extension (#84065) (PR #84374)

[Louis Dionne via llvm-branch-commits]

ldionne wrote:

No, it's not legitimate. Our CI is rather unstable at the moment but this looks 
as good as it'll get.

https://github.com/llvm/llvm-project/pull/84374
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[llvm-branch-commits] [llvm] Backport ARM64EC variadic args fixes to LLVM 18 (PR #81800)

[Eli Friedman via llvm-branch-commits]

https://github.com/efriedma-quic approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/81800
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[llvm-branch-commits] [llvm] release/18.x: [InstCombine] Fix shift calculation in InstCombineCasts (#84027) (PR #84080)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/84080

>From 4c36ecbe0e162155e6032aec75323dcdd7c81b90 Mon Sep 17 00:00:00 2001
From: Quentin Dian 
Date: Wed, 6 Mar 2024 06:16:28 +0800
Subject: [PATCH]  [InstCombine] Fix shift calculation in InstCombineCasts
 (#84027)

Fixes #84025.

(cherry picked from commit e96c0c1d5e0a9916098b1a31acb006ea6c1108fb)
---
 .../Transforms/InstCombine/InstCombineCasts.cpp   |  4 ++--
 llvm/test/Transforms/InstCombine/bitcast.ll   | 15 +++
 2 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
index 58f0763bb0c0cd..c5d3f60176a826 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
@@ -2156,14 +2156,14 @@ static bool collectInsertionElements(Value *V, unsigned 
Shift,
 Type *ElementIntTy = IntegerType::get(C->getContext(), ElementSize);
 
 for (unsigned i = 0; i != NumElts; ++i) {
-  unsigned ShiftI = Shift + i * ElementSize;
+  unsigned ShiftI = i * ElementSize;
   Constant *Piece = ConstantFoldBinaryInstruction(
   Instruction::LShr, C, ConstantInt::get(C->getType(), ShiftI));
   if (!Piece)
 return false;
 
   Piece = ConstantExpr::getTrunc(Piece, ElementIntTy);
-  if (!collectInsertionElements(Piece, ShiftI, Elements, VecEltTy,
+  if (!collectInsertionElements(Piece, ShiftI + Shift, Elements, VecEltTy,
 isBigEndian))
 return false;
 }
diff --git a/llvm/test/Transforms/InstCombine/bitcast.ll 
b/llvm/test/Transforms/InstCombine/bitcast.ll
index 58bd81297b0dd9..5ace1039c37825 100644
--- a/llvm/test/Transforms/InstCombine/bitcast.ll
+++ b/llvm/test/Transforms/InstCombine/bitcast.ll
@@ -686,6 +686,21 @@ define ptr 
@bitcast_from_single_element_pointer_vector_to_pointer(<1 x ptr> %ptr
   ret ptr %ptr
 }
 
+; Sure that we calculate the correct shift.
+define <4 x i32> @bitcast_shl(i32 %arg) {
+; CHECK-LABEL: @bitcast_shl(
+; CHECK-NEXT:[[I5:%.*]] = insertelement <4 x i32> , i32 [[ARG:%.*]], i64 3
+; CHECK-NEXT:ret <4 x i32> [[I5]]
+;
+  %i = zext i32 %arg to i64
+  %i1 = shl i64 %i, 32
+  %i2 = or i64 %i1, 65
+  %i3 = zext i64 %i2 to i128
+  %i4 = shl i128 %i3, 64
+  %i5 = bitcast i128 %i4 to <4 x i32>
+  ret <4 x i32> %i5
+}
+
 declare void @f1()
 declare void @f2()
 define ptr @select_bitcast_unsized_pointer(i1 %c) {

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[llvm-branch-commits] [llvm] 4c36ecb - [InstCombine] Fix shift calculation in InstCombineCasts (#84027)

[Tom Stellard via llvm-branch-commits]

Author: Quentin Dian
Date: 2024-03-11T13:33:20-07:00
New Revision: 4c36ecbe0e162155e6032aec75323dcdd7c81b90

URL: 
https://github.com/llvm/llvm-project/commit/4c36ecbe0e162155e6032aec75323dcdd7c81b90
DIFF: 
https://github.com/llvm/llvm-project/commit/4c36ecbe0e162155e6032aec75323dcdd7c81b90.diff

LOG:  [InstCombine] Fix shift calculation in InstCombineCasts (#84027)

Fixes #84025.

(cherry picked from commit e96c0c1d5e0a9916098b1a31acb006ea6c1108fb)

Added: 


Modified: 
llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
llvm/test/Transforms/InstCombine/bitcast.ll

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
index 58f0763bb0c0cd..c5d3f60176a826 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
@@ -2156,14 +2156,14 @@ static bool collectInsertionElements(Value *V, unsigned 
Shift,
 Type *ElementIntTy = IntegerType::get(C->getContext(), ElementSize);
 
 for (unsigned i = 0; i != NumElts; ++i) {
-  unsigned ShiftI = Shift + i * ElementSize;
+  unsigned ShiftI = i * ElementSize;
   Constant *Piece = ConstantFoldBinaryInstruction(
   Instruction::LShr, C, ConstantInt::get(C->getType(), ShiftI));
   if (!Piece)
 return false;
 
   Piece = ConstantExpr::getTrunc(Piece, ElementIntTy);
-  if (!collectInsertionElements(Piece, ShiftI, Elements, VecEltTy,
+  if (!collectInsertionElements(Piece, ShiftI + Shift, Elements, VecEltTy,
 isBigEndian))
 return false;
 }

diff  --git a/llvm/test/Transforms/InstCombine/bitcast.ll 
b/llvm/test/Transforms/InstCombine/bitcast.ll
index 58bd81297b0dd9..5ace1039c37825 100644
--- a/llvm/test/Transforms/InstCombine/bitcast.ll
+++ b/llvm/test/Transforms/InstCombine/bitcast.ll
@@ -686,6 +686,21 @@ define ptr 
@bitcast_from_single_element_pointer_vector_to_pointer(<1 x ptr> %ptr
   ret ptr %ptr
 }
 
+; Sure that we calculate the correct shift.
+define <4 x i32> @bitcast_shl(i32 %arg) {
+; CHECK-LABEL: @bitcast_shl(
+; CHECK-NEXT:[[I5:%.*]] = insertelement <4 x i32> , i32 [[ARG:%.*]], i64 3
+; CHECK-NEXT:ret <4 x i32> [[I5]]
+;
+  %i = zext i32 %arg to i64
+  %i1 = shl i64 %i, 32
+  %i2 = or i64 %i1, 65
+  %i3 = zext i64 %i2 to i128
+  %i4 = shl i128 %i3, 64
+  %i5 = bitcast i128 %i4 to <4 x i32>
+  ret <4 x i32> %i5
+}
+
 declare void @f1()
 declare void @f2()
 define ptr @select_bitcast_unsized_pointer(i1 %c) {



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[llvm-branch-commits] [llvm] release/18.x: [InstCombine] Fix shift calculation in InstCombineCasts (#84027) (PR #84080)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/84080
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[llvm-branch-commits] [llvm] release/18.x: [InstCombine] Fix infinite loop in select equivalence fold (#84036) (PR #84141)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/84141

>From 94d8f150ed8b6afb83ba47f68116a0247a23cb52 Mon Sep 17 00:00:00 2001
From: Nikita Popov 
Date: Wed, 6 Mar 2024 09:33:51 +0100
Subject: [PATCH] [InstCombine] Fix infinite loop in select equivalence fold
 (#84036)

When replacing with a non-constant, it's possible that the result of the
simplification is actually more complicated than the original, and may
result in an infinite combine loop.

Mitigate the issue by requiring that either the replacement or
simplification result is constant, which should ensure that it's
simpler. While this check is crude, it does not appear to cause
optimization regressions in real-world code in practice.

Fixes https://github.com/llvm/llvm-project/issues/83127.

(cherry picked from commit 9f45c5e1a65a1abf4920b617d36ed05e73c04bea)
---
 .../InstCombine/InstCombineSelect.cpp |  9 -
 llvm/test/Transforms/InstCombine/select.ll| 38 ++-
 2 files changed, 44 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index 21bfc91148bfeb..9f220ec003ec33 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -1284,7 +1284,11 @@ Instruction 
*InstCombinerImpl::foldSelectValueEquivalence(SelectInst &Sel,
   isGuaranteedNotToBeUndefOrPoison(CmpRHS, SQ.AC, &Sel, &DT)) {
 if (Value *V = simplifyWithOpReplaced(TrueVal, CmpLHS, CmpRHS, SQ,
   /* AllowRefinement */ true))
-  return replaceOperand(Sel, Swapped ? 2 : 1, V);
+  // Require either the replacement or the simplification result to be a
+  // constant to avoid infinite loops.
+  // FIXME: Make this check more precise.
+  if (isa(CmpRHS) || isa(V))
+return replaceOperand(Sel, Swapped ? 2 : 1, V);
 
 // Even if TrueVal does not simplify, we can directly replace a use of
 // CmpLHS with CmpRHS, as long as the instruction is not used anywhere
@@ -1302,7 +1306,8 @@ Instruction 
*InstCombinerImpl::foldSelectValueEquivalence(SelectInst &Sel,
   isGuaranteedNotToBeUndefOrPoison(CmpLHS, SQ.AC, &Sel, &DT))
 if (Value *V = simplifyWithOpReplaced(TrueVal, CmpRHS, CmpLHS, SQ,
   /* AllowRefinement */ true))
-  return replaceOperand(Sel, Swapped ? 2 : 1, V);
+  if (isa(CmpLHS) || isa(V))
+return replaceOperand(Sel, Swapped ? 2 : 1, V);
 
   auto *FalseInst = dyn_cast(FalseVal);
   if (!FalseInst)
diff --git a/llvm/test/Transforms/InstCombine/select.ll 
b/llvm/test/Transforms/InstCombine/select.ll
index c5f1b77c6d7404..b7e743c14a52ca 100644
--- a/llvm/test/Transforms/InstCombine/select.ll
+++ b/llvm/test/Transforms/InstCombine/select.ll
@@ -2849,12 +2849,14 @@ define i8 @select_replacement_sub(i8 %x, i8 %y, i8 %z) {
   ret i8 %sel
 }
 
+; FIXME: This is safe to fold.
 define i8 @select_replacement_shift_noundef(i8 %x, i8 %y, i8 %z) {
 ; CHECK-LABEL: @select_replacement_shift_noundef(
 ; CHECK-NEXT:[[SHR:%.*]] = lshr exact i8 [[X:%.*]], 1
 ; CHECK-NEXT:call void @use_i8(i8 noundef [[SHR]])
 ; CHECK-NEXT:[[CMP:%.*]] = icmp eq i8 [[SHR]], [[Y:%.*]]
-; CHECK-NEXT:[[SEL:%.*]] = select i1 [[CMP]], i8 [[X]], i8 [[Z:%.*]]
+; CHECK-NEXT:[[SHL:%.*]] = shl i8 [[Y]], 1
+; CHECK-NEXT:[[SEL:%.*]] = select i1 [[CMP]], i8 [[SHL]], i8 [[Z:%.*]]
 ; CHECK-NEXT:ret i8 [[SEL]]
 ;
   %shr = lshr exact i8 %x, 1
@@ -2904,6 +2906,40 @@ define i32 @select_replacement_loop2(i32 %arg, i32 
%arg2) {
   ret i32 %sel
 }
 
+define i8 @select_replacement_loop3(i32 noundef %x) {
+; CHECK-LABEL: @select_replacement_loop3(
+; CHECK-NEXT:[[TRUNC:%.*]] = trunc i32 [[X:%.*]] to i8
+; CHECK-NEXT:[[REV:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TRUNC]])
+; CHECK-NEXT:[[EXT:%.*]] = zext i8 [[REV]] to i32
+; CHECK-NEXT:[[CMP:%.*]] = icmp eq i32 [[EXT]], [[X]]
+; CHECK-NEXT:[[SEL:%.*]] = select i1 [[CMP]], i8 [[TRUNC]], i8 0
+; CHECK-NEXT:ret i8 [[SEL]]
+;
+  %trunc = trunc i32 %x to i8
+  %rev = call i8 @llvm.bitreverse.i8(i8 %trunc)
+  %ext = zext i8 %rev to i32
+  %cmp = icmp eq i32 %ext, %x
+  %sel = select i1 %cmp, i8 %trunc, i8 0
+  ret i8 %sel
+}
+
+define i16 @select_replacement_loop4(i16 noundef %p_12) {
+; CHECK-LABEL: @select_replacement_loop4(
+; CHECK-NEXT:[[CMP1:%.*]] = icmp ult i16 [[P_12:%.*]], 2
+; CHECK-NEXT:[[AND1:%.*]] = and i16 [[P_12]], 1
+; CHECK-NEXT:[[AND2:%.*]] = select i1 [[CMP1]], i16 [[AND1]], i16 0
+; CHECK-NEXT:[[CMP2:%.*]] = icmp eq i16 [[AND2]], [[P_12]]
+; CHECK-NEXT:[[AND3:%.*]] = select i1 [[CMP2]], i16 [[AND1]], i16 0
+; CHECK-NEXT:ret i16 [[AND3]]
+;
+  %cmp1 = icmp ult i16 %p_12, 2
+  %and1 = and i16 %p_12, 1
+  %and2 = select i1 %cmp1, i16 %and1, i16 0
+  %cmp2 = icmp eq i16 %and2, %p_12
+  %and3 = select i1 %cmp2, i16 %and1, i16 0
+  ret i16 %and3
+

[llvm-branch-commits] [llvm] 94d8f15 - [InstCombine] Fix infinite loop in select equivalence fold (#84036)

[Tom Stellard via llvm-branch-commits]

Author: Nikita Popov
Date: 2024-03-11T13:36:40-07:00
New Revision: 94d8f150ed8b6afb83ba47f68116a0247a23cb52

URL: 
https://github.com/llvm/llvm-project/commit/94d8f150ed8b6afb83ba47f68116a0247a23cb52
DIFF: 
https://github.com/llvm/llvm-project/commit/94d8f150ed8b6afb83ba47f68116a0247a23cb52.diff

LOG: [InstCombine] Fix infinite loop in select equivalence fold (#84036)

When replacing with a non-constant, it's possible that the result of the
simplification is actually more complicated than the original, and may
result in an infinite combine loop.

Mitigate the issue by requiring that either the replacement or
simplification result is constant, which should ensure that it's
simpler. While this check is crude, it does not appear to cause
optimization regressions in real-world code in practice.

Fixes https://github.com/llvm/llvm-project/issues/83127.

(cherry picked from commit 9f45c5e1a65a1abf4920b617d36ed05e73c04bea)

Added: 


Modified: 
llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
llvm/test/Transforms/InstCombine/select.ll

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index 21bfc91148bfeb..9f220ec003ec33 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -1284,7 +1284,11 @@ Instruction 
*InstCombinerImpl::foldSelectValueEquivalence(SelectInst &Sel,
   isGuaranteedNotToBeUndefOrPoison(CmpRHS, SQ.AC, &Sel, &DT)) {
 if (Value *V = simplifyWithOpReplaced(TrueVal, CmpLHS, CmpRHS, SQ,
   /* AllowRefinement */ true))
-  return replaceOperand(Sel, Swapped ? 2 : 1, V);
+  // Require either the replacement or the simplification result to be a
+  // constant to avoid infinite loops.
+  // FIXME: Make this check more precise.
+  if (isa(CmpRHS) || isa(V))
+return replaceOperand(Sel, Swapped ? 2 : 1, V);
 
 // Even if TrueVal does not simplify, we can directly replace a use of
 // CmpLHS with CmpRHS, as long as the instruction is not used anywhere
@@ -1302,7 +1306,8 @@ Instruction 
*InstCombinerImpl::foldSelectValueEquivalence(SelectInst &Sel,
   isGuaranteedNotToBeUndefOrPoison(CmpLHS, SQ.AC, &Sel, &DT))
 if (Value *V = simplifyWithOpReplaced(TrueVal, CmpRHS, CmpLHS, SQ,
   /* AllowRefinement */ true))
-  return replaceOperand(Sel, Swapped ? 2 : 1, V);
+  if (isa(CmpLHS) || isa(V))
+return replaceOperand(Sel, Swapped ? 2 : 1, V);
 
   auto *FalseInst = dyn_cast(FalseVal);
   if (!FalseInst)

diff  --git a/llvm/test/Transforms/InstCombine/select.ll 
b/llvm/test/Transforms/InstCombine/select.ll
index c5f1b77c6d7404..b7e743c14a52ca 100644
--- a/llvm/test/Transforms/InstCombine/select.ll
+++ b/llvm/test/Transforms/InstCombine/select.ll
@@ -2849,12 +2849,14 @@ define i8 @select_replacement_sub(i8 %x, i8 %y, i8 %z) {
   ret i8 %sel
 }
 
+; FIXME: This is safe to fold.
 define i8 @select_replacement_shift_noundef(i8 %x, i8 %y, i8 %z) {
 ; CHECK-LABEL: @select_replacement_shift_noundef(
 ; CHECK-NEXT:[[SHR:%.*]] = lshr exact i8 [[X:%.*]], 1
 ; CHECK-NEXT:call void @use_i8(i8 noundef [[SHR]])
 ; CHECK-NEXT:[[CMP:%.*]] = icmp eq i8 [[SHR]], [[Y:%.*]]
-; CHECK-NEXT:[[SEL:%.*]] = select i1 [[CMP]], i8 [[X]], i8 [[Z:%.*]]
+; CHECK-NEXT:[[SHL:%.*]] = shl i8 [[Y]], 1
+; CHECK-NEXT:[[SEL:%.*]] = select i1 [[CMP]], i8 [[SHL]], i8 [[Z:%.*]]
 ; CHECK-NEXT:ret i8 [[SEL]]
 ;
   %shr = lshr exact i8 %x, 1
@@ -2904,6 +2906,40 @@ define i32 @select_replacement_loop2(i32 %arg, i32 
%arg2) {
   ret i32 %sel
 }
 
+define i8 @select_replacement_loop3(i32 noundef %x) {
+; CHECK-LABEL: @select_replacement_loop3(
+; CHECK-NEXT:[[TRUNC:%.*]] = trunc i32 [[X:%.*]] to i8
+; CHECK-NEXT:[[REV:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TRUNC]])
+; CHECK-NEXT:[[EXT:%.*]] = zext i8 [[REV]] to i32
+; CHECK-NEXT:[[CMP:%.*]] = icmp eq i32 [[EXT]], [[X]]
+; CHECK-NEXT:[[SEL:%.*]] = select i1 [[CMP]], i8 [[TRUNC]], i8 0
+; CHECK-NEXT:ret i8 [[SEL]]
+;
+  %trunc = trunc i32 %x to i8
+  %rev = call i8 @llvm.bitreverse.i8(i8 %trunc)
+  %ext = zext i8 %rev to i32
+  %cmp = icmp eq i32 %ext, %x
+  %sel = select i1 %cmp, i8 %trunc, i8 0
+  ret i8 %sel
+}
+
+define i16 @select_replacement_loop4(i16 noundef %p_12) {
+; CHECK-LABEL: @select_replacement_loop4(
+; CHECK-NEXT:[[CMP1:%.*]] = icmp ult i16 [[P_12:%.*]], 2
+; CHECK-NEXT:[[AND1:%.*]] = and i16 [[P_12]], 1
+; CHECK-NEXT:[[AND2:%.*]] = select i1 [[CMP1]], i16 [[AND1]], i16 0
+; CHECK-NEXT:[[CMP2:%.*]] = icmp eq i16 [[AND2]], [[P_12]]
+; CHECK-NEXT:[[AND3:%.*]] = select i1 [[CMP2]], i16 [[AND1]], i16 0
+; CHECK-NEXT:ret i16 [[AND3]]
+;
+  %cmp1 = icmp ult i16 %p_12, 2
+  %and1 = and i16 %p_12, 1
+  %and2 = select i1 %cmp1

[llvm-branch-commits] [llvm] release/18.x: [InstCombine] Fix infinite loop in select equivalence fold (#84036) (PR #84141)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/84141
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[llvm-branch-commits] [llvm] release/18.x: [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #84491)

[Tom Stellard via llvm-branch-commits]

tstellar wrote:

The new test is failing on the release/18.x branch.

https://github.com/llvm/llvm-project/pull/84491
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[llvm-branch-commits] [llvm] 7cb6753 - ReleaseNotes for LLVM binary utilities (#83751)

[via llvm-branch-commits]

Author: Fangrui Song
Date: 2024-03-11T13:40:01-07:00
New Revision: 7cb67530d2e9b7364e81f0d35da99a2855e391ac

URL: 
https://github.com/llvm/llvm-project/commit/7cb67530d2e9b7364e81f0d35da99a2855e391ac
DIFF: 
https://github.com/llvm/llvm-project/commit/7cb67530d2e9b7364e81f0d35da99a2855e391ac.diff

LOG: ReleaseNotes for LLVM binary utilities (#83751)

Added: 


Modified: 
llvm/docs/ReleaseNotes.rst

Removed: 




diff  --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 5b3210138f2f89..bfa8e93da05cb8 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -339,36 +339,41 @@ Changes to the Debug Info
 Changes to the LLVM tools
 -
 
-* llvm-symbolizer now treats invalid input as an address for which source
+* ``llvm-symbolizer`` now treats invalid input as an address for which source
   information is not found.
-* Fixed big-endian support in llvm-symbolizer's DWARF location parser.
-* llvm-readelf now supports ``--extra-sym-info`` (``-X``) to display extra
+* Fixed big-endian support in ``llvm-symbolizer``'s DWARF location parser.
+* ``llvm-readelf`` now supports ``--extra-sym-info`` (``-X``) to display extra
   information (section name) when showing symbols.
+* ``llvm-readobj``/``llvm-readelf`` now supports ``--decompress``/``-z`` with
+  string and hex dump for ELF object files.
 
-* ``llvm-nm`` now supports the ``--line-numbers`` (``-l``) option to use
-  debugging information to print symbols' filenames and line numbers.
-
-* llvm-symbolizer and llvm-addr2line now support addresses specified as symbol 
names.
+* ``llvm-symbolizer`` and ``llvm-addr2line`` now support addresses specified 
as symbol names.
 
-* llvm-objcopy now supports ``--gap-fill`` and ``--pad-to`` options, for
+* ``llvm-objcopy`` now supports ``--gap-fill`` and ``--pad-to`` options, for
   ELF input and binary output files only.
+* ``llvm-objcopy`` now supports ``-O elf64-s390`` for SystemZ.
 
-* Supported parsing XCOFF auxiliary symbols in obj2yaml.
+* Supported parsing XCOFF auxiliary symbols in ``obj2yaml``.
 
 * ``llvm-ranlib`` now supports ``-X`` on AIX to specify the type of object file
   ranlib should examine.
 
+* ``llvm-cxxfilt`` now supports ``--no-params``/``-p`` to skip function
+  parameters.
+
 * ``llvm-nm`` now supports ``--export-symbol`` to ignore the import symbol 
file.
+* ``llvm-nm`` now supports the ``--line-numbers`` (``-l``) option to use
+  debugging information to print symbols' filenames and line numbers.
 
-* llvm-rc and llvm-windres now accept file path references in ``.rc`` files
+* ``llvm-rc`` and ``llvm-windres`` now accept file path references in ``.rc`` 
files
   concatenated from multiple string literals.
 
-* The llvm-windres option ``--preprocessor`` now resolves its argument
-  in the PATH environment variable as expected, and options passed with
+* The ``llvm-windres`` option ``--preprocessor`` now resolves its argument
+  in the ``PATH`` environment variable as expected, and options passed with
   ``--preprocessor-arg`` are placed before the input file as they should
   be.
 
-* The llvm-windres option ``--preprocessor`` has been updated with the
+* The ``llvm-windres`` option ``--preprocessor`` has been updated with the
   breaking behaviour change from GNU windres from binutils 2.36, where
   the whole argument is considered as one path, not considered as a
   sequence of tool name and parameters.



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[llvm-branch-commits] [llvm] ReleaseNotes for LLVM binary utilities (PR #83751)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/83751
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[llvm-branch-commits] [openmp] release/18.x: [OpenMP] fix endianness dependent definitions in OMP headers for MSVC (#84540) (PR #84668)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/84668

>From 39c1f0de2011dec072fdf64ee25b110eab945fc2 Mon Sep 17 00:00:00 2001
From: Vadim Paretsky 
Date: Sat, 9 Mar 2024 10:47:31 -0800
Subject: [PATCH] [OpenMP] fix endianness dependent definitions in OMP headers
 for MSVC (#84540)

MSVC does not define __BYTE_ORDER__ making the check for BigEndian
erroneously evaluate to true and breaking the struct definitions in MSVC
compiled builds correspondingly. The fix adds an additional check for
whether __BYTE_ORDER__ is defined by the compiler to fix these.

-

Co-authored-by: Vadim Paretsky 
(cherry picked from commit 110141b37813dc48af33de5e1407231e56acdfc5)
---
 openmp/runtime/src/kmp.h | 4 ++--
 openmp/runtime/src/kmp_lock.h| 3 ++-
 openmp/runtime/test/tasking/bug_nested_proxy_task.c  | 2 +-
 openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c | 2 +-
 openmp/runtime/test/tasking/hidden_helper_task/common.h  | 2 +-
 5 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/openmp/runtime/src/kmp.h b/openmp/runtime/src/kmp.h
index 259c57b5afbca5..e3a1e20731bbe0 100644
--- a/openmp/runtime/src/kmp.h
+++ b/openmp/runtime/src/kmp.h
@@ -2506,7 +2506,7 @@ typedef struct kmp_depend_info {
   union {
 kmp_uint8 flag; // flag as an unsigned char
 struct { // flag as a set of 8 bits
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   /* Same fields as in the #else branch, but in reverse order */
   unsigned all : 1;
   unsigned unused : 3;
@@ -2671,7 +2671,7 @@ typedef struct kmp_task_stack {
 #endif // BUILD_TIED_TASK_STACK
 
 typedef struct kmp_tasking_flags { /* Total struct must be exactly 32 bits */
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   /* Same fields as in the #else branch, but in reverse order */
 #if OMPX_TASKGRAPH
   unsigned reserved31 : 6;
diff --git a/openmp/runtime/src/kmp_lock.h b/openmp/runtime/src/kmp_lock.h
index e2a0cda01a9718..6202f3d617cc59 100644
--- a/openmp/runtime/src/kmp_lock.h
+++ b/openmp/runtime/src/kmp_lock.h
@@ -120,7 +120,8 @@ extern void __kmp_validate_locks(void);
 
 struct kmp_base_tas_lock {
   // KMP_LOCK_FREE(tas) => unlocked; locked: (gtid+1) of owning thread
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ && __LP64__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) && 
\
+__LP64__
   // Flip the ordering of the high and low 32-bit member to be consistent
   // with the memory layout of the address in 64-bit big-endian.
   kmp_int32 depth_locked; // depth locked, for nested locks only
diff --git a/openmp/runtime/test/tasking/bug_nested_proxy_task.c 
b/openmp/runtime/test/tasking/bug_nested_proxy_task.c
index 24fe1f3fe7607c..9e0b412efce609 100644
--- a/openmp/runtime/test/tasking/bug_nested_proxy_task.c
+++ b/openmp/runtime/test/tasking/bug_nested_proxy_task.c
@@ -50,7 +50,7 @@ typedef struct kmp_depend_info {
  union {
 kmp_uint8 flag; // flag as an unsigned char
 struct { // flag as a set of 8 bits
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   unsigned all : 1;
   unsigned unused : 3;
   unsigned set : 1;
diff --git a/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c 
b/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c
index 688860c035728f..1e86d574f4f6a8 100644
--- a/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c
+++ b/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c
@@ -47,7 +47,7 @@ typedef struct kmp_depend_info {
  union {
 kmp_uint8 flag; // flag as an unsigned char
 struct { // flag as a set of 8 bits
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   unsigned all : 1;
   unsigned unused : 3;
   unsigned set : 1;
diff --git a/openmp/runtime/test/tasking/hidden_helper_task/common.h 
b/openmp/runtime/test/tasking/hidden_helper_task/common.h
index ba57656cbac41d..68e2b584c87739 100644
--- a/openmp/runtime/test/tasking/hidden_helper_task/common.h
+++ b/openmp/runtime/test/tasking/hidden_helper_task/common.h
@@ -17,7 +17,7 @@ typedef struct kmp_depend_info {
   union {
 unsigned char flag;
 struct {
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   unsigned all : 1;
   unsigned unused : 3;
   unsigned set : 1;

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[llvm-branch-commits] [openmp] release/18.x: [OpenMP] fix endianness dependent definitions in OMP headers for MSVC (#84540) (PR #84668)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/84668

>From a91b9bd9c7507b378a7f318db52484c8bacc12eb Mon Sep 17 00:00:00 2001
From: Vadim Paretsky 
Date: Sat, 9 Mar 2024 10:47:31 -0800
Subject: [PATCH] [OpenMP] fix endianness dependent definitions in OMP headers
 for MSVC (#84540)

MSVC does not define __BYTE_ORDER__ making the check for BigEndian
erroneously evaluate to true and breaking the struct definitions in MSVC
compiled builds correspondingly. The fix adds an additional check for
whether __BYTE_ORDER__ is defined by the compiler to fix these.

-

Co-authored-by: Vadim Paretsky 
(cherry picked from commit 110141b37813dc48af33de5e1407231e56acdfc5)
---
 openmp/runtime/src/kmp.h | 4 ++--
 openmp/runtime/src/kmp_lock.h| 3 ++-
 openmp/runtime/test/tasking/bug_nested_proxy_task.c  | 2 +-
 openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c | 2 +-
 openmp/runtime/test/tasking/hidden_helper_task/common.h  | 2 +-
 5 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/openmp/runtime/src/kmp.h b/openmp/runtime/src/kmp.h
index 259c57b5afbca5..e3a1e20731bbe0 100644
--- a/openmp/runtime/src/kmp.h
+++ b/openmp/runtime/src/kmp.h
@@ -2506,7 +2506,7 @@ typedef struct kmp_depend_info {
   union {
 kmp_uint8 flag; // flag as an unsigned char
 struct { // flag as a set of 8 bits
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   /* Same fields as in the #else branch, but in reverse order */
   unsigned all : 1;
   unsigned unused : 3;
@@ -2671,7 +2671,7 @@ typedef struct kmp_task_stack {
 #endif // BUILD_TIED_TASK_STACK
 
 typedef struct kmp_tasking_flags { /* Total struct must be exactly 32 bits */
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   /* Same fields as in the #else branch, but in reverse order */
 #if OMPX_TASKGRAPH
   unsigned reserved31 : 6;
diff --git a/openmp/runtime/src/kmp_lock.h b/openmp/runtime/src/kmp_lock.h
index e2a0cda01a9718..6202f3d617cc59 100644
--- a/openmp/runtime/src/kmp_lock.h
+++ b/openmp/runtime/src/kmp_lock.h
@@ -120,7 +120,8 @@ extern void __kmp_validate_locks(void);
 
 struct kmp_base_tas_lock {
   // KMP_LOCK_FREE(tas) => unlocked; locked: (gtid+1) of owning thread
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ && __LP64__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) && 
\
+__LP64__
   // Flip the ordering of the high and low 32-bit member to be consistent
   // with the memory layout of the address in 64-bit big-endian.
   kmp_int32 depth_locked; // depth locked, for nested locks only
diff --git a/openmp/runtime/test/tasking/bug_nested_proxy_task.c 
b/openmp/runtime/test/tasking/bug_nested_proxy_task.c
index 24fe1f3fe7607c..9e0b412efce609 100644
--- a/openmp/runtime/test/tasking/bug_nested_proxy_task.c
+++ b/openmp/runtime/test/tasking/bug_nested_proxy_task.c
@@ -50,7 +50,7 @@ typedef struct kmp_depend_info {
  union {
 kmp_uint8 flag; // flag as an unsigned char
 struct { // flag as a set of 8 bits
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   unsigned all : 1;
   unsigned unused : 3;
   unsigned set : 1;
diff --git a/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c 
b/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c
index 688860c035728f..1e86d574f4f6a8 100644
--- a/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c
+++ b/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c
@@ -47,7 +47,7 @@ typedef struct kmp_depend_info {
  union {
 kmp_uint8 flag; // flag as an unsigned char
 struct { // flag as a set of 8 bits
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   unsigned all : 1;
   unsigned unused : 3;
   unsigned set : 1;
diff --git a/openmp/runtime/test/tasking/hidden_helper_task/common.h 
b/openmp/runtime/test/tasking/hidden_helper_task/common.h
index ba57656cbac41d..68e2b584c87739 100644
--- a/openmp/runtime/test/tasking/hidden_helper_task/common.h
+++ b/openmp/runtime/test/tasking/hidden_helper_task/common.h
@@ -17,7 +17,7 @@ typedef struct kmp_depend_info {
   union {
 unsigned char flag;
 struct {
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   unsigned all : 1;
   unsigned unused : 3;
   unsigned set : 1;

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[llvm-branch-commits] [openmp] a91b9bd - [OpenMP] fix endianness dependent definitions in OMP headers for MSVC (#84540)

[Tom Stellard via llvm-branch-commits]

Author: Vadim Paretsky
Date: 2024-03-11T13:42:47-07:00
New Revision: a91b9bd9c7507b378a7f318db52484c8bacc12eb

URL: 
https://github.com/llvm/llvm-project/commit/a91b9bd9c7507b378a7f318db52484c8bacc12eb
DIFF: 
https://github.com/llvm/llvm-project/commit/a91b9bd9c7507b378a7f318db52484c8bacc12eb.diff

LOG: [OpenMP] fix endianness dependent definitions in OMP headers for MSVC 
(#84540)

MSVC does not define __BYTE_ORDER__ making the check for BigEndian
erroneously evaluate to true and breaking the struct definitions in MSVC
compiled builds correspondingly. The fix adds an additional check for
whether __BYTE_ORDER__ is defined by the compiler to fix these.

-

Co-authored-by: Vadim Paretsky 
(cherry picked from commit 110141b37813dc48af33de5e1407231e56acdfc5)

Added: 


Modified: 
openmp/runtime/src/kmp.h
openmp/runtime/src/kmp_lock.h
openmp/runtime/test/tasking/bug_nested_proxy_task.c
openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c
openmp/runtime/test/tasking/hidden_helper_task/common.h

Removed: 




diff  --git a/openmp/runtime/src/kmp.h b/openmp/runtime/src/kmp.h
index 259c57b5afbca5..e3a1e20731bbe0 100644
--- a/openmp/runtime/src/kmp.h
+++ b/openmp/runtime/src/kmp.h
@@ -2506,7 +2506,7 @@ typedef struct kmp_depend_info {
   union {
 kmp_uint8 flag; // flag as an unsigned char
 struct { // flag as a set of 8 bits
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   /* Same fields as in the #else branch, but in reverse order */
   unsigned all : 1;
   unsigned unused : 3;
@@ -2671,7 +2671,7 @@ typedef struct kmp_task_stack {
 #endif // BUILD_TIED_TASK_STACK
 
 typedef struct kmp_tasking_flags { /* Total struct must be exactly 32 bits */
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   /* Same fields as in the #else branch, but in reverse order */
 #if OMPX_TASKGRAPH
   unsigned reserved31 : 6;

diff  --git a/openmp/runtime/src/kmp_lock.h b/openmp/runtime/src/kmp_lock.h
index e2a0cda01a9718..6202f3d617cc59 100644
--- a/openmp/runtime/src/kmp_lock.h
+++ b/openmp/runtime/src/kmp_lock.h
@@ -120,7 +120,8 @@ extern void __kmp_validate_locks(void);
 
 struct kmp_base_tas_lock {
   // KMP_LOCK_FREE(tas) => unlocked; locked: (gtid+1) of owning thread
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ && __LP64__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) && 
\
+__LP64__
   // Flip the ordering of the high and low 32-bit member to be consistent
   // with the memory layout of the address in 64-bit big-endian.
   kmp_int32 depth_locked; // depth locked, for nested locks only

diff  --git a/openmp/runtime/test/tasking/bug_nested_proxy_task.c 
b/openmp/runtime/test/tasking/bug_nested_proxy_task.c
index 24fe1f3fe7607c..9e0b412efce609 100644
--- a/openmp/runtime/test/tasking/bug_nested_proxy_task.c
+++ b/openmp/runtime/test/tasking/bug_nested_proxy_task.c
@@ -50,7 +50,7 @@ typedef struct kmp_depend_info {
  union {
 kmp_uint8 flag; // flag as an unsigned char
 struct { // flag as a set of 8 bits
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   unsigned all : 1;
   unsigned unused : 3;
   unsigned set : 1;

diff  --git a/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c 
b/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c
index 688860c035728f..1e86d574f4f6a8 100644
--- a/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c
+++ b/openmp/runtime/test/tasking/bug_proxy_task_dep_waiting.c
@@ -47,7 +47,7 @@ typedef struct kmp_depend_info {
  union {
 kmp_uint8 flag; // flag as an unsigned char
 struct { // flag as a set of 8 bits
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   unsigned all : 1;
   unsigned unused : 3;
   unsigned set : 1;

diff  --git a/openmp/runtime/test/tasking/hidden_helper_task/common.h 
b/openmp/runtime/test/tasking/hidden_helper_task/common.h
index ba57656cbac41d..68e2b584c87739 100644
--- a/openmp/runtime/test/tasking/hidden_helper_task/common.h
+++ b/openmp/runtime/test/tasking/hidden_helper_task/common.h
@@ -17,7 +17,7 @@ typedef struct kmp_depend_info {
   union {
 unsigned char flag;
 struct {
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__)
   unsigned all : 1;
   unsigned unused : 3;
   unsigned set : 1;



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[llvm-branch-commits] [openmp] release/18.x: [OpenMP] fix endianness dependent definitions in OMP headers for MSVC (#84540) (PR #84668)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/84668
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[llvm-branch-commits] [lld] [llvm] Backport fixes for ARM64EC import libraries (PR #84590)

[Eli Friedman via llvm-branch-commits]

efriedma-quic wrote:

This seems like a pretty big change to backport... how useful is it in 
practice?  I was under the impression that arm64ec lld support is still 
immature... and if you're using the MSVC linker, you might as well use the MSVC 
lib/dlltool.

https://github.com/llvm/llvm-project/pull/84590
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[llvm-branch-commits] [llvm] release/18.x: [TableGen] Fix wrong codegen of BothFusionPredicateWithMCInstPredicate (#83990) (PR #83999)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/83999

>From 69d9b15fe872bb188474b0ad9e36c8506bdf9cc3 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng 
Date: Tue, 5 Mar 2024 19:54:02 +0800
Subject: [PATCH] [TableGen] Fix wrong codegen of
 BothFusionPredicateWithMCInstPredicate (#83990)

We should generate the `MCInstPredicate` twice, one with `FirstMI`
and another with `SecondMI`.

(cherry picked from commit de1f33873beff93063577195e1214a9509e229e0)
---
 llvm/include/llvm/Target/TargetSchedule.td|  2 +-
 llvm/test/TableGen/MacroFusion.td | 25 +++
 .../TableGen/MacroFusionPredicatorEmitter.cpp | 12 -
 3 files changed, 31 insertions(+), 8 deletions(-)

diff --git a/llvm/include/llvm/Target/TargetSchedule.td 
b/llvm/include/llvm/Target/TargetSchedule.td
index 032de728517827..40c2cce8c6effe 100644
--- a/llvm/include/llvm/Target/TargetSchedule.td
+++ b/llvm/include/llvm/Target/TargetSchedule.td
@@ -620,7 +620,7 @@ class 
SecondFusionPredicateWithMCInstPredicate
   : FusionPredicateWithMCInstPredicate;
 // The pred will be applied on both firstMI and secondMI.
 class BothFusionPredicateWithMCInstPredicate
-  : FusionPredicateWithMCInstPredicate;
+  : FusionPredicateWithMCInstPredicate;
 
 // Tie firstOpIdx and secondOpIdx. The operand of `FirstMI` at position
 // `firstOpIdx` should be the same as the operand of `SecondMI` at position
diff --git a/llvm/test/TableGen/MacroFusion.td 
b/llvm/test/TableGen/MacroFusion.td
index 4aa6c8d9acb273..ce76e7f0f7fa64 100644
--- a/llvm/test/TableGen/MacroFusion.td
+++ b/llvm/test/TableGen/MacroFusion.td
@@ -34,6 +34,11 @@ let Namespace = "Test" in {
 def Inst0 : TestInst<0>;
 def Inst1 : TestInst<1>;
 
+def BothFusionPredicate: 
BothFusionPredicateWithMCInstPredicate>;
+def TestBothFusionPredicate: Fusion<"test-both-fusion-predicate", 
"HasBothFusionPredicate",
+"Test BothFusionPredicate",
+[BothFusionPredicate]>;
+
 def TestFusion: SimpleFusion<"test-fusion", "HasTestFusion", "Test Fusion",
  CheckOpcode<[Inst0]>,
  CheckAll<[
@@ -45,6 +50,7 @@ def TestFusion: SimpleFusion<"test-fusion", "HasTestFusion", 
"Test Fusion",
 // CHECK-PREDICATOR-NEXT:  #undef GET_Test_MACRO_FUSION_PRED_DECL
 // CHECK-PREDICATOR-EMPTY:
 // CHECK-PREDICATOR-NEXT:  namespace llvm {
+// CHECK-PREDICATOR-NEXT:  bool isTestBothFusionPredicate(const 
TargetInstrInfo &, const TargetSubtargetInfo &, const MachineInstr *, const 
MachineInstr &);
 // CHECK-PREDICATOR-NEXT:  bool isTestFusion(const TargetInstrInfo &, const 
TargetSubtargetInfo &, const MachineInstr *, const MachineInstr &);
 // CHECK-PREDICATOR-NEXT:  } // end namespace llvm
 // CHECK-PREDICATOR-EMPTY:
@@ -54,6 +60,24 @@ def TestFusion: SimpleFusion<"test-fusion", "HasTestFusion", 
"Test Fusion",
 // CHECK-PREDICATOR-NEXT:  #undef GET_Test_MACRO_FUSION_PRED_IMPL
 // CHECK-PREDICATOR-EMPTY:
 // CHECK-PREDICATOR-NEXT:  namespace llvm {
+// CHECK-PREDICATOR-NEXT:  bool isTestBothFusionPredicate(
+// CHECK-PREDICATOR-NEXT:  const TargetInstrInfo &TII,
+// CHECK-PREDICATOR-NEXT:  const TargetSubtargetInfo &STI,
+// CHECK-PREDICATOR-NEXT:  const MachineInstr *FirstMI,
+// CHECK-PREDICATOR-NEXT:  const MachineInstr &SecondMI) {
+// CHECK-PREDICATOR-NEXT:auto &MRI = SecondMI.getMF()->getRegInfo();
+// CHECK-PREDICATOR-NEXT:{
+// CHECK-PREDICATOR-NEXT:  const MachineInstr *MI = FirstMI;
+// CHECK-PREDICATOR-NEXT:  if (MI->getOperand(0).getReg() != Test::X0)
+// CHECK-PREDICATOR-NEXT:return false;
+// CHECK-PREDICATOR-NEXT:}
+// CHECK-PREDICATOR-NEXT:{
+// CHECK-PREDICATOR-NEXT:  const MachineInstr *MI = &SecondMI;
+// CHECK-PREDICATOR-NEXT:  if (MI->getOperand(0).getReg() != Test::X0)
+// CHECK-PREDICATOR-NEXT:return false;
+// CHECK-PREDICATOR-NEXT:}
+// CHECK-PREDICATOR-NEXT:return true;
+// CHECK-PREDICATOR-NEXT:  }
 // CHECK-PREDICATOR-NEXT:  bool isTestFusion(
 // CHECK-PREDICATOR-NEXT:  const TargetInstrInfo &TII,
 // CHECK-PREDICATOR-NEXT:  const TargetSubtargetInfo &STI,
@@ -106,6 +130,7 @@ def TestFusion: SimpleFusion<"test-fusion", 
"HasTestFusion", "Test Fusion",
 
 // CHECK-SUBTARGET:  std::vector 
TestGenSubtargetInfo::getMacroFusions() const {
 // CHECK-SUBTARGET-NEXT:   std::vector Fusions;
+// CHECK-SUBTARGET-NEXT:   if (hasFeature(Test::TestBothFusionPredicate)) 
Fusions.push_back(llvm::isTestBothFusionPredicate); 
 // CHECK-SUBTARGET-NEXT:   if (hasFeature(Test::TestFusion)) 
Fusions.push_back(llvm::isTestFusion);
 // CHECK-SUBTARGET-NEXT:   return Fusions;
 // CHECK-SUBTARGET-NEXT: }
diff --git a/llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp 
b/llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
index 78dcd4471ae747..7f494e532b1f44 100644
--- a/llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
+++ b/llvm/utils/TableGen/MacroFusionPredicatorEmitter

[llvm-branch-commits] [llvm] 69d9b15 - [TableGen] Fix wrong codegen of BothFusionPredicateWithMCInstPredicate (#83990)

[Tom Stellard via llvm-branch-commits]

Author: Wang Pengcheng
Date: 2024-03-11T13:57:41-07:00
New Revision: 69d9b15fe872bb188474b0ad9e36c8506bdf9cc3

URL: 
https://github.com/llvm/llvm-project/commit/69d9b15fe872bb188474b0ad9e36c8506bdf9cc3
DIFF: 
https://github.com/llvm/llvm-project/commit/69d9b15fe872bb188474b0ad9e36c8506bdf9cc3.diff

LOG: [TableGen] Fix wrong codegen of BothFusionPredicateWithMCInstPredicate 
(#83990)

We should generate the `MCInstPredicate` twice, one with `FirstMI`
and another with `SecondMI`.

(cherry picked from commit de1f33873beff93063577195e1214a9509e229e0)

Added: 


Modified: 
llvm/include/llvm/Target/TargetSchedule.td
llvm/test/TableGen/MacroFusion.td
llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp

Removed: 




diff  --git a/llvm/include/llvm/Target/TargetSchedule.td 
b/llvm/include/llvm/Target/TargetSchedule.td
index 032de728517827..40c2cce8c6effe 100644
--- a/llvm/include/llvm/Target/TargetSchedule.td
+++ b/llvm/include/llvm/Target/TargetSchedule.td
@@ -620,7 +620,7 @@ class 
SecondFusionPredicateWithMCInstPredicate
   : FusionPredicateWithMCInstPredicate;
 // The pred will be applied on both firstMI and secondMI.
 class BothFusionPredicateWithMCInstPredicate
-  : FusionPredicateWithMCInstPredicate;
+  : FusionPredicateWithMCInstPredicate;
 
 // Tie firstOpIdx and secondOpIdx. The operand of `FirstMI` at position
 // `firstOpIdx` should be the same as the operand of `SecondMI` at position

diff  --git a/llvm/test/TableGen/MacroFusion.td 
b/llvm/test/TableGen/MacroFusion.td
index 4aa6c8d9acb273..ce76e7f0f7fa64 100644
--- a/llvm/test/TableGen/MacroFusion.td
+++ b/llvm/test/TableGen/MacroFusion.td
@@ -34,6 +34,11 @@ let Namespace = "Test" in {
 def Inst0 : TestInst<0>;
 def Inst1 : TestInst<1>;
 
+def BothFusionPredicate: 
BothFusionPredicateWithMCInstPredicate>;
+def TestBothFusionPredicate: Fusion<"test-both-fusion-predicate", 
"HasBothFusionPredicate",
+"Test BothFusionPredicate",
+[BothFusionPredicate]>;
+
 def TestFusion: SimpleFusion<"test-fusion", "HasTestFusion", "Test Fusion",
  CheckOpcode<[Inst0]>,
  CheckAll<[
@@ -45,6 +50,7 @@ def TestFusion: SimpleFusion<"test-fusion", "HasTestFusion", 
"Test Fusion",
 // CHECK-PREDICATOR-NEXT:  #undef GET_Test_MACRO_FUSION_PRED_DECL
 // CHECK-PREDICATOR-EMPTY:
 // CHECK-PREDICATOR-NEXT:  namespace llvm {
+// CHECK-PREDICATOR-NEXT:  bool isTestBothFusionPredicate(const 
TargetInstrInfo &, const TargetSubtargetInfo &, const MachineInstr *, const 
MachineInstr &);
 // CHECK-PREDICATOR-NEXT:  bool isTestFusion(const TargetInstrInfo &, const 
TargetSubtargetInfo &, const MachineInstr *, const MachineInstr &);
 // CHECK-PREDICATOR-NEXT:  } // end namespace llvm
 // CHECK-PREDICATOR-EMPTY:
@@ -54,6 +60,24 @@ def TestFusion: SimpleFusion<"test-fusion", "HasTestFusion", 
"Test Fusion",
 // CHECK-PREDICATOR-NEXT:  #undef GET_Test_MACRO_FUSION_PRED_IMPL
 // CHECK-PREDICATOR-EMPTY:
 // CHECK-PREDICATOR-NEXT:  namespace llvm {
+// CHECK-PREDICATOR-NEXT:  bool isTestBothFusionPredicate(
+// CHECK-PREDICATOR-NEXT:  const TargetInstrInfo &TII,
+// CHECK-PREDICATOR-NEXT:  const TargetSubtargetInfo &STI,
+// CHECK-PREDICATOR-NEXT:  const MachineInstr *FirstMI,
+// CHECK-PREDICATOR-NEXT:  const MachineInstr &SecondMI) {
+// CHECK-PREDICATOR-NEXT:auto &MRI = SecondMI.getMF()->getRegInfo();
+// CHECK-PREDICATOR-NEXT:{
+// CHECK-PREDICATOR-NEXT:  const MachineInstr *MI = FirstMI;
+// CHECK-PREDICATOR-NEXT:  if (MI->getOperand(0).getReg() != Test::X0)
+// CHECK-PREDICATOR-NEXT:return false;
+// CHECK-PREDICATOR-NEXT:}
+// CHECK-PREDICATOR-NEXT:{
+// CHECK-PREDICATOR-NEXT:  const MachineInstr *MI = &SecondMI;
+// CHECK-PREDICATOR-NEXT:  if (MI->getOperand(0).getReg() != Test::X0)
+// CHECK-PREDICATOR-NEXT:return false;
+// CHECK-PREDICATOR-NEXT:}
+// CHECK-PREDICATOR-NEXT:return true;
+// CHECK-PREDICATOR-NEXT:  }
 // CHECK-PREDICATOR-NEXT:  bool isTestFusion(
 // CHECK-PREDICATOR-NEXT:  const TargetInstrInfo &TII,
 // CHECK-PREDICATOR-NEXT:  const TargetSubtargetInfo &STI,
@@ -106,6 +130,7 @@ def TestFusion: SimpleFusion<"test-fusion", 
"HasTestFusion", "Test Fusion",
 
 // CHECK-SUBTARGET:  std::vector 
TestGenSubtargetInfo::getMacroFusions() const {
 // CHECK-SUBTARGET-NEXT:   std::vector Fusions;
+// CHECK-SUBTARGET-NEXT:   if (hasFeature(Test::TestBothFusionPredicate)) 
Fusions.push_back(llvm::isTestBothFusionPredicate); 
 // CHECK-SUBTARGET-NEXT:   if (hasFeature(Test::TestFusion)) 
Fusions.push_back(llvm::isTestFusion);
 // CHECK-SUBTARGET-NEXT:   return Fusions;
 // CHECK-SUBTARGET-NEXT: }

diff  --git a/llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp 
b/llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
index 78dcd4471ae747..7f494e532b1f44 100644
--- a/llvm/uti

[llvm-branch-commits] [llvm] release/18.x: [TableGen] Fix wrong codegen of BothFusionPredicateWithMCInstPredicate (#83990) (PR #83999)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/83999
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[llvm-branch-commits] [llvm] Backport PR83993 to 18.x (PR #84298)

[Nikita Popov via llvm-branch-commits]

https://github.com/nikic approved this pull request.


https://github.com/llvm/llvm-project/pull/84298
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[llvm-branch-commits] [lld] [llvm] Backport fixes for ARM64EC import libraries (PR #84590)

[Daniel Paoliello via llvm-branch-commits]

dpaoliello wrote:

Blocking to wait for 

https://github.com/llvm/llvm-project/pull/84590
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[llvm-branch-commits] [llvm] Backport ARM64EC variadic args fixes to LLVM 18 (PR #81800)

[Daniel Paoliello via llvm-branch-commits]

https://github.com/dpaoliello updated 
https://github.com/llvm/llvm-project/pull/81800

>From a276993409f867760dbc1993acb54063fd8a0fbb Mon Sep 17 00:00:00 2001
From: Billy Laws 
Date: Wed, 31 Jan 2024 02:32:15 +
Subject: [PATCH 1/3] [AArch64] Fix variadic tail-calls on ARM64EC (#79774)

ARM64EC varargs calls expect that x4 = sp at entry, special handling is
needed to ensure this with tail calls since they occur after the
epilogue and the x4 write happens before.

I tried going through AArch64MachineFrameLowering for this, hoping to
avoid creating the dummy object but this was the best I could do since
the stack info that uses isn't populated at this stage,
CreateFixedObject also explicitly forbids 0 sized objects.
---
 .../Target/AArch64/AArch64ISelLowering.cpp| 10 -
 llvm/test/CodeGen/AArch64/arm64ec-varargs.ll  | 37 +++
 llvm/test/CodeGen/AArch64/vararg-tallcall.ll  |  8 
 3 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp 
b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 0287856560e91a..196aa50cf4060b 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -8007,11 +8007,19 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
   }
 
   if (IsVarArg && Subtarget->isWindowsArm64EC()) {
+SDValue ParamPtr = StackPtr;
+if (IsTailCall) {
+  // Create a dummy object at the top of the stack that can be used to get
+  // the SP after the epilogue
+  int FI = MF.getFrameInfo().CreateFixedObject(1, FPDiff, true);
+  ParamPtr = DAG.getFrameIndex(FI, PtrVT);
+}
+
 // For vararg calls, the Arm64EC ABI requires values in x4 and x5
 // describing the argument list.  x4 contains the address of the
 // first stack parameter. x5 contains the size in bytes of all parameters
 // passed on the stack.
-RegsToPass.emplace_back(AArch64::X4, StackPtr);
+RegsToPass.emplace_back(AArch64::X4, ParamPtr);
 RegsToPass.emplace_back(AArch64::X5,
 DAG.getConstant(NumBytes, DL, MVT::i64));
   }
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll 
b/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
index dc16b3a1a0f270..844fc52ddade63 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
@@ -100,5 +100,42 @@ define void @varargs_many_argscalleer() nounwind {
   ret void
 }
 
+define void @varargs_caller_tail() nounwind {
+; CHECK-LABEL: varargs_caller_tail:
+; CHECK:// %bb.0:
+; CHECK-NEXT:sub sp, sp, #48
+; CHECK-NEXT:mov x4, sp
+; CHECK-NEXT:add x8, sp, #16
+; CHECK-NEXT:mov x9, #4617315517961601024// 
=0x4014
+; CHECK-NEXT:mov x0, #4607182418800017408// 
=0x3ff0
+; CHECK-NEXT:mov w1, #2  // =0x2
+; CHECK-NEXT:mov x2, #4613937818241073152// 
=0x4008
+; CHECK-NEXT:mov w3, #4  // =0x4
+; CHECK-NEXT:mov w5, #16 // =0x10
+; CHECK-NEXT:stp xzr, x30, [sp, #24] // 8-byte Folded 
Spill
+; CHECK-NEXT:stp x9, x8, [sp]
+; CHECK-NEXT:str xzr, [sp, #16]
+; CHECK-NEXT:.weak_anti_dep  varargs_callee
+; CHECK-NEXT:.set varargs_callee, "#varargs_callee"@WEAKREF
+; CHECK-NEXT:.weak_anti_dep  "#varargs_callee"
+; CHECK-NEXT:.set "#varargs_callee", varargs_callee@WEAKREF
+; CHECK-NEXT:bl  "#varargs_callee"
+; CHECK-NEXT:ldr x30, [sp, #32]  // 8-byte Folded 
Reload
+; CHECK-NEXT:add x4, sp, #48
+; CHECK-NEXT:mov x0, #4607182418800017408// 
=0x3ff0
+; CHECK-NEXT:mov w1, #4  // =0x4
+; CHECK-NEXT:mov w2, #3  // =0x3
+; CHECK-NEXT:mov w3, #2  // =0x2
+; CHECK-NEXT:mov x5, xzr
+; CHECK-NEXT:add sp, sp, #48
+; CHECK-NEXT:.weak_anti_dep  varargs_callee
+; CHECK-NEXT:.set varargs_callee, "#varargs_callee"@WEAKREF
+; CHECK-NEXT:.weak_anti_dep  "#varargs_callee"
+; CHECK-NEXT:.set "#varargs_callee", varargs_callee@WEAKREF
+; CHECK-NEXT:b   "#varargs_callee"
+  call void (double, ...) @varargs_callee(double 1.0, i32 2, double 3.0, i32 
4, double 5.0, <2 x double> )
+  tail call void (double, ...) @varargs_callee(double 1.0, i32 4, i32 3, i32 2)
+  ret void
+}
 
 declare void @llvm.va_start(ptr)
diff --git a/llvm/test/CodeGen/AArch64/vararg-tallcall.ll 
b/llvm/test/CodeGen/AArch64/vararg-tallcall.ll
index 2d6db1642247d7..812837639196e6 100644
--- a/llvm/test/CodeGen/AArch64/vararg-tallcall.ll
+++ b/llvm/test/CodeGen/AArch64/vararg-tallcall.ll
@@ -1,5 +1,6 @@
 ; RUN: llc -mtriple=aarch64-windows-msvc %s -o - | FileCheck %s

[llvm-branch-commits] [lld] [llvm] Backport fixes for ARM64EC import libraries (PR #84590)

[Jacek Caban via llvm-branch-commits]

cjacek wrote:

I have similar feeling to @efriedma-quic . There is probably not much use of 
those fixes on their own. They are a step towards stand-alone toolchain and are 
required for the linker, both for its libs part and to generate test cases, but 
they alone are not enough. They will be more useful when paired with linker 
support, which I hope will be in a useful shape for LLVM 19. Until then MSVC is 
required anyway.

https://github.com/llvm/llvm-project/pull/84590
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[llvm-branch-commits] [llvm] release/18.x: [InstCombine] Fix miscompilation in PR83947 (#83993) (PR #84021)

[Tom Stellard via llvm-branch-commits]

tstellar wrote:

This is fixed in #84298.

https://github.com/llvm/llvm-project/pull/84021
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[llvm-branch-commits] [llvm] release/18.x: [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656) (PR #83750)

[via llvm-branch-commits]

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/83750

>From ea6c457b8dd2d0e6a7f05b4a5bdd2686085e1ec0 Mon Sep 17 00:00:00 2001
From: Lu Weining 
Date: Mon, 4 Mar 2024 08:38:52 +0800
Subject: [PATCH] [LoongArch] Override
 LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656)

This patch aims to solve Firefox issue:
https://bugzilla.mozilla.org/show_bug.cgi?id=1882301

Similar to 616289ed2922. Currently LoongArch uses an ll.[wd]/sc.[wd]
loop for ATOMIC_CMP_XCHG. Because the comparison in the loop is
full-width (i.e. the `bne` instruction), we must sign extend the input
comparsion argument.

Note that LoongArch ISA manual V1.1 has introduced compare-and-swap
instructions. We would change the implementation (return `ANY_EXTEND`)
when we support them.

(cherry picked from commit 5f058aa211995d2f0df2a0e063532832569cb7a8)
---
 .../LoongArch/LoongArchISelLowering.cpp   |   5 +
 .../Target/LoongArch/LoongArchISelLowering.h  |   2 +
 .../LoongArch/atomicrmw-uinc-udec-wrap.ll | 120 +++--
 .../ir-instruction/atomic-cmpxchg.ll  |  25 +--
 .../LoongArch/ir-instruction/atomicrmw-fp.ll  | 160 +-
 5 files changed, 159 insertions(+), 153 deletions(-)

diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp 
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 76c1a14fe0156c..b161c5434ca13e 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -4940,3 +4940,8 @@ bool LoongArchTargetLowering::hasAndNotCompare(SDValue Y) 
const {
 
   return !isa(Y);
 }
+
+ISD::NodeType LoongArchTargetLowering::getExtendForAtomicCmpSwapArg() const {
+  // TODO: LAMCAS will use amcas{_DB,}.[bhwd] which does not require extension.
+  return ISD::SIGN_EXTEND;
+}
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h 
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index 72182623b2c3dd..9e9ac0b8269291 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -206,6 +206,8 @@ class LoongArchTargetLowering : public TargetLowering {
 return ISD::SIGN_EXTEND;
   }
 
+  ISD::NodeType getExtendForAtomicCmpSwapArg() const override;
+
   Register getRegisterByName(const char *RegName, LLT VT,
  const MachineFunction &MF) const override;
   bool mayBeEmittedAsTailCall(const CallInst *CI) const override;
diff --git a/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll 
b/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
index b0f29ee790885d..b84c1093eb75f2 100644
--- a/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
+++ b/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
@@ -25,15 +25,16 @@ define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {
 ; LA64-NEXT:andi $a5, $a5, 255
 ; LA64-NEXT:sll.w $a5, $a5, $a3
 ; LA64-NEXT:and $a6, $a2, $a4
-; LA64-NEXT:or $a6, $a6, $a5
+; LA64-NEXT:or $a5, $a6, $a5
+; LA64-NEXT:addi.w $a6, $a2, 0
 ; LA64-NEXT:  .LBB0_3: # %atomicrmw.start
 ; LA64-NEXT:# Parent Loop BB0_1 Depth=1
 ; LA64-NEXT:# => This Inner Loop Header: Depth=2
-; LA64-NEXT:ll.w $a5, $a0, 0
-; LA64-NEXT:bne $a5, $a2, .LBB0_5
+; LA64-NEXT:ll.w $a2, $a0, 0
+; LA64-NEXT:bne $a2, $a6, .LBB0_5
 ; LA64-NEXT:  # %bb.4: # %atomicrmw.start
 ; LA64-NEXT:# in Loop: Header=BB0_3 Depth=2
-; LA64-NEXT:move $a7, $a6
+; LA64-NEXT:move $a7, $a5
 ; LA64-NEXT:sc.w $a7, $a0, 0
 ; LA64-NEXT:beqz $a7, .LBB0_3
 ; LA64-NEXT:b .LBB0_6
@@ -42,11 +43,9 @@ define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {
 ; LA64-NEXT:dbar 20
 ; LA64-NEXT:  .LBB0_6: # %atomicrmw.start
 ; LA64-NEXT:# in Loop: Header=BB0_1 Depth=1
-; LA64-NEXT:addi.w $a6, $a2, 0
-; LA64-NEXT:move $a2, $a5
-; LA64-NEXT:bne $a5, $a6, .LBB0_1
+; LA64-NEXT:bne $a2, $a6, .LBB0_1
 ; LA64-NEXT:  # %bb.2: # %atomicrmw.end
-; LA64-NEXT:srl.w $a0, $a5, $a3
+; LA64-NEXT:srl.w $a0, $a2, $a3
 ; LA64-NEXT:ret
   %result = atomicrmw uinc_wrap ptr %ptr, i8 %val seq_cst
   ret i8 %result
@@ -77,15 +76,16 @@ define i16 @atomicrmw_uinc_wrap_i16(ptr %ptr, i16 %val) {
 ; LA64-NEXT:bstrpick.d $a5, $a5, 15, 0
 ; LA64-NEXT:sll.w $a5, $a5, $a3
 ; LA64-NEXT:and $a6, $a2, $a4
-; LA64-NEXT:or $a6, $a6, $a5
+; LA64-NEXT:or $a5, $a6, $a5
+; LA64-NEXT:addi.w $a6, $a2, 0
 ; LA64-NEXT:  .LBB1_3: # %atomicrmw.start
 ; LA64-NEXT:# Parent Loop BB1_1 Depth=1
 ; LA64-NEXT:# => This Inner Loop Header: Depth=2
-; LA64-NEXT:ll.w $a5, $a0, 0
-; LA64-NEXT:bne $a5, $a2, .LBB1_5
+; LA64-NEXT:ll.w $a2, $a0, 0
+; LA64-NEXT:bne $a2, $a6, .LBB1_5
 ; LA64-NEXT:  # %bb.4: # %atomicrmw.start
 ; LA64-NEXT:# in Loop: Header=BB1_3 Depth=2
-; LA64-NEXT:move $a7, $a6
+; LA64-NEXT:move $a7, $a5
 ; LA64-NEXT:sc.w $a7, $a0, 0
 ; LA64-NEXT:beqz $a7, .LBB1_3
 ; LA64-NEXT:b .LBB1_6
@@ -94,11 +94,9 @@ define

[llvm-branch-commits] [llvm] ea6c457 - [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656)

[Tom Stellard via llvm-branch-commits]

Author: Lu Weining
Date: 2024-03-11T14:19:24-07:00
New Revision: ea6c457b8dd2d0e6a7f05b4a5bdd2686085e1ec0

URL: 
https://github.com/llvm/llvm-project/commit/ea6c457b8dd2d0e6a7f05b4a5bdd2686085e1ec0
DIFF: 
https://github.com/llvm/llvm-project/commit/ea6c457b8dd2d0e6a7f05b4a5bdd2686085e1ec0.diff

LOG: [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg 
(#83656)

This patch aims to solve Firefox issue:
https://bugzilla.mozilla.org/show_bug.cgi?id=1882301

Similar to 616289ed2922. Currently LoongArch uses an ll.[wd]/sc.[wd]
loop for ATOMIC_CMP_XCHG. Because the comparison in the loop is
full-width (i.e. the `bne` instruction), we must sign extend the input
comparsion argument.

Note that LoongArch ISA manual V1.1 has introduced compare-and-swap
instructions. We would change the implementation (return `ANY_EXTEND`)
when we support them.

(cherry picked from commit 5f058aa211995d2f0df2a0e063532832569cb7a8)

Added: 


Modified: 
llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
llvm/lib/Target/LoongArch/LoongArchISelLowering.h
llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll

Removed: 




diff  --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp 
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 76c1a14fe0156c..b161c5434ca13e 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -4940,3 +4940,8 @@ bool LoongArchTargetLowering::hasAndNotCompare(SDValue Y) 
const {
 
   return !isa(Y);
 }
+
+ISD::NodeType LoongArchTargetLowering::getExtendForAtomicCmpSwapArg() const {
+  // TODO: LAMCAS will use amcas{_DB,}.[bhwd] which does not require extension.
+  return ISD::SIGN_EXTEND;
+}

diff  --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h 
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index 72182623b2c3dd..9e9ac0b8269291 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -206,6 +206,8 @@ class LoongArchTargetLowering : public TargetLowering {
 return ISD::SIGN_EXTEND;
   }
 
+  ISD::NodeType getExtendForAtomicCmpSwapArg() const override;
+
   Register getRegisterByName(const char *RegName, LLT VT,
  const MachineFunction &MF) const override;
   bool mayBeEmittedAsTailCall(const CallInst *CI) const override;

diff  --git a/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll 
b/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
index b0f29ee790885d..b84c1093eb75f2 100644
--- a/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
+++ b/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
@@ -25,15 +25,16 @@ define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {
 ; LA64-NEXT:andi $a5, $a5, 255
 ; LA64-NEXT:sll.w $a5, $a5, $a3
 ; LA64-NEXT:and $a6, $a2, $a4
-; LA64-NEXT:or $a6, $a6, $a5
+; LA64-NEXT:or $a5, $a6, $a5
+; LA64-NEXT:addi.w $a6, $a2, 0
 ; LA64-NEXT:  .LBB0_3: # %atomicrmw.start
 ; LA64-NEXT:# Parent Loop BB0_1 Depth=1
 ; LA64-NEXT:# => This Inner Loop Header: Depth=2
-; LA64-NEXT:ll.w $a5, $a0, 0
-; LA64-NEXT:bne $a5, $a2, .LBB0_5
+; LA64-NEXT:ll.w $a2, $a0, 0
+; LA64-NEXT:bne $a2, $a6, .LBB0_5
 ; LA64-NEXT:  # %bb.4: # %atomicrmw.start
 ; LA64-NEXT:# in Loop: Header=BB0_3 Depth=2
-; LA64-NEXT:move $a7, $a6
+; LA64-NEXT:move $a7, $a5
 ; LA64-NEXT:sc.w $a7, $a0, 0
 ; LA64-NEXT:beqz $a7, .LBB0_3
 ; LA64-NEXT:b .LBB0_6
@@ -42,11 +43,9 @@ define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {
 ; LA64-NEXT:dbar 20
 ; LA64-NEXT:  .LBB0_6: # %atomicrmw.start
 ; LA64-NEXT:# in Loop: Header=BB0_1 Depth=1
-; LA64-NEXT:addi.w $a6, $a2, 0
-; LA64-NEXT:move $a2, $a5
-; LA64-NEXT:bne $a5, $a6, .LBB0_1
+; LA64-NEXT:bne $a2, $a6, .LBB0_1
 ; LA64-NEXT:  # %bb.2: # %atomicrmw.end
-; LA64-NEXT:srl.w $a0, $a5, $a3
+; LA64-NEXT:srl.w $a0, $a2, $a3
 ; LA64-NEXT:ret
   %result = atomicrmw uinc_wrap ptr %ptr, i8 %val seq_cst
   ret i8 %result
@@ -77,15 +76,16 @@ define i16 @atomicrmw_uinc_wrap_i16(ptr %ptr, i16 %val) {
 ; LA64-NEXT:bstrpick.d $a5, $a5, 15, 0
 ; LA64-NEXT:sll.w $a5, $a5, $a3
 ; LA64-NEXT:and $a6, $a2, $a4
-; LA64-NEXT:or $a6, $a6, $a5
+; LA64-NEXT:or $a5, $a6, $a5
+; LA64-NEXT:addi.w $a6, $a2, 0
 ; LA64-NEXT:  .LBB1_3: # %atomicrmw.start
 ; LA64-NEXT:# Parent Loop BB1_1 Depth=1
 ; LA64-NEXT:# => This Inner Loop Header: Depth=2
-; LA64-NEXT:ll.w $a5, $a0, 0
-; LA64-NEXT:bne $a5, $a2, .LBB1_5
+; LA64-NEXT:ll.w $a2, $a0, 0
+; LA64-NEXT:bne $a2, $a6, .LBB1_5
 ; LA64-NEXT:  # %bb.4: # %atomicrmw.start
 ; LA64-NEXT:# in Loop: Header=BB1_3 Depth=2
-; LA64-NEXT:move $a7, $a6
+; LA64-NEXT:

[llvm-branch-commits] [llvm] release/18.x: [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656) (PR #83750)

[Tom Stellard via llvm-branch-commits]

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/83750
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[llvm-branch-commits] [llvm] release/18.x: [ARM] Switch to LiveRegUnits to fix r7 register allocation bug (PR #84475)

[via llvm-branch-commits]

AtariDreams wrote:

> This is, as far as I can tell, not a miscompile; probably not worth taking on 
> the 18.x branch.
> 
> (Also, it's usually not a good idea to open a PR for a cherry-pick before the 
> original patch is merged.)

On that last part, it was supposed to be merged but then split off in the event 
other changes had to be reverted. 

https://github.com/llvm/llvm-project/pull/84475
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[llvm-branch-commits] [lld] [llvm] Backport fixes for ARM64EC import libraries (PR #84590)

[Daniel Paoliello via llvm-branch-commits]

dpaoliello wrote:

Sorry, I've got to disagree with this: this is blocking Rust's use of Arm64EC 
since it can generate import libraries on-the-fly using this functionality 
(rather than requiring that users install the Windows SDK).

I've tested Arm64EC with Rust, and this is the only blocking issue that I've 
found.

https://github.com/llvm/llvm-project/pull/84590
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[llvm-branch-commits] [llvm] Backport ARM64EC variadic args fixes to LLVM 18 (PR #81800)

[Daniel Paoliello via llvm-branch-commits]

https://github.com/dpaoliello updated 
https://github.com/llvm/llvm-project/pull/81800

>From d7a9810f9c14e6598265ab41519be9b861228450 Mon Sep 17 00:00:00 2001
From: Billy Laws 
Date: Wed, 31 Jan 2024 02:32:15 +
Subject: [PATCH 1/3] [AArch64] Fix variadic tail-calls on ARM64EC (#79774)

ARM64EC varargs calls expect that x4 = sp at entry, special handling is
needed to ensure this with tail calls since they occur after the
epilogue and the x4 write happens before.

I tried going through AArch64MachineFrameLowering for this, hoping to
avoid creating the dummy object but this was the best I could do since
the stack info that uses isn't populated at this stage,
CreateFixedObject also explicitly forbids 0 sized objects.
---
 .../Target/AArch64/AArch64ISelLowering.cpp| 10 -
 llvm/test/CodeGen/AArch64/arm64ec-varargs.ll  | 37 +++
 llvm/test/CodeGen/AArch64/vararg-tallcall.ll  |  8 
 3 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp 
b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 0287856560e91a..196aa50cf4060b 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -8007,11 +8007,19 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
   }
 
   if (IsVarArg && Subtarget->isWindowsArm64EC()) {
+SDValue ParamPtr = StackPtr;
+if (IsTailCall) {
+  // Create a dummy object at the top of the stack that can be used to get
+  // the SP after the epilogue
+  int FI = MF.getFrameInfo().CreateFixedObject(1, FPDiff, true);
+  ParamPtr = DAG.getFrameIndex(FI, PtrVT);
+}
+
 // For vararg calls, the Arm64EC ABI requires values in x4 and x5
 // describing the argument list.  x4 contains the address of the
 // first stack parameter. x5 contains the size in bytes of all parameters
 // passed on the stack.
-RegsToPass.emplace_back(AArch64::X4, StackPtr);
+RegsToPass.emplace_back(AArch64::X4, ParamPtr);
 RegsToPass.emplace_back(AArch64::X5,
 DAG.getConstant(NumBytes, DL, MVT::i64));
   }
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll 
b/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
index dc16b3a1a0f270..844fc52ddade63 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-varargs.ll
@@ -100,5 +100,42 @@ define void @varargs_many_argscalleer() nounwind {
   ret void
 }
 
+define void @varargs_caller_tail() nounwind {
+; CHECK-LABEL: varargs_caller_tail:
+; CHECK:// %bb.0:
+; CHECK-NEXT:sub sp, sp, #48
+; CHECK-NEXT:mov x4, sp
+; CHECK-NEXT:add x8, sp, #16
+; CHECK-NEXT:mov x9, #4617315517961601024// 
=0x4014
+; CHECK-NEXT:mov x0, #4607182418800017408// 
=0x3ff0
+; CHECK-NEXT:mov w1, #2  // =0x2
+; CHECK-NEXT:mov x2, #4613937818241073152// 
=0x4008
+; CHECK-NEXT:mov w3, #4  // =0x4
+; CHECK-NEXT:mov w5, #16 // =0x10
+; CHECK-NEXT:stp xzr, x30, [sp, #24] // 8-byte Folded 
Spill
+; CHECK-NEXT:stp x9, x8, [sp]
+; CHECK-NEXT:str xzr, [sp, #16]
+; CHECK-NEXT:.weak_anti_dep  varargs_callee
+; CHECK-NEXT:.set varargs_callee, "#varargs_callee"@WEAKREF
+; CHECK-NEXT:.weak_anti_dep  "#varargs_callee"
+; CHECK-NEXT:.set "#varargs_callee", varargs_callee@WEAKREF
+; CHECK-NEXT:bl  "#varargs_callee"
+; CHECK-NEXT:ldr x30, [sp, #32]  // 8-byte Folded 
Reload
+; CHECK-NEXT:add x4, sp, #48
+; CHECK-NEXT:mov x0, #4607182418800017408// 
=0x3ff0
+; CHECK-NEXT:mov w1, #4  // =0x4
+; CHECK-NEXT:mov w2, #3  // =0x3
+; CHECK-NEXT:mov w3, #2  // =0x2
+; CHECK-NEXT:mov x5, xzr
+; CHECK-NEXT:add sp, sp, #48
+; CHECK-NEXT:.weak_anti_dep  varargs_callee
+; CHECK-NEXT:.set varargs_callee, "#varargs_callee"@WEAKREF
+; CHECK-NEXT:.weak_anti_dep  "#varargs_callee"
+; CHECK-NEXT:.set "#varargs_callee", varargs_callee@WEAKREF
+; CHECK-NEXT:b   "#varargs_callee"
+  call void (double, ...) @varargs_callee(double 1.0, i32 2, double 3.0, i32 
4, double 5.0, <2 x double> )
+  tail call void (double, ...) @varargs_callee(double 1.0, i32 4, i32 3, i32 2)
+  ret void
+}
 
 declare void @llvm.va_start(ptr)
diff --git a/llvm/test/CodeGen/AArch64/vararg-tallcall.ll 
b/llvm/test/CodeGen/AArch64/vararg-tallcall.ll
index 2d6db1642247d7..812837639196e6 100644
--- a/llvm/test/CodeGen/AArch64/vararg-tallcall.ll
+++ b/llvm/test/CodeGen/AArch64/vararg-tallcall.ll
@@ -1,5 +1,6 @@
 ; RUN: llc -mtriple=aarch64-windows-msvc %s -o - | FileCheck %s

[llvm-branch-commits] [llvm][lld][RISCV] Support x3_reg_usage (PR #84598)

[Paul Kirth via llvm-branch-commits]

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/84598


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[llvm-branch-commits] [llvm][lld][RISCV] Support x3_reg_usage (PR #84598)

[Paul Kirth via llvm-branch-commits]

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/84598


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[llvm-branch-commits] [lld] release/18.x: [LLD] [COFF] Set the right alignment for DelayDirectoryChunk (#84697) (PR #84844)

[via llvm-branch-commits]

https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/84844
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[llvm-branch-commits] [lld] release/18.x: [LLD] [COFF] Set the right alignment for DelayDirectoryChunk (#84697) (PR #84844)

[via llvm-branch-commits]

https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/84844

Backport c93c76b562784926b22a69d3f82a5032dcb4a274

Requested by: @mstorsjo

>From 021ae6a2ceb1c9067f16ca8a6ae5c1bad3aba235 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20Storsj=C3=B6?= 
Date: Tue, 12 Mar 2024 00:03:26 +0200
Subject: [PATCH] [LLD] [COFF] Set the right alignment for DelayDirectoryChunk
 (#84697)

This makes a difference when linking executables with delay loaded
libraries for arm32; the delay loader implementation can load data from
the registry with instructions that assume alignment.

This issue does not show up when linking in MinGW mode, because a
PseudoRelocTableChunk gets injected, which also sets alignment, even if
the chunk itself is empty.

(cherry picked from commit c93c76b562784926b22a69d3f82a5032dcb4a274)
---
 lld/COFF/DLL.cpp  |  2 +-
 lld/test/COFF/delayimports-armnt.yaml | 25 +++--
 2 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/lld/COFF/DLL.cpp b/lld/COFF/DLL.cpp
index 6b516d8c6d5ef8..c4388ba9e40d0b 100644
--- a/lld/COFF/DLL.cpp
+++ b/lld/COFF/DLL.cpp
@@ -172,7 +172,7 @@ binImports(COFFLinkerContext &ctx,
 // A chunk for the delay import descriptor table etnry.
 class DelayDirectoryChunk : public NonSectionChunk {
 public:
-  explicit DelayDirectoryChunk(Chunk *n) : dllName(n) {}
+  explicit DelayDirectoryChunk(Chunk *n) : dllName(n) { setAlignment(4); }
 
   size_t getSize() const override {
 return sizeof(delay_import_directory_table_entry);
diff --git a/lld/test/COFF/delayimports-armnt.yaml 
b/lld/test/COFF/delayimports-armnt.yaml
index 7d9bc38c5c3606..ea96d864ef53d5 100644
--- a/lld/test/COFF/delayimports-armnt.yaml
+++ b/lld/test/COFF/delayimports-armnt.yaml
@@ -6,6 +6,7 @@
 # RUN: llvm-readobj --coff-imports %t.exe | FileCheck -check-prefix=IMPORT %s
 # RUN: llvm-readobj --coff-basereloc %t.exe | FileCheck -check-prefix=BASEREL 
%s
 # RUN: llvm-objdump --no-print-imm-hex -d %t.exe | FileCheck 
--check-prefix=DISASM %s
+# RUN: llvm-readobj --file-headers %t.exe | FileCheck -check-prefix=DIR %s
 
 # IMPORT:  Format: COFF-ARM
 # IMPORT-NEXT: Arch: thumb
@@ -13,9 +14,9 @@
 # IMPORT-NEXT: DelayImport {
 # IMPORT-NEXT:   Name: library.dll
 # IMPORT-NEXT:   Attributes: 0x1
-# IMPORT-NEXT:   ModuleHandle: 0x3000
-# IMPORT-NEXT:   ImportAddressTable: 0x3008
-# IMPORT-NEXT:   ImportNameTable: 0x2040
+# IMPORT-NEXT:   ModuleHandle: 0x3008
+# IMPORT-NEXT:   ImportAddressTable: 0x3010
+# IMPORT-NEXT:   ImportNameTable: 0x2044
 # IMPORT-NEXT:   BoundDelayImportTable: 0x0
 # IMPORT-NEXT:   UnloadDelayImportTable: 0x0
 # IMPORT-NEXT:   Import {
@@ -43,7 +44,7 @@
 # BASEREL-NEXT:   }
 # BASEREL-NEXT:   Entry {
 # BASEREL-NEXT: Type: HIGHLOW
-# BASEREL-NEXT: Address: 0x3008
+# BASEREL-NEXT: Address: 0x3010
 # BASEREL-NEXT:   }
 # BASEREL-NEXT:   Entry {
 # BASEREL-NEXT: Type: ABSOLUTE
@@ -52,20 +53,24 @@
 # BASEREL-NEXT: ]
 #
 # DISASM:00401000 <.text>:
-# DISASM:  40100c:   f243 0c08   movw r12, #12296
+# DISASM:  40100c:   f243 0c10   movw r12, #12304
 # DISASM-NEXT:   f2c0 0c40   movtr12, #64
 # DISASM-NEXT:   f000 b800   b.w {{.+}} @ imm = #0
 # DISASM-NEXT:   e92d 480f   push.w  {r0, r1, r2, r3, r11, lr}
 # DISASM-NEXT:   f20d 0b10   addwr11, sp, #16
 # DISASM-NEXT:   ed2d 0b10   vpush   {d0, d1, d2, d3, d4, d5, 
d6, d7}
 # DISASM-NEXT:   4661mov r1, r12
-# DISASM-NEXT:   f242    movw r0, #8192
+# DISASM-NEXT:   f242 0004   movw r0, #8196
 # DISASM-NEXT:   f2c0 0040   movtr0, #64
 # DISASM-NEXT:   f7ff ffe7   bl  0x401000 <.text>
 # DISASM-NEXT:   4684mov r12, r0
 # DISASM-NEXT:   ecbd 0b10   vpop{d0, d1, d2, d3, d4, d5, 
d6, d7}
 # DISASM-NEXT:   e8bd 480f   pop.w   {r0, r1, r2, r3, r11, lr}
 # DISASM-NEXT:   4760bx  r12
+#
+# DIR: DelayImportDescriptorRVA: 0x2004
+# DIR-NEXT:DelayImportDescriptorSize: 0x40
+
 
 --- !COFF
 header:
@@ -80,6 +85,14 @@ sections:
   - VirtualAddress:  0
 SymbolName:  __imp_function
 Type:IMAGE_REL_ARM_MOV32T
+  - Name:.rdata
+Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_READ ]
+Alignment:   1
+SectionData: 01
+  - Name:.data
+Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_READ, 
IMAGE_SCN_MEM_WRITE ]
+Alignment:   1
+SectionData: 02
 symbols:
   - Name:.text
 Value:   0

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[llvm-branch-commits] [lld] release/18.x: [LLD] [COFF] Set the right alignment for DelayDirectoryChunk (#84697) (PR #84844)

[via llvm-branch-commits]

llvmbot wrote:

@cjacek What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/84844
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[llvm-branch-commits] [lld] release/18.x: [LLD] [COFF] Set the right alignment for DelayDirectoryChunk (#84697) (PR #84844)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-lld

Author: None (llvmbot)


Changes

Backport c93c76b562784926b22a69d3f82a5032dcb4a274

Requested by: @mstorsjo

---
Full diff: https://github.com/llvm/llvm-project/pull/84844.diff


2 Files Affected:

- (modified) lld/COFF/DLL.cpp (+1-1) 
- (modified) lld/test/COFF/delayimports-armnt.yaml (+19-6) 


``diff
diff --git a/lld/COFF/DLL.cpp b/lld/COFF/DLL.cpp
index 6b516d8c6d5ef8..c4388ba9e40d0b 100644
--- a/lld/COFF/DLL.cpp
+++ b/lld/COFF/DLL.cpp
@@ -172,7 +172,7 @@ binImports(COFFLinkerContext &ctx,
 // A chunk for the delay import descriptor table etnry.
 class DelayDirectoryChunk : public NonSectionChunk {
 public:
-  explicit DelayDirectoryChunk(Chunk *n) : dllName(n) {}
+  explicit DelayDirectoryChunk(Chunk *n) : dllName(n) { setAlignment(4); }
 
   size_t getSize() const override {
 return sizeof(delay_import_directory_table_entry);
diff --git a/lld/test/COFF/delayimports-armnt.yaml 
b/lld/test/COFF/delayimports-armnt.yaml
index 7d9bc38c5c3606..ea96d864ef53d5 100644
--- a/lld/test/COFF/delayimports-armnt.yaml
+++ b/lld/test/COFF/delayimports-armnt.yaml
@@ -6,6 +6,7 @@
 # RUN: llvm-readobj --coff-imports %t.exe | FileCheck -check-prefix=IMPORT %s
 # RUN: llvm-readobj --coff-basereloc %t.exe | FileCheck -check-prefix=BASEREL 
%s
 # RUN: llvm-objdump --no-print-imm-hex -d %t.exe | FileCheck 
--check-prefix=DISASM %s
+# RUN: llvm-readobj --file-headers %t.exe | FileCheck -check-prefix=DIR %s
 
 # IMPORT:  Format: COFF-ARM
 # IMPORT-NEXT: Arch: thumb
@@ -13,9 +14,9 @@
 # IMPORT-NEXT: DelayImport {
 # IMPORT-NEXT:   Name: library.dll
 # IMPORT-NEXT:   Attributes: 0x1
-# IMPORT-NEXT:   ModuleHandle: 0x3000
-# IMPORT-NEXT:   ImportAddressTable: 0x3008
-# IMPORT-NEXT:   ImportNameTable: 0x2040
+# IMPORT-NEXT:   ModuleHandle: 0x3008
+# IMPORT-NEXT:   ImportAddressTable: 0x3010
+# IMPORT-NEXT:   ImportNameTable: 0x2044
 # IMPORT-NEXT:   BoundDelayImportTable: 0x0
 # IMPORT-NEXT:   UnloadDelayImportTable: 0x0
 # IMPORT-NEXT:   Import {
@@ -43,7 +44,7 @@
 # BASEREL-NEXT:   }
 # BASEREL-NEXT:   Entry {
 # BASEREL-NEXT: Type: HIGHLOW
-# BASEREL-NEXT: Address: 0x3008
+# BASEREL-NEXT: Address: 0x3010
 # BASEREL-NEXT:   }
 # BASEREL-NEXT:   Entry {
 # BASEREL-NEXT: Type: ABSOLUTE
@@ -52,20 +53,24 @@
 # BASEREL-NEXT: ]
 #
 # DISASM:00401000 <.text>:
-# DISASM:  40100c:   f243 0c08   movw r12, #12296
+# DISASM:  40100c:   f243 0c10   movw r12, #12304
 # DISASM-NEXT:   f2c0 0c40   movtr12, #64
 # DISASM-NEXT:   f000 b800   b.w {{.+}} @ imm = #0
 # DISASM-NEXT:   e92d 480f   push.w  {r0, r1, r2, r3, r11, lr}
 # DISASM-NEXT:   f20d 0b10   addwr11, sp, #16
 # DISASM-NEXT:   ed2d 0b10   vpush   {d0, d1, d2, d3, d4, d5, 
d6, d7}
 # DISASM-NEXT:   4661mov r1, r12
-# DISASM-NEXT:   f242    movw r0, #8192
+# DISASM-NEXT:   f242 0004   movw r0, #8196
 # DISASM-NEXT:   f2c0 0040   movtr0, #64
 # DISASM-NEXT:   f7ff ffe7   bl  0x401000 <.text>
 # DISASM-NEXT:   4684mov r12, r0
 # DISASM-NEXT:   ecbd 0b10   vpop{d0, d1, d2, d3, d4, d5, 
d6, d7}
 # DISASM-NEXT:   e8bd 480f   pop.w   {r0, r1, r2, r3, r11, lr}
 # DISASM-NEXT:   4760bx  r12
+#
+# DIR: DelayImportDescriptorRVA: 0x2004
+# DIR-NEXT:DelayImportDescriptorSize: 0x40
+
 
 --- !COFF
 header:
@@ -80,6 +85,14 @@ sections:
   - VirtualAddress:  0
 SymbolName:  __imp_function
 Type:IMAGE_REL_ARM_MOV32T
+  - Name:.rdata
+Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_READ ]
+Alignment:   1
+SectionData: 01
+  - Name:.data
+Characteristics: [ IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_MEM_READ, 
IMAGE_SCN_MEM_WRITE ]
+Alignment:   1
+SectionData: 02
 symbols:
   - Name:.text
 Value:   0

``




https://github.com/llvm/llvm-project/pull/84844
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[llvm-branch-commits] [lld] [llvm][lld][RISCV] Support x3_reg_usage (PR #84598)

[Paul Kirth via llvm-branch-commits]

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/84598

>From 7c9298eea6d8239f9afedc3d6aabb1ec0f71e273 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 11 Mar 2024 15:35:59 -0700
Subject: [PATCH] Update callsite parameter

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index b2e0ba17e4efe5..5eb2ce3d64513a 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1228,8 +1228,8 @@ mergeAttributesSection(const SmallVector §ions) {
   if (r.second) {
 firstX3RegUse = sec;
   } else {
-mergeX3RegUse(merged.intAttr, firstX3RegUse, sec,
-  r.first->getSecond(), *i);
+mergeX3RegUse(r.first, firstX3RegUse, sec, r.first->getSecond(),
+  *i);
   }
 }
 continue;

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[llvm-branch-commits] [lld] [llvm] Backport fixes for ARM64EC import libraries (PR #84590)

[Eli Friedman via llvm-branch-commits]

efriedma-quic wrote:

So your use-case is basically equivalent to using llvm-dlltool, except not 
using the text parser?

If this is actually enough to make Rust targets usable, then I guess we could 
consider it, but the fixes aren't structured in a way to make it obvious this 
won't impact non-ARM64EC targets.

https://github.com/llvm/llvm-project/pull/84590
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[llvm-branch-commits] [lld] [llvm][lld][RISCV] Support x3_reg_usage (PR #84598)

[Paul Kirth via llvm-branch-commits]

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/84598

>From 7c9298eea6d8239f9afedc3d6aabb1ec0f71e273 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 11 Mar 2024 15:35:59 -0700
Subject: [PATCH] Update callsite parameter

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index b2e0ba17e4efe5..5eb2ce3d64513a 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1228,8 +1228,8 @@ mergeAttributesSection(const SmallVector §ions) {
   if (r.second) {
 firstX3RegUse = sec;
   } else {
-mergeX3RegUse(merged.intAttr, firstX3RegUse, sec,
-  r.first->getSecond(), *i);
+mergeX3RegUse(r.first, firstX3RegUse, sec, r.first->getSecond(),
+  *i);
   }
 }
 continue;

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[llvm-branch-commits] [lld] [llvm][lld][RISCV] Support x3_reg_usage (PR #84598)

[Paul Kirth via llvm-branch-commits]

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/84598

>From 7c9298eea6d8239f9afedc3d6aabb1ec0f71e273 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 11 Mar 2024 15:35:59 -0700
Subject: [PATCH] Update callsite parameter

Created using spr 1.3.4
---
 lld/ELF/Arch/RISCV.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lld/ELF/Arch/RISCV.cpp b/lld/ELF/Arch/RISCV.cpp
index b2e0ba17e4efe5..5eb2ce3d64513a 100644
--- a/lld/ELF/Arch/RISCV.cpp
+++ b/lld/ELF/Arch/RISCV.cpp
@@ -1228,8 +1228,8 @@ mergeAttributesSection(const SmallVector §ions) {
   if (r.second) {
 firstX3RegUse = sec;
   } else {
-mergeX3RegUse(merged.intAttr, firstX3RegUse, sec,
-  r.first->getSecond(), *i);
+mergeX3RegUse(r.first, firstX3RegUse, sec, r.first->getSecond(),
+  *i);
   }
 }
 continue;

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[llvm-branch-commits] [lld] [llvm][lld][RISCV] Support x3_reg_usage (PR #84598)

[Paul Kirth via llvm-branch-commits]

@@ -520,3 +520,8 @@ define i8 @atomic_load_i8_seq_cst(ptr %a) nounwind {
 ; A6S: .attribute 14, 2
 ; A6C: .attribute 14, 1
 }
+

ilovepi wrote:

Sorry, I'm a little stuck on how to infer the attribute. This function will get 
a test once I have that figured out.

https://github.com/llvm/llvm-project/pull/84598
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[llvm-branch-commits] [IR] Introduce `llvm.experimental.hot()` (PR #84850)

[Vitaly Buka via llvm-branch-commits]

https://github.com/vitalybuka created 
https://github.com/llvm/llvm-project/pull/84850

None


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[llvm-branch-commits] [InstCombiner] Remove unused `llvm.experimental.hot()` (PR #84851)

[Vitaly Buka via llvm-branch-commits]

https://github.com/vitalybuka created 
https://github.com/llvm/llvm-project/pull/84851

Intrinsic declared to have sideeffects, but it's done only to prevent
moving it. Removing unused ones is OK.



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[llvm-branch-commits] [clang][CodeGen] Remove SimplifyCFGPass preceding RemoveTrapsPass (PR #84852)

[Vitaly Buka via llvm-branch-commits]

https://github.com/vitalybuka created 
https://github.com/llvm/llvm-project/pull/84852

There is no performance difference after switching to
`llvm.experimental.hot`.



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[llvm-branch-commits] Rename `remove-traps` to `lower-builtin-hot` (PR #84853)

[Vitaly Buka via llvm-branch-commits]

https://github.com/vitalybuka created 
https://github.com/llvm/llvm-project/pull/84853

None


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[llvm-branch-commits] [IR] Introduce `llvm.experimental.hot()` (PR #84850)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-llvm-selectiondag

Author: Vitaly Buka (vitalybuka)


Changes



---
Full diff: https://github.com/llvm/llvm-project/pull/84850.diff


4 Files Affected:

- (modified) llvm/docs/LangRef.rst (+48) 
- (modified) llvm/include/llvm/IR/Intrinsics.td (+5) 
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (+6) 
- (added) llvm/test/CodeGen/Generic/builtin-hot.ll (+19) 


``diff
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index d613ceea8654f8..36f4c964ee296c 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -27639,6 +27639,54 @@ constant `true`. However it is always correct to 
replace
 it with any other `i1` value. Any pass can
 freely do it if it can benefit from non-default lowering.
 
+'``llvm.experimental.hot``' Intrinsic
+^
+
+Syntax:
+"""
+
+::
+
+  declare i1 @llvm.experimental.hot()
+
+Overview:
+"
+
+This intrinsic returns true iff it's known that containing basic block is hot 
in
+profile.
+
+When used with profile based optimization allows to change program behaviour
+deppending on the code hotness.
+
+Arguments:
+""
+
+None.
+
+Semantics:
+""
+
+The intrinsic ``@llvm.experimental.hot()`` returns either `true` or `false`,
+deppending on profile used. Expresion is evaluated as `true` iff profile and
+summary are availible and profile counter for the block reach hotness 
threshold.
+For each evaluation of a call to this intrinsic, the program must be valid and
+correct both if it returns `true` and if it returns `false`.
+
+When used in a branch condition, it allows us to choose between
+two alternative correct solutions for the same problem, like
+in example below:
+
+.. code-block:: text
+
+%cond = call i1 @llvm.experimental.hot()
+br i1 %cond, label %fast_path, label %slow_path
+
+  label %fast_path:
+; Omit diagnostics.
+
+  label %slow_path:
+; Additional diagnostics.
+
 
 '``llvm.load.relative``' Intrinsic
 ^^
diff --git a/llvm/include/llvm/IR/Intrinsics.td 
b/llvm/include/llvm/IR/Intrinsics.td
index 144298fd7c0162..96e9cdf6627a75 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -1722,6 +1722,11 @@ def int_debugtrap : Intrinsic<[]>,
 def int_ubsantrap : Intrinsic<[], [llvm_i8_ty],
   [IntrNoReturn, IntrCold, ImmArg>]>;
 
+// Return true if profile counter for containing block is hot.
+def int_experimental_hot : Intrinsic<[llvm_i1_ty], [],
+  [IntrInaccessibleMemOnly, IntrWriteMem,
+   IntrWillReturn, NoUndef]>;
+
 // Support for dynamic deoptimization (or de-specialization)
 def int_experimental_deoptimize : Intrinsic<[llvm_any_ty], [llvm_vararg_ty],
 [Throws]>;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 
b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 22e57d0d99e9b1..8e73433ce82ea5 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -7276,6 +7276,12 @@ void SelectionDAGBuilder::visitIntrinsicCall(const 
CallInst &I,
 setValue(&I, getValue(I.getArgOperand(0)));
 return;
 
+  case Intrinsic::experimental_hot:
+// Default lowering to false. It's intended to be lowered as soon as 
profile
+// is avalible to unblock other optimizations.
+setValue(&I, DAG.getConstant(0, sdl, MVT::i1));
+return;
+
   case Intrinsic::ubsantrap:
   case Intrinsic::debugtrap:
   case Intrinsic::trap: {
diff --git a/llvm/test/CodeGen/Generic/builtin-hot.ll 
b/llvm/test/CodeGen/Generic/builtin-hot.ll
new file mode 100644
index 00..449f58d3c00675
--- /dev/null
+++ b/llvm/test/CodeGen/Generic/builtin-hot.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 
UTC_ARGS: --version 4
+; RUN: llc -o - %s | FileCheck %s
+
+; REQUIRES: aarch64-registered-target
+
+target triple = "aarch64-linux"
+
+define i1 @test()  {
+; CHECK-LABEL: test:
+; CHECK:   // %bb.0: // %entry
+; CHECK-NEXT:mov w0, wzr
+; CHECK-NEXT:ret
+entry:
+  %hot = call i1 @llvm.experimental.hot()
+  ret i1 %hot
+}
+
+declare i1 @llvm.expect.hot() nounwind
+

``




https://github.com/llvm/llvm-project/pull/84850
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[llvm-branch-commits] [InstCombiner] Remove unused `llvm.experimental.hot()` (PR #84851)

[via llvm-branch-commits]

llvmbot wrote:




@llvm/pr-subscribers-clang-codegen

Author: Vitaly Buka (vitalybuka)


Changes

Intrinsic declared to have sideeffects, but it's done only to prevent
moving it. Removing unused ones is OK.


---

Patch is 21.91 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/84851.diff


7 Files Affected:

- (modified) clang/lib/CodeGen/BackendUtil.cpp (+3-3) 
- (modified) clang/lib/CodeGen/CGExpr.cpp (+14-1) 
- (modified) clang/test/CodeGen/remote-traps.c (+20-3) 
- (modified) llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp (+8) 
- (modified) llvm/lib/Transforms/Instrumentation/RemoveTrapsPass.cpp (+15-11) 
- (added) llvm/test/Transforms/InstCombine/builtin-hot.ll (+25) 
- (modified) llvm/test/Transforms/RemoveTraps/remove-traps.ll (+64-25) 


``diff
diff --git a/clang/lib/CodeGen/BackendUtil.cpp 
b/clang/lib/CodeGen/BackendUtil.cpp
index 82b30b8d815629..7e53469a48d42c 100644
--- a/clang/lib/CodeGen/BackendUtil.cpp
+++ b/clang/lib/CodeGen/BackendUtil.cpp
@@ -100,9 +100,9 @@ using namespace llvm;
 namespace llvm {
 extern cl::opt PrintPipelinePasses;
 
-cl::opt ClRemoveTraps("clang-remove-traps", cl::Optional,
-cl::desc("Insert remove-traps pass."),
-cl::init(false));
+static cl::opt ClRemoveTraps("clang-remove-traps", cl::Optional,
+   cl::desc("Insert remove-traps pass."),
+   cl::init(false));
 
 // Experiment to move sanitizers earlier.
 static cl::opt ClSanitizeOnOptimizerEarlyEP(
diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp
index 59a7fe8925001c..3a27622f165995 100644
--- a/clang/lib/CodeGen/CGExpr.cpp
+++ b/clang/lib/CodeGen/CGExpr.cpp
@@ -56,7 +56,14 @@ using namespace CodeGen;
 // Experiment to make sanitizers easier to debug
 static llvm::cl::opt ClSanitizeDebugDeoptimization(
 "ubsan-unique-traps", llvm::cl::Optional,
-llvm::cl::desc("Deoptimize traps for UBSAN so there is 1 trap per check"),
+llvm::cl::desc("Deoptimize traps for UBSAN so there is 1 trap per check."),
+llvm::cl::init(false));
+
+// TODO: Introduce frontend options to enabled per sanitizers, similar to
+// `fsanitize-trap`.
+static llvm::cl::opt ClSanitizeExpHot(
+"ubsan-exp-hot", llvm::cl::Optional,
+llvm::cl::desc("Pass UBSAN checks if `llvm.experimental.hot()` is true."),
 llvm::cl::init(false));
 
 //======//
@@ -3805,6 +3812,12 @@ void CodeGenFunction::EmitTrapCheck(llvm::Value *Checked,
 SanitizerHandler CheckHandlerID) {
   llvm::BasicBlock *Cont = createBasicBlock("cont");
 
+  if (ClSanitizeExpHot) {
+Checked =
+Builder.CreateOr(Checked, Builder.CreateCall(CGM.getIntrinsic(
+  llvm::Intrinsic::experimental_hot)));
+  }
+
   // If we're optimizing, collapse all calls to trap down to just one per
   // check-type per function to save on code size.
   if ((int)TrapBBs.size() <= CheckHandlerID)
diff --git a/clang/test/CodeGen/remote-traps.c 
b/clang/test/CodeGen/remote-traps.c
index 6751afb96d25f2..16e4ebecb5c326 100644
--- a/clang/test/CodeGen/remote-traps.c
+++ b/clang/test/CodeGen/remote-traps.c
@@ -1,5 +1,7 @@
-// RUN: %clang_cc1 -O1 -emit-llvm -fsanitize=signed-integer-overflow 
-fsanitize-trap=signed-integer-overflow %s -o - | FileCheck %s 
-// RUN: %clang_cc1 -O1 -emit-llvm -fsanitize=signed-integer-overflow 
-fsanitize-trap=signed-integer-overflow -mllvm -clang-remove-traps -mllvm 
-remove-traps-random-rate=1 %s -o - | FileCheck %s --implicit-check-not="call 
void @llvm.ubsantrap" --check-prefixes=REMOVE
+// RUN: %clang_cc1 -O1 %s -o - -emit-llvm -fsanitize=signed-integer-overflow 
-fsanitize-trap=signed-integer-overflow -mllvm -ubsan-exp-hot | FileCheck %s 
+// RUN: %clang_cc1 -O1 %s -o - -emit-llvm -fsanitize=signed-integer-overflow 
-fsanitize-trap=signed-integer-overflow -mllvm -ubsan-exp-hot -mllvm 
-clang-remove-traps -mllvm -remove-traps-random-rate=1 %s -o - | FileCheck %s 
--check-prefixes=REMOVE
+
+#include 
 
 int test(int x) {
   return x + 123;
@@ -12,4 +14,19 @@ int test(int x) {
 // CHECK-NEXT: unreachable
 
 // REMOVE-LABEL: define {{.*}}i32 @test(
-// REMOVE: call { i32, i1 } @llvm.sadd.with.overflow.i32(
+// REMOVE: add i32 %x, 123
+// REMOVE-NEXT: ret i32
+
+
+bool experimental_hot() __asm("llvm.experimental.hot");
+
+bool test_asm() {
+  return experimental_hot();
+}
+
+// CHECK-LABEL: define {{.*}}i1 @test_asm(
+// CHECK: [[R:%.*]] = tail call zeroext i1 @llvm.experimental.hot()
+// CHECK: ret i1 [[R]]
+
+// REMOVE-LABEL: define {{.*}}i1 @test_asm(
+// REMOVE: ret i1 true
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index f5f3716d390d77..a7f2b0216bfa00 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transform