[llvm-branch-commits] [clang] [PAC][Driver] Support ptrauth flags only on ARM64 Darwin or with pauthtest ABI (PR #113152)
https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/113152
>From f435790b75909026e22d8422d368202b7b5be4c9 Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Mon, 21 Oct 2024 12:18:56 +0300
Subject: [PATCH 1/3] [PAC][Driver] Support ptrauth flags only on ARM64 Darwin
Most ptrauth flags are ABI-affecting, so they should not be exposed to
end users. Under certain conditions, some ptrauth driver flags are intended
to be used for ARM64 Darwin, so allow them in this case.
Leave `-faarch64-jump-table-hardening` available for all AArch64 targets
since it's not ABI-affecting.
---
clang/lib/Driver/ToolChains/Clang.cpp | 28
clang/lib/Driver/ToolChains/Darwin.cpp | 37 +++
clang/lib/Driver/ToolChains/Linux.cpp | 53 +++
clang/test/Driver/aarch64-ptrauth.c| 91 +-
4 files changed, 93 insertions(+), 116 deletions(-)
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp
b/clang/lib/Driver/ToolChains/Clang.cpp
index fc83a2f894120c..552b7e6da23115 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -1808,34 +1808,6 @@ void Clang::AddAArch64TargetArgs(const ArgList &Args,
AddUnalignedAccessWarning(CmdArgs);
- Args.addOptInFlag(CmdArgs, options::OPT_fptrauth_intrinsics,
-options::OPT_fno_ptrauth_intrinsics);
- Args.addOptInFlag(CmdArgs, options::OPT_fptrauth_calls,
-options::OPT_fno_ptrauth_calls);
- Args.addOptInFlag(CmdArgs, options::OPT_fptrauth_returns,
-options::OPT_fno_ptrauth_returns);
- Args.addOptInFlag(CmdArgs, options::OPT_fptrauth_auth_traps,
-options::OPT_fno_ptrauth_auth_traps);
- Args.addOptInFlag(
- CmdArgs, options::OPT_fptrauth_vtable_pointer_address_discrimination,
- options::OPT_fno_ptrauth_vtable_pointer_address_discrimination);
- Args.addOptInFlag(
- CmdArgs, options::OPT_fptrauth_vtable_pointer_type_discrimination,
- options::OPT_fno_ptrauth_vtable_pointer_type_discrimination);
- Args.addOptInFlag(
- CmdArgs, options::OPT_fptrauth_type_info_vtable_pointer_discrimination,
- options::OPT_fno_ptrauth_type_info_vtable_pointer_discrimination);
- Args.addOptInFlag(
- CmdArgs, options::OPT_fptrauth_function_pointer_type_discrimination,
- options::OPT_fno_ptrauth_function_pointer_type_discrimination);
-
- Args.addOptInFlag(CmdArgs, options::OPT_fptrauth_indirect_gotos,
-options::OPT_fno_ptrauth_indirect_gotos);
- Args.addOptInFlag(CmdArgs, options::OPT_fptrauth_init_fini,
-options::OPT_fno_ptrauth_init_fini);
- Args.addOptInFlag(CmdArgs,
-options::OPT_fptrauth_init_fini_address_discrimination,
-options::OPT_fno_ptrauth_init_fini_address_discrimination);
Args.addOptInFlag(CmdArgs, options::OPT_faarch64_jump_table_hardening,
options::OPT_fno_aarch64_jump_table_hardening);
}
diff --git a/clang/lib/Driver/ToolChains/Darwin.cpp
b/clang/lib/Driver/ToolChains/Darwin.cpp
index 87380869f6fdab..b3d6eec664f6c0 100644
--- a/clang/lib/Driver/ToolChains/Darwin.cpp
+++ b/clang/lib/Driver/ToolChains/Darwin.cpp
@@ -3061,6 +3061,40 @@ bool Darwin::isSizedDeallocationUnavailable() const {
return TargetVersion < sizedDeallocMinVersion(OS);
}
+static void addPointerAuthFlags(const llvm::opt::ArgList &DriverArgs,
+llvm::opt::ArgStringList &CC1Args) {
+ DriverArgs.addOptInFlag(CC1Args, options::OPT_fptrauth_intrinsics,
+ options::OPT_fno_ptrauth_intrinsics);
+
+ DriverArgs.addOptInFlag(CC1Args, options::OPT_fptrauth_calls,
+ options::OPT_fno_ptrauth_calls);
+
+ DriverArgs.addOptInFlag(CC1Args, options::OPT_fptrauth_returns,
+ options::OPT_fno_ptrauth_returns);
+
+ DriverArgs.addOptInFlag(CC1Args, options::OPT_fptrauth_auth_traps,
+ options::OPT_fno_ptrauth_auth_traps);
+
+ DriverArgs.addOptInFlag(
+ CC1Args, options::OPT_fptrauth_vtable_pointer_address_discrimination,
+ options::OPT_fno_ptrauth_vtable_pointer_address_discrimination);
+
+ DriverArgs.addOptInFlag(
+ CC1Args, options::OPT_fptrauth_vtable_pointer_type_discrimination,
+ options::OPT_fno_ptrauth_vtable_pointer_type_discrimination);
+
+ DriverArgs.addOptInFlag(
+ CC1Args, options::OPT_fptrauth_type_info_vtable_pointer_discrimination,
+ options::OPT_fno_ptrauth_type_info_vtable_pointer_discrimination);
+
+ DriverArgs.addOptInFlag(
+ CC1Args, options::OPT_fptrauth_function_pointer_type_discrimination,
+ options::OPT_fno_ptrauth_function_pointer_type_discrimination);
+
+ DriverArgs.addOptInFlag(CC1Args, options::OPT_fptrauth_indirect_gotos,
+ options::OPT_fno_ptrauth_indirect_gotos);
+}
+
void Darwin::addClangTargetOptions(
const llvm::opt::ArgList &DriverArgs, llvm::opt::ArgStringList
[llvm-branch-commits] [clang] [PAC][clang] Handle pauthtest environment and ABI in Linux-specific code (PR #113151)
https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/113151
>From 4ff3cdb5c1ee4f45f0b7606c36fd5163335868c0 Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Mon, 21 Oct 2024 12:00:19 +0300
Subject: [PATCH] [PAC][clang] Handle pauthtest environment and ABI in
Linux-specific code
Since pauthtest is a Linux-specific ABI, it should not be handled in
common driver code.
---
clang/lib/Basic/Targets/AArch64.cpp | 9 +-
clang/lib/Basic/Targets/AArch64.h| 11 +++
clang/lib/Basic/Targets/OSTargets.cpp| 1 +
clang/lib/Basic/Targets/OSTargets.h | 6 ++
clang/lib/CodeGen/CodeGenModule.cpp | 2 -
clang/lib/CodeGen/TargetInfo.h | 1 -
clang/lib/Driver/ToolChain.cpp | 1 -
clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 21 -
clang/lib/Driver/ToolChains/Arch/AArch64.h | 3 -
clang/lib/Driver/ToolChains/Clang.cpp| 60 +---
clang/lib/Driver/ToolChains/Linux.cpp| 96
clang/lib/Driver/ToolChains/Linux.h | 7 ++
clang/test/Driver/aarch64-ptrauth.c | 34 +--
13 files changed, 150 insertions(+), 102 deletions(-)
diff --git a/clang/lib/Basic/Targets/AArch64.cpp
b/clang/lib/Basic/Targets/AArch64.cpp
index b7d374c67f33ef..195c3d3bb73168 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -206,8 +206,7 @@ AArch64TargetInfo::AArch64TargetInfo(const llvm::Triple
&Triple,
StringRef AArch64TargetInfo::getABI() const { return ABI; }
bool AArch64TargetInfo::setABI(const std::string &Name) {
- if (Name != "aapcs" && Name != "aapcs-soft" && Name != "darwinpcs" &&
- Name != "pauthtest")
+ if (Name != "aapcs" && Name != "aapcs-soft" && Name != "darwinpcs")
return false;
ABI = Name;
@@ -221,12 +220,6 @@ bool AArch64TargetInfo::validateTarget(DiagnosticsEngine
&Diags) const {
Diags.Report(diag::err_target_unsupported_abi_with_fpu) << ABI;
return false;
}
- if (getTriple().getEnvironment() == llvm::Triple::PAuthTest &&
- getTriple().getOS() != llvm::Triple::Linux) {
-Diags.Report(diag::err_target_unsupported_abi_for_triple)
-<< getTriple().getEnvironmentName() << getTriple().getTriple();
-return false;
- }
return true;
}
diff --git a/clang/lib/Basic/Targets/AArch64.h
b/clang/lib/Basic/Targets/AArch64.h
index 68a8b1ebad8cde..8be3061e7f34a4 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -121,6 +121,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public
TargetInfo {
const llvm::AArch64::ArchInfo *ArchInfo = &llvm::AArch64::ARMV8A;
+protected:
std::string ABI;
public:
@@ -258,6 +259,16 @@ class LLVM_LIBRARY_VISIBILITY AArch64leTargetInfo : public
AArch64TargetInfo {
void setDataLayout() override;
};
+template <>
+inline bool
+LinuxTargetInfo::setABI(const std::string &Name) {
+ if (Name == "pauthtest") {
+ABI = Name;
+return true;
+ }
+ return AArch64leTargetInfo::setABI(Name);
+}
+
class LLVM_LIBRARY_VISIBILITY WindowsARM64TargetInfo
: public WindowsTargetInfo {
const llvm::Triple Triple;
diff --git a/clang/lib/Basic/Targets/OSTargets.cpp
b/clang/lib/Basic/Targets/OSTargets.cpp
index 88c054150ab224..666e2561829dd3 100644
--- a/clang/lib/Basic/Targets/OSTargets.cpp
+++ b/clang/lib/Basic/Targets/OSTargets.cpp
@@ -10,6 +10,7 @@
//===--===//
#include "OSTargets.h"
+#include "AArch64.h"
#include "clang/Basic/MacroBuilder.h"
#include "llvm/ADT/StringRef.h"
diff --git a/clang/lib/Basic/Targets/OSTargets.h
b/clang/lib/Basic/Targets/OSTargets.h
index 75f53e96ce28f6..2b3e69fc06185b 100644
--- a/clang/lib/Basic/Targets/OSTargets.h
+++ b/clang/lib/Basic/Targets/OSTargets.h
@@ -371,6 +371,12 @@ class LLVM_LIBRARY_VISIBILITY LinuxTargetInfo : public
OSTargetInfo {
const char *getStaticInitSectionSpecifier() const override {
return ".text.startup";
}
+
+ // This allows template specializations, see
+ // LinuxTargetInfo::setABI
+ bool setABI(const std::string &Name) override {
+return OSTargetInfo::setABI(Name);
+ }
};
// NetBSD Target
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp
b/clang/lib/CodeGen/CodeGenModule.cpp
index d3d5c0743a520b..e0257081b3a1e9 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -144,8 +144,6 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
return createWindowsAArch64TargetCodeGenInfo(CGM, AArch64ABIKind::Win64);
else if (Target.getABI() == "aapcs-soft")
Kind = AArch64ABIKind::AAPCSSoft;
-else if (Target.getABI() == "pauthtest")
- Kind = AArch64ABIKind::PAuthTest;
return createAArch64TargetCodeGenInfo(CGM, Kind);
}
diff --git a/clang/lib/CodeGen/TargetInfo.h b/clang/lib/CodeGen/TargetInfo.h
index ab3142bdea684e..fea303599bd76d 100644
--- a/clang/lib/CodeGen/TargetInfo.h
+
[llvm-branch-commits] [flang] [llvm] [flang][OpenMP] Semantic checks for IN_REDUCTION and TASK_REDUCTION (PR #118841)
https://github.com/kparzysz created
https://github.com/llvm/llvm-project/pull/118841
Update parsing of these two clauses and add semantic checks for them. Simplify
some code in IsReductionAllowedForType and CheckReductionOperator.
>From 33903894f00ae935f957553368639f1ade51617f Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Fri, 29 Nov 2024 13:45:52 -0600
Subject: [PATCH] [flang][OpenMP] Semantic checks for IN_REDUCTION and
TASK_REDUCTION
Update parsing of these two clauses and add semantic checks for them.
Simplify some code in IsReductionAllowedForType and CheckReductionOperator.
---
flang/include/flang/Parser/dump-parse-tree.h | 3 +
flang/include/flang/Parser/parse-tree.h | 19 +-
flang/lib/Lower/OpenMP/Clauses.cpp| 28 +-
flang/lib/Parser/openmp-parsers.cpp | 19 +-
flang/lib/Parser/unparse.cpp | 11 +-
flang/lib/Semantics/check-omp-structure.cpp | 302 +-
flang/lib/Semantics/check-omp-structure.h | 11 +-
.../Parser/OpenMP/in-reduction-clause.f90 | 12 +-
.../test/Parser/OpenMP/reduction-modifier.f90 | 2 +-
.../Parser/OpenMP/task-reduction-clause.f90 | 23 ++
.../directive-contin-with-pp.F90 | 6 +-
flang/test/Semantics/OpenMP/in-reduction.f90 | 44 +++
flang/test/Semantics/OpenMP/symbol08.f90 | 5 +-
.../test/Semantics/OpenMP/task-reduction.f90 | 44 +++
flang/test/Semantics/OpenMP/taskgroup01.f90 | 2 +
llvm/include/llvm/Frontend/OpenMP/OMP.td | 2 +-
16 files changed, 342 insertions(+), 191 deletions(-)
create mode 100644 flang/test/Parser/OpenMP/task-reduction-clause.f90
create mode 100644 flang/test/Semantics/OpenMP/in-reduction.f90
create mode 100644 flang/test/Semantics/OpenMP/task-reduction.f90
diff --git a/flang/include/flang/Parser/dump-parse-tree.h
b/flang/include/flang/Parser/dump-parse-tree.h
index c6f35a07d81ea5..b87bc5b60cafe9 100644
--- a/flang/include/flang/Parser/dump-parse-tree.h
+++ b/flang/include/flang/Parser/dump-parse-tree.h
@@ -592,7 +592,10 @@ class ParseTreeDumper {
NODE(parser, OmpReductionClause)
NODE(OmpReductionClause, Modifier)
NODE(parser, OmpInReductionClause)
+ NODE(OmpInReductionClause, Modifier)
NODE(parser, OmpReductionCombiner)
+ NODE(parser, OmpTaskReductionClause)
+ NODE(OmpTaskReductionClause, Modifier)
NODE(OmpReductionCombiner, FunctionCombiner)
NODE(parser, OmpReductionInitializerClause)
NODE(parser, OmpReductionIdentifier)
diff --git a/flang/include/flang/Parser/parse-tree.h
b/flang/include/flang/Parser/parse-tree.h
index 8160b095f06dd9..e2530cea3652a2 100644
--- a/flang/include/flang/Parser/parse-tree.h
+++ b/flang/include/flang/Parser/parse-tree.h
@@ -3951,11 +3951,14 @@ struct OmpIfClause {
std::tuple t;
};
-// OMP 5.0 2.19.5.6 in_reduction-clause -> IN_REDUCTION (reduction-identifier:
-// variable-name-list)
+// Ref: [5.0:170-176], [5.1:197-205], [5.2:138-139]
+//
+// in-reduction-clause ->
+//IN_REDUCTION(reduction-identifier: list) // since 5.0
struct OmpInReductionClause {
TUPLE_CLASS_BOILERPLATE(OmpInReductionClause);
- std::tuple t;
+ MODIFIER_BOILERPLATE(OmpReductionIdentifier);
+ std::tuple t;
};
// Ref: [4.5:199-201], [5.0:288-290], [5.1:321-322], [5.2:115-117]
@@ -4070,6 +4073,16 @@ struct OmpScheduleClause {
std::tuple> t;
};
+// Ref: [5.0:232-234], [5.1:264-266], [5.2:137]
+//
+// task-reduction-clause ->
+//TASK_REDUCTION(reduction-identifier: list)// since 5.0
+struct OmpTaskReductionClause {
+ TUPLE_CLASS_BOILERPLATE(OmpTaskReductionClause);
+ MODIFIER_BOILERPLATE(OmpReductionIdentifier);
+ std::tuple t;
+};
+
// Ref: [4.5:107-109], [5.0:176-180], [5.1:205-210], [5.2:167-168]
//
// to-clause (in DECLARE TARGET) ->
diff --git a/flang/lib/Lower/OpenMP/Clauses.cpp
b/flang/lib/Lower/OpenMP/Clauses.cpp
index 10c31963ec493a..a0dc1be0afc5c0 100644
--- a/flang/lib/Lower/OpenMP/Clauses.cpp
+++ b/flang/lib/Lower/OpenMP/Clauses.cpp
@@ -859,10 +859,14 @@ Init make(const parser::OmpClause::Init &inp,
InReduction make(const parser::OmpClause::InReduction &inp,
semantics::SemanticsContext &semaCtx) {
// inp.v -> parser::OmpInReductionClause
- auto &t0 = std::get(inp.v.t);
+ auto &mods = semantics::OmpGetModifiers(inp.v);
+ auto *m0 =
+ semantics::OmpGetUniqueModifier(mods);
auto &t1 = std::get(inp.v.t);
+ assert(m0 && "OmpReductionIdentifier is required");
+
return InReduction{
- {/*ReductionIdentifiers=*/{makeReductionOperator(t0, semaCtx)},
+ {/*ReductionIdentifiers=*/{makeReductionOperator(*m0, semaCtx)},
/*List=*/makeObjects(t1, semaCtx)}};
}
@@ -1155,17 +1159,17 @@ Reduction make(const parser::OmpClause::Reduction &inp,
);
auto &mods = semantics::OmpGetModifiers(inp.v);
- auto *t0 =
+ auto *m0 =
semantics::OmpGetUniqueModifier(mods);
- auto *t1 =
+ auto *m1 =
semantics::OmpGetUniqueModifier(mods);
- auto &t2 =
[llvm-branch-commits] [llvm] [CodeGen][PM] Initialize analyses with isAnalysis=true (PR #118779)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118779
>From 13da564da1a03f2937a1b8b3cbd5da4f46a42f62 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 5 Dec 2024 10:05:30 +
Subject: [PATCH] [CodeGen][PM] Initialize analyses with isAnalysis=true
Analyses should be marked as analyses else they are prone to be ignored
by the legacy analysis cache mechanism and get scheduled redundantly.
---
llvm/lib/CodeGen/GCMetadata.cpp| 2 +-
llvm/lib/CodeGen/LiveDebugVariables.cpp| 2 +-
llvm/lib/CodeGen/LiveIntervals.cpp | 2 +-
llvm/lib/CodeGen/LiveRegMatrix.cpp | 2 +-
llvm/lib/CodeGen/LiveStacks.cpp| 2 +-
llvm/lib/CodeGen/SlotIndexes.cpp | 2 +-
llvm/lib/CodeGen/VirtRegMap.cpp| 2 +-
llvm/lib/Transforms/Utils/LoopSimplify.cpp | 4 ++--
8 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/llvm/lib/CodeGen/GCMetadata.cpp b/llvm/lib/CodeGen/GCMetadata.cpp
index 6d1cc1a58e27df..f33008c9e0f232 100644
--- a/llvm/lib/CodeGen/GCMetadata.cpp
+++ b/llvm/lib/CodeGen/GCMetadata.cpp
@@ -66,7 +66,7 @@ GCFunctionAnalysis::run(Function &F, FunctionAnalysisManager
&FAM) {
}
INITIALIZE_PASS(GCModuleInfo, "collector-metadata",
-"Create Garbage Collector Module Metadata", false, false)
+"Create Garbage Collector Module Metadata", false, true)
//
-
diff --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp
b/llvm/lib/CodeGen/LiveDebugVariables.cpp
index 317d3401f000a4..79085e587ebc45 100644
--- a/llvm/lib/CodeGen/LiveDebugVariables.cpp
+++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp
@@ -82,7 +82,7 @@ INITIALIZE_PASS_BEGIN(LiveDebugVariablesWrapperLegacy,
DEBUG_TYPE,
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_END(LiveDebugVariablesWrapperLegacy, DEBUG_TYPE,
-"Debug Variable Analysis", false, false)
+"Debug Variable Analysis", false, true)
void LiveDebugVariablesWrapperLegacy::getAnalysisUsage(
AnalysisUsage &AU) const {
diff --git a/llvm/lib/CodeGen/LiveIntervals.cpp
b/llvm/lib/CodeGen/LiveIntervals.cpp
index f9ee6e4563f8d6..f38527a3ce6a31 100644
--- a/llvm/lib/CodeGen/LiveIntervals.cpp
+++ b/llvm/lib/CodeGen/LiveIntervals.cpp
@@ -83,7 +83,7 @@ INITIALIZE_PASS_BEGIN(LiveIntervalsWrapperPass,
"liveintervals",
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_END(LiveIntervalsWrapperPass, "liveintervals",
-"Live Interval Analysis", false, false)
+"Live Interval Analysis", false, true)
bool LiveIntervalsWrapperPass::runOnMachineFunction(MachineFunction &MF) {
LIS.Indexes = &getAnalysis().getSI();
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp
b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index bc8c59381a40e1..9744c47d5a8510 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -41,7 +41,7 @@ INITIALIZE_PASS_BEGIN(LiveRegMatrixWrapperLegacy,
"liveregmatrix",
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
INITIALIZE_PASS_END(LiveRegMatrixWrapperLegacy, "liveregmatrix",
-"Live Register Matrix", false, false)
+"Live Register Matrix", false, true)
void LiveRegMatrixWrapperLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
diff --git a/llvm/lib/CodeGen/LiveStacks.cpp b/llvm/lib/CodeGen/LiveStacks.cpp
index 49fe5d6b23452e..e5d2b90578d829 100644
--- a/llvm/lib/CodeGen/LiveStacks.cpp
+++ b/llvm/lib/CodeGen/LiveStacks.cpp
@@ -24,7 +24,7 @@ INITIALIZE_PASS_BEGIN(LiveStacksWrapperLegacy, DEBUG_TYPE,
"Live Stack Slot Analysis", false, false)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_END(LiveStacksWrapperLegacy, DEBUG_TYPE,
-"Live Stack Slot Analysis", false, false)
+"Live Stack Slot Analysis", false, true)
char &llvm::LiveStacksID = LiveStacksWrapperLegacy::ID;
diff --git a/llvm/lib/CodeGen/SlotIndexes.cpp b/llvm/lib/CodeGen/SlotIndexes.cpp
index 1b92a5aa59d18c..8d2832b3fdd56e 100644
--- a/llvm/lib/CodeGen/SlotIndexes.cpp
+++ b/llvm/lib/CodeGen/SlotIndexes.cpp
@@ -45,7 +45,7 @@ SlotIndexes::~SlotIndexes() {
}
INITIALIZE_PASS(SlotIndexesWrapperPass, DEBUG_TYPE, "Slot index numbering",
-false, false)
+false, true)
STATISTIC(NumLocalRenum, "Number of local renumberings");
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index 1352102a93d01b..b28c74600e7a29 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -60,7 +60,7 @@ STATISTIC(NumIdCopies, "Number of identity moves eliminated
after rewriting");
char Vir
[llvm-branch-commits] [llvm] [CodeGen][PM] Initialize analyses with isAnalysis=true (PR #118779)
llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
@llvm/pr-subscribers-debuginfo
Author: Akshat Oke (optimisan)
Changes
Analyses should be marked as analyses.
Otherwise they are prone to get ignored by the legacy analysis cache mechanism
and get scheduled redundantly.
---
Full diff: https://github.com/llvm/llvm-project/pull/118779.diff
8 Files Affected:
- (modified) llvm/lib/CodeGen/GCMetadata.cpp (+1-1)
- (modified) llvm/lib/CodeGen/LiveDebugVariables.cpp (+1-1)
- (modified) llvm/lib/CodeGen/LiveIntervals.cpp (+1-1)
- (modified) llvm/lib/CodeGen/LiveRegMatrix.cpp (+1-1)
- (modified) llvm/lib/CodeGen/LiveStacks.cpp (+1-1)
- (modified) llvm/lib/CodeGen/SlotIndexes.cpp (+1-1)
- (modified) llvm/lib/CodeGen/VirtRegMap.cpp (+1-1)
- (modified) llvm/lib/Transforms/Utils/LoopSimplify.cpp (+2-2)
``diff
diff --git a/llvm/lib/CodeGen/GCMetadata.cpp b/llvm/lib/CodeGen/GCMetadata.cpp
index 6d1cc1a58e27df..f33008c9e0f232 100644
--- a/llvm/lib/CodeGen/GCMetadata.cpp
+++ b/llvm/lib/CodeGen/GCMetadata.cpp
@@ -66,7 +66,7 @@ GCFunctionAnalysis::run(Function &F, FunctionAnalysisManager
&FAM) {
}
INITIALIZE_PASS(GCModuleInfo, "collector-metadata",
-"Create Garbage Collector Module Metadata", false, false)
+"Create Garbage Collector Module Metadata", false, true)
//
-
diff --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp
b/llvm/lib/CodeGen/LiveDebugVariables.cpp
index 317d3401f000a4..79085e587ebc45 100644
--- a/llvm/lib/CodeGen/LiveDebugVariables.cpp
+++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp
@@ -82,7 +82,7 @@ INITIALIZE_PASS_BEGIN(LiveDebugVariablesWrapperLegacy,
DEBUG_TYPE,
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_END(LiveDebugVariablesWrapperLegacy, DEBUG_TYPE,
-"Debug Variable Analysis", false, false)
+"Debug Variable Analysis", false, true)
void LiveDebugVariablesWrapperLegacy::getAnalysisUsage(
AnalysisUsage &AU) const {
diff --git a/llvm/lib/CodeGen/LiveIntervals.cpp
b/llvm/lib/CodeGen/LiveIntervals.cpp
index f9ee6e4563f8d6..f38527a3ce6a31 100644
--- a/llvm/lib/CodeGen/LiveIntervals.cpp
+++ b/llvm/lib/CodeGen/LiveIntervals.cpp
@@ -83,7 +83,7 @@ INITIALIZE_PASS_BEGIN(LiveIntervalsWrapperPass,
"liveintervals",
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_END(LiveIntervalsWrapperPass, "liveintervals",
-"Live Interval Analysis", false, false)
+"Live Interval Analysis", false, true)
bool LiveIntervalsWrapperPass::runOnMachineFunction(MachineFunction &MF) {
LIS.Indexes = &getAnalysis().getSI();
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp
b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index bc8c59381a40e1..9744c47d5a8510 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -41,7 +41,7 @@ INITIALIZE_PASS_BEGIN(LiveRegMatrixWrapperLegacy,
"liveregmatrix",
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
INITIALIZE_PASS_END(LiveRegMatrixWrapperLegacy, "liveregmatrix",
-"Live Register Matrix", false, false)
+"Live Register Matrix", false, true)
void LiveRegMatrixWrapperLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
diff --git a/llvm/lib/CodeGen/LiveStacks.cpp b/llvm/lib/CodeGen/LiveStacks.cpp
index 49fe5d6b23452e..e5d2b90578d829 100644
--- a/llvm/lib/CodeGen/LiveStacks.cpp
+++ b/llvm/lib/CodeGen/LiveStacks.cpp
@@ -24,7 +24,7 @@ INITIALIZE_PASS_BEGIN(LiveStacksWrapperLegacy, DEBUG_TYPE,
"Live Stack Slot Analysis", false, false)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_END(LiveStacksWrapperLegacy, DEBUG_TYPE,
-"Live Stack Slot Analysis", false, false)
+"Live Stack Slot Analysis", false, true)
char &llvm::LiveStacksID = LiveStacksWrapperLegacy::ID;
diff --git a/llvm/lib/CodeGen/SlotIndexes.cpp b/llvm/lib/CodeGen/SlotIndexes.cpp
index 1b92a5aa59d18c..8d2832b3fdd56e 100644
--- a/llvm/lib/CodeGen/SlotIndexes.cpp
+++ b/llvm/lib/CodeGen/SlotIndexes.cpp
@@ -45,7 +45,7 @@ SlotIndexes::~SlotIndexes() {
}
INITIALIZE_PASS(SlotIndexesWrapperPass, DEBUG_TYPE, "Slot index numbering",
-false, false)
+false, true)
STATISTIC(NumLocalRenum, "Number of local renumberings");
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index 1352102a93d01b..b28c74600e7a29 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -60,7 +60,7 @@ STATISTIC(NumIdCopies, "Number of identity moves eliminated
after rewriting");
char VirtRegMapWrapperLegacy::ID = 0;
INITIALIZE_PASS(VirtReg
[llvm-branch-commits] [llvm] [CodeGen][PM] Initialize analyses with isAnalysis=true (PR #118779)
https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/118779 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port LiveStacks analysis to NPM (PR #118778)
llvmbot wrote:
@llvm/pr-subscribers-backend-risc-v
Author: Akshat Oke (optimisan)
Changes
---
Patch is 21.50 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/118778.diff
17 Files Affected:
- (modified) llvm/include/llvm/CodeGen/LiveStacks.h (+39-7)
- (modified) llvm/include/llvm/InitializePasses.h (+1-1)
- (modified) llvm/include/llvm/Passes/MachinePassRegistry.def (+2-1)
- (modified) llvm/lib/CodeGen/CodeGen.cpp (+1-1)
- (modified) llvm/lib/CodeGen/InlineSpiller.cpp (+2-2)
- (modified) llvm/lib/CodeGen/LiveStacks.cpp (+36-9)
- (modified) llvm/lib/CodeGen/MachineVerifier.cpp (+3-2)
- (modified) llvm/lib/CodeGen/RegAllocBasic.cpp (+3-3)
- (modified) llvm/lib/CodeGen/RegAllocGreedy.cpp (+3-3)
- (modified) llvm/lib/CodeGen/RegAllocPBQP.cpp (+3-3)
- (modified) llvm/lib/CodeGen/StackSlotColoring.cpp (+3-3)
- (modified) llvm/lib/CodeGen/VirtRegMap.cpp (+3-3)
- (modified) llvm/lib/Passes/PassBuilder.cpp (+1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp (+3-3)
- (modified) llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
(+1-1)
- (modified) llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp (+1-1)
- (modified) llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp (+1-1)
``diff
diff --git a/llvm/include/llvm/CodeGen/LiveStacks.h
b/llvm/include/llvm/CodeGen/LiveStacks.h
index 2edc2985f0ee66..02c640bfc4a93e 100644
--- a/llvm/include/llvm/CodeGen/LiveStacks.h
+++ b/llvm/include/llvm/CodeGen/LiveStacks.h
@@ -17,6 +17,7 @@
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/InitializePasses.h"
#include "llvm/PassRegistry.h"
#include
@@ -32,7 +33,7 @@ class raw_ostream;
class TargetRegisterClass;
class TargetRegisterInfo;
-class LiveStacks : public MachineFunctionPass {
+class LiveStacks {
const TargetRegisterInfo *TRI = nullptr;
/// Special pool allocator for VNInfo's (LiveInterval val#).
@@ -47,12 +48,6 @@ class LiveStacks : public MachineFunctionPass {
std::map S2RCMap;
public:
- static char ID; // Pass identification, replacement for typeid
-
- LiveStacks() : MachineFunctionPass(ID) {
-initializeLiveStacksPass(*PassRegistry::getPassRegistry());
- }
-
using iterator = SS2IntervalMap::iterator;
using const_iterator = SS2IntervalMap::const_iterator;
@@ -92,6 +87,25 @@ class LiveStacks : public MachineFunctionPass {
VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; }
+ void releaseMemory();
+ /// init - analysis entry point
+ void init(MachineFunction &MF);
+ void print(raw_ostream &O, const Module *M = nullptr) const;
+};
+
+class LiveStacksWrapperLegacy : public MachineFunctionPass {
+ LiveStacks Impl;
+
+public:
+ static char ID; // Pass identification, replacement for typeid
+
+ LiveStacksWrapperLegacy() : MachineFunctionPass(ID) {
+initializeLiveStacksWrapperLegacyPass(*PassRegistry::getPassRegistry());
+ }
+
+ LiveStacks &getLS() { return Impl; }
+ const LiveStacks &getLS() const { return Impl; }
+
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
@@ -102,6 +116,24 @@ class LiveStacks : public MachineFunctionPass {
void print(raw_ostream &O, const Module * = nullptr) const override;
};
+class LiveStacksAnalysis : public AnalysisInfoMixin {
+ static AnalysisKey Key;
+ friend AnalysisInfoMixin;
+
+public:
+ using Result = LiveStacks;
+
+ LiveStacks run(MachineFunction &MF, MachineFunctionAnalysisManager &);
+};
+
+class LiveStacksPrinterPass : public PassInfoMixin {
+ raw_ostream &OS;
+
+public:
+ LiveStacksPrinterPass(raw_ostream &OS) : OS(OS) {}
+ PreservedAnalyses run(MachineFunction &MF,
+MachineFunctionAnalysisManager &AM);
+};
} // end namespace llvm
#endif
diff --git a/llvm/include/llvm/InitializePasses.h
b/llvm/include/llvm/InitializePasses.h
index 1d690165134ca2..87faf111a30cc9 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -158,7 +158,7 @@ void
initializeLiveDebugVariablesWrapperLegacyPass(PassRegistry &);
void initializeLiveIntervalsWrapperPassPass(PassRegistry &);
void initializeLiveRangeShrinkPass(PassRegistry &);
void initializeLiveRegMatrixWrapperLegacyPass(PassRegistry &);
-void initializeLiveStacksPass(PassRegistry &);
+void initializeLiveStacksWrapperLegacyPass(PassRegistry &);
void initializeLiveVariablesWrapperPassPass(PassRegistry &);
void initializeLoadStoreOptPass(PassRegistry &);
void initializeLoadStoreVectorizerLegacyPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 88f57568645eb4..c23e4af1a342bd 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -101,6 +101,7 @@ MACHINE_FUNCTION_ANALYSIS("edge-bundles",
EdgeBundles
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port LiveStacks analysis to NPM (PR #118778)
llvmbot wrote:
@llvm/pr-subscribers-llvm-regalloc
Author: Akshat Oke (optimisan)
Changes
---
Patch is 21.50 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/118778.diff
17 Files Affected:
- (modified) llvm/include/llvm/CodeGen/LiveStacks.h (+39-7)
- (modified) llvm/include/llvm/InitializePasses.h (+1-1)
- (modified) llvm/include/llvm/Passes/MachinePassRegistry.def (+2-1)
- (modified) llvm/lib/CodeGen/CodeGen.cpp (+1-1)
- (modified) llvm/lib/CodeGen/InlineSpiller.cpp (+2-2)
- (modified) llvm/lib/CodeGen/LiveStacks.cpp (+36-9)
- (modified) llvm/lib/CodeGen/MachineVerifier.cpp (+3-2)
- (modified) llvm/lib/CodeGen/RegAllocBasic.cpp (+3-3)
- (modified) llvm/lib/CodeGen/RegAllocGreedy.cpp (+3-3)
- (modified) llvm/lib/CodeGen/RegAllocPBQP.cpp (+3-3)
- (modified) llvm/lib/CodeGen/StackSlotColoring.cpp (+3-3)
- (modified) llvm/lib/CodeGen/VirtRegMap.cpp (+3-3)
- (modified) llvm/lib/Passes/PassBuilder.cpp (+1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp (+3-3)
- (modified) llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
(+1-1)
- (modified) llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp (+1-1)
- (modified) llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp (+1-1)
``diff
diff --git a/llvm/include/llvm/CodeGen/LiveStacks.h
b/llvm/include/llvm/CodeGen/LiveStacks.h
index 2edc2985f0ee66..02c640bfc4a93e 100644
--- a/llvm/include/llvm/CodeGen/LiveStacks.h
+++ b/llvm/include/llvm/CodeGen/LiveStacks.h
@@ -17,6 +17,7 @@
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/InitializePasses.h"
#include "llvm/PassRegistry.h"
#include
@@ -32,7 +33,7 @@ class raw_ostream;
class TargetRegisterClass;
class TargetRegisterInfo;
-class LiveStacks : public MachineFunctionPass {
+class LiveStacks {
const TargetRegisterInfo *TRI = nullptr;
/// Special pool allocator for VNInfo's (LiveInterval val#).
@@ -47,12 +48,6 @@ class LiveStacks : public MachineFunctionPass {
std::map S2RCMap;
public:
- static char ID; // Pass identification, replacement for typeid
-
- LiveStacks() : MachineFunctionPass(ID) {
-initializeLiveStacksPass(*PassRegistry::getPassRegistry());
- }
-
using iterator = SS2IntervalMap::iterator;
using const_iterator = SS2IntervalMap::const_iterator;
@@ -92,6 +87,25 @@ class LiveStacks : public MachineFunctionPass {
VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; }
+ void releaseMemory();
+ /// init - analysis entry point
+ void init(MachineFunction &MF);
+ void print(raw_ostream &O, const Module *M = nullptr) const;
+};
+
+class LiveStacksWrapperLegacy : public MachineFunctionPass {
+ LiveStacks Impl;
+
+public:
+ static char ID; // Pass identification, replacement for typeid
+
+ LiveStacksWrapperLegacy() : MachineFunctionPass(ID) {
+initializeLiveStacksWrapperLegacyPass(*PassRegistry::getPassRegistry());
+ }
+
+ LiveStacks &getLS() { return Impl; }
+ const LiveStacks &getLS() const { return Impl; }
+
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
@@ -102,6 +116,24 @@ class LiveStacks : public MachineFunctionPass {
void print(raw_ostream &O, const Module * = nullptr) const override;
};
+class LiveStacksAnalysis : public AnalysisInfoMixin {
+ static AnalysisKey Key;
+ friend AnalysisInfoMixin;
+
+public:
+ using Result = LiveStacks;
+
+ LiveStacks run(MachineFunction &MF, MachineFunctionAnalysisManager &);
+};
+
+class LiveStacksPrinterPass : public PassInfoMixin {
+ raw_ostream &OS;
+
+public:
+ LiveStacksPrinterPass(raw_ostream &OS) : OS(OS) {}
+ PreservedAnalyses run(MachineFunction &MF,
+MachineFunctionAnalysisManager &AM);
+};
} // end namespace llvm
#endif
diff --git a/llvm/include/llvm/InitializePasses.h
b/llvm/include/llvm/InitializePasses.h
index 1d690165134ca2..87faf111a30cc9 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -158,7 +158,7 @@ void
initializeLiveDebugVariablesWrapperLegacyPass(PassRegistry &);
void initializeLiveIntervalsWrapperPassPass(PassRegistry &);
void initializeLiveRangeShrinkPass(PassRegistry &);
void initializeLiveRegMatrixWrapperLegacyPass(PassRegistry &);
-void initializeLiveStacksPass(PassRegistry &);
+void initializeLiveStacksWrapperLegacyPass(PassRegistry &);
void initializeLiveVariablesWrapperPassPass(PassRegistry &);
void initializeLoadStoreOptPass(PassRegistry &);
void initializeLoadStoreVectorizerLegacyPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 88f57568645eb4..c23e4af1a342bd 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -101,6 +101,7 @@ MACHINE_FUNCTION_ANALYSIS("edge-bundles",
EdgeBundlesA
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port LiveStacks analysis to NPM (PR #118778)
https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/118778 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb][Process] Introduce LoongArch64 hw break/watchpoint support (PR #118770)
@@ -0,0 +1,170 @@ +//===-- NativeRegisterContextDBReg_loongarch.cpp --===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===--===// + +#include "NativeRegisterContextDBReg_loongarch.h" + +#include "lldb/Utility/LLDBLog.h" +#include "lldb/Utility/Log.h" +#include "lldb/Utility/RegisterValue.h" + +using namespace lldb_private; + +uint32_t +NativeRegisterContextDBReg_loongarch::SetHardwareBreakpoint(lldb::addr_t addr, DavidSpickett wrote: I'm surprised this is not in the base class. I suppose it's like for Arm64 where the control value is the enable bit from the base class, plus some extra arch specific things. Perhaps once you've added a generic MakeControlValue this can be removed. You might want a "ValidateBreakpoint" as well to handle size and alignment. https://github.com/llvm/llvm-project/pull/118770 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port LiveStacks analysis to NPM (PR #118778)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118778
>From 7e6d9ff997996abf60064779100e19e3ae370b13 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 5 Dec 2024 09:44:25 +
Subject: [PATCH 1/2] [CodeGen][NewPM] Port LiveStacks analysis to NPM
---
llvm/include/llvm/CodeGen/LiveStacks.h| 37 ++
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 2 +-
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/InlineSpiller.cpp| 4 +-
llvm/lib/CodeGen/LiveStacks.cpp | 38 ++-
llvm/lib/CodeGen/MachineVerifier.cpp | 5 ++-
llvm/lib/CodeGen/RegAllocBasic.cpp| 6 +--
llvm/lib/CodeGen/RegAllocGreedy.cpp | 6 +--
llvm/lib/CodeGen/RegAllocPBQP.cpp | 6 +--
llvm/lib/CodeGen/StackSlotColoring.cpp| 6 +--
llvm/lib/CodeGen/VirtRegMap.cpp | 6 +--
llvm/lib/Passes/PassBuilder.cpp | 1 +
.../AMDGPU/AMDGPUMarkLastScratchLoad.cpp | 6 +--
.../LoongArchDeadRegisterDefinitions.cpp | 2 +-
.../RISCV/RISCVDeadRegisterDefinitions.cpp| 2 +-
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp | 2 +-
17 files changed, 89 insertions(+), 44 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/LiveStacks.h
b/llvm/include/llvm/CodeGen/LiveStacks.h
index 2edc2985f0ee66..261b8a365a3d0a 100644
--- a/llvm/include/llvm/CodeGen/LiveStacks.h
+++ b/llvm/include/llvm/CodeGen/LiveStacks.h
@@ -17,6 +17,7 @@
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/InitializePasses.h"
#include "llvm/PassRegistry.h"
#include
@@ -32,7 +33,7 @@ class raw_ostream;
class TargetRegisterClass;
class TargetRegisterInfo;
-class LiveStacks : public MachineFunctionPass {
+class LiveStacks {
const TargetRegisterInfo *TRI = nullptr;
/// Special pool allocator for VNInfo's (LiveInterval val#).
@@ -47,12 +48,6 @@ class LiveStacks : public MachineFunctionPass {
std::map S2RCMap;
public:
- static char ID; // Pass identification, replacement for typeid
-
- LiveStacks() : MachineFunctionPass(ID) {
-initializeLiveStacksPass(*PassRegistry::getPassRegistry());
- }
-
using iterator = SS2IntervalMap::iterator;
using const_iterator = SS2IntervalMap::const_iterator;
@@ -92,6 +87,25 @@ class LiveStacks : public MachineFunctionPass {
VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; }
+ void releaseMemory();
+ /// init - analysis entry point
+ void init(MachineFunction &MF);
+ void print(raw_ostream &O, const Module *M = nullptr) const;
+};
+
+class LiveStacksWrapperLegacy : public MachineFunctionPass {
+ LiveStacks Impl;
+
+public:
+ static char ID; // Pass identification, replacement for typeid
+
+ LiveStacksWrapperLegacy() : MachineFunctionPass(ID) {
+initializeLiveStacksWrapperLegacyPass(*PassRegistry::getPassRegistry());
+ }
+
+ LiveStacks &getLS() { return Impl; }
+ const LiveStacks &getLS() const { return Impl; }
+
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
@@ -102,6 +116,15 @@ class LiveStacks : public MachineFunctionPass {
void print(raw_ostream &O, const Module * = nullptr) const override;
};
+class LiveStacksAnalysis : public AnalysisInfoMixin {
+ static AnalysisKey Key;
+ friend AnalysisInfoMixin;
+
+public:
+ using Result = LiveStacks;
+
+ LiveStacks run(MachineFunction &MF, MachineFunctionAnalysisManager &);
+};
} // end namespace llvm
#endif
diff --git a/llvm/include/llvm/InitializePasses.h
b/llvm/include/llvm/InitializePasses.h
index 1d690165134ca2..87faf111a30cc9 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -158,7 +158,7 @@ void
initializeLiveDebugVariablesWrapperLegacyPass(PassRegistry &);
void initializeLiveIntervalsWrapperPassPass(PassRegistry &);
void initializeLiveRangeShrinkPass(PassRegistry &);
void initializeLiveRegMatrixWrapperLegacyPass(PassRegistry &);
-void initializeLiveStacksPass(PassRegistry &);
+void initializeLiveStacksWrapperLegacyPass(PassRegistry &);
void initializeLiveVariablesWrapperPassPass(PassRegistry &);
void initializeLoadStoreOptPass(PassRegistry &);
void initializeLoadStoreVectorizerLegacyPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 88f57568645eb4..bbc10c00ae2e5d 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -101,6 +101,7 @@ MACHINE_FUNCTION_ANALYSIS("edge-bundles",
EdgeBundlesAnalysis())
MACHINE_FUNCTION_ANALYSIS("livedebugvars", LiveDebugVariablesAnalysis())
MACHINE_FUNCTION_ANALYSIS("live-intervals", LiveIntervalsAnalysis())
MACHINE_FUNCTION_ANALYSIS("live-reg-matrix", LiveRegMatrixAnalysis())
+MACHINE_FU
[llvm-branch-commits] [llvm] [CodeGen][PM] Initialize analyses with isAnalysis=true (PR #118779)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118779
>From 7ee86211673112f061749d3ce7e1f2671313159f Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 5 Dec 2024 10:05:30 +
Subject: [PATCH] [CodeGen][PM] Initialize analyses with isAnalysis=true
Analyses should be marked as analyses else they are prone to be ignored
by the legacy analysis cache mechanism and get scheduled redundantly.
---
llvm/lib/CodeGen/GCMetadata.cpp| 2 +-
llvm/lib/CodeGen/LiveDebugVariables.cpp| 2 +-
llvm/lib/CodeGen/LiveIntervals.cpp | 2 +-
llvm/lib/CodeGen/LiveRegMatrix.cpp | 2 +-
llvm/lib/CodeGen/LiveStacks.cpp| 2 +-
llvm/lib/CodeGen/SlotIndexes.cpp | 2 +-
llvm/lib/CodeGen/VirtRegMap.cpp| 2 +-
llvm/lib/Transforms/Utils/LoopSimplify.cpp | 4 ++--
8 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/llvm/lib/CodeGen/GCMetadata.cpp b/llvm/lib/CodeGen/GCMetadata.cpp
index 6d1cc1a58e27df..f33008c9e0f232 100644
--- a/llvm/lib/CodeGen/GCMetadata.cpp
+++ b/llvm/lib/CodeGen/GCMetadata.cpp
@@ -66,7 +66,7 @@ GCFunctionAnalysis::run(Function &F, FunctionAnalysisManager
&FAM) {
}
INITIALIZE_PASS(GCModuleInfo, "collector-metadata",
-"Create Garbage Collector Module Metadata", false, false)
+"Create Garbage Collector Module Metadata", false, true)
//
-
diff --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp
b/llvm/lib/CodeGen/LiveDebugVariables.cpp
index 317d3401f000a4..79085e587ebc45 100644
--- a/llvm/lib/CodeGen/LiveDebugVariables.cpp
+++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp
@@ -82,7 +82,7 @@ INITIALIZE_PASS_BEGIN(LiveDebugVariablesWrapperLegacy,
DEBUG_TYPE,
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_END(LiveDebugVariablesWrapperLegacy, DEBUG_TYPE,
-"Debug Variable Analysis", false, false)
+"Debug Variable Analysis", false, true)
void LiveDebugVariablesWrapperLegacy::getAnalysisUsage(
AnalysisUsage &AU) const {
diff --git a/llvm/lib/CodeGen/LiveIntervals.cpp
b/llvm/lib/CodeGen/LiveIntervals.cpp
index f9ee6e4563f8d6..f38527a3ce6a31 100644
--- a/llvm/lib/CodeGen/LiveIntervals.cpp
+++ b/llvm/lib/CodeGen/LiveIntervals.cpp
@@ -83,7 +83,7 @@ INITIALIZE_PASS_BEGIN(LiveIntervalsWrapperPass,
"liveintervals",
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_END(LiveIntervalsWrapperPass, "liveintervals",
-"Live Interval Analysis", false, false)
+"Live Interval Analysis", false, true)
bool LiveIntervalsWrapperPass::runOnMachineFunction(MachineFunction &MF) {
LIS.Indexes = &getAnalysis().getSI();
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp
b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index bc8c59381a40e1..9744c47d5a8510 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -41,7 +41,7 @@ INITIALIZE_PASS_BEGIN(LiveRegMatrixWrapperLegacy,
"liveregmatrix",
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
INITIALIZE_PASS_END(LiveRegMatrixWrapperLegacy, "liveregmatrix",
-"Live Register Matrix", false, false)
+"Live Register Matrix", false, true)
void LiveRegMatrixWrapperLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
diff --git a/llvm/lib/CodeGen/LiveStacks.cpp b/llvm/lib/CodeGen/LiveStacks.cpp
index 92cc6699f2d331..d615caf48c0ad3 100644
--- a/llvm/lib/CodeGen/LiveStacks.cpp
+++ b/llvm/lib/CodeGen/LiveStacks.cpp
@@ -25,7 +25,7 @@ INITIALIZE_PASS_BEGIN(LiveStacksWrapperLegacy, DEBUG_TYPE,
"Live Stack Slot Analysis", false, false)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_END(LiveStacksWrapperLegacy, DEBUG_TYPE,
-"Live Stack Slot Analysis", false, false)
+"Live Stack Slot Analysis", false, true)
char &llvm::LiveStacksID = LiveStacksWrapperLegacy::ID;
diff --git a/llvm/lib/CodeGen/SlotIndexes.cpp b/llvm/lib/CodeGen/SlotIndexes.cpp
index 1b92a5aa59d18c..8d2832b3fdd56e 100644
--- a/llvm/lib/CodeGen/SlotIndexes.cpp
+++ b/llvm/lib/CodeGen/SlotIndexes.cpp
@@ -45,7 +45,7 @@ SlotIndexes::~SlotIndexes() {
}
INITIALIZE_PASS(SlotIndexesWrapperPass, DEBUG_TYPE, "Slot index numbering",
-false, false)
+false, true)
STATISTIC(NumLocalRenum, "Number of local renumberings");
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index 1352102a93d01b..b28c74600e7a29 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -60,7 +60,7 @@ STATISTIC(NumIdCopies, "Number of identity moves eliminated
after rewriting");
char Vir
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port LiveStacks analysis to NPM (PR #118778)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118778
>From 7e6d9ff997996abf60064779100e19e3ae370b13 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 5 Dec 2024 09:44:25 +
Subject: [PATCH] [CodeGen][NewPM] Port LiveStacks analysis to NPM
---
llvm/include/llvm/CodeGen/LiveStacks.h| 37 ++
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 2 +-
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/InlineSpiller.cpp| 4 +-
llvm/lib/CodeGen/LiveStacks.cpp | 38 ++-
llvm/lib/CodeGen/MachineVerifier.cpp | 5 ++-
llvm/lib/CodeGen/RegAllocBasic.cpp| 6 +--
llvm/lib/CodeGen/RegAllocGreedy.cpp | 6 +--
llvm/lib/CodeGen/RegAllocPBQP.cpp | 6 +--
llvm/lib/CodeGen/StackSlotColoring.cpp| 6 +--
llvm/lib/CodeGen/VirtRegMap.cpp | 6 +--
llvm/lib/Passes/PassBuilder.cpp | 1 +
.../AMDGPU/AMDGPUMarkLastScratchLoad.cpp | 6 +--
.../LoongArchDeadRegisterDefinitions.cpp | 2 +-
.../RISCV/RISCVDeadRegisterDefinitions.cpp| 2 +-
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp | 2 +-
17 files changed, 89 insertions(+), 44 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/LiveStacks.h
b/llvm/include/llvm/CodeGen/LiveStacks.h
index 2edc2985f0ee66..261b8a365a3d0a 100644
--- a/llvm/include/llvm/CodeGen/LiveStacks.h
+++ b/llvm/include/llvm/CodeGen/LiveStacks.h
@@ -17,6 +17,7 @@
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/InitializePasses.h"
#include "llvm/PassRegistry.h"
#include
@@ -32,7 +33,7 @@ class raw_ostream;
class TargetRegisterClass;
class TargetRegisterInfo;
-class LiveStacks : public MachineFunctionPass {
+class LiveStacks {
const TargetRegisterInfo *TRI = nullptr;
/// Special pool allocator for VNInfo's (LiveInterval val#).
@@ -47,12 +48,6 @@ class LiveStacks : public MachineFunctionPass {
std::map S2RCMap;
public:
- static char ID; // Pass identification, replacement for typeid
-
- LiveStacks() : MachineFunctionPass(ID) {
-initializeLiveStacksPass(*PassRegistry::getPassRegistry());
- }
-
using iterator = SS2IntervalMap::iterator;
using const_iterator = SS2IntervalMap::const_iterator;
@@ -92,6 +87,25 @@ class LiveStacks : public MachineFunctionPass {
VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; }
+ void releaseMemory();
+ /// init - analysis entry point
+ void init(MachineFunction &MF);
+ void print(raw_ostream &O, const Module *M = nullptr) const;
+};
+
+class LiveStacksWrapperLegacy : public MachineFunctionPass {
+ LiveStacks Impl;
+
+public:
+ static char ID; // Pass identification, replacement for typeid
+
+ LiveStacksWrapperLegacy() : MachineFunctionPass(ID) {
+initializeLiveStacksWrapperLegacyPass(*PassRegistry::getPassRegistry());
+ }
+
+ LiveStacks &getLS() { return Impl; }
+ const LiveStacks &getLS() const { return Impl; }
+
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
@@ -102,6 +116,15 @@ class LiveStacks : public MachineFunctionPass {
void print(raw_ostream &O, const Module * = nullptr) const override;
};
+class LiveStacksAnalysis : public AnalysisInfoMixin {
+ static AnalysisKey Key;
+ friend AnalysisInfoMixin;
+
+public:
+ using Result = LiveStacks;
+
+ LiveStacks run(MachineFunction &MF, MachineFunctionAnalysisManager &);
+};
} // end namespace llvm
#endif
diff --git a/llvm/include/llvm/InitializePasses.h
b/llvm/include/llvm/InitializePasses.h
index 1d690165134ca2..87faf111a30cc9 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -158,7 +158,7 @@ void
initializeLiveDebugVariablesWrapperLegacyPass(PassRegistry &);
void initializeLiveIntervalsWrapperPassPass(PassRegistry &);
void initializeLiveRangeShrinkPass(PassRegistry &);
void initializeLiveRegMatrixWrapperLegacyPass(PassRegistry &);
-void initializeLiveStacksPass(PassRegistry &);
+void initializeLiveStacksWrapperLegacyPass(PassRegistry &);
void initializeLiveVariablesWrapperPassPass(PassRegistry &);
void initializeLoadStoreOptPass(PassRegistry &);
void initializeLoadStoreVectorizerLegacyPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 88f57568645eb4..bbc10c00ae2e5d 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -101,6 +101,7 @@ MACHINE_FUNCTION_ANALYSIS("edge-bundles",
EdgeBundlesAnalysis())
MACHINE_FUNCTION_ANALYSIS("livedebugvars", LiveDebugVariablesAnalysis())
MACHINE_FUNCTION_ANALYSIS("live-intervals", LiveIntervalsAnalysis())
MACHINE_FUNCTION_ANALYSIS("live-reg-matrix", LiveRegMatrixAnalysis())
+MACHINE_FUNCTI
[llvm-branch-commits] [llvm] [CodeGen][PM] Initialize analyses with isAnalysis=true (PR #118779)
https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/118779 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port LiveStacks analysis to NPM (PR #118778)
optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/118778?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#118779** https://app.graphite.dev/github/pr/llvm/llvm-project/118779?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#118778** https://app.graphite.dev/github/pr/llvm/llvm-project/118778?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/118778?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#118462** https://app.graphite.dev/github/pr/llvm/llvm-project/118462?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#117309** https://app.graphite.dev/github/pr/llvm/llvm-project/117309?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/118778 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [llvm] [flang][OpenMP] Semantic checks for IN_REDUCTION and TASK_REDUCTION (PR #118841)
llvmbot wrote:
@llvm/pr-subscribers-flang-openmp
@llvm/pr-subscribers-flang-fir-hlfir
Author: Krzysztof Parzyszek (kparzysz)
Changes
Update parsing of these two clauses and add semantic checks for them. Simplify
some code in IsReductionAllowedForType and CheckReductionOperator.
---
Patch is 36.21 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/118841.diff
16 Files Affected:
- (modified) flang/include/flang/Parser/dump-parse-tree.h (+3)
- (modified) flang/include/flang/Parser/parse-tree.h (+16-3)
- (modified) flang/lib/Lower/OpenMP/Clauses.cpp (+16-12)
- (modified) flang/lib/Parser/openmp-parsers.cpp (+15-4)
- (modified) flang/lib/Parser/unparse.cpp (+8-3)
- (modified) flang/lib/Semantics/check-omp-structure.cpp (+151-151)
- (modified) flang/lib/Semantics/check-omp-structure.h (+6-5)
- (modified) flang/test/Parser/OpenMP/in-reduction-clause.f90 (+6-6)
- (modified) flang/test/Parser/OpenMP/reduction-modifier.f90 (+1-1)
- (added) flang/test/Parser/OpenMP/task-reduction-clause.f90 (+23)
- (modified) flang/test/Preprocessing/directive-contin-with-pp.F90 (+3-3)
- (added) flang/test/Semantics/OpenMP/in-reduction.f90 (+44)
- (modified) flang/test/Semantics/OpenMP/symbol08.f90 (+3-2)
- (added) flang/test/Semantics/OpenMP/task-reduction.f90 (+44)
- (modified) flang/test/Semantics/OpenMP/taskgroup01.f90 (+2)
- (modified) llvm/include/llvm/Frontend/OpenMP/OMP.td (+1-1)
``diff
diff --git a/flang/include/flang/Parser/dump-parse-tree.h
b/flang/include/flang/Parser/dump-parse-tree.h
index c6f35a07d81ea5..b87bc5b60cafe9 100644
--- a/flang/include/flang/Parser/dump-parse-tree.h
+++ b/flang/include/flang/Parser/dump-parse-tree.h
@@ -592,7 +592,10 @@ class ParseTreeDumper {
NODE(parser, OmpReductionClause)
NODE(OmpReductionClause, Modifier)
NODE(parser, OmpInReductionClause)
+ NODE(OmpInReductionClause, Modifier)
NODE(parser, OmpReductionCombiner)
+ NODE(parser, OmpTaskReductionClause)
+ NODE(OmpTaskReductionClause, Modifier)
NODE(OmpReductionCombiner, FunctionCombiner)
NODE(parser, OmpReductionInitializerClause)
NODE(parser, OmpReductionIdentifier)
diff --git a/flang/include/flang/Parser/parse-tree.h
b/flang/include/flang/Parser/parse-tree.h
index 8160b095f06dd9..e2530cea3652a2 100644
--- a/flang/include/flang/Parser/parse-tree.h
+++ b/flang/include/flang/Parser/parse-tree.h
@@ -3951,11 +3951,14 @@ struct OmpIfClause {
std::tuple t;
};
-// OMP 5.0 2.19.5.6 in_reduction-clause -> IN_REDUCTION (reduction-identifier:
-// variable-name-list)
+// Ref: [5.0:170-176], [5.1:197-205], [5.2:138-139]
+//
+// in-reduction-clause ->
+//IN_REDUCTION(reduction-identifier: list) // since 5.0
struct OmpInReductionClause {
TUPLE_CLASS_BOILERPLATE(OmpInReductionClause);
- std::tuple t;
+ MODIFIER_BOILERPLATE(OmpReductionIdentifier);
+ std::tuple t;
};
// Ref: [4.5:199-201], [5.0:288-290], [5.1:321-322], [5.2:115-117]
@@ -4070,6 +4073,16 @@ struct OmpScheduleClause {
std::tuple> t;
};
+// Ref: [5.0:232-234], [5.1:264-266], [5.2:137]
+//
+// task-reduction-clause ->
+//TASK_REDUCTION(reduction-identifier: list)// since 5.0
+struct OmpTaskReductionClause {
+ TUPLE_CLASS_BOILERPLATE(OmpTaskReductionClause);
+ MODIFIER_BOILERPLATE(OmpReductionIdentifier);
+ std::tuple t;
+};
+
// Ref: [4.5:107-109], [5.0:176-180], [5.1:205-210], [5.2:167-168]
//
// to-clause (in DECLARE TARGET) ->
diff --git a/flang/lib/Lower/OpenMP/Clauses.cpp
b/flang/lib/Lower/OpenMP/Clauses.cpp
index 10c31963ec493a..a0dc1be0afc5c0 100644
--- a/flang/lib/Lower/OpenMP/Clauses.cpp
+++ b/flang/lib/Lower/OpenMP/Clauses.cpp
@@ -859,10 +859,14 @@ Init make(const parser::OmpClause::Init &inp,
InReduction make(const parser::OmpClause::InReduction &inp,
semantics::SemanticsContext &semaCtx) {
// inp.v -> parser::OmpInReductionClause
- auto &t0 = std::get(inp.v.t);
+ auto &mods = semantics::OmpGetModifiers(inp.v);
+ auto *m0 =
+ semantics::OmpGetUniqueModifier(mods);
auto &t1 = std::get(inp.v.t);
+ assert(m0 && "OmpReductionIdentifier is required");
+
return InReduction{
- {/*ReductionIdentifiers=*/{makeReductionOperator(t0, semaCtx)},
+ {/*ReductionIdentifiers=*/{makeReductionOperator(*m0, semaCtx)},
/*List=*/makeObjects(t1, semaCtx)}};
}
@@ -1155,17 +1159,17 @@ Reduction make(const parser::OmpClause::Reduction &inp,
);
auto &mods = semantics::OmpGetModifiers(inp.v);
- auto *t0 =
+ auto *m0 =
semantics::OmpGetUniqueModifier(mods);
- auto *t1 =
+ auto *m1 =
semantics::OmpGetUniqueModifier(mods);
- auto &t2 = std::get(inp.v.t);
- assert(t1 && "OmpReductionIdentifier is required");
+ auto &t1 = std::get(inp.v.t);
+ assert(m1 && "OmpReductionIdentifier is required");
return Reduction{
- {/*ReductionModifier=*/maybeApplyToV(convert, t0),
- /*ReductionIdentifiers=*/{makeReductionOperator(*t1, semaC
[llvm-branch-commits] [clang] 58a44b8 - Revert "Pack relocations for Android API >= 28 (#117624)"
Author: Vitaly Buka
Date: 2024-12-05T10:42:58-08:00
New Revision: 58a44b8477349c449b2b2d0914cf8666a53d897d
URL:
https://github.com/llvm/llvm-project/commit/58a44b8477349c449b2b2d0914cf8666a53d897d
DIFF:
https://github.com/llvm/llvm-project/commit/58a44b8477349c449b2b2d0914cf8666a53d897d.diff
LOG: Revert "Pack relocations for Android API >= 28 (#117624)"
This reverts commit 004e75ef17c76598f7307adbe9a39d5ae6d5375a.
Added:
Modified:
clang/lib/Driver/ToolChains/Linux.cpp
clang/test/Driver/linux-ld.c
Removed:
diff --git a/clang/lib/Driver/ToolChains/Linux.cpp
b/clang/lib/Driver/ToolChains/Linux.cpp
index 46962e88d45502..d1cb625613415b 100644
--- a/clang/lib/Driver/ToolChains/Linux.cpp
+++ b/clang/lib/Driver/ToolChains/Linux.cpp
@@ -256,24 +256,6 @@ Linux::Linux(const Driver &D, const llvm::Triple &Triple,
const ArgList &Args)
ExtraOpts.push_back("-z");
ExtraOpts.push_back("max-page-size=16384");
}
-if (Triple.isAndroidVersionLT(29)) {
- // https://github.com/android/ndk/issues/1196
- // The unwinder used by the crash handler on versions of Android prior to
- // API 29 did not correctly handle binaries built with rosegment, which
is
- // enabled by default for LLD. Android only supports LLD, so it's not an
- // issue that this flag is not accepted by other linkers.
- ExtraOpts.push_back("--no-rosegment");
-}
-if (!Triple.isAndroidVersionLT(28)) {
- // Android supports relr packing starting with API 28 and had its own
- // flavor (--pack-dyn-relocs=android) starting in API 23.
- // TODO: It's possible to use both with --pack-dyn-relocs=android+relr,
- // but we need to gather some data on the impact of that form before we
- // can know if it's a good default.
- // On the other hand, relr should always be an improvement.
- ExtraOpts.push_back("--use-android-relr-tags");
- ExtraOpts.push_back("--pack-dyn-relocs=relr");
-}
}
if (GCCInstallation.getParentLibPath().contains("opt/rh/"))
diff --git a/clang/test/Driver/linux-ld.c b/clang/test/Driver/linux-ld.c
index 4d641c8f1b46e9..28fb075a80dbbc 100644
--- a/clang/test/Driver/linux-ld.c
+++ b/clang/test/Driver/linux-ld.c
@@ -940,36 +940,6 @@
// CHECK-ANDROID-HASH-STYLE-M: "{{.*}}ld{{(.exe)?}}"
// CHECK-ANDROID-HASH-STYLE-M: "--hash-style=gnu"
-// Check that we pass --no-rosegment for pre-29 Android versions and do not for
-// 29+.
-// RUN: %clang %s -### -o %t.o 2>&1 \
-// RUN: --target=armv7-linux-android28 \
-// RUN: | FileCheck --check-prefix=CHECK-ANDROID-ROSEGMENT-28 %s
-// CHECK-ANDROID-ROSEGMENT-28: "{{.*}}ld{{(.exe)?}}"
-// CHECK-ANDROID-ROSEGMENT-28: "--no-rosegment"
-//
-// RUN: %clang %s -### -o %t.o 2>&1 \
-// RUN: --target=armv7-linux-android29 \
-// RUN: | FileCheck --check-prefix=CHECK-ANDROID-ROSEGMENT-29 %s
-// CHECK-ANDROID-ROSEGMENT-29: "{{.*}}ld{{(.exe)?}}"
-// CHECK-ANDROID-ROSEGMENT-29-NOT: "--no-rosegment"
-
-// Check that we pass --pack-dyn-relocs=relr for API 28+ and not before.
-// RUN: %clang %s -### -o %t.o 2>&1 \
-// RUN: --target=armv7-linux-android27 \
-// RUN: | FileCheck --check-prefix=CHECK-ANDROID-RELR-27 %s
-// CHECK-ANDROID-RELR-27: "{{.*}}ld{{(.exe)?}}"
-// CHECK-ANDROID-RELR-27-NOT: "--pack-dyn-relocs=relr"
-// CHECK-ANDROID-RELR-27-NOT: "--pack-dyn-relocs=android+relr"
-//
-// RUN: %clang %s -### -o %t.o 2>&1 \
-// RUN: --target=armv7-linux-android28 \
-// RUN: | FileCheck --check-prefix=CHECK-ANDROID-RELR-28 %s
-// CHECK-ANDROID-RELR-28: "{{.*}}ld{{(.exe)?}}"
-// CHECK-ANDROID-RELR-28: "--use-android-relr-tags"
-// CHECK-ANDROID-RELR-28: "--pack-dyn-relocs=relr"
-// CHECK-ANDROID-RELR-28-NOT: "--pack-dyn-relocs=android+relr"
-
// RUN: %clang -### %s -no-pie 2>&1 --target=mips64-linux-gnuabin32 \
// RUN: | FileCheck --check-prefix=CHECK-MIPS64EL-GNUABIN32 %s
// CHECK-MIPS64EL-GNUABIN32: "{{.*}}ld{{(.exe)?}}"
___
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[llvm-branch-commits] [llvm] [AggressiveInstCombine] Use APInt and avoid truncation when folding loads (PR #118866)
https://github.com/AreaZR created
https://github.com/llvm/llvm-project/pull/118866
A miscompilation issue has been addressed with improved handling.
Fixes: https://github.com/llvm/llvm-project/issues/118467. (cherry picked from
commit f68b0e36997322eeda8fd199ea80deb1b49c5410)
>From d43604fb501cc51bba9a06ce3d4131b995afc43b Mon Sep 17 00:00:00 2001
From: Antonio Frighetto
Date: Wed, 4 Dec 2024 10:15:11 +0100
Subject: [PATCH] [AggressiveInstCombine] Use APInt and avoid truncation when
folding loads
A miscompilation issue has been addressed with improved handling.
Fixes: https://github.com/llvm/llvm-project/issues/118467.
(cherry picked from commit f68b0e36997322eeda8fd199ea80deb1b49c5410)
---
.../AggressiveInstCombine.cpp | 3 +-
.../AggressiveInstCombine/AArch64/or-load.ll | 20 +++
.../AggressiveInstCombine/X86/or-load.ll | 52 +++
3 files changed, 53 insertions(+), 22 deletions(-)
diff --git
a/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
b/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
index d5a38ec17a2a84..1d23ec8ced204f 100644
--- a/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
+++ b/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
@@ -811,8 +811,7 @@ static bool foldConsecutiveLoads(Instruction &I, const
DataLayout &DL,
APInt Offset1(DL.getIndexTypeSizeInBits(Load1Ptr->getType()), 0);
Load1Ptr = Load1Ptr->stripAndAccumulateConstantOffsets(
DL, Offset1, /* AllowNonInbounds */ true);
-Load1Ptr = Builder.CreatePtrAdd(Load1Ptr,
-Builder.getInt32(Offset1.getZExtValue()));
+Load1Ptr = Builder.CreatePtrAdd(Load1Ptr, Builder.getInt(Offset1));
}
// Generate wider load.
NewLoad = Builder.CreateAlignedLoad(WiderType, Load1Ptr, LI1->getAlign(),
diff --git a/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
b/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
index 1400ee7f703cab..10c4c9b0ca4c99 100644
--- a/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
+++ b/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
@@ -1121,19 +1121,19 @@ entry:
define i32 @loadCombine_4consecutive_metadata(ptr %p, ptr %pstr) {
; LE-LABEL: @loadCombine_4consecutive_metadata(
-; LE-NEXT:[[L1:%.*]] = load i32, ptr [[P:%.*]], align 1, !alias.scope !0
-; LE-NEXT:store i32 25, ptr [[PSTR:%.*]], align 4, !noalias !0
+; LE-NEXT:[[L1:%.*]] = load i32, ptr [[P:%.*]], align 1, !alias.scope
[[META0:![0-9]+]]
+; LE-NEXT:store i32 25, ptr [[PSTR:%.*]], align 4, !noalias [[META0]]
; LE-NEXT:ret i32 [[L1]]
;
; BE-LABEL: @loadCombine_4consecutive_metadata(
; BE-NEXT:[[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
; BE-NEXT:[[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
; BE-NEXT:[[P3:%.*]] = getelementptr i8, ptr [[P]], i32 3
-; BE-NEXT:[[L1:%.*]] = load i8, ptr [[P]], align 1, !alias.scope !0
-; BE-NEXT:[[L2:%.*]] = load i8, ptr [[P1]], align 1, !alias.scope !0
-; BE-NEXT:[[L3:%.*]] = load i8, ptr [[P2]], align 1, !alias.scope !0
-; BE-NEXT:[[L4:%.*]] = load i8, ptr [[P3]], align 1, !alias.scope !0
-; BE-NEXT:store i32 25, ptr [[PSTR:%.*]], align 4, !noalias !0
+; BE-NEXT:[[L1:%.*]] = load i8, ptr [[P]], align 1, !alias.scope
[[META0:![0-9]+]]
+; BE-NEXT:[[L2:%.*]] = load i8, ptr [[P1]], align 1, !alias.scope [[META0]]
+; BE-NEXT:[[L3:%.*]] = load i8, ptr [[P2]], align 1, !alias.scope [[META0]]
+; BE-NEXT:[[L4:%.*]] = load i8, ptr [[P3]], align 1, !alias.scope [[META0]]
+; BE-NEXT:store i32 25, ptr [[PSTR:%.*]], align 4, !noalias [[META0]]
; BE-NEXT:[[E1:%.*]] = zext i8 [[L1]] to i32
; BE-NEXT:[[E2:%.*]] = zext i8 [[L2]] to i32
; BE-NEXT:[[E3:%.*]] = zext i8 [[L3]] to i32
@@ -1869,7 +1869,7 @@ define i32 @loadCombine_4consecutive_badinsert2(ptr %p) {
define i32 @loadCombine_4consecutive_badinsert3(ptr %p) {
; LE-LABEL: @loadCombine_4consecutive_badinsert3(
-; LE-NEXT:[[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
+; LE-NEXT:[[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
; LE-NEXT:[[L1:%.*]] = load i32, ptr [[TMP1]], align 1
; LE-NEXT:ret i32 [[L1]]
;
@@ -2088,7 +2088,7 @@ define i32 @loadCombine_4consecutive_badinsert6(ptr %p) {
define void @nested_gep(ptr %p, ptr %dest) {
; LE-LABEL: @nested_gep(
-; LE-NEXT:[[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 68
+; LE-NEXT:[[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 68
; LE-NEXT:[[LD2:%.*]] = load i64, ptr [[TMP1]], align 4
; LE-NEXT:[[TRUNC:%.*]] = trunc i64 [[LD2]] to i32
; LE-NEXT:store i32 [[TRUNC]], ptr [[DEST:%.*]], align 4
@@ -2128,7 +2128,7 @@ define void @nested_gep(ptr %p, ptr %dest) {
define void @bitcast_gep(ptr %p, ptr %dest) {
; LE-LABEL: @bitcast_gep(
-; LE-NEXT:[[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 68
+; LE-NEXT:[[TMP1:%.*]] = g
[llvm-branch-commits] [llvm] release/19.x: [SimpleLoopUnswitch] Fix LCSSA phi node invalidation (PR #118870)
https://github.com/AreaZR created
https://github.com/llvm/llvm-project/pull/118870
Fixes https://github.com/llvm/llvm-project/issues/117537.
(cherry picked from commit fc5c89900f2a4b50e0f3a88ef7c89115d93684f4)
>From 4fa5fee98753fe271bf63a2e3a2a12920dc98c70 Mon Sep 17 00:00:00 2001
From: Nikita Popov
Date: Wed, 27 Nov 2024 11:47:22 +0100
Subject: [PATCH] [SimpleLoopUnswitch] Fix LCSSA phi node invalidation
Fixes https://github.com/llvm/llvm-project/issues/117537.
(cherry picked from commit fc5c89900f2a4b50e0f3a88ef7c89115d93684f4)
---
.../Transforms/Scalar/SimpleLoopUnswitch.cpp | 5 +-
.../Transforms/SimpleLoopUnswitch/pr117537.ll | 92 +++
2 files changed, 95 insertions(+), 2 deletions(-)
create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/pr117537.ll
diff --git a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
index c235d2fb2a5bd4..f99f4487c5540e 100644
--- a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
+++ b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
@@ -1249,8 +1249,9 @@ static BasicBlock *buildClonedLoopBlocks(
assert(VMap.lookup(&I) == &ClonedI && "Mismatch in the value map!");
// Forget SCEVs based on exit phis in case SCEV looked through the phi.
- if (SE && isa(I))
-SE->forgetValue(&I);
+ if (SE)
+if (auto *PN = dyn_cast(&I))
+ SE->forgetLcssaPhiWithNewPredecessor(&L, PN);
BasicBlock::iterator InsertPt = MergeBB->getFirstInsertionPt();
diff --git a/llvm/test/Transforms/SimpleLoopUnswitch/pr117537.ll
b/llvm/test/Transforms/SimpleLoopUnswitch/pr117537.ll
new file mode 100644
index 00..fd61cfab164d3b
--- /dev/null
+++ b/llvm/test/Transforms/SimpleLoopUnswitch/pr117537.ll
@@ -0,0 +1,92 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 5
+; RUN: opt -S
-passes='print,simple-loop-unswitch,print'
-verify-scev < %s 2>/dev/null | FileCheck %s
+
+; Make sure we don't assert due to insufficient SCEV invalidation.
+
+define void @test(ptr %p) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: ptr [[P:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT:[[CHECK:%.*]] = icmp eq ptr [[P]], null
+; CHECK-NEXT:br i1 [[CHECK]], label %[[ENTRY_SPLIT_US:.*]], label
%[[ENTRY_SPLIT:.*]]
+; CHECK: [[ENTRY_SPLIT_US]]:
+; CHECK-NEXT:br label %[[BB0_US:.*]]
+; CHECK: [[BB0_US]]:
+; CHECK-NEXT:br label %[[LOOP0_US:.*]]
+; CHECK: [[LOOP0_US]]:
+; CHECK-NEXT:[[V_US:%.*]] = load atomic i32, ptr [[P]] unordered, align 8
+; CHECK-NEXT:[[ADD_US:%.*]] = add i32 [[V_US]], 3
+; CHECK-NEXT:br i1 true, label %[[PREHEADER_SPLIT_US:.*]], label
%[[BB0_US]]
+; CHECK: [[PREHEADER_SPLIT_US]]:
+; CHECK-NEXT:[[ADD_LCSSA_US:%.*]] = phi i32 [ [[ADD_US]], %[[LOOP0_US]] ]
+; CHECK-NEXT:br label %[[PREHEADER:.*]]
+; CHECK: [[ENTRY_SPLIT]]:
+; CHECK-NEXT:br label %[[BB0:.*]]
+; CHECK: [[BB0]]:
+; CHECK-NEXT:br label %[[LATCH:.*]]
+; CHECK: [[LATCH]]:
+; CHECK-NEXT:br i1 false, label %[[EXIT0:.*]], label %[[LOOP0:.*]]
+; CHECK: [[EXIT0]]:
+; CHECK-NEXT:ret void
+; CHECK: [[LOOP0]]:
+; CHECK-NEXT:[[V:%.*]] = load atomic i32, ptr [[P]] unordered, align 8
+; CHECK-NEXT:[[ADD:%.*]] = add i32 [[V]], 3
+; CHECK-NEXT:br i1 true, label %[[PREHEADER_SPLIT:.*]], label %[[BB0]]
+; CHECK: [[PREHEADER_SPLIT]]:
+; CHECK-NEXT:[[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], %[[LOOP0]] ]
+; CHECK-NEXT:br label %[[PREHEADER]]
+; CHECK: [[PREHEADER]]:
+; CHECK-NEXT:[[DOTUS_PHI:%.*]] = phi i32 [ [[ADD_LCSSA]],
%[[PREHEADER_SPLIT]] ], [ [[ADD_LCSSA_US]], %[[PREHEADER_SPLIT_US]] ]
+; CHECK-NEXT:br label %[[LOOP1:.*]]
+; CHECK: [[LOOP1]]:
+; CHECK-NEXT:[[IV1:%.*]] = phi i32 [ [[DOTUS_PHI]], %[[PREHEADER]] ], [
[[IV1_NEXT:%.*]], %[[BACKEDGE:.*]] ]
+; CHECK-NEXT:[[IV1_NEXT]] = add i32 [[IV1]], -33
+; CHECK-NEXT:br label %[[LOOP2:.*]]
+; CHECK: [[BACKEDGE]]:
+; CHECK-NEXT:br i1 true, label %[[EXIT1:.*]], label %[[LOOP1]]
+; CHECK: [[LOOP2]]:
+; CHECK-NEXT:[[IV0:%.*]] = phi i32 [ [[IV1]], %[[LOOP1]] ], [
[[IV0_NEXT:%.*]], %[[LOOP2]] ]
+; CHECK-NEXT:[[IV0_NEXT]] = add nsw i32 [[IV0]], 1
+; CHECK-NEXT:[[CMP:%.*]] = icmp sgt i32 [[IV0_NEXT]], 0
+; CHECK-NEXT:br i1 [[CMP]], label %[[BACKEDGE]], label %[[LOOP2]]
+; CHECK: [[EXIT1]]:
+; CHECK-NEXT:ret void
+;
+entry:
+ %check = icmp eq ptr %p, null
+ br label %bb0
+
+bb0: ; preds = %loop0, %entry
+ br i1 %check, label %loop0, label %latch
+
+latch:; preds = %bb0
+ br i1 %check, label %exit0, label %loop0
+
+exit0:; preds = %latch
+ ret void
+
+loop0:; preds = %latch, %bb0
+ %v = load atomic i32, ptr %p unordered, align 8
+ %add
[llvm-branch-commits] [llvm] release/19.x: [SimpleLoopUnswitch] Fix LCSSA phi node invalidation (PR #118870)
llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: Rose (AreaZR)
Changes
Fixes https://github.com/llvm/llvm-project/issues/117537.
(cherry picked from commit fc5c89900f2a4b50e0f3a88ef7c89115d93684f4)
---
Full diff: https://github.com/llvm/llvm-project/pull/118870.diff
2 Files Affected:
- (modified) llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp (+3-2)
- (added) llvm/test/Transforms/SimpleLoopUnswitch/pr117537.ll (+92)
``diff
diff --git a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
index c235d2fb2a5bd4..f99f4487c5540e 100644
--- a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
+++ b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
@@ -1249,8 +1249,9 @@ static BasicBlock *buildClonedLoopBlocks(
assert(VMap.lookup(&I) == &ClonedI && "Mismatch in the value map!");
// Forget SCEVs based on exit phis in case SCEV looked through the phi.
- if (SE && isa(I))
-SE->forgetValue(&I);
+ if (SE)
+if (auto *PN = dyn_cast(&I))
+ SE->forgetLcssaPhiWithNewPredecessor(&L, PN);
BasicBlock::iterator InsertPt = MergeBB->getFirstInsertionPt();
diff --git a/llvm/test/Transforms/SimpleLoopUnswitch/pr117537.ll
b/llvm/test/Transforms/SimpleLoopUnswitch/pr117537.ll
new file mode 100644
index 00..fd61cfab164d3b
--- /dev/null
+++ b/llvm/test/Transforms/SimpleLoopUnswitch/pr117537.ll
@@ -0,0 +1,92 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 5
+; RUN: opt -S
-passes='print,simple-loop-unswitch,print'
-verify-scev < %s 2>/dev/null | FileCheck %s
+
+; Make sure we don't assert due to insufficient SCEV invalidation.
+
+define void @test(ptr %p) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: ptr [[P:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT:[[CHECK:%.*]] = icmp eq ptr [[P]], null
+; CHECK-NEXT:br i1 [[CHECK]], label %[[ENTRY_SPLIT_US:.*]], label
%[[ENTRY_SPLIT:.*]]
+; CHECK: [[ENTRY_SPLIT_US]]:
+; CHECK-NEXT:br label %[[BB0_US:.*]]
+; CHECK: [[BB0_US]]:
+; CHECK-NEXT:br label %[[LOOP0_US:.*]]
+; CHECK: [[LOOP0_US]]:
+; CHECK-NEXT:[[V_US:%.*]] = load atomic i32, ptr [[P]] unordered, align 8
+; CHECK-NEXT:[[ADD_US:%.*]] = add i32 [[V_US]], 3
+; CHECK-NEXT:br i1 true, label %[[PREHEADER_SPLIT_US:.*]], label
%[[BB0_US]]
+; CHECK: [[PREHEADER_SPLIT_US]]:
+; CHECK-NEXT:[[ADD_LCSSA_US:%.*]] = phi i32 [ [[ADD_US]], %[[LOOP0_US]] ]
+; CHECK-NEXT:br label %[[PREHEADER:.*]]
+; CHECK: [[ENTRY_SPLIT]]:
+; CHECK-NEXT:br label %[[BB0:.*]]
+; CHECK: [[BB0]]:
+; CHECK-NEXT:br label %[[LATCH:.*]]
+; CHECK: [[LATCH]]:
+; CHECK-NEXT:br i1 false, label %[[EXIT0:.*]], label %[[LOOP0:.*]]
+; CHECK: [[EXIT0]]:
+; CHECK-NEXT:ret void
+; CHECK: [[LOOP0]]:
+; CHECK-NEXT:[[V:%.*]] = load atomic i32, ptr [[P]] unordered, align 8
+; CHECK-NEXT:[[ADD:%.*]] = add i32 [[V]], 3
+; CHECK-NEXT:br i1 true, label %[[PREHEADER_SPLIT:.*]], label %[[BB0]]
+; CHECK: [[PREHEADER_SPLIT]]:
+; CHECK-NEXT:[[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], %[[LOOP0]] ]
+; CHECK-NEXT:br label %[[PREHEADER]]
+; CHECK: [[PREHEADER]]:
+; CHECK-NEXT:[[DOTUS_PHI:%.*]] = phi i32 [ [[ADD_LCSSA]],
%[[PREHEADER_SPLIT]] ], [ [[ADD_LCSSA_US]], %[[PREHEADER_SPLIT_US]] ]
+; CHECK-NEXT:br label %[[LOOP1:.*]]
+; CHECK: [[LOOP1]]:
+; CHECK-NEXT:[[IV1:%.*]] = phi i32 [ [[DOTUS_PHI]], %[[PREHEADER]] ], [
[[IV1_NEXT:%.*]], %[[BACKEDGE:.*]] ]
+; CHECK-NEXT:[[IV1_NEXT]] = add i32 [[IV1]], -33
+; CHECK-NEXT:br label %[[LOOP2:.*]]
+; CHECK: [[BACKEDGE]]:
+; CHECK-NEXT:br i1 true, label %[[EXIT1:.*]], label %[[LOOP1]]
+; CHECK: [[LOOP2]]:
+; CHECK-NEXT:[[IV0:%.*]] = phi i32 [ [[IV1]], %[[LOOP1]] ], [
[[IV0_NEXT:%.*]], %[[LOOP2]] ]
+; CHECK-NEXT:[[IV0_NEXT]] = add nsw i32 [[IV0]], 1
+; CHECK-NEXT:[[CMP:%.*]] = icmp sgt i32 [[IV0_NEXT]], 0
+; CHECK-NEXT:br i1 [[CMP]], label %[[BACKEDGE]], label %[[LOOP2]]
+; CHECK: [[EXIT1]]:
+; CHECK-NEXT:ret void
+;
+entry:
+ %check = icmp eq ptr %p, null
+ br label %bb0
+
+bb0: ; preds = %loop0, %entry
+ br i1 %check, label %loop0, label %latch
+
+latch:; preds = %bb0
+ br i1 %check, label %exit0, label %loop0
+
+exit0:; preds = %latch
+ ret void
+
+loop0:; preds = %latch, %bb0
+ %v = load atomic i32, ptr %p unordered, align 8
+ %add = add i32 %v, 3
+ br i1 true, label %preheader, label %bb0
+
+preheader:; preds = %loop0
+ br label %loop1
+
+loop1:; preds = %backedge,
%preheader
+ %iv1 = phi i32 [ %add, %preheader ], [ %iv1.next, %backedge ]
+ %iv1.next = add i32 %iv1, -3
[llvm-branch-commits] [llvm] [AggressiveInstCombine] Use APInt and avoid truncation when folding loads (PR #118866)
llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: Rose (AreaZR)
Changes
A miscompilation issue has been addressed with improved handling.
Fixes: https://github.com/llvm/llvm-project/issues/118467. (cherry picked from
commit f68b0e36997322eeda8fd199ea80deb1b49c5410)
---
Full diff: https://github.com/llvm/llvm-project/pull/118866.diff
3 Files Affected:
- (modified)
llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp (+1-2)
- (modified) llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
(+10-10)
- (modified) llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll (+42-10)
``diff
diff --git
a/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
b/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
index d5a38ec17a2a84..1d23ec8ced204f 100644
--- a/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
+++ b/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
@@ -811,8 +811,7 @@ static bool foldConsecutiveLoads(Instruction &I, const
DataLayout &DL,
APInt Offset1(DL.getIndexTypeSizeInBits(Load1Ptr->getType()), 0);
Load1Ptr = Load1Ptr->stripAndAccumulateConstantOffsets(
DL, Offset1, /* AllowNonInbounds */ true);
-Load1Ptr = Builder.CreatePtrAdd(Load1Ptr,
-Builder.getInt32(Offset1.getZExtValue()));
+Load1Ptr = Builder.CreatePtrAdd(Load1Ptr, Builder.getInt(Offset1));
}
// Generate wider load.
NewLoad = Builder.CreateAlignedLoad(WiderType, Load1Ptr, LI1->getAlign(),
diff --git a/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
b/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
index 1400ee7f703cab..10c4c9b0ca4c99 100644
--- a/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
+++ b/llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
@@ -1121,19 +1121,19 @@ entry:
define i32 @loadCombine_4consecutive_metadata(ptr %p, ptr %pstr) {
; LE-LABEL: @loadCombine_4consecutive_metadata(
-; LE-NEXT:[[L1:%.*]] = load i32, ptr [[P:%.*]], align 1, !alias.scope !0
-; LE-NEXT:store i32 25, ptr [[PSTR:%.*]], align 4, !noalias !0
+; LE-NEXT:[[L1:%.*]] = load i32, ptr [[P:%.*]], align 1, !alias.scope
[[META0:![0-9]+]]
+; LE-NEXT:store i32 25, ptr [[PSTR:%.*]], align 4, !noalias [[META0]]
; LE-NEXT:ret i32 [[L1]]
;
; BE-LABEL: @loadCombine_4consecutive_metadata(
; BE-NEXT:[[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
; BE-NEXT:[[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
; BE-NEXT:[[P3:%.*]] = getelementptr i8, ptr [[P]], i32 3
-; BE-NEXT:[[L1:%.*]] = load i8, ptr [[P]], align 1, !alias.scope !0
-; BE-NEXT:[[L2:%.*]] = load i8, ptr [[P1]], align 1, !alias.scope !0
-; BE-NEXT:[[L3:%.*]] = load i8, ptr [[P2]], align 1, !alias.scope !0
-; BE-NEXT:[[L4:%.*]] = load i8, ptr [[P3]], align 1, !alias.scope !0
-; BE-NEXT:store i32 25, ptr [[PSTR:%.*]], align 4, !noalias !0
+; BE-NEXT:[[L1:%.*]] = load i8, ptr [[P]], align 1, !alias.scope
[[META0:![0-9]+]]
+; BE-NEXT:[[L2:%.*]] = load i8, ptr [[P1]], align 1, !alias.scope [[META0]]
+; BE-NEXT:[[L3:%.*]] = load i8, ptr [[P2]], align 1, !alias.scope [[META0]]
+; BE-NEXT:[[L4:%.*]] = load i8, ptr [[P3]], align 1, !alias.scope [[META0]]
+; BE-NEXT:store i32 25, ptr [[PSTR:%.*]], align 4, !noalias [[META0]]
; BE-NEXT:[[E1:%.*]] = zext i8 [[L1]] to i32
; BE-NEXT:[[E2:%.*]] = zext i8 [[L2]] to i32
; BE-NEXT:[[E3:%.*]] = zext i8 [[L3]] to i32
@@ -1869,7 +1869,7 @@ define i32 @loadCombine_4consecutive_badinsert2(ptr %p) {
define i32 @loadCombine_4consecutive_badinsert3(ptr %p) {
; LE-LABEL: @loadCombine_4consecutive_badinsert3(
-; LE-NEXT:[[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
+; LE-NEXT:[[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 1
; LE-NEXT:[[L1:%.*]] = load i32, ptr [[TMP1]], align 1
; LE-NEXT:ret i32 [[L1]]
;
@@ -2088,7 +2088,7 @@ define i32 @loadCombine_4consecutive_badinsert6(ptr %p) {
define void @nested_gep(ptr %p, ptr %dest) {
; LE-LABEL: @nested_gep(
-; LE-NEXT:[[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 68
+; LE-NEXT:[[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 68
; LE-NEXT:[[LD2:%.*]] = load i64, ptr [[TMP1]], align 4
; LE-NEXT:[[TRUNC:%.*]] = trunc i64 [[LD2]] to i32
; LE-NEXT:store i32 [[TRUNC]], ptr [[DEST:%.*]], align 4
@@ -2128,7 +2128,7 @@ define void @nested_gep(ptr %p, ptr %dest) {
define void @bitcast_gep(ptr %p, ptr %dest) {
; LE-LABEL: @bitcast_gep(
-; LE-NEXT:[[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 68
+; LE-NEXT:[[TMP1:%.*]] = getelementptr i8, ptr [[P:%.*]], i64 68
; LE-NEXT:[[LD2:%.*]] = load i64, ptr [[TMP1]], align 4
; LE-NEXT:[[TRUNC:%.*]] = trunc i64 [[LD2]] to i32
; LE-NEXT:store i32 [[TRUNC]], ptr [[DEST:%.*]], align 4
diff --git a/llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
b/llvm/
[llvm-branch-commits] [llvm] [AggressiveInstCombine] Use APInt and avoid truncation when folding loads (PR #118866)
AreaZR wrote: @nikic This for real is the last one. https://github.com/llvm/llvm-project/pull/118866 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/19.x: [AggressiveInstCombine] Use APInt and avoid truncation when folding loads (PR #118866)
https://github.com/AreaZR edited https://github.com/llvm/llvm-project/pull/118866 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/19.x: [AggressiveInstCombine] Use APInt and avoid truncation when folding loads (PR #118866)
https://github.com/AreaZR edited https://github.com/llvm/llvm-project/pull/118866 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Serialization] Code cleanups and polish 83233 (PR #83237)
ChuanqiXu9 wrote: > Once again, thanks for bearing with us and addressing all the issues. The > latest version seems both correct and does not cause performance regressions. > Let's land this! > > PS please note that the resolution of our compile-time profiling instruments > is not that great, we might not notice even something like a 10% regression > in compile times. Thank you very much! https://github.com/llvm/llvm-project/pull/83237 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Serialization] Code cleanups and polish 83233 (PR #83237)
ChuanqiXu9 wrote: Note that I'll merge this and https://github.com/llvm/llvm-project/pull/83233 and https://github.com/llvm/llvm-project/pull/83108 into a commit and commit it directly to trunk. Since these prs are split initially to make it clear to be reviewed. But during the review, we always add changes to this PR. So the meaning of stacked PR in this series of patches is pretty questionable. So I feel it is better to merge these PRs into a single commit so that it is easier to be cherry-picked and reverted in my experience. I'll add a link to the PR page in the commit message. Thanks every one here again. https://github.com/llvm/llvm-project/pull/83237 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Serialization] Introduce OnDiskHashTable for specializations (PR #83233)
https://github.com/ChuanqiXu9 closed https://github.com/llvm/llvm-project/pull/83233 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb][Process] Introduce LoongArch64 hw break/watchpoint support (PR #118770)
https://github.com/wangleiat created https://github.com/llvm/llvm-project/pull/118770 This patch adds support for setting/clearing hardware watchpoints and breakpoints on LoongArch 64-bit hardware. Refer to the following document for the hw break/watchpoint: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#control-and-status-registers-related-to-watchpoints Fix Failed Tests: lldb-shell :: Subprocess/clone-follow-child-wp.test lldb-shell :: Subprocess/clone-follow-parent-wp.test lldb-shell :: Subprocess/fork-follow-child-wp.test lldb-shell :: Subprocess/fork-follow-parent-wp.test lldb-shell :: Subprocess/vfork-follow-child-wp.test lldb-shell :: Subprocess/vfork-follow-parent-wp.test lldb-shell :: Watchpoint/ExpressionLanguage.test Depends on: #118043 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb][Process] Introduce LoongArch64 hw break/watchpoint support (PR #118770)
llvmbot wrote:
@llvm/pr-subscribers-lldb
Author: wanglei (wangleiat)
Changes
This patch adds support for setting/clearing hardware watchpoints and
breakpoints on LoongArch 64-bit hardware.
Refer to the following document for the hw break/watchpoint:
https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#control-and-status-registers-related-to-watchpoints
Fix Failed Tests:
lldb-shell :: Subprocess/clone-follow-child-wp.test
lldb-shell :: Subprocess/clone-follow-parent-wp.test
lldb-shell :: Subprocess/fork-follow-child-wp.test
lldb-shell :: Subprocess/fork-follow-parent-wp.test
lldb-shell :: Subprocess/vfork-follow-child-wp.test
lldb-shell :: Subprocess/vfork-follow-parent-wp.test
lldb-shell :: Watchpoint/ExpressionLanguage.test
Depends on: #118043
---
Full diff: https://github.com/llvm/llvm-project/pull/118770.diff
7 Files Affected:
- (modified)
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
(+82)
- (modified)
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.h
(+8-1)
- (modified) lldb/source/Plugins/Process/Utility/CMakeLists.txt (+1)
- (added)
lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_loongarch.cpp
(+170)
- (added)
lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_loongarch.h
(+29)
- (modified)
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
(+2-1)
- (modified) lldb/source/Target/Process.cpp (+2-1)
``diff
diff --git
a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
index f4d1bb297049da..12bd9e2104fae7 100644
---
a/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
+++
b/lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
@@ -11,6 +11,7 @@
#include "NativeRegisterContextLinux_loongarch64.h"
#include "lldb/Host/HostInfo.h"
+#include "lldb/Host/linux/Ptrace.h"
#include "lldb/Utility/DataBufferHeap.h"
#include "lldb/Utility/Log.h"
#include "lldb/Utility/RegisterValue.h"
@@ -62,6 +63,19 @@
NativeRegisterContextLinux_loongarch64::NativeRegisterContextLinux_loongarch64(
::memset(&m_fpr, 0, sizeof(m_fpr));
::memset(&m_gpr, 0, sizeof(m_gpr));
+ ::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs));
+ ::memset(&m_hbp_regs, 0, sizeof(m_hbp_regs));
+
+ // CTRL_PLV3_ENABLE, used to enable breakpoint/watchpoint
+ m_hw_dbg_enable_bit = 0x10;
+
+ // Refer to:
+ //
https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#control-and-status-registers-related-to-watchpoints
+ // 14 is just a maximum value, query hardware for actual watchpoint count.
+ m_max_hwp_supported = 14;
+ m_max_hbp_supported = 14;
+ m_refresh_hwdebug_info = true;
+
m_gpr_is_valid = false;
m_fpu_is_valid = false;
}
@@ -337,4 +351,72 @@
NativeRegisterContextLinux_loongarch64::GetExpeditedRegisters(
return expedited_reg_nums;
}
+Status NativeRegisterContextLinux_loongarch64::ReadHardwareDebugInfo() {
+ if (!m_refresh_hwdebug_info)
+return Status();
+
+ ::pid_t tid = m_thread.GetID();
+
+ int regset = NT_LOONGARCH_HW_WATCH;
+ struct iovec ioVec;
+ struct user_watch_state dreg_state;
+ Status error;
+
+ ioVec.iov_base = &dreg_state;
+ ioVec.iov_len = sizeof(dreg_state);
+ error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGSET, tid, ®set,
+&ioVec, ioVec.iov_len);
+ if (error.Fail())
+return error;
+
+ m_max_hwp_supported = dreg_state.dbg_info & 0x3f;
+
+ regset = NT_LOONGARCH_HW_BREAK;
+ error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGSET, tid, ®set,
+&ioVec, ioVec.iov_len);
+ if (error.Fail())
+return error;
+
+ m_max_hbp_supported = dreg_state.dbg_info & 0x3f;
+
+ m_refresh_hwdebug_info = false;
+
+ return error;
+}
+
+Status NativeRegisterContextLinux_loongarch64::WriteHardwareDebugRegs(
+DREGType hwbType) {
+ struct iovec ioVec;
+ struct user_watch_state dreg_state;
+ int regset;
+
+ memset(&dreg_state, 0, sizeof(dreg_state));
+ ioVec.iov_base = &dreg_state;
+
+ switch (hwbType) {
+ case eDREGTypeWATCH:
+regset = NT_LOONGARCH_HW_WATCH;
+ioVec.iov_len = sizeof(dreg_state.dbg_info) +
+(sizeof(dreg_state.dbg_regs[0]) * m_max_hwp_supported);
+
+for (uint32_t i = 0; i < m_max_hwp_supported; i++) {
+ dreg_state.dbg_regs[i].addr = m_hwp_regs[i].address;
+ dreg_state.dbg_regs[i].ctrl = m_hwp_regs[i].control;
+}
+break;
+ case eDREGTypeBREAK:
+regset = NT_LOONGARCH_HW_BREAK;
+ioVec.iov_len = sizeof(dreg_state.dbg_info) +
+(sizeof(dreg_state.dbg_regs[0]) * m_max_hbp_supported);
+
+for (uint32_t i = 0; i < m_max_hbp_supported; i++) {
+ dreg_state.dbg_regs[i].addr = m_hbp_regs[i].address;
+ dreg_state.dbg_regs[i].ctrl = m_hbp_regs[i].cont
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM (PR #118462)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118462
>From 41013becc322975d72b5480deee78d13b0dec171 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 3 Dec 2024 10:12:36 +
Subject: [PATCH] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to NPM
---
.../llvm}/CodeGen/RegAllocPriorityAdvisor.h | 79 +++-
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 1 +
llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp | 6 +-
.../lib/CodeGen/MLRegAllocPriorityAdvisor.cpp | 184 +++---
llvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp | 2 +-
llvm/lib/CodeGen/RegAllocGreedy.cpp | 9 +-
llvm/lib/CodeGen/RegAllocGreedy.h | 2 +-
llvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp | 120 +---
llvm/lib/Passes/PassBuilder.cpp | 1 +
10 files changed, 294 insertions(+), 112 deletions(-)
rename llvm/{lib => include/llvm}/CodeGen/RegAllocPriorityAdvisor.h (53%)
diff --git a/llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
b/llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
similarity index 53%
rename from llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
rename to llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
index 2d42a43c4c6372..bddfe15bf17751 100644
--- a/llvm/lib/CodeGen/RegAllocPriorityAdvisor.h
+++ b/llvm/include/llvm/CodeGen/RegAllocPriorityAdvisor.h
@@ -9,8 +9,10 @@
#ifndef LLVM_CODEGEN_REGALLOCPRIORITYADVISOR_H
#define LLVM_CODEGEN_REGALLOCPRIORITYADVISOR_H
+#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/RegAllocEvictionAdvisor.h"
#include "llvm/CodeGen/SlotIndexes.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
namespace llvm {
@@ -56,12 +58,73 @@ class DefaultPriorityAdvisor : public
RegAllocPriorityAdvisor {
unsigned getPriority(const LiveInterval &LI) const override;
};
-class RegAllocPriorityAdvisorAnalysis : public ImmutablePass {
+/// Common provider for getting the priority advisor and logging rewards.
+/// Legacy analysis forwards all calls to this provider.
+/// New analysis serves the provider as the analysis result.
+/// Expensive setup is done in the constructor, so that the advisor can be
+/// created quickly for every machine function.
+/// TODO: Remove once legacy PM support is dropped.
+class RegAllocPriorityAdvisorProvider {
public:
enum class AdvisorMode : int { Default, Release, Development };
- RegAllocPriorityAdvisorAnalysis(AdvisorMode Mode)
- : ImmutablePass(ID), Mode(Mode){};
+ RegAllocPriorityAdvisorProvider(AdvisorMode Mode) : Mode(Mode) {}
+
+ virtual ~RegAllocPriorityAdvisorProvider() = default;
+
+ virtual void logRewardIfNeeded(const MachineFunction &MF,
+ llvm::function_ref GetReward) {};
+
+ virtual std::unique_ptr
+ getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
+
+ void setAnalyses(SlotIndexes *SI) { this->SI = SI; }
+
+ AdvisorMode getAdvisorMode() const { return Mode; }
+
+protected:
+ SlotIndexes *SI;
+
+private:
+ const AdvisorMode Mode;
+};
+
+RegAllocPriorityAdvisorProvider *createReleaseModePriorityAdvisorProvider();
+
+RegAllocPriorityAdvisorProvider *
+createDevelopmentModePriorityAdvisorProvider(LLVMContext &Ctx);
+
+class RegAllocPriorityAdvisorAnalysis
+: public AnalysisInfoMixin {
+ static AnalysisKey Key;
+ friend AnalysisInfoMixin;
+
+public:
+ struct Result {
+// Owned by this analysis.
+RegAllocPriorityAdvisorProvider *Provider;
+
+bool invalidate(MachineFunction &MF, const PreservedAnalyses &PA,
+MachineFunctionAnalysisManager::Invalidator &Inv) {
+ auto PAC = PA.getChecker();
+ return !PAC.preservedWhenStateless() ||
+ Inv.invalidate(MF, PA);
+}
+ };
+
+ Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
+
+private:
+ void initializeProvider(LLVMContext &Ctx);
+ std::unique_ptr Provider;
+};
+
+class RegAllocPriorityAdvisorAnalysisLegacy : public ImmutablePass {
+public:
+ enum class AdvisorMode : int { Default, Release, Development };
+
+ RegAllocPriorityAdvisorAnalysisLegacy(AdvisorMode Mode)
+ : ImmutablePass(ID), Mode(Mode) {};
static char ID;
/// Get an advisor for the given context (i.e. machine function, etc)
@@ -69,7 +132,7 @@ class RegAllocPriorityAdvisorAnalysis : public ImmutablePass
{
getAdvisor(const MachineFunction &MF, const RAGreedy &RA) = 0;
AdvisorMode getAdvisorMode() const { return Mode; }
virtual void logRewardIfNeeded(const MachineFunction &MF,
- llvm::function_ref GetReward){};
+ llvm::function_ref GetReward) {};
protected:
// This analysis preserves everything, and subclasses may have additional
@@ -85,11 +148,13 @@ class RegAllocPriorityAdvisorAnalysis : public
ImmutablePass {
/// Specialization for the API used by the analysis infrastructure to create
/// an instance of the pri
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port LiveStacks analysis to NPM (PR #118778)
https://github.com/optimisan created
https://github.com/llvm/llvm-project/pull/118778
None
>From 949e14d75114c84a07d2494d7c5cd1443cfa36fb Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 5 Dec 2024 09:44:25 +
Subject: [PATCH] [CodeGen][NewPM] Port LiveStacks analysis to NPM
---
llvm/include/llvm/CodeGen/LiveStacks.h| 37 ++
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 2 +-
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/InlineSpiller.cpp| 4 +-
llvm/lib/CodeGen/LiveStacks.cpp | 38 ++-
llvm/lib/CodeGen/MachineVerifier.cpp | 5 ++-
llvm/lib/CodeGen/RegAllocBasic.cpp| 6 +--
llvm/lib/CodeGen/RegAllocGreedy.cpp | 6 +--
llvm/lib/CodeGen/RegAllocPBQP.cpp | 6 +--
llvm/lib/CodeGen/StackSlotColoring.cpp| 6 +--
llvm/lib/CodeGen/VirtRegMap.cpp | 6 +--
llvm/lib/Passes/PassBuilder.cpp | 1 +
.../AMDGPU/AMDGPUMarkLastScratchLoad.cpp | 6 +--
.../LoongArchDeadRegisterDefinitions.cpp | 2 +-
.../RISCV/RISCVDeadRegisterDefinitions.cpp| 2 +-
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp | 2 +-
17 files changed, 89 insertions(+), 44 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/LiveStacks.h
b/llvm/include/llvm/CodeGen/LiveStacks.h
index 2edc2985f0ee66..261b8a365a3d0a 100644
--- a/llvm/include/llvm/CodeGen/LiveStacks.h
+++ b/llvm/include/llvm/CodeGen/LiveStacks.h
@@ -17,6 +17,7 @@
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/IR/PassManager.h"
#include "llvm/InitializePasses.h"
#include "llvm/PassRegistry.h"
#include
@@ -32,7 +33,7 @@ class raw_ostream;
class TargetRegisterClass;
class TargetRegisterInfo;
-class LiveStacks : public MachineFunctionPass {
+class LiveStacks {
const TargetRegisterInfo *TRI = nullptr;
/// Special pool allocator for VNInfo's (LiveInterval val#).
@@ -47,12 +48,6 @@ class LiveStacks : public MachineFunctionPass {
std::map S2RCMap;
public:
- static char ID; // Pass identification, replacement for typeid
-
- LiveStacks() : MachineFunctionPass(ID) {
-initializeLiveStacksPass(*PassRegistry::getPassRegistry());
- }
-
using iterator = SS2IntervalMap::iterator;
using const_iterator = SS2IntervalMap::const_iterator;
@@ -92,6 +87,25 @@ class LiveStacks : public MachineFunctionPass {
VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; }
+ void releaseMemory();
+ /// init - analysis entry point
+ void init(MachineFunction &MF);
+ void print(raw_ostream &O, const Module *M = nullptr) const;
+};
+
+class LiveStacksWrapperLegacy : public MachineFunctionPass {
+ LiveStacks Impl;
+
+public:
+ static char ID; // Pass identification, replacement for typeid
+
+ LiveStacksWrapperLegacy() : MachineFunctionPass(ID) {
+initializeLiveStacksWrapperLegacyPass(*PassRegistry::getPassRegistry());
+ }
+
+ LiveStacks &getLS() { return Impl; }
+ const LiveStacks &getLS() const { return Impl; }
+
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
@@ -102,6 +116,15 @@ class LiveStacks : public MachineFunctionPass {
void print(raw_ostream &O, const Module * = nullptr) const override;
};
+class LiveStacksAnalysis : public AnalysisInfoMixin {
+ static AnalysisKey Key;
+ friend AnalysisInfoMixin;
+
+public:
+ using Result = LiveStacks;
+
+ LiveStacks run(MachineFunction &MF, MachineFunctionAnalysisManager &);
+};
} // end namespace llvm
#endif
diff --git a/llvm/include/llvm/InitializePasses.h
b/llvm/include/llvm/InitializePasses.h
index 1d690165134ca2..87faf111a30cc9 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -158,7 +158,7 @@ void
initializeLiveDebugVariablesWrapperLegacyPass(PassRegistry &);
void initializeLiveIntervalsWrapperPassPass(PassRegistry &);
void initializeLiveRangeShrinkPass(PassRegistry &);
void initializeLiveRegMatrixWrapperLegacyPass(PassRegistry &);
-void initializeLiveStacksPass(PassRegistry &);
+void initializeLiveStacksWrapperLegacyPass(PassRegistry &);
void initializeLiveVariablesWrapperPassPass(PassRegistry &);
void initializeLoadStoreOptPass(PassRegistry &);
void initializeLoadStoreVectorizerLegacyPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def
b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 88f57568645eb4..74c67ab7f34a68 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -118,7 +118,7 @@ MACHINE_FUNCTION_ANALYSIS("regalloc-priority",
RegAllocPriorityAdvisorAnalysis()
MACHINE_FUNCTION_ANALYSIS("slot-indexes", SlotIndexesAnalysis())
MACHINE_FUNCTION_ANALYSIS("spill-code-placement", SpillPlacementAnalysis())
MACHINE_FUNCTION_ANALYSIS("virtregmap", VirtRegMapAnalysis())
-/
[llvm-branch-commits] [llvm] [CodeGen][PM] Initialize analyses with isAnalysis=true (PR #118779)
optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/118779?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#118779** https://app.graphite.dev/github/pr/llvm/llvm-project/118779?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/118779?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#118778** https://app.graphite.dev/github/pr/llvm/llvm-project/118778?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#118462** https://app.graphite.dev/github/pr/llvm/llvm-project/118462?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#117309** https://app.graphite.dev/github/pr/llvm/llvm-project/117309?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/118779 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][PM] Initialize analyses with isAnalysis=true (PR #118779)
https://github.com/optimisan created
https://github.com/llvm/llvm-project/pull/118779
Analyses should be marked as analyses else they are prone to be ignored
by the legacy analysis cache mechanism and get scheduled redundantly.
>From d9e5facd3db2f1103fbf429cfe69bdbaebbbe579 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 5 Dec 2024 10:05:30 +
Subject: [PATCH] [CodeGen][PM] Initialize analyses with isAnalysis=true
Analyses should be marked as analyses else they are prone to be ignored
by the legacy analysis cache mechanism and get scheduled redundantly.
---
llvm/lib/CodeGen/GCMetadata.cpp| 2 +-
llvm/lib/CodeGen/LiveDebugVariables.cpp| 2 +-
llvm/lib/CodeGen/LiveIntervals.cpp | 2 +-
llvm/lib/CodeGen/LiveRegMatrix.cpp | 2 +-
llvm/lib/CodeGen/LiveStacks.cpp| 2 +-
llvm/lib/CodeGen/SlotIndexes.cpp | 2 +-
llvm/lib/CodeGen/VirtRegMap.cpp| 2 +-
llvm/lib/Transforms/Utils/LoopSimplify.cpp | 4 ++--
8 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/llvm/lib/CodeGen/GCMetadata.cpp b/llvm/lib/CodeGen/GCMetadata.cpp
index 6d1cc1a58e27df..f33008c9e0f232 100644
--- a/llvm/lib/CodeGen/GCMetadata.cpp
+++ b/llvm/lib/CodeGen/GCMetadata.cpp
@@ -66,7 +66,7 @@ GCFunctionAnalysis::run(Function &F, FunctionAnalysisManager
&FAM) {
}
INITIALIZE_PASS(GCModuleInfo, "collector-metadata",
-"Create Garbage Collector Module Metadata", false, false)
+"Create Garbage Collector Module Metadata", false, true)
//
-
diff --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp
b/llvm/lib/CodeGen/LiveDebugVariables.cpp
index 317d3401f000a4..79085e587ebc45 100644
--- a/llvm/lib/CodeGen/LiveDebugVariables.cpp
+++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp
@@ -82,7 +82,7 @@ INITIALIZE_PASS_BEGIN(LiveDebugVariablesWrapperLegacy,
DEBUG_TYPE,
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_END(LiveDebugVariablesWrapperLegacy, DEBUG_TYPE,
-"Debug Variable Analysis", false, false)
+"Debug Variable Analysis", false, true)
void LiveDebugVariablesWrapperLegacy::getAnalysisUsage(
AnalysisUsage &AU) const {
diff --git a/llvm/lib/CodeGen/LiveIntervals.cpp
b/llvm/lib/CodeGen/LiveIntervals.cpp
index f9ee6e4563f8d6..f38527a3ce6a31 100644
--- a/llvm/lib/CodeGen/LiveIntervals.cpp
+++ b/llvm/lib/CodeGen/LiveIntervals.cpp
@@ -83,7 +83,7 @@ INITIALIZE_PASS_BEGIN(LiveIntervalsWrapperPass,
"liveintervals",
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_END(LiveIntervalsWrapperPass, "liveintervals",
-"Live Interval Analysis", false, false)
+"Live Interval Analysis", false, true)
bool LiveIntervalsWrapperPass::runOnMachineFunction(MachineFunction &MF) {
LIS.Indexes = &getAnalysis().getSI();
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp
b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index bc8c59381a40e1..9744c47d5a8510 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -41,7 +41,7 @@ INITIALIZE_PASS_BEGIN(LiveRegMatrixWrapperLegacy,
"liveregmatrix",
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
INITIALIZE_PASS_END(LiveRegMatrixWrapperLegacy, "liveregmatrix",
-"Live Register Matrix", false, false)
+"Live Register Matrix", false, true)
void LiveRegMatrixWrapperLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
diff --git a/llvm/lib/CodeGen/LiveStacks.cpp b/llvm/lib/CodeGen/LiveStacks.cpp
index 49fe5d6b23452e..e5d2b90578d829 100644
--- a/llvm/lib/CodeGen/LiveStacks.cpp
+++ b/llvm/lib/CodeGen/LiveStacks.cpp
@@ -24,7 +24,7 @@ INITIALIZE_PASS_BEGIN(LiveStacksWrapperLegacy, DEBUG_TYPE,
"Live Stack Slot Analysis", false, false)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_END(LiveStacksWrapperLegacy, DEBUG_TYPE,
-"Live Stack Slot Analysis", false, false)
+"Live Stack Slot Analysis", false, true)
char &llvm::LiveStacksID = LiveStacksWrapperLegacy::ID;
diff --git a/llvm/lib/CodeGen/SlotIndexes.cpp b/llvm/lib/CodeGen/SlotIndexes.cpp
index 1b92a5aa59d18c..8d2832b3fdd56e 100644
--- a/llvm/lib/CodeGen/SlotIndexes.cpp
+++ b/llvm/lib/CodeGen/SlotIndexes.cpp
@@ -45,7 +45,7 @@ SlotIndexes::~SlotIndexes() {
}
INITIALIZE_PASS(SlotIndexesWrapperPass, DEBUG_TYPE, "Slot index numbering",
-false, false)
+false, true)
STATISTIC(NumLocalRenum, "Number of local renumberings");
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index 1352102a93d01b..b28c74600e7a29 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++
[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for load (PR #112882)
https://github.com/petar-avramovic updated
https://github.com/llvm/llvm-project/pull/112882
>From f563ccef965406f4df3a4481142795de32e596f4 Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Wed, 30 Oct 2024 15:37:59 +0100
Subject: [PATCH] AMDGPU/GlobalISel: RegBankLegalize rules for load
Add IDs for bit width that cover multiple LLTs: B32 B64 etc.
"Predicate" wrapper class for bool predicate functions used to
write pretty rules. Predicates can be combined using &&, || and !.
Lowering for splitting and widening loads.
Write rules for loads to not change existing mir tests from old
regbankselect.
---
.../AMDGPU/AMDGPURegBankLegalizeHelper.cpp| 288 +++-
.../AMDGPU/AMDGPURegBankLegalizeHelper.h | 5 +
.../AMDGPU/AMDGPURegBankLegalizeRules.cpp | 278 ++-
.../AMDGPU/AMDGPURegBankLegalizeRules.h | 65 +++-
.../AMDGPU/GlobalISel/regbankselect-load.mir | 320 +++---
.../GlobalISel/regbankselect-zextload.mir | 9 +-
6 files changed, 900 insertions(+), 65 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
index 6d9cf487c6dd25..6e78e29555ee11 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
@@ -38,6 +38,83 @@ void
RegBankLegalizeHelper::findRuleAndApplyMapping(MachineInstr &MI) {
lower(MI, Mapping, WaterfallSgprs);
}
+void RegBankLegalizeHelper::splitLoad(MachineInstr &MI,
+ ArrayRef LLTBreakdown, LLT MergeTy)
{
+ MachineFunction &MF = B.getMF();
+ assert(MI.getNumMemOperands() == 1);
+ MachineMemOperand &BaseMMO = **MI.memoperands_begin();
+ Register Dst = MI.getOperand(0).getReg();
+ const RegisterBank *DstRB = MRI.getRegBankOrNull(Dst);
+ Register Base = MI.getOperand(1).getReg();
+ LLT PtrTy = MRI.getType(Base);
+ const RegisterBank *PtrRB = MRI.getRegBankOrNull(Base);
+ LLT OffsetTy = LLT::scalar(PtrTy.getSizeInBits());
+ SmallVector LoadPartRegs;
+
+ unsigned ByteOffset = 0;
+ for (LLT PartTy : LLTBreakdown) {
+Register BasePlusOffset;
+if (ByteOffset == 0) {
+ BasePlusOffset = Base;
+} else {
+ auto Offset = B.buildConstant({PtrRB, OffsetTy}, ByteOffset);
+ BasePlusOffset = B.buildPtrAdd({PtrRB, PtrTy}, Base, Offset).getReg(0);
+}
+auto *OffsetMMO = MF.getMachineMemOperand(&BaseMMO, ByteOffset, PartTy);
+auto LoadPart = B.buildLoad({DstRB, PartTy}, BasePlusOffset, *OffsetMMO);
+LoadPartRegs.push_back(LoadPart.getReg(0));
+ByteOffset += PartTy.getSizeInBytes();
+ }
+
+ if (!MergeTy.isValid()) {
+// Loads are of same size, concat or merge them together.
+B.buildMergeLikeInstr(Dst, LoadPartRegs);
+ } else {
+// Loads are not all of same size, need to unmerge them to smaller pieces
+// of MergeTy type, then merge pieces to Dst.
+SmallVector MergeTyParts;
+for (Register Reg : LoadPartRegs) {
+ if (MRI.getType(Reg) == MergeTy) {
+MergeTyParts.push_back(Reg);
+ } else {
+auto Unmerge = B.buildUnmerge({DstRB, MergeTy}, Reg);
+for (unsigned i = 0; i < Unmerge->getNumOperands() - 1; ++i)
+ MergeTyParts.push_back(Unmerge.getReg(i));
+ }
+}
+B.buildMergeLikeInstr(Dst, MergeTyParts);
+ }
+ MI.eraseFromParent();
+}
+
+void RegBankLegalizeHelper::widenLoad(MachineInstr &MI, LLT WideTy,
+ LLT MergeTy) {
+ MachineFunction &MF = B.getMF();
+ assert(MI.getNumMemOperands() == 1);
+ MachineMemOperand &BaseMMO = **MI.memoperands_begin();
+ Register Dst = MI.getOperand(0).getReg();
+ const RegisterBank *DstRB = MRI.getRegBankOrNull(Dst);
+ Register Base = MI.getOperand(1).getReg();
+
+ MachineMemOperand *WideMMO = MF.getMachineMemOperand(&BaseMMO, 0, WideTy);
+ auto WideLoad = B.buildLoad({DstRB, WideTy}, Base, *WideMMO);
+
+ if (WideTy.isScalar()) {
+B.buildTrunc(Dst, WideLoad);
+ } else {
+SmallVector MergeTyParts;
+auto Unmerge = B.buildUnmerge({DstRB, MergeTy}, WideLoad);
+
+LLT DstTy = MRI.getType(Dst);
+unsigned NumElts = DstTy.getSizeInBits() / MergeTy.getSizeInBits();
+for (unsigned i = 0; i < NumElts; ++i) {
+ MergeTyParts.push_back(Unmerge.getReg(i));
+}
+B.buildMergeLikeInstr(Dst, MergeTyParts);
+ }
+ MI.eraseFromParent();
+}
+
void RegBankLegalizeHelper::lower(MachineInstr &MI,
const RegBankLLTMapping &Mapping,
SmallSet &WaterfallSgprs) {
@@ -116,6 +193,54 @@ void RegBankLegalizeHelper::lower(MachineInstr &MI,
MI.eraseFromParent();
break;
}
+ case SplitLoad: {
+LLT DstTy = MRI.getType(MI.getOperand(0).getReg());
+unsigned Size = DstTy.getSizeInBits();
+// Even split to 128-bit loads
+if (Size > 128) {
+ LLT B128;
+ if (DstTy.isVector()) {
+LLT EltTy = DstTy.getElementType();
+B128 = LLT::f
[llvm-branch-commits] [llvm] MachineUniformityAnalysis: Improve isConstantOrUndefValuePhi (PR #112866)
https://github.com/petar-avramovic updated
https://github.com/llvm/llvm-project/pull/112866
>From 8801c5d2a09a59313acc26da52c1b6383369f624 Mon Sep 17 00:00:00 2001
From: Petar Avramovic
Date: Thu, 31 Oct 2024 14:10:57 +0100
Subject: [PATCH] MachineUniformityAnalysis: Improve isConstantOrUndefValuePhi
Change existing code for G_PHI to match what LLVM-IR version is doing
via PHINode::hasConstantOrUndefValue. This is not safe for regular PHI
since it may appear with an undef operand and getVRegDef can fail.
Most notably this improves number of values that can be allocated
to sgpr register bank in AMDGPURegBankSelect.
Common case here are phis that appear in structurize-cfg lowering
for cycles with multiple exits:
Undef incoming value is coming from block that reached cycle exit
condition, if other incoming is uniform keep the phi uniform despite
the fact it is joining values from pair of blocks that are entered
via divergent condition branch.
---
llvm/lib/CodeGen/MachineSSAContext.cpp| 27 +-
.../AMDGPU/MIR/hidden-diverge-gmir.mir| 28 +++
.../AMDGPU/MIR/hidden-loop-diverge.mir| 4 +-
.../AMDGPU/MIR/uses-value-from-cycle.mir | 8 +-
.../GlobalISel/divergence-structurizer.mir| 80 --
.../regbankselect-mui-regbanklegalize.mir | 69 ---
.../regbankselect-mui-regbankselect.mir | 18 ++--
.../AMDGPU/GlobalISel/regbankselect-mui.ll| 84 ++-
.../AMDGPU/GlobalISel/regbankselect-mui.mir | 51 ++-
9 files changed, 191 insertions(+), 178 deletions(-)
diff --git a/llvm/lib/CodeGen/MachineSSAContext.cpp
b/llvm/lib/CodeGen/MachineSSAContext.cpp
index e384187b6e8593..8e13c0916dd9e1 100644
--- a/llvm/lib/CodeGen/MachineSSAContext.cpp
+++ b/llvm/lib/CodeGen/MachineSSAContext.cpp
@@ -54,9 +54,34 @@ const MachineBasicBlock
*MachineSSAContext::getDefBlock(Register value) const {
return F->getRegInfo().getVRegDef(value)->getParent();
}
+static bool isUndef(const MachineInstr &MI) {
+ return MI.getOpcode() == TargetOpcode::G_IMPLICIT_DEF ||
+ MI.getOpcode() == TargetOpcode::IMPLICIT_DEF;
+}
+
+/// MachineInstr equivalent of PHINode::hasConstantOrUndefValue() for G_PHI.
template <>
bool MachineSSAContext::isConstantOrUndefValuePhi(const MachineInstr &Phi) {
- return Phi.isConstantValuePHI();
+ if (!Phi.isPHI())
+return false;
+
+ // In later passes PHI may appear with an undef operand, getVRegDef can fail.
+ if (Phi.getOpcode() == TargetOpcode::PHI)
+return Phi.isConstantValuePHI();
+
+ // For G_PHI we do equivalent of PHINode::hasConstantOrUndefValue().
+ const MachineRegisterInfo &MRI = Phi.getMF()->getRegInfo();
+ Register This = Phi.getOperand(0).getReg();
+ Register ConstantValue;
+ for (unsigned i = 1, e = Phi.getNumOperands(); i < e; i += 2) {
+Register Incoming = Phi.getOperand(i).getReg();
+if (Incoming != This && !isUndef(*MRI.getVRegDef(Incoming))) {
+ if (ConstantValue && ConstantValue != Incoming)
+return false;
+ ConstantValue = Incoming;
+}
+ }
+ return true;
}
template <>
diff --git
a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
index ce00edf3363f77..9694a340b5e906 100644
--- a/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
+++ b/llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
@@ -1,24 +1,24 @@
# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 |
FileCheck %s
# CHECK-LABEL: MachineUniformityInfo for function: hidden_diverge
# CHECK-LABEL: BLOCK bb.0
-# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32) = G_INTRINSIC
intrinsic(@llvm.amdgcn.workitem.id.x)
-# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_ICMP intpred(slt)
-# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_XOR %{{[0-9]*}}:_,
%{{[0-9]*}}:_
-# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1), %{{[0-9]*}}:_(s64) =
G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.if)
-# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1), %{{[0-9]*}}:_(s64) =
G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.if)
-# CHECK: DIVERGENT: G_BRCOND %{{[0-9]*}}:_(s1), %bb.1
-# CHECK: DIVERGENT: G_BR %bb.2
+# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s32) = G_INTRINSIC
intrinsic(@llvm.amdgcn.workitem.id.x)
+# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_ICMP intpred(slt)
+# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1) = G_XOR %{{[0-9]*}}:_,
%{{[0-9]*}}:_
+# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1), %{{[0-9]*}}:_(s64) =
G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.if)
+# CHECK: DIVERGENT: %{{[0-9]*}}: %{{[0-9]*}}:_(s1), %{{[0-9]*}}:_(s64) =
G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.if)
+# CHECK: DIVERGENT: G_BRCOND %{{[0-9]*}}:_(s1), %bb.1
+# CHECK: DIVERGENT: G_BR %bb.2
# CHECK-LABEL: BLOCK bb.1
# CHECK-LABEL: BLOCK bb.2
-# CHECK: D
[llvm-branch-commits] [llvm] [CodeGen][PM] Initialize analyses with isAnalysis=true (PR #118779)
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/118779 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Serialization] Code cleanups and polish 83233 (PR #83237)
https://github.com/ilya-biryukov approved this pull request. https://github.com/llvm/llvm-project/pull/83237 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port LiveStacks analysis to NPM (PR #118778)
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/118778 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: AMDGPURegBankLegalize (PR #112864)
@@ -69,11 +82,295 @@ FunctionPass *llvm::createAMDGPURegBankLegalizePass() {
return new AMDGPURegBankLegalize();
}
-using namespace AMDGPU;
+const RegBankLegalizeRules &getRules(const GCNSubtarget &ST,
+ MachineRegisterInfo &MRI) {
+ static std::mutex GlobalMutex;
+ static SmallDenseMap>
+ CacheForRuleSet;
+ std::lock_guard Lock(GlobalMutex);
+ if (!CacheForRuleSet.contains(ST.getGeneration())) {
+auto Rules = std::make_unique(ST, MRI);
+CacheForRuleSet[ST.getGeneration()] = std::move(Rules);
+ } else {
+CacheForRuleSet[ST.getGeneration()]->refreshRefs(ST, MRI);
+ }
+ return *CacheForRuleSet[ST.getGeneration()];
+}
+
+class AMDGPURegBankLegalizeCombiner {
+ MachineIRBuilder &B;
+ MachineRegisterInfo &MRI;
+ const SIRegisterInfo &TRI;
+ const RegisterBank *SgprRB;
+ const RegisterBank *VgprRB;
+ const RegisterBank *VccRB;
+
+ static constexpr LLT S1 = LLT::scalar(1);
+ static constexpr LLT S16 = LLT::scalar(16);
+ static constexpr LLT S32 = LLT::scalar(32);
+ static constexpr LLT S64 = LLT::scalar(64);
+
+public:
+ AMDGPURegBankLegalizeCombiner(MachineIRBuilder &B, const SIRegisterInfo &TRI,
+const RegisterBankInfo &RBI)
+ : B(B), MRI(*B.getMRI()), TRI(TRI),
+SgprRB(&RBI.getRegBank(AMDGPU::SGPRRegBankID)),
+VgprRB(&RBI.getRegBank(AMDGPU::VGPRRegBankID)),
+VccRB(&RBI.getRegBank(AMDGPU::VCCRegBankID)) {};
+
+ bool isLaneMask(Register Reg) {
+const RegisterBank *RB = MRI.getRegBankOrNull(Reg);
+if (RB && RB->getID() == AMDGPU::VCCRegBankID)
+ return true;
+
+const TargetRegisterClass *RC = MRI.getRegClassOrNull(Reg);
+return RC && TRI.isSGPRClass(RC) && MRI.getType(Reg) == LLT::scalar(1);
+ }
+
+ void cleanUpAfterCombine(MachineInstr &MI, MachineInstr *Optional0) {
petar-avramovic wrote:
this is member function of AMDGPURegBankLegalizeCombner since it needs access
to MRI
https://github.com/llvm/llvm-project/pull/112864
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[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: AMDGPURegBankLegalize (PR #112864)
@@ -69,11 +82,295 @@ FunctionPass *llvm::createAMDGPURegBankLegalizePass() {
return new AMDGPURegBankLegalize();
}
-using namespace AMDGPU;
+const RegBankLegalizeRules &getRules(const GCNSubtarget &ST,
+ MachineRegisterInfo &MRI) {
+ static std::mutex GlobalMutex;
+ static SmallDenseMap>
+ CacheForRuleSet;
+ std::lock_guard Lock(GlobalMutex);
+ if (!CacheForRuleSet.contains(ST.getGeneration())) {
+auto Rules = std::make_unique(ST, MRI);
+CacheForRuleSet[ST.getGeneration()] = std::move(Rules);
+ } else {
+CacheForRuleSet[ST.getGeneration()]->refreshRefs(ST, MRI);
+ }
+ return *CacheForRuleSet[ST.getGeneration()];
+}
+
+class AMDGPURegBankLegalizeCombiner {
+ MachineIRBuilder &B;
+ MachineRegisterInfo &MRI;
+ const SIRegisterInfo &TRI;
+ const RegisterBank *SgprRB;
+ const RegisterBank *VgprRB;
+ const RegisterBank *VccRB;
+
+ static constexpr LLT S1 = LLT::scalar(1);
+ static constexpr LLT S16 = LLT::scalar(16);
+ static constexpr LLT S32 = LLT::scalar(32);
+ static constexpr LLT S64 = LLT::scalar(64);
+
+public:
+ AMDGPURegBankLegalizeCombiner(MachineIRBuilder &B, const SIRegisterInfo &TRI,
+const RegisterBankInfo &RBI)
+ : B(B), MRI(*B.getMRI()), TRI(TRI),
+SgprRB(&RBI.getRegBank(AMDGPU::SGPRRegBankID)),
+VgprRB(&RBI.getRegBank(AMDGPU::VGPRRegBankID)),
+VccRB(&RBI.getRegBank(AMDGPU::VCCRegBankID)) {};
+
+ bool isLaneMask(Register Reg) {
+const RegisterBank *RB = MRI.getRegBankOrNull(Reg);
+if (RB && RB->getID() == AMDGPU::VCCRegBankID)
+ return true;
+
+const TargetRegisterClass *RC = MRI.getRegClassOrNull(Reg);
+return RC && TRI.isSGPRClass(RC) && MRI.getType(Reg) == LLT::scalar(1);
+ }
+
+ void cleanUpAfterCombine(MachineInstr &MI, MachineInstr *Optional0) {
+MI.eraseFromParent();
+if (Optional0 && isTriviallyDead(*Optional0, MRI))
+ Optional0->eraseFromParent();
+ }
+
+ std::pair tryMatch(Register Src, unsigned Opcode) {
petar-avramovic wrote:
This is much more convenient, shorter and easier to read.
for mi_match need to declare MI and Reg to pass as arguments, then need to
match same thing twice using something like m_all_of(m_MInstr(...),
m_Reg(...))).
This is a simple opcode check. Also when written like this it allows for
structured binding of MI and Reg
https://github.com/llvm/llvm-project/pull/112864
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[llvm-branch-commits] [clang] [Serialization] Code cleanups and polish 83233 (PR #83237)
ilya-biryukov wrote: Once again, thanks for bearing with us and addressing all the issues. The latest version seems both correct and does not cause performance regressions. Let's land this! PS please note that the resolution of our compile-time profiling instruments is not that great, we might not notice even something like a 10% regression in compile times. https://github.com/llvm/llvm-project/pull/83237 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: AMDGPURegBankLegalize (PR #112864)
@@ -106,3 +106,59 @@ void IntrinsicLaneMaskAnalyzer::findLCSSAPhi(Register Reg)
{
S32S64LaneMask.insert(LCSSAPhi.getOperand(0).getReg());
}
}
+
+static LLT getReadAnyLaneSplitTy(LLT Ty) {
+ if (Ty.isVector()) {
+LLT ElTy = Ty.getElementType();
+if (ElTy == LLT::scalar(16))
+ return LLT::fixed_vector(2, 16);
+// S32, S64 or pointer
+return ElTy;
+ }
+
+ // Large scalars and 64-bit pointers
+ return LLT::scalar(32);
+}
+
+static Register buildReadAnyLane(MachineIRBuilder &B, Register VgprSrc,
petar-avramovic wrote:
there is circular dependency between buildReadAnyLane and unmergeReadAnyLane
https://github.com/llvm/llvm-project/pull/112864
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[llvm-branch-commits] [clang] [llvm] [clang][OpenMP] Prototype #3 of directive splitting (PR #118880)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 1447ec21597f752b29e367a46f06eecdf9c81dd7
ba9e94076839e534f761af41442d03d53c5b40ca --extensions h,cpp --
clang/lib/Sema/SemaOpenMPExt.cpp clang/lib/Sema/SemaOpenMPExt.h
clang/include/clang/AST/OpenMPClause.h clang/include/clang/AST/Stmt.h
clang/include/clang/Basic/OpenMPKinds.h clang/include/clang/Sema/SemaOpenMP.h
clang/lib/AST/Stmt.cpp clang/lib/AST/StmtPrinter.cpp
clang/lib/Basic/OpenMPKinds.cpp clang/lib/CodeGen/CGStmtOpenMP.cpp
clang/lib/Parse/ParseOpenMP.cpp clang/lib/Sema/SemaExpr.cpp
clang/lib/Sema/SemaOpenMP.cpp clang/lib/Sema/TreeTransform.h
llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
llvm/include/llvm/Frontend/OpenMP/OMP.h llvm/lib/Frontend/OpenMP/OMP.cpp
``
View the diff from clang-format here.
``diff
diff --git a/clang/include/clang/Sema/SemaOpenMP.h
b/clang/include/clang/Sema/SemaOpenMP.h
index 081b6154be..ecd01363fc 100644
--- a/clang/include/clang/Sema/SemaOpenMP.h
+++ b/clang/include/clang/Sema/SemaOpenMP.h
@@ -1445,9 +1445,9 @@ public:
VariableImplicitInfo &include(const VariableImplicitInfo &Other);
- #ifndef NDEBUG
+#ifndef NDEBUG
bool empty() const;
- #endif
+#endif
private:
std::pair getDecl(Expr *E);
diff --git a/clang/lib/Sema/SemaOpenMPExt.cpp b/clang/lib/Sema/SemaOpenMPExt.cpp
index a8693c65c3..45ff19b179 100644
--- a/clang/lib/Sema/SemaOpenMPExt.cpp
+++ b/clang/lib/Sema/SemaOpenMPExt.cpp
@@ -939,8 +939,7 @@ Defaultmap make(const OMPDefaultmapClause &C) {
};
}
-Doacross make(DependenceType DepType,
- llvm::ArrayRef Vars);
+Doacross make(DependenceType DepType, llvm::ArrayRef Vars);
Depend make(const OMPDependClause &C) {
std::optional maybeIterator = tryMakeIterator(C.getModifier());
@@ -1001,12 +1000,10 @@ DistSchedule make(const OMPDistScheduleClause &C) {
};
}
-Doacross make(DependenceType DepType,
- llvm::ArrayRef Vars) {
+Doacross make(DependenceType DepType, llvm::ArrayRef Vars) {
// XXX The loop iteration distance vector is unavailable (it's not exported
// from Sema/SemaOpenMP.
- assert(DepType == DependenceType::Sink ||
- DepType == DependenceType::Source);
+ assert(DepType == DependenceType::Sink || DepType == DependenceType::Source);
return Doacross{{/*DependenceType=*/DepType, /*Vector=*/{}}};
}
diff --git a/clang/lib/Sema/SemaOpenMPExt.h b/clang/lib/Sema/SemaOpenMPExt.h
index 7a36837560..148306fde5 100644
--- a/clang/lib/Sema/SemaOpenMPExt.h
+++ b/clang/lib/Sema/SemaOpenMPExt.h
@@ -310,15 +310,15 @@ auto vnoc(clause::Defaultmap::ImplicitBehavior T)
auto vnoc(clause::Device::DeviceModifier T)
-> clang::OpenMPDeviceClauseModifier;
auto vnoc(clause::DistSchedule::Kind T) -> clang::OpenMPDistScheduleClauseKind;
-//auto vnoc(clause::Grainsize::Prescriptiveness T)
-//-> clang::OpenMPGrainsizeClauseModifier;
+// auto vnoc(clause::Grainsize::Prescriptiveness T)
+// -> clang::OpenMPGrainsizeClauseModifier;
auto vnoc(clause::Lastprivate::LastprivateModifier T)
-> clang::OpenMPLastprivateModifier;
auto vnoc(clause::Linear::LinearModifier T) -> clang::OpenMPLinearClauseKind;
auto vnoc(clause::Map::MapType T) -> clang::OpenMPMapClauseKind;
auto vnoc(clause::Map::MapTypeModifier T) -> clang::OpenMPMapModifierKind;
-//auto vnoc(clause::NumTasks::Prescriptiveness)
-//-> clang::OpenMPNumTasksClauseModifier;
+// auto vnoc(clause::NumTasks::Prescriptiveness)
+// -> clang::OpenMPNumTasksClauseModifier;
auto vnoc(clause::Order::Ordering T) -> clang::OpenMPOrderClauseKind;
auto vnoc(clause::Order::OrderModifier T) -> clang::OpenMPOrderClauseModifier;
auto vnoc(clause::Reduction::ReductionModifier T)
diff --git a/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
b/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
index a99f52a8a1..ce856430e9 100644
--- a/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
+++ b/llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
@@ -96,7 +96,8 @@ struct ConstructDecompositionT {
llvm::omp::Directive dir,
llvm::ArrayRef clauses,
bool makeImplicit = true)
- : version(ver), construct(dir), makeImplicit(makeImplicit),
helper(helper) {
+ : version(ver), construct(dir), makeImplicit(makeImplicit),
+helper(helper) {
for (const ClauseTy &clause : clauses)
nodes.push_back(&clause);
@@ -253,7 +254,7 @@ private:
uint32_t version;
llvm::omp::Directive construct;
- bool makeImplicit; // Whether to create implicit clauses.
+ bool makeImplicit; // Whether to create implicit clauses.
HelperType &helper;
ListT leafs;
tomp::ListT nodes;
``
https://github.com/llvm/llvm-project/pull/118880
[llvm-branch-commits] [clang] [clang][OpenMP] Add AST node for root of compound directive (PR #118878)
https://github.com/kparzysz created
https://github.com/llvm/llvm-project/pull/118878
This will be used to print the original directive source from the AST after
splitting compound directives.
>From 1447ec21597f752b29e367a46f06eecdf9c81dd7 Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Wed, 30 Oct 2024 13:34:21 -0500
Subject: [PATCH] [clang][OpenMP] Add AST node for root of compound directive
This will be used to print the original directive source from the AST
after splitting compound directives.
---
clang/bindings/python/clang/cindex.py | 3 +
clang/include/clang-c/Index.h | 4 ++
clang/include/clang/AST/RecursiveASTVisitor.h | 3 +
clang/include/clang/AST/StmtOpenMP.h | 60 +++
clang/include/clang/AST/TextNodeDumper.h | 1 +
clang/include/clang/Basic/StmtNodes.td| 1 +
clang/include/clang/Sema/SemaOpenMP.h | 6 ++
.../include/clang/Serialization/ASTBitCodes.h | 1 +
clang/lib/AST/StmtOpenMP.cpp | 15 +
clang/lib/AST/StmtPrinter.cpp | 6 ++
clang/lib/AST/StmtProfile.cpp | 5 ++
clang/lib/AST/TextNodeDumper.cpp | 7 +++
clang/lib/CodeGen/CGStmt.cpp | 4 ++
clang/lib/Sema/SemaExceptionSpec.cpp | 1 +
clang/lib/Sema/SemaOpenMP.cpp | 7 +++
clang/lib/Sema/TreeTransform.h| 8 +++
clang/lib/Serialization/ASTReaderStmt.cpp | 15 +
clang/lib/Serialization/ASTWriterStmt.cpp | 7 +++
clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 1 +
19 files changed, 155 insertions(+)
diff --git a/clang/bindings/python/clang/cindex.py
b/clang/bindings/python/clang/cindex.py
index 3ae7c479153690..5174e16f28f06d 100644
--- a/clang/bindings/python/clang/cindex.py
+++ b/clang/bindings/python/clang/cindex.py
@@ -1416,6 +1416,9 @@ def is_unexposed(self):
# OpenMP opaque loop-associated directive.
OMP_OPAQUE_LOOP_DIRECTIVE = 311
+# OpenMP compound root directive.
+OMP_COMPOUND_ROOT_DIRECTIVE = 312
+
# OpenACC Compute Construct.
OPEN_ACC_COMPUTE_DIRECTIVE = 320
diff --git a/clang/include/clang-c/Index.h b/clang/include/clang-c/Index.h
index 5d1db153aaafed..02ce2b7690ef06 100644
--- a/clang/include/clang-c/Index.h
+++ b/clang/include/clang-c/Index.h
@@ -2166,6 +2166,10 @@ enum CXCursorKind {
*/
CXCursor_OMPOpaqueLoopDirective = 311,
+ /** OpenMP compound root directive.
+ */
+ CXCursor_OMPCompoundRootDirective = 312,
+
/** OpenACC Compute Construct.
*/
CXCursor_OpenACCComputeConstruct = 320,
diff --git a/clang/include/clang/AST/RecursiveASTVisitor.h
b/clang/include/clang/AST/RecursiveASTVisitor.h
index e6fe46acb5fbc5..2881604ec781a3 100644
--- a/clang/include/clang/AST/RecursiveASTVisitor.h
+++ b/clang/include/clang/AST/RecursiveASTVisitor.h
@@ -3026,6 +3026,9 @@
RecursiveASTVisitor::TraverseOMPLoopDirective(OMPLoopDirective *S) {
return TraverseOMPExecutableDirective(S);
}
+DEF_TRAVERSE_STMT(OMPCompoundRootDirective,
+ { TRY_TO(TraverseOMPExecutableDirective(S)); })
+
DEF_TRAVERSE_STMT(OMPOpaqueBlockDirective,
{ TRY_TO(TraverseOMPExecutableDirective(S)); })
diff --git a/clang/include/clang/AST/StmtOpenMP.h
b/clang/include/clang/AST/StmtOpenMP.h
index 65434967142c84..4a3c2a53377d69 100644
--- a/clang/include/clang/AST/StmtOpenMP.h
+++ b/clang/include/clang/AST/StmtOpenMP.h
@@ -1560,6 +1560,66 @@ class OMPLoopDirective : public OMPLoopBasedDirective {
}
};
+/// This represents the root of the tree of broken-up compound directive.
+/// It is used to implement pretty-printing consistent with the original
+/// source. This is a pass-through directive for the purposes of semantic
+/// analysis and code generation.
+/// The getDirectiveKind() will return the id of the original, compound
+/// directive. The associated statement will be the outermost one of the
+/// constituent directives. The associated statement is always present.
+class OMPCompoundRootDirective final : public OMPExecutableDirective {
+ friend class ASTStmtReader;
+ friend class OMPExecutableDirective;
+
+ /// Build directive with the given start and end location.
+ ///
+ /// \param DKind The OpenMP directive kind.
+ /// \param StartLoc Starting location of the directive kind.
+ /// \param EndLoc Ending location of the directive.
+ ///
+ OMPCompoundRootDirective(OpenMPDirectiveKind DKind, SourceLocation StartLoc,
+ SourceLocation EndLoc)
+ : OMPExecutableDirective(OMPCompoundRootDirectiveClass, DKind, StartLoc,
+ EndLoc) {}
+
+ /// Build an empty directive.
+ ///
+ /// \param Kind The OpenMP directive kind.
+ ///
+ explicit OMPCompoundRootDirective(OpenMPDirectiveKind DKind)
+ : OMPExecutableDirective(OMPCompoundRootDirectiveClass, DKind,
+ SourceLocation(), SourceLocation()) {}
+
+public:
+ /// Creates directive with a lis
[llvm-branch-commits] [clang] [clang][OpenMP] Add AST node for root of compound directive (PR #118878)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 5f1cc61eaf6df0f74dfe6871d089f5a1f2e405ad
1447ec21597f752b29e367a46f06eecdf9c81dd7 --extensions h,cpp --
clang/include/clang-c/Index.h clang/include/clang/AST/RecursiveASTVisitor.h
clang/include/clang/AST/StmtOpenMP.h clang/include/clang/AST/TextNodeDumper.h
clang/include/clang/Sema/SemaOpenMP.h
clang/include/clang/Serialization/ASTBitCodes.h clang/lib/AST/StmtOpenMP.cpp
clang/lib/AST/StmtPrinter.cpp clang/lib/AST/StmtProfile.cpp
clang/lib/AST/TextNodeDumper.cpp clang/lib/CodeGen/CGStmt.cpp
clang/lib/Sema/SemaExceptionSpec.cpp clang/lib/Sema/SemaOpenMP.cpp
clang/lib/Sema/TreeTransform.h clang/lib/Serialization/ASTReaderStmt.cpp
clang/lib/Serialization/ASTWriterStmt.cpp
clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
``
View the diff from clang-format here.
``diff
diff --git a/clang/include/clang/AST/StmtOpenMP.h
b/clang/include/clang/AST/StmtOpenMP.h
index 4a3c2a5337..2fca6b9011 100644
--- a/clang/include/clang/AST/StmtOpenMP.h
+++ b/clang/include/clang/AST/StmtOpenMP.h
@@ -1611,9 +1611,9 @@ public:
/// \param DKind The OpenMP directive kind.
/// \param NumClauses Number of clauses.
///
- static OMPCompoundRootDirective *
- CreateEmpty(const ASTContext &C, OpenMPDirectiveKind DKind,
- unsigned NumClauses, EmptyShell);
+ static OMPCompoundRootDirective *CreateEmpty(const ASTContext &C,
+ OpenMPDirectiveKind DKind,
+ unsigned NumClauses,
EmptyShell);
static bool classof(const Stmt *T) {
return T->getStmtClass() == OMPCompoundRootDirectiveClass;
diff --git a/clang/lib/AST/StmtOpenMP.cpp b/clang/lib/AST/StmtOpenMP.cpp
index 7550aca792..0fea9678be 100644
--- a/clang/lib/AST/StmtOpenMP.cpp
+++ b/clang/lib/AST/StmtOpenMP.cpp
@@ -267,9 +267,10 @@ OMPCompoundRootDirective *OMPCompoundRootDirective::Create(
C, Clauses, AssociatedStmt, /*NumChildren=*/0, DKind, StartLoc, EndLoc);
}
-OMPCompoundRootDirective *OMPCompoundRootDirective::CreateEmpty(
-const ASTContext &C, OpenMPDirectiveKind DKind, unsigned NumClauses,
-EmptyShell) {
+OMPCompoundRootDirective *
+OMPCompoundRootDirective::CreateEmpty(const ASTContext &C,
+ OpenMPDirectiveKind DKind,
+ unsigned NumClauses, EmptyShell) {
return createEmptyDirective(
C, NumClauses, /*HasAssociatedStmt=*/true, /*NumChildren=*/0, DKind);
}
diff --git a/clang/lib/Sema/SemaOpenMP.cpp b/clang/lib/Sema/SemaOpenMP.cpp
index 3a59839a0b..34357c2b94 100644
--- a/clang/lib/Sema/SemaOpenMP.cpp
+++ b/clang/lib/Sema/SemaOpenMP.cpp
@@ -23312,8 +23312,8 @@ static bool checkScanScope(Sema &S, Scope *CurrentS,
SourceLocation Loc);
StmtResult SemaOpenMP::ActOnOpenMPCompoundRootDirective(
OpenMPDirectiveKind DKind, ArrayRef Clauses, Stmt *AStmt,
SourceLocation StartLoc, SourceLocation EndLoc) {
- return OMPCompoundRootDirective::Create(
- getASTContext(), StartLoc, EndLoc, DKind, Clauses, AStmt);
+ return OMPCompoundRootDirective::Create(getASTContext(), StartLoc, EndLoc,
+ DKind, Clauses, AStmt);
}
StmtResult SemaOpenMP::ActOnOpenMPOpaqueBlockDirective(
``
https://github.com/llvm/llvm-project/pull/118878
___
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[llvm-branch-commits] [clang] [Serialization] Code cleanups and polish 83233 (PR #83237)
https://github.com/ChuanqiXu9 closed https://github.com/llvm/llvm-project/pull/83237 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Serialization] Introduce OnDiskHashTable for specializations (PR #83233)
ChuanqiXu9 wrote: Sent https://github.com/llvm/llvm-project/commit/b5bd1928c6d43bc525a4e3fb65d2c750d61e and see https://github.com/llvm/llvm-project/pull/83237#issuecomment-2521945547 https://github.com/llvm/llvm-project/pull/83233 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Serialization] Code cleanups and polish 83233 (PR #83237)
ChuanqiXu9 wrote: Sent https://github.com/llvm/llvm-project/commit/b5bd1928c6d43bc525a4e3fb65d2c750d61e https://github.com/llvm/llvm-project/pull/83237 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [polly] release/19.x: [SCEV] Disallow simplifying phi(undef, X) to X (#115109) (PR #118867)
https://github.com/AreaZR created
https://github.com/llvm/llvm-project/pull/118867
See the following case:
```
@GlobIntONE = global i32 0, align 4
define ptr @src() {
entry:
br label %for.body.peel.begin
for.body.peel.begin: ; preds = %entry
br label %for.body.peel
for.body.peel:; preds = %for.body.peel.begin
br i1 true, label %cleanup.peel, label %cleanup.loopexit.peel
cleanup.loopexit.peel:; preds = %for.body.peel
br label %cleanup.peel
cleanup.peel: ; preds =
%cleanup.loopexit.peel, %for.body.peel
%retval.2.peel = phi ptr [ undef, %for.body.peel ], [ @GlobIntONE,
%cleanup.loopexit.peel ]
br i1 true, label %for.body.peel.next, label %cleanup7
for.body.peel.next: ; preds = %cleanup.peel
br label %for.body.peel.next1
for.body.peel.next1: ; preds = %for.body.peel.next
br label %entry.peel.newph
entry.peel.newph: ; preds = %for.body.peel.next1
br label %for.body
for.body: ; preds = %cleanup,
%entry.peel.newph
%retval.0 = phi ptr [ %retval.2.peel, %entry.peel.newph ], [ %retval.2,
%cleanup ]
br i1 false, label %cleanup, label %cleanup.loopexit
cleanup.loopexit: ; preds = %for.body
br label %cleanup
cleanup: ; preds = %cleanup.loopexit,
%for.body
%retval.2 = phi ptr [ %retval.0, %for.body ], [ @GlobIntONE,
%cleanup.loopexit ]
br i1 false, label %for.body, label %cleanup7.loopexit
cleanup7.loopexit:; preds = %cleanup
%retval.2.lcssa.ph = phi ptr [ %retval.2, %cleanup ]
br label %cleanup7
cleanup7: ; preds = %cleanup7.loopexit,
%cleanup.peel
%retval.2.lcssa = phi ptr [ %retval.2.peel, %cleanup.peel ], [
%retval.2.lcssa.ph, %cleanup7.loopexit ]
ret ptr %retval.2.lcssa
}
define ptr @tgt() {
entry:
br label %for.body.peel.begin
for.body.peel.begin: ; preds = %entry
br label %for.body.peel
for.body.peel:; preds = %for.body.peel.begin
br i1 true, label %cleanup.peel, label %cleanup.loopexit.peel
cleanup.loopexit.peel:; preds = %for.body.peel
br label %cleanup.peel
cleanup.peel: ; preds =
%cleanup.loopexit.peel, %for.body.peel
%retval.2.peel = phi ptr [ undef, %for.body.peel ], [ @GlobIntONE,
%cleanup.loopexit.peel ]
br i1 true, label %for.body.peel.next, label %cleanup7
for.body.peel.next: ; preds = %cleanup.peel
br label %for.body.peel.next1
for.body.peel.next1: ; preds = %for.body.peel.next
br label %entry.peel.newph
entry.peel.newph: ; preds = %for.body.peel.next1
br label %for.body
for.body: ; preds = %cleanup,
%entry.peel.newph
br i1 false, label %cleanup, label %cleanup.loopexit
cleanup.loopexit: ; preds = %for.body
br label %cleanup
cleanup: ; preds = %cleanup.loopexit,
%for.body
br i1 false, label %for.body, label %cleanup7.loopexit
cleanup7.loopexit:; preds = %cleanup
%retval.2.lcssa.ph = phi ptr [ %retval.2.peel, %cleanup ]
br label %cleanup7
cleanup7: ; preds = %cleanup7.loopexit,
%cleanup.peel
%retval.2.lcssa = phi ptr [ %retval.2.peel, %cleanup.peel ], [
%retval.2.lcssa.ph, %cleanup7.loopexit ]
ret ptr %retval.2.lcssa
}
```
1. `simplifyInstruction(%retval.2.peel)` returns `@GlobIntONE`. Thus,
`ScalarEvolution::createNodeForPHI` returns SCEV expr `@GlobIntONE` for
`%retval.2.peel`.
2. `SimplifyIndvar::replaceIVUserWithLoopInvariant` tries to replace the use of
`%retval.2.peel` in `%retval.2.lcssa.ph` with `@GlobIntONE`.
3. `simplifyLoopAfterUnroll -> simplifyLoopIVs -> SCEVExpander::expand` reuses
`%retval.2.peel = phi ptr [ undef, %for.body.peel ], [ @GlobIntONE,
%cleanup.loopexit.peel ]` to generate code for `@GlobIntONE`. It is incorrect.
This patch disallows simplifying `phi(undef, X)` to `X` by setting
`CanUseUndef` to false.
Closes https://github.com/llvm/llvm-project/issues/114879.
(cherry picked from commit 0b9f1cc024ca6c7e8d60524be07c0ddfcd08b23c)
>From a515aaf38c47f24ffd62c01d48e329cac4f6c7f8 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Thu, 7 Nov 2024 15:53:51 +0800
Subject: [PATCH] [SCEV] Disallow simplifying phi(undef, X) to X (#115109)
See the following case:
```
@GlobIntONE = global i32 0, align 4
define ptr @src() {
entry:
br label %for.body.peel.begin
for.body.peel.begin: ; preds = %entry
br label %for.body.peel
for.body.peel:
[llvm-branch-commits] [llvm] [polly] release/19.x: [SCEV] Disallow simplifying phi(undef, X) to X (#115109) (PR #118867)
llvmbot wrote:
@llvm/pr-subscribers-llvm-analysis
Author: Rose (AreaZR)
Changes
See the following case:
```
@GlobIntONE = global i32 0, align 4
define ptr @src() {
entry:
br label %for.body.peel.begin
for.body.peel.begin: ; preds = %entry
br label %for.body.peel
for.body.peel:; preds = %for.body.peel.begin
br i1 true, label %cleanup.peel, label %cleanup.loopexit.peel
cleanup.loopexit.peel:; preds = %for.body.peel
br label %cleanup.peel
cleanup.peel: ; preds =
%cleanup.loopexit.peel, %for.body.peel
%retval.2.peel = phi ptr [ undef, %for.body.peel ], [ @GlobIntONE,
%cleanup.loopexit.peel ]
br i1 true, label %for.body.peel.next, label %cleanup7
for.body.peel.next: ; preds = %cleanup.peel
br label %for.body.peel.next1
for.body.peel.next1: ; preds = %for.body.peel.next
br label %entry.peel.newph
entry.peel.newph: ; preds = %for.body.peel.next1
br label %for.body
for.body: ; preds = %cleanup,
%entry.peel.newph
%retval.0 = phi ptr [ %retval.2.peel, %entry.peel.newph ], [ %retval.2,
%cleanup ]
br i1 false, label %cleanup, label %cleanup.loopexit
cleanup.loopexit: ; preds = %for.body
br label %cleanup
cleanup: ; preds = %cleanup.loopexit,
%for.body
%retval.2 = phi ptr [ %retval.0, %for.body ], [ @GlobIntONE,
%cleanup.loopexit ]
br i1 false, label %for.body, label %cleanup7.loopexit
cleanup7.loopexit:; preds = %cleanup
%retval.2.lcssa.ph = phi ptr [ %retval.2, %cleanup ]
br label %cleanup7
cleanup7: ; preds = %cleanup7.loopexit,
%cleanup.peel
%retval.2.lcssa = phi ptr [ %retval.2.peel, %cleanup.peel ], [
%retval.2.lcssa.ph, %cleanup7.loopexit ]
ret ptr %retval.2.lcssa
}
define ptr @tgt() {
entry:
br label %for.body.peel.begin
for.body.peel.begin: ; preds = %entry
br label %for.body.peel
for.body.peel:; preds = %for.body.peel.begin
br i1 true, label %cleanup.peel, label %cleanup.loopexit.peel
cleanup.loopexit.peel:; preds = %for.body.peel
br label %cleanup.peel
cleanup.peel: ; preds =
%cleanup.loopexit.peel, %for.body.peel
%retval.2.peel = phi ptr [ undef, %for.body.peel ], [ @GlobIntONE,
%cleanup.loopexit.peel ]
br i1 true, label %for.body.peel.next, label %cleanup7
for.body.peel.next: ; preds = %cleanup.peel
br label %for.body.peel.next1
for.body.peel.next1: ; preds = %for.body.peel.next
br label %entry.peel.newph
entry.peel.newph: ; preds = %for.body.peel.next1
br label %for.body
for.body: ; preds = %cleanup,
%entry.peel.newph
br i1 false, label %cleanup, label %cleanup.loopexit
cleanup.loopexit: ; preds = %for.body
br label %cleanup
cleanup: ; preds = %cleanup.loopexit,
%for.body
br i1 false, label %for.body, label %cleanup7.loopexit
cleanup7.loopexit:; preds = %cleanup
%retval.2.lcssa.ph = phi ptr [ %retval.2.peel, %cleanup ]
br label %cleanup7
cleanup7: ; preds = %cleanup7.loopexit,
%cleanup.peel
%retval.2.lcssa = phi ptr [ %retval.2.peel, %cleanup.peel ], [
%retval.2.lcssa.ph, %cleanup7.loopexit ]
ret ptr %retval.2.lcssa
}
```
1. `simplifyInstruction(%retval.2.peel)` returns `@GlobIntONE`. Thus,
`ScalarEvolution::createNodeForPHI` returns SCEV expr `@GlobIntONE` for
`%retval.2.peel`.
2. `SimplifyIndvar::replaceIVUserWithLoopInvariant` tries to replace the use of
`%retval.2.peel` in `%retval.2.lcssa.ph` with `@GlobIntONE`.
3. `simplifyLoopAfterUnroll -> simplifyLoopIVs -> SCEVExpander::expand`
reuses `%retval.2.peel = phi ptr [ undef, %for.body.peel ], [ @GlobIntONE, %cleanup.loopexit.peel ]` to generate code for `@GlobIntONE`. It is incorrect.
This patch disallows simplifying `phi(undef, X)` to `X` by setting
`CanUseUndef` to false.
Closes https://github.com/llvm/llvm-project/issues/114879.
(cherry picked from commit 0b9f1cc024ca6c7e8d60524be07c0ddfcd08b23c)
---
Patch is 22.13 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/118867.diff
16 Files Affected:
- (modified) llvm/lib/Analysis/ScalarEvolution.cpp (+5-1)
- (modified)
llvm/test/Transforms/IndVarSimplify/invalidate-modified-lcssa-phi.ll (+2-1)
- (modified) llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll (+4-2)
- (modified) llvm/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phiel
[llvm-branch-commits] [llvm] [CodeGen][PM] Initialize analyses with isAnalysis=true (PR #118779)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118779
>From d48e889915d463cc32f6c5d3e6ce788fb7f44cea Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 5 Dec 2024 10:05:30 +
Subject: [PATCH] [CodeGen][PM] Initialize analyses with isAnalysis=true
Analyses should be marked as analyses else they are prone to be ignored
by the legacy analysis cache mechanism and get scheduled redundantly.
---
llvm/lib/CodeGen/GCMetadata.cpp| 2 +-
llvm/lib/CodeGen/LiveDebugVariables.cpp| 2 +-
llvm/lib/CodeGen/LiveIntervals.cpp | 2 +-
llvm/lib/CodeGen/LiveRegMatrix.cpp | 2 +-
llvm/lib/CodeGen/LiveStacks.cpp| 2 +-
llvm/lib/CodeGen/SlotIndexes.cpp | 2 +-
llvm/lib/CodeGen/VirtRegMap.cpp| 2 +-
llvm/lib/Transforms/Utils/LoopSimplify.cpp | 4 ++--
8 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/llvm/lib/CodeGen/GCMetadata.cpp b/llvm/lib/CodeGen/GCMetadata.cpp
index 6d1cc1a58e27df..f33008c9e0f232 100644
--- a/llvm/lib/CodeGen/GCMetadata.cpp
+++ b/llvm/lib/CodeGen/GCMetadata.cpp
@@ -66,7 +66,7 @@ GCFunctionAnalysis::run(Function &F, FunctionAnalysisManager
&FAM) {
}
INITIALIZE_PASS(GCModuleInfo, "collector-metadata",
-"Create Garbage Collector Module Metadata", false, false)
+"Create Garbage Collector Module Metadata", false, true)
//
-
diff --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp
b/llvm/lib/CodeGen/LiveDebugVariables.cpp
index 317d3401f000a4..79085e587ebc45 100644
--- a/llvm/lib/CodeGen/LiveDebugVariables.cpp
+++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp
@@ -82,7 +82,7 @@ INITIALIZE_PASS_BEGIN(LiveDebugVariablesWrapperLegacy,
DEBUG_TYPE,
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_END(LiveDebugVariablesWrapperLegacy, DEBUG_TYPE,
-"Debug Variable Analysis", false, false)
+"Debug Variable Analysis", false, true)
void LiveDebugVariablesWrapperLegacy::getAnalysisUsage(
AnalysisUsage &AU) const {
diff --git a/llvm/lib/CodeGen/LiveIntervals.cpp
b/llvm/lib/CodeGen/LiveIntervals.cpp
index f9ee6e4563f8d6..f38527a3ce6a31 100644
--- a/llvm/lib/CodeGen/LiveIntervals.cpp
+++ b/llvm/lib/CodeGen/LiveIntervals.cpp
@@ -83,7 +83,7 @@ INITIALIZE_PASS_BEGIN(LiveIntervalsWrapperPass,
"liveintervals",
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_END(LiveIntervalsWrapperPass, "liveintervals",
-"Live Interval Analysis", false, false)
+"Live Interval Analysis", false, true)
bool LiveIntervalsWrapperPass::runOnMachineFunction(MachineFunction &MF) {
LIS.Indexes = &getAnalysis().getSI();
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp
b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index bc8c59381a40e1..9744c47d5a8510 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -41,7 +41,7 @@ INITIALIZE_PASS_BEGIN(LiveRegMatrixWrapperLegacy,
"liveregmatrix",
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
INITIALIZE_PASS_END(LiveRegMatrixWrapperLegacy, "liveregmatrix",
-"Live Register Matrix", false, false)
+"Live Register Matrix", false, true)
void LiveRegMatrixWrapperLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
diff --git a/llvm/lib/CodeGen/LiveStacks.cpp b/llvm/lib/CodeGen/LiveStacks.cpp
index 92cc6699f2d331..d615caf48c0ad3 100644
--- a/llvm/lib/CodeGen/LiveStacks.cpp
+++ b/llvm/lib/CodeGen/LiveStacks.cpp
@@ -25,7 +25,7 @@ INITIALIZE_PASS_BEGIN(LiveStacksWrapperLegacy, DEBUG_TYPE,
"Live Stack Slot Analysis", false, false)
INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
INITIALIZE_PASS_END(LiveStacksWrapperLegacy, DEBUG_TYPE,
-"Live Stack Slot Analysis", false, false)
+"Live Stack Slot Analysis", false, true)
char &llvm::LiveStacksID = LiveStacksWrapperLegacy::ID;
diff --git a/llvm/lib/CodeGen/SlotIndexes.cpp b/llvm/lib/CodeGen/SlotIndexes.cpp
index 1b92a5aa59d18c..8d2832b3fdd56e 100644
--- a/llvm/lib/CodeGen/SlotIndexes.cpp
+++ b/llvm/lib/CodeGen/SlotIndexes.cpp
@@ -45,7 +45,7 @@ SlotIndexes::~SlotIndexes() {
}
INITIALIZE_PASS(SlotIndexesWrapperPass, DEBUG_TYPE, "Slot index numbering",
-false, false)
+false, true)
STATISTIC(NumLocalRenum, "Number of local renumberings");
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index 1352102a93d01b..b28c74600e7a29 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -60,7 +60,7 @@ STATISTIC(NumIdCopies, "Number of identity moves eliminated
after rewriting");
char Vir
