[llvm-bugs] [Bug 41028] New: Instructions for NVPTX backends are improperly swapped in optimization passes
https://bugs.llvm.org/show_bug.cgi?id=41028 Bug ID: 41028 Summary: Instructions for NVPTX backends are improperly swapped in optimization passes Product: tools Version: 7.0 Hardware: All OS: Linux Status: NEW Severity: release blocker Priority: P Component: opt Assignee: unassignedb...@nondot.org Reporter: linear...@foxmail.com CC: llvm-bugs@lists.llvm.org The nvvm.barrier0 intrinsic is for _sync_threads of the NVPTX backend. It cannot be swapped with store/load instructions toward the GPU shared memory, (aka, store/load toward addressspace(3) in the IR). From the IRs before/after llvm optimization passes, it seems that the order of the instructions are improperly optimized, which further causes some severe correctness issue. The issue was found during some work on Tensorflow XLA, currently I don't know which llvm optimization pass causes the issue. IRs before optimization passes: (pay attention to line 42 and line 69) IRs after optimization passes: (pay attention to line 19 and line 45) -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] [Bug 27456] PPC make check has a bunch of machine verifier errors
https://bugs.llvm.org/show_bug.cgi?id=27456 Zixuan Wu changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED --- Comment #7 from Zixuan Wu --- https://reviews.llvm.org/rL355798 -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] [Bug 32146] Enable -verify-machineinstrs with EXPENSIVE_CHECKS
https://bugs.llvm.org/show_bug.cgi?id=32146 Bug 32146 depends on bug 27456, which changed state. Bug 27456 Summary: PPC make check has a bunch of machine verifier errors https://bugs.llvm.org/show_bug.cgi?id=27456 What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] [Bug 27718] PowerPC64: Simple floating point code hits machine verifier failure
https://bugs.llvm.org/show_bug.cgi?id=27718 Zixuan Wu changed: What|Removed |Added Resolution|--- |FIXED Status|NEW |RESOLVED -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] [Bug 27456] PPC make check has a bunch of machine verifier errors
https://bugs.llvm.org/show_bug.cgi?id=27456 Bug 27456 depends on bug 27718, which changed state. Bug 27718 Summary: PowerPC64: Simple floating point code hits machine verifier failure https://bugs.llvm.org/show_bug.cgi?id=27718 What|Removed |Added Status|NEW |RESOLVED Resolution|--- |FIXED -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] [Bug 41027] New: Inline asm validation doesn't use delayed warnings
https://bugs.llvm.org/show_bug.cgi?id=41027
Bug ID: 41027
Summary: Inline asm validation doesn't use delayed warnings
Product: clang
Version: unspecified
Hardware: PC
OS: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: Frontend
Assignee: unassignedclangb...@nondot.org
Reporter: jo...@netbsd.org
CC: llvm-bugs@lists.llvm.org, neeil...@live.com,
richard-l...@metafoo.co.uk
Consider the following test case:
static inline void outl(unsigned port, unsigned data) {
if (__builtin_constant_p(port) && port < 0x100) {
__asm volatile("outl %0,%w1" : : "a"(data), "n"(port));
} else {
__asm volatile("outl %0,%w1" : : "a"(data), "d"(port));
}
}
void f(unsigned port) { outl(1, 1); }
This kind of assembler construct has been used for ages on various
architectures, especially if there are instruction forms that require
hard-coded immediates. Variants with __always_inline__ apply as well. This got
broken by the recent validation for 'n' as it doesn't use the dead code warning
elimination support.
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[llvm-bugs] [Bug 41026] New: AVX-512dq: fatal error : error in backend: unknown codeview register
https://bugs.llvm.org/show_bug.cgi?id=41026 Bug ID: 41026 Summary: AVX-512dq: fatal error : error in backend: unknown codeview register Product: clang Version: 7.0 Hardware: PC OS: Windows NT Status: NEW Severity: normal Priority: P Component: -New Bugs Assignee: unassignedclangb...@nondot.org Reporter: angus.hewl...@roli.com CC: htmldevelo...@gmail.com, llvm-bugs@lists.llvm.org, neeil...@live.com, richard-l...@metafoo.co.uk Created attachment 21580 --> https://bugs.llvm.org/attachment.cgi?id=21580&action=edit shell file for clang-cl execution Note: possible duplicate of 38482 - unable to confirm at this time, as I'm still on v7.0.1 (clang-cl Windows x64 prebuilt). Summary: Bug description: AVX512dq clang-cl crash during compilation CL : fatal error : error in backend: unknown codeview register clang frontend command failed with exit code 70 Compiling AVX512 code using clang-cl. Command line options: /MP /GS- /W3 /Gy /Zc:wchar_t /Zi /Gm- /Ox /Ob2 /Zc:inline /fp:fast /fp:except- /errorReport:prompt /GF- /WX- /Zc:forScope /GR /Gd /Oy- /Oi /MT /std:c++17 /FC /EHa /nologo /Ot /diagnostics:classic -mavx512dq (Side-note: non-AVX512 versions of code following the same pattern compile fine - SSE2, SSE4.1, AVX, AVX2-FMA are all OK). * Full error report: 1>CL : fatal error : error in backend: unknown codeview register 1>clang-cl.exe : error : clang frontend command failed with exit code 70 (use -v to see invocation) 1>clang version 7.0.1 (tags/RELEASE_701/final) 1>Target: x86_64-pc-windows-msvc 1>Thread model: posix 1>InstalledDir: C:\Program Files\LLVM\bin 1>clang-cl.exe: note: diagnostic msg: PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace, preprocessed source, and associated run script. 1>clang-cl.exe: note: diagnostic msg: 1> 1> 1>PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT: 1>Preprocessed source(s) and associated run script(s) are located at: 1>clang-cl.exe: note: diagnostic msg: C:\Users\Angus\AppData\Local\Temp\DispatchAVX512-f040c6.cpp 1>clang-cl.exe: note: diagnostic msg: C:\Users\Angus\AppData\Local\Temp\DispatchAVX512-f040c6.sh 1>clang-cl.exe: note: diagnostic msg: 1> 1> Shell file attached - cannot attach the preprocessed *.cpp file due to its size. Please contact me if you'd like to inspect the preprocessed .cpp (about 2MB compressed, 18MB uncompressed). -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] [Bug 41025] New: Missed optimization: finding closed form of loop doesn't take advantage of assumption
https://bugs.llvm.org/show_bug.cgi?id=41025
Bug ID: 41025
Summary: Missed optimization: finding closed form of loop
doesn't take advantage of assumption
Product: clang
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: -New Bugs
Assignee: unassignedclangb...@nondot.org
Reporter: arthur.j.odw...@gmail.com
CC: htmldevelo...@gmail.com, llvm-bugs@lists.llvm.org,
neeil...@live.com, richard-l...@metafoo.co.uk
Clang trunk does a great job turning this sum-the-area-of-a-trapezoid function
into its closed form. However, the closed form needs a branch to deal with the
possibility that the distance from 'b' to 'e' is negative: in that case, 0
should be returned as a special case.
You can eliminate the special case by adding `__builtin_assume(b < e)` to the
top of the function. This eliminates the branch from the codegen of `f1`.
However, Clang is not currently able to eliminate the branch from the codegen
of `f2`, even though it is identical to `f1` except that f2 uses `i != e` as
the loop termination condition instead of `i < e`.
I don't know if this is a very deep and complicated bug that's not worth
fixing, or just a simple one-line update somewhere. :)
// https://godbolt.org/z/aWAahD
int f1(unsigned b, unsigned e)
{
__builtin_assume( b < e );
int total = 0;
for (unsigned i = b; i < e; ++i) {
total += i;
}
return total;
}
int f2(unsigned b, unsigned e)
{
__builtin_assume( b < e );
int total = 0;
for (unsigned i = b; i != e; ++i) {
total += i;
}
return total;
}
_Z2f1jj: # @_Z2f1jj
movl %edi, %ecx
notl %ecx
addl %esi, %ecx
leal 1(%rdi), %eax
imull %ecx, %eax
addl $-2, %esi
subl %edi, %esi
imulq %rcx, %rsi
shrq %rsi
addl %edi, %eax
addl %esi, %eax
retq
_Z2f2jj: # @_Z2f2jj
xorl %eax, %eax
cmpl %esi, %edi
je .LBB1_2// THIS BRANCH should be unnecessary AFAICT
movl %edi, %ecx
notl %ecx
addl %esi, %ecx
leal 1(%rdi), %eax
imull %ecx, %eax
addl $-2, %esi
subl %edi, %esi
imulq %rcx, %rsi
shrq %rsi
addl %edi, %eax
addl %esi, %eax
.LBB1_2:
retq
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[llvm-bugs] [Bug 41023] New: [AArch64] Use UQADD for vector UADDSAT etc
https://bugs.llvm.org/show_bug.cgi?id=41023 Bug ID: 41023 Summary: [AArch64] Use UQADD for vector UADDSAT etc Product: libraries Version: trunk Hardware: All OS: All Status: NEW Severity: enhancement Priority: P Component: Backend: AArch64 Assignee: unassignedb...@nondot.org Reporter: nikita@gmail.com CC: arnaud.degrandmai...@arm.com, llvm-bugs@lists.llvm.org, peter.sm...@linaro.org, ties.st...@arm.com AArch64 has uqadd, sqadd, uqsub and sqsub instructions for the legal vector types. We should use them for uaddsat, saddsat, usubsat and ssubsat instead of the fallback expansions. I've tried implementing this myself, but couldn't figure out the right way to do it. I initially thought we can just autoupgrade the aarch64.neon.uqadd etc intrinsics to use the generic uadd.sat intrinsics instead and adjust the isel patterns accordingly. Unfortunately, this is complicated by the existence of the SIMD scalar variants of these instructions. I'm assuming that it is preferable to use the fallback expansion in the scalar case (e.g. adds+csinv) rather than using the SIMD instruction with three register moves. On the other hand, we probably still need to force the use of the SIMD instructions if the NEON intrinsics are used. -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] [Bug 41022] New: [OpenMP] parallel master Construct unsupported
https://bugs.llvm.org/show_bug.cgi?id=41022 Bug ID: 41022 Summary: [OpenMP] parallel master Construct unsupported Product: OpenMP Version: unspecified Hardware: PC OS: Linux Status: NEW Severity: enhancement Priority: P Component: Clang Compiler Support Assignee: unassignedclangb...@nondot.org Reporter: lebedev...@gmail.com CC: llvm-bugs@lists.llvm.org https://www.openmp.org/wp-content/uploads/OpenMP-API-Specification-5.0.pdf "2.13.6 parallel master Construct" Just noticed that clang complains about it, and no bug exists. I have no personal need for it. -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] [Bug 41021] New: Wrong __FLT16_MIN_10_EXP__
https://bugs.llvm.org/show_bug.cgi?id=41021 Bug ID: 41021 Summary: Wrong __FLT16_MIN_10_EXP__ Product: clang Version: trunk Hardware: All OS: All Status: NEW Severity: normal Priority: P Component: Frontend Assignee: unassignedclangb...@nondot.org Reporter: man...@zxe.io CC: llvm-bugs@lists.llvm.org, neeil...@live.com, richard-l...@metafoo.co.uk In file "lib/Frontend/InitPreprocessor.cpp" line 125: int Min10Exp = PickFP(Sem, -13, -37, -307, -4931, -291, -4931); I think the 2nd argument is wrong, it should be -3, since the value of the predefined macro __FLT16_MIN_10_EXP__ should be -3 instead of -13. So change that line to this: int Min10Exp = PickFP(Sem, -3, -37, -307, -4931, -291, -4931); -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] [Bug 41020] New: isBitwiseNot / isConstOrConstSplat etc don't support build vector truncation
https://bugs.llvm.org/show_bug.cgi?id=41020 Bug ID: 41020 Summary: isBitwiseNot / isConstOrConstSplat etc don't support build vector truncation Product: libraries Version: trunk Hardware: All OS: All Status: NEW Severity: enhancement Priority: P Component: Common Code Generator Code Assignee: unassignedb...@nondot.org Reporter: nikita@gmail.com CC: llvm-bugs@lists.llvm.org The isBitwiseNot() helper currently misses cases where a build_vector of implicitly truncated constants is used. E.g. an all-ones vNi16 build vector on AArch64 will use i32 elements of value 65535. isBitwiseNot() is based on isConstOrConstSplat(), which is where this limitation ultimately comes from. It would be possible to easily fix isBitwiseNot() specifically by using the ISD::isBuildVectorAllOnes() helper (which does handle truncation correctly), but it would be nice to support this for the whole isConstOrConstSplat() machinery. See https://reviews.llvm.org/D59174 for a case where we run into this issue. -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] Issue 10250 in oss-fuzz: llvm: Build failure
Comment #45 on issue 10250 by ClusterFuzz-External: llvm: Build failure https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=10250#c45 Friendly reminder that the the build is still failing. Please try to fix this failure to ensure that fuzzing remains productive. Latest build log: https://oss-fuzz-build-logs.storage.googleapis.com/log-2c075710-66bc-4132-bd78-f2d2264af9f6.txt -- You received this message because: 1. You were specifically CC'd on the issue You may adjust your notification preferences at: https://bugs.chromium.org/hosting/settings Reply to this email to add a comment. ___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
