[llvm-bugs] [Bug 41001] [GlobalISel] [aarch64] i1 boolean is still signed extended to -1
https://bugs.llvm.org/show_bug.cgi?id=41001 Amara Emerson changed: What|Removed |Added Status|REOPENED|RESOLVED Resolution|--- |FIXED --- Comment #6 from Amara Emerson --- Should be fixed in r355745. -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] [Bug 41001] [GlobalISel] [aarch64] i1 boolean is still signed extended to -1
https://bugs.llvm.org/show_bug.cgi?id=41001 Eli Friedman changed: What|Removed |Added Status|RESOLVED|REOPENED Resolution|INVALID |--- --- Comment #3 from Eli Friedman --- You only get assembly like that for iOS targets. For other targets, it looks like this: // %bb.0: // %entry sub sp, sp, #32 // =32 stp x29, x30, [sp, #16] // 16-byte Folded Spill add x29, sp, #16// =16 .cfi_def_cfa w29, 16 .cfi_offset w30, -8 .cfi_offset w29, -16 mov w8, #-1 str x0, [sp, #8] ldr x0, [sp, #8] str x0, [sp]// 8-byte Folded Spill mov w0, w8 ldr x9, [sp]// 8-byte Folded Reload blr x9 ldp x29, x30, [sp, #16] // 16-byte Folded Reload add sp, sp, #32 // =32 ret -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
[llvm-bugs] [Bug 41001] [GlobalISel] [aarch64] i1 boolean is still signed extended to -1
https://bugs.llvm.org/show_bug.cgi?id=41001 Amara Emerson changed: What|Removed |Added Status|NEW |RESOLVED Resolution|--- |INVALID --- Comment #2 from Amara Emerson --- This looks correct, although w8 has a #-1 value, it later gets AND'd with 0x1 to do a zext-in-reg from s1 to s32. This is what I currently get at -O0: ; %bb.0:; %entry sub sp, sp, #32 ; =32 stp x29, x30, [sp, #16] ; 16-byte Folded Spill add x29, sp, #16; =16 mov w8, #-1 str x0, [sp, #8] ldr x0, [sp, #8] orr w9, wzr, #0x1 and w8, w8, w9. ; #-1 here becomes #1 str x0, [sp]; 8-byte Folded Spill mov x0, x8 ldr x10, [sp] ; 8-byte Folded Reload blr x10 ldp x29, x30, [sp, #16] ; 16-byte Folded Reload add sp, sp, #32 ; =32 ret -- You are receiving this mail because: You are on the CC list for the bug.___ llvm-bugs mailing list llvm-bugs@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
