[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp

2006-04-14 Thread Chris Lattner


Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.149 - 1.150
---
Log message:

Move the rest of the PPCTargetLowering::LowerOperation cases out into 
separate functions, for simplicity and code clarity.


---
Diffs of the changes:  (+531 -470)

 PPCISelLowering.cpp | 1001 +++-
 1 files changed, 531 insertions(+), 470 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.149 
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.150
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.149   Fri Apr 14 00:19:18 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Fri Apr 14 01:01:58 2006
@@ -258,6 +258,10 @@
   }
 }
 
+//===--===//
+// Node matching predicates, for use by the tblgen matching code.
+//===--===//
+
 /// isFloatingPointZero - Return true if this is 0.0 or -0.0.
 static bool isFloatingPointZero(SDOperand Op) {
   if (ConstantFPSDNode *CFP = dyn_castConstantFPSDNode(Op))
@@ -544,6 +548,388 @@
   return SDOperand();
 }
 
+//===--===//
+//  LowerOperation implementation
+//===--===//
+
+static SDOperand LowerConstantPool(SDOperand Op, SelectionDAG DAG) {
+  ConstantPoolSDNode *CP = castConstantPoolSDNode(Op);
+  Constant *C = CP-get();
+  SDOperand CPI = DAG.getTargetConstantPool(C, MVT::i32, CP-getAlignment());
+  SDOperand Zero = DAG.getConstant(0, MVT::i32);
+
+  const TargetMachine TM = DAG.getTarget();
+  
+  // If this is a non-darwin platform, we don't support non-static relo models
+  // yet.
+  if (TM.getRelocationModel() == Reloc::Static ||
+  !TM.getSubtargetPPCSubtarget().isDarwin()) {
+// Generate non-pic code that has direct accesses to the constant pool.
+// The address of the global is just (hi(g)+lo(g)).
+SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, CPI, Zero);
+SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, CPI, Zero);
+return DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo);
+  }
+  
+  SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, CPI, Zero);
+  if (TM.getRelocationModel() == Reloc::PIC) {
+// With PIC, the first instruction is actually GR+hi(G).
+Hi = DAG.getNode(ISD::ADD, MVT::i32,
+ DAG.getNode(PPCISD::GlobalBaseReg, MVT::i32), Hi);
+  }
+  
+  SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, CPI, Zero);
+  Lo = DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo);
+  return Lo;
+}
+
+static SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG DAG) {
+  GlobalAddressSDNode *GSDN = castGlobalAddressSDNode(Op);
+  GlobalValue *GV = GSDN-getGlobal();
+  SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i32, GSDN-getOffset());
+  SDOperand Zero = DAG.getConstant(0, MVT::i32);
+  
+  const TargetMachine TM = DAG.getTarget();
+
+  // If this is a non-darwin platform, we don't support non-static relo models
+  // yet.
+  if (TM.getRelocationModel() == Reloc::Static ||
+  !TM.getSubtargetPPCSubtarget().isDarwin()) {
+// Generate non-pic code that has direct accesses to globals.
+// The address of the global is just (hi(g)+lo(g)).
+SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, GA, Zero);
+SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, GA, Zero);
+return DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo);
+  }
+  
+  SDOperand Hi = DAG.getNode(PPCISD::Hi, MVT::i32, GA, Zero);
+  if (TM.getRelocationModel() == Reloc::PIC) {
+// With PIC, the first instruction is actually GR+hi(G).
+Hi = DAG.getNode(ISD::ADD, MVT::i32,
+ DAG.getNode(PPCISD::GlobalBaseReg, MVT::i32), Hi);
+  }
+  
+  SDOperand Lo = DAG.getNode(PPCISD::Lo, MVT::i32, GA, Zero);
+  Lo = DAG.getNode(ISD::ADD, MVT::i32, Hi, Lo);
+  
+  if (!GV-hasWeakLinkage()  !GV-hasLinkOnceLinkage() 
+  (!GV-isExternal() || GV-hasNotBeenReadFromBytecode()))
+return Lo;
+  
+  // If the global is weak or external, we have to go through the lazy
+  // resolution stub.
+  return DAG.getLoad(MVT::i32, DAG.getEntryNode(), Lo, DAG.getSrcValue(0));
+}
+
+static SDOperand LowerSETCC(SDOperand Op, SelectionDAG DAG) {
+  ISD::CondCode CC = castCondCodeSDNode(Op.getOperand(2))-get();
+  
+  // If we're comparing for equality to zero, expose the fact that this is
+  // implented as a ctlz/srl pair on ppc, so that the dag combiner can
+  // fold the new nodes.
+  if (ConstantSDNode *C = dyn_castConstantSDNode(Op.getOperand(1))) {
+if (C-isNullValue()  CC == ISD::SETEQ) {
+  MVT::ValueType VT = Op.getOperand(0).getValueType();
+  SDOperand Zext = Op.getOperand(0);
+  if (VT  MVT::i32) {
+VT = MVT::i32;
+Zext = DAG.getNode(ISD::ZERO_EXTEND, VT, Op.getOperand(0));
+  } 
+  unsigned Log2b = Log2_32(MVT::getSizeInBits(VT));

[llvm-commits] CVS: llvm/test/Regression/CodeGen/Generic/2006-04-11-vecload.ll

2006-04-14 Thread Chris Lattner


Changes in directory llvm/test/Regression/CodeGen/Generic:

2006-04-11-vecload.ll updated: 1.1 - 1.2
---
Log message:

Force a specific config, because this test fails in certain configs otherwise.



---
Diffs of the changes:  (+1 -1)

 2006-04-11-vecload.ll |2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/test/Regression/CodeGen/Generic/2006-04-11-vecload.ll
diff -u llvm/test/Regression/CodeGen/Generic/2006-04-11-vecload.ll:1.1 
llvm/test/Regression/CodeGen/Generic/2006-04-11-vecload.ll:1.2
--- llvm/test/Regression/CodeGen/Generic/2006-04-11-vecload.ll:1.1  Tue Apr 
11 22:24:46 2006
+++ llvm/test/Regression/CodeGen/Generic/2006-04-11-vecload.ll  Fri Apr 14 
01:06:51 2006
@@ -1,4 +1,4 @@
-; RUN: llvm-as  %s | llc
+; RUN: llvm-as  %s | llc -march=x86 -mcpu=yonah
 
 ; The vload was getting memoized to the previous scalar load!
 



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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

2006-04-14 Thread Chris Lattner


Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.364 - 1.365
---
Log message:

Make this assertion better


---
Diffs of the changes:  (+1 -1)

 LegalizeDAG.cpp |2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.364 
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.365
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.364 Wed Apr 12 16:20:24 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp   Fri Apr 14 01:08:35 2006
@@ -4630,7 +4630,7 @@
   }
   
   switch (Node-getOpcode()) {
-  default: Node-dump(); assert(0  Unknown vector operation!);
+  default: Node-dump(); assert(0  Unhandled operation in SplitVectorOp!);
   case ISD::VBUILD_VECTOR: {
 std::vectorSDOperand LoOps(Node-op_begin(), 
Node-op_begin()+NewNumElts);
 LoOps.push_back(NewNumEltsNode);



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[llvm-commits] CVS: llvm/lib/VMCore/Makefile

2006-04-14 Thread Reid Spencer


Changes in directory llvm/lib/VMCore:

Makefile updated: 1.14 - 1.15
---
Log message:

Don't print out the install command for Intrinsics.gen unless VERBOSE mode.


---
Diffs of the changes:  (+2 -1)

 Makefile |3 ++-
 1 files changed, 2 insertions(+), 1 deletion(-)


Index: llvm/lib/VMCore/Makefile
diff -u llvm/lib/VMCore/Makefile:1.14 llvm/lib/VMCore/Makefile:1.15
--- llvm/lib/VMCore/Makefile:1.14   Sun Mar 26 01:45:48 2006
+++ llvm/lib/VMCore/MakefileFri Apr 14 01:32:31 2006
@@ -28,4 +28,5 @@
$(Verb) $(TableGen) $(INTRINSICTD) -o $@ -gen-intrinsic
 
 install-local:: $(GENFILE)
-   $(DataInstall) $(GENFILE) $(PROJ_includedir)/llvm/Intrinsics.gen
+   $(Echo) Installing $(PROJ_includedir)/llvm/Intrinsics.gen
+   $(Verb) $(DataInstall) $(GENFILE) $(PROJ_includedir)/llvm/Intrinsics.gen



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[llvm-commits] CVS: llvm/lib/Target/X86/README.txt

2006-04-14 Thread Evan Cheng


Changes in directory llvm/lib/Target/X86:

README.txt updated: 1.87 - 1.88
---
Log message:

New entry

---
Diffs of the changes:  (+5 -0)

 README.txt |5 +
 1 files changed, 5 insertions(+)


Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.87 llvm/lib/Target/X86/README.txt:1.88
--- llvm/lib/Target/X86/README.txt:1.87 Thu Apr 13 00:09:45 2006
+++ llvm/lib/Target/X86/README.txt  Fri Apr 14 02:24:04 2006
@@ -810,3 +810,8 @@
 How about andps, andpd, and pand? Do we really care about the type of the 
packed
 elements? If not, why not always use the ps variants which are likely to be
 shorter.
+
+//===-===//
+
+Make sure XMM registers are spilled to 128-bit locations (if not already) and
+add vector SSE opcodes to X86RegisterInfo::foldMemoryOperand().



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[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp

2006-04-14 Thread Evan Cheng


Changes in directory llvm/lib/Target/X86:

X86RegisterInfo.cpp updated: 1.136 - 1.137
---
Log message:

We were not adjusting the frame size to ensure proper alignment when alloca /
vla are present in the function. This causes a crash when a leaf function
allocates space on the stack used to store / load with 128-bit SSE
instructions.


---
Diffs of the changes:  (+23 -30)

 X86RegisterInfo.cpp |   53 ++--
 1 files changed, 23 insertions(+), 30 deletions(-)


Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.136 
llvm/lib/Target/X86/X86RegisterInfo.cpp:1.137
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.136   Mon Apr 10 02:21:31 2006
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp Fri Apr 14 02:26:43 2006
@@ -573,17 +573,34 @@
 
   // Get the number of bytes to allocate from the FrameInfo
   unsigned NumBytes = MFI-getStackSize();
+  if (MFI-hasCalls() || MF.getFrameInfo()-hasVarSizedObjects()) {
+// When we have no frame pointer, we reserve argument space for call sites
+// in the function immediately on entry to the current function.  This
+// eliminates the need for add/sub ESP brackets around call sites.
+//
+if (!hasFP(MF))
+  NumBytes += MFI-getMaxCallFrameSize();
+
+// Round the size to a multiple of the alignment (don't forget the 4 byte
+// offset though).
+unsigned Align = MF.getTarget().getFrameInfo()-getStackAlignment();
+NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
+  }
+
+  // Update frame info to pretend that this is part of the stack...
+  MFI-setStackSize(NumBytes);
+
+  if (NumBytes) {   // adjust stack pointer: ESP -= numbytes
+unsigned Opc = NumBytes  128 ? X86::SUB32ri8 : X86::SUB32ri;
+MI = BuildMI(Opc, 1, X86::ESP,MachineOperand::UseAndDef).addImm(NumBytes);
+MBB.insert(MBBI, MI);
+  }
+
   if (hasFP(MF)) {
 // Get the offset of the stack slot for the EBP register... which is
 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
 int EBPOffset = MFI-getObjectOffset(MFI-getObjectIndexBegin())+4;
 
-if (NumBytes) {   // adjust stack pointer: ESP -= numbytes
-  unsigned Opc = NumBytes  128 ? X86::SUB32ri8 : X86::SUB32ri;
-  MI = BuildMI(Opc, 1, 
X86::ESP,MachineOperand::UseAndDef).addImm(NumBytes);
-  MBB.insert(MBBI, MI);
-}
-
 // Save EBP into the appropriate stack slot...
 MI = addRegOffset(BuildMI(X86::MOV32mr, 5),// mov [ESP-offset], EBP
   X86::ESP, EBPOffset+NumBytes).addReg(X86::EBP);
@@ -596,30 +613,6 @@
   MI = addRegOffset(BuildMI(X86::LEA32r, 5, X86::EBP), 
X86::ESP,NumBytes-4);
 
 MBB.insert(MBBI, MI);
-
-  } else {
-if (MFI-hasCalls()) {
-  // When we have no frame pointer, we reserve argument space for call 
sites
-  // in the function immediately on entry to the current function.  This
-  // eliminates the need for add/sub ESP brackets around call sites.
-  //
-  NumBytes += MFI-getMaxCallFrameSize();
-
-  // Round the size to a multiple of the alignment (don't forget the 4 byte
-  // offset though).
-  unsigned Align = MF.getTarget().getFrameInfo()-getStackAlignment();
-  NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
-}
-
-// Update frame info to pretend that this is part of the stack...
-MFI-setStackSize(NumBytes);
-
-if (NumBytes) {
-  // adjust stack pointer: ESP -= numbytes
-  unsigned Opc = NumBytes  128 ? X86::SUB32ri8 : X86::SUB32ri;
-  MI= BuildMI(Opc, 1, X86::ESP, 
MachineOperand::UseAndDef).addImm(NumBytes);
-  MBB.insert(MBBI, MI);
-}
   }
 }
 



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[llvm-commits] CVS: llvm/include/llvm/IntrinsicsX86.td

2006-04-14 Thread Evan Cheng


Changes in directory llvm/include/llvm:

IntrinsicsX86.td updated: 1.27 - 1.28
---
Log message:

Misc. SSE2 intrinsics: clflush, lfench, mfence

---
Diffs of the changes:  (+6 -0)

 IntrinsicsX86.td |6 ++
 1 files changed, 6 insertions(+)


Index: llvm/include/llvm/IntrinsicsX86.td
diff -u llvm/include/llvm/IntrinsicsX86.td:1.27 
llvm/include/llvm/IntrinsicsX86.td:1.28
--- llvm/include/llvm/IntrinsicsX86.td:1.27 Thu Apr 13 20:39:53 2006
+++ llvm/include/llvm/IntrinsicsX86.td  Fri Apr 14 02:43:12 2006
@@ -455,6 +455,12 @@
   def int_x86_sse2_maskmov_dqu : GCCBuiltin__builtin_ia32_maskmovdqu,
   Intrinsic[llvm_void_ty, llvm_v16i8_ty,
  llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem];
+  def int_x86_sse2_clflush : GCCBuiltin__builtin_ia32_clflush,
+  Intrinsic[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem];
+  def int_x86_sse2_lfence : GCCBuiltin__builtin_ia32_lfence,
+  Intrinsic[llvm_void_ty], [IntrWriteMem];
+  def int_x86_sse2_mfence : GCCBuiltin__builtin_ia32_mfence,
+  Intrinsic[llvm_void_ty], [IntrWriteMem];
 }
 
 
//===--===//



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[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrSSE.td

2006-04-14 Thread Evan Cheng


Changes in directory llvm/lib/Target/X86:

X86InstrSSE.td updated: 1.88 - 1.89
---
Log message:

Misc. SSE2 intrinsics: clflush, lfench, mfence

---
Diffs of the changes:  (+11 -2)

 X86InstrSSE.td |   13 +++--
 1 files changed, 11 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/X86/X86InstrSSE.td
diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.88 
llvm/lib/Target/X86/X86InstrSSE.td:1.89
--- llvm/lib/Target/X86/X86InstrSSE.td:1.88 Thu Apr 13 20:39:53 2006
+++ llvm/lib/Target/X86/X86InstrSSE.td  Fri Apr 14 02:43:12 2006
@@ -2002,12 +2002,21 @@
 [(int_x86_sse2_movnt_i addr:$dst, R32:$src)], 
   TB, Requires[HasSSE2];
 
-// Store fence
+// Flush cache
+def CLFLUSH : I0xAE, MRM7m, (ops i8mem:$src),
+   clflush $src, [(int_x86_sse2_clflush addr:$src)],
+  TB, Requires[HasSSE2];
+
+// Load, store, and memory fence
 def SFENCE : I0xAE, MRM7m, (ops),
sfence, [(int_x86_sse_sfence)], TB, Requires[HasSSE1];
+def LFENCE : I0xAE, MRM5m, (ops),
+   lfence, [(int_x86_sse2_lfence)], TB, Requires[HasSSE2];
+def MFENCE : I0xAE, MRM6m, (ops),
+   mfence, [(int_x86_sse2_mfence)], TB, Requires[HasSSE2];
 
 // MXCSR register
-def LDMXCSR : I0xAE, MRM2m, (ops i32mem:$src),
+def LDMXCSR : I0xAE, MRM5m, (ops i32mem:$src),
 ldmxcsr $src,
 [(int_x86_sse_ldmxcsr addr:$src)], TB, Requires[HasSSE1];
 def STMXCSR : I0xAE, MRM3m, (ops i32mem:$dst),



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[llvm-commits] CVS: llvm/utils/NightlyTest.pl

2006-04-14 Thread Reid Spencer


Changes in directory llvm/utils:

NightlyTest.pl updated: 1.106 - 1.107
---
Log message:

Allow an option, -with-externals, to be specified that provides the location
of the external tests. This turns into --with-externals option to configure.


---
Diffs of the changes:  (+4 -0)

 NightlyTest.pl |4 
 1 files changed, 4 insertions(+)


Index: llvm/utils/NightlyTest.pl
diff -u llvm/utils/NightlyTest.pl:1.106 llvm/utils/NightlyTest.pl:1.107
--- llvm/utils/NightlyTest.pl:1.106 Mon Mar 20 19:21:39 2006
+++ llvm/utils/NightlyTest.pl   Fri Apr 14 08:53:56 2006
@@ -19,6 +19,7 @@
 #   LARGE_PROBLEM_SIZE enabled.
 #  -noexternals Do not run the external tests (for cases where povray
 #   or SPEC are not installed)
+#  -with-externals  Specify a directory where the external tests are located.
 #  -nodejagnu   Do not run feature or regression tests
 #  -parallelRun two parallel jobs with GNU Make.
 #  -release Build an LLVM Release version
@@ -310,6 +311,9 @@
   if (/^-f2c$/){
 $CONFIGUREARGS .=  --with-f2c=$ARGV[0]; shift; next;
   }
+  if (/^-with-externals/)  { 
+$CONFIGUREARGS .= --with-externals=$ARGV[0]; shift; next 
+  }
   if (/^-gnuplotscript$/)  { $PlotScriptFilename = $ARGV[0]; shift; next; }
   if (/^-templatefile$/)   { $Template = $ARGV[0]; shift; next; }
   if (/^-gccpath/) { 



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[llvm-commits] CVS: llvm/docs/ProgrammersManual.html

2006-04-14 Thread Reid Spencer


Changes in directory llvm/docs:

ProgrammersManual.html updated: 1.90 - 1.91
---
Log message:

Correct the Superclasses list for GlobalVariable and Function to indicate
that they are Constant as they derive from GlobalValue. Also, fix some of
the wording where it mentions this. 
Patch inspired by Nai Xia.


---
Diffs of the changes:  (+21 -17)

 ProgrammersManual.html |   38 +-
 1 files changed, 21 insertions(+), 17 deletions(-)


Index: llvm/docs/ProgrammersManual.html
diff -u llvm/docs/ProgrammersManual.html:1.90 
llvm/docs/ProgrammersManual.html:1.91
--- llvm/docs/ProgrammersManual.html:1.90   Mon Mar 13 23:39:39 2006
+++ llvm/docs/ProgrammersManual.htmlFri Apr 14 09:11:48 2006
@@ -1710,8 +1710,8 @@
 href=/doxygen/GlobalValue_8h-source.htmlllvm/GlobalValue.h/a/ttbr
 doxygen info: a href=/doxygen/classllvm_1_1GlobalValue.htmlGlobalValue
 Class/abr
-Superclasses: a href=#UserttUser/tt/a, a
-href=#ValuettValue/tt/a/p
+Superclasses: a href=#ConstantttConstant/tt/a, 
+a href=#UserttUser/tt/a, a href=#ValuettValue/tt/a/p
 
 pGlobal values (a href=#GlobalVariablettGlobalVariable/tt/as or a
 href=#FunctionttFunction/tt/as) are the only LLVM values that are
@@ -1778,15 +1778,17 @@
 ptt#include a
 href=/doxygen/Function_8h-source.htmlllvm/Function.h/a/ttbr doxygen
 info: a href=/doxygen/classllvm_1_1Function.htmlFunction Class/abr
-Superclasses: a href=#GlobalValuettGlobalValue/tt/a, a
-href=#UserttUser/tt/a, a href=#ValuettValue/tt/a/p
+Superclasses: a href=#GlobalValuettGlobalValue/tt/a, 
+a href=#ConstantttConstant/tt/a, 
+a href=#UserttUser/tt/a, 
+a href=#ValuettValue/tt/a/p
 
 pThe ttFunction/tt class represents a single procedure in LLVM.  It is
 actually one of the more complex classes in the LLVM heirarchy because it must
 keep track of a large amount of data.  The ttFunction/tt class keeps track
-of a list of a href=#BasicBlockttBasicBlock/tt/as, a list of formal 
a
-href=#ArgumentttArgument/tt/as, and a a
-href=#SymbolTablettSymbolTable/tt/a./p
+of a list of a href=#BasicBlockttBasicBlock/tt/as, a list of formal 
+a href=#ArgumentttArgument/tt/as, and a 
+a href=#SymbolTablettSymbolTable/tt/a./p
 
 pThe list of a href=#BasicBlockttBasicBlock/tt/as is the most
 commonly used part of ttFunction/tt objects.  The list imposes an implicit
@@ -1915,20 +1917,22 @@
 href=/doxygen/GlobalVariable_8h-source.htmlllvm/GlobalVariable.h/a/tt
 br
 doxygen info: a 
href=/doxygen/classllvm_1_1GlobalVariable.htmlGlobalVariable
-Class/abr Superclasses: a href=#GlobalValuettGlobalValue/tt/a, a
-href=#UserttUser/tt/a, a href=#ValuettValue/tt/a/p
+ Class/abr
+Superclasses: a href=#GlobalValuettGlobalValue/tt/a, 
+a href=#ConstantttConstant/tt/a,
+a href=#UserttUser/tt/a,
+a href=#ValuettValue/tt/a/p
 
 pGlobal variables are represented with the (suprise suprise)
 ttGlobalVariable/tt class. Like functions, ttGlobalVariable/tts are 
also
 subclasses of a href=#GlobalValuettGlobalValue/tt/a, and as such are
 always referenced by their address (global values must live in memory, so their
-name refers to their address). See a
-href=#GlobalValuettGlobalValue/tt/a for more on this. Global variables
-may have an initial value (which must be a a
-href=#ConstantttConstant/tt/a), and if they have an initializer, they
-may be marked as constant themselves (indicating that their contents never
-change at runtime)./p
-
+name refers to their constant address). See 
+a href=#GlobalValuettGlobalValue/tt/a for more on this.  Global 
+variables may have an initial value (which must be a 
+a href=#ConstantttConstant/tt/a), and if they have an initializer, 
+they may be marked as constant themselves (indicating that their contents 
+never change at runtime)./p
 /div
 
 !-- ___ 
--
@@ -2277,7 +2281,7 @@
   a href=mailto:[EMAIL PROTECTED]Dinakar Dhurjati/a and
   a href=mailto:[EMAIL PROTECTED]Chris Lattner/abr
   a href=http://llvm.org;The LLVM Compiler Infrastructure/abr
-  Last modified: $Date: 2006/03/14 05:39:39 $
+  Last modified: $Date: 2006/04/14 14:11:48 $
 /address
 
 /body



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[llvm-commits] [release_17] CVS: llvm/docs/ProgrammersManual.html

2006-04-14 Thread Reid Spencer


Changes in directory llvm/docs:

ProgrammersManual.html updated: 1.90 - 1.90.2.1
---
Log message:

Include corrected documentation on class hierarchy of GlobalValue (derived
from constant).


---
Diffs of the changes:  (+21 -17)

 ProgrammersManual.html |   38 +-
 1 files changed, 21 insertions(+), 17 deletions(-)


Index: llvm/docs/ProgrammersManual.html
diff -u llvm/docs/ProgrammersManual.html:1.90 
llvm/docs/ProgrammersManual.html:1.90.2.1
--- llvm/docs/ProgrammersManual.html:1.90   Mon Mar 13 23:39:39 2006
+++ llvm/docs/ProgrammersManual.htmlFri Apr 14 09:19:55 2006
@@ -1710,8 +1710,8 @@
 href=/doxygen/GlobalValue_8h-source.htmlllvm/GlobalValue.h/a/ttbr
 doxygen info: a href=/doxygen/classllvm_1_1GlobalValue.htmlGlobalValue
 Class/abr
-Superclasses: a href=#UserttUser/tt/a, a
-href=#ValuettValue/tt/a/p
+Superclasses: a href=#ConstantttConstant/tt/a, 
+a href=#UserttUser/tt/a, a href=#ValuettValue/tt/a/p
 
 pGlobal values (a href=#GlobalVariablettGlobalVariable/tt/as or a
 href=#FunctionttFunction/tt/as) are the only LLVM values that are
@@ -1778,15 +1778,17 @@
 ptt#include a
 href=/doxygen/Function_8h-source.htmlllvm/Function.h/a/ttbr doxygen
 info: a href=/doxygen/classllvm_1_1Function.htmlFunction Class/abr
-Superclasses: a href=#GlobalValuettGlobalValue/tt/a, a
-href=#UserttUser/tt/a, a href=#ValuettValue/tt/a/p
+Superclasses: a href=#GlobalValuettGlobalValue/tt/a, 
+a href=#ConstantttConstant/tt/a, 
+a href=#UserttUser/tt/a, 
+a href=#ValuettValue/tt/a/p
 
 pThe ttFunction/tt class represents a single procedure in LLVM.  It is
 actually one of the more complex classes in the LLVM heirarchy because it must
 keep track of a large amount of data.  The ttFunction/tt class keeps track
-of a list of a href=#BasicBlockttBasicBlock/tt/as, a list of formal 
a
-href=#ArgumentttArgument/tt/as, and a a
-href=#SymbolTablettSymbolTable/tt/a./p
+of a list of a href=#BasicBlockttBasicBlock/tt/as, a list of formal 
+a href=#ArgumentttArgument/tt/as, and a 
+a href=#SymbolTablettSymbolTable/tt/a./p
 
 pThe list of a href=#BasicBlockttBasicBlock/tt/as is the most
 commonly used part of ttFunction/tt objects.  The list imposes an implicit
@@ -1915,20 +1917,22 @@
 href=/doxygen/GlobalVariable_8h-source.htmlllvm/GlobalVariable.h/a/tt
 br
 doxygen info: a 
href=/doxygen/classllvm_1_1GlobalVariable.htmlGlobalVariable
-Class/abr Superclasses: a href=#GlobalValuettGlobalValue/tt/a, a
-href=#UserttUser/tt/a, a href=#ValuettValue/tt/a/p
+ Class/abr
+Superclasses: a href=#GlobalValuettGlobalValue/tt/a, 
+a href=#ConstantttConstant/tt/a,
+a href=#UserttUser/tt/a,
+a href=#ValuettValue/tt/a/p
 
 pGlobal variables are represented with the (suprise suprise)
 ttGlobalVariable/tt class. Like functions, ttGlobalVariable/tts are 
also
 subclasses of a href=#GlobalValuettGlobalValue/tt/a, and as such are
 always referenced by their address (global values must live in memory, so their
-name refers to their address). See a
-href=#GlobalValuettGlobalValue/tt/a for more on this. Global variables
-may have an initial value (which must be a a
-href=#ConstantttConstant/tt/a), and if they have an initializer, they
-may be marked as constant themselves (indicating that their contents never
-change at runtime)./p
-
+name refers to their constant address). See 
+a href=#GlobalValuettGlobalValue/tt/a for more on this.  Global 
+variables may have an initial value (which must be a 
+a href=#ConstantttConstant/tt/a), and if they have an initializer, 
+they may be marked as constant themselves (indicating that their contents 
+never change at runtime)./p
 /div
 
 !-- ___ 
--
@@ -2277,7 +2281,7 @@
   a href=mailto:[EMAIL PROTECTED]Dinakar Dhurjati/a and
   a href=mailto:[EMAIL PROTECTED]Chris Lattner/abr
   a href=http://llvm.org;The LLVM Compiler Infrastructure/abr
-  Last modified: $Date: 2006/03/14 05:39:39 $
+  Last modified: $Date: 2006/04/14 14:19:55 $
 /address
 
 /body



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[llvm-commits] CVS: llvm/docs/LangRef.html

2006-04-14 Thread Tanya Brethour


Changes in directory llvm/docs:

LangRef.html updated: 1.147 - 1.148
---
Log message:

Removing unimplemented vector instructions from language referrence.


---
Diffs of the changes:  (+1 -192)

 LangRef.html |  193 ---
 1 files changed, 1 insertion(+), 192 deletions(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.147 llvm/docs/LangRef.html:1.148
--- llvm/docs/LangRef.html:1.147Sat Apr  8 18:07:04 2006
+++ llvm/docs/LangRef.html  Fri Apr 14 14:07:42 2006
@@ -96,9 +96,6 @@
   lia href=#i_extractelement'ttextractelement/tt' 
Instruction/a/li
   lia href=#i_insertelement'ttinsertelement/tt' 
Instruction/a/li
   lia href=#i_shufflevector'ttshufflevector/tt' 
Instruction/a/li
-  lia href=#i_vsetint'ttvsetint/tt' Instruction/a/li
-  lia href=#i_vsetfp'ttvsetfp/tt' Instruction/a/li
-  lia href=#i_vselect'ttvselect/tt' Instruction/a/li
 /ol
   /li
   lia href=#memoryopsMemory Access Operations/a
@@ -2060,194 +2057,6 @@
 /pre
 /div
 
-
-!-- ___ 
--
-div class=doc_subsubsection a name=i_vsetint'ttvsetint/tt'
-Instruction/a /div
-div class=doc_text
-h5Syntax:/h5
-prelt;resultgt; = vsetint lt;opgt;, lt;n x lt;tygt;gt; lt;var1gt;, 
lt;var2gt;   i; yields lt;n x boolgt;/i
-/pre
-
-h5Overview:/h5
-
-pThe 'ttvsetint/tt' instruction takes two integer vectors and
-returns a vector of boolean values representing, at each position, the
-result of the comparison between the values at that position in the
-two operands./p
-
-h5Arguments:/h5
-
-pThe arguments to a 'ttvsetint/tt' instruction are a comparison
-operation and two value arguments.  The value arguments must be of a
-href=#t_integralintegral/a a href=#t_packedpacked/a type,
-and they must have identical types.  The operation argument must be
-one of tteq/tt, ttne/tt, ttslt/tt, ttsgt/tt,
-ttsle/tt, ttsge/tt, ttult/tt, ttugt/tt, ttule/tt,
-ttuge/tt, tttrue/tt, and ttfalse/tt.  The result is a
-packed ttbool/tt value with the same length as each operand./p
-
-h5Semantics:/h5
-
-pThe following table shows the semantics of 'ttvsetint/tt'.  For
-each position of the result, the comparison is done on the
-corresponding positions of the two value arguments.  Note that the
-signedness of the comparison depends on the comparison opcode and
-inot/i on the signedness of the value operands.  E.g., ttvsetint
-slt 4 x unsigned %x, %y/tt does an elementwise isigned/i
-comparison of tt%x/tt and tt%y/tt./p
-
-table  border=1 cellspacing=0 cellpadding=4
-  tbody
-trthOperation/ththResult is true iff/ththComparison 
is/th/tr
-trtdtteq/tt/tdtdvar1 == var2/tdtd--/td/tr
-trtdttne/tt/tdtdvar1 != var2/tdtd--/td/tr
-trtdttslt/tt/tdtdvar1 lt; var2/tdtdsigned/td/tr
-trtdttsgt/tt/tdtdvar1 gt; var2/tdtdsigned/td/tr
-trtdttsle/tt/tdtdvar1 lt;= var2/tdtdsigned/td/tr
-trtdttsge/tt/tdtdvar1 gt;= var2/tdtdsigned/td/tr
-trtdttult/tt/tdtdvar1 lt; var2/tdtdunsigned/td/tr
-trtdttugt/tt/tdtdvar1 gt; var2/tdtdunsigned/td/tr
-trtdttule/tt/tdtdvar1 lt;= var2/tdtdunsigned/td/tr
-trtdttuge/tt/tdtdvar1 gt;= var2/tdtdunsigned/td/tr
-trtdtttrue/tt/tdtdalways/tdtd--/td/tr
-trtdttfalse/tt/tdtdnever/tdtd--/td/tr
-  /tbody
-/table
-
-h5Example:/h5
-pre  lt;resultgt; = vsetint eq lt;2 x intgt; lt;int 0, int 1gt;, 
lt;int 1, int 0gt;  i; yields {lt;2 x boolgt;}:result = false, 
false/i
-  lt;resultgt; = vsetint ne lt;2 x intgt; lt;int 0, int 1gt;, lt;int 1, 
int 0gt;  i; yields {lt;2 x boolgt;}:result = true, true/i
-  lt;resultgt; = vsetint slt lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = true, false/i
-  lt;resultgt; = vsetint sgt lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = false, true/i
-  lt;resultgt; = vsetint sle lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = true, false/i
-  lt;resultgt; = vsetint sge lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = false, true/i
-/pre
-/div
-
-!-- ___ 
--
-div class=doc_subsubsection a name=i_vsetfp'ttvsetfp/tt'
-Instruction/a /div
-div class=doc_text
-h5Syntax:/h5
-prelt;resultgt; = vsetfp lt;opgt;, lt;n x lt;tygt;gt; lt;var1gt;, 
lt;var2gt;   i; yields lt;n x boolgt;/i
-/pre
-
-h5Overview:/h5
-
-pThe 'ttvsetfp/tt' instruction takes two floating point vector
-arguments and returns a vector of boolean values representing, at each
-position, the result of the comparison between the values at that
-position in the two operands./p
-
-h5Arguments:/h5
-
-pThe arguments to a 'ttvsetfp/tt' instruction are a comparison
-operation and two value arguments.  The value arguments must be of a
-href=t_floatingfloating point/a a href=#t_packedpacked/a
-type, 

[llvm-commits] CVS: llvm/docs/LangRef.html

2006-04-14 Thread Tanya Brethour


Changes in directory llvm/docs:

LangRef.html updated: 1.148 - 1.149
---
Log message:

Adding back vector instructions to keep in mainline.


---
Diffs of the changes:  (+192 -1)

 LangRef.html |  193 ++-
 1 files changed, 192 insertions(+), 1 deletion(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.148 llvm/docs/LangRef.html:1.149
--- llvm/docs/LangRef.html:1.148Fri Apr 14 14:07:42 2006
+++ llvm/docs/LangRef.html  Fri Apr 14 14:24:33 2006
@@ -96,6 +96,9 @@
   lia href=#i_extractelement'ttextractelement/tt' 
Instruction/a/li
   lia href=#i_insertelement'ttinsertelement/tt' 
Instruction/a/li
   lia href=#i_shufflevector'ttshufflevector/tt' 
Instruction/a/li
+  lia href=#i_vsetint'ttvsetint/tt' Instruction/a/li
+  lia href=#i_vsetfp'ttvsetfp/tt' Instruction/a/li
+  lia href=#i_vselect'ttvselect/tt' Instruction/a/li
 /ol
   /li
   lia href=#memoryopsMemory Access Operations/a
@@ -2057,6 +2060,194 @@
 /pre
 /div
 
+
+!-- ___ 
--
+div class=doc_subsubsection a name=i_vsetint'ttvsetint/tt'
+Instruction/a /div
+div class=doc_text
+h5Syntax:/h5
+prelt;resultgt; = vsetint lt;opgt;, lt;n x lt;tygt;gt; lt;var1gt;, 
lt;var2gt;   i; yields lt;n x boolgt;/i
+/pre
+
+h5Overview:/h5
+
+pThe 'ttvsetint/tt' instruction takes two integer vectors and
+returns a vector of boolean values representing, at each position, the
+result of the comparison between the values at that position in the
+two operands./p
+
+h5Arguments:/h5
+
+pThe arguments to a 'ttvsetint/tt' instruction are a comparison
+operation and two value arguments.  The value arguments must be of a
+href=#t_integralintegral/a a href=#t_packedpacked/a type,
+and they must have identical types.  The operation argument must be
+one of tteq/tt, ttne/tt, ttslt/tt, ttsgt/tt,
+ttsle/tt, ttsge/tt, ttult/tt, ttugt/tt, ttule/tt,
+ttuge/tt, tttrue/tt, and ttfalse/tt.  The result is a
+packed ttbool/tt value with the same length as each operand./p
+
+h5Semantics:/h5
+
+pThe following table shows the semantics of 'ttvsetint/tt'.  For
+each position of the result, the comparison is done on the
+corresponding positions of the two value arguments.  Note that the
+signedness of the comparison depends on the comparison opcode and
+inot/i on the signedness of the value operands.  E.g., ttvsetint
+slt 4 x unsigned %x, %y/tt does an elementwise isigned/i
+comparison of tt%x/tt and tt%y/tt./p
+
+table  border=1 cellspacing=0 cellpadding=4
+  tbody
+trthOperation/ththResult is true iff/ththComparison 
is/th/tr
+trtdtteq/tt/tdtdvar1 == var2/tdtd--/td/tr
+trtdttne/tt/tdtdvar1 != var2/tdtd--/td/tr
+trtdttslt/tt/tdtdvar1 lt; var2/tdtdsigned/td/tr
+trtdttsgt/tt/tdtdvar1 gt; var2/tdtdsigned/td/tr
+trtdttsle/tt/tdtdvar1 lt;= var2/tdtdsigned/td/tr
+trtdttsge/tt/tdtdvar1 gt;= var2/tdtdsigned/td/tr
+trtdttult/tt/tdtdvar1 lt; var2/tdtdunsigned/td/tr
+trtdttugt/tt/tdtdvar1 gt; var2/tdtdunsigned/td/tr
+trtdttule/tt/tdtdvar1 lt;= var2/tdtdunsigned/td/tr
+trtdttuge/tt/tdtdvar1 gt;= var2/tdtdunsigned/td/tr
+trtdtttrue/tt/tdtdalways/tdtd--/td/tr
+trtdttfalse/tt/tdtdnever/tdtd--/td/tr
+  /tbody
+/table
+
+h5Example:/h5
+pre  lt;resultgt; = vsetint eq lt;2 x intgt; lt;int 0, int 1gt;, 
lt;int 1, int 0gt;  i; yields {lt;2 x boolgt;}:result = false, 
false/i
+  lt;resultgt; = vsetint ne lt;2 x intgt; lt;int 0, int 1gt;, lt;int 1, 
int 0gt;  i; yields {lt;2 x boolgt;}:result = true, true/i
+  lt;resultgt; = vsetint slt lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = true, false/i
+  lt;resultgt; = vsetint sgt lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = false, true/i
+  lt;resultgt; = vsetint sle lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = true, false/i
+  lt;resultgt; = vsetint sge lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = false, true/i
+/pre
+/div
+
+!-- ___ 
--
+div class=doc_subsubsection a name=i_vsetfp'ttvsetfp/tt'
+Instruction/a /div
+div class=doc_text
+h5Syntax:/h5
+prelt;resultgt; = vsetfp lt;opgt;, lt;n x lt;tygt;gt; lt;var1gt;, 
lt;var2gt;   i; yields lt;n x boolgt;/i
+/pre
+
+h5Overview:/h5
+
+pThe 'ttvsetfp/tt' instruction takes two floating point vector
+arguments and returns a vector of boolean values representing, at each
+position, the result of the comparison between the values at that
+position in the two operands./p
+
+h5Arguments:/h5
+
+pThe arguments to a 'ttvsetfp/tt' instruction are a comparison
+operation and two value arguments.  The value arguments must be of a
+href=t_floatingfloating point/a a href=#t_packedpacked/a
+type, and they must 

[llvm-commits] [release_17] CVS: llvm/docs/LangRef.html

2006-04-14 Thread Tanya Brethour


Changes in directory llvm/docs:

LangRef.html updated: 1.147 - 1.147.2.1
---
Log message:

Removing unimplemented vector operations for the release docs.



---
Diffs of the changes:  (+1 -192)

 LangRef.html |  193 ---
 1 files changed, 1 insertion(+), 192 deletions(-)


Index: llvm/docs/LangRef.html
diff -u llvm/docs/LangRef.html:1.147 llvm/docs/LangRef.html:1.147.2.1
--- llvm/docs/LangRef.html:1.147Sat Apr  8 18:07:04 2006
+++ llvm/docs/LangRef.html  Fri Apr 14 14:31:07 2006
@@ -96,9 +96,6 @@
   lia href=#i_extractelement'ttextractelement/tt' 
Instruction/a/li
   lia href=#i_insertelement'ttinsertelement/tt' 
Instruction/a/li
   lia href=#i_shufflevector'ttshufflevector/tt' 
Instruction/a/li
-  lia href=#i_vsetint'ttvsetint/tt' Instruction/a/li
-  lia href=#i_vsetfp'ttvsetfp/tt' Instruction/a/li
-  lia href=#i_vselect'ttvselect/tt' Instruction/a/li
 /ol
   /li
   lia href=#memoryopsMemory Access Operations/a
@@ -2060,194 +2057,6 @@
 /pre
 /div
 
-
-!-- ___ 
--
-div class=doc_subsubsection a name=i_vsetint'ttvsetint/tt'
-Instruction/a /div
-div class=doc_text
-h5Syntax:/h5
-prelt;resultgt; = vsetint lt;opgt;, lt;n x lt;tygt;gt; lt;var1gt;, 
lt;var2gt;   i; yields lt;n x boolgt;/i
-/pre
-
-h5Overview:/h5
-
-pThe 'ttvsetint/tt' instruction takes two integer vectors and
-returns a vector of boolean values representing, at each position, the
-result of the comparison between the values at that position in the
-two operands./p
-
-h5Arguments:/h5
-
-pThe arguments to a 'ttvsetint/tt' instruction are a comparison
-operation and two value arguments.  The value arguments must be of a
-href=#t_integralintegral/a a href=#t_packedpacked/a type,
-and they must have identical types.  The operation argument must be
-one of tteq/tt, ttne/tt, ttslt/tt, ttsgt/tt,
-ttsle/tt, ttsge/tt, ttult/tt, ttugt/tt, ttule/tt,
-ttuge/tt, tttrue/tt, and ttfalse/tt.  The result is a
-packed ttbool/tt value with the same length as each operand./p
-
-h5Semantics:/h5
-
-pThe following table shows the semantics of 'ttvsetint/tt'.  For
-each position of the result, the comparison is done on the
-corresponding positions of the two value arguments.  Note that the
-signedness of the comparison depends on the comparison opcode and
-inot/i on the signedness of the value operands.  E.g., ttvsetint
-slt 4 x unsigned %x, %y/tt does an elementwise isigned/i
-comparison of tt%x/tt and tt%y/tt./p
-
-table  border=1 cellspacing=0 cellpadding=4
-  tbody
-trthOperation/ththResult is true iff/ththComparison 
is/th/tr
-trtdtteq/tt/tdtdvar1 == var2/tdtd--/td/tr
-trtdttne/tt/tdtdvar1 != var2/tdtd--/td/tr
-trtdttslt/tt/tdtdvar1 lt; var2/tdtdsigned/td/tr
-trtdttsgt/tt/tdtdvar1 gt; var2/tdtdsigned/td/tr
-trtdttsle/tt/tdtdvar1 lt;= var2/tdtdsigned/td/tr
-trtdttsge/tt/tdtdvar1 gt;= var2/tdtdsigned/td/tr
-trtdttult/tt/tdtdvar1 lt; var2/tdtdunsigned/td/tr
-trtdttugt/tt/tdtdvar1 gt; var2/tdtdunsigned/td/tr
-trtdttule/tt/tdtdvar1 lt;= var2/tdtdunsigned/td/tr
-trtdttuge/tt/tdtdvar1 gt;= var2/tdtdunsigned/td/tr
-trtdtttrue/tt/tdtdalways/tdtd--/td/tr
-trtdttfalse/tt/tdtdnever/tdtd--/td/tr
-  /tbody
-/table
-
-h5Example:/h5
-pre  lt;resultgt; = vsetint eq lt;2 x intgt; lt;int 0, int 1gt;, 
lt;int 1, int 0gt;  i; yields {lt;2 x boolgt;}:result = false, 
false/i
-  lt;resultgt; = vsetint ne lt;2 x intgt; lt;int 0, int 1gt;, lt;int 1, 
int 0gt;  i; yields {lt;2 x boolgt;}:result = true, true/i
-  lt;resultgt; = vsetint slt lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = true, false/i
-  lt;resultgt; = vsetint sgt lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = false, true/i
-  lt;resultgt; = vsetint sle lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = true, false/i
-  lt;resultgt; = vsetint sge lt;2 x intgt; lt;int 0, int 1gt;, lt;int 
1, int 0gt;  i; yields {lt;2 x boolgt;}:result = false, true/i
-/pre
-/div
-
-!-- ___ 
--
-div class=doc_subsubsection a name=i_vsetfp'ttvsetfp/tt'
-Instruction/a /div
-div class=doc_text
-h5Syntax:/h5
-prelt;resultgt; = vsetfp lt;opgt;, lt;n x lt;tygt;gt; lt;var1gt;, 
lt;var2gt;   i; yields lt;n x boolgt;/i
-/pre
-
-h5Overview:/h5
-
-pThe 'ttvsetfp/tt' instruction takes two floating point vector
-arguments and returns a vector of boolean values representing, at each
-position, the result of the comparison between the values at that
-position in the two operands./p
-
-h5Arguments:/h5
-
-pThe arguments to a 'ttvsetfp/tt' instruction are a comparison
-operation and two value arguments.  The value arguments must be of a
-href=t_floatingfloating point/a a href=#t_packedpacked/a

[llvm-commits] [release_17] CVS: llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c

2006-04-14 Thread Tanya Brethour


Changes in directory llvm/test/Regression/CFrontend:

2005-12-04-DeclarationLineNumbers.c updated: 1.2 - 1.2.2.1
---
Log message:

Merging in fix from mainline


---
Diffs of the changes:  (+3 -1)

 2005-12-04-DeclarationLineNumbers.c |4 +++-
 1 files changed, 3 insertions(+), 1 deletion(-)


Index: llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c
diff -u llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c:1.2 
llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c:1.2.2.1
--- llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c:1.2  
Thu Apr 13 12:35:36 2006
+++ llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c  Fri Apr 
14 14:34:11 2006
@@ -1,7 +1,6 @@
 // RUN: %llvmgcc %s -S -g -o - | grep 'llvm.dbg.stoppoint.*uint 14'
 // PR664: ensure that line #'s are emitted for declarations
 
-// XFAIL: llvmgcc4
 
 short test(short br_data_0,
 short br_data_1,
@@ -21,3 +20,6 @@
 
 return s0734 + s1625;
 }
+
+// FIXME: PR735
+// XFAIL: llvmgcc4



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[llvm-commits] [release_17] CVS: llvm/test/Regression/CodeGen/Generic/2006-04-11-vecload.ll

2006-04-14 Thread Tanya Brethour


Changes in directory llvm/test/Regression/CodeGen/Generic:

2006-04-11-vecload.ll (r1.1) removed
---
Log message:

Removing from release


---
Diffs of the changes:  (+0 -0)

 0 files changed



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[llvm-commits] [release_17] CVS: llvm/test/Regression/CFrontend/2004-02-20-StaticRedeclare.c.tr

2006-04-14 Thread Tanya Brethour


Changes in directory llvm/test/Regression/CFrontend:

2004-02-20-StaticRedeclare.c.tr (r1.4) removed
---
Log message:

Removing from release.


---
Diffs of the changes:  (+0 -0)

 0 files changed



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[llvm-commits] CVS: llvm/test/Regression/Transforms/ScalarRepl/vector_promote.ll

2006-04-14 Thread Chris Lattner


Changes in directory llvm/test/Regression/Transforms/ScalarRepl:

vector_promote.ll added (r1.1)
---
Log message:

New testcase, checking to see we can turn this code:

void test(vector float *F, float f) {
  vector float G = *F + *F;
  *((float*)G) = f;
  *F = G + G;
}

void test2(vector float *F, float f) {
  vector float G = *F + *F;
  ((float*)G)[2] = f;
  *F = G + G;
}

void test3(vector float *F, float *f) {
  vector float G = *F + *F;
  *f = ((float*)G)[2];
}

void test4(vector float *F, float *f) {
  vector float G = *F + *F;
  *f = *((float*)G);
}

into insert/extract element operations with no memory traffic.



---
Diffs of the changes:  (+56 -0)

 vector_promote.ll |   56 ++
 1 files changed, 56 insertions(+)


Index: llvm/test/Regression/Transforms/ScalarRepl/vector_promote.ll
diff -c /dev/null 
llvm/test/Regression/Transforms/ScalarRepl/vector_promote.ll:1.1
*** /dev/null   Fri Apr 14 16:42:04 2006
--- llvm/test/Regression/Transforms/ScalarRepl/vector_promote.llFri Apr 
14 16:41:54 2006
***
*** 0 
--- 1,56 
+ 
+ ; RUN: llvm-as  %s | opt -scalarrepl -disable-output 
+ ; RUN: llvm-as  %s | opt -scalarrepl | llvm-dis | not grep alloca
+ 
+ void %test(4 x float* %F, float %f) {
+ entry:
+ %G = alloca 4 x float, align 16   ; 4 x float* 
[#uses=3]
+ %tmp = load 4 x float* %F ; 4 x float [#uses=2]
+ %tmp3 = add 4 x float %tmp, %tmp  ; 4 x float 
[#uses=1]
+ store 4 x float %tmp3, 4 x float* %G
+ %G = getelementptr 4 x float* %G, int 0, int 0; 
float* [#uses=1]
+ store float %f, float* %G
+ %tmp4 = load 4 x float* %G; 4 x float [#uses=2]
+ %tmp6 = add 4 x float %tmp4, %tmp4; 4 x float 
[#uses=1]
+ store 4 x float %tmp6, 4 x float* %F
+ ret void
+ }
+ 
+ void %test2(4 x float* %F, float %f) {
+ entry:
+ %G = alloca 4 x float, align 16   ; 4 x float* 
[#uses=3]
+ %tmp = load 4 x float* %F ; 4 x float [#uses=2]
+ %tmp3 = add 4 x float %tmp, %tmp  ; 4 x float 
[#uses=1]
+ store 4 x float %tmp3, 4 x float* %G
+ %tmp = getelementptr 4 x float* %G, int 0, int 2  ; 
float* [#uses=1]
+ store float %f, float* %tmp
+ %tmp4 = load 4 x float* %G; 4 x float [#uses=2]
+ %tmp6 = add 4 x float %tmp4, %tmp4; 4 x float 
[#uses=1]
+ store 4 x float %tmp6, 4 x float* %F
+ ret void
+ }
+ 
+ void %test3(4 x float* %F, float* %f) {
+ entry:
+ %G = alloca 4 x float, align 16   ; 4 x float* 
[#uses=2]
+ %tmp = load 4 x float* %F ; 4 x float [#uses=2]
+ %tmp3 = add 4 x float %tmp, %tmp  ; 4 x float 
[#uses=1]
+ store 4 x float %tmp3, 4 x float* %G
+ %tmp = getelementptr 4 x float* %G, int 0, int 2  ; 
float* [#uses=1]
+ %tmp = load float* %tmp ; float [#uses=1]
+ store float %tmp, float* %f
+ ret void
+ }
+ 
+ void %test4(4 x float* %F, float* %f) {
+ entry:
+ %G = alloca 4 x float, align 16   ; 4 x float* 
[#uses=2]
+ %tmp = load 4 x float* %F ; 4 x float [#uses=2]
+ %tmp3 = add 4 x float %tmp, %tmp  ; 4 x float 
[#uses=1]
+ store 4 x float %tmp3, 4 x float* %G
+ %G = getelementptr 4 x float* %G, int 0, int 0; 
float* [#uses=1]
+ %tmp = load float* %G   ; float [#uses=1]
+ store float %tmp, float* %f
+ ret void
+ }
+ 



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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp

2006-04-14 Thread Chris Lattner


Changes in directory llvm/lib/Transforms/Scalar:

ScalarReplAggregates.cpp updated: 1.37 - 1.38
---
Log message:

Teach scalarrepl to promote unions of vectors and floats, producing 
insert/extractelement operations.  This implements 
Transforms/ScalarRepl/vector_promote.ll


---
Diffs of the changes:  (+101 -46)

 ScalarReplAggregates.cpp |  147 ---
 1 files changed, 101 insertions(+), 46 deletions(-)


Index: llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp
diff -u llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.37 
llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.38
--- llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp:1.37Tue Mar  7 
19:05:29 2006
+++ llvm/lib/Transforms/Scalar/ScalarReplAggregates.cpp Fri Apr 14 16:42:41 2006
@@ -415,16 +415,30 @@
 /// MergeInType - Add the 'In' type to the accumulated type so far.  If the
 /// types are incompatible, return true, otherwise update Accum and return
 /// false.
+///
+/// There are two cases we handle here:
+///   1) An effectively integer union, where the pieces are stored into as
+///  smaller integers (common with byte swap and other idioms).
+///   2) A union of a vector and its elements.  Here we turn element accesses
+///  into insert/extract element operations.
 static bool MergeInType(const Type *In, const Type *Accum) {
-  if (!In-isIntegral()) return true;
-  
   // If this is our first type, just use it.
-  if (Accum == Type::VoidTy) {
+  const PackedType *PTy;
+  if (Accum == Type::VoidTy || In == Accum) {
 Accum = In;
-  } else {
+  } else if (In-isIntegral()  Accum-isIntegral()) {   // integer union.
 // Otherwise pick whichever type is larger.
 if (In-getTypeID()  Accum-getTypeID())
   Accum = In;
+  } else if ((PTy = dyn_castPackedType(Accum))  
+ PTy-getElementType() == In) {
+// Accum is a vector, and we are accessing an element: ok.
+  } else if ((PTy = dyn_castPackedType(In))  
+ PTy-getElementType() == Accum) {
+// In is a vector, and accum is an element: ok, remember In.
+Accum = In;
+  } else {
+return true;
   }
   return false;
 }
@@ -462,7 +476,7 @@
   // Storing the pointer, not the into the value?
   if (SI-getOperand(0) == V) return 0;
   
-  // NOTE: We could handle storing of FP imms here!
+  // NOTE: We could handle storing of FP imms into integers here!
   
   if (MergeInType(SI-getOperand(0)-getType(), UsedType))
 return 0;
@@ -482,7 +496,7 @@
 IsNotTrivial = true;
 const Type *SubElt = CanConvertToScalar(GEP, IsNotTrivial);
 if (SubElt == 0) return 0;
-if (SubElt != Type::VoidTy) {
+if (SubElt != Type::VoidTy  SubElt-isInteger()) {
   const Type *NewTy = 
 getUIntAtLeastAsBitAs(SubElt-getPrimitiveSizeInBits()+BitOffset);
   if (NewTy == 0 || MergeInType(NewTy, UsedType)) return 0;
@@ -499,8 +513,23 @@
 
 if (const ArrayType *ATy = dyn_castArrayType(AggTy)) {
   if (Idx = ATy-getNumElements()) return 0;  // Out of range.
-} else if (const PackedType *PTy = dyn_castPackedType(AggTy)) {
-  if (Idx = PTy-getNumElements()) return 0;  // Out of range.
+} else if (const PackedType *PackedTy = dyn_castPackedType(AggTy)) {
+  // Getting an element of the packed vector.
+  if (Idx = PackedTy-getNumElements()) return 0;  // Out of range.
+
+  // Merge in the packed type.
+  if (MergeInType(PackedTy, UsedType)) return 0;
+  
+  const Type *SubTy = CanConvertToScalar(GEP, IsNotTrivial);
+  if (SubTy == 0) return 0;
+  
+  if (SubTy != Type::VoidTy  MergeInType(SubTy, UsedType))
+return 0;
+
+  // We'll need to change this to an insert/extract element operation.
+  IsNotTrivial = true;
+  continue;// Everything looks ok
+  
 } else if (isaStructType(AggTy)) {
   // Structs are always ok.
 } else {
@@ -537,31 +566,47 @@
  Not in the entry block!);
   EntryBlock-getInstList().remove(AI);  // Take the alloca out of the program.
   
+  if (ActualTy-isInteger())
+ActualTy = ActualTy-getUnsignedVersion();
+  
   // Create and insert the alloca.
-  AllocaInst *NewAI = new AllocaInst(ActualTy-getUnsignedVersion(), 0,
- AI-getName(), EntryBlock-begin());
+  AllocaInst *NewAI = new AllocaInst(ActualTy, 0, AI-getName(),
+ EntryBlock-begin());
   ConvertUsesToScalar(AI, NewAI, 0);
   delete AI;
 }
 
 
 /// ConvertUsesToScalar - Convert all of the users of Ptr to use the new alloca
-/// directly.  Offset is an offset from the original alloca, in bits that need
-/// to be shifted to the right.  By the end of this, there should be no uses of
-/// Ptr.
+/// directly.  This happens when we are converting an integer union to a
+/// single integer 

[llvm-commits] CVS: llvm/include/llvm/IntrinsicsX86.td

2006-04-14 Thread Evan Cheng


Changes in directory llvm/include/llvm:

IntrinsicsX86.td updated: 1.28 - 1.29
---
Log message:

Last few SSE3 intrinsics.


---
Diffs of the changes:  (+26 -0)

 IntrinsicsX86.td |   26 ++
 1 files changed, 26 insertions(+)


Index: llvm/include/llvm/IntrinsicsX86.td
diff -u llvm/include/llvm/IntrinsicsX86.td:1.28 
llvm/include/llvm/IntrinsicsX86.td:1.29
--- llvm/include/llvm/IntrinsicsX86.td:1.28 Fri Apr 14 02:43:12 2006
+++ llvm/include/llvm/IntrinsicsX86.td  Fri Apr 14 16:59:03 2006
@@ -466,6 +466,16 @@
 
//===--===//
 // SSE3
 
+// Addition / subtraction ops.
+let TargetPrefix = x86 in {  // All intrinsics start with llvm.x86..
+  def int_x86_sse3_addsub_ps : GCCBuiltin__builtin_ia32_addsubps,
+  Intrinsic[llvm_v4f32_ty, llvm_v4f32_ty,
+ llvm_v4f32_ty], [IntrNoMem];
+  def int_x86_sse3_addsub_pd : GCCBuiltin__builtin_ia32_addsubpd,
+  Intrinsic[llvm_v2f64_ty, llvm_v2f64_ty,
+ llvm_v2f64_ty], [IntrNoMem];
+}
+
 // Horizontal ops.
 let TargetPrefix = x86 in {  // All intrinsics start with llvm.x86..
   def int_x86_sse3_hadd_ps : GCCBuiltin__builtin_ia32_haddps,
@@ -481,3 +491,19 @@
   Intrinsic[llvm_v2f64_ty, llvm_v2f64_ty,
  llvm_v2f64_ty], [IntrNoMem];
 }
+
+// Specialized unaligned load.
+let TargetPrefix = x86 in {  // All intrinsics start with llvm.x86..
+  def int_x86_sse3_ldu_dq : GCCBuiltin__builtin_ia32_lddqu,
+  Intrinsic[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem];
+}
+
+// Thread synchronization ops.
+let TargetPrefix = x86 in {  // All intrinsics start with llvm.x86..
+  def int_x86_sse3_monitor : GCCBuiltin__builtin_ia32_monitor,
+  Intrinsic[llvm_void_ty, llvm_ptr_ty,
+ llvm_uint_ty, llvm_uint_ty], [IntrWriteMem];
+  def int_x86_sse3_mwait : GCCBuiltin__builtin_ia32_mwait,
+  Intrinsic[llvm_void_ty, llvm_uint_ty,
+ llvm_uint_ty], [IntrWriteMem];
+}



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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.h X86ISelLowering.cpp X86InstrSSE.td

2006-04-14 Thread Evan Cheng


Changes in directory llvm/lib/Target/X86:

X86ISelLowering.h updated: 1.54 - 1.55
X86ISelLowering.cpp updated: 1.165 - 1.166
X86InstrSSE.td updated: 1.89 - 1.90
---
Log message:

Last few SSE3 intrinsics.


---
Diffs of the changes:  (+189 -32)

 X86ISelLowering.cpp |   59 +++
 X86ISelLowering.h   |8 ++
 X86InstrSSE.td  |  154 +---
 3 files changed, 189 insertions(+), 32 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.54 
llvm/lib/Target/X86/X86ISelLowering.h:1.55
--- llvm/lib/Target/X86/X86ISelLowering.h:1.54  Mon Apr 10 19:19:04 2006
+++ llvm/lib/Target/X86/X86ISelLowering.h   Fri Apr 14 16:59:03 2006
@@ -237,6 +237,14 @@
/// specifies a shuffle of elements that is suitable for input to MOVS{S|D}.
bool isMOVSMask(SDNode *N);
 
+   /// isMOVSHDUPMask - Return true if the specified VECTOR_SHUFFLE operand
+   /// specifies a shuffle of elements that is suitable for input to MOVSHDUP.
+   bool isMOVSHDUPMask(SDNode *N);
+
+   /// isMOVSLDUPMask - Return true if the specified VECTOR_SHUFFLE operand
+   /// specifies a shuffle of elements that is suitable for input to MOVSLDUP.
+   bool isMOVSLDUPMask(SDNode *N);
+
/// isSplatMask - Return true if the specified VECTOR_SHUFFLE operand
/// specifies a splat of a single element.
bool isSplatMask(SDNode *N);


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.165 
llvm/lib/Target/X86/X86ISelLowering.cpp:1.166
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.165   Thu Apr 13 00:10:25 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Apr 14 16:59:03 2006
@@ -1715,6 +1715,58 @@
   return true;
 }
 
+/// isMOVSHDUPMask - Return true if the specified VECTOR_SHUFFLE operand
+/// specifies a shuffle of elements that is suitable for input to MOVSHDUP.
+bool X86::isMOVSHDUPMask(SDNode *N) {
+  assert(N-getOpcode() == ISD::BUILD_VECTOR);
+
+  if (N-getNumOperands() != 4)
+return false;
+
+  // Expect 1, 1, 3, 3
+  for (unsigned i = 0; i  2; ++i) {
+SDOperand Arg = N-getOperand(i);
+if (Arg.getOpcode() == ISD::UNDEF) continue;
+assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
+unsigned Val = castConstantSDNode(Arg)-getValue();
+if (Val != 1) return false;
+  }
+  for (unsigned i = 2; i  4; ++i) {
+SDOperand Arg = N-getOperand(i);
+if (Arg.getOpcode() == ISD::UNDEF) continue;
+assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
+unsigned Val = castConstantSDNode(Arg)-getValue();
+if (Val != 3) return false;
+  }
+  return true;
+}
+
+/// isMOVSLDUPMask - Return true if the specified VECTOR_SHUFFLE operand
+/// specifies a shuffle of elements that is suitable for input to MOVSLDUP.
+bool X86::isMOVSLDUPMask(SDNode *N) {
+  assert(N-getOpcode() == ISD::BUILD_VECTOR);
+
+  if (N-getNumOperands() != 4)
+return false;
+
+  // Expect 0, 0, 2, 2
+  for (unsigned i = 0; i  2; ++i) {
+SDOperand Arg = N-getOperand(i);
+if (Arg.getOpcode() == ISD::UNDEF) continue;
+assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
+unsigned Val = castConstantSDNode(Arg)-getValue();
+if (Val != 0) return false;
+  }
+  for (unsigned i = 2; i  4; ++i) {
+SDOperand Arg = N-getOperand(i);
+if (Arg.getOpcode() == ISD::UNDEF) continue;
+assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
+unsigned Val = castConstantSDNode(Arg)-getValue();
+if (Val != 2) return false;
+  }
+  return true;
+}
+
 /// isSplatMask - Return true if the specified VECTOR_SHUFFLE operand specifies
 /// a splat of a single element.
 bool X86::isSplatMask(SDNode *N) {
@@ -2710,8 +2762,9 @@
 if (NumElems == 2)
   return Op;
 
-if (X86::isMOVSMask(PermMask.Val))
-  // Leave the VECTOR_SHUFFLE alone. It matches MOVS{S|D}.
+if (X86::isMOVSMask(PermMask.Val) ||
+X86::isMOVSHDUPMask(PermMask.Val) ||
+X86::isMOVSLDUPMask(PermMask.Val))
   return Op;
 
 if (X86::isUNPCKLMask(PermMask.Val) ||
@@ -3143,6 +3196,8 @@
   return (Mask.Val-getNumOperands() == 2 ||
   X86::isSplatMask(Mask.Val)  ||
   X86::isMOVSMask(Mask.Val)   ||
+  X86::isMOVSHDUPMask(Mask.Val) ||
+  X86::isMOVSLDUPMask(Mask.Val) ||
   X86::isPSHUFDMask(Mask.Val) ||
   isPSHUFHW_PSHUFLWMask(Mask.Val) ||
   X86::isSHUFPMask(Mask.Val)  ||


Index: llvm/lib/Target/X86/X86InstrSSE.td
diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.89 
llvm/lib/Target/X86/X86InstrSSE.td:1.90
--- llvm/lib/Target/X86/X86InstrSSE.td:1.89 Fri Apr 14 02:43:12 2006
+++ llvm/lib/Target/X86/X86InstrSSE.td  Fri Apr 14 16:59:03 2006
@@ -88,6 +88,10 @@
   return X86::isSplatMask(N);
 }], SHUFFLE_get_shuf_imm;
 
+def SSE_splat_v2_mask : PatLeaf(build_vector), [{
+  return X86::isSplatMask(N);
+}];
+
 def MOVLHPS_shuffle_mask : PatLeaf(build_vector), [{
   return 

[llvm-commits] CVS: llvm/include/llvm/Instructions.h

2006-04-14 Thread Chris Lattner


Changes in directory llvm/include/llvm:

Instructions.h updated: 1.33 - 1.34
---
Log message:

These instructions always return a packed vector.  Improve the class 
definitions to expose this fact.


---
Diffs of the changes:  (+15 -14)

 Instructions.h |   29 +++--
 1 files changed, 15 insertions(+), 14 deletions(-)


Index: llvm/include/llvm/Instructions.h
diff -u llvm/include/llvm/Instructions.h:1.33 
llvm/include/llvm/Instructions.h:1.34
--- llvm/include/llvm/Instructions.h:1.33   Fri Apr  7 23:04:54 2006
+++ llvm/include/llvm/Instructions.hFri Apr 14 17:20:07 2006
@@ -24,6 +24,7 @@
 class BasicBlock;
 class ConstantInt;
 class PointerType;
+class PackedType;
 
 
//===--===//
 // AllocationInst Class
@@ -776,13 +777,7 @@
 ///
 class InsertElementInst : public Instruction {
   Use Ops[3];
-  InsertElementInst(const InsertElementInst IE) : 
-Instruction(IE.getType(), InsertElement, Ops, 3) {
-Ops[0].init(IE.Ops[0], this);
-Ops[1].init(IE.Ops[1], this);
-Ops[2].init(IE.Ops[2], this);
-  }
-
+  InsertElementInst(const InsertElementInst IE);
 public:
   InsertElementInst(Value *Vec, Value *NewElt, Value *Idx,
 const std::string Name = ,Instruction *InsertBefore = 
0);
@@ -798,6 +793,12 @@
 
   virtual bool mayWriteToMemory() const { return false; }
 
+  /// getType - Overload to return most specific packed type.
+  ///
+  inline const PackedType *getType() const {
+return reinterpret_castconst PackedType*(Instruction::getType());
+  }
+  
   /// Transparently provide more efficient getOperand methods.
   Value *getOperand(unsigned i) const {
 assert(i  3  getOperand() out of range!);
@@ -828,13 +829,7 @@
 ///
 class ShuffleVectorInst : public Instruction {
   Use Ops[3];
-  ShuffleVectorInst(const ShuffleVectorInst IE) : 
-Instruction(IE.getType(), ShuffleVector, Ops, 3) {
-  Ops[0].init(IE.Ops[0], this);
-  Ops[1].init(IE.Ops[1], this);
-  Ops[2].init(IE.Ops[2], this);
-}
-  
+  ShuffleVectorInst(const ShuffleVectorInst IE);  
 public:
   ShuffleVectorInst(Value *V1, Value *V2, Value *Mask,
 const std::string Name = , Instruction *InsertBefor = 
0);
@@ -850,6 +845,12 @@
   
   virtual bool mayWriteToMemory() const { return false; }
   
+  /// getType - Overload to return most specific packed type.
+  ///
+  inline const PackedType *getType() const {
+return reinterpret_castconst PackedType*(Instruction::getType());
+  }
+  
   /// Transparently provide more efficient getOperand methods.
   Value *getOperand(unsigned i) const {
 assert(i  3  getOperand() out of range!);



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[llvm-commits] CVS: llvm/lib/VMCore/Instructions.cpp

2006-04-14 Thread Chris Lattner


Changes in directory llvm/lib/VMCore:

Instructions.cpp updated: 1.34 - 1.35
---
Log message:

Move these ctors out of line


---
Diffs of the changes:  (+13 -0)

 Instructions.cpp |   13 +
 1 files changed, 13 insertions(+)


Index: llvm/lib/VMCore/Instructions.cpp
diff -u llvm/lib/VMCore/Instructions.cpp:1.34 
llvm/lib/VMCore/Instructions.cpp:1.35
--- llvm/lib/VMCore/Instructions.cpp:1.34   Fri Apr  7 23:05:48 2006
+++ llvm/lib/VMCore/Instructions.cppFri Apr 14 17:20:32 2006
@@ -833,6 +833,12 @@
 //   InsertElementInst Implementation
 
//===--===//
 
+InsertElementInst::InsertElementInst(const InsertElementInst IE)
+: Instruction(IE.getType(), InsertElement, Ops, 3) {
+  Ops[0].init(IE.Ops[0], this);
+  Ops[1].init(IE.Ops[1], this);
+  Ops[2].init(IE.Ops[2], this);
+}
 InsertElementInst::InsertElementInst(Value *Vec, Value *Elt, Value *Index,
  const std::string Name,
  Instruction *InsertBef)
@@ -874,6 +880,13 @@
 //  ShuffleVectorInst Implementation
 
//===--===//
 
+ShuffleVectorInst::ShuffleVectorInst(const ShuffleVectorInst SV) 
+: Instruction(SV.getType(), ShuffleVector, Ops, 3) {
+  Ops[0].init(SV.Ops[0], this);
+  Ops[1].init(SV.Ops[1], this);
+  Ops[2].init(SV.Ops[2], this);
+}
+
 ShuffleVectorInst::ShuffleVectorInst(Value *V1, Value *V2, Value *Mask,
  const std::string Name,
  Instruction *InsertBefore)



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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp

2006-04-14 Thread Chris Lattner


Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.150 - 1.151
---
Log message:

Allow undef in a shuffle mask


---
Diffs of the changes:  (+1 -0)

 PPCISelLowering.cpp |1 +
 1 files changed, 1 insertion(+)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.150 
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.151
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.150   Fri Apr 14 01:01:58 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Fri Apr 14 18:19:08 2006
@@ -416,6 +416,7 @@
   
   assert(isaConstantSDNode(Elt)  Invalid VECTOR_SHUFFLE mask!);
   for (unsigned i = EltSize, e = 16; i != e; i += EltSize) {
+if (N-getOperand(i).getOpcode() == ISD::UNDEF) continue;
 assert(isaConstantSDNode(N-getOperand(i)) 
Invalid VECTOR_SHUFFLE mask!);
 for (unsigned j = 0; j != EltSize; ++j)



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[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp

2006-04-14 Thread Evan Cheng


Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.166 - 1.167
---
Log message:

Do not use movs{h|l}dup for a shuffle with a single non-undef node.

---
Diffs of the changes:  (+14 -2)

 X86ISelLowering.cpp |   16 ++--
 1 files changed, 14 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.166 
llvm/lib/Target/X86/X86ISelLowering.cpp:1.167
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.166   Fri Apr 14 16:59:03 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Apr 14 22:13:24 2006
@@ -1724,12 +1724,14 @@
 return false;
 
   // Expect 1, 1, 3, 3
+  unsigned NumNodes = 0;
   for (unsigned i = 0; i  2; ++i) {
 SDOperand Arg = N-getOperand(i);
 if (Arg.getOpcode() == ISD::UNDEF) continue;
 assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
 unsigned Val = castConstantSDNode(Arg)-getValue();
 if (Val != 1) return false;
+NumNodes++;
   }
   for (unsigned i = 2; i  4; ++i) {
 SDOperand Arg = N-getOperand(i);
@@ -1737,8 +1739,12 @@
 assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
 unsigned Val = castConstantSDNode(Arg)-getValue();
 if (Val != 3) return false;
+NumNodes++;
   }
-  return true;
+
+  // Don't use movshdup if the resulting vector contains only one undef node.
+  // Use {p}shuf* instead.
+  return NumNodes  1;
 }
 
 /// isMOVSLDUPMask - Return true if the specified VECTOR_SHUFFLE operand
@@ -1750,12 +1756,14 @@
 return false;
 
   // Expect 0, 0, 2, 2
+  unsigned NumNodes = 0;
   for (unsigned i = 0; i  2; ++i) {
 SDOperand Arg = N-getOperand(i);
 if (Arg.getOpcode() == ISD::UNDEF) continue;
 assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
 unsigned Val = castConstantSDNode(Arg)-getValue();
 if (Val != 0) return false;
+NumNodes++;
   }
   for (unsigned i = 2; i  4; ++i) {
 SDOperand Arg = N-getOperand(i);
@@ -1763,8 +1771,12 @@
 assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
 unsigned Val = castConstantSDNode(Arg)-getValue();
 if (Val != 2) return false;
+NumNodes++;
   }
-  return true;
+
+  // Don't use movsldup if the resulting vector contains only one undef node.
+  // Use {p}shuf* instead.
+  return NumNodes  1;
 }
 
 /// isSplatMask - Return true if the specified VECTOR_SHUFFLE operand specifies



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[llvm-commits] CVS: llvm/lib/Target/X86/README.txt X86ISelLowering.cpp X86InstrSSE.td

2006-04-14 Thread Evan Cheng


Changes in directory llvm/lib/Target/X86:

README.txt updated: 1.88 - 1.89
X86ISelLowering.cpp updated: 1.167 - 1.168
X86InstrSSE.td updated: 1.91 - 1.92
---
Log message:

Silly bug

---
Diffs of the changes:  (+11 -18)

 README.txt  |5 -
 X86ISelLowering.cpp |   22 ++
 X86InstrSSE.td  |2 +-
 3 files changed, 11 insertions(+), 18 deletions(-)


Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.88 llvm/lib/Target/X86/README.txt:1.89
--- llvm/lib/Target/X86/README.txt:1.88 Fri Apr 14 02:24:04 2006
+++ llvm/lib/Target/X86/README.txt  Sat Apr 15 00:37:34 2006
@@ -810,8 +810,3 @@
 How about andps, andpd, and pand? Do we really care about the type of the 
packed
 elements? If not, why not always use the ps variants which are likely to be
 shorter.
-
-//===-===//
-
-Make sure XMM registers are spilled to 128-bit locations (if not already) and
-add vector SSE opcodes to X86RegisterInfo::foldMemoryOperand().


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.167 
llvm/lib/Target/X86/X86ISelLowering.cpp:1.168
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.167   Fri Apr 14 22:13:24 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Sat Apr 15 00:37:34 2006
@@ -1724,27 +1724,26 @@
 return false;
 
   // Expect 1, 1, 3, 3
-  unsigned NumNodes = 0;
   for (unsigned i = 0; i  2; ++i) {
 SDOperand Arg = N-getOperand(i);
 if (Arg.getOpcode() == ISD::UNDEF) continue;
 assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
 unsigned Val = castConstantSDNode(Arg)-getValue();
 if (Val != 1) return false;
-NumNodes++;
   }
+
+  bool HasHi = false;
   for (unsigned i = 2; i  4; ++i) {
 SDOperand Arg = N-getOperand(i);
 if (Arg.getOpcode() == ISD::UNDEF) continue;
 assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
 unsigned Val = castConstantSDNode(Arg)-getValue();
 if (Val != 3) return false;
-NumNodes++;
+HasHi = true;
   }
 
-  // Don't use movshdup if the resulting vector contains only one undef node.
-  // Use {p}shuf* instead.
-  return NumNodes  1;
+  // Don't use movshdup if it can be done with a shufps.
+  return HasHi;
 }
 
 /// isMOVSLDUPMask - Return true if the specified VECTOR_SHUFFLE operand
@@ -1756,27 +1755,26 @@
 return false;
 
   // Expect 0, 0, 2, 2
-  unsigned NumNodes = 0;
   for (unsigned i = 0; i  2; ++i) {
 SDOperand Arg = N-getOperand(i);
 if (Arg.getOpcode() == ISD::UNDEF) continue;
 assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
 unsigned Val = castConstantSDNode(Arg)-getValue();
 if (Val != 0) return false;
-NumNodes++;
   }
+
+  bool HasHi = false;
   for (unsigned i = 2; i  4; ++i) {
 SDOperand Arg = N-getOperand(i);
 if (Arg.getOpcode() == ISD::UNDEF) continue;
 assert(isaConstantSDNode(Arg)  Invalid VECTOR_SHUFFLE mask!);
 unsigned Val = castConstantSDNode(Arg)-getValue();
 if (Val != 2) return false;
-NumNodes++;
+HasHi = true;
   }
 
-  // Don't use movsldup if the resulting vector contains only one undef node.
-  // Use {p}shuf* instead.
-  return NumNodes  1;
+  // Don't use movshdup if it can be done with a shufps.
+  return HasHi;
 }
 
 /// isSplatMask - Return true if the specified VECTOR_SHUFFLE operand specifies


Index: llvm/lib/Target/X86/X86InstrSSE.td
diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.91 
llvm/lib/Target/X86/X86InstrSSE.td:1.92
--- llvm/lib/Target/X86/X86InstrSSE.td:1.91 Fri Apr 14 18:32:40 2006
+++ llvm/lib/Target/X86/X86InstrSSE.td  Sat Apr 15 00:37:34 2006
@@ -169,7 +169,7 @@
 // PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes.
 // S3I - SSE3 instructions with TB and OpSize prefixes.
 // S3SI - SSE3 instructions with XS prefix.
-// S3SI - SSE3 instructions with XD prefix.
+// S3DI - SSE3 instructions with XD prefix.
 class SSIbits8 o, Format F, dag ops, string asm, listdag pattern
   : Io, F, ops, asm, pattern, XS, Requires[HasSSE1];
 class SDIbits8 o, Format F, dag ops, string asm, listdag pattern



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[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrSSE.td

2006-04-14 Thread Evan Cheng


Changes in directory llvm/lib/Target/X86:

X86InstrSSE.td updated: 1.92 - 1.93
---
Log message:

hsubp{s|d} encoding bug

---
Diffs of the changes:  (+4 -4)

 X86InstrSSE.td |8 
 1 files changed, 4 insertions(+), 4 deletions(-)


Index: llvm/lib/Target/X86/X86InstrSSE.td
diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.92 
llvm/lib/Target/X86/X86InstrSSE.td:1.93
--- llvm/lib/Target/X86/X86InstrSSE.td:1.92 Sat Apr 15 00:37:34 2006
+++ llvm/lib/Target/X86/X86InstrSSE.td  Sat Apr 15 00:52:42 2006
@@ -1305,13 +1305,13 @@
   int_x86_sse3_hadd_pd;
 def HADDPDrm : S3_Intrm0x7C, haddpd {$src2, $dst|$dst, $src2},
   int_x86_sse3_hadd_pd;
-def HSUBPSrr : S3D_Intrr0x7C, hsubps {$src2, $dst|$dst, $src2},
+def HSUBPSrr : S3D_Intrr0x7D, hsubps {$src2, $dst|$dst, $src2},
   int_x86_sse3_hsub_ps;
-def HSUBPSrm : S3D_Intrm0x7C, hsubps {$src2, $dst|$dst, $src2},
+def HSUBPSrm : S3D_Intrm0x7D, hsubps {$src2, $dst|$dst, $src2},
   int_x86_sse3_hsub_ps;
-def HSUBPDrr : S3_Intrr0x7C, hsubpd {$src2, $dst|$dst, $src2},
+def HSUBPDrr : S3_Intrr0x7D, hsubpd {$src2, $dst|$dst, $src2},
   int_x86_sse3_hsub_pd;
-def HSUBPDrm : S3_Intrm0x7C, hsubpd {$src2, $dst|$dst, $src2},
+def HSUBPDrm : S3_Intrm0x7D, hsubpd {$src2, $dst|$dst, $src2},
   int_x86_sse3_hsub_pd;
 }
 



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