[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.247 - 1.248 --- Log message: When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle. --- Diffs of the changes: (+16 -7) DAGCombiner.cpp | 23 --- 1 files changed, 16 insertions(+), 7 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.247 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.248 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.247 Thu Nov 9 13:10:46 2006 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Nov 10 02:28:11 2006 @@ -214,11 +214,20 @@ ISD::MemIndexedMode AM = ISD::UNINDEXED; if (TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG)) { // Try turning it into a pre-indexed load / store except when - // 1) Another use of base ptr is a predecessor of N. If ptr is folded + // 1) If N is a store and the ptr is either the same as or is a + //predecessor of the value being stored. + // 2) Another use of base ptr is a predecessor of N. If ptr is folded //that would create a cycle. - // 2) All uses are load / store ops that use it as base ptr. + // 3) All uses are load / store ops that use it as base ptr. - // Now check for #1 and #2. + // Checking #1. + if (!isLoad) { +SDOperand Val = castStoreSDNode(N)-getValue(); +if (Val == Ptr || Ptr.Val-isPredecessor(Val.Val)) + return false; + } + + // Now check for #2 and #3. bool RealUse = false; for (SDNode::use_iterator I = Ptr.Val-use_begin(), E = Ptr.Val-use_end(); I != E; ++I) { @@ -323,12 +332,12 @@ continue; // Try turning it into a post-indexed load / store except when -// 1) Op must be independent of N, i.e. Op is neither a predecessor +// 1) All uses are load / store ops that use it as base ptr. +// 2) Op must be independent of N, i.e. Op is neither a predecessor //nor a successor of N. Otherwise, if Op is folded that would //create a cycle. -// 2) All uses are load / store ops that use it as base ptr. -// Check for #3. +// Check for #1. bool TryNext = false; for (SDNode::use_iterator II = BasePtr.Val-use_begin(), EE = BasePtr.Val-use_end(); II != EE; ++II) { @@ -359,7 +368,7 @@ if (TryNext) continue; -// Check for #1 +// Check for #2 if (!Op-isPredecessor(N) !N-isPredecessor(Op)) { SDOperand Result = isLoad ? DAG.getIndexedLoad(SDOperand(N,0), BasePtr, Offset, AM) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.192 - 1.193 MachineInstrBuilder.h updated: 1.37 - 1.38 --- Log message: Add implicit def / use operands to MachineInstr. --- Diffs of the changes: (+20 -6) MachineInstr.h| 21 + MachineInstrBuilder.h |5 +++-- 2 files changed, 20 insertions(+), 6 deletions(-) Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.192 llvm/include/llvm/CodeGen/MachineInstr.h:1.193 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.192 Sat Oct 28 13:18:36 2006 +++ llvm/include/llvm/CodeGen/MachineInstr.hFri Nov 10 02:32:14 2006 @@ -60,6 +60,7 @@ MachineOperandType opType:8; // Discriminate the union. bool IsDef : 1; // True if this is a def, false if this is a use. + bool IsImp : 1; // True if this is an implicit def or use. /// offset - Offset to address of global or external, only valid for /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex @@ -78,6 +79,7 @@ Op.opType = MachineOperand::MO_Immediate; Op.contents.immedVal = Val; Op.IsDef = false; +Op.IsImp = false; Op.offset = 0; return Op; } @@ -85,6 +87,7 @@ const MachineOperand operator=(const MachineOperand MO) { contents = MO.contents; IsDef= MO.IsDef; +IsImp= MO.IsImp; opType = MO.opType; offset = MO.offset; return *this; @@ -173,6 +176,15 @@ IsDef = true; } + bool isImplicit() const { +assert(isRegister() Wrong MachineOperand accessor); +return IsImp; + } + bool setImplicit() { +assert(isRegister() Wrong MachineOperand accessor); +IsImp = true; + } + /// getReg - Returns the register number. /// unsigned getReg() const { @@ -330,10 +342,11 @@ /// addRegOperand - Add a register operand. /// - void addRegOperand(unsigned Reg, bool IsDef) { -MachineOperand Op = AddNewOperand(); + void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false) { +MachineOperand Op = AddNewOperand(IsImp); Op.opType = MachineOperand::MO_Register; Op.IsDef = IsDef; +Op.IsImp = IsImp; Op.contents.RegNo = Reg; Op.offset = 0; } @@ -415,8 +428,8 @@ Operands.erase(Operands.begin()+i); } private: - MachineOperand AddNewOperand() { -assert(!OperandsComplete() + MachineOperand AddNewOperand(bool IsImp = false) { +assert((IsImp || !OperandsComplete()) Trying to add an operand to a machine instr that is already done!); Operands.push_back(MachineOperand()); return Operands.back(); Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.37 llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.38 --- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.37Mon Sep 4 21:31:13 2006 +++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Fri Nov 10 02:32:14 2006 @@ -33,8 +33,9 @@ /// addReg - Add a new virtual register operand... /// - const MachineInstrBuilder addReg(int RegNo, bool isDef = false) const { -MI-addRegOperand(RegNo, isDef); + const MachineInstrBuilder addReg(int RegNo, bool isDef = false, +bool isImp = false) const { +MI-addRegOperand(RegNo, isDef, isImp); return *this; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: ScheduleDAG.cpp updated: 1.106 - 1.107 --- Log message: Add implicit def / use operands to MachineInstr. --- Diffs of the changes: (+12 -0) ScheduleDAG.cpp | 12 1 files changed, 12 insertions(+) Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.106 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.107 --- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.106 Sat Nov 4 03:44:31 2006 +++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Fri Nov 10 02:38:20 2006 @@ -441,6 +441,18 @@ } } +// Emit implicit def / use operands. +if (II.ImplicitDefs) { + for (const unsigned *ImplicitDefs = II.ImplicitDefs; + *ImplicitDefs; ++ImplicitDefs) +MI-addRegOperand(*ImplicitDefs, true, true); +} +if (II.ImplicitUses) { + for (const unsigned *ImplicitUses = II.ImplicitUses; + *ImplicitUses; ++ImplicitUses) +MI-addRegOperand(*ImplicitUses, false, true); +} + // Now that we have emitted all operands, emit this instruction itself. if ((II.Flags M_USES_CUSTOM_DAG_SCHED_INSERTION) == 0) { BB-insert(BB-end(), MI); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp LiveVariables.cpp MachineInstr.cpp RegAllocLocal.cpp
Changes in directory llvm/lib/CodeGen: LiveIntervalAnalysis.cpp updated: 1.193 - 1.194 LiveVariables.cpp updated: 1.61 - 1.62 MachineInstr.cpp updated: 1.127 - 1.128 RegAllocLocal.cpp updated: 1.93 - 1.94 --- Log message: Add implicit def / use operands to MachineInstr. --- Diffs of the changes: (+11 -29) LiveIntervalAnalysis.cpp |9 + LiveVariables.cpp| 19 ++- MachineInstr.cpp |8 ++-- RegAllocLocal.cpp|4 ++-- 4 files changed, 11 insertions(+), 29 deletions(-) Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.193 llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.194 --- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.193 Wed Nov 8 13:16:43 2006 +++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp Fri Nov 10 02:38:19 2006 @@ -658,16 +658,9 @@ } for (; MI != miEnd; ++MI) { - const TargetInstrDescriptor TID = tii_-get(MI-getOpcode()); DEBUG(std::cerr MIIndex \t *MI); - - // Handle implicit defs. - if (TID.ImplicitDefs) { -for (const unsigned *ImpDef = TID.ImplicitDefs; *ImpDef; ++ImpDef) - handleRegisterDef(MBB, MI, MIIndex, *ImpDef); - } - // Handle explicit defs. + // Handle defs. for (int i = MI-getNumOperands() - 1; i = 0; --i) { MachineOperand MO = MI-getOperand(i); // handle register defs - build intervals Index: llvm/lib/CodeGen/LiveVariables.cpp diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.61 llvm/lib/CodeGen/LiveVariables.cpp:1.62 --- llvm/lib/CodeGen/LiveVariables.cpp:1.61 Thu Nov 2 14:25:49 2006 +++ llvm/lib/CodeGen/LiveVariables.cpp Fri Nov 10 02:38:19 2006 @@ -228,7 +228,6 @@ for (MachineBasicBlock::iterator I = MBB-begin(), E = MBB-end(); I != E; ++I) { MachineInstr *MI = I; - const TargetInstrDescriptor MID = TII.get(MI-getOpcode()); // Process all of the operands of the instruction... unsigned NumOperandsToProcess = MI-getNumOperands(); @@ -238,14 +237,7 @@ if (MI-getOpcode() == TargetInstrInfo::PHI) NumOperandsToProcess = 1; - // Loop over implicit uses, using them. - if (MID.ImplicitUses) { -for (const unsigned *ImplicitUses = MID.ImplicitUses; - *ImplicitUses; ++ImplicitUses) - HandlePhysRegUse(*ImplicitUses, MI); - } - - // Process all explicit uses... + // Process all uses... for (unsigned i = 0; i != NumOperandsToProcess; ++i) { MachineOperand MO = MI-getOperand(i); if (MO.isRegister() MO.isUse() MO.getReg()) { @@ -258,14 +250,7 @@ } } - // Loop over implicit defs, defining them. - if (MID.ImplicitDefs) { -for (const unsigned *ImplicitDefs = MID.ImplicitDefs; - *ImplicitDefs; ++ImplicitDefs) - HandlePhysRegDef(*ImplicitDefs, MI); - } - - // Process all explicit defs... + // Process all defs... for (unsigned i = 0; i != NumOperandsToProcess; ++i) { MachineOperand MO = MI-getOperand(i); if (MO.isRegister() MO.isDef() MO.getReg()) { Index: llvm/lib/CodeGen/MachineInstr.cpp diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.127 llvm/lib/CodeGen/MachineInstr.cpp:1.128 --- llvm/lib/CodeGen/MachineInstr.cpp:1.127 Wed Oct 25 13:08:14 2006 +++ llvm/lib/CodeGen/MachineInstr.cpp Fri Nov 10 02:38:19 2006 @@ -205,8 +205,12 @@ OS ; ::print(mop, OS, TM); -if (mop.isReg() mop.isDef()) - OS def; +if (mop.isReg()) { + if (mop.isImplicit()) +OS (mop.isDef() ? imp-def : imp-use); + else if (mop.isDef()) +OS def; +} } OS \n; Index: llvm/lib/CodeGen/RegAllocLocal.cpp diff -u llvm/lib/CodeGen/RegAllocLocal.cpp:1.93 llvm/lib/CodeGen/RegAllocLocal.cpp:1.94 --- llvm/lib/CodeGen/RegAllocLocal.cpp:1.93 Tue Sep 19 13:02:01 2006 +++ llvm/lib/CodeGen/RegAllocLocal.cpp Fri Nov 10 02:38:19 2006 @@ -561,7 +561,7 @@ for (unsigned i = 0; i != MI-getNumOperands(); ++i) { MachineOperand MO = MI-getOperand(i); // here we are looking for only used operands (never defuse) - if (MO.isRegister() !MO.isDef() MO.getReg() + if (MO.isRegister() !MO.isDef() !MO.isImplicit() MO.getReg() MRegisterInfo::isVirtualRegister(MO.getReg())) MI = reloadVirtReg(MBB, MI, i); } @@ -596,7 +596,7 @@ // are defined, and marking explicit destinations in the PhysRegsUsed map. for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) { MachineOperand MO = MI-getOperand(i); - if (MO.isRegister() MO.isDef() MO.getReg() + if (MO.isRegister() MO.isDef() !MO.isImplicit() MO.getReg() MRegisterInfo::isPhysicalRegister(MO.getReg())) { unsigned Reg = MO.getReg(); if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP. ___ llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp
Changes in directory llvm/lib/Target/X86: X86RegisterInfo.cpp updated: 1.174 - 1.175 --- Log message: Add implicit def / use operands to MachineInstr. --- Diffs of the changes: (+1 -1) X86RegisterInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/X86/X86RegisterInfo.cpp diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.174 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.175 --- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.174 Thu Nov 9 19:28:43 2006 +++ llvm/lib/Target/X86/X86RegisterInfo.cpp Fri Nov 10 02:43:01 2006 @@ -196,7 +196,7 @@ assert(MO.isReg() Expected to fold into reg operand!); MIB = addFrameReference(MIB, FrameIndex); } else if (MO.isReg()) - MIB = MIB.addReg(MO.getReg(), MO.isDef()); + MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit()); else if (MO.isImm()) MIB = MIB.addImm(MO.getImm()); else if (MO.isGlobalAddress()) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.193 - 1.194 --- Log message: Shut up the warning. --- Diffs of the changes: (+1 -1) MachineInstr.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.193 llvm/include/llvm/CodeGen/MachineInstr.h:1.194 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.193 Fri Nov 10 02:32:14 2006 +++ llvm/include/llvm/CodeGen/MachineInstr.hFri Nov 10 08:44:12 2006 @@ -180,7 +180,7 @@ assert(isRegister() Wrong MachineOperand accessor); return IsImp; } - bool setImplicit() { + void setImplicit() { assert(isRegister() Wrong MachineOperand accessor); IsImp = true; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp
Changes in directory llvm/test/Regression/DebugInfo: 2006-11-06-StackTrace.cpp updated: 1.4 - 1.5 --- Log message: This is XFAILed on i[0-9]86 systems not Linux --- Diffs of the changes: (+1 -1) 2006-11-06-StackTrace.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp diff -u llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp:1.4 llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp:1.5 --- llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp:1.4Wed Nov 8 10:38:45 2006 +++ llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cppFri Nov 10 11:47:28 2006 @@ -6,7 +6,7 @@ // RUN: ( echo break DeepStack::deepest; echo run 17 ; echo where ) Output/StackTrace.gdbin // RUN: gdb -q -batch -n -x Output/StackTrace.gdbin Output/StackTrace.exe | tee Output/StackTrace.out | grep '#0 DeepStack::deepest.*(this=.*,.*x=33)' // RUN: gdb -q -batch -n -x Output/StackTrace.gdbin Output/StackTrace.exe | grep '#7 0x.* in main.*(argc=[12],.*argv=.*)' -// XFAIL: linux +// XFAIL: i[0-9]86 #include stdlib.h ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrFormats.td PPCInstrInfo.td
Changes in directory llvm/lib/Target/PowerPC: PPCInstrFormats.td updated: 1.81 - 1.82 PPCInstrInfo.td updated: 1.255 - 1.256 --- Log message: dform 8/9 are identical to dform 1 --- Diffs of the changes: (+6 -15) PPCInstrFormats.td |9 - PPCInstrInfo.td| 12 ++-- 2 files changed, 6 insertions(+), 15 deletions(-) Index: llvm/lib/Target/PowerPC/PPCInstrFormats.td diff -u llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.81 llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.82 --- llvm/lib/Target/PowerPC/PPCInstrFormats.td:1.81 Mon Nov 6 19:51:50 2006 +++ llvm/lib/Target/PowerPC/PPCInstrFormats.td Fri Nov 10 11:51:02 2006 @@ -174,15 +174,6 @@ let L = PPC64; } -class DForm_8bits6 opcode, dag OL, string asmstr, InstrItinClass itin, - listdag pattern - : DForm_1opcode, OL, asmstr, itin, pattern { -} - -class DForm_9bits6 opcode, dag OL, string asmstr, InstrItinClass itin, - listdag pattern - : DForm_1opcode, OL, asmstr, itin, pattern { -} // 1.7.5 DS-Form class DSForm_1bits6 opcode, bits2 xo, dag OL, string asmstr, Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.255 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.256 --- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.255 Thu Nov 9 20:08:47 2006 +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td Fri Nov 10 11:51:02 2006 @@ -422,10 +422,10 @@ lwz $rD, $src, LdStGeneral, [(set GPRC:$rD, (load iaddr:$src))]; -def LFS : DForm_848, (ops F4RC:$rD, memri:$src), +def LFS : DForm_148, (ops F4RC:$rD, memri:$src), lfs $rD, $src, LdStLFDU, [(set F4RC:$rD, (load iaddr:$src))]; -def LFD : DForm_850, (ops F8RC:$rD, memri:$src), +def LFD : DForm_150, (ops F8RC:$rD, memri:$src), lfd $rD, $src, LdStLFD, [(set F8RC:$rD, (load iaddr:$src))]; @@ -452,11 +452,11 @@ lwzu $rD, $disp($rA), LdStGeneral, [], RegConstraint$rA = $rA_result; -def LFSU : DForm_849, (ops F4RC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LFSU : DForm_149, (ops F4RC:$rD, ptr_rc:$rA_result, i32imm:$disp, ptr_rc:$rA), lfs $rD, $disp($rA), LdStLFDU, [], RegConstraint$rA = $rA_result; -def LFDU : DForm_851, (ops F8RC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LFDU : DForm_151, (ops F8RC:$rD, ptr_rc:$rA_result, i32imm:$disp, ptr_rc:$rA), lfd $rD, $disp($rA), LdStLFD, [], RegConstraint$rA = $rA_result; @@ -537,10 +537,10 @@ cmplwi $dst, $src1, $src2, IntCompare; } let isStore = 1, noResults = 1, PPC970_Unit = 2 in { -def STFS : DForm_952, (ops F4RC:$rS, memri:$dst), +def STFS : DForm_152, (ops F4RC:$rS, memri:$dst), stfs $rS, $dst, LdStUX, [(store F4RC:$rS, iaddr:$dst)]; -def STFD : DForm_954, (ops F8RC:$rS, memri:$dst), +def STFD : DForm_154, (ops F8RC:$rS, memri:$dst), stfd $rS, $dst, LdStUX, [(store F8RC:$rS, iaddr:$dst)]; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp
Changes in directory llvm/test/Regression/DebugInfo: 2006-11-06-StackTrace.cpp updated: 1.5 - 1.6 --- Log message: Must have a frame pointer. --- Diffs of the changes: (+1 -2) 2006-11-06-StackTrace.cpp |3 +-- 1 files changed, 1 insertion(+), 2 deletions(-) Index: llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp diff -u llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp:1.5 llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp:1.6 --- llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp:1.5Fri Nov 10 11:47:28 2006 +++ llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cppFri Nov 10 11:51:25 2006 @@ -1,6 +1,6 @@ // This is a regression test on debug info to make sure that we can get a // meaningful stack trace from a C++ program. -// RUN: %llvmgcc -S -O0 -g %s -o - | llvm-as | llc -o Output/StackTrace.s -f +// RUN: %llvmgcc -S -O0 -g %s -o - | llvm-as | --disable-fp-elim llc -o Output/StackTrace.s -f // RUN: as Output/StackTrace.s -o Output/StackTrace.o // RUN: g++ Output/StackTrace.o -o Output/StackTrace.exe // RUN: ( echo break DeepStack::deepest; echo run 17 ; echo where ) Output/StackTrace.gdbin @@ -8,7 +8,6 @@ // RUN: gdb -q -batch -n -x Output/StackTrace.gdbin Output/StackTrace.exe | grep '#7 0x.* in main.*(argc=[12],.*argv=.*)' // XFAIL: i[0-9]86 - #include stdlib.h class DeepStack { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp
Changes in directory llvm/test/Regression/DebugInfo: 2006-11-06-StackTrace.cpp updated: 1.6 - 1.7 --- Log message: Must have a frame pointer argument fixed. Now fails on PowerPC. --- Diffs of the changes: (+2 -2) 2006-11-06-StackTrace.cpp |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp diff -u llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp:1.6 llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp:1.7 --- llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cpp:1.6Fri Nov 10 11:51:25 2006 +++ llvm/test/Regression/DebugInfo/2006-11-06-StackTrace.cppFri Nov 10 11:56:29 2006 @@ -1,12 +1,12 @@ // This is a regression test on debug info to make sure that we can get a // meaningful stack trace from a C++ program. -// RUN: %llvmgcc -S -O0 -g %s -o - | llvm-as | --disable-fp-elim llc -o Output/StackTrace.s -f +// RUN: %llvmgcc -S -O0 -g %s -o - | llvm-as | llc --disable-fp-elim -o Output/StackTrace.s -f // RUN: as Output/StackTrace.s -o Output/StackTrace.o // RUN: g++ Output/StackTrace.o -o Output/StackTrace.exe // RUN: ( echo break DeepStack::deepest; echo run 17 ; echo where ) Output/StackTrace.gdbin // RUN: gdb -q -batch -n -x Output/StackTrace.gdbin Output/StackTrace.exe | tee Output/StackTrace.out | grep '#0 DeepStack::deepest.*(this=.*,.*x=33)' // RUN: gdb -q -batch -n -x Output/StackTrace.gdbin Output/StackTrace.exe | grep '#7 0x.* in main.*(argc=[12],.*argv=.*)' -// XFAIL: i[0-9]86 +// XFAIL: * #include stdlib.h ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/SingleSource/CustomChecked/Makefile
Changes in directory llvm-test/SingleSource/CustomChecked: Makefile updated: 1.12 - 1.13 --- Log message: Let these link --- Diffs of the changes: (+1 -1) Makefile |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/SingleSource/CustomChecked/Makefile diff -u llvm-test/SingleSource/CustomChecked/Makefile:1.12 llvm-test/SingleSource/CustomChecked/Makefile:1.13 --- llvm-test/SingleSource/CustomChecked/Makefile:1.12 Wed Sep 1 09:33:26 2004 +++ llvm-test/SingleSource/CustomChecked/Makefile Fri Nov 10 13:40:33 2006 @@ -7,7 +7,7 @@ include $(LEVEL)/SingleSource/Makefile.singlesrc LIBS += -lstdc++ -LDFLAGS += -lm +LDFLAGS += -lstdc++ -lm LLI_RUN := $(addsuffix .run-lli, $(PREFIXED_PROGRAMS_TO_TEST)) JIT_RUN := $(addsuffix .run-jit, $(PREFIXED_PROGRAMS_TO_TEST)) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.10 - 1.11 --- Log message: s/PassManagerAnalysisHelper/CommonPassManagerImpl Inherit CommonPassManagerImpl from Pass. --- Diffs of the changes: (+10 -14) PassManager.cpp | 24 ++-- 1 files changed, 10 insertions(+), 14 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.10 llvm/lib/VMCore/PassManager.cpp:1.11 --- llvm/lib/VMCore/PassManager.cpp:1.10Wed Nov 8 04:44:40 2006 +++ llvm/lib/VMCore/PassManager.cpp Fri Nov 10 15:33:13 2006 @@ -22,8 +22,7 @@ /// BasicBlockPassManager_New manages BasicBlockPass. It batches all the /// pass together and sequence them to process one basic block before /// processing next basic block. -class BasicBlockPassManager_New : public Pass, - public PassManagerAnalysisHelper { +class BasicBlockPassManager_New : public CommonPassManagerImpl { public: BasicBlockPassManager_New() { } @@ -44,8 +43,7 @@ /// It batches all function passes and basic block pass managers together and /// sequence them to process one function at a time before processing next /// function. -class FunctionPassManagerImpl_New : public Pass, -public PassManagerAnalysisHelper { +class FunctionPassManagerImpl_New : public CommonPassManagerImpl { public: FunctionPassManagerImpl_New(ModuleProvider *P) { /* TODO */ } FunctionPassManagerImpl_New() { @@ -79,8 +77,7 @@ /// ModulePassManager_New manages ModulePasses and function pass managers. /// It batches all Module passes passes and function pass managers together and /// sequence them to process one module. -class ModulePassManager_New : public Pass, - public PassManagerAnalysisHelper { +class ModulePassManager_New : public CommonPassManagerImpl { public: ModulePassManager_New() { activeFunctionPassManager = NULL; } @@ -101,8 +98,7 @@ }; /// PassManager_New manages ModulePassManagers -class PassManagerImpl_New : public Pass, -public PassManagerAnalysisHelper { +class PassManagerImpl_New : public CommonPassManagerImpl { public: @@ -137,11 +133,11 @@ } // End of llvm namespace -// PassManagerAnalysisHelper implementation +// CommonPassManagerImpl implementation /// Return true IFF pass P's required analysis set does not required new /// manager. -bool PassManagerAnalysisHelper::manageablePass(Pass *P) { +bool CommonPassManagerImpl::manageablePass(Pass *P) { AnalysisUsage AnUsage; P-getAnalysisUsage(AnUsage); @@ -153,26 +149,26 @@ } /// Return true IFF AnalysisID AID is currently available. -bool PassManagerAnalysisHelper::analysisCurrentlyAvailable(AnalysisID AID) { +bool CommonPassManagerImpl::analysisCurrentlyAvailable(AnalysisID AID) { // TODO return false; } /// Augment RequiredSet by adding analysis required by pass P. -void PassManagerAnalysisHelper::noteDownRequiredAnalysis(Pass *P) { +void CommonPassManagerImpl::noteDownRequiredAnalysis(Pass *P) { // TODO } /// Remove AnalysisID from the RequiredSet -void PassManagerAnalysisHelper::removeAnalysis(AnalysisID AID) { +void CommonPassManagerImpl::removeAnalysis(AnalysisID AID) { // TODO } /// Remove Analyss not preserved by Pass P -void PassManagerAnalysisHelper::removeNotPreservedAnalysis(Pass *P) { +void CommonPassManagerImpl::removeNotPreservedAnalysis(Pass *P) { // TODO } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Regression/CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll
Changes in directory llvm/test/Regression/CodeGen/Generic: 2006-11-10-DAGCombineMiscompile.ll added (r1.1) --- Log message: new testcase --- Diffs of the changes: (+14 -0) 2006-11-10-DAGCombineMiscompile.ll | 14 ++ 1 files changed, 14 insertions(+) Index: llvm/test/Regression/CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll diff -c /dev/null llvm/test/Regression/CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll:1.1 *** /dev/null Fri Nov 10 15:36:17 2006 --- llvm/test/Regression/CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll Fri Nov 10 15:36:07 2006 *** *** 0 --- 1,14 + ; RUN: llvm-as %s | llc -march=ppc32 | grep rlwimi + + void %test(short %div.0.i.i.i.i, int %L_num.0.i.i.i.i, int %tmp1.i.i206.i.i, short* %P) { + %X = shl short %div.0.i.i.i.i, ubyte 1 ; short [#uses=1] + %tmp28.i.i.i.i = shl int %L_num.0.i.i.i.i, ubyte 1 ; int [#uses=2] + %tmp31.i.i.i.i = setlt int %tmp28.i.i.i.i, %tmp1.i.i206.i.i ; bool [#uses=2] + + %tmp31.i.i.i.i = cast bool %tmp31.i.i.i.i to short ; short [#uses=1] + %tmp371.i.i.i.i1 = or short %tmp31.i.i.i.i, %X ; short [#uses=1] + %div.0.be.i.i.i.i = xor short %tmp371.i.i.i.i1, 1 ; short [#uses=1] + store short %div.0.be.i.i.i.i, short* %P + ret void + } + ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.248 - 1.249 --- Log message: Fix a dag combiner bug exposed by my recent instcombine patch. This fixes CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast --- Diffs of the changes: (+1 -1) DAGCombiner.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.248 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.249 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.248 Fri Nov 10 02:28:11 2006 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Nov 10 15:37:15 2006 @@ -1723,7 +1723,7 @@ abort(); } // fold !(x or y) - (!x and !y) iff x or y are setcc - if (N1C N1C-getValue() == 1 + if (N1C N1C-getValue() == 1 VT == MVT::i1 (N0.getOpcode() == ISD::OR || N0.getOpcode() == ISD::AND)) { SDOperand LHS = N0.getOperand(0), RHS = N0.getOperand(1); if (isOneUseSetCC(RHS) || isOneUseSetCC(LHS)) { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [release_19] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.238 - 1.238.2.1 --- Log message: Merging from mainline Fix a dag combiner bug exposed by my recent instcombine patch. This fixes CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast. --- Diffs of the changes: (+1 -1) DAGCombiner.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.238 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.238.2.1 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.238 Mon Nov 6 02:14:30 2006 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Nov 10 15:48:06 2006 @@ -1608,7 +1608,7 @@ abort(); } // fold !(x or y) - (!x and !y) iff x or y are setcc - if (N1C N1C-getValue() == 1 + if (N1C N1C-getValue() == 1 VT == MVT::i1 (N0.getOpcode() == ISD::OR || N0.getOpcode() == ISD::AND)) { SDOperand LHS = N0.getOperand(0), RHS = N0.getOperand(1); if (isOneUseSetCC(RHS) || isOneUseSetCC(LHS)) { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/PassManager.h
Changes in directory llvm/include/llvm: PassManager.h updated: 1.26 - 1.27 --- Log message: s/PassManagerAnalysisHelper/CommonPassManagerImpl Inherit CommonPassManagerImpl from Pass. --- Diffs of the changes: (+4 -6) PassManager.h | 10 -- 1 files changed, 4 insertions(+), 6 deletions(-) Index: llvm/include/llvm/PassManager.h diff -u llvm/include/llvm/PassManager.h:1.26 llvm/include/llvm/PassManager.h:1.27 --- llvm/include/llvm/PassManager.h:1.26Wed Nov 8 04:44:40 2006 +++ llvm/include/llvm/PassManager.h Fri Nov 10 15:33:13 2006 @@ -92,10 +92,10 @@ class PassManagerImpl_New; class FunctionPassManagerImpl_New; -/// PassManagerAnalysisHelper helps pass manager analysis required by +/// CommonPassManagerImpl helps pass manager analysis required by /// the managed passes. It provides methods to add/remove analysis /// available and query if certain analysis is available or not. -class PassManagerAnalysisHelper { +class CommonPassManagerImpl : public Pass{ public: @@ -124,8 +124,7 @@ }; /// PassManager_New manages ModulePassManagers -class PassManager_New : public Pass, -public PassManagerAnalysisHelper { +class PassManager_New : public CommonPassManagerImpl { public: @@ -150,8 +149,7 @@ }; /// FunctionPassManager_New manages FunctionPasses and BasicBlockPassManagers. -class FunctionPassManager_New : public Pass, -public PassManagerAnalysisHelper { +class FunctionPassManager_New : public CommonPassManagerImpl { public: FunctionPassManager_New(ModuleProvider *P) { /* TODO */ } FunctionPassManager_New(); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h X86InstrSSE.td
Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.289 - 1.290 X86ISelLowering.h updated: 1.79 - 1.80 X86InstrSSE.td updated: 1.170 - 1.171 --- Log message: Don't dag combine floating point select to max and min intrinsics. Those take v4f32 / v2f64 operands and may end up causing larger spills / restores. Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead. This fixes PR996: http://llvm.org/PR996 . --- Diffs of the changes: (+21 -59) X86ISelLowering.cpp | 36 +--- X86ISelLowering.h |6 +- X86InstrSSE.td | 38 +++--- 3 files changed, 21 insertions(+), 59 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.289 llvm/lib/Target/X86/X86ISelLowering.cpp:1.290 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.289 Thu Nov 9 18:48:12 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Nov 10 15:43:37 2006 @@ -4983,6 +4983,8 @@ case X86ISD::S2VEC: return X86ISD::S2VEC; case X86ISD::PEXTRW: return X86ISD::PEXTRW; case X86ISD::PINSRW: return X86ISD::PINSRW; + case X86ISD::FMAX: return X86ISD::FMAX; + case X86ISD::FMIN: return X86ISD::FMIN; } } @@ -5363,7 +5365,7 @@ SDOperand RHS = N-getOperand(2); ISD::CondCode CC = castCondCodeSDNode(Cond.getOperand(2))-get(); - unsigned IntNo = 0; + unsigned Opcode = 0; if (LHS == Cond.getOperand(0) RHS == Cond.getOperand(1)) { switch (CC) { default: break; @@ -5374,8 +5376,7 @@ // FALL THROUGH. case ISD::SETOLT: // (X olt/lt Y) ? X : Y - min case ISD::SETLT: - IntNo = LHS.getValueType() == MVT::f32 ? Intrinsic::x86_sse_min_ss : - Intrinsic::x86_sse2_min_sd; + Opcode = X86ISD::FMIN; break; case ISD::SETOGT: // (X Y) ? X : Y - max @@ -5385,8 +5386,7 @@ // FALL THROUGH. case ISD::SETUGE: // (X uge/ge Y) ? X : Y - max case ISD::SETGE: - IntNo = LHS.getValueType() == MVT::f32 ? Intrinsic::x86_sse_max_ss : - Intrinsic::x86_sse2_max_sd; + Opcode = X86ISD::FMAX; break; } } else if (LHS == Cond.getOperand(1) RHS == Cond.getOperand(0)) { @@ -5399,8 +5399,7 @@ // FALL THROUGH. case ISD::SETUGE: // (X uge/ge Y) ? Y : X - min case ISD::SETGE: - IntNo = LHS.getValueType() == MVT::f32 ? Intrinsic::x86_sse_min_ss : - Intrinsic::x86_sse2_min_sd; + Opcode = X86ISD::FMIN; break; case ISD::SETOLE: // (X = Y) ? Y : X - max @@ -5410,30 +5409,13 @@ // FALL THROUGH. case ISD::SETOLT: // (X olt/lt Y) ? Y : X - max case ISD::SETLT: - IntNo = LHS.getValueType() == MVT::f32 ? Intrinsic::x86_sse_max_ss : - Intrinsic::x86_sse2_max_sd; + Opcode = X86ISD::FMAX; break; } } - // minss/maxss take a v4f32 operand. - if (IntNo) { -if (LHS.getValueType() == MVT::f32) { - LHS = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, LHS); - RHS = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, RHS); -} else { - LHS = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v2f64, LHS); - RHS = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v2f64, RHS); -} - -MVT::ValueType PtrTy = Subtarget-is64Bit() ? MVT::i64 : MVT::i32; -SDOperand IntNoN = DAG.getConstant(IntNo, PtrTy); - -SDOperand Val = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, LHS.getValueType(), -IntNoN, LHS, RHS); -return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N-getValueType(0), Val, - DAG.getConstant(0, PtrTy)); - } + if (Opcode) +return DAG.getNode(Opcode, N-getValueType(0), LHS, RHS); } } Index: llvm/lib/Target/X86/X86ISelLowering.h diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.79 llvm/lib/Target/X86/X86ISelLowering.h:1.80 --- llvm/lib/Target/X86/X86ISelLowering.h:1.79 Tue Nov 7 16:14:24 2006 +++ llvm/lib/Target/X86/X86ISelLowering.h Fri Nov 10 15:43:37 2006 @@ -160,7 +160,11 @@ /// PINSRW - Insert the lower 16-bits of a 32-bit value to a vector, /// corresponds to X86::PINSRW. - PINSRW + PINSRW, + + /// FMAX, FMIN - Floating point max and min. + /// + FMAX, FMIN }; } Index: llvm/lib/Target/X86/X86InstrSSE.td diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.170 llvm/lib/Target/X86/X86InstrSSE.td:1.171 --- llvm/lib/Target/X86/X86InstrSSE.td:1.170Tue Nov 7 16:14:24 2006 +++
[llvm-commits] [release_19] CVS: llvm-test/SingleSource/CustomChecked/Makefile
Changes in directory llvm-test/SingleSource/CustomChecked: Makefile updated: 1.12 - 1.12.14.1 --- Log message: Merge from mainline to fix linking problem. --- Diffs of the changes: (+1 -1) Makefile |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/SingleSource/CustomChecked/Makefile diff -u llvm-test/SingleSource/CustomChecked/Makefile:1.12 llvm-test/SingleSource/CustomChecked/Makefile:1.12.14.1 --- llvm-test/SingleSource/CustomChecked/Makefile:1.12 Wed Sep 1 09:33:26 2004 +++ llvm-test/SingleSource/CustomChecked/Makefile Fri Nov 10 15:51:00 2006 @@ -7,7 +7,7 @@ include $(LEVEL)/SingleSource/Makefile.singlesrc LIBS += -lstdc++ -LDFLAGS += -lm +LDFLAGS += -lstdc++ -lm LLI_RUN := $(addsuffix .run-lli, $(PREFIXED_PROGRAMS_TO_TEST)) JIT_RUN := $(addsuffix .run-jit, $(PREFIXED_PROGRAMS_TO_TEST)) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [release_19] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Changes in directory llvm/lib/Target/X86: X86ISelDAGToDAG.cpp updated: 1.122 - 1.122.2.1 --- Log message: Merge from mainline. Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding the load into two instructions. Make sure we check the SCALAR_TO_VECTOR has only one use as well. --- Diffs of the changes: (+1 -0) X86ISelDAGToDAG.cpp |1 + 1 files changed, 1 insertion(+) Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.122 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.122.2.1 --- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.122 Sun Nov 5 13:31:28 2006 +++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Fri Nov 10 15:55:57 2006 @@ -814,6 +814,7 @@ InChain = N.getOperand(0).getValue(1); if (ISD::isNON_EXTLoad(InChain.Val) InChain.getValue(0).hasOneUse() + N.hasOneUse() CanBeFoldedBy(N.Val, Pred.Val, Root.Val)) { LoadSDNode *LD = castLoadSDNode(InChain); if (!SelectAddr(LD-getBasePtr(), Base, Scale, Index, Disp)) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/README-SSE.txt
Changes in directory llvm/lib/Target/X86: README-SSE.txt updated: 1.8 - 1.9 --- Log message: Add a note. --- Diffs of the changes: (+6 -0) README-SSE.txt |6 ++ 1 files changed, 6 insertions(+) Index: llvm/lib/Target/X86/README-SSE.txt diff -u llvm/lib/Target/X86/README-SSE.txt:1.8 llvm/lib/Target/X86/README-SSE.txt:1.9 --- llvm/lib/Target/X86/README-SSE.txt:1.8 Fri Nov 10 16:03:35 2006 +++ llvm/lib/Target/X86/README-SSE.txt Fri Nov 10 16:09:17 2006 @@ -551,3 +551,9 @@ Apply the same transformation that merged four float into a single 128-bit load to loads from constant pool. + +//===-===// + +Floating point max / min are commutable when -enable-unsafe-fp-path is +specified. We should turn int_x86_sse_max_ss and X86ISD::FMIN etc. into other +nodes which are selected to max / min instructions that are marked commutable. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/README-SSE.txt README.txt
Changes in directory llvm/lib/Target/X86: README-SSE.txt updated: 1.7 - 1.8 README.txt updated: 1.143 - 1.144 --- Log message: These are done. --- Diffs of the changes: (+0 -69) README-SSE.txt | 58 - README.txt | 11 -- 2 files changed, 69 deletions(-) Index: llvm/lib/Target/X86/README-SSE.txt diff -u llvm/lib/Target/X86/README-SSE.txt:1.7 llvm/lib/Target/X86/README-SSE.txt:1.8 --- llvm/lib/Target/X86/README-SSE.txt:1.7 Wed Oct 18 12:04:09 2006 +++ llvm/lib/Target/X86/README-SSE.txt Fri Nov 10 16:03:35 2006 @@ -4,30 +4,6 @@ //===-===// -There are serious issues folding loads into scalar sse intrinsics. For -example, this: - -float minss4( float x, float *y ) { - return _mm_cvtss_f32(_mm_min_ss(_mm_set_ss(x),_mm_set_ss(*y))); -} - -compiles to: - -_minss4: -subl $4, %esp -movl 12(%esp), %eax -*** movss 8(%esp), %xmm0 -*** movss (%eax), %xmm1 -*** minss %xmm1, %xmm0 -movss %xmm0, (%esp) -flds (%esp) -addl $4, %esp -ret - -Each operand of the minss is a load. At least one should be folded! - -//===-===// - Expand libm rounding functions inline: Significant speedups possible. http://gcc.gnu.org/ml/gcc-patches/2006-10/msg00909.html @@ -165,17 +141,6 @@ //===-===// -Should generate min/max for stuff like: - -void minf(float a, float b, float *X) { - *X = a = b ? a : b; -} - -Make use of floating point min / max instructions. Perhaps introduce ISD::FMIN -and ISD::FMAX node types? - -//===-===// - Lower memcpy / memset to a series of SSE 128 bit move instructions when it's feasible. @@ -225,29 +190,6 @@ //===-===// -Better codegen for: - -void f(float a, float b, vector float * out) { *out = (vector float){ a, 0.0, 0.0, b}; } -void f(float a, float b, vector float * out) { *out = (vector float){ a, b, 0.0, 0}; } - -For the later we generate: - -_f: -pxor %xmm0, %xmm0 -movss 8(%esp), %xmm1 -movaps %xmm0, %xmm2 -unpcklps %xmm1, %xmm2 -movss 4(%esp), %xmm1 -unpcklps %xmm0, %xmm1 -unpcklps %xmm2, %xmm1 -movl 12(%esp), %eax -movaps %xmm1, (%eax) -ret - -This seems like it should use shufps, one for each of a b. - -//===-===// - How to decide when to use the floating point version of logical ops? Here are some code fragments: Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.143 llvm/lib/Target/X86/README.txt:1.144 --- llvm/lib/Target/X86/README.txt:1.143Sun Oct 22 16:40:12 2006 +++ llvm/lib/Target/X86/README.txt Fri Nov 10 16:03:35 2006 @@ -232,17 +232,6 @@ //===-===// -Should generate min/max for stuff like: - -void minf(float a, float b, float *X) { - *X = a = b ? a : b; -} - -Make use of floating point min / max instructions. Perhaps introduce ISD::FMIN -and ISD::FMAX node types? - -//===-===// - The first BB of this code: declare bool %foo() ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [release_19] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86ISelLowering.h X86InstrSSE.td
Changes in directory llvm/lib/Target/X86: X86ISelLowering.cpp updated: 1.287.2.3 - 1.287.2.4 X86ISelLowering.h updated: 1.78 - 1.78.2.1 X86InstrSSE.td updated: 1.169 - 1.169.2.1 --- Log message: Merge from mainline Don't dag combine floating point select to max and min intrinsics. Those take v4f32 / v2f64 operands and may end up causing larger spills / restores. Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead. --- Diffs of the changes: (+24 -64) X86ISelLowering.cpp | 45 + X86ISelLowering.h |6 +- X86InstrSSE.td | 37 ++--- 3 files changed, 24 insertions(+), 64 deletions(-) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.287.2.3 llvm/lib/Target/X86/X86ISelLowering.cpp:1.287.2.4 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.287.2.3 Thu Nov 9 22:28:35 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Nov 10 16:11:22 2006 @@ -4967,6 +4967,8 @@ case X86ISD::S2VEC: return X86ISD::S2VEC; case X86ISD::PEXTRW: return X86ISD::PEXTRW; case X86ISD::PINSRW: return X86ISD::PINSRW; + case X86ISD::FMAX: return X86ISD::FMAX; + case X86ISD::FMIN: return X86ISD::FMIN; } } @@ -5347,7 +5349,7 @@ SDOperand RHS = N-getOperand(2); ISD::CondCode CC = castCondCodeSDNode(Cond.getOperand(2))-get(); - unsigned IntNo = 0; + unsigned Opcode = 0; if (LHS == Cond.getOperand(0) RHS == Cond.getOperand(1)) { switch (CC) { default: break; @@ -5358,9 +5360,8 @@ // FALL THROUGH. case ISD::SETOLT: // (X olt/lt Y) ? X : Y - min case ISD::SETLT: - IntNo = LHS.getValueType() == MVT::f32 ? Intrinsic::x86_sse_min_ss : - Intrinsic::x86_sse2_min_sd; - break; + Opcode = X86ISD::FMIN; + break; case ISD::SETOGT: // (X Y) ? X : Y - max case ISD::SETUGT: @@ -5369,9 +5370,8 @@ // FALL THROUGH. case ISD::SETUGE: // (X uge/ge Y) ? X : Y - max case ISD::SETGE: - IntNo = LHS.getValueType() == MVT::f32 ? Intrinsic::x86_sse_max_ss : - Intrinsic::x86_sse2_max_sd; - break; + Opcode = X86ISD::FMAX; + break; } } else if (LHS == Cond.getOperand(1) RHS == Cond.getOperand(0)) { switch (CC) { @@ -5383,9 +5383,8 @@ // FALL THROUGH. case ISD::SETUGE: // (X uge/ge Y) ? Y : X - min case ISD::SETGE: - IntNo = LHS.getValueType() == MVT::f32 ? Intrinsic::x86_sse_min_ss : - Intrinsic::x86_sse2_min_sd; - break; + Opcode = X86ISD::FMIN; + break; case ISD::SETOLE: // (X = Y) ? Y : X - max case ISD::SETULE: @@ -5394,30 +5393,12 @@ // FALL THROUGH. case ISD::SETOLT: // (X olt/lt Y) ? Y : X - max case ISD::SETLT: - IntNo = LHS.getValueType() == MVT::f32 ? Intrinsic::x86_sse_max_ss : - Intrinsic::x86_sse2_max_sd; - break; + Opcode = X86ISD::FMAX; + break; } } - - // minss/maxss take a v4f32 operand. - if (IntNo) { -if (LHS.getValueType() == MVT::f32) { - LHS = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, LHS); - RHS = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, RHS); -} else { - LHS = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v2f64, LHS); - RHS = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v2f64, RHS); -} - -MVT::ValueType PtrTy = Subtarget-is64Bit() ? MVT::i64 : MVT::i32; -SDOperand IntNoN = DAG.getConstant(IntNo, PtrTy); - -SDOperand Val = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, LHS.getValueType(), -IntNoN, LHS, RHS); -return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N-getValueType(0), Val, - DAG.getConstant(0, PtrTy)); - } + if (Opcode) +return DAG.getNode(Opcode, N-getValueType(0), LHS, RHS); } } Index: llvm/lib/Target/X86/X86ISelLowering.h diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.78 llvm/lib/Target/X86/X86ISelLowering.h:1.78.2.1 --- llvm/lib/Target/X86/X86ISelLowering.h:1.78 Tue Oct 31 14:13:11 2006 +++ llvm/lib/Target/X86/X86ISelLowering.h Fri Nov 10 16:11:22 2006 @@ -160,7 +160,11 @@ /// PINSRW - Insert the lower 16-bits of a 32-bit value to a vector, /// corresponds to X86::PINSRW. - PINSRW + PINSRW, + + /// FMAX, FMIN - Floating point max and min. + /// + FMAX, FMIN }; } Index: llvm/lib/Target/X86/X86InstrSSE.td diff -u
[llvm-commits] CVS: llvm/test/Regression/Transforms/InstCombine/2006-11-10-ashr-miscompile.ll
Changes in directory llvm/test/Regression/Transforms/InstCombine: 2006-11-10-ashr-miscompile.ll added (r1.1) --- Log message: This testcase is miscompiled by instcombine, reduced from 176.gcc --- Diffs of the changes: (+7 -0) 2006-11-10-ashr-miscompile.ll |7 +++ 1 files changed, 7 insertions(+) Index: llvm/test/Regression/Transforms/InstCombine/2006-11-10-ashr-miscompile.ll diff -c /dev/null llvm/test/Regression/Transforms/InstCombine/2006-11-10-ashr-miscompile.ll:1.1 *** /dev/null Fri Nov 10 17:38:04 2006 --- llvm/test/Regression/Transforms/InstCombine/2006-11-10-ashr-miscompile.ll Fri Nov 10 17:37:54 2006 *** *** 0 --- 1,7 + ; RUN: llvm-as %s | opt -instcombine | llvm-dis | grep lshr + ; Verify this is not turned into -1. + + int %test(ubyte %amt) { + %B = lshr int -1, ubyte %amt + ret int %B + } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar: InstructionCombining.cpp updated: 1.541 - 1.542 --- Log message: Fix InstCombine/2006-11-10-ashr-miscompile.ll a miscompilation introduced by the shr - [al]shr patch. This was reduced from 176.gcc. --- Diffs of the changes: (+3 -3) InstructionCombining.cpp |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.541 llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.542 --- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.541 Wed Nov 8 23:12:27 2006 +++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Fri Nov 10 17:38:52 2006 @@ -5082,10 +5082,10 @@ return ReplaceInstUsesWith(I, Op0); // X s undef - X } - // shr int -1, X = -1 (for any arithmetic shift rights of ~0) - if (!isLeftShift) + // ashr int -1, X = -1 (for any arithmetic shift rights of ~0) + if (I.getOpcode() == Instruction::AShr) if (ConstantInt *CSI = dyn_castConstantInt(Op0)) - if (CSI-isAllOnesValue() Op0-getType()-isSigned()) + if (CSI-isAllOnesValue()) return ReplaceInstUsesWith(I, CSI); // Try to fold constant and into select arguments. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp PPCISelLowering.cpp PPCInstr64Bit.td PPCInstrFormats.td
Changes in directory llvm/lib/Target/PowerPC: PPCISelDAGToDAG.cpp updated: 1.216 - 1.217 PPCISelLowering.cpp updated: 1.222 - 1.223 PPCInstr64Bit.td updated: 1.22 - 1.23 PPCInstrFormats.td updated: 1.82 - 1.83 --- Log message: implement preinc support for r+i loads on ppc64 --- Diffs of the changes: (+71 -17) PPCISelDAGToDAG.cpp | 31 +++ PPCISelLowering.cpp | 11 ++- PPCInstr64Bit.td| 42 ++ PPCInstrFormats.td |4 4 files changed, 71 insertions(+), 17 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp diff -u llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.216 llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.217 --- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1.216 Thu Nov 9 20:08:47 2006 +++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Fri Nov 10 17:58:44 2006 @@ -830,14 +830,29 @@ unsigned Opcode; bool isSExt = LD-getExtensionType() == ISD::SEXTLOAD; -assert(!isSExt || LoadedVT == MVT::i16 Invalid sext update load); -switch (LoadedVT) { -default: assert(0 Invalid PPC load type!); -case MVT::f64: Opcode = PPC::LFDU; break; -case MVT::f32: Opcode = PPC::LFSU; break; -case MVT::i32: Opcode = PPC::LWZU; break; -case MVT::i16: Opcode = isSExt ? PPC::LHAU : PPC::LHZU; break; -case MVT::i8: Opcode = PPC::LBZU; break; +if (LD-getValueType(0) != MVT::i64) { + // Handle PPC32 integer and normal FP loads. + assert(!isSExt || LoadedVT == MVT::i16 Invalid sext update load); + switch (LoadedVT) { + default: assert(0 Invalid PPC load type!); + case MVT::f64: Opcode = PPC::LFDU; break; + case MVT::f32: Opcode = PPC::LFSU; break; + case MVT::i32: Opcode = PPC::LWZU; break; + case MVT::i16: Opcode = isSExt ? PPC::LHAU : PPC::LHZU; break; + case MVT::i1: + case MVT::i8: Opcode = PPC::LBZU; break; + } +} else { + assert(LD-getValueType(0) == MVT::i64 Unknown load result type!); + assert(!isSExt || LoadedVT == MVT::i16 Invalid sext update load); + switch (LoadedVT) { + default: assert(0 Invalid PPC load type!); + case MVT::i64: Opcode = PPC::LDU; break; + case MVT::i32: Opcode = PPC::LWZU8; break; + case MVT::i16: Opcode = isSExt ? PPC::LHAU8 : PPC::LHZU8; break; + case MVT::i1: + case MVT::i8: Opcode = PPC::LBZU8; break; + } } SDOperand Offset = LD-getOffset(); Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.222 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.223 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.222 Thu Nov 9 20:08:47 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Fri Nov 10 17:58:44 2006 @@ -53,9 +53,15 @@ // PowerPC does not have truncstore for i1. setStoreXAction(MVT::i1, Promote); - // PowerPC has i32 and i64 pre-inc load and store's. + // PowerPC has pre-inc load and store's. + setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); + setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); + setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); + setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); + setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); + setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal); setIndexedStoreAction(ISD::PRE_INC, MVT::i64, Legal); @@ -870,6 +876,9 @@ SDOperand Ptr; if (LoadSDNode *LD = dyn_castLoadSDNode(N)) { Ptr = LD-getBasePtr(); + +// FIXME: PPC has no LWAU! + } else if (StoreSDNode *ST = dyn_castStoreSDNode(N)) { ST = ST; //Ptr = ST-getBasePtr(); Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td diff -u llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.22 llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.23 --- llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.22 Fri Oct 13 16:14:26 2006 +++ llvm/lib/Target/PowerPC/PPCInstr64Bit.tdFri Nov 10 17:58:45 2006 @@ -229,8 +229,8 @@ // -let isLoad = 1, PPC970_Unit = 2 in { // Sign extending loads. +let isLoad = 1, PPC970_Unit = 2 in { def LHA8: DForm_142, (ops G8RC:$rD, memri:$src), lha $rD, $src, LdStLHA, [(set G8RC:$rD, (sextloadi16 iaddr:$src))], @@ -248,7 +248,17 @@ [(set G8RC:$rD, (sextloadi32 xaddr:$src))], isPPC64, PPC970_DGroup_Cracked; +// Update forms. +def LHAU8 : DForm_143, (ops G8RC:$rD, ptr_rc:$rA_result, i32imm:$disp, +ptr_rc:$rA), +lhau $rD, $disp($rA), LdStGeneral, +[], RegConstraint$rA = $rA_result; +// NO LWAU! + +} + // Zero extending loads. +let isLoad = 1, PPC970_Unit = 2 in { def LBZ8 : DForm_134, (ops G8RC:$rD, memri:$src), lbz $rD, $src, LdStGeneral,
[llvm-commits] CVS: llvm/Makefile.rules
Changes in directory llvm: Makefile.rules updated: 1.408 - 1.409 --- Log message: Allow ENABLE_OPTIMIZED=0 to turn off optimization (turn on debug). --- Diffs of the changes: (+1 -1) Makefile.rules |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/Makefile.rules diff -u llvm/Makefile.rules:1.408 llvm/Makefile.rules:1.409 --- llvm/Makefile.rules:1.408 Thu Nov 2 14:25:49 2006 +++ llvm/Makefile.rules Fri Nov 10 18:00:31 2006 @@ -213,7 +213,7 @@ C.Flags := $(OPTIMIZE_OPTION) -pg -g LD.Flags := $(OPTIMIZE_OPTION) -pg -g else - ifdef ENABLE_OPTIMIZED + ifeq ($(ENABLE_OPTIMIZED),1) BuildMode := Release # Don't use -fomit-frame-pointer on Darwin or FreeBSD. ifneq ($(OS),FreeBSD) ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Regression/CodeGen/PowerPC/mem_update.ll
Changes in directory llvm/test/Regression/CodeGen/PowerPC: mem_update.ll updated: 1.2 - 1.3 --- Log message: enable this test, check ppc64 as well. --- Diffs of the changes: (+4 -4) mem_update.ll |8 1 files changed, 4 insertions(+), 4 deletions(-) Index: llvm/test/Regression/CodeGen/PowerPC/mem_update.ll diff -u llvm/test/Regression/CodeGen/PowerPC/mem_update.ll:1.2 llvm/test/Regression/CodeGen/PowerPC/mem_update.ll:1.3 --- llvm/test/Regression/CodeGen/PowerPC/mem_update.ll:1.2 Thu Nov 9 20:04:52 2006 +++ llvm/test/Regression/CodeGen/PowerPC/mem_update.ll Fri Nov 10 18:13:07 2006 @@ -1,7 +1,7 @@ -; RUN: llvm-as %s | llc -march=ppc32 -; RUN: llvm-as %s | llc -march=ppc32 | not grep addi - -; XFAIL: * +; RUN: llvm-as %s | llc -march=ppc32 -enable-ppc-preinc +; RUN: llvm-as %s | llc -march=ppc32 -enable-ppc-preinc | not grep addi +; RUN: llvm-as %s | llc -march=ppc64 -enable-ppc-preinc +; RUN: llvm-as %s | llc -march=ppc64 -enable-ppc-preinc | not grep addi int *%test0(int *%X, int *%dest) { %Y = getelementptr int* %X, int 4 ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Changes in directory llvm/lib/Target/PowerPC: PPCISelLowering.cpp updated: 1.223 - 1.224 --- Log message: ppc64 doesn't have lwau, don't attempt to form it. --- Diffs of the changes: (+9 -3) PPCISelLowering.cpp | 12 +--- 1 files changed, 9 insertions(+), 3 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.223 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.224 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.223 Fri Nov 10 17:58:44 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Fri Nov 10 18:08:42 2006 @@ -876,9 +876,6 @@ SDOperand Ptr; if (LoadSDNode *LD = dyn_castLoadSDNode(N)) { Ptr = LD-getBasePtr(); - -// FIXME: PPC has no LWAU! - } else if (StoreSDNode *ST = dyn_castStoreSDNode(N)) { ST = ST; //Ptr = ST-getBasePtr(); @@ -891,6 +888,15 @@ // TODO: Handle reg+reg. if (!SelectAddressRegImm(Ptr, Offset, Base, DAG)) return false; + + // PPC64 doesn't have lwau, but it does have lwaux. Reject preinc load of + // sext i32 to i64 when addr mode is r+i. + if (LoadSDNode *LD = dyn_castLoadSDNode(N)) { +if (LD-getValueType(0) == MVT::i64 LD-getLoadedVT() == MVT::i32 +LD-getExtensionType() == ISD::SEXTLOAD +isaConstantSDNode(Offset)) + return false; + } AM = ISD::PRE_INC; return true; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.249 - 1.250 --- Log message: move big chunks of code out-of-line, no functionality change. --- Diffs of the changes: (+241 -235) DAGCombiner.cpp | 476 1 files changed, 241 insertions(+), 235 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.249 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.250 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.249 Fri Nov 10 15:37:15 2006 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Nov 10 18:39:41 2006 @@ -178,241 +178,10 @@ return true; } -/// CombineToPreIndexedLoadStore - Try turning a load / store and a -/// pre-indexed load / store when the base pointer is a add or subtract -/// and it has other uses besides the load / store. After the -/// transformation, the new indexed load / store has effectively folded -/// the add / subtract in and all of its other uses are redirected to the -/// new load / store. -bool CombineToPreIndexedLoadStore(SDNode *N) { - if (!AfterLegalize) -return false; - - bool isLoad = true; - SDOperand Ptr; - MVT::ValueType VT; - if (LoadSDNode *LD = dyn_castLoadSDNode(N)) { -VT = LD-getLoadedVT(); -if (!TLI.isIndexedLoadLegal(ISD::PRE_INC, VT) -!TLI.isIndexedLoadLegal(ISD::PRE_DEC, VT)) - return false; -Ptr = LD-getBasePtr(); - } else if (StoreSDNode *ST = dyn_castStoreSDNode(N)) { -VT = ST-getStoredVT(); -if (!TLI.isIndexedStoreLegal(ISD::PRE_INC, VT) -!TLI.isIndexedStoreLegal(ISD::PRE_DEC, VT)) - return false; -Ptr = ST-getBasePtr(); -isLoad = false; - } else -return false; - - if ((Ptr.getOpcode() == ISD::ADD || Ptr.getOpcode() == ISD::SUB) - Ptr.Val-use_size() 1) { -SDOperand BasePtr; -SDOperand Offset; -ISD::MemIndexedMode AM = ISD::UNINDEXED; -if (TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG)) { - // Try turning it into a pre-indexed load / store except when - // 1) If N is a store and the ptr is either the same as or is a - //predecessor of the value being stored. - // 2) Another use of base ptr is a predecessor of N. If ptr is folded - //that would create a cycle. - // 3) All uses are load / store ops that use it as base ptr. - - // Checking #1. - if (!isLoad) { -SDOperand Val = castStoreSDNode(N)-getValue(); -if (Val == Ptr || Ptr.Val-isPredecessor(Val.Val)) - return false; - } - - // Now check for #2 and #3. - bool RealUse = false; - for (SDNode::use_iterator I = Ptr.Val-use_begin(), - E = Ptr.Val-use_end(); I != E; ++I) { -SDNode *Use = *I; -if (Use == N) - continue; -if (Use-isPredecessor(N)) - return false; - -if (!((Use-getOpcode() == ISD::LOAD - castLoadSDNode(Use)-getBasePtr() == Ptr) || - (Use-getOpcode() == ISD::STORE) - castStoreSDNode(Use)-getBasePtr() == Ptr)) - RealUse = true; - } - if (!RealUse) -return false; - - SDOperand Result = isLoad -? DAG.getIndexedLoad(SDOperand(N,0), BasePtr, Offset, AM) -: DAG.getIndexedStore(SDOperand(N,0), BasePtr, Offset, AM); - ++PreIndexedNodes; - ++NodesCombined; - DEBUG(std::cerr \nReplacing.4 ; N-dump(); -std::cerr \nWith: ; Result.Val-dump(DAG); -std::cerr '\n'); - std::vectorSDNode* NowDead; - if (isLoad) { -DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0), Result.getValue(0), - NowDead); -DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 1), Result.getValue(2), - NowDead); - } else { -DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0), Result.getValue(1), - NowDead); - } - - // Nodes can end up on the worklist more than once. Make sure we do - // not process a node that has been replaced. - for (unsigned i = 0, e = NowDead.size(); i != e; ++i) -removeFromWorkList(NowDead[i]); - // Finally, since the node is now dead, remove it from the graph. - DAG.DeleteNode(N); - - // Replace the uses of Ptr with uses of the updated base value. - DAG.ReplaceAllUsesOfValueWith(Ptr, Result.getValue(isLoad ? 1 : 0), -NowDead); - removeFromWorkList(Ptr.Val); - for (unsigned i = 0,
[llvm-commits] CVS: llvm/include/llvm/PassManager.h
Changes in directory llvm/include/llvm: PassManager.h updated: 1.27 - 1.28 --- Log message: Keep track of analysis required by the passes. Force use of new pass manager if a pass does not preserve analysis that is used by other passes. --- Diffs of the changes: (+2 -2) PassManager.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/include/llvm/PassManager.h diff -u llvm/include/llvm/PassManager.h:1.27 llvm/include/llvm/PassManager.h:1.28 --- llvm/include/llvm/PassManager.h:1.27Fri Nov 10 15:33:13 2006 +++ llvm/include/llvm/PassManager.h Fri Nov 10 18:42:16 2006 @@ -119,8 +119,8 @@ void removeDeadPasses() { /* TODO : Implement */ } private: - // Required set of analysis for the passes managed by this manager - std::vectorAnalysisID RequiredSet; + // Analysis required by the passes managed by this manager + std::vectorAnalysisID RequiredAnalysis; }; /// PassManager_New manages ModulePassManagers ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.11 - 1.12 --- Log message: Keep track of analysis required by the passes. Force use of new pass manager if a pass does not preserve analysis that is used by other passes. --- Diffs of the changes: (+18 -5) PassManager.cpp | 23 ++- 1 files changed, 18 insertions(+), 5 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.11 llvm/lib/VMCore/PassManager.cpp:1.12 --- llvm/lib/VMCore/PassManager.cpp:1.11Fri Nov 10 15:33:13 2006 +++ llvm/lib/VMCore/PassManager.cpp Fri Nov 10 18:42:16 2006 @@ -142,9 +142,18 @@ AnalysisUsage AnUsage; P-getAnalysisUsage(AnUsage); - // If this pass is not preserving information that is required by the other passes - // managed by this manager then use new manager - // TODO + // If this pass is not preserving information that is required by the other + // passes managed by this manager then use new manager + if (!AnUsage.getPreservesAll()) { +const std::vectorAnalysisID PreservedSet = AnUsage.getPreservedSet(); +for (std::vectorAnalysisID::iterator I = RequiredAnalysis.begin(), + E = RequiredAnalysis.end(); I != E; ++I) { + if (std::find(PreservedSet.begin(), PreservedSet.end(), *I) == + PreservedSet.end()) +// This analysis is not preserved. Need new manager. +return false; +} + } return true; } @@ -157,8 +166,12 @@ /// Augment RequiredSet by adding analysis required by pass P. void CommonPassManagerImpl::noteDownRequiredAnalysis(Pass *P) { + AnalysisUsage AnUsage; + P-getAnalysisUsage(AnUsage); + const std::vectorAnalysisID RequiredSet = AnUsage.getRequiredSet(); - // TODO + // FIXME: What about duplicates ? + RequiredAnalysis.insert(RequiredAnalysis.end(), RequiredSet.begin(), RequiredSet.end()); } /// Remove AnalysisID from the RequiredSet @@ -375,7 +388,7 @@ bool PassManagerImpl_New::addPass(Pass *P) { - if (!activeManager) { + if (!activeManager || !activeManager-addPass(P)) { activeManager = new ModulePassManager_New(); PassManagers.push_back(activeManager); } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG: DAGCombiner.cpp updated: 1.250 - 1.251 --- Log message: reduce indentation by using early exits. No functionality change. --- Diffs of the changes: (+163 -156) DAGCombiner.cpp | 319 1 files changed, 163 insertions(+), 156 deletions(-) Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.250 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.251 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.250 Fri Nov 10 18:39:41 2006 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Nov 10 18:56:29 2006 @@ -2737,83 +2737,89 @@ } else return false; - if ((Ptr.getOpcode() == ISD::ADD || Ptr.getOpcode() == ISD::SUB) - Ptr.Val-use_size() 1) { -SDOperand BasePtr; -SDOperand Offset; -ISD::MemIndexedMode AM = ISD::UNINDEXED; -if (TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG)) { - // Try turning it into a pre-indexed load / store except when - // 1) If N is a store and the ptr is either the same as or is a - //predecessor of the value being stored. - // 2) Another use of base ptr is a predecessor of N. If ptr is folded - //that would create a cycle. - // 3) All uses are load / store ops that use it as base ptr. - - // Checking #1. - if (!isLoad) { -SDOperand Val = castStoreSDNode(N)-getValue(); -if (Val == Ptr || Ptr.Val-isPredecessor(Val.Val)) - return false; - } - - // Now check for #2 and #3. - bool RealUse = false; - for (SDNode::use_iterator I = Ptr.Val-use_begin(), - E = Ptr.Val-use_end(); I != E; ++I) { -SDNode *Use = *I; -if (Use == N) - continue; -if (Use-isPredecessor(N)) - return false; + // If the pointer is not an add/sub, or if it doesn't have multiple uses, bail + // out. There is no reason to make this a preinc/predec. + if ((Ptr.getOpcode() != ISD::ADD Ptr.getOpcode() != ISD::SUB) || + Ptr.Val-hasOneUse()) +return false; -if (!((Use-getOpcode() == ISD::LOAD - castLoadSDNode(Use)-getBasePtr() == Ptr) || - (Use-getOpcode() == ISD::STORE) - castStoreSDNode(Use)-getBasePtr() == Ptr)) - RealUse = true; - } - if (!RealUse) -return false; - - SDOperand Result = isLoad -? DAG.getIndexedLoad(SDOperand(N,0), BasePtr, Offset, AM) -: DAG.getIndexedStore(SDOperand(N,0), BasePtr, Offset, AM); - ++PreIndexedNodes; - ++NodesCombined; - DEBUG(std::cerr \nReplacing.4 ; N-dump(); -std::cerr \nWith: ; Result.Val-dump(DAG); -std::cerr '\n'); - std::vectorSDNode* NowDead; - if (isLoad) { -DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0), Result.getValue(0), - NowDead); -DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 1), Result.getValue(2), - NowDead); - } else { -DAG.ReplaceAllUsesOfValueWith(SDOperand(N, 0), Result.getValue(1), - NowDead); - } + // Ask the target to do addressing mode selection. + SDOperand BasePtr; + SDOperand Offset; + ISD::MemIndexedMode AM = ISD::UNINDEXED; + if (!TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG)) +return false; + + // Try turning it into a pre-indexed load / store except when + // 1) If N is a store and the ptr is either the same as or is a + //predecessor of the value being stored. + // 2) Another use of base ptr is a predecessor of N. If ptr is folded + //that would create a cycle. + // 3) All uses are load / store ops that use it as base ptr. + + // Checking #1. + if (!isLoad) { +SDOperand Val = castStoreSDNode(N)-getValue(); +if (Val == Ptr || Ptr.Val-isPredecessor(Val.Val)) + return false; + } - // Nodes can end up on the worklist more than once. Make sure we do - // not process a node that has been replaced. - for (unsigned i = 0, e = NowDead.size(); i != e; ++i) -removeFromWorkList(NowDead[i]); - // Finally, since the node is now dead, remove it from the graph. - DAG.DeleteNode(N); - - // Replace the uses of Ptr with uses of the updated base value. - DAG.ReplaceAllUsesOfValueWith(Ptr, Result.getValue(isLoad ? 1 : 0), -NowDead); - removeFromWorkList(Ptr.Val); - for (unsigned i = 0, e = NowDead.size(); i != e; ++i) -removeFromWorkList(NowDead[i]); - DAG.DeleteNode(Ptr.Val); + // Now check for #2 and #3. + bool RealUse = false; + for (SDNode::use_iterator I = Ptr.Val-use_begin(), + E = Ptr.Val-use_end(); I != E; ++I) { +SDNode *Use = *I; +if (Use == N) + continue; +if (Use-isPredecessor(N)) + return false; - return true;
[llvm-commits] CVS: llvm/test/Makefile
Changes in directory llvm/test: Makefile updated: 1.90 - 1.91 --- Log message: Enable path completion when typing the TESTSUITE= option by allowing the test directory to precede the test suite name. That is, it will strip off test/ from TESTSUITE which allows path completion from the command line. --- Diffs of the changes: (+1 -0) Makefile |1 + 1 files changed, 1 insertion(+) Index: llvm/test/Makefile diff -u llvm/test/Makefile:1.90 llvm/test/Makefile:1.91 --- llvm/test/Makefile:1.90 Mon Jul 31 19:07:58 2006 +++ llvm/test/Makefile Fri Nov 10 19:02:45 2006 @@ -24,6 +24,7 @@ ifdef TESTSUITE CLEANED_TESTSUITE := $(patsubst %/,%,$(TESTSUITE)) +CLEANED_TESTSUITE := $(patsubst test/%,%,$(CLEANED_TESTSUITE)) RUNTESTFLAGS := --tool $(CLEANED_TESTSUITE) endif ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/PassManager.h
Changes in directory llvm/include/llvm: PassManager.h updated: 1.28 - 1.29 --- Log message: Keep track if analysis made available by the pass. --- Diffs of the changes: (+8 -1) PassManager.h |9 - 1 files changed, 8 insertions(+), 1 deletion(-) Index: llvm/include/llvm/PassManager.h diff -u llvm/include/llvm/PassManager.h:1.28 llvm/include/llvm/PassManager.h:1.29 --- llvm/include/llvm/PassManager.h:1.28Fri Nov 10 18:42:16 2006 +++ llvm/include/llvm/PassManager.h Fri Nov 10 19:10:19 2006 @@ -19,6 +19,7 @@ #include llvm/Pass.h #include vector +#include set namespace llvm { @@ -106,9 +107,12 @@ /// Return true IFF AnalysisID AID is currently available. bool analysisCurrentlyAvailable(AnalysisID AID); - /// Augment RequiredSet by adding analysis required by pass P. + /// Augment RequiredAnalysis by adding analysis required by pass P. void noteDownRequiredAnalysis(Pass *P); + /// Augment AvailableAnalysis by adding analysis made available by pass P. + void noteDownAvailableAnalysis(Pass *P); + /// Remove AnalysisID from the RequiredSet void removeAnalysis(AnalysisID AID); @@ -121,6 +125,9 @@ private: // Analysis required by the passes managed by this manager std::vectorAnalysisID RequiredAnalysis; + + // set of available Analysis + std::setAnalysisID AvailableAnalysis; }; /// PassManager_New manages ModulePassManagers ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/test/Scripts/notcast
Changes in directory llvm/test/Scripts: notcast updated: 1.3 - 1.4 --- Log message: Instruction name changes. --- Diffs of the changes: (+1 -1) notcast |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/test/Scripts/notcast diff -u llvm/test/Scripts/notcast:1.3 llvm/test/Scripts/notcast:1.4 --- llvm/test/Scripts/notcast:1.3 Fri Nov 3 19:11:19 2006 +++ llvm/test/Scripts/notcast Fri Nov 10 19:04:13 2006 @@ -10,7 +10,7 @@ #prepat - optionally allow a regular expression to go at the start # -if grep $2'\(\([sz]ext\)\|\(trunc\)\|\(fp2[us]int\)\|\([us]int2fp\)\|\(bitconvert\)\|\(fpext\)\|\(fptrunc\)\)'$1 +if grep $2'\(\([sz]ext\)\|\(trunc\)\|\(fpto[us]i\)\|\([us]itofp\)\|\(bitconvert\)\|\(fpext\)\|\(fptrunc\)\)'$1 then exit 1 else exit 0 fi ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.12 - 1.13 --- Log message: Keep track if analysis made available by the pass. --- Diffs of the changes: (+22 -4) PassManager.cpp | 26 ++ 1 files changed, 22 insertions(+), 4 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.12 llvm/lib/VMCore/PassManager.cpp:1.13 --- llvm/lib/VMCore/PassManager.cpp:1.12Fri Nov 10 18:42:16 2006 +++ llvm/lib/VMCore/PassManager.cpp Fri Nov 10 19:10:19 2006 @@ -164,7 +164,7 @@ return false; } -/// Augment RequiredSet by adding analysis required by pass P. +/// Augment RequiredAnalysis by adding analysis required by pass P. void CommonPassManagerImpl::noteDownRequiredAnalysis(Pass *P) { AnalysisUsage AnUsage; P-getAnalysisUsage(AnUsage); @@ -174,6 +174,21 @@ RequiredAnalysis.insert(RequiredAnalysis.end(), RequiredSet.begin(), RequiredSet.end()); } +/// Augement AvailableAnalysis by adding analysis made available by pass P. +void CommonPassManagerImpl::noteDownAvailableAnalysis(Pass *P) { + + if (const PassInfo *PI = P-getPassInfo()) { +AvailableAnalysis.insert(PI); + +//TODO This pass is the current implementation of all of the interfaces it +//TODO implements as well. +//TODO +//TODO const std::vectorconst PassInfo* II = PI-getInterfacesImplemented(); +//TODO for (unsigned i = 0, e = II.size(); i != e; ++i) +//TODO CurrentAnalyses[II[i]] = P; + } +} + /// Remove AnalysisID from the RequiredSet void CommonPassManagerImpl::removeAnalysis(AnalysisID AID) { @@ -202,8 +217,9 @@ if (!manageablePass(P)) return false; - // Take a note of analysis required by this pass. + // Take a note of analysis required and made available by this pass noteDownRequiredAnalysis(P); + noteDownAvailableAnalysis(P); // Add pass PassVector.push_back(BP); @@ -285,8 +301,9 @@ if (!manageablePass(P)) return false; - // Take a note of analysis required by this pass. + // Take a note of analysis required and made available by this pass noteDownRequiredAnalysis(P); + noteDownAvailableAnalysis(P); PassVector.push_back(FP); activeBBPassManager = NULL; @@ -345,8 +362,9 @@ if (!manageablePass(P)) return false; - // Take a note of analysis required by this pass. + // Take a note of analysis required and made available by this pass noteDownRequiredAnalysis(P); + noteDownAvailableAnalysis(P); PassVector.push_back(MP); activeFunctionPassManager = NULL; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.13 - 1.14 --- Log message: Remove analysis that is not preserved by the pass from AvailableAnalysis. --- Diffs of the changes: (+28 -3) PassManager.cpp | 31 --- 1 files changed, 28 insertions(+), 3 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.13 llvm/lib/VMCore/PassManager.cpp:1.14 --- llvm/lib/VMCore/PassManager.cpp:1.13Fri Nov 10 19:10:19 2006 +++ llvm/lib/VMCore/PassManager.cpp Fri Nov 10 19:24:55 2006 @@ -171,7 +171,8 @@ const std::vectorAnalysisID RequiredSet = AnUsage.getRequiredSet(); // FIXME: What about duplicates ? - RequiredAnalysis.insert(RequiredAnalysis.end(), RequiredSet.begin(), RequiredSet.end()); + RequiredAnalysis.insert(RequiredAnalysis.end(), RequiredSet.begin(), + RequiredSet.end()); } /// Augement AvailableAnalysis by adding analysis made available by pass P. @@ -197,8 +198,20 @@ /// Remove Analyss not preserved by Pass P void CommonPassManagerImpl::removeNotPreservedAnalysis(Pass *P) { - - // TODO + AnalysisUsage AnUsage; + P-getAnalysisUsage(AnUsage); + const std::vectorAnalysisID PreservedSet = AnUsage.getPreservedSet(); + + for (std::setAnalysisID::iterator I = AvailableAnalysis.begin(), + E = AvailableAnalysis.end(); I != E; ++I ) { +AnalysisID AID = *I; +if (std::find(PreservedSet.begin(), PreservedSet.end(), *I) == +PreservedSet.end()) { + // Remove this analysis + std::setAnalysisID::iterator J = I++; + AvailableAnalysis.erase(J); +} + } } /// BasicBlockPassManager implementation @@ -223,6 +236,10 @@ // Add pass PassVector.push_back(BP); + + // Remove the analysis not preserved by this pass + removeNotPreservedAnalysis(P); + return true; } @@ -306,6 +323,10 @@ noteDownAvailableAnalysis(P); PassVector.push_back(FP); + + // Remove the analysis not preserved by this pass + removeNotPreservedAnalysis(P); + activeBBPassManager = NULL; return true; } @@ -367,6 +388,10 @@ noteDownAvailableAnalysis(P); PassVector.push_back(MP); + + // Remove the analysis not preserved by this pass + removeNotPreservedAnalysis(P); + activeFunctionPassManager = NULL; return true; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.14 - 1.15 --- Log message: Move CommonPassManagerImpl from PassManager.h to PassManager.cpp --- Diffs of the changes: (+39 -0) PassManager.cpp | 39 +++ 1 files changed, 39 insertions(+) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.14 llvm/lib/VMCore/PassManager.cpp:1.15 --- llvm/lib/VMCore/PassManager.cpp:1.14Fri Nov 10 19:24:55 2006 +++ llvm/lib/VMCore/PassManager.cpp Fri Nov 10 19:31:05 2006 @@ -14,11 +14,50 @@ #include llvm/PassManager.h #include llvm/Module.h +#include vector +#include set using namespace llvm; namespace llvm { +/// CommonPassManagerImpl helps pass manager analysis required by +/// the managed passes. It provides methods to add/remove analysis +/// available and query if certain analysis is available or not. +class CommonPassManagerImpl : public Pass { + +public: + + /// Return true IFF pass P's required analysis set does not required new + /// manager. + bool manageablePass(Pass *P); + + /// Return true IFF AnalysisID AID is currently available. + bool analysisCurrentlyAvailable(AnalysisID AID); + + /// Augment RequiredAnalysis by adding analysis required by pass P. + void noteDownRequiredAnalysis(Pass *P); + + /// Augment AvailableAnalysis by adding analysis made available by pass P. + void noteDownAvailableAnalysis(Pass *P); + + /// Remove AnalysisID from the RequiredSet + void removeAnalysis(AnalysisID AID); + + /// Remove Analysis that is not preserved by the pass + void removeNotPreservedAnalysis(Pass *P); + + /// Remove dead passes + void removeDeadPasses() { /* TODO : Implement */ } + +private: + // Analysis required by the passes managed by this manager + std::vectorAnalysisID RequiredAnalysis; + + // set of available Analysis + std::setAnalysisID AvailableAnalysis; +}; + /// BasicBlockPassManager_New manages BasicBlockPass. It batches all the /// pass together and sequence them to process one basic block before /// processing next basic block. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/PassManager.h
Changes in directory llvm/include/llvm: PassManager.h updated: 1.29 - 1.30 --- Log message: Move CommonPassManagerImpl from PassManager.h to PassManager.cpp --- Diffs of the changes: (+2 -41) PassManager.h | 43 ++- 1 files changed, 2 insertions(+), 41 deletions(-) Index: llvm/include/llvm/PassManager.h diff -u llvm/include/llvm/PassManager.h:1.29 llvm/include/llvm/PassManager.h:1.30 --- llvm/include/llvm/PassManager.h:1.29Fri Nov 10 19:10:19 2006 +++ llvm/include/llvm/PassManager.h Fri Nov 10 19:31:05 2006 @@ -18,8 +18,6 @@ #define LLVM_PASSMANAGER_H #include llvm/Pass.h -#include vector -#include set namespace llvm { @@ -93,45 +91,8 @@ class PassManagerImpl_New; class FunctionPassManagerImpl_New; -/// CommonPassManagerImpl helps pass manager analysis required by -/// the managed passes. It provides methods to add/remove analysis -/// available and query if certain analysis is available or not. -class CommonPassManagerImpl : public Pass{ - -public: - - /// Return true IFF pass P's required analysis set does not required new - /// manager. - bool manageablePass(Pass *P); - - /// Return true IFF AnalysisID AID is currently available. - bool analysisCurrentlyAvailable(AnalysisID AID); - - /// Augment RequiredAnalysis by adding analysis required by pass P. - void noteDownRequiredAnalysis(Pass *P); - - /// Augment AvailableAnalysis by adding analysis made available by pass P. - void noteDownAvailableAnalysis(Pass *P); - - /// Remove AnalysisID from the RequiredSet - void removeAnalysis(AnalysisID AID); - - /// Remove Analysis that is not preserved by the pass - void removeNotPreservedAnalysis(Pass *P); - - /// Remove dead passes - void removeDeadPasses() { /* TODO : Implement */ } - -private: - // Analysis required by the passes managed by this manager - std::vectorAnalysisID RequiredAnalysis; - - // set of available Analysis - std::setAnalysisID AvailableAnalysis; -}; - /// PassManager_New manages ModulePassManagers -class PassManager_New : public CommonPassManagerImpl { +class PassManager_New { public: @@ -156,7 +117,7 @@ }; /// FunctionPassManager_New manages FunctionPasses and BasicBlockPassManagers. -class FunctionPassManager_New : public CommonPassManagerImpl { +class FunctionPassManager_New { public: FunctionPassManager_New(ModuleProvider *P) { /* TODO */ } FunctionPassManager_New(); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.15 - 1.16 --- Log message: Code refactoring. Move common code into CommonPassManagerImpl :) --- Diffs of the changes: (+41 -49) PassManager.cpp | 90 +--- 1 files changed, 41 insertions(+), 49 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.15 llvm/lib/VMCore/PassManager.cpp:1.16 --- llvm/lib/VMCore/PassManager.cpp:1.15Fri Nov 10 19:31:05 2006 +++ llvm/lib/VMCore/PassManager.cpp Fri Nov 10 19:51:02 2006 @@ -50,12 +50,27 @@ /// Remove dead passes void removeDeadPasses() { /* TODO : Implement */ } + /// Add pass P into the PassVector. Update RequiredAnalysis and + /// AvailableAnalysis appropriately + void addPassToManager (Pass *P); + + inline std::vectorPass *::iterator passVectorBegin() { +return PassVector.begin(); + } + + inline std::vectorPass *::iterator passVectorEnd() { +return PassVector.end(); + } + private: // Analysis required by the passes managed by this manager std::vectorAnalysisID RequiredAnalysis; // set of available Analysis std::setAnalysisID AvailableAnalysis; + + // Collection of pass that are managed by this manager + std::vectorPass * PassVector; }; /// BasicBlockPassManager_New manages BasicBlockPass. It batches all the @@ -74,8 +89,6 @@ bool runOnFunction(Function F); private: - // Collection of pass that are managed by this manager - std::vectorPass * PassVector; }; /// FunctionPassManagerImpl_New manages FunctionPasses and BasicBlockPassManagers. @@ -106,9 +119,6 @@ bool runOnModule(Module M); private: - // Collection of pass that are manged by this manager - std::vectorPass * PassVector; - // Active Pass Managers BasicBlockPassManager_New *activeBBPassManager; }; @@ -129,9 +139,6 @@ bool runOnModule(Module M); private: - // Collection of pass that are managed by this manager - std::vectorPass * PassVector; - // Active Pass Manager FunctionPassManagerImpl_New *activeFunctionPassManager; }; @@ -163,9 +170,6 @@ // Collection of pass managers std::vectorModulePassManager_New * PassManagers; - // Collection of pass that are not yet scheduled - std::vectorPass * PassVector; - // Active Pass Manager ModulePassManager_New *activeManager; }; @@ -243,7 +247,6 @@ for (std::setAnalysisID::iterator I = AvailableAnalysis.begin(), E = AvailableAnalysis.end(); I != E; ++I ) { -AnalysisID AID = *I; if (std::find(PreservedSet.begin(), PreservedSet.end(), *I) == PreservedSet.end()) { // Remove this analysis @@ -253,6 +256,21 @@ } } +/// Add pass P into the PassVector. Update RequiredAnalysis and +/// AvailableAnalysis appropriately +void CommonPassManagerImpl::addPassToManager (Pass *P) { + + // Take a note of analysis required and made available by this pass + noteDownRequiredAnalysis(P); + noteDownAvailableAnalysis(P); + + // Add pass + PassVector.push_back(P); + + // Remove the analysis not preserved by this pass + removeNotPreservedAnalysis(P); +} + /// BasicBlockPassManager implementation /// Add pass P into PassVector and return true. If this pass is not @@ -269,15 +287,7 @@ if (!manageablePass(P)) return false; - // Take a note of analysis required and made available by this pass - noteDownRequiredAnalysis(P); - noteDownAvailableAnalysis(P); - - // Add pass - PassVector.push_back(BP); - - // Remove the analysis not preserved by this pass - removeNotPreservedAnalysis(P); + addPassToManager (BP); return true; } @@ -290,8 +300,8 @@ bool Changed = false; for (Function::iterator I = F.begin(), E = F.end(); I != E; ++I) -for (std::vectorPass *::iterator itr = PassVector.begin(), - e = PassVector.end(); itr != e; ++itr) { +for (std::vectorPass *::iterator itr = passVectorBegin(), + e = passVectorEnd(); itr != e; ++itr) { Pass *P = *itr; BasicBlockPass *BP = dynamic_castBasicBlockPass*(P); Changed |= BP-runOnBasicBlock(*I); @@ -340,8 +350,7 @@ || !activeBBPassManager-addPass(BP)) { activeBBPassManager = new BasicBlockPassManager_New(); - - PassVector.push_back(activeBBPassManager); + addPassToManager(activeBBPassManager); if (!activeBBPassManager-addPass(BP)) assert(0 Unable to add Pass); } @@ -357,15 +366,7 @@ if (!manageablePass(P)) return false; - // Take a note of analysis required and made available by this pass - noteDownRequiredAnalysis(P); - noteDownAvailableAnalysis(P); - - PassVector.push_back(FP); - - // Remove the analysis not preserved by this pass - removeNotPreservedAnalysis(P); - + addPassToManager (FP); activeBBPassManager = NULL; return true; } @@ -378,8 +379,8 @@ bool Changed = false; for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) -for
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.16 - 1.17 --- Log message: Remove dead code. --- Diffs of the changes: (+0 -9) PassManager.cpp |9 - 1 files changed, 9 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.16 llvm/lib/VMCore/PassManager.cpp:1.17 --- llvm/lib/VMCore/PassManager.cpp:1.16Fri Nov 10 19:51:02 2006 +++ llvm/lib/VMCore/PassManager.cpp Fri Nov 10 19:56:39 2006 @@ -41,9 +41,6 @@ /// Augment AvailableAnalysis by adding analysis made available by pass P. void noteDownAvailableAnalysis(Pass *P); - /// Remove AnalysisID from the RequiredSet - void removeAnalysis(AnalysisID AID); - /// Remove Analysis that is not preserved by the pass void removeNotPreservedAnalysis(Pass *P); @@ -233,12 +230,6 @@ } } -/// Remove AnalysisID from the RequiredSet -void CommonPassManagerImpl::removeAnalysis(AnalysisID AID) { - - // TODO -} - /// Remove Analyss not preserved by Pass P void CommonPassManagerImpl::removeNotPreservedAnalysis(Pass *P) { AnalysisUsage AnUsage; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.17 - 1.18 --- Log message: While adding pass into the manager, process Analysis only if it is required to do so. --- Diffs of the changes: (+15 -12) PassManager.cpp | 27 +++ 1 files changed, 15 insertions(+), 12 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.17 llvm/lib/VMCore/PassManager.cpp:1.18 --- llvm/lib/VMCore/PassManager.cpp:1.17Fri Nov 10 19:56:39 2006 +++ llvm/lib/VMCore/PassManager.cpp Fri Nov 10 20:04:19 2006 @@ -48,8 +48,8 @@ void removeDeadPasses() { /* TODO : Implement */ } /// Add pass P into the PassVector. Update RequiredAnalysis and - /// AvailableAnalysis appropriately - void addPassToManager (Pass *P); + /// AvailableAnalysis appropriately if ProcessAnalysis is true. + void addPassToManager (Pass *P, bool ProcessAnalysis = true); inline std::vectorPass *::iterator passVectorBegin() { return PassVector.begin(); @@ -248,18 +248,21 @@ } /// Add pass P into the PassVector. Update RequiredAnalysis and -/// AvailableAnalysis appropriately -void CommonPassManagerImpl::addPassToManager (Pass *P) { +/// AvailableAnalysis appropriately if ProcessAnalysis is true. +void CommonPassManagerImpl::addPassToManager (Pass *P, + bool ProcessAnalysis) { + + if (ProcessAnalysis) { +// Take a note of analysis required and made available by this pass +noteDownRequiredAnalysis(P); +noteDownAvailableAnalysis(P); - // Take a note of analysis required and made available by this pass - noteDownRequiredAnalysis(P); - noteDownAvailableAnalysis(P); +// Remove the analysis not preserved by this pass +removeNotPreservedAnalysis(P); + } // Add pass PassVector.push_back(P); - - // Remove the analysis not preserved by this pass - removeNotPreservedAnalysis(P); } /// BasicBlockPassManager implementation @@ -341,7 +344,7 @@ || !activeBBPassManager-addPass(BP)) { activeBBPassManager = new BasicBlockPassManager_New(); - addPassToManager(activeBBPassManager); + addPassToManager(activeBBPassManager, false); if (!activeBBPassManager-addPass(BP)) assert(0 Unable to add Pass); } @@ -397,7 +400,7 @@ || !activeFunctionPassManager-addPass(P)) { activeFunctionPassManager = new FunctionPassManagerImpl_New(); - addPassToManager(activeFunctionPassManager); + addPassToManager(activeFunctionPassManager, false); if (!activeFunctionPassManager-addPass(FP)) assert(0 Unable to add pass); } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.18 - 1.19 --- Log message: Implement PassManagerImpl_New::add(). Just add pass into the pass manager queue without processing analysis. --- Diffs of the changes: (+1 -1) PassManager.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.18 llvm/lib/VMCore/PassManager.cpp:1.19 --- llvm/lib/VMCore/PassManager.cpp:1.18Fri Nov 10 20:04:19 2006 +++ llvm/lib/VMCore/PassManager.cpp Fri Nov 10 20:06:21 2006 @@ -447,7 +447,7 @@ /// Add pass P to the queue of passes to run. void PassManagerImpl_New::add(Pass *P) { - /* TODO */ + addPassToManager(P, false); } // PassManager_New implementation ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore: PassManager.cpp updated: 1.19 - 1.20 --- Log message: Implement schedulePasses(). --- Diffs of the changes: (+40 -9) PassManager.cpp | 49 - 1 files changed, 40 insertions(+), 9 deletions(-) Index: llvm/lib/VMCore/PassManager.cpp diff -u llvm/lib/VMCore/PassManager.cpp:1.19 llvm/lib/VMCore/PassManager.cpp:1.20 --- llvm/lib/VMCore/PassManager.cpp:1.19Fri Nov 10 20:06:21 2006 +++ llvm/lib/VMCore/PassManager.cpp Fri Nov 10 20:22:31 2006 @@ -160,6 +160,11 @@ /// Add a pass into a passmanager queue. This is used by schedulePasses bool addPass(Pass *p); + /// Schedule pass P for execution. Make sure that passes required by + /// P are run before P is run. Update analysis info maintained by + /// the manager. Remove dead passes. This is a recursive function. + void schedulePass(Pass *P); + /// Schedule all passes collected in pass queue using add(). Add all the /// schedule passes into various manager's queue using addPass(). void schedulePasses(); @@ -437,24 +442,51 @@ return Changed; } +/// Schedule pass P for execution. Make sure that passes required by +/// P are run before P is run. Update analysis info maintained by +/// the manager. Remove dead passes. This is a recursive function. +void PassManagerImpl_New::schedulePass(Pass *P) { + + AnalysisUsage AnUsage; + P-getAnalysisUsage(AnUsage); + const std::vectorAnalysisID RequiredSet = AnUsage.getRequiredSet(); + for (std::vectorAnalysisID::const_iterator I = RequiredSet.begin(), + E = RequiredSet.end(); I != E; ++I) { + +// TODO Check if Analysis is currently available or not. +bool available = false; +if (!available) { + // Schedule this analysis run first. + Pass *AP = (*I)-createPass(); + schedulePass(AP); +} + } + + addPass(P); + + // TODO : Walk through all managers and remove not preserved analysis + // TODO : remove dead passes +} + /// Schedule all passes from the queue by adding them in their /// respective manager's queue. -void -PassManagerImpl_New::schedulePasses() { - /* TODO */ +void PassManagerImpl_New::schedulePasses() { + for (std::vectorPass *::iterator I = passVectorBegin(), + E = passVectorEnd(); I != E; ++I) +schedulePass (*I); } /// Add pass P to the queue of passes to run. -void -PassManagerImpl_New::add(Pass *P) { +void PassManagerImpl_New::add(Pass *P) { + // Do not process Analysis now. Analysis is process while scheduling + // the pass vector. addPassToManager(P, false); } // PassManager_New implementation /// Add P into active pass manager or use new module pass manager to /// manage it. -bool -PassManagerImpl_New::addPass(Pass *P) { +bool PassManagerImpl_New::addPass(Pass *P) { if (!activeManager || !activeManager-addPass(P)) { activeManager = new ModulePassManager_New(); @@ -466,8 +498,7 @@ /// run - Execute all of the passes scheduled for execution. Keep track of /// whether any of the passes modifies the module, and if so, return true. -bool -PassManagerImpl_New::run(Module M) { +bool PassManagerImpl_New::run(Module M) { schedulePasses(); bool Changed = false; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstr64Bit.td PPCInstrInfo.td
Changes in directory llvm/lib/Target/PowerPC: PPCInstr64Bit.td updated: 1.23 - 1.24 PPCInstrInfo.td updated: 1.256 - 1.257 --- Log message: Mark operands as symbol lo instead of imm32 so that they print lo(x) around globals. --- Diffs of the changes: (+11 -11) PPCInstr64Bit.td | 10 +- PPCInstrInfo.td | 12 ++-- 2 files changed, 11 insertions(+), 11 deletions(-) Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td diff -u llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.23 llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.24 --- llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.23 Fri Nov 10 17:58:45 2006 +++ llvm/lib/Target/PowerPC/PPCInstr64Bit.tdFri Nov 10 22:51:36 2006 @@ -249,7 +249,7 @@ PPC970_DGroup_Cracked; // Update forms. -def LHAU8 : DForm_143, (ops G8RC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LHAU8 : DForm_143, (ops G8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp, ptr_rc:$rA), lhau $rD, $disp($rA), LdStGeneral, [], RegConstraint$rA = $rA_result; @@ -281,15 +281,15 @@ // Update forms. -def LBZU8 : DForm_135, (ops G8RC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LBZU8 : DForm_135, (ops G8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp, ptr_rc:$rA), lbzu $rD, $disp($rA), LdStGeneral, [], RegConstraint$rA = $rA_result; -def LHZU8 : DForm_141, (ops G8RC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LHZU8 : DForm_141, (ops G8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp, ptr_rc:$rA), lhzu $rD, $disp($rA), LdStGeneral, [], RegConstraint$rA = $rA_result; -def LWZU8 : DForm_133, (ops G8RC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LWZU8 : DForm_133, (ops G8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp, ptr_rc:$rA), lwzu $rD, $disp($rA), LdStGeneral, [], RegConstraint$rA = $rA_result; @@ -306,7 +306,7 @@ ldx $rD, $src, LdStLD, [(set G8RC:$rD, (load xaddr:$src))], isPPC64; -def LDU : DSForm_158, 1, (ops G8RC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LDU : DSForm_158, 1, (ops G8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp, ptr_rc:$rA), ldu $rD, $disp($rA), LdStLD, [], RegConstraint$rA = $rA_result, isPPC64; Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.256 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.257 --- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.256 Fri Nov 10 11:51:02 2006 +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td Fri Nov 10 22:51:36 2006 @@ -432,31 +432,31 @@ // FIXME: PTRRC for Pointer regs for ppc64. // 'Update' load forms. -def LBZU : DForm_135, (ops GPRC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LBZU : DForm_135, (ops GPRC:$rD, ptr_rc:$rA_result, symbolLo:$disp, ptr_rc:$rA), lbzu $rD, $disp($rA), LdStGeneral, [], RegConstraint$rA = $rA_result; -def LHAU : DForm_143, (ops GPRC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LHAU : DForm_143, (ops GPRC:$rD, ptr_rc:$rA_result, symbolLo:$disp, ptr_rc:$rA), lhau $rD, $disp($rA), LdStGeneral, [], RegConstraint$rA = $rA_result; -def LHZU : DForm_141, (ops GPRC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LHZU : DForm_141, (ops GPRC:$rD, ptr_rc:$rA_result, symbolLo:$disp, ptr_rc:$rA), lhzu $rD, $disp($rA), LdStGeneral, [], RegConstraint$rA = $rA_result; -def LWZU : DForm_133, (ops GPRC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LWZU : DForm_133, (ops GPRC:$rD, ptr_rc:$rA_result, symbolLo:$disp, ptr_rc:$rA), lwzu $rD, $disp($rA), LdStGeneral, [], RegConstraint$rA = $rA_result; -def LFSU : DForm_149, (ops F4RC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LFSU : DForm_149, (ops F4RC:$rD, ptr_rc:$rA_result, symbolLo:$disp, ptr_rc:$rA), lfs $rD, $disp($rA), LdStLFDU, [], RegConstraint$rA = $rA_result; -def LFDU : DForm_151, (ops F8RC:$rD, ptr_rc:$rA_result, i32imm:$disp, +def LFDU : DForm_151, (ops F8RC:$rD, ptr_rc:$rA_result, symbolLo:$disp, ptr_rc:$rA), lfd $rD, $disp($rA), LdStLFD, [], RegConstraint$rA = $rA_result; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits