[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

[Evan Cheng]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.424 - 1.425
---
Log message:

Clean up some bad code.

---
Diffs of the changes:  (+3 -5)

 LegalizeDAG.cpp |8 +++-
 1 files changed, 3 insertions(+), 5 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.424 
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.425
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.424 Sun Dec 10 20:23:46 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp   Mon Dec 11 00:25:26 2006
@@ -4567,12 +4567,10 @@
   Tmp = TLI.LowerOperation(DAG.getNode(ISD::BIT_CONVERT, VT, Tmp), DAG);
 }
 
-MVT::ValueType NVT = Node-getValueType(0);
 // f32 / f64 must be expanded to i32 / i64.
-if (NVT == MVT::f32 || NVT == MVT::f64) {
-  Lo = DAG.getNode(ISD::BIT_CONVERT, TLI.getTypeToTransformTo(NVT),
-   Node-getOperand(0));
-  Hi = DAG.getConstant(0, TLI.getTypeToTransformTo(NVT));
+if (VT == MVT::f32 || VT == MVT::f64) {
+  Lo = DAG.getNode(ISD::BIT_CONVERT, NVT, Node-getOperand(0));
+  Hi = DAG.getConstant(0, NVT);
   break;
 }
 



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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

[Evan Cheng]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.425 - 1.426
---
Log message:

f32 / f64 node is expanded to one i32 / i64 node.

---
Diffs of the changes:  (+12 -5)

 LegalizeDAG.cpp |   17 -
 1 files changed, 12 insertions(+), 5 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.425 
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.426
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.425 Mon Dec 11 00:25:26 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp   Mon Dec 11 00:50:04 2006
@@ -1547,7 +1547,10 @@
 if (Tmp2.getValueType() != MVT::Vector) {
   SDOperand Lo, Hi;
   ExpandOp(Tmp2, Lo, Hi);
-  Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, Hi, Tmp3);
+  if (Hi.Val)
+Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3, 
Hi,Tmp3);
+  else
+Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Tmp3);
   Result = LegalizeOp(Result);
 } else {
   SDNode *InVal = Tmp2.Val;
@@ -1609,8 +1612,10 @@
   ExpandOp(Node-getOperand(i), Lo, Hi);
   NewValues.push_back(Lo);
   NewValues.push_back(Node-getOperand(i+1));
-  NewValues.push_back(Hi);
-  NewValues.push_back(Node-getOperand(i+1));
+  if (Hi.Val) {
+NewValues.push_back(Hi);
+NewValues.push_back(Node-getOperand(i+1));
+  }
   break;
 }
 case Promote:
@@ -4570,7 +4575,7 @@
 // f32 / f64 must be expanded to i32 / i64.
 if (VT == MVT::f32 || VT == MVT::f64) {
   Lo = DAG.getNode(ISD::BIT_CONVERT, NVT, Node-getOperand(0));
-  Hi = DAG.getConstant(0, NVT);
+  Hi = SDOperand();
   break;
 }
 
@@ -4873,7 +4878,9 @@
   // is a type that requires multi-step expansion.
   if (getTypeAction(NVT) != Expand  NVT != MVT::isVoid) {
 Lo = LegalizeOp(Lo);
-Hi = LegalizeOp(Hi);
+if (Hi.Val)
+  // Don't legalize the high part if it is expanded to a single node.
+  Hi = LegalizeOp(Hi);
   }
 
   // Remember in a map if the values will be reused later.



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