[llvm-commits] CVS: llvm-test/SingleSource/UnitTests/Integer/APInt/arith.cpp
Changes in directory llvm-test/SingleSource/UnitTests/Integer/APInt:
arith.cpp updated: 1.7 - 1.8
---
Log message:
Update for changes in APInt interface.
---
Diffs of the changes: (+53 -51)
arith.cpp | 104 +++---
1 files changed, 53 insertions(+), 51 deletions(-)
Index: llvm-test/SingleSource/UnitTests/Integer/APInt/arith.cpp
diff -u llvm-test/SingleSource/UnitTests/Integer/APInt/arith.cpp:1.7
llvm-test/SingleSource/UnitTests/Integer/APInt/arith.cpp:1.8
--- llvm-test/SingleSource/UnitTests/Integer/APInt/arith.cpp:1.7Thu Feb
15 00:29:21 2007
+++ llvm-test/SingleSource/UnitTests/Integer/APInt/arith.cppSat Feb 17
02:18:20 2007
@@ -15,26 +15,26 @@
using namespace llvm;
-APInt x(0x1f, 21);
+APInt x(21, 0x1f);
-APInt y(0x0f, 21);
+APInt y(21, 0x0f);
static std::string temp_str;
const char* str(const APInt X) {
- temp_str = X.to_string();
+ temp_str = X.toString();
return temp_str.c_str();
}
void test_interface(const APInt val) {
printf(INTERFACE TEST: val = %s\n, str(val));
- unsigned bitwidth = val.getNumBits();
+ unsigned bitwidth = val.getBitWidth();
unsigned pos = rand() % bitwidth;
printf(val[%u] = %d\n, pos, val[pos]);
- APInt smax = APInt::getMaxValue(bitwidth, true);
- APInt umax = APInt::getMaxValue(bitwidth, false);
- APInt smin = APInt::getMinValue(bitwidth, true);
- APInt umin = APInt::getMinValue(bitwidth, false);
+ APInt smax(APInt::getMaxValue(bitwidth, true));
+ APInt umax(APInt::getMaxValue(bitwidth, false));
+ APInt smin(APInt::getMinValue(bitwidth, true));
+ APInt umin(APInt::getMinValue(bitwidth, false));
printf(APInt::getMaxValue(%d, true) = %s\n, bitwidth, str(smax));
printf(APInt::getMaxValue(%d, false) = %s\n, bitwidth, str(umax));
printf(APInt::getMinValue(%d, true) = %s\n, bitwidth, str(smin));
@@ -60,9 +60,9 @@
x.flip();
printf(val.flip() = %s\n, str(x));
unsigned bitsize = bitwidth / 2;
- printf(val.HiBits(%d) = %s\n, bitsize, str(val.HiBits(bitsize)));
- printf(val.LoBits(%d) = %s\n, bitsize, str(val.LoBits(bitsize)));
- printf(val.IsIntN(%d) = %d\n, bitwidth, val.IsIntN(bitwidth));
+ printf(val.getHiBits(%d) = %s\n, bitsize, str(val.getHiBits(bitsize)));
+ printf(val.getLoBits(%d) = %s\n, bitsize, str(val.getLoBits(bitsize)));
+ printf(val.isIntN(%d) = %d\n, bitwidth, val.isIntN(bitwidth));
}
void test_unops(const APInt val) {
@@ -85,18 +85,18 @@
printf(~val = %s\n, str(x));
printf(!val = %d\n, !val);
printf(val.isPowerOf2() = %d\n, val.isPowerOf2());
- printf(val.LogBase2() = %d\n, val.getNumBits());
- printf(val.CountLeadingZeros() = %d\n, val.CountLeadingZeros());
- printf(val.CountTrailingZeros() = %d\n, val.CountTrailingZeros());
- printf(val.CountPopulation() = %d\n, val.CountPopulation());
- printf(val.getNumBits() = %d\n, val.getNumBits());
- if (val.getNumBits() = 16 val.getNumBits() % 16 == 0) {
-x = val.ByteSwap();
-printf(val.ByteSwap() = %d\n, str(x));
+ printf(val.logBase2() = %d\n, val.logBase2());
+ printf(val.countLeadingZeros() = %d\n, val.countLeadingZeros());
+ printf(val.countTrailingZeros() = %d\n, val.countTrailingZeros());
+ printf(val.countPopulation() = %d\n, val.countPopulation());
+ printf(val.getBitWidth() = %d\n, val.getBitWidth());
+ if (val.getBitWidth() = 16 val.getBitWidth() % 16 == 0) {
+x = val.byteSwap();
+printf(val.byteSwap() = %d\n, str(x));
}
- printf(val.RoundToDouble(true) %d = %f\n, val.RoundToDouble(true));
+ printf(val.roundToDouble(true) %d = %f\n, val.roundToDouble(true));
printf(val.getValue() = );
- if (val.getNumBits() 64)
+ if (val.getBitWidth() 64)
printf(too wide\n);
else
printf(%lu\n, val.getValue());
@@ -129,10 +129,6 @@
printf(v1 | v2: %s\n, str(result));
result = v1 ^ v2;
printf(v1 ^ v2: %s\n, str(result));
- result = v1 v2;
- printf(v1 v2: %s\n, str(result));
- result = v1 || v2;
- printf(v1 || v2: %s\n, str(result));
result = v1 * v2;
printf(v1 * v2: %s\n, str(result));
result = v1 + v2;
@@ -141,30 +137,36 @@
printf(v1 - v2: %s\n, str(result));
printf(v1 == v2: %d\n, v1 == v2);
printf(v1 != v2: %d\n, v1 == v2);
- printf(v1 v2: %d\n, v1 == v2);
- printf(v1 = v2: %d\n, v1 == v2);
- printf(v1 v2: %d\n, v1 == v2);
- printf(v1 = v2: %d\n, v1 == v2);
+ printf(v1.eq(v2): %d\n, v1.eq(v2));
+ printf(v1.ne(v2): %d\n, v1.ne(v2));
+ printf(v1.ult(v2): %d\n, v1.ult(v2));
+ printf(v1.slt(v2): %d\n, v1.slt(v2));
+ printf(v1.ule(v2): %d\n, v1.ule(v2));
+ printf(v1.sle(v2): %d\n, v1.sle(v2));
+ printf(v1.ugt(v2): %d\n, v1.ugt(v2));
+ printf(v1.sgt(v2): %d\n, v1.sgt(v2));
+ printf(v1.uge(v2): %d\n, v1.uge(v2));
+ printf(v1.sge(v2): %d\n, v1.sge(v2));
{
using namespace APIntOps;
-unsigned shiftAmt = rand() % v1.getNumBits();
-result = AShr(v1,shiftAmt);
-printf(AShr(v1,%d) = %s\n, shiftAmt, str(result));
-result = LShr(v1,shiftAmt);
[llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h
Changes in directory llvm/include/llvm/Target:
MRegisterInfo.h updated: 1.91 - 1.92
---
Log message:
- Added regsOverlap() to test if two registers overlap. Or in case they are
virtual registers, test if they the same.
- Added a virtual method to return target specific reserved registers, e.g. SP.
---
Diffs of the changes: (+17 -0)
MRegisterInfo.h | 17 +
1 files changed, 17 insertions(+)
Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.91
llvm/include/llvm/Target/MRegisterInfo.h:1.92
--- llvm/include/llvm/Target/MRegisterInfo.h:1.91 Wed Feb 14 23:57:14 2007
+++ llvm/include/llvm/Target/MRegisterInfo.hSat Feb 17 05:04:35 2007
@@ -284,6 +284,17 @@
return false;
}
+ /// regsOverlap - Returns true if the two registers are equal or alias
+ /// each other. The registers may be virtual register.
+ bool regsOverlap(unsigned regA, unsigned regB) const {
+if (regA == regB)
+ return true;
+
+if (isVirtualRegister(regA) || isVirtualRegister(regB))
+ return false;
+return areAliases(regA, regB);
+ }
+
/// getCalleeSavedRegs - Return a null-terminated list of all of the
/// callee saved registers on this target. The register should be in the
/// order of desired callee-save stack frame offset. The first register is
@@ -295,6 +306,12 @@
/// length of this list match the getCalleeSaveRegs() list.
virtual const TargetRegisterClass* const *getCalleeSavedRegClasses() const
=0;
+ /// getReservedRegs - Returns a bitset indexed by physical register number
+ /// indicating if a register is a special register that has particular uses
and
+ /// should be considered unavailable at all times, e.g. SP, RA. This is used
by
+ /// register scavenger to determine what registers are free.
+ virtual BitVector getReservedRegs(const MachineFunction MF) const = 0;
+
//======//
// Register Class Information
//
___
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[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcRegisterInfo.cpp SparcRegisterInfo.h
Changes in directory llvm/lib/Target/Sparc:
SparcRegisterInfo.cpp updated: 1.51 - 1.52
SparcRegisterInfo.h updated: 1.17 - 1.18
---
Log message:
Added getReservedRegs().
---
Diffs of the changes: (+19 -0)
SparcRegisterInfo.cpp | 17 +
SparcRegisterInfo.h |2 ++
2 files changed, 19 insertions(+)
Index: llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.51
llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.52
--- llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.51Mon Jan 22 18:56:45 2007
+++ llvm/lib/Target/Sparc/SparcRegisterInfo.cpp Sat Feb 17 05:06:00 2007
@@ -20,6 +20,7 @@
#include llvm/CodeGen/MachineLocation.h
#include llvm/Target/TargetInstrInfo.h
#include llvm/Type.h
+#include llvm/ADT/BitVector.h
#include llvm/ADT/STLExtras.h
using namespace llvm;
@@ -116,6 +117,22 @@
return CalleeSavedRegs;
}
+BitVector SparcRegisterInfo::getReservedRegs(const MachineFunction MF) const {
+ BitVector Reserved(getNumRegs());
+ Reserved.set(SP::G2);
+ Reserved.set(SP::G3);
+ Reserved.set(SP::G4);
+ Reserved.set(SP::O6);
+ Reserved.set(SP::I6);
+ Reserved.set(SP::I7);
+ Reserved.set(SP::G0);
+ Reserved.set(SP::G5);
+ Reserved.set(SP::G6);
+ Reserved.set(SP::G7);
+ return Reserved;
+}
+
+
const TargetRegisterClass* const*
SparcRegisterInfo::getCalleeSavedRegClasses() const {
static const TargetRegisterClass * const CalleeSavedRegClasses[] = { 0 };
Index: llvm/lib/Target/Sparc/SparcRegisterInfo.h
diff -u llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.17
llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.18
--- llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.17 Mon Jan 22 18:56:45 2007
+++ llvm/lib/Target/Sparc/SparcRegisterInfo.h Sat Feb 17 05:06:00 2007
@@ -52,6 +52,8 @@
const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
+ BitVector getReservedRegs(const MachineFunction MF) const;
+
bool hasFP(const MachineFunction MF) const;
void eliminateCallFramePseudoInstr(MachineFunction MF,
___
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[llvm-commits] CVS: llvm/lib/Target/MRegisterInfo.cpp
Changes in directory llvm/lib/Target: MRegisterInfo.cpp updated: 1.19 - 1.20 --- Log message: Added getReservedRegs(). --- Diffs of the changes: (+1 -1) MRegisterInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/MRegisterInfo.cpp diff -u llvm/lib/Target/MRegisterInfo.cpp:1.19 llvm/lib/Target/MRegisterInfo.cpp:1.20 --- llvm/lib/Target/MRegisterInfo.cpp:1.19 Wed Feb 14 23:59:24 2007 +++ llvm/lib/Target/MRegisterInfo.cpp Sat Feb 17 05:06:00 2007 @@ -41,7 +41,7 @@ const TargetRegisterClass *RC = *I; for (TargetRegisterClass::iterator I = RC-allocation_order_begin(MF), E = RC-allocation_order_end(MF); I != E; ++I) - Allocatable[*I] = true; + Allocatable.set(*I); } return Allocatable; } ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/ARM/ARMRegisterInfo.cpp ARMRegisterInfo.h
Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.cpp updated: 1.66 - 1.67
ARMRegisterInfo.h updated: 1.7 - 1.8
---
Log message:
Added getReservedRegs().
---
Diffs of the changes: (+17 -0)
ARMRegisterInfo.cpp | 15 +++
ARMRegisterInfo.h |2 ++
2 files changed, 17 insertions(+)
Index: llvm/lib/Target/ARM/ARMRegisterInfo.cpp
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.66
llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.67
--- llvm/lib/Target/ARM/ARMRegisterInfo.cpp:1.66Wed Feb 7 15:44:33 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.cpp Sat Feb 17 05:06:00 2007
@@ -28,6 +28,7 @@
#include llvm/Target/TargetFrameInfo.h
#include llvm/Target/TargetMachine.h
#include llvm/Target/TargetOptions.h
+#include llvm/ADT/BitVector.h
#include llvm/ADT/SmallVector.h
#include llvm/ADT/STLExtras.h
#include algorithm
@@ -297,6 +298,20 @@
return CalleeSavedRegClasses;
}
+BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction MF) const {
+ BitVector Reserved(getNumRegs());
+ Reserved.set(ARM::SP);
+ if (STI.isTargetDarwin() || hasFP(MF))
+Reserved.set(FramePtr);
+ // Some targets reserve R9.
+ if (STI.isR9Reserved())
+Reserved.set(ARM::R9);
+ // At PEI time, if LR is used, it will be spilled upon entry.
+ if (MF.getUsedPhysregs() !MF.isPhysRegUsed((unsigned)ARM::LR))
+Reserved.set(ARM::LR);
+ return Reserved;
+}
+
/// hasFP - Return true if the specified function should have a dedicated frame
/// pointer register. This is true if the function has variable sized allocas
/// or if frame pointer elimination is disabled.
Index: llvm/lib/Target/ARM/ARMRegisterInfo.h
diff -u llvm/lib/Target/ARM/ARMRegisterInfo.h:1.7
llvm/lib/Target/ARM/ARMRegisterInfo.h:1.8
--- llvm/lib/Target/ARM/ARMRegisterInfo.h:1.7 Wed Jan 24 21:07:27 2007
+++ llvm/lib/Target/ARM/ARMRegisterInfo.h Sat Feb 17 05:06:00 2007
@@ -67,6 +67,8 @@
const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
+ BitVector getReservedRegs(const MachineFunction MF) const;
+
bool hasFP(const MachineFunction MF) const;
void eliminateCallFramePseudoInstr(MachineFunction MF,
___
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[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp X86RegisterInfo.h
Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.200 - 1.201
X86RegisterInfo.h updated: 1.45 - 1.46
---
Log message:
Added getReservedRegs().
---
Diffs of the changes: (+22 -0)
X86RegisterInfo.cpp | 16
X86RegisterInfo.h |6 ++
2 files changed, 22 insertions(+)
Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.200
llvm/lib/Target/X86/X86RegisterInfo.cpp:1.201
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.200 Mon Jan 29 17:20:22 2007
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp Sat Feb 17 05:06:00 2007
@@ -31,6 +31,7 @@
#include llvm/Target/TargetMachine.h
#include llvm/Target/TargetOptions.h
#include llvm/Support/CommandLine.h
+#include llvm/ADT/BitVector.h
#include llvm/ADT/STLExtras.h
using namespace llvm;
@@ -883,6 +884,21 @@
return Is64Bit ? CalleeSavedRegClasses64Bit : CalleeSavedRegClasses32Bit;
}
+BitVector X86RegisterInfo::getReservedRegs(const MachineFunction MF) const {
+ BitVector Reserved(getNumRegs());
+ Reserved.set(X86::RSP);
+ Reserved.set(X86::ESP);
+ Reserved.set(X86::SP);
+ Reserved.set(X86::SPL);
+ if (hasFP(MF)) {
+Reserved.set(X86::RBP);
+Reserved.set(X86::EBP);
+Reserved.set(X86::BP);
+Reserved.set(X86::BPL);
+ }
+ return Reserved;
+}
+
//===--===//
// Stack Frame Processing methods
//===--===//
Index: llvm/lib/Target/X86/X86RegisterInfo.h
diff -u llvm/lib/Target/X86/X86RegisterInfo.h:1.45
llvm/lib/Target/X86/X86RegisterInfo.h:1.46
--- llvm/lib/Target/X86/X86RegisterInfo.h:1.45 Wed Jan 24 13:15:24 2007
+++ llvm/lib/Target/X86/X86RegisterInfo.h Sat Feb 17 05:06:00 2007
@@ -78,6 +78,12 @@
/// length of this list match the getCalleeSavedRegs() list.
const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
+ /// getReservedRegs - Returns a bitset indexed by physical register number
+ /// indicating if a register is a special register that has particular uses
and
+ /// should be considered unavailable at all times, e.g. SP, RA. This is used
by
+ /// register scavenger to determine what registers are free.
+ BitVector getReservedRegs(const MachineFunction MF) const;
+
bool hasFP(const MachineFunction MF) const;
void eliminateCallFramePseudoInstr(MachineFunction MF,
___
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp PPCRegisterInfo.h
Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.cpp updated: 1.105 - 1.106
PPCRegisterInfo.h updated: 1.24 - 1.25
---
Log message:
Added getReservedRegs().
---
Diffs of the changes: (+32 -9)
PPCRegisterInfo.cpp | 39 ++-
PPCRegisterInfo.h |2 ++
2 files changed, 32 insertions(+), 9 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.105
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.106
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.105 Thu Feb 1 10:31:34 2007
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Sat Feb 17 05:06:00 2007
@@ -34,6 +34,7 @@
#include llvm/Support/CommandLine.h
#include llvm/Support/Debug.h
#include llvm/Support/MathExtras.h
+#include llvm/ADT/BitVector.h
#include llvm/ADT/STLExtras.h
#include cstdlib
using namespace llvm;
@@ -338,6 +339,35 @@
Darwin32_CalleeSavedRegClasses;
}
+// needsFP - Return true if the specified function should have a dedicated
frame
+// pointer register. This is true if the function has variable sized allocas
or
+// if frame pointer elimination is disabled.
+//
+static bool needsFP(const MachineFunction MF) {
+ const MachineFrameInfo *MFI = MF.getFrameInfo();
+ return NoFramePointerElim || MFI-hasVarSizedObjects();
+}
+
+BitVector PPCRegisterInfo::getReservedRegs(const MachineFunction MF) const {
+ BitVector Reserved(getNumRegs());
+ Reserved.set(PPC::R0);
+ Reserved.set(PPC::R1);
+ Reserved.set(PPC::LR);
+ // In Linux, r2 is reserved for the OS.
+ if (!Subtarget.isDarwin())
+Reserved.set(PPC::R2);
+ // On PPC64, r13 is the thread pointer. Never allocate this register.
+ // Note that this is overconservative, as it also prevents allocation of
+ // R31 when the FP is not needed.
+ if (Subtarget.isPPC64()) {
+Reserved.set(PPC::R13);
+Reserved.set(PPC::R31);
+ }
+ if (needsFP(MF))
+Reserved.set(PPC::R31);
+ return Reserved;
+}
+
/// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
/// copy instructions, turning them into load/store instructions.
MachineInstr *PPCRegisterInfo::foldMemoryOperand(MachineInstr *MI,
@@ -398,15 +428,6 @@
// Stack Frame Processing methods
//===--===//
-// needsFP - Return true if the specified function should have a dedicated
frame
-// pointer register. This is true if the function has variable sized allocas
or
-// if frame pointer elimination is disabled.
-//
-static bool needsFP(const MachineFunction MF) {
- const MachineFrameInfo *MFI = MF.getFrameInfo();
- return NoFramePointerElim || MFI-hasVarSizedObjects();
-}
-
// hasFP - Return true if the specified function actually has a dedicated frame
// pointer register. This is true if the function needs a frame pointer and
has
// a non-zero stack size.
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.h
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.24
llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.25
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.24 Thu Jan 25 16:25:04 2007
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h Sat Feb 17 05:06:00 2007
@@ -58,6 +58,8 @@
const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
+ BitVector getReservedRegs(const MachineFunction MF) const;
+
/// targetHandlesStackFrameRounding - Returns true if the target is
/// responsible for rounding up the stack frame (probably at emitPrologue
/// time).
___
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[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp AlphaRegisterInfo.h
Changes in directory llvm/lib/Target/Alpha:
AlphaRegisterInfo.cpp updated: 1.57 - 1.58
AlphaRegisterInfo.h updated: 1.17 - 1.18
---
Log message:
Added getReservedRegs().
---
Diffs of the changes: (+11 -0)
AlphaRegisterInfo.cpp |9 +
AlphaRegisterInfo.h |2 ++
2 files changed, 11 insertions(+)
Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.57
llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.58
--- llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp:1.57Tue Jan 23 03:37:38 2007
+++ llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp Sat Feb 17 05:06:00 2007
@@ -28,6 +28,7 @@
#include llvm/Target/TargetInstrInfo.h
#include llvm/Support/CommandLine.h
#include llvm/Support/Debug.h
+#include llvm/ADT/BitVector.h
#include llvm/ADT/STLExtras.h
#include cstdlib
using namespace llvm;
@@ -178,6 +179,14 @@
return CalleeSavedRegClasses;
}
+BitVector AlphaRegisterInfo::getReservedRegs(const MachineFunction MF) const {
+ BitVector Reserved(getNumRegs());
+ Reserved.set(Alpha::R15);
+ Reserved.set(Alpha::R30);
+ Reserved.set(Alpha::R31);
+ return Reserved;
+}
+
//===--===//
// Stack Frame Processing methods
//===--===//
Index: llvm/lib/Target/Alpha/AlphaRegisterInfo.h
diff -u llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.17
llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.18
--- llvm/lib/Target/Alpha/AlphaRegisterInfo.h:1.17 Mon Jan 22 18:53:13 2007
+++ llvm/lib/Target/Alpha/AlphaRegisterInfo.h Sat Feb 17 05:06:00 2007
@@ -49,6 +49,8 @@
const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
+ BitVector getReservedRegs(const MachineFunction MF) const;
+
bool hasFP(const MachineFunction MF) const;
void eliminateCallFramePseudoInstr(MachineFunction MF,
___
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[llvm-commits] CVS: llvm/lib/Target/IA64/IA64RegisterInfo.cpp IA64RegisterInfo.h
Changes in directory llvm/lib/Target/IA64:
IA64RegisterInfo.cpp updated: 1.28 - 1.29
IA64RegisterInfo.h updated: 1.11 - 1.12
---
Log message:
Added getReservedRegs().
---
Diffs of the changes: (+16 -0)
IA64RegisterInfo.cpp | 14 ++
IA64RegisterInfo.h |2 ++
2 files changed, 16 insertions(+)
Index: llvm/lib/Target/IA64/IA64RegisterInfo.cpp
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.28
llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.29
--- llvm/lib/Target/IA64/IA64RegisterInfo.cpp:1.28 Tue Jan 23 03:37:54 2007
+++ llvm/lib/Target/IA64/IA64RegisterInfo.cpp Sat Feb 17 05:06:00 2007
@@ -28,6 +28,7 @@
#include llvm/Target/TargetOptions.h
#include llvm/Target/TargetInstrInfo.h
#include llvm/Support/CommandLine.h
+#include llvm/ADT/BitVector.h
#include llvm/ADT/STLExtras.h
using namespace llvm;
@@ -106,6 +107,19 @@
return CalleeSavedRegClasses;
}
+BitVector IA64RegisterInfo::getReservedRegs(const MachineFunction MF) const {
+ BitVector Reserved(getNumRegs());
+ Reserved.set(IA64::r0);
+ Reserved.set(IA64::r1);
+ Reserved.set(IA64::r2);
+ Reserved.set(IA64::r5);
+ Reserved.set(IA64::r12);
+ Reserved.set(IA64::r13);
+ Reserved.set(IA64::r22);
+ Reserved.set(IA64::rp);
+ return Reserved;
+}
+
//===--===//
// Stack Frame Processing methods
//===--===//
Index: llvm/lib/Target/IA64/IA64RegisterInfo.h
diff -u llvm/lib/Target/IA64/IA64RegisterInfo.h:1.11
llvm/lib/Target/IA64/IA64RegisterInfo.h:1.12
--- llvm/lib/Target/IA64/IA64RegisterInfo.h:1.11Mon Jan 22 18:53:41 2007
+++ llvm/lib/Target/IA64/IA64RegisterInfo.h Sat Feb 17 05:06:00 2007
@@ -48,6 +48,8 @@
const TargetRegisterClass* const* getCalleeSavedRegClasses() const;
+ BitVector getReservedRegs(const MachineFunction MF) const;
+
bool hasFP(const MachineFunction MF) const;
void eliminateCallFramePseudoInstr(MachineFunction MF,
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveVariables.h
Changes in directory llvm/include/llvm/CodeGen:
LiveVariables.h updated: 1.32 - 1.33
---
Log message:
Allow LiveVariables to track liveness of more registers.
---
Diffs of the changes: (+5 -4)
LiveVariables.h |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
Index: llvm/include/llvm/CodeGen/LiveVariables.h
diff -u llvm/include/llvm/CodeGen/LiveVariables.h:1.32
llvm/include/llvm/CodeGen/LiveVariables.h:1.33
--- llvm/include/llvm/CodeGen/LiveVariables.h:1.32 Wed Feb 14 23:57:14 2007
+++ llvm/include/llvm/CodeGen/LiveVariables.h Sat Feb 17 05:07:08 2007
@@ -36,6 +36,7 @@
namespace llvm {
class MRegisterInfo;
+class BitVector;
class LiveVariables : public MachineFunctionPass {
public:
@@ -108,11 +109,11 @@
///
std::vectorVarInfo VirtRegInfo;
- /// AllocatablePhysicalRegisters - This vector keeps track of which registers
- /// are actually register allocatable by the target machine. We can not
track
- /// liveness for values that are not in this set.
+ /// ReservedRegisters - This vector keeps track of which registers
+ /// are reserved register which are not allocatable by the target machine.
+ /// We can not track liveness for values that are in this set.
///
- BitVector AllocatablePhysicalRegisters;
+ BitVector ReservedRegisters;
private: // Intermediate data structures
const MRegisterInfo *RegInfo;
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineBasicBlock.h
Changes in directory llvm/include/llvm/CodeGen:
MachineBasicBlock.h updated: 1.55 - 1.56
---
Log message:
Added removeLiveIn and more livein iterators.
---
Diffs of the changes: (+10 -3)
MachineBasicBlock.h | 13 ++---
1 files changed, 10 insertions(+), 3 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineBasicBlock.h
diff -u llvm/include/llvm/CodeGen/MachineBasicBlock.h:1.55
llvm/include/llvm/CodeGen/MachineBasicBlock.h:1.56
--- llvm/include/llvm/CodeGen/MachineBasicBlock.h:1.55 Fri Feb 9 20:36:39 2007
+++ llvm/include/llvm/CodeGen/MachineBasicBlock.h Sat Feb 17 05:07:41 2007
@@ -138,11 +138,18 @@
/// is an error to add the same register to the same set more than once.
void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); }
+ /// removeLiveIn - Remove the specified register from the live in set.
+ ///
+ void removeLiveIn(unsigned Reg);
+
// Iteration support for live in sets. These sets are kept in sorted
// order by their register number.
- typedef std::vectorunsigned::const_iterator livein_iterator;
- livein_iterator livein_begin() const { return LiveIns.begin(); }
- livein_iterator livein_end() const { return LiveIns.end(); }
+ typedef std::vectorunsigned::iterator livein_iterator;
+ typedef std::vectorunsigned::const_iterator const_livein_iterator;
+ livein_iterator livein_begin() { return LiveIns.begin(); }
+ const_livein_iterator livein_begin() const { return LiveIns.begin(); }
+ livein_iterator livein_end() { return LiveIns.end(); }
+ const_livein_iterator livein_end() const { return LiveIns.end(); }
boollivein_empty() const { return LiveIns.empty(); }
// Code Layout methods.
___
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[llvm-commits] CVS: llvm/lib/CodeGen/LiveVariables.cpp
Changes in directory llvm/lib/CodeGen:
LiveVariables.cpp updated: 1.65 - 1.66
---
Log message:
- Use MRegister::regsOverlap().
- Allow LiveVariables to track liveness of more registers.
---
Diffs of the changes: (+8 -28)
LiveVariables.cpp | 36
1 files changed, 8 insertions(+), 28 deletions(-)
Index: llvm/lib/CodeGen/LiveVariables.cpp
diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.65
llvm/lib/CodeGen/LiveVariables.cpp:1.66
--- llvm/lib/CodeGen/LiveVariables.cpp:1.65 Mon Feb 12 19:30:55 2007
+++ llvm/lib/CodeGen/LiveVariables.cpp Sat Feb 17 05:09:47 2007
@@ -71,31 +71,11 @@
return VirtRegInfo[RegIdx];
}
-/// registerOverlap - Returns true if register 1 is equal to register 2
-/// or if register 1 is equal to any of alias of register 2.
-static bool registerOverlap(unsigned Reg1, unsigned Reg2,
- const MRegisterInfo *RegInfo) {
- bool isVirt1 = MRegisterInfo::isVirtualRegister(Reg1);
- bool isVirt2 = MRegisterInfo::isVirtualRegister(Reg2);
- if (isVirt1 != isVirt2)
-return false;
- if (Reg1 == Reg2)
-return true;
- else if (isVirt1)
-return false;
- for (const unsigned *AliasSet = RegInfo-getAliasSet(Reg2);
- unsigned Alias = *AliasSet; ++AliasSet) {
-if (Reg1 == Alias)
- return true;
- }
- return false;
-}
-
bool LiveVariables::KillsRegister(MachineInstr *MI, unsigned Reg) const {
for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
MachineOperand MO = MI-getOperand(i);
if (MO.isReg() MO.isKill()) {
- if (registerOverlap(Reg, MO.getReg(), RegInfo))
+ if (RegInfo-regsOverlap(Reg, MO.getReg()))
return true;
}
}
@@ -106,7 +86,7 @@
for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
MachineOperand MO = MI-getOperand(i);
if (MO.isReg() MO.isDead())
- if (registerOverlap(Reg, MO.getReg(), RegInfo))
+ if (RegInfo-regsOverlap(Reg, MO.getReg()))
return true;
}
return false;
@@ -116,7 +96,7 @@
for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
MachineOperand MO = MI-getOperand(i);
if (MO.isReg() MO.isDef()) {
- if (registerOverlap(Reg, MO.getReg(), RegInfo))
+ if (RegInfo-regsOverlap(Reg, MO.getReg()))
return true;
}
}
@@ -240,7 +220,7 @@
RegInfo = MF.getTarget().getRegisterInfo();
assert(RegInfo Target doesn't have register information?);
- AllocatablePhysicalRegisters = RegInfo-getAllocatableSet(MF);
+ ReservedRegisters = RegInfo-getReservedRegs(MF);
// PhysRegInfo - Keep track of which instruction was the last use of a
// physical register. This is a purely local property, because all physical
@@ -267,8 +247,8 @@
E = df_ext_end(Entry, Visited); DFI != E; ++DFI) {
MachineBasicBlock *MBB = *DFI;
- // Mark live-in registers as live-in.
-for (MachineBasicBlock::livein_iterator II = MBB-livein_begin(),
+// Mark live-in registers as live-in.
+for (MachineBasicBlock::const_livein_iterator II = MBB-livein_begin(),
EE = MBB-livein_end(); II != EE; ++II) {
assert(MRegisterInfo::isPhysicalRegister(*II)
Cannot have a live-in virtual register!);
@@ -295,7 +275,7 @@
if (MRegisterInfo::isVirtualRegister(MO.getReg())){
HandleVirtRegUse(getVarInfo(MO.getReg()), MBB, MI);
} else if (MRegisterInfo::isPhysicalRegister(MO.getReg())
- AllocatablePhysicalRegisters[MO.getReg()]) {
+ !ReservedRegisters[MO.getReg()]) {
HandlePhysRegUse(MO.getReg(), MI);
}
}
@@ -313,7 +293,7 @@
// Defaults to dead
VRInfo.Kills.push_back(MI);
} else if (MRegisterInfo::isPhysicalRegister(MO.getReg())
- AllocatablePhysicalRegisters[MO.getReg()]) {
+ !ReservedRegisters[MO.getReg()]) {
HandlePhysRegDef(MO.getReg(), MI);
}
}
___
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[llvm-commits] CVS: llvm/lib/CodeGen/MachineInstr.cpp
Changes in directory llvm/lib/CodeGen:
MachineInstr.cpp updated: 1.141 - 1.142
---
Log message:
Added findRegisterDefOperand().
---
Diffs of the changes: (+11 -0)
MachineInstr.cpp | 11 +++
1 files changed, 11 insertions(+)
Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.141
llvm/lib/CodeGen/MachineInstr.cpp:1.142
--- llvm/lib/CodeGen/MachineInstr.cpp:1.141 Fri Feb 16 03:49:18 2007
+++ llvm/lib/CodeGen/MachineInstr.cpp Sat Feb 17 05:10:18 2007
@@ -180,6 +180,17 @@
return NULL;
}
+/// findRegisterDefOperand() - Returns the MachineOperand that is a def of
+/// the specific register or NULL if it is not found.
+MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
+ for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
+MachineOperand MO = getOperand(i);
+if (MO.isReg() MO.isDef() MO.getReg() == Reg)
+ return MO;
+ }
+ return NULL;
+}
+
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
///
void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
___
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[llvm-commits] CVS: llvm/lib/CodeGen/MachineBasicBlock.cpp
Changes in directory llvm/lib/CodeGen:
MachineBasicBlock.cpp updated: 1.39 - 1.40
---
Log message:
Added removeLiveIn.
---
Diffs of the changes: (+7 -1)
MachineBasicBlock.cpp |8 +++-
1 files changed, 7 insertions(+), 1 deletion(-)
Index: llvm/lib/CodeGen/MachineBasicBlock.cpp
diff -u llvm/lib/CodeGen/MachineBasicBlock.cpp:1.39
llvm/lib/CodeGen/MachineBasicBlock.cpp:1.40
--- llvm/lib/CodeGen/MachineBasicBlock.cpp:1.39 Fri Feb 9 20:38:19 2007
+++ llvm/lib/CodeGen/MachineBasicBlock.cpp Sat Feb 17 05:10:48 2007
@@ -118,7 +118,7 @@
const MRegisterInfo *MRI = MF-getTarget().getRegisterInfo();
if (livein_begin() != livein_end()) {
OS Live Ins:;
-for (livein_iterator I = livein_begin(), E = livein_end(); I != E; ++I)
+for (const_livein_iterator I = livein_begin(),E = livein_end(); I != E;
++I)
OutputReg(OS, *I, MRI);
OS \n;
}
@@ -144,6 +144,12 @@
}
}
+void MachineBasicBlock::removeLiveIn(unsigned Reg) {
+ livein_iterator I = std::find(livein_begin(), livein_end(), Reg);
+ assert(I != livein_end() Not a live in!);
+ LiveIns.erase(I);
+}
+
void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) {
MachineFunction::BasicBlockListType BBList
=getParent()-getBasicBlockList();
getParent()-getBasicBlockList().splice(NewAfter, BBList, this);
___
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[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLinearScan.cpp
Changes in directory llvm/lib/CodeGen:
RegAllocLinearScan.cpp updated: 1.137 - 1.138
---
Log message:
Do not add livein's to entry MBB twice.
---
Diffs of the changes: (+3 -2)
RegAllocLinearScan.cpp |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp
diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.137
llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.138
--- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.137 Fri Feb 16 03:05:02 2007
+++ llvm/lib/CodeGen/RegAllocLinearScan.cpp Sat Feb 17 05:11:27 2007
@@ -292,8 +292,9 @@
}
// A brute force way of adding live-ins to every BB.
- for (MachineFunction::iterator MBB = mf_-begin(), E = mf_-end();
- MBB != E; ++MBB) {
+ MachineFunction::iterator MBB = mf_-begin();
+ ++MBB; // Skip entry MBB.
+ for (MachineFunction::iterator E = mf_-end(); MBB != E; ++MBB) {
unsigned StartIdx = li_-getMBBStartIdx(MBB-getNumber());
for (IntervalPtrs::iterator i = fixed_.begin(), e = fixed_.end();
i != e; ++i)
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h
Changes in directory llvm/include/llvm/CodeGen:
LiveIntervalAnalysis.h updated: 1.68 - 1.69
---
Log message:
- Changes how function livein's are handled, they now have a start index of 0.
- When coalescing a copy MI, if its destination is dead, propagate the
property to the source MI's destination if there are no intervening uses.
- Detect dead function live-in's and remove them.
---
Diffs of the changes: (+16 -2)
LiveIntervalAnalysis.h | 18 --
1 files changed, 16 insertions(+), 2 deletions(-)
Index: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h
diff -u llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.68
llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.69
--- llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.68 Wed Feb 14
23:57:14 2007
+++ llvm/include/llvm/CodeGen/LiveIntervalAnalysis.hSat Feb 17 05:15:40 2007
@@ -118,6 +118,11 @@
return I-second;
}
+bool hasInterval(unsigned reg) const {
+ Reg2IntervalMap::const_iterator I = r2iMap_.find(reg);
+ return I != r2iMap_.end();
+}
+
/// getMBBStartIdx - Return the base index of the first instruction in the
/// specified MachineBasicBlock.
unsigned getMBBStartIdx(MachineBasicBlock *MBB) const {
@@ -189,6 +194,7 @@
/// copies that cannot yet be coallesced into the TryAgain list.
void CopyCoallesceInMBB(MachineBasicBlock *MBB,
std::vectorCopyRec TryAgain);
+
/// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
/// which are the src/dst of the copy instruction CopyMI. This returns
true
/// if the copy was successfully coallesced away, or if it is never
possible
@@ -233,6 +239,9 @@
LiveInterval interval,
unsigned SrcReg);
+/// handleLiveInRegister - Create interval for a livein register.
+void handleLiveInRegister(MachineBasicBlock* mbb, LiveInterval interval);
+
/// Return true if the two specified registers belong to different
/// register classes. The registers may be either phys or virt regs.
bool differingRegisterClasses(unsigned RegA, unsigned RegB) const;
@@ -241,11 +250,16 @@
bool AdjustCopiesBackFrom(LiveInterval IntA, LiveInterval IntB,
MachineInstr *CopyMI);
-bool overlapsAliases(const LiveInterval *lhs,
- const LiveInterval *rhs) const;
+/// hasRegisterUse - Returns true if there is any use of the specific
+/// reg between indexes Start and End.
+bool hasRegisterUse(unsigned Reg, unsigned Start, unsigned End);
static LiveInterval createInterval(unsigned Reg);
+void removeInterval(unsigned Reg) {
+ r2iMap_.erase(Reg);
+}
+
LiveInterval getOrCreateInterval(unsigned reg) {
Reg2IntervalMap::iterator I = r2iMap_.find(reg);
if (I == r2iMap_.end())
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[llvm-commits] CVS: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.206 - 1.207
---
Log message:
- Changes how function livein's are handled, they now have a start index of 0.
- When coalescing a copy MI, if its destination is dead, propagate the
property to the source MI's destination if there are no intervening uses.
- Detect dead function live-in's and remove them.
---
Diffs of the changes: (+134 -54)
LiveIntervalAnalysis.cpp | 188 +--
1 files changed, 134 insertions(+), 54 deletions(-)
Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.206
llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.207
--- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.206 Wed Feb 14 23:59:24 2007
+++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp Sat Feb 17 05:15:40 2007
@@ -98,28 +98,6 @@
// Set the MBB2IdxMap entry for this MBB.
MBB2IdxMap[MBB-getNumber()] = MIIndex;
-// If this BB has any live ins, insert a dummy instruction at the
-// beginning of the function that we will pretend defines the values.
This
-// is to make the interval analysis simpler by providing a number.
-if (MBB-livein_begin() != MBB-livein_end()) {
- unsigned FirstLiveIn = *MBB-livein_begin();
-
- // Find a reg class that contains this live in.
- const TargetRegisterClass *RC = 0;
- for (MRegisterInfo::regclass_iterator RCI = mri_-regclass_begin(),
- RCE = mri_-regclass_end(); RCI != RCE; ++RCI)
-if ((*RCI)-contains(FirstLiveIn)) {
- RC = *RCI;
- break;
-}
-
- MachineInstr *OldFirstMI = MBB-begin();
- mri_-copyRegToReg(*MBB, MBB-begin(),
- FirstLiveIn, FirstLiveIn, RC);
- assert(OldFirstMI != MBB-begin()
- copyRetToReg didn't insert anything!);
-}
-
for (MachineBasicBlock::iterator I = MBB-begin(), E = MBB-end();
I != E; ++I) {
bool inserted = mi2iMap_.insert(std::make_pair(I, MIIndex)).second;
@@ -161,7 +139,16 @@
if (tii_-isMoveInstr(*mii, srcReg, dstReg)
(RegRep = rep(srcReg)) == rep(dstReg)) {
// remove from def list
-getOrCreateInterval(RegRep);
+LiveInterval RegInt = getOrCreateInterval(RegRep);
+MachineOperand *MO = mii-findRegisterDefOperand(dstReg);
+// If def of this move instruction is dead, remove its live range from
+// the dstination register's live interval.
+if (MO-isDead()) {
+ unsigned MoveIdx = getDefIndex(getInstructionIndex(mii));
+ RegInt.removeRange(*RegInt.FindLiveRangeContaining(MoveIdx));
+ if (RegInt.empty())
+removeInterval(RegRep);
+}
RemoveMachineInstrFromMaps(mii);
mii = mbbi-erase(mii);
++numPeep;
@@ -185,7 +172,6 @@
}
}
-
for (iterator I = begin(), E = end(); I != E; ++I) {
LiveInterval LI = I-second;
if (MRegisterInfo::isVirtualRegister(LI.reg)) {
@@ -670,6 +656,43 @@
}
}
+void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
+ LiveInterval interval) {
+ DOUT \t\tlivein register: ; DEBUG(printRegName(interval.reg));
+
+ // Look for kills, if it reaches a def before it's killed, then it shouldn't
+ // be considered a livein.
+ MachineBasicBlock::iterator mi = MBB-begin();
+ unsigned baseIndex = 0;
+ unsigned start = 0;
+ unsigned end = start;
+ while (mi != MBB-end()) {
+if (lv_-KillsRegister(mi, interval.reg)) {
+ DOUT killed;
+ end = getUseIndex(baseIndex) + 1;
+ goto exit;
+} else if (lv_-ModifiesRegister(mi, interval.reg)) {
+ // Another instruction redefines the register before it is ever read.
+ // Then the register is essentially dead at the instruction that defines
+ // it. Hence its interval is:
+ // [defSlot(def), defSlot(def)+1)
+ DOUT dead;
+ end = getDefIndex(start) + 1;
+ goto exit;
+}
+
+baseIndex += InstrSlots::NUM;
+++mi;
+ }
+
+exit:
+ assert(start end did not find end of interval?);
+
+ LiveRange LR(start, end, interval.getNextValue(~0U, 0));
+ interval.addRange(LR);
+ DOUT + LR '\n';
+}
+
/// computeIntervals - computes the live intervals for virtual
/// registers. for some ordering of the machine instructions [1,N] a
/// live interval is an interval [i, j) where 1 = i = j N for
@@ -688,17 +711,13 @@
MachineBasicBlock::iterator MI = MBB-begin(), miEnd = MBB-end();
if (MBB-livein_begin() != MBB-livein_end()) {
- // Process live-ins to this BB first.
- for (MachineBasicBlock::livein_iterator LI = MBB-livein_begin(),
+ // Create intervals for live-ins to this BB first.
+ for (MachineBasicBlock::const_livein_iterator LI = MBB-livein_begin(),
LE = MBB-livein_end(); LI != LE; ++LI) {
-handlePhysicalRegisterDef(MBB, MBB-begin(), MIIndex,
-
[llvm-commits] CVS: llvm/lib/Support/APInt.cpp
Changes in directory llvm/lib/Support:
APInt.cpp updated: 1.15 - 1.16
---
Log message:
Fix some bugs in division logic.
---
Diffs of the changes: (+5 -3)
APInt.cpp |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
Index: llvm/lib/Support/APInt.cpp
diff -u llvm/lib/Support/APInt.cpp:1.15 llvm/lib/Support/APInt.cpp:1.16
--- llvm/lib/Support/APInt.cpp:1.15 Fri Feb 16 21:16:00 2007
+++ llvm/lib/Support/APInt.cpp Sat Feb 17 16:38:07 2007
@@ -980,7 +980,7 @@
unsigned carry = 0;
unsigned j = 0;
do {
-uint64_t prod = ((uint64_t) x[j] 0xL) * yl;
+uint64_t prod = ((uint64_t) x[j] 0xUL) * yl;
unsigned prod_low = (unsigned) prod;
unsigned prod_high = (unsigned) (prod 32);
prod_low += carry;
@@ -1104,7 +1104,8 @@
X = APIntOps::shl(Result, nshift);
++lhsWords;
}
-div((unsigned*)X.pVal, lhsWords * 2 - 1, (unsigned*)Y.pVal, rhsWords*2);
+div((unsigned*)X.pVal, lhsWords * 2 - 1,
+(unsigned*)(Y.isSingleWord()? Y.VAL : Y.pVal), rhsWords*2);
memset(Result.pVal, 0, Result.getNumWords() * 8);
memcpy(Result.pVal, X.pVal + rhsWords, (lhsWords - rhsWords) * 8);
}
@@ -1154,7 +1155,8 @@
APIntOps::shl(Y, nshift);
APIntOps::shl(X, nshift);
}
-div((unsigned*)X.pVal, rhsWords*2-1, (unsigned*)Y.pVal, rhsWords*2);
+div((unsigned*)X.pVal, rhsWords*2-1,
+(unsigned*)(Y.isSingleWord()? Y.VAL : Y.pVal), rhsWords*2);
memset(Result.pVal, 0, Result.getNumWords() * 8);
for (unsigned i = 0; i rhsWords-1; ++i)
Result.pVal[i] = (X.pVal[i] nshift) | (X.pVal[i+1] (64 - nshift));
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[llvm-commits] [llvm-gcc] Cummulative patch to llvm-gcc SVN r276
All,
As the SVN mirror is lagging by a few days again, I thought I'd make it
easier to keep up to date. The attached patch combines Apple patches
123989, 123990, 123991, 123994, and 123995 (see llvm-commits archive
for details). This patch applies to r276 of the SVN mirror for llvm-gcc.
I believe these are all the changes made since the mirror updated to
r276.
Hope this helps.
Reid.
Index: gcc/tree.h
===
--- gcc/tree.h (revision 276)
+++ gcc/tree.h (working copy)
@@ -2071,23 +2071,23 @@
#ifdef __cplusplus
namespace llvm { class Value; }
/* C++ versions */
-#define DECL_LLVM(NODE) \
- ((llvm::Value*)(DECL_CHECK (NODE)-decl.llvm \
- ? (void*)(NODE)-decl.llvm \
- : (make_decl_llvm (NODE), (void*)(NODE)-decl.llvm)))
-#define SET_DECL_LLVM(NODE, LLVM) \
- (DECL_CHECK (NODE)-decl.llvm = (long)(Value*)LLVM)
-
+extern void llvm_set_decl (tree, Value *);
+extern Value *llvm_get_decl(tree);
+#define DECL_LLVM(NODE) (llvm_get_decl(NODE))
#else
/* C versions */
-#define DECL_LLVM(NODE) \
- ((void*)(DECL_CHECK (NODE)-decl.llvm \
- ? (void*)(NODE)-decl.llvm \
- : (make_decl_llvm (NODE), (void*)(NODE)-decl.llvm)))
-#define SET_DECL_LLVM(NODE, LLVM) (DECL_CHECK (NODE)-decl.llvm = (long)LLVM)
+extern void llvm_set_decl (tree, void *);
+extern void *llvm_get_decl(tree);
+#define DECL_LLVM(NODE) ((void *) llvm_get_decl(NODE))
#endif
+
+#define SET_DECL_LLVM(NODE, LLVM) (llvm_set_decl (NODE,LLVM))
+#define SET_DECL_LLVM_INDEX(NODE, INDEX) (DECL_CHECK (NODE)-decl.llvm = INDEX)
+#define GET_DECL_LLVM_INDEX(NODE) (DECL_CHECK (NODE)-decl.llvm)
+
/* Returns nonzero if the DECL_LLVM for NODE has already been set. */
-#define DECL_LLVM_SET_P(NODE) (DECL_CHECK (NODE)-decl.llvm != 0)
+extern bool llvm_set_decl_p(tree);
+#define DECL_LLVM_SET_P(NODE) (llvm_set_decl_p(NODE))
/* Copy the LLVM from NODE1 to NODE2. If the LLVM was not set for
NODE1, it will not be set for NODE2; this is a lazy copy. */
#define COPY_DECL_LLVM(NODE1, NODE2) \
@@ -2529,9 +2529,9 @@
tree assembler_name;
tree section_name;
tree attributes;
+ rtx rtl; /* RTL representation for object. */
/* APPLE LOCAL begin LLVM */
- rtx rtl; /* RTL representation for object. */
- long llvm; /* LLVM representation for object. */
+ unsigned llvm; /* LLVM representation for object. */
/* APPLE LOCAL end LLVM */
/* In FUNCTION_DECL, if it is inline, holds the saved insn chain.
Index: gcc/llvm-backend.cpp
===
--- gcc/llvm-backend.cpp (revision 276)
+++ gcc/llvm-backend.cpp (working copy)
@@ -76,8 +76,6 @@
std::vectorstd::pairFunction*, int StaticCtors, StaticDtors;
std::vectorGlobalValue* AttributeUsedGlobals;
-std::mapstd::string, GlobalVariable* EmittedGlobalVars;
-std::mapstd::string, Function* EmittedFunctions;
/// PerFunctionPasses - This is the list of cleanup passes run per-function
/// as each is compiled. In cases where we are not doing IPO, it includes the
@@ -214,6 +212,8 @@
// Read LLVM Types string table
readLLVMTypesStringTable();
+ readLLVMValuesStringTable();
+
flag_llvm_pch_read = 1;
}
@@ -432,8 +432,10 @@
timevar_push(TV_LLVM_PERFILE);
llvm_shutdown_obj X; // Call llvm_shutdown() on exit.
- if (flag_pch_file)
+ if (flag_pch_file) {
writeLLVMTypesStringTable();
+writeLLVMValuesStringTable();
+ }
// Add an llvm.global_ctors global if needed.
if (!StaticCtors.empty())
@@ -584,7 +586,6 @@
GV-replaceAllUsesWith(ConstantExpr::getBitCast(NGV, GV-getType()));
delete GV;
SET_DECL_LLVM(decl, NGV);
-EmittedGlobalVars[NGV-getName()] = NGV;
GV = NGV;
}
@@ -755,7 +756,7 @@
assert(Name[0] Function with empty name!);
// If this function has already been created, reuse the decl. This happens
// when we have something like __builtin_memset and memset in the same file.
-Function *FnEntry = EmittedFunctions[Name];
+Function *FnEntry = TheModule-getFunction(Name);
if (FnEntry == 0) {
unsigned CC;
const FunctionType *Ty =
@@ -806,11 +807,11 @@
} else {
// If the global has a name, prevent multiple vars with the same name from
// being created.
- GlobalVariable *GVE = EmittedGlobalVars[Name];
+ GlobalVariable *GVE = TheModule-getGlobalVariable(Name);
if (GVE == 0) {
-GVE = GV = new GlobalVariable(Ty, false, GlobalValue::ExternalLinkage,0,
- Name, TheModule);
+GV = new GlobalVariable(Ty, false, GlobalValue::ExternalLinkage,0,
+Name, TheModule);
// Check for external weak linkage
if (DECL_EXTERNAL(decl) DECL_WEAK(decl))
Index: gcc/llvm-convert.cpp
===
--- gcc/llvm-convert.cpp (revision 276)
+++
Re: [llvm-commits] [llvm-gcc] Cummulative patch to llvm-gcc SVN r276
All, Unfortunately, on x86-pc-linux-gnu, this will only lead to http://llvm.org/PR1207. Other platforms might be okay. Reid. On Sat, 2007-02-17 at 18:53 -0400, Jim Laskey wrote: Reid, I verified that this was the diff between r276 and current HEAD. Cheers, -- Jim On 17-Feb-07, at 06:46 PM, Reid Spencer wrote: All, As the SVN mirror is lagging by a few days again, I thought I'd make it easier to keep up to date. The attached patch combines Apple patches 123989, 123990, 123991, 123994, and 123995 (see llvm-commits archive for details). This patch applies to r276 of the SVN mirror for llvm- gcc. I believe these are all the changes made since the mirror updated to r276. Hope this helps. Reid. CUMMULATIVE-276.patch ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/VMCore/PassManager.cpp
Changes in directory llvm/lib/VMCore:
PassManager.cpp updated: 1.136 - 1.137
---
Log message:
temporarily revert Devang's most recent patch, which caused a large
compile-time regression in LLC.
---
Diffs of the changes: (+4 -16)
PassManager.cpp | 20
1 files changed, 4 insertions(+), 16 deletions(-)
Index: llvm/lib/VMCore/PassManager.cpp
diff -u llvm/lib/VMCore/PassManager.cpp:1.136
llvm/lib/VMCore/PassManager.cpp:1.137
--- llvm/lib/VMCore/PassManager.cpp:1.136 Fri Feb 16 21:53:44 2007
+++ llvm/lib/VMCore/PassManager.cpp Sat Feb 17 17:14:24 2007
@@ -362,19 +362,13 @@
}
}
-// Walk LastUser map and create inverted map. This should be done
-// after all passes are added and before running first pass.
-void PMTopLevelManager::collectInvertedLU() {
- for (std::mapPass *, Pass *::iterator LUI = LastUser.begin(),
- LUE = LastUser.end(); LUI != LUE; ++LUI)
- InvertedLU[LUI-second].push_back(LUI-first);
-}
-
/// Collect passes whose last user is P
void PMTopLevelManager::collectLastUses(std::vectorPass * LastUses,
Pass *P) {
- std::vectorPass *LU = InvertedLU[P];
- LastUses.insert(LastUses.end(), LU.begin(), LU.end());
+ for (std::mapPass *, Pass *::iterator LUI = LastUser.begin(),
+ LUE = LastUser.end(); LUI != LUE; ++LUI)
+ if (LUI-second == P)
+LastUses.push_back(LUI-first);
}
/// Schedule pass P for execution. Make sure that passes required by
@@ -944,9 +938,6 @@
dumpArguments();
dumpPasses();
- // Collect inverted map of LastUsers. This improves speed of
- // collectLastUses().
- TPM-collectInvertedLU();
initializeAllAnalysisInfo();
for (unsigned Index = 0; Index getNumContainedManagers(); ++Index) {
FPPassManager *FP = getContainedManager(Index);
@@ -1095,9 +1086,6 @@
dumpArguments();
dumpPasses();
- // Collect inverted map of LastUsers. This improves speed of
- // collectLastUses().
- TPM-collectInvertedLU();
initializeAllAnalysisInfo();
for (unsigned Index = 0; Index getNumContainedManagers(); ++Index) {
MPPassManager *MP = getContainedManager(Index);
___
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[llvm-commits] CVS: llvm/include/llvm/PassManagers.h
Changes in directory llvm/include/llvm: PassManagers.h updated: 1.8 - 1.9 --- Log message: temporarily revert Devang's most recent patch, which caused a large compile-time regression in LLC. --- Diffs of the changes: (+0 -5) PassManagers.h |5 - 1 files changed, 5 deletions(-) Index: llvm/include/llvm/PassManagers.h diff -u llvm/include/llvm/PassManagers.h:1.8 llvm/include/llvm/PassManagers.h:1.9 --- llvm/include/llvm/PassManagers.h:1.8Fri Feb 16 21:53:44 2007 +++ llvm/include/llvm/PassManagers.hSat Feb 17 17:14:24 2007 @@ -120,10 +120,6 @@ /// Collect passes whose last user is P void collectLastUses(std::vectorPass * LastUses, Pass *P); - // Walk LastUser map and create inverted map. This should be done - // after all passes are added and before running first pass. - void collectInvertedLU(); - /// Find the pass that implements Analysis AID. Search immutable /// passes and all pass managers. If desired pass is not found /// then return NULL. @@ -175,7 +171,6 @@ // Map to keep track of last user of the analysis pass. // LastUser-second is the last user of Lastuser-first. std::mapPass *, Pass * LastUser; - std::mapPass *, std::vector Pass * InvertedLU; /// Immutable passes are managed by top level manager. std::vectorImmutablePass * ImmutablePasses; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/ADT/APInt.h
Changes in directory llvm/include/llvm/ADT: APInt.h updated: 1.11 - 1.12 --- Log message: Implement signed output for toString. Fix bugs in countLeadingZeros and countTrailingZeros. --- Diffs of the changes: (+1 -1) APInt.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/ADT/APInt.h diff -u llvm/include/llvm/ADT/APInt.h:1.11 llvm/include/llvm/ADT/APInt.h:1.12 --- llvm/include/llvm/ADT/APInt.h:1.11 Fri Feb 16 18:18:01 2007 +++ llvm/include/llvm/ADT/APInt.h Sat Feb 17 18:44:22 2007 @@ -456,7 +456,7 @@ } /// @returns a character interpretation of the APInt. - std::string toString(uint8_t radix = 10) const; + std::string toString(uint8_t radix = 10, bool wantSigned = true) const; /// Get an APInt with the same BitWidth as this APInt, just zero mask /// the low bits and right shift to the least significant bit. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Support/APInt.cpp
Changes in directory llvm/lib/Support:
APInt.cpp updated: 1.16 - 1.17
---
Log message:
Implement signed output for toString.
Fix bugs in countLeadingZeros and countTrailingZeros.
---
Diffs of the changes: (+75 -44)
APInt.cpp | 119 +++---
1 files changed, 75 insertions(+), 44 deletions(-)
Index: llvm/lib/Support/APInt.cpp
diff -u llvm/lib/Support/APInt.cpp:1.16 llvm/lib/Support/APInt.cpp:1.17
--- llvm/lib/Support/APInt.cpp:1.16 Sat Feb 17 16:38:07 2007
+++ llvm/lib/Support/APInt.cpp Sat Feb 17 18:44:22 2007
@@ -26,7 +26,7 @@
/// the most significant digit.
static uint64_t lshift(uint64_t dest[], unsigned d_offset,
uint64_t x[], unsigned len, unsigned shiftAmt) {
- unsigned count = 64 - shiftAmt;
+ unsigned count = APINT_BITS_PER_WORD - shiftAmt;
int i = len - 1;
uint64_t high_word = x[i], retVal = high_word count;
++d_offset;
@@ -70,7 +70,9 @@
unsigned maxN = std::maxunsigned(numWords, getNumWords());
unsigned minN = std::minunsigned(numWords, getNumWords());
memcpy(pVal, bigVal, (minN - 1) * 8);
-pVal[minN-1] = bigVal[minN-1] (~uint64_t(0ULL) (64 - BitWidth % 64));
+pVal[minN-1] = bigVal[minN-1]
+(~uint64_t(0ULL)
+ (APINT_BITS_PER_WORD - BitWidth % APINT_BITS_PER_WORD));
if (maxN == getNumWords())
memset(pVal+numWords, 0, (getNumWords() - numWords) * 8);
}
@@ -511,7 +513,7 @@
else if (isSingleWord())
return VAL == (RHS.isSingleWord() ? RHS.VAL : RHS.pVal[0]);
else {
-if (n1 = 64)
+if (n1 = APINT_BITS_PER_WORD)
return pVal[0] == (RHS.isSingleWord() ? RHS.VAL : RHS.pVal[0]);
for (int i = whichWord(n1 - 1); i = 0; --i)
if (pVal[i] != RHS.pVal[i]) return false;
@@ -526,7 +528,7 @@
return VAL == Val;
else {
unsigned n = getActiveBits();
-if (n = 64)
+if (n = APINT_BITS_PER_WORD)
return pVal[0] == Val;
else
return false;
@@ -545,7 +547,7 @@
return true;
else if (n2 n1)
return false;
-else if (n1 = 64 n2 = 64)
+else if (n1 = APINT_BITS_PER_WORD n2 = APINT_BITS_PER_WORD)
return pVal[0] RHS.pVal[0];
for (int i = whichWord(n1 - 1); i = 0; --i) {
if (pVal[i] RHS.pVal[i]) return false;
@@ -567,7 +569,7 @@
return true;
else if (n2 n1)
return false;
-else if (n1 = 64 n2 = 64)
+else if (n1 = APINT_BITS_PER_WORD n2 = APINT_BITS_PER_WORD)
return pVal[0] RHS.pVal[0];
for (int i = whichWord(n1 - 1); i = 0; --i) {
if (pVal[i] RHS.pVal[i]) return false;
@@ -587,11 +589,13 @@
/// @brief Set every bit to 1.
APInt APInt::set() {
- if (isSingleWord()) VAL = ~0ULL (64 - BitWidth);
+ if (isSingleWord())
+VAL = ~0ULL (APINT_BITS_PER_WORD - BitWidth);
else {
for (unsigned i = 0; i getNumWords() - 1; ++i)
pVal[i] = -1ULL;
-pVal[getNumWords() - 1] = ~0ULL (64 - BitWidth % 64);
+pVal[getNumWords() - 1] = ~0ULL
+ (APINT_BITS_PER_WORD - BitWidth % APINT_BITS_PER_WORD);
}
return *this;
}
@@ -622,12 +626,14 @@
/// @brief Toggle every bit to its opposite value.
APInt APInt::flip() {
- if (isSingleWord()) VAL = (~(VAL (64 - BitWidth))) (64 - BitWidth);
+ if (isSingleWord()) VAL = (~(VAL
+(APINT_BITS_PER_WORD - BitWidth))) (APINT_BITS_PER_WORD - BitWidth);
else {
unsigned i = 0;
for (; i getNumWords() - 1; ++i)
pVal[i] = ~pVal[i];
-unsigned offset = 64 - (BitWidth - 64 * (i - 1));
+unsigned offset =
+ APINT_BITS_PER_WORD - (BitWidth - APINT_BITS_PER_WORD * (i - 1));
pVal[i] = (~(pVal[i] offset)) offset;
}
return *this;
@@ -644,7 +650,7 @@
}
/// to_string - This function translates the APInt into a string.
-std::string APInt::toString(uint8_t radix) const {
+std::string APInt::toString(uint8_t radix, bool wantSigned) const {
assert((radix == 10 || radix == 8 || radix == 16 || radix == 2)
Radix should be 2, 8, 10, or 16!);
static const char *digits[] = {
@@ -654,10 +660,15 @@
unsigned bits_used = getActiveBits();
if (isSingleWord()) {
char buf[65];
-const char *format = (radix == 10 ? %llu :
+const char *format = (radix == 10 ? (wantSigned ? %lld : %llu) :
(radix == 16 ? %llX : (radix == 8 ? %llo : 0)));
if (format) {
- sprintf(buf, format, VAL);
+ if (wantSigned) {
+int64_t sextVal = (int64_t(VAL) (APINT_BITS_PER_WORD-BitWidth))
+ (APINT_BITS_PER_WORD-BitWidth);
+sprintf(buf, format, sextVal);
+ } else
+sprintf(buf, format, VAL);
} else {
memset(buf, 0, 65);
uint64_t v = VAL;
@@ -675,13 +686,23 @@
APInt tmp(*this);
APInt divisor(tmp.getBitWidth(), radix);
APInt zero(tmp.getBitWidth(), 0);
+ size_t insert_at = 0;
+ if (wantSigned tmp[BitWidth-1]) {
+// They want to print the signed version and it is a
[llvm-commits] CVS: llvm/projects/sample/tools/sample/Makefile
Changes in directory llvm/projects/sample/tools/sample: Makefile updated: 1.7 - 1.8 --- Log message: avoid collision with /usr/bin/sample if this ever gets installed. --- Diffs of the changes: (+1 -1) Makefile |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/projects/sample/tools/sample/Makefile diff -u llvm/projects/sample/tools/sample/Makefile:1.7 llvm/projects/sample/tools/sample/Makefile:1.8 --- llvm/projects/sample/tools/sample/Makefile:1.7 Mon Aug 7 18:12:15 2006 +++ llvm/projects/sample/tools/sample/Makefile Sat Feb 17 21:03:41 2007 @@ -8,7 +8,7 @@ # # Give the name of the tool. # -TOOLNAME=sample +TOOLNAME=Sample # # List libraries that we'll need ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Support/APInt.cpp
Changes in directory llvm/lib/Support:
APInt.cpp updated: 1.17 - 1.18
---
Log message:
Make add_1 exit early if carry is 0.
Fix line breaks and 80 cols violation.
Simplify operator^= since bitwidths must be the same.
---
Diffs of the changes: (+23 -36)
APInt.cpp | 59 +++
1 files changed, 23 insertions(+), 36 deletions(-)
Index: llvm/lib/Support/APInt.cpp
diff -u llvm/lib/Support/APInt.cpp:1.17 llvm/lib/Support/APInt.cpp:1.18
--- llvm/lib/Support/APInt.cpp:1.17 Sat Feb 17 18:44:22 2007
+++ llvm/lib/Support/APInt.cpp Sun Feb 18 00:39:42 2007
@@ -139,13 +139,16 @@
/// returns the carry.
/// @returns the carry of the addition.
static uint64_t add_1(uint64_t dest[], uint64_t x[], unsigned len, uint64_t y)
{
- uint64_t carry = y;
-
for (unsigned i = 0; i len; ++i) {
-dest[i] = carry + x[i];
-carry = (dest[i] carry) ? 1 : 0;
+dest[i] = y + x[i];
+if (dest[i] y)
+ y = 1;
+else {
+ y = 0;
+ break;
+}
}
- return carry;
+ return y;
}
/// @brief Prefix increment operator. Increments the APInt by one.
@@ -161,20 +164,17 @@
/// sub_1 - This function subtracts the integer array x[] by
/// integer y and returns the borrow-out carry.
static uint64_t sub_1(uint64_t x[], unsigned len, uint64_t y) {
- uint64_t cy = y;
-
for (unsigned i = 0; i len; ++i) {
uint64_t X = x[i];
-x[i] -= cy;
-if (cy X)
- cy = 1;
+x[i] -= y;
+if (y X)
+ y = 1;
else {
- cy = 0;
+ y = 0;
break;
}
}
-
- return cy;
+ return y;
}
/// @brief Prefix decrement operator. Decrements the APInt by one.
@@ -188,10 +188,8 @@
/// add - This function adds the integer array x[] by integer array
/// y[] and returns the carry.
-static uint64_t add(uint64_t dest[], uint64_t x[],
-uint64_t y[], unsigned len) {
+static uint64_t add(uint64_t dest[], uint64_t x[], uint64_t y[], unsigned len)
{
unsigned carry = 0;
-
for (unsigned i = 0; i len; ++i) {
carry += x[i];
dest[i] = carry + y[i];
@@ -223,8 +221,7 @@
/// sub - This function subtracts the integer array x[] by
/// integer array y[], and returns the borrow-out carry.
-static uint64_t sub(uint64_t dest[], uint64_t x[],
-uint64_t y[], unsigned len) {
+static uint64_t sub(uint64_t dest[], uint64_t x[], uint64_t y[], unsigned len)
{
// Carry indicator.
uint64_t cy = 0;
@@ -252,7 +249,8 @@
else {
if (RHS.getNumWords() getNumWords()) {
uint64_t carry = sub(pVal, pVal, RHS.pVal, RHS.getNumWords());
-sub_1(pVal + RHS.getNumWords(), getNumWords() - RHS.getNumWords(),
carry);
+sub_1(pVal + RHS.getNumWords(), getNumWords() - RHS.getNumWords(),
+ carry);
}
else
sub(pVal, pVal, RHS.pVal, getNumWords());
@@ -410,23 +408,12 @@
APInt APInt::operator^=(const APInt RHS) {
assert(BitWidth == RHS.BitWidth Bit widths must be the same);
if (isSingleWord()) {
-if (RHS.isSingleWord()) VAL ^= RHS.VAL;
-else VAL ^= RHS.pVal[0];
- } else {
-if (RHS.isSingleWord()) {
- for (unsigned i = 0; i getNumWords(); ++i)
-pVal[i] ^= RHS.VAL;
-} else {
- unsigned minwords = getNumWords() RHS.getNumWords() ?
- getNumWords() : RHS.getNumWords();
- for (unsigned i = 0; i minwords; ++i)
-pVal[i] ^= RHS.pVal[i];
- if (getNumWords() minwords)
-for (unsigned i = minwords; i getNumWords(); ++i)
- pVal[i] ^= 0;
-}
- }
- clearUnusedBits();
+VAL ^= RHS.VAL;
+return *this;
+ }
+ unsigned numWords = getNumWords();
+ for (unsigned i = 0; i numWords; ++i)
+ pVal[i] ^= RHS.pVal[i];
return *this;
}
___
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