[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocBigBlock.cpp
Changes in directory llvm/lib/CodeGen:
RegAllocBigBlock.cpp updated: 1.3 - 1.4
---
Log message:
pull evan's fixes - should help the nightly tester (but there are still
some issues)
---
Diffs of the changes: (+63 -48)
RegAllocBigBlock.cpp | 111 ---
1 files changed, 63 insertions(+), 48 deletions(-)
Index: llvm/lib/CodeGen/RegAllocBigBlock.cpp
diff -u llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.3
llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.4
--- llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.3 Mon Jun 25 19:21:58 2007
+++ llvm/lib/CodeGen/RegAllocBigBlock.cpp Wed Jun 27 02:07:13 2007
@@ -47,6 +47,7 @@
#include llvm/ADT/SmallPtrSet.h
#include llvm/ADT/Statistic.h
#include algorithm
+#include iostream
using namespace llvm;
STATISTIC(NumStores, Number of stores added);
@@ -243,13 +244,6 @@
///
void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
-/// liberatePhysReg - Make sure the specified physical register is
available
-/// for use. If there is currently a value in it, it is either moved out
of
-/// the way or spilled to memory.
-///
-void liberatePhysReg(MachineBasicBlock MBB, MachineBasicBlock::iterator
I,
- unsigned PhysReg);
-
/// isPhysRegAvailable - Return true if the specified physical register is
/// free and available for use. This also includes checking to see if
/// aliased registers are all free...
@@ -364,18 +358,7 @@
*AliasSet; ++AliasSet)
if (PhysRegsUsed[*AliasSet] != -1 // Spill aliased register.
PhysRegsUsed[*AliasSet] != -2) // If allocatable.
-if (PhysRegsUsed[*AliasSet] == 0) {
- // This must have been a dead def due to something like this:
- // %EAX :=
- // := op %AL
- // No more use of %EAX, %AH, etc.
- // %EAX isn't dead upon definition, but %AH is. However %AH isn't
- // an operand of definition MI so it's not marked as such.
- DOUTRegister RegInfo-getName(*AliasSet)
- [%reg *AliasSet
-] is never used, removing it frame live list\n;
- removePhysReg(*AliasSet);
-} else
+if (PhysRegsUsed[*AliasSet])
spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
}
}
@@ -429,16 +412,6 @@
}
-/// liberatePhysReg - Make sure the specified physical register is available
for
-/// use. If there is currently a value in it, it is either moved out of the
way
-/// or spilled to memory.
-///
-void RABigBlock::liberatePhysReg(MachineBasicBlock MBB,
- MachineBasicBlock::iterator I,
- unsigned PhysReg) {
- spillPhysReg(MBB, I, PhysReg);
-}
-
/// chooseReg - Pick a physical register to hold the specified
/// virtual register by choosing the one whose value will be read
/// furthest in the future.
@@ -487,8 +460,8 @@
}
}
}
-
-assert(PhysReg couldn't grab a register from the table?);
+
+assert(PhysReg couldn't assign a physical register :( );
// TODO: assert that RC-contains(PhysReg) / handle aliased registers
// since we needed to look in the table we need to spill this register.
@@ -599,6 +572,29 @@
}
}
+/// isReadModWriteImplicitKill - True if this is an implicit kill for a
+/// read/mod/write register, i.e. update partial register.
+static bool isReadModWriteImplicitKill(MachineInstr *MI, unsigned Reg) {
+ for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
+MachineOperand MO = MI-getOperand(i);
+if (MO.isRegister() MO.getReg() == Reg MO.isImplicit()
+MO.isDef() !MO.isDead())
+ return true;
+ }
+ return false;
+}
+
+/// isReadModWriteImplicitDef - True if this is an implicit def for a
+/// read/mod/write register, i.e. update partial register.
+static bool isReadModWriteImplicitDef(MachineInstr *MI, unsigned Reg) {
+ for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
+MachineOperand MO = MI-getOperand(i);
+if (MO.isRegister() MO.getReg() == Reg MO.isImplicit()
+!MO.isDef() MO.isKill())
+ return true;
+ }
+ return false;
+}
void RABigBlock::AllocateBasicBlock(MachineBasicBlock MBB) {
// loop over each instruction
@@ -616,7 +612,7 @@
unsigned Reg = I-first;
MF-setPhysRegUsed(Reg);
PhysRegsUsed[Reg] = 0;// It is free and reserved now
- for (const unsigned *AliasSet = RegInfo-getAliasSet(Reg);
+ for (const unsigned *AliasSet = RegInfo-getSubRegisters(Reg);
*AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) {
PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
@@ -627,12 +623,10 @@
}
// Otherwise, sequentially allocate each instruction in the MBB.
- MBBCurTime = -1;
while (MII != MBB.end()) {
MachineInstr *MI = MII++;
-MBBCurTime++;
const
Re: [llvm-commits] CVS: llvm/lib/CodeGen/RegAllocBigBlock.cpp
Hi Duraid, +#include iostream Please remove this. It's forbidden in the main libraries. Thanks! -bw ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocBigBlock.cpp
Changes in directory llvm/lib/CodeGen:
RegAllocBigBlock.cpp updated: 1.4 - 1.5
---
Log message:
revert evan's fixes (and my doofusness) since they had a huge code
quality hit. will look at this soon.
---
Diffs of the changes: (+31 -63)
RegAllocBigBlock.cpp | 94 ---
1 files changed, 31 insertions(+), 63 deletions(-)
Index: llvm/lib/CodeGen/RegAllocBigBlock.cpp
diff -u llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.4
llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.5
--- llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.4 Wed Jun 27 02:07:13 2007
+++ llvm/lib/CodeGen/RegAllocBigBlock.cpp Wed Jun 27 03:11:59 2007
@@ -47,7 +47,6 @@
#include llvm/ADT/SmallPtrSet.h
#include llvm/ADT/Statistic.h
#include algorithm
-#include iostream
using namespace llvm;
STATISTIC(NumStores, Number of stores added);
@@ -358,7 +357,18 @@
*AliasSet; ++AliasSet)
if (PhysRegsUsed[*AliasSet] != -1 // Spill aliased register.
PhysRegsUsed[*AliasSet] != -2) // If allocatable.
-if (PhysRegsUsed[*AliasSet])
+if (PhysRegsUsed[*AliasSet] == 0) {
+ // This must have been a dead def due to something like this:
+ // %EAX :=
+ // := op %AL
+ // No more use of %EAX, %AH, etc.
+ // %EAX isn't dead upon definition, but %AH is. However %AH isn't
+ // an operand of definition MI so it's not marked as such.
+ DOUTRegister RegInfo-getName(*AliasSet)
+ [%reg *AliasSet
+] is never used, removing it frame live list\n;
+ removePhysReg(*AliasSet);
+} else
spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
}
}
@@ -460,8 +470,8 @@
}
}
}
-
-assert(PhysReg couldn't assign a physical register :( );
+
+assert(PhysReg couldn't grab a register from the table?);
// TODO: assert that RC-contains(PhysReg) / handle aliased registers
// since we needed to look in the table we need to spill this register.
@@ -572,29 +582,6 @@
}
}
-/// isReadModWriteImplicitKill - True if this is an implicit kill for a
-/// read/mod/write register, i.e. update partial register.
-static bool isReadModWriteImplicitKill(MachineInstr *MI, unsigned Reg) {
- for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
-MachineOperand MO = MI-getOperand(i);
-if (MO.isRegister() MO.getReg() == Reg MO.isImplicit()
-MO.isDef() !MO.isDead())
- return true;
- }
- return false;
-}
-
-/// isReadModWriteImplicitDef - True if this is an implicit def for a
-/// read/mod/write register, i.e. update partial register.
-static bool isReadModWriteImplicitDef(MachineInstr *MI, unsigned Reg) {
- for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
-MachineOperand MO = MI-getOperand(i);
-if (MO.isRegister() MO.getReg() == Reg MO.isImplicit()
-!MO.isDef() MO.isKill())
- return true;
- }
- return false;
-}
void RABigBlock::AllocateBasicBlock(MachineBasicBlock MBB) {
// loop over each instruction
@@ -612,7 +599,7 @@
unsigned Reg = I-first;
MF-setPhysRegUsed(Reg);
PhysRegsUsed[Reg] = 0;// It is free and reserved now
- for (const unsigned *AliasSet = RegInfo-getSubRegisters(Reg);
+ for (const unsigned *AliasSet = RegInfo-getAliasSet(Reg);
*AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) {
PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
@@ -623,10 +610,12 @@
}
// Otherwise, sequentially allocate each instruction in the MBB.
+ MBBCurTime = -1;
while (MII != MBB.end()) {
MachineInstr *MI = MII++;
+MBBCurTime++;
const TargetInstrDescriptor TID = TII.get(MI-getOpcode());
-DEBUG(DOUT \nStarting RegAlloc of: *MI;
+DEBUG(DOUT \nTime= MBBCurTime Starting RegAlloc of: *MI;
DOUTRegs have values: ;
for (unsigned i = 0; i != RegInfo-getNumRegs(); ++i)
if (PhysRegsUsed[i] != -1 PhysRegsUsed[i] != -2)
@@ -634,28 +623,11 @@
,%reg PhysRegsUsed[i] ] ;
DOUT \n);
-/* XXX :
-// Loop over the implicit uses, making sure that they are at the head of
the
-// use order list, so they don't get reallocated.
-if (TID.ImplicitUses) {
- for (const unsigned *ImplicitUses = TID.ImplicitUses;
- *ImplicitUses; ++ImplicitUses)
-MarkPhysRegRecentlyUsed(*ImplicitUses);
-}
- XXX */
-
SmallVectorunsigned, 8 Kills;
for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
MachineOperand MO = MI-getOperand(i);
- if (MO.isRegister() MO.isKill()) {
-if (!MO.isImplicit())
- Kills.push_back(MO.getReg());
-else if (!isReadModWriteImplicitKill(MI, MO.getReg()))
- // These are extra physical register kills when a sub-register
- // is defined (def of a sub-register is a
[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocBigBlock.cpp
Changes in directory llvm/lib/CodeGen:
RegAllocBigBlock.cpp updated: 1.5 - 1.6
---
Log message:
ok, this much doesn't seem to bork anything
---
Diffs of the changes: (+48 -25)
RegAllocBigBlock.cpp | 73 +--
1 files changed, 48 insertions(+), 25 deletions(-)
Index: llvm/lib/CodeGen/RegAllocBigBlock.cpp
diff -u llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.5
llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.6
--- llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.5 Wed Jun 27 03:11:59 2007
+++ llvm/lib/CodeGen/RegAllocBigBlock.cpp Wed Jun 27 03:31:07 2007
@@ -357,18 +357,7 @@
*AliasSet; ++AliasSet)
if (PhysRegsUsed[*AliasSet] != -1 // Spill aliased register.
PhysRegsUsed[*AliasSet] != -2) // If allocatable.
-if (PhysRegsUsed[*AliasSet] == 0) {
- // This must have been a dead def due to something like this:
- // %EAX :=
- // := op %AL
- // No more use of %EAX, %AH, etc.
- // %EAX isn't dead upon definition, but %AH is. However %AH isn't
- // an operand of definition MI so it's not marked as such.
- DOUTRegister RegInfo-getName(*AliasSet)
- [%reg *AliasSet
-] is never used, removing it frame live list\n;
- removePhysReg(*AliasSet);
-} else
+if (PhysRegsUsed[*AliasSet])
spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
}
}
@@ -582,6 +571,30 @@
}
}
+/// isReadModWriteImplicitKill - True if this is an implicit kill for a
+/// read/mod/write register, i.e. update partial register.
+static bool isReadModWriteImplicitKill(MachineInstr *MI, unsigned Reg) {
+ for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
+MachineOperand MO = MI-getOperand(i);
+if (MO.isRegister() MO.getReg() == Reg MO.isImplicit()
+MO.isDef() !MO.isDead())
+ return true;
+ }
+ return false;
+}
+
+/// isReadModWriteImplicitDef - True if this is an implicit def for a
+/// read/mod/write register, i.e. update partial register.
+static bool isReadModWriteImplicitDef(MachineInstr *MI, unsigned Reg) {
+ for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
+MachineOperand MO = MI-getOperand(i);
+if (MO.isRegister() MO.getReg() == Reg MO.isImplicit()
+!MO.isDef() MO.isKill())
+ return true;
+ }
+ return false;
+}
+
void RABigBlock::AllocateBasicBlock(MachineBasicBlock MBB) {
// loop over each instruction
@@ -599,7 +612,7 @@
unsigned Reg = I-first;
MF-setPhysRegUsed(Reg);
PhysRegsUsed[Reg] = 0;// It is free and reserved now
- for (const unsigned *AliasSet = RegInfo-getAliasSet(Reg);
+ for (const unsigned *AliasSet = RegInfo-getSubRegisters(Reg);
*AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) {
PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
@@ -626,8 +639,15 @@
SmallVectorunsigned, 8 Kills;
for (unsigned i = 0, e = MI-getNumOperands(); i != e; ++i) {
MachineOperand MO = MI-getOperand(i);
- if (MO.isRegister() MO.isKill())
-Kills.push_back(MO.getReg());
+ if (MO.isRegister() MO.isKill()) {
+if (!MO.isImplicit())
+ Kills.push_back(MO.getReg());
+else if (!isReadModWriteImplicitKill(MI, MO.getReg()))
+ // These are extra physical register kills when a sub-register
+ // is defined (def of a sub-register is a read/mod/write of the
+ // larger registers). Ignore.
+ Kills.push_back(MO.getReg());
+ }
}
// Get the used operands into registers. This has the potential to spill
@@ -660,13 +680,16 @@
} else if (PhysRegsUsed[PhysReg] == -2) {
// Unallocatable register dead, ignore.
continue;
+ } else {
+assert(!PhysRegsUsed[PhysReg] || PhysRegsUsed[PhysReg] == -1
+ Silently clearing a virtual register?);
}
if (PhysReg) {
DOUTLast use of RegInfo-getName(PhysReg)
[%reg VirtReg ], removing it from live set\n;
removePhysReg(PhysReg);
-for (const unsigned *AliasSet = RegInfo-getAliasSet(PhysReg);
+for (const unsigned *AliasSet = RegInfo-getSubRegisters(PhysReg);
*AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) {
DOUT Last use of
@@ -686,11 +709,15 @@
MRegisterInfo::isPhysicalRegister(MO.getReg())) {
unsigned Reg = MO.getReg();
if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP.
-
+// These are extra physical register defs when a sub-register
+// is defined (def of a sub-register is a read/mod/write of the
+// larger registers). Ignore.
+if (isReadModWriteImplicitDef(MI, MO.getReg())) continue;
+
MF-setPhysRegUsed(Reg);
spillPhysReg(MBB, MI, Reg, true); //
[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocBigBlock.cpp
Changes in directory llvm/lib/CodeGen:
RegAllocBigBlock.cpp updated: 1.6 - 1.7
---
Log message:
ok, this is something of a dirty hack, but it seems to work. (fixes e.g.
the SPASS miscompilation)
---
Diffs of the changes: (+16 -2)
RegAllocBigBlock.cpp | 18 --
1 files changed, 16 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/RegAllocBigBlock.cpp
diff -u llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.6
llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.7
--- llvm/lib/CodeGen/RegAllocBigBlock.cpp:1.6 Wed Jun 27 03:31:07 2007
+++ llvm/lib/CodeGen/RegAllocBigBlock.cpp Wed Jun 27 04:01:14 2007
@@ -459,9 +459,23 @@
}
}
}
+
+if(PhysReg == 0) { // ok, now we're desperate. We couldn't choose
+ // a register to spill by looking through the
+ // read timetable, so now we just spill the
+ // first allocatable register we find.
+
+ // for all physical regs in the RC,
+ for(TargetRegisterClass::iterator pReg = RC-begin();
+pReg != RC-end(); ++pReg) {
+// if we find a register we can spill
+if(PhysRegsUsed[*pReg]=-1)
+ PhysReg = *pReg; // choose it to be spilled
+ }
+}
-assert(PhysReg couldn't grab a register from the table?);
-// TODO: assert that RC-contains(PhysReg) / handle aliased registers
+assert(PhysReg couldn't choose a register to spill :( );
+// TODO: assert that RC-contains(PhysReg) / handle aliased registers?
// since we needed to look in the table we need to spill this register.
spillPhysReg(MBB, I, PhysReg);
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Changes in directory llvm/lib/Transforms/Scalar:
IndVarSimplify.cpp updated: 1.123 - 1.124
---
Log message:
Fix a bug.
---
Diffs of the changes: (+4 -1)
IndVarSimplify.cpp |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
diff -u llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.123
llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.124
--- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.123 Tue Jun 19 09:28:31 2007
+++ llvm/lib/Transforms/Scalar/IndVarSimplify.cpp Wed Jun 27 04:50:26 2007
@@ -519,8 +519,11 @@
DOUT INDVARS: New CanIV: *IndVar;
if (!isaSCEVCouldNotCompute(IterationCount)) {
-if (IterationCount-getType() != LargestType)
+if (IterationCount-getType()-getPrimitiveSizeInBits()
+LargestType-getPrimitiveSizeInBits())
IterationCount = SCEVZeroExtendExpr::get(IterationCount, LargestType);
+else if (IterationCount-getType() != LargestType)
+ IterationCount = SCEVTruncateExpr::get(IterationCount, LargestType);
if (Instruction *DI = LinearFunctionTestReplace(L,
IterationCount,Rewriter))
DeadInsts.insert(DI);
}
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.501 - 1.502
---
Log message:
Make the comment for ScalarizeVectorOp mention that it is only for use
with single-element vectors.
---
Diffs of the changes: (+6 -4)
LegalizeDAG.cpp | 10 ++
1 files changed, 6 insertions(+), 4 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.501
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.502
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.501 Mon Jun 25 11:23:39 2007
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Jun 27 09:06:22 2007
@@ -177,8 +177,9 @@
/// two smaller values.
void SplitVectorOp(SDOperand O, SDOperand Lo, SDOperand Hi);
- /// ScalarizeVectorOp - Given an operand of vector type, convert it into the
- /// equivalent operation that returns a scalar value.
+ /// ScalarizeVectorOp - Given an operand of single-element vector type
+ /// (e.g. v1f32), convert it into the equivalent operation that returns a
+ /// scalar (e.g. f32) value.
SDOperand ScalarizeVectorOp(SDOperand O);
/// isShuffleLegal - Return true if a vector shuffle is legal with the
@@ -5602,8 +5603,9 @@
}
-/// ScalarizeVectorOp - Given an operand of vector type, convert it into the
-/// equivalent operation that returns a scalar (e.g. F32) value.
+/// ScalarizeVectorOp - Given an operand of single-element vector type
+/// (e.g. v1f32), convert it into the equivalent operation that returns a
+/// scalar (e.g. f32) value.
SDOperand SelectionDAGLegalize::ScalarizeVectorOp(SDOperand Op) {
assert(MVT::isVector(Op.getValueType())
Bad ScalarizeVectorOp invocation!);
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[llvm-commits] CVS: llvm/include/llvm/Support/Debug.h
Changes in directory llvm/include/llvm/Support: Debug.h updated: 1.15 - 1.16 --- Log message: Allow DOUT to be used outside of the llvm namespace. --- Diffs of the changes: (+2 -2) Debug.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/include/llvm/Support/Debug.h diff -u llvm/include/llvm/Support/Debug.h:1.15 llvm/include/llvm/Support/Debug.h:1.16 --- llvm/include/llvm/Support/Debug.h:1.15 Thu Feb 1 06:09:51 2007 +++ llvm/include/llvm/Support/Debug.h Wed Jun 27 09:09:38 2007 @@ -68,9 +68,9 @@ OStream getErrorOutputStream(const char *DebugType); #ifdef NDEBUG -#define DOUT OStream(0) +#define DOUT llvm::OStream(0) #else -#define DOUT getErrorOutputStream(DEBUG_TYPE) +#define DOUT llvm::getErrorOutputStream(DEBUG_TYPE) #endif } // End llvm namespace ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-test/Makefile.programs
Changes in directory llvm-test: Makefile.programs updated: 1.271 - 1.272 --- Log message: spass+oggenc work, therefore everything works(tm) ;) --- Diffs of the changes: (+1 -1) Makefile.programs |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm-test/Makefile.programs diff -u llvm-test/Makefile.programs:1.271 llvm-test/Makefile.programs:1.272 --- llvm-test/Makefile.programs:1.271 Tue Jun 26 11:12:31 2007 +++ llvm-test/Makefile.programs Wed Jun 27 09:10:36 2007 @@ -235,7 +235,7 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -regalloc=local -fast +LLCBETAOPTION := -regalloc=bigblock -fast endif ifeq ($(ARCH),Sparc) LLCBETAOPTION := -enable-sparc-v9-insts ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.469 - 1.470
---
Log message:
Use getVectorTypeBreakdown in FunctionLoweringInfo::CreateRegForValue
to compute the number and type of registers needed for vector values
instead of computing it manually. This fixes PR1529: http://llvm.org/PR1529 .
---
Diffs of the changes: (+11 -44)
SelectionDAGISel.cpp | 55 ++-
1 files changed, 11 insertions(+), 44 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.469
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.470
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.469Mon Jun 25
11:23:39 2007
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Jun 27 09:34:07 2007
@@ -306,53 +306,20 @@
unsigned FunctionLoweringInfo::CreateRegForValue(const Value *V) {
MVT::ValueType VT = TLI.getValueType(V-getType());
- // The number of multiples of registers that we need, to, e.g., split up
- // a 2 x int64 - 4 x i32 registers.
- unsigned NumVectorRegs = 1;
-
- // If this is a vector type, figure out what type it will decompose into
- // and how many of the elements it will use.
+ unsigned NumRegisters;
+ MVT::ValueType RegisterVT;
if (MVT::isVector(VT)) {
-const VectorType *PTy = castVectorType(V-getType());
-unsigned NumElts = PTy-getNumElements();
-MVT::ValueType EltTy = TLI.getValueType(PTy-getElementType());
-MVT::ValueType VecTy = MVT::getVectorType(EltTy, NumElts);
-
-// Divide the input until we get to a supported size. This will always
-// end with a scalar if the target doesn't support vectors.
-while (NumElts 1 !TLI.isTypeLegal(VecTy)) {
- NumElts = 1;
- NumVectorRegs = 1;
- VecTy = MVT::getVectorType(EltTy, NumElts);
-}
-
-// Check that VecTy isn't a 1-element vector.
-if (NumElts == 1 VecTy == MVT::Other)
- VT = EltTy;
-else
- VT = VecTy;
+MVT::ValueType ElementVT;
+NumRegisters = TLI.getVectorTypeBreakdown(VT, ElementVT, RegisterVT);
+ } else {
+RegisterVT = TLI.getTypeToTransformTo(VT);
+NumRegisters = TLI.getNumRegisters(VT);
}
- // The common case is that we will only create one register for this
- // value. If we have that case, create and return the virtual register.
- unsigned NV = TLI.getNumRegisters(VT);
- if (NV == 1) {
-// If we are promoting this value, pick the next largest supported type.
-MVT::ValueType PromotedType = TLI.getTypeToTransformTo(VT);
-unsigned Reg = MakeReg(PromotedType);
-// If this is a vector of supported or promoted types (e.g. 4 x i16),
-// create all of the registers.
-for (unsigned i = 1; i != NumVectorRegs; ++i)
- MakeReg(PromotedType);
-return Reg;
- }
-
- // If this value is represented with multiple target registers, make sure
- // to create enough consecutive registers of the right (smaller) type.
- VT = TLI.getTypeToExpandTo(VT);
- unsigned R = MakeReg(VT);
- for (unsigned i = 1; i != NV*NumVectorRegs; ++i)
-MakeReg(VT);
+ unsigned R = MakeReg(RegisterVT);
+ for (unsigned i = 1; i != NumRegisters; ++i)
+MakeReg(RegisterVT);
+
return R;
}
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Re: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp LegalizeDAG.cpp SelectionDAG.cpp SelectionDAGISel.cpp TargetLowering.cpp
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.409 llvm/
lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.410
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.409 Fri Jun 22
09:59:07 2007
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Jun 25
11:23:39 2007
@@ -673,7 +673,9 @@
SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT,
bool isTarget) {
assert(MVT::isFloatingPoint(VT) Cannot create integer FP
constant!);
- if (VT == MVT::f32)
+ MVT::ValueType EltVT =
+MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
I don't understand this change. getConstantFP shouldn't be called on
vectors, should it? This seems to be a strange thing to overload.
Oops; that's a small part of an unrelated set of changes I'm working
on. That code isn't used currently.
Just as there isn't a special ADD node kind for vectors -- just an ADD
kind with nodes that can have a vector ValueType, ConstantFP can also
be vectorized. A ConstantFP with a vector ValueType is a vector constant,
equivalent to what is currently represented as a splat BUILD_VECTOR,
except that it's easier to work with :).
Dan
--
Dan Gohman, Cray Inc.
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[llvm-commits] CVS: llvm/lib/Target/X86/X86TargetAsmInfo.cpp
Changes in directory llvm/lib/Target/X86: X86TargetAsmInfo.cpp updated: 1.42 - 1.43 --- Log message: Remove a redundant newline in the asm output for ELF .rodata sections. --- Diffs of the changes: (+1 -1) X86TargetAsmInfo.cpp |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/lib/Target/X86/X86TargetAsmInfo.cpp diff -u llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.42 llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.43 --- llvm/lib/Target/X86/X86TargetAsmInfo.cpp:1.42 Sat May 12 17:36:25 2007 +++ llvm/lib/Target/X86/X86TargetAsmInfo.cppWed Jun 27 10:09:47 2007 @@ -98,7 +98,7 @@ break; case X86Subtarget::isELF: -ReadOnlySection = \t.section\t.rodata\n; +ReadOnlySection = \t.section\t.rodata; FourByteConstantSection = \t.section\t.rodata.cst4,\aM\,@progbits,4; EightByteConstantSection = \t.section\t.rodata.cst8,\aM\,@progbits,8; SixteenByteConstantSection = \t.section\t.rodata.cst16,\aM\,@progbits,16; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/ValueTypes.h
Changes in directory llvm/include/llvm/CodeGen: ValueTypes.h updated: 1.38 - 1.39 --- Log message: Document the encoding of MVT::ValueType. --- Diffs of the changes: (+6 -0) ValueTypes.h |6 ++ 1 files changed, 6 insertions(+) Index: llvm/include/llvm/CodeGen/ValueTypes.h diff -u llvm/include/llvm/CodeGen/ValueTypes.h:1.38 llvm/include/llvm/CodeGen/ValueTypes.h:1.39 --- llvm/include/llvm/CodeGen/ValueTypes.h:1.38 Tue Jun 26 10:20:04 2007 +++ llvm/include/llvm/CodeGen/ValueTypes.h Wed Jun 27 10:28:26 2007 @@ -82,6 +82,12 @@ /// Note that simple doesn't necessary mean legal for the target machine. /// All legal value types must be simple, but often there are some simple /// value types that are not legal. + /// + /// @internal + /// Currently extended types are always vector types. Extended types are + /// encoded by having the first SimpleTypeBits bits encode the vector + /// element type (which must be a scalar type) and the remaining upper + /// bits encode the vector length, offset by one. typedef uint32_t ValueType; static const int SimpleTypeBits = 8; ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+ + // If either operand is undef, the result is undef + if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF) +return DAG.getNode(ISD::UNDEF, VT); + return SDOperand(); } This is not safe for sdiv/udiv. Safe xforms are: // undef / X - 0 // X / undef - undef If in doubt, plz check instcombine. Thanks for correcting me on the undef rules. I'll check in a fix for the code soon. For this sdiv/udiv one though, why is undef/X not undef? For any non-zero value of X there's at least one value the undef might have which makes the divide have a non-zero result. I think that undef udiv intmax - 0, no? If not, plz update instcombine as well. intmax udiv intmax - 1. It seems like folding undef/X to undef isn't safe either though, with the way it sounds like undef is intended to work. This code: %x = udiv i32 undef, %intmax %y = udiv i32 %x, 2 will always set %y to 0. Maybe instcombine can fold the second udiv by looking through its operands, but it can't safely fold the first. The best it could do is try to fold away all of %x's uses so that %x isn't needed anymore. Even simple things like undef+X don't seem to be safe to fold. %x = undef; if (%x = 0) %z = %y / (%x + 1); // don't divide by undef! (offtopic, wouldn't it be nifty to have a parser for LLVM that used a C-ish expression syntax?). It seems that only undef*0 and undef+0 and a few similar things are really safe here. And those aren't specific to undef. Dan -- Dan Gohman, Cray Inc. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h
Changes in directory llvm/include/llvm/Target:
TargetLowering.h updated: 1.132 - 1.133
---
Log message:
Rename (shrinkify) MVT::isExtendedValueType to MVT::isExtendedVT.
---
Diffs of the changes: (+13 -13)
TargetLowering.h | 26 +-
1 files changed, 13 insertions(+), 13 deletions(-)
Index: llvm/include/llvm/Target/TargetLowering.h
diff -u llvm/include/llvm/Target/TargetLowering.h:1.132
llvm/include/llvm/Target/TargetLowering.h:1.133
--- llvm/include/llvm/Target/TargetLowering.h:1.132 Tue Jun 26 11:19:08 2007
+++ llvm/include/llvm/Target/TargetLowering.h Wed Jun 27 11:08:04 2007
@@ -120,7 +120,7 @@
/// getRegClassFor - Return the register class that should be used for the
/// specified value type. This may only be called on legal types.
TargetRegisterClass *getRegClassFor(MVT::ValueType VT) const {
-assert(!MVT::isExtendedValueType(VT));
+assert(!MVT::isExtendedVT(VT));
TargetRegisterClass *RC = RegClassForVT[VT];
assert(RC This value type is not natively supported!);
return RC;
@@ -130,7 +130,7 @@
/// specified value type. This means that it has a register that directly
/// holds it without promotions or expansions.
bool isTypeLegal(MVT::ValueType VT) const {
-return !MVT::isExtendedValueType(VT) RegClassForVT[VT] != 0;
+return !MVT::isExtendedVT(VT) RegClassForVT[VT] != 0;
}
class ValueTypeActionImpl {
@@ -148,11 +148,11 @@
}
LegalizeAction getTypeAction(MVT::ValueType VT) const {
- if (MVT::isExtendedValueType(VT)) return Expand;
+ if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((ValueTypeActions[VT4] ((2*VT) 31)) 3);
}
void setTypeAction(MVT::ValueType VT, LegalizeAction Action) {
- assert(!MVT::isExtendedValueType(VT));
+ assert(!MVT::isExtendedVT(VT));
assert(unsigned(VT 4)
sizeof(ValueTypeActions)/sizeof(ValueTypeActions[0]));
ValueTypeActions[VT4] |= Action ((VT*2) 31);
@@ -178,7 +178,7 @@
/// to get to the smaller register. For illegal floating point types, this
/// returns the integer type to transform to.
MVT::ValueType getTypeToTransformTo(MVT::ValueType VT) const {
-if (MVT::isExtendedValueType(VT))
+if (MVT::isExtendedVT(VT))
return MVT::getVectorType(MVT::getVectorElementType(VT),
MVT::getVectorNumElements(VT) / 2);
@@ -190,7 +190,7 @@
/// that are larger than the largest integer register or illegal floating
/// point types), this returns the largest legal type it will be expanded to.
MVT::ValueType getTypeToExpandTo(MVT::ValueType VT) const {
-assert(!MVT::isExtendedValueType(VT));
+assert(!MVT::isExtendedVT(VT));
while (true) {
switch (getTypeAction(VT)) {
case Legal:
@@ -250,7 +250,7 @@
/// expanded to some other code sequence, or the target has a custom expander
/// for it.
LegalizeAction getOperationAction(unsigned Op, MVT::ValueType VT) const {
-if (MVT::isExtendedValueType(VT)) return Expand;
+if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((OpActions[Op] (2*VT)) 3);
}
@@ -266,7 +266,7 @@
/// expanded to some other code sequence, or the target has a custom expander
/// for it.
LegalizeAction getLoadXAction(unsigned LType, MVT::ValueType VT) const {
-if (MVT::isExtendedValueType(VT)) return Expand;
+if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((LoadXActions[LType] (2*VT)) 3);
}
@@ -282,7 +282,7 @@
/// expanded to some other code sequence, or the target has a custom expander
/// for it.
LegalizeAction getStoreXAction(MVT::ValueType VT) const {
-if (MVT::isExtendedValueType(VT)) return Expand;
+if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((StoreXActions (2*VT)) 3);
}
@@ -298,7 +298,7 @@
/// for it.
LegalizeAction
getIndexedLoadAction(unsigned IdxMode, MVT::ValueType VT) const {
-if (MVT::isExtendedValueType(VT)) return Expand;
+if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((IndexedModeActions[0][IdxMode] (2*VT)) 3);
}
@@ -315,7 +315,7 @@
/// for it.
LegalizeAction
getIndexedStoreAction(unsigned IdxMode, MVT::ValueType VT) const {
-if (MVT::isExtendedValueType(VT)) return Expand;
+if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((IndexedModeActions[1][IdxMode] (2*VT)) 3);
}
@@ -365,7 +365,7 @@
/// registers, but may be more than one for types (like i64) that are split
/// into pieces.
unsigned getNumRegisters(MVT::ValueType VT) const {
-if (!MVT::isExtendedValueType(VT))
+if (!MVT::isExtendedVT(VT))
return NumRegistersForVT[VT];
MVT::ValueType VT1, VT2;
@@ -665,7 +665,7 @@
/// regclass for the specified value type. This indicates the selector can
/// handle values of that class natively.
[llvm-commits] CVS: llvm/lib/VMCore/ValueTypes.cpp
Changes in directory llvm/lib/VMCore:
ValueTypes.cpp updated: 1.20 - 1.21
---
Log message:
Rename (shrinkify) MVT::isExtendedValueType to MVT::isExtendedVT.
---
Diffs of the changes: (+2 -2)
ValueTypes.cpp |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/VMCore/ValueTypes.cpp
diff -u llvm/lib/VMCore/ValueTypes.cpp:1.20 llvm/lib/VMCore/ValueTypes.cpp:1.21
--- llvm/lib/VMCore/ValueTypes.cpp:1.20 Tue Jun 26 10:14:48 2007
+++ llvm/lib/VMCore/ValueTypes.cpp Wed Jun 27 11:08:04 2007
@@ -22,7 +22,7 @@
std::string MVT::getValueTypeString(MVT::ValueType VT) {
switch (VT) {
default:
-if (isExtendedValueType(VT))
+if (isExtendedVT(VT))
return v + utostr(getVectorNumElements(VT)) +
getValueTypeString(getVectorElementType(VT));
assert(0 Invalid ValueType!);
@@ -59,7 +59,7 @@
const Type *MVT::getTypeForValueType(MVT::ValueType VT) {
switch (VT) {
default:
-if (isExtendedValueType(VT))
+if (isExtendedVT(VT))
return VectorType::get(getTypeForValueType(getVectorElementType(VT)),
getVectorNumElements(VT));
assert(0 ValueType does not correspond to LLVM type!);
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAG.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.502 - 1.503
SelectionDAG.cpp updated: 1.410 - 1.411
---
Log message:
Rename (shrinkify) MVT::isExtendedValueType to MVT::isExtendedVT.
---
Diffs of the changes: (+2 -2)
LegalizeDAG.cpp |2 +-
SelectionDAG.cpp |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.502
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.503
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.502 Wed Jun 27 09:06:22 2007
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Jun 27 11:08:04 2007
@@ -1714,7 +1714,7 @@
break;
case Expand: {
SDOperand Lo, Hi;
-
assert(!MVT::isExtendedValueType(Node-getOperand(i).getValueType())
+ assert(!MVT::isExtendedVT(Node-getOperand(i).getValueType())
FIXME: TODO: implement returning non-legal vector types!);
ExpandOp(Node-getOperand(i), Lo, Hi);
NewValues.push_back(Lo);
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.410
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.411
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.410Mon Jun 25
11:23:39 2007
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jun 27 11:08:04 2007
@@ -2475,7 +2475,7 @@
}
SDVTList SelectionDAG::getVTList(MVT::ValueType VT) {
- if (!MVT::isExtendedValueType(VT))
+ if (!MVT::isExtendedVT(VT))
return makeVTList(SDNode::getValueTypeList(VT), 1);
for (std::liststd::vectorMVT::ValueType ::iterator I = VTList.begin(),
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/ValueTypes.h
Changes in directory llvm/include/llvm/CodeGen:
ValueTypes.h updated: 1.39 - 1.40
---
Log message:
Rename (shrinkify) MVT::isExtendedValueType to MVT::isExtendedVT.
---
Diffs of the changes: (+6 -6)
ValueTypes.h | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
Index: llvm/include/llvm/CodeGen/ValueTypes.h
diff -u llvm/include/llvm/CodeGen/ValueTypes.h:1.39
llvm/include/llvm/CodeGen/ValueTypes.h:1.40
--- llvm/include/llvm/CodeGen/ValueTypes.h:1.39 Wed Jun 27 10:28:26 2007
+++ llvm/include/llvm/CodeGen/ValueTypes.h Wed Jun 27 11:08:04 2007
@@ -95,9 +95,9 @@
static const uint32_t SimpleTypeMask =
(~uint32_t(0) (32 - SimpleTypeBits)) (32 - SimpleTypeBits);
- /// MVT::isExtendedValueType - Test if the given ValueType is extended
+ /// MVT::isExtendedVT - Test if the given ValueType is extended
/// (as opposed to being simple).
- static inline bool isExtendedValueType(ValueType VT) {
+ static inline bool isExtendedVT(ValueType VT) {
return VT SimpleTypeMask;
}
@@ -117,7 +117,7 @@
/// MVT::isVector - Return true if this is a vector value type.
static inline bool isVector(ValueType VT) {
return (VT = FIRST_VECTOR_VALUETYPE VT = LAST_VECTOR_VALUETYPE) ||
- isExtendedValueType(VT);
+ isExtendedVT(VT);
}
/// MVT::getVectorElementType - Given a vector type, return the type of
@@ -125,7 +125,7 @@
static inline ValueType getVectorElementType(ValueType VT) {
switch (VT) {
default:
- if (isExtendedValueType(VT))
+ if (isExtendedVT(VT))
return VT SimpleTypeMask;
assert(0 Invalid vector type!);
case v8i8 :
@@ -147,7 +147,7 @@
static inline unsigned getVectorNumElements(ValueType VT) {
switch (VT) {
default:
- if (isExtendedValueType(VT))
+ if (isExtendedVT(VT))
return ((VT ~SimpleTypeMask) SimpleTypeBits) - 1;
assert(0 Invalid vector type!);
case v16i8: return 16;
@@ -170,7 +170,7 @@
static inline unsigned getSizeInBits(ValueType VT) {
switch (VT) {
default:
- if (isExtendedValueType(VT))
+ if (isExtendedVT(VT))
return getSizeInBits(getVectorElementType(VT)) *
getVectorNumElements(VT);
assert(0 ValueType has no known size!);
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Re: [llvm-commits] CVS: llvm/include/llvm/CodeGen/CallingConvLower.h SelectionDAG.h SelectionDAGNodes.h ValueTypes.h
@@ -76,64 +73,55 @@ iPTR = 255 is 255 a good sentinel for iPTR anymore? Would we gain anything by making SimpleTypeBits less than 8? If someone ever wants to actually do the arbitrary bitwidth stuff in codegen this will need to be revisited, but right now 8 leaves 24 bits for a linear vector length, which seems enough to be comfortable. Dan -- Dan Gohman, Cray Inc. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
On Jun 27, 2007, at 2:50 AM, Zhou Sheng wrote:
Fix a bug.
Testcase plz! What does this do, it seems wrong.
-Chris
---
Diffs of the changes: (+4 -1)
IndVarSimplify.cpp |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
diff -u llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.123 llvm/
lib/Transforms/Scalar/IndVarSimplify.cpp:1.124
--- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp:1.123 Tue Jun 19
09:28:31 2007
+++ llvm/lib/Transforms/Scalar/IndVarSimplify.cpp Wed Jun 27
04:50:26 2007
@@ -519,8 +519,11 @@
DOUT INDVARS: New CanIV: *IndVar;
if (!isaSCEVCouldNotCompute(IterationCount)) {
-if (IterationCount-getType() != LargestType)
+if (IterationCount-getType()-getPrimitiveSizeInBits()
+LargestType-getPrimitiveSizeInBits())
IterationCount = SCEVZeroExtendExpr::get(IterationCount,
LargestType);
+else if (IterationCount-getType() != LargestType)
+ IterationCount = SCEVTruncateExpr::get(IterationCount,
LargestType);
if (Instruction *DI = LinearFunctionTestReplace(L,
IterationCount,Rewriter))
DeadInsts.insert(DI);
}
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/GVNPRE.cpp
Changes in directory llvm/lib/Transforms/Scalar:
GVNPRE.cpp updated: 1.60 - 1.61
---
Log message:
Fold a lot of code into two cases: binary instructions and ternary instructions.
This saves many lines of code duplication. No functionality change.
---
Diffs of the changes: (+62 -269)
GVNPRE.cpp | 331 +++--
1 files changed, 62 insertions(+), 269 deletions(-)
Index: llvm/lib/Transforms/Scalar/GVNPRE.cpp
diff -u llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.60
llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.61
--- llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.60 Tue Jun 26 23:10:46 2007
+++ llvm/lib/Transforms/Scalar/GVNPRE.cpp Wed Jun 27 12:03:03 2007
@@ -679,153 +679,75 @@
for (unsigned i = 0; i worklist.size(); ++i) {
Value* v = worklist[i];
-if (BinaryOperator* BO = dyn_castBinaryOperator(v)) {
- bool lhsValid = !isaInstruction(BO-getOperand(0));
+// Handle binary ops
+if (isaBinaryOperator(v) || isaCmpInst(v) ||
+isaExtractElementInst(v)) {
+ User* U = castUser(v);
+
+ bool lhsValid = !isaInstruction(U-getOperand(0));
if (!lhsValid)
for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
I != E; ++I)
- if (VN.lookup(*I) == VN.lookup(BO-getOperand(0))) {
+ if (VN.lookup(*I) == VN.lookup(U-getOperand(0))) {
lhsValid = true;
break;
}
if (lhsValid)
-lhsValid = !dependsOnInvoke(BO-getOperand(0));
+lhsValid = !dependsOnInvoke(U-getOperand(0));
- bool rhsValid = !isaInstruction(BO-getOperand(1));
+ bool rhsValid = !isaInstruction(U-getOperand(1));
if (!rhsValid)
for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
I != E; ++I)
- if (VN.lookup(*I) == VN.lookup(BO-getOperand(1))) {
+ if (VN.lookup(*I) == VN.lookup(U-getOperand(1))) {
rhsValid = true;
break;
}
if (rhsValid)
-rhsValid = !dependsOnInvoke(BO-getOperand(1));
+rhsValid = !dependsOnInvoke(U-getOperand(1));
if (!lhsValid || !rhsValid)
-set.erase(BO);
-} else if (CmpInst* C = dyn_castCmpInst(v)) {
- bool lhsValid = !isaInstruction(C-getOperand(0));
- if (!lhsValid)
-for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
- I != E; ++I)
- if (VN.lookup(*I) == VN.lookup(C-getOperand(0))) {
-lhsValid = true;
-break;
- }
- if (lhsValid)
-lhsValid = !dependsOnInvoke(C-getOperand(0));
-
- bool rhsValid = !isaInstruction(C-getOperand(1));
- if (!rhsValid)
- for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
- I != E; ++I)
-if (VN.lookup(*I) == VN.lookup(C-getOperand(1))) {
- rhsValid = true;
- break;
-}
- if (rhsValid)
-rhsValid = !dependsOnInvoke(C-getOperand(1));
+set.erase(U);
- if (!lhsValid || !rhsValid)
-set.erase(C);
-} else if (ShuffleVectorInst* S = dyn_castShuffleVectorInst(v)) {
- bool lhsValid = !isaInstruction(S-getOperand(0));
- if (!lhsValid)
-for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
- I != E; ++I)
- if (VN.lookup(*I) == VN.lookup(S-getOperand(0))) {
-lhsValid = true;
-break;
- }
- if (lhsValid)
-lhsValid = !dependsOnInvoke(S-getOperand(0));
-
- bool rhsValid = !isaInstruction(S-getOperand(1));
- if (!rhsValid)
- for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
- I != E; ++I)
-if (VN.lookup(*I) == VN.lookup(S-getOperand(1))) {
- rhsValid = true;
- break;
-}
- if (rhsValid)
-rhsValid = !dependsOnInvoke(S-getOperand(1));
-
- bool thirdValid = !isaInstruction(S-getOperand(2));
- if (!thirdValid)
- for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
- I != E; ++I)
-if (VN.lookup(*I) == VN.lookup(S-getOperand(2))) {
- thirdValid = true;
- break;
-}
- if (thirdValid)
-thirdValid = !dependsOnInvoke(S-getOperand(2));
+// Handle ternary ops
+} else if (isaShuffleVectorInst(v) || isaInsertElementInst(v)) {
+ User* U = castUser(v);
- if (!lhsValid || !rhsValid || !thirdValid)
-set.erase(C);
-} else if (InsertElementInst* S = dyn_castInsertElementInst(v)) {
- bool lhsValid = !isaInstruction(S-getOperand(0));
+ bool lhsValid = !isaInstruction(U-getOperand(0));
if (!lhsValid)
for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
I != E; ++I)
- if (VN.lookup(*I) == VN.lookup(S-getOperand(0))) {
+ if (VN.lookup(*I) ==
Re: [llvm-commits] CVS: llvm/include/llvm/CodeGen/CallingConvLower.h SelectionDAG.h SelectionDAGNodes.h ValueTypes.h
On Jun 27, 2007, at 9:16 AM, Dan Gohman wrote: @@ -76,64 +73,55 @@ iPTR = 255 is 255 a good sentinel for iPTR anymore? Would we gain anything by making SimpleTypeBits less than 8? If someone ever wants to actually do the arbitrary bitwidth stuff in codegen this will need to be revisited, but right now 8 leaves 24 bits for a linear vector length, which seems enough to be comfortable. Ok -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp
Changes in directory llvm/utils/TableGen:
RegisterInfoEmitter.cpp updated: 1.58 - 1.59
---
Log message:
One additional field in TargetRegisterDesc.
---
Diffs of the changes: (+1 -1)
RegisterInfoEmitter.cpp |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp
diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.58
llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.59
--- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.58Tue Jun 26 15:54:46 2007
+++ llvm/utils/TableGen/RegisterInfoEmitter.cpp Wed Jun 27 12:09:34 2007
@@ -468,7 +468,7 @@
}
OS\n const TargetRegisterDesc RegisterDescriptors[] = { //
Descriptors\n;
- OS { \NOREG\,\t0,\t0,\t0 },\n;
+ OS { \NOREG\,\t0,\t0,\t0,\t0 },\n;
// Now that register alias and sub-registers sets have been emitted, emit the
// register descriptors now.
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Re: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp LegalizeDAG.cpp SelectionDAG.cpp SelectionDAGISel.cpp TargetLowering.cpp
On Jun 27, 2007, at 7:59 AM, Dan Gohman wrote:
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.409 llvm/
lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.410
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.409Fri Jun 22
09:59:07 2007
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Jun 25
11:23:39 2007
@@ -673,7 +673,9 @@
SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType
VT,
bool isTarget) {
assert(MVT::isFloatingPoint(VT) Cannot create integer FP
constant!);
- if (VT == MVT::f32)
+ MVT::ValueType EltVT =
+MVT::isVector(VT) ? MVT::getVectorElementType(VT) : VT;
I don't understand this change. getConstantFP shouldn't be called on
vectors, should it? This seems to be a strange thing to overload.
Oops; that's a small part of an unrelated set of changes I'm working
on. That code isn't used currently.
Just as there isn't a special ADD node kind for vectors -- just an ADD
kind with nodes that can have a vector ValueType, ConstantFP can also
be vectorized. A ConstantFP with a vector ValueType is a vector
constant,
equivalent to what is currently represented as a splat BUILD_VECTOR,
except that it's easier to work with :).
I'm not opposed to doing this, but I don't think we should overload
ConstantFP() and getConstantFP() for this. Could you make a new
VectorConstantFP or something?
-Chris
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Re: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
I think that undef udiv intmax - 0, no? If not, plz update instcombine as well. intmax udiv intmax - 1. It seems like folding undef/X to undef isn't safe either though, with the way it sounds like undef is intended to work. This code: %x = udiv i32 undef, %intmax %y = udiv i32 %x, 2 will always set %y to 0. Maybe instcombine can fold the second udiv by looking through its operands, but it can't safely fold the first. The best it could do is try to fold away all of %x's uses so that %x isn't needed anymore. Ug, excellent point. At this point, I'm inclined to just give up folding of udiv undefs. What do you think? Even simple things like undef+X don't seem to be safe to fold. %x = undef; if (%x = 0) %z = %y / (%x + 1); // don't divide by undef! Fortunately, this isn't a problem. LLVM has no copy instruction, so the code is really this: if (undef = 0) %z = %y / (undef + 1); // don't divide by undef! There is nothing that specifies the two undefs are the same value. Also, in C, if you have an undefined variable, you aren't guaranteed to get the same undef value each time you read the variable, so transforming C into LLVM is ok :) (offtopic, wouldn't it be nifty to have a parser for LLVM that used a C-ish expression syntax?). Hopefully I'll check in a new parser in a few weeks for llvm that accepts something very *very* similar to C. :) -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/GVNPRE.cpp
Changes in directory llvm/lib/Transforms/Scalar:
GVNPRE.cpp updated: 1.61 - 1.62
---
Log message:
Use cached information that has already been computed to make clean() simpler
and faster. This is a small speedup on most cases.
---
Diffs of the changes: (+31 -52)
GVNPRE.cpp | 83 ++---
1 files changed, 31 insertions(+), 52 deletions(-)
Index: llvm/lib/Transforms/Scalar/GVNPRE.cpp
diff -u llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.61
llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.62
--- llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.61 Wed Jun 27 12:03:03 2007
+++ llvm/lib/Transforms/Scalar/GVNPRE.cpp Wed Jun 27 12:38:29 2007
@@ -429,7 +429,7 @@
// Helper fuctions
// FIXME: eliminate or document these better
void dump(const SmallPtrSetValue*, 32 s) const;
-void clean(SmallPtrSetValue*, 32 set);
+void clean(SmallPtrSetValue*, 32 set, BitVector presentInSet);
Value* find_leader(SmallPtrSetValue*, 32 vals,
uint32_t v);
Value* phi_translate(Value* V, BasicBlock* pred, BasicBlock* succ);
@@ -671,7 +671,7 @@
/// clean - Remove all non-opaque values from the set whose operands are not
/// themselves in the set, as well as all values that depend on invokes (see
/// above)
-void GVNPRE::clean(SmallPtrSetValue*, 32 set) {
+void GVNPRE::clean(SmallPtrSetValue*, 32 set, BitVector presentInSet) {
std::vectorValue* worklist;
worklist.reserve(set.size());
topo_sort(set, worklist);
@@ -685,69 +685,43 @@
User* U = castUser(v);
bool lhsValid = !isaInstruction(U-getOperand(0));
- if (!lhsValid)
-for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
- I != E; ++I)
- if (VN.lookup(*I) == VN.lookup(U-getOperand(0))) {
-lhsValid = true;
-break;
- }
+ lhsValid |= presentInSet.test(VN.lookup(U-getOperand(0)));
if (lhsValid)
lhsValid = !dependsOnInvoke(U-getOperand(0));
bool rhsValid = !isaInstruction(U-getOperand(1));
- if (!rhsValid)
-for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
- I != E; ++I)
- if (VN.lookup(*I) == VN.lookup(U-getOperand(1))) {
-rhsValid = true;
-break;
- }
+ rhsValid |= presentInSet.test(VN.lookup(U-getOperand(1)));
if (rhsValid)
rhsValid = !dependsOnInvoke(U-getOperand(1));
- if (!lhsValid || !rhsValid)
+ if (!lhsValid || !rhsValid) {
set.erase(U);
+presentInSet.flip(VN.lookup(U));
+ }
// Handle ternary ops
} else if (isaShuffleVectorInst(v) || isaInsertElementInst(v)) {
User* U = castUser(v);
bool lhsValid = !isaInstruction(U-getOperand(0));
- if (!lhsValid)
-for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
- I != E; ++I)
- if (VN.lookup(*I) == VN.lookup(U-getOperand(0))) {
-lhsValid = true;
-break;
- }
+ lhsValid |= presentInSet.test(VN.lookup(U-getOperand(0)));
if (lhsValid)
lhsValid = !dependsOnInvoke(U-getOperand(0));
bool rhsValid = !isaInstruction(U-getOperand(1));
- if (!rhsValid)
- for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
- I != E; ++I)
-if (VN.lookup(*I) == VN.lookup(U-getOperand(1))) {
- rhsValid = true;
- break;
-}
+ rhsValid |= presentInSet.test(VN.lookup(U-getOperand(1)));
if (rhsValid)
rhsValid = !dependsOnInvoke(U-getOperand(1));
bool thirdValid = !isaInstruction(U-getOperand(2));
- if (!thirdValid)
- for (SmallPtrSetValue*, 32::iterator I = set.begin(), E = set.end();
- I != E; ++I)
-if (VN.lookup(*I) == VN.lookup(U-getOperand(2))) {
- thirdValid = true;
- break;
-}
+ thirdValid |= presentInSet.test(VN.lookup(U-getOperand(2)));
if (thirdValid)
thirdValid = !dependsOnInvoke(U-getOperand(2));
- if (!lhsValid || !rhsValid || !thirdValid)
+ if (!lhsValid || !rhsValid || !thirdValid) {
set.erase(U);
+presentInSet.flip(VN.lookup(U));
+ }
}
}
}
@@ -1042,17 +1016,18 @@
if (defer)
return 0;
-
-
anticIn.clear();
BitVector numbers(VN.size());
for (SmallPtrSetValue*, 32::iterator I = anticOut.begin(),
E = anticOut.end(); I != E; ++I) {
-anticIn.insert(*I);
unsigned num = VN.lookup_or_add(*I);
numbers.resize(VN.size());
-numbers.set(num);
+
+if (isaInstruction(*I)) {
+ anticIn.insert(*I);
+ numbers.set(num);
+}
}
for (SmallPtrSetValue*, 32::iterator I = currExps.begin(),
E = currExps.end(); I != E; ++I) {
@@ -1063,19 +1038,17 @@
}
for (SmallPtrSetValue*, 32::iterator I = currTemps.begin(),
- E =
[llvm-commits] [see] CVS: llvm/lib/Support/ConstantRange.cpp
Changes in directory llvm/lib/Support: ConstantRange.cpp (r1.16) removed --- Log message: This has moved to lib/Analysis. --- Diffs of the changes: (+0 -0) 0 files changed ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] Patch: JIT support for ARM
This is an initial implementation of ARM JIT support. So far, it hasn't generated code machine yet. Next patch must provide such feature. The tar.gzfile must be unpacked under lib/Target/ARM directory. Please, send me any feedback. Best regards, Raul. -- Raul Fernandes Herbster Embedded and Pervasive Computing Laboratory - embedded.dee.ufcg.edu.br Electrical Engineering Department - DEE - www.dee.ufcg.edu.br Electrical Engineering and Informatics Center - CEEI Federal University of Campina Grande - UFCG - www.ufcg.edu.br Caixa Postal 10105 58109-970 Campina Grande - PB - Brasil arm_jit_patch Description: Binary data arm_jit.tar.gz Description: GNU Zip compressed data ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
SelectionDAGISel.cpp updated: 1.470 - 1.471
---
Log message:
Partial fix for PR1502: http://llvm.org/PR1502 : If a EH register is needed in
a successor of landing pad, add it as livein to all the blocks in the paths
between the landing pad and the specified block.
---
Diffs of the changes: (+34 -11)
SelectionDAGISel.cpp | 45 ++---
1 files changed, 34 insertions(+), 11 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.470
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.471
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.470Wed Jun 27
09:34:07 2007
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Wed Jun 27 13:45:32 2007
@@ -2402,6 +2402,25 @@
MMI-addCatchTypeInfo(MBB, TyInfo);
}
+/// propagateEHRegister - The specified EH register is required in a successor
+/// of the EH landing pad. Propagate it (by adding it to livein) to all the
+/// blocks in the paths between the landing pad and the specified block.
+static void propagateEHRegister(MachineBasicBlock *MBB, unsigned EHReg,
+SmallPtrSetMachineBasicBlock*, 8 Visited) {
+ if (MBB-isLandingPad() || !Visited.insert(MBB))
+return;
+
+ MBB-addLiveIn(EHReg);
+ for (MachineBasicBlock::pred_iterator PI = MBB-pred_begin(),
+ E = MBB-pred_end(); PI != E; ++PI)
+propagateEHRegister(*PI, EHReg, Visited);
+}
+
+static void propagateEHRegister(MachineBasicBlock *MBB, unsigned EHReg) {
+ SmallPtrSetMachineBasicBlock*, 8 Visited;
+ propagateEHRegister(MBB, EHReg, Visited);
+}
+
/// visitIntrinsicCall - Lower the call to the specified intrinsic function.
If
/// we want to emit this as a call to a named external function, return the
name
/// otherwise lower it and return null.
@@ -2511,12 +2530,9 @@
}
case Intrinsic::eh_exception: {
-MachineModuleInfo *MMI = DAG.getMachineModuleInfo();
-
-if (ExceptionHandling MMI) {
- // Mark exception register as live in.
- unsigned Reg = TLI.getExceptionAddressRegister();
- if (Reg) CurMBB-addLiveIn(Reg);
+if (ExceptionHandling) {
+ if (!CurMBB-isLandingPad() TLI.getExceptionAddressRegister())
+ propagateEHRegister(CurMBB, TLI.getExceptionAddressRegister());
// Insert the EXCEPTIONADDR instruction.
SDVTList VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
@@ -2538,14 +2554,13 @@
if (ExceptionHandling MMI) {
if (CurMBB-isLandingPad())
addCatchInfo(I, MMI, CurMBB);
+ else {
#ifndef NDEBUG
- else
FuncInfo.CatchInfoLost.insert(I);
#endif
-
- // Mark exception selector register as live in.
- unsigned Reg = TLI.getExceptionSelectorRegister();
- if (Reg) CurMBB-addLiveIn(Reg);
+if (TLI.getExceptionSelectorRegister())
+ propagateEHRegister(CurMBB, TLI.getExceptionSelectorRegister());
+ }
// Insert the EHSELECTION instruction.
SDVTList VTs = DAG.getVTList(TLI.getPointerTy(), MVT::Other);
@@ -4482,6 +4497,14 @@
DAG.setRoot(DAG.getNode(ISD::LABEL, MVT::Other, DAG.getEntryNode(),
DAG.getConstant(LabelID, MVT::i32)));
+// Mark exception register as live in.
+unsigned Reg = TLI.getExceptionAddressRegister();
+if (Reg) BB-addLiveIn(Reg);
+
+// Mark exception selector register as live in.
+Reg = TLI.getExceptionSelectorRegister();
+if (Reg) BB-addLiveIn(Reg);
+
// FIXME: Hack around an exception handling flaw (PR1508): the personality
// function and list of typeids logically belong to the invoke (or, if you
// like, the basic block containing the invoke), and need to be associated
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[llvm-commits] CVS: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
Changes in directory llvm/lib/CodeGen:
LiveIntervalAnalysis.cpp updated: 1.249 - 1.250
---
Log message:
If a livein is not used in the block. It's live through.
---
Diffs of the changes: (+8 -5)
LiveIntervalAnalysis.cpp | 13 -
1 files changed, 8 insertions(+), 5 deletions(-)
Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.249
llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.250
--- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.249 Tue Jun 26 20:16:36 2007
+++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp Wed Jun 27 13:47:28 2007
@@ -625,13 +625,15 @@
exit:
// Live-in register might not be used at all.
if (end == MIIdx) {
-DOUT dead;
-if (isAlias)
+if (isAlias) {
+ DOUT dead;
end = getDefIndex(MIIdx) + 1;
+} else {
+ DOUT live through;
+ end = baseIndex;
+}
}
- assert(start end did not find end of interval?);
-
LiveRange LR(start, end, interval.getNextValue(~0U, 0));
DOUT + LR '\n';
interval.addRange(LR);
@@ -662,7 +664,8 @@
// Multiple live-ins can alias the same register.
for (const unsigned* AS = mri_-getSubRegisters(*LI); *AS; ++AS)
if (!hasInterval(*AS))
-handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*AS), true);
+handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*AS),
+ true);
}
}
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[llvm-commits] CVS: llvm-www/GSoCProjects.html
Changes in directory llvm-www: GSoCProjects.html updated: 1.2 - 1.3 --- Log message: Add link to the llvm-qemu project home. Btw, should we add this page somewhere? --- Diffs of the changes: (+2 -1) GSoCProjects.html |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm-www/GSoCProjects.html diff -u llvm-www/GSoCProjects.html:1.2 llvm-www/GSoCProjects.html:1.3 --- llvm-www/GSoCProjects.html:1.2 Fri Apr 13 00:45:07 2007 +++ llvm-www/GSoCProjects.html Wed Jun 27 14:37:04 2007 @@ -65,6 +65,7 @@ translator/td/tr trthStudent/thtdTilmann Scheller/td/tr trthMentor/thtdPaul Brook/td/tr +trthLink/thtdhttp://code.google.com/p/llvm-qemu//td/tr /table /div @@ -78,7 +79,7 @@ src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a a href=http://llvm.org;LLVM Compiler Infrastructure/abr - Last modified: $Date: 2007/04/13 05:45:07 $ + Last modified: $Date: 2007/06/27 19:37:04 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm-www/GSoCProjects.html
Changes in directory llvm-www: GSoCProjects.html updated: 1.3 - 1.4 --- Log message: Make it to be real link --- Diffs of the changes: (+5 -2) GSoCProjects.html |7 +-- 1 files changed, 5 insertions(+), 2 deletions(-) Index: llvm-www/GSoCProjects.html diff -u llvm-www/GSoCProjects.html:1.3 llvm-www/GSoCProjects.html:1.4 --- llvm-www/GSoCProjects.html:1.3 Wed Jun 27 14:37:04 2007 +++ llvm-www/GSoCProjects.html Wed Jun 27 14:39:03 2007 @@ -65,7 +65,10 @@ translator/td/tr trthStudent/thtdTilmann Scheller/td/tr trthMentor/thtdPaul Brook/td/tr -trthLink/thtdhttp://code.google.com/p/llvm-qemu//td/tr +trthLink/thtd +a href=http://code.google.com/p/llvm-qemu/; + http://code.google.com/p/llvm-qemu//a +/td/tr /table /div @@ -79,7 +82,7 @@ src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a a href=http://llvm.org;LLVM Compiler Infrastructure/abr - Last modified: $Date: 2007/06/27 19:37:04 $ + Last modified: $Date: 2007/06/27 19:39:03 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm-www/GSoCProjects.html
Add link to the llvm-qemu project home. Btw, should we add this page somewhere? GSoCProjects.html should be linked somewhere. Any suggestions? -Chris --- Diffs of the changes: (+2 -1) GSoCProjects.html |3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) Index: llvm-www/GSoCProjects.html diff -u llvm-www/GSoCProjects.html:1.2 llvm-www/GSoCProjects.html:1.3 --- llvm-www/GSoCProjects.html:1.2Fri Apr 13 00:45:07 2007 +++ llvm-www/GSoCProjects.htmlWed Jun 27 14:37:04 2007 @@ -65,6 +65,7 @@ translator/td/tr trthStudent/thtdTilmann Scheller/td/tr trthMentor/thtdPaul Brook/td/tr +trthLink/thtdhttp://code.google.com/p/llvm-qemu//td/ tr /table /div @@ -78,7 +79,7 @@ src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a a href=http://llvm.org;LLVM Compiler Infrastructure/abr - Last modified: $Date: 2007/04/13 05:45:07 $ + Last modified: $Date: 2007/06/27 19:37:04 $ /address !--#include virtual=footer.incl -- ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
I think that undef udiv intmax - 0, no? If not, plz update instcombine as well. intmax udiv intmax - 1. It seems like folding undef/X to undef isn't safe either though, with the way it sounds like undef is intended to work. This code: %x = udiv i32 undef, %intmax %y = udiv i32 %x, 2 will always set %y to 0. Maybe instcombine can fold the second udiv by looking through its operands, but it can't safely fold the first. The best it could do is try to fold away all of %x's uses so that %x isn't needed anymore. Ug, excellent point. At this point, I'm inclined to just give up folding of udiv undefs. What do you think? udiv isn't the only one, the way this is going... %x = mul i32 undef, 2 %y = srem i32 %x, 2 %x = and i32 undef, 0x %y = and i32 %x,0x and so on for a lot of others. add, sub, and xor, might be different though; the example below is relevant. Even simple things like undef+X don't seem to be safe to fold. %x = undef; if (%x = 0) %z = %y / (%x + 1); // don't divide by undef! Fortunately, this isn't a problem. LLVM has no copy instruction, so the code is really this: if (undef = 0) %z = %y / (undef + 1); // don't divide by undef! There is nothing that specifies the two undefs are the same value. Also, in C, if you have an undefined variable, you aren't guaranteed to get the same undef value each time you read the variable, so transforming C into LLVM is ok :) In C, an uninitialized variable has an indeterminate value, which is potentially a trap representation, which can't even be multiplied by zero without incurring undefined behavior. I don't know where it suggests that a variable with indeterminate value might be different on each read though. LLVM does so have copy instructions. The syntax is a little odd though, and the keyword is spelled 'bitcast' ;-). %x = bitcast i64 undef to i64; if (%x = 0) %z = %y / (%x + 1); // don't divide by undef! Now what should instcombine do? Dan -- Dan Gohman, Cray Inc. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/Analysis/Dominators.h ET-Forest.h
Changes in directory llvm/include/llvm/Analysis:
Dominators.h updated: 1.106 - 1.107
ET-Forest.h (r1.10) removed
---
Log message:
Remove ETForest.
---
Diffs of the changes: (+1 -168)
Dominators.h | 169 ---
1 files changed, 1 insertion(+), 168 deletions(-)
Index: llvm/include/llvm/Analysis/Dominators.h
diff -u llvm/include/llvm/Analysis/Dominators.h:1.106
llvm/include/llvm/Analysis/Dominators.h:1.107
--- llvm/include/llvm/Analysis/Dominators.h:1.106 Thu Jun 21 12:23:45 2007
+++ llvm/include/llvm/Analysis/Dominators.h Wed Jun 27 15:53:52 2007
@@ -9,9 +9,7 @@
//
// This file defines the following classes:
// 1. DominatorTree: Represent dominators as an explicit tree structure.
-// 2. ETForest: Efficient data structure for dominance comparisons and
-// nearest-common-ancestor queries.
-// 3. DominanceFrontier: Calculate and hold the dominance frontier for a
+// 2. DominanceFrontier: Calculate and hold the dominance frontier for a
// function.
//
// These data structures are listed in increasing order of complexity. It
@@ -23,7 +21,6 @@
#ifndef LLVM_ANALYSIS_DOMINATORS_H
#define LLVM_ANALYSIS_DOMINATORS_H
-#include llvm/Analysis/ET-Forest.h
#include llvm/Pass.h
#include set
@@ -347,170 +344,6 @@
};
-//===-
-/// ET-Forest Class - Class used to construct forwards and backwards
-/// ET-Forests
-///
-class ETForestBase : public DominatorBase {
-public:
- ETForestBase(intptr_t ID, bool isPostDom)
-: DominatorBase(ID, isPostDom), Nodes(),
- DFSInfoValid(false), SlowQueries(0) {}
-
- virtual void releaseMemory() { reset(); }
-
- typedef std::mapBasicBlock*, ETNode* ETMapType;
-
- // FIXME : There is no need to make this interface public.
- // Fix predicate simplifier.
- void updateDFSNumbers();
-
- /// dominates - Return true if A dominates B.
- ///
- inline bool dominates(BasicBlock *A, BasicBlock *B) {
-if (A == B)
- return true;
-
-ETNode *NodeA = getNode(A);
-ETNode *NodeB = getNode(B);
-
-if (DFSInfoValid)
- return NodeB-DominatedBy(NodeA);
-else {
- // If we end up with too many slow queries, just update the
- // DFS numbers on the theory that we are going to keep querying.
- SlowQueries++;
- if (SlowQueries 32) {
-updateDFSNumbers();
-return NodeB-DominatedBy(NodeA);
- }
- return NodeB-DominatedBySlow(NodeA);
-}
- }
-
- // dominates - Return true if A dominates B. This performs the
- // special checks necessary if A and B are in the same basic block.
- bool dominates(Instruction *A, Instruction *B);
-
- /// properlyDominates - Return true if A dominates B and A != B.
- ///
- bool properlyDominates(BasicBlock *A, BasicBlock *B) {
-return dominates(A, B) A != B;
- }
-
- /// isReachableFromEntry - Return true if A is dominated by the entry
- /// block of the function containing it.
- const bool isReachableFromEntry(BasicBlock* A);
-
- /// Return the nearest common dominator of A and B.
- BasicBlock *nearestCommonDominator(BasicBlock *A, BasicBlock *B) const {
-ETNode *NodeA = getNode(A);
-ETNode *NodeB = getNode(B);
-
-ETNode *Common = NodeA-NCA(NodeB);
-if (!Common)
- return NULL;
-return Common-getDataBasicBlock();
- }
-
- /// Return the immediate dominator of A.
- BasicBlock *getIDom(BasicBlock *A) const {
-ETNode *NodeA = getNode(A);
-if (!NodeA) return 0;
-const ETNode *idom = NodeA-getFather();
-return idom ? idom-getDataBasicBlock() : 0;
- }
-
- void getETNodeChildren(BasicBlock *A, std::vectorBasicBlock* children)
const {
-ETNode *NodeA = getNode(A);
-if (!NodeA) return;
-const ETNode* son = NodeA-getSon();
-
-if (!son) return;
-children.push_back(son-getDataBasicBlock());
-
-const ETNode* brother = son-getBrother();
-while (brother != son) {
- children.push_back(brother-getDataBasicBlock());
- brother = brother-getBrother();
-}
- }
-
- virtual void getAnalysisUsage(AnalysisUsage AU) const {
-AU.setPreservesAll();
-AU.addRequiredDominatorTree();
- }
-
//======//
- // API to update Forest information based on modifications
- // to the CFG...
-
- /// addNewBlock - Add a new block to the CFG, with the specified immediate
- /// dominator.
- ///
- void addNewBlock(BasicBlock *BB, BasicBlock *IDom);
-
- /// setImmediateDominator - Update the immediate dominator information to
- /// change the current immediate dominator for the specified block
- /// to another block. This method requires that BB for NewIDom
- /// already have an ETNode, otherwise just use addNewBlock.
- ///
- void setImmediateDominator(BasicBlock *BB, BasicBlock *NewIDom);
- /// print - Convert to human readable form
- ///
- virtual void print(std::ostream OS,
[llvm-commits] CVS: llvm/lib/VMCore/Dominators.cpp
Changes in directory llvm/lib/VMCore:
Dominators.cpp updated: 1.118 - 1.119
---
Log message:
Remove ETForest.
---
Diffs of the changes: (+0 -551)
Dominators.cpp | 551 -
1 files changed, 551 deletions(-)
Index: llvm/lib/VMCore/Dominators.cpp
diff -u llvm/lib/VMCore/Dominators.cpp:1.118
llvm/lib/VMCore/Dominators.cpp:1.119
--- llvm/lib/VMCore/Dominators.cpp:1.118Thu Jun 21 12:23:45 2007
+++ llvm/lib/VMCore/Dominators.cpp Wed Jun 27 15:53:52 2007
@@ -805,554 +805,3 @@
void DominanceFrontierBase::dump() {
print (llvm::cerr);
}
-
-
-//===--===//
-// ETOccurrence Implementation
-//===--===//
-
-void ETOccurrence::Splay() {
- ETOccurrence *father;
- ETOccurrence *grandfather;
- int occdepth;
- int fatherdepth;
-
- while (Parent) {
-occdepth = Depth;
-
-father = Parent;
-fatherdepth = Parent-Depth;
-grandfather = father-Parent;
-
-// If we have no grandparent, a single zig or zag will do.
-if (!grandfather) {
- setDepthAdd(fatherdepth);
- MinOccurrence = father-MinOccurrence;
- Min = father-Min;
-
- // See what we have to rotate
- if (father-Left == this) {
-// Zig
-father-setLeft(Right);
-setRight(father);
-if (father-Left)
- father-Left-setDepthAdd(occdepth);
- } else {
-// Zag
-father-setRight(Left);
-setLeft(father);
-if (father-Right)
- father-Right-setDepthAdd(occdepth);
- }
- father-setDepth(-occdepth);
- Parent = NULL;
-
- father-recomputeMin();
- return;
-}
-
-// If we have a grandfather, we need to do some
-// combination of zig and zag.
-int grandfatherdepth = grandfather-Depth;
-
-setDepthAdd(fatherdepth + grandfatherdepth);
-MinOccurrence = grandfather-MinOccurrence;
-Min = grandfather-Min;
-
-ETOccurrence *greatgrandfather = grandfather-Parent;
-
-if (grandfather-Left == father) {
- if (father-Left == this) {
-// Zig zig
-grandfather-setLeft(father-Right);
-father-setLeft(Right);
-setRight(father);
-father-setRight(grandfather);
-
-father-setDepth(-occdepth);
-
-if (father-Left)
- father-Left-setDepthAdd(occdepth);
-
-grandfather-setDepth(-fatherdepth);
-if (grandfather-Left)
- grandfather-Left-setDepthAdd(fatherdepth);
- } else {
-// Zag zig
-grandfather-setLeft(Right);
-father-setRight(Left);
-setLeft(father);
-setRight(grandfather);
-
-father-setDepth(-occdepth);
-if (father-Right)
- father-Right-setDepthAdd(occdepth);
-grandfather-setDepth(-occdepth - fatherdepth);
-if (grandfather-Left)
- grandfather-Left-setDepthAdd(occdepth + fatherdepth);
- }
-} else {
- if (father-Left == this) {
-// Zig zag
-grandfather-setRight(Left);
-father-setLeft(Right);
-setLeft(grandfather);
-setRight(father);
-
-father-setDepth(-occdepth);
-if (father-Left)
- father-Left-setDepthAdd(occdepth);
-grandfather-setDepth(-occdepth - fatherdepth);
-if (grandfather-Right)
- grandfather-Right-setDepthAdd(occdepth + fatherdepth);
- } else { // Zag Zag
-grandfather-setRight(father-Left);
-father-setRight(Left);
-setLeft(father);
-father-setLeft(grandfather);
-
-father-setDepth(-occdepth);
-if (father-Right)
- father-Right-setDepthAdd(occdepth);
-grandfather-setDepth(-fatherdepth);
-if (grandfather-Right)
- grandfather-Right-setDepthAdd(fatherdepth);
- }
-}
-
-// Might need one more rotate depending on greatgrandfather.
-setParent(greatgrandfather);
-if (greatgrandfather) {
- if (greatgrandfather-Left == grandfather)
-greatgrandfather-Left = this;
- else
-greatgrandfather-Right = this;
-
-}
-grandfather-recomputeMin();
-father-recomputeMin();
- }
-}
-
-//===--===//
-// ETNode implementation
-//===--===//
-
-void ETNode::Split() {
- ETOccurrence *right, *left;
- ETOccurrence *rightmost = RightmostOcc;
- ETOccurrence *parent;
-
- // Update the occurrence tree first.
- RightmostOcc-Splay();
-
- // Find the leftmost occurrence in the rightmost subtree, then splay
- // around it.
- for (right = rightmost-Right; right-Left; right = right-Left);
-
- right-Splay();
-
- // Start splitting
- right-Left-Parent = NULL;
- parent =
[llvm-commits] CVS: llvm/tools/llvm-nm/llvm-nm.cpp
Changes in directory llvm/tools/llvm-nm:
llvm-nm.cpp updated: 1.36 - 1.37
---
Log message:
llvm-nm must print the alias symbols.
---
Diffs of the changes: (+13 -5)
llvm-nm.cpp | 18 +-
1 files changed, 13 insertions(+), 5 deletions(-)
Index: llvm/tools/llvm-nm/llvm-nm.cpp
diff -u llvm/tools/llvm-nm/llvm-nm.cpp:1.36 llvm/tools/llvm-nm/llvm-nm.cpp:1.37
--- llvm/tools/llvm-nm/llvm-nm.cpp:1.36 Sun May 6 18:45:49 2007
+++ llvm/tools/llvm-nm/llvm-nm.cpp Wed Jun 27 17:08:09 2007
@@ -68,14 +68,19 @@
}
static char TypeCharForSymbol(GlobalValue GV) {
- if (GV.isDeclaration()) return 'U';
+ if (GV.isDeclaration()) return 'U';
if (GV.hasLinkOnceLinkage()) return 'C';
if (GV.hasWeakLinkage()) return 'W';
- if (isaFunction(GV) GV.hasInternalLinkage()) return 't';
+ if (isaFunction(GV) GV.hasInternalLinkage())return 't';
if (isaFunction(GV)) return 'T';
- if (isaGlobalVariable(GV) GV.hasInternalLinkage()) return 'd';
+ if (isaGlobalVariable(GV) GV.hasInternalLinkage()) return 'd';
if (isaGlobalVariable(GV)) return 'D';
-return '?';
+ if (const GlobalAlias *GA = dyn_castGlobalAlias(GV)) {
+const GlobalValue *AliasedGV = GA-getAliasedGlobal();
+if (isaFunction(AliasedGV)) return 'T';
+if (isaGlobalVariable(AliasedGV))return 'D';
+ }
+ return '?';
}
static void DumpSymbolNameForGlobalValue(GlobalValue GV) {
@@ -115,7 +120,10 @@
Size Line Section\n;
}
std::for_each (M-begin (), M-end (), DumpSymbolNameForGlobalValue);
- std::for_each (M-global_begin (), M-global_end (),
DumpSymbolNameForGlobalValue);
+ std::for_each (M-global_begin (), M-global_end (),
+ DumpSymbolNameForGlobalValue);
+ std::for_each (M-alias_begin (), M-alias_end (),
+ DumpSymbolNameForGlobalValue);
}
static void DumpSymbolNamesFromFile(std::string Filename) {
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[llvm-commits] ARM problem
Something did today broke the compilation of the attached testcase. Lauro Error message: [EMAIL PROTECTED]:~$ llvm/llvm/build/Debug/bin/llc /tmp/bugpoint-reduced-simplified.bc llc: /home/laurov/llvm/llvm/include/llvm/Target/TargetLowering.h:125: llvm::TargetRegisterClass* llvm::TargetLowering::getRegClassFor(llvm::MVT::ValueType) const: Assertion `RC This value type is not natively supported!' failed. llvm/llvm/build/Debug/bin/llc((anonymous namespace)::PrintStackTrace()+0x1a)[0x8955d06] llvm/llvm/build/Debug/bin/llc((anonymous namespace)::SignalHandler(int)+0x112)[0x8955fcc] [0xe420] /lib/tls/i686/cmov/libc.so.6(abort+0x101)[0xb7c9c641] /lib/tls/i686/cmov/libc.so.6(__assert_fail+0xfb)[0xb7c9443b] llvm/llvm/build/Debug/bin/llc(llvm::TargetLowering::getRegClassFor(unsigned int) const+0x6d)[0x84cb859] llvm/llvm/build/Debug/bin/llc(llvm::FunctionLoweringInfo::MakeReg(unsigned int)+0x1a)[0x86f0a4c] llvm/llvm/build/Debug/bin/llc(llvm::FunctionLoweringInfo::CreateRegForValue(llvm::Value const*)+0xa2)[0x86c8f58] llvm/llvm/build/Debug/bin/llc(llvm::FunctionLoweringInfo::InitializeRegForValue(llvm::Value const*)+0x5d)[0x86f67bb] llvm/llvm/build/Debug/bin/llc(llvm::FunctionLoweringInfo::FunctionLoweringInfo(llvm::TargetLowering, llvm::Function, llvm::MachineFunction)+0xfa)[0x86df3b4] llvm/llvm/build/Debug/bin/llc(llvm::SelectionDAGISel::runOnFunction(llvm::Function)+0xc0)[0x86dfa34] llvm/llvm/build/Debug/bin/llc(llvm::FPPassManager::runOnFunction(llvm::Function)+0x13a)[0x88f00ac] llvm/llvm/build/Debug/bin/llc(llvm::FunctionPassManagerImpl::run(llvm::Function)+0x6e)[0x88f0330] llvm/llvm/build/Debug/bin/llc(llvm::FunctionPassManager::run(llvm::Function)+0x88)[0x88f047e] llvm/llvm/build/Debug/bin/llc(main+0x97d)[0x84257fd] /lib/tls/i686/cmov/libc.so.6(__libc_start_main+0xdc)[0xb7c86ebc] llvm/llvm/build/Debug/bin/llc[0x8423f51] Aborted (core dumped) bugpoint-reduced-simplified.bc Description: Binary data ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] ARM problem
Hi Lauro,
This was caused by my fix for PR1529.
I'm currently considering the following patch, which fixes your attached
test case:
Index: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
===
RCS file: /var/cvs/llvm/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp,v
retrieving revision 1.470
diff -u -r1.470 SelectionDAGISel.cpp
--- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -312,7 +312,9 @@
MVT::ValueType ElementVT;
NumRegisters = TLI.getVectorTypeBreakdown(VT, ElementVT, RegisterVT);
} else {
-RegisterVT = TLI.getTypeToTransformTo(VT);
+RegisterVT = VT;
+while (!TLI.isTypeLegal(RegisterVT))
+ RegisterVT = TLI.getTypeToTransformTo(RegisterVT);
NumRegisters = TLI.getNumRegisters(VT);
}
I'm looking to see if I can find a cleaner way to solve this.
Dan
--
Dan Gohman, Cray Inc.
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/GVNPRE.cpp
Changes in directory llvm/lib/Transforms/Scalar:
GVNPRE.cpp updated: 1.62 - 1.63
---
Log message:
Make many sets a much more reasonable size. This decreases the time to optimize
Anton's testcase from 35.5s to 34.7s.
---
Diffs of the changes: (+65 -65)
GVNPRE.cpp | 130 ++---
1 files changed, 65 insertions(+), 65 deletions(-)
Index: llvm/lib/Transforms/Scalar/GVNPRE.cpp
diff -u llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.62
llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.63
--- llvm/lib/Transforms/Scalar/GVNPRE.cpp:1.62 Wed Jun 27 12:38:29 2007
+++ llvm/lib/Transforms/Scalar/GVNPRE.cpp Wed Jun 27 19:34:34 2007
@@ -417,8 +417,8 @@
ValueTable VN;
std::vectorInstruction* createdExpressions;
-std::mapBasicBlock*, SmallPtrSetValue*, 32 availableOut;
-std::mapBasicBlock*, SmallPtrSetValue*, 32 anticipatedIn;
+std::mapBasicBlock*, SmallPtrSetValue*, 16 availableOut;
+std::mapBasicBlock*, SmallPtrSetValue*, 16 anticipatedIn;
// This transformation requires dominator postdominator info
virtual void getAnalysisUsage(AnalysisUsage AU) const {
@@ -428,46 +428,46 @@
// Helper fuctions
// FIXME: eliminate or document these better
-void dump(const SmallPtrSetValue*, 32 s) const;
-void clean(SmallPtrSetValue*, 32 set, BitVector presentInSet);
-Value* find_leader(SmallPtrSetValue*, 32 vals,
+void dump(const SmallPtrSetValue*, 16 s) const;
+void clean(SmallPtrSetValue*, 16 set, BitVector presentInSet);
+Value* find_leader(SmallPtrSetValue*, 16 vals,
uint32_t v);
Value* phi_translate(Value* V, BasicBlock* pred, BasicBlock* succ);
-void phi_translate_set(SmallPtrSetValue*, 32 anticIn, BasicBlock* pred,
- BasicBlock* succ, SmallPtrSetValue*, 32 out);
+void phi_translate_set(SmallPtrSetValue*, 16 anticIn, BasicBlock* pred,
+ BasicBlock* succ, SmallPtrSetValue*, 16 out);
-void topo_sort(SmallPtrSetValue*, 32 set,
+void topo_sort(SmallPtrSetValue*, 16 set,
std::vectorValue* vec);
void cleanup();
bool elimination();
-void val_insert(SmallPtrSetValue*, 32 s, Value* v);
-void val_replace(SmallPtrSetValue*, 32 s, Value* v);
+void val_insert(SmallPtrSetValue*, 16 s, Value* v);
+void val_replace(SmallPtrSetValue*, 16 s, Value* v);
bool dependsOnInvoke(Value* V);
void buildsets_availout(BasicBlock::iterator I,
-SmallPtrSetValue*, 32 currAvail,
-SmallPtrSetPHINode*, 32 currPhis,
-SmallPtrSetValue*, 32 currExps,
-SmallPtrSetValue*, 32 currTemps,
+SmallPtrSetValue*, 16 currAvail,
+SmallPtrSetPHINode*, 16 currPhis,
+SmallPtrSetValue*, 16 currExps,
+SmallPtrSetValue*, 16 currTemps,
BitVector availNumbers,
BitVector expNumbers);
bool buildsets_anticout(BasicBlock* BB,
-SmallPtrSetValue*, 32 anticOut,
+SmallPtrSetValue*, 16 anticOut,
std::setBasicBlock* visited);
unsigned buildsets_anticin(BasicBlock* BB,
- SmallPtrSetValue*, 32 anticOut,
- SmallPtrSetValue*, 32 currExps,
- SmallPtrSetValue*, 32 currTemps,
+ SmallPtrSetValue*, 16 anticOut,
+ SmallPtrSetValue*, 16 currExps,
+ SmallPtrSetValue*, 16 currTemps,
std::setBasicBlock* visited);
void buildsets(Function F);
void insertion_pre(Value* e, BasicBlock* BB,
std::mapBasicBlock*, Value* avail,
- SmallPtrSetValue*, 32 new_set);
+ SmallPtrSetValue*, 16 new_set);
unsigned insertion_mergepoint(std::vectorValue* workList,
df_iteratorDomTreeNode* D,
- SmallPtrSetValue*, 32 new_set);
+ SmallPtrSetValue*, 16 new_set);
bool insertion(Function F);
};
@@ -490,8 +490,8 @@
/// find_leader - Given a set and a value number, return the first
/// element of the set with that value number, or 0 if no such element
/// is present
-Value* GVNPRE::find_leader(SmallPtrSetValue*, 32 vals, uint32_t v) {
- for (SmallPtrSetValue*, 32::iterator I = vals.begin(), E = vals.end();
+Value* GVNPRE::find_leader(SmallPtrSetValue*, 16 vals, uint32_t v) {
+ for (SmallPtrSetValue*, 16::iterator I = vals.begin(), E = vals.end();
I != E; ++I)
if (v == VN.lookup(*I))
return *I;
@@ -501,7 +501,7 @@
/// val_insert - Insert a value into a set
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LoopUnswitch.cpp updated: 1.70 - 1.71
---
Log message:
If a condition is not inside a loop then the condition is suitable
to loop unswitch candidate for the loop.
---
Diffs of the changes: (+7 -0)
LoopUnswitch.cpp |7 +++
1 files changed, 7 insertions(+)
Index: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
diff -u llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.70
llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.71
--- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.70Tue Jun 5 19:21:03 2007
+++ llvm/lib/Transforms/Scalar/LoopUnswitch.cpp Wed Jun 27 19:44:10 2007
@@ -128,6 +128,13 @@
static Value *FindLIVLoopCondition(Value *Cond, Loop *L, bool Changed) {
// Constants should be folded, not unswitched on!
if (isaConstant(Cond)) return false;
+
+ // If cond is not in loop then it is not suitable.
+ if (Instruction *I = dyn_castInstruction(Cond))
+if (!L-contains(I-getParent()))
+ return 0;
+ if (isaArgument(Cond))
+return 0;
// TODO: Handle: br (VARIANT|INVARIANT).
// TODO: Hoist simple expressions out of loops.
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LoopUnswitch.cpp updated: 1.71 - 1.72
---
Log message:
Update LoopUnswitch pass to preserve DomiantorTree.
---
Diffs of the changes: (+55 -32)
LoopUnswitch.cpp | 87 ++-
1 files changed, 55 insertions(+), 32 deletions(-)
Index: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
diff -u llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.71
llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.72
--- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.71Wed Jun 27 19:44:10 2007
+++ llvm/lib/Transforms/Scalar/LoopUnswitch.cpp Wed Jun 27 19:49:00 2007
@@ -35,6 +35,7 @@
#include llvm/Analysis/ConstantFolding.h
#include llvm/Analysis/LoopInfo.h
#include llvm/Analysis/LoopPass.h
+#include llvm/Analysis/Dominators.h
#include llvm/Transforms/Utils/Cloning.h
#include llvm/Transforms/Utils/Local.h
#include llvm/Transforms/Utils/BasicBlockUtils.h
@@ -82,6 +83,7 @@
virtual void getAnalysisUsage(AnalysisUsage AU) const {
AU.addRequiredID(LoopSimplifyID);
AU.addPreservedID(LoopSimplifyID);
+ AU.addPreservedDominatorTree();
AU.addRequiredLoopInfo();
AU.addPreservedLoopInfo();
AU.addRequiredID(LCSSAID);
@@ -108,7 +110,12 @@
void RewriteLoopBodyWithConditionConstant(Loop *L, Value *LIC,
Constant *Val, bool isEqual);
-
+
+void EmitPreheaderBranchOnCondition(Value *LIC, Constant *Val,
+BasicBlock *TrueDest,
+BasicBlock *FalseDest,
+Instruction *InsertPt);
+
void SimplifyCode(std::vectorInstruction* Worklist);
void RemoveBlockIfDead(BasicBlock *BB,
std::vectorInstruction* Worklist);
@@ -135,7 +142,7 @@
return 0;
if (isaArgument(Cond))
return 0;
-
+
// TODO: Handle: br (VARIANT|INVARIANT).
// TODO: Hoist simple expressions out of loops.
if (L-isLoopInvariant(Cond)) return Cond;
@@ -413,6 +420,9 @@
if (Loop *L = LI-getLoopFor(Old))
L-addBasicBlockToLoop(New, *LI);
+ if (DominatorTree *DT = getAnalysisToUpdateDominatorTree())
+DT-addNewBlock(New, Old);
+
return New;
}
@@ -429,30 +439,8 @@
}
// If this is a critical edge, let SplitCriticalEdge do it.
- Loop *OrigDestBBL =
LI-getLoopFor(BB-getTerminator()-getSuccessor(SuccNum));
- if (SplitCriticalEdge(BB-getTerminator(), SuccNum)) {
-BasicBlock *NewBB = LatchTerm-getSuccessor(SuccNum);
-
-Loop *BBL = LI-getLoopFor(BB);
-if (!BBL || !OrigDestBBL)
- return NewBB;
-
-// If edge is inside a loop then NewBB is part of same loop.
-if (BBL == OrigDestBBL)
- BBL-addBasicBlockToLoop(NewBB, *LI);
-// If edge is entering loop then NewBB is part of outer loop.
-else if (BBL-contains(OrigDestBBL-getHeader()))
- BBL-addBasicBlockToLoop(NewBB, *LI);
-// If edge is from an inner loop to outer loop then NewBB is part
-// of outer loop.
-else if (OrigDestBBL-contains(BBL-getHeader()))
- OrigDestBBL-addBasicBlockToLoop(NewBB, *LI);
-// Else edge is connecting two loops and NewBB is part of their parent loop
-else if (Loop *PL = OrigDestBBL-getParentLoop())
- PL-addBasicBlockToLoop(NewBB, *LI);
-
-return NewBB;
- }
+ if (SplitCriticalEdge(BB-getTerminator(), SuccNum, this))
+return LatchTerm-getSuccessor(SuccNum);
// If the edge isn't critical, then BB has a single successor or Succ has a
// single pred. Split the block.
@@ -486,6 +474,26 @@
}
}
+// CloneDomInfo - NewBB is cloned from Orig basic block. Now clone Dominator
Info.
+// If Orig is in Loop then find and use Orig dominator's cloned block as NewBB
+// dominator.
+void CloneDomInfo(BasicBlock *NewBB, BasicBlock *Orig, Loop *L,
+ DominatorTree *DT,
+ DenseMapconst Value*, Value* VM) {
+
+ DomTreeNode *OrigNode = DT-getNode(Orig);
+ if (!OrigNode)
+return;
+ BasicBlock *OrigIDom = OrigNode-getBlock();
+ BasicBlock *NewIDom = OrigIDom;
+ if (L-contains(OrigIDom)) {
+if (!DT-getNode(OrigIDom))
+ CloneDomInfo(NewIDom, OrigIDom, L, DT, VM);
+NewIDom = castBasicBlock(VM[OrigIDom]);
+ }
+ DT-addNewBlock(NewBB, OrigIDom);
+}
+
/// CloneLoop - Recursively clone the specified loop and all of its children,
/// mapping the blocks with the specified map.
static Loop *CloneLoop(Loop *L, Loop *PL, DenseMapconst Value*, Value* VM,
@@ -510,10 +518,10 @@
/// EmitPreheaderBranchOnCondition - Emit a conditional branch on two values
/// if LIC == Val, branch to TrueDst, otherwise branch to FalseDest. Insert
the
/// code immediately before InsertPt.
-static void EmitPreheaderBranchOnCondition(Value *LIC, Constant *Val,
- BasicBlock *TrueDest,
- BasicBlock *FalseDest,
-
Re: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
If a condition is not inside a loop then the condition is suitable
to loop unswitch candidate for the loop.
I don't understand, why reject unswitching on these values?
cases like this should be unswitched:
int foo(int arg) {
for (..)
if (arg)
...
}
-Chris
---
Diffs of the changes: (+7 -0)
LoopUnswitch.cpp |7 +++
1 files changed, 7 insertions(+)
Index: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
diff -u llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.70 llvm/lib/
Transforms/Scalar/LoopUnswitch.cpp:1.71
--- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.70 Tue Jun 5
19:21:03 2007
+++ llvm/lib/Transforms/Scalar/LoopUnswitch.cpp Wed Jun 27 19:44:10
2007
@@ -128,6 +128,13 @@
static Value *FindLIVLoopCondition(Value *Cond, Loop *L, bool
Changed) {
// Constants should be folded, not unswitched on!
if (isaConstant(Cond)) return false;
+
+ // If cond is not in loop then it is not suitable.
+ if (Instruction *I = dyn_castInstruction(Cond))
+if (!L-contains(I-getParent()))
+ return 0;
+ if (isaArgument(Cond))
+return 0;
// TODO: Handle: br (VARIANT|INVARIANT).
// TODO: Hoist simple expressions out of loops.
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Re: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
On Jun 27, 2007, at 5:52 PM, Chris Lattner wrote:
If a condition is not inside a loop then the condition is suitable
to loop unswitch candidate for the loop.
I don't understand, why reject unswitching on these values?
cases like this should be unswitched:
int foo(int arg) {
for (..)
if (arg)
...
}
hmm.. no good reason. Let me double check.
-
Devang
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Re: [llvm-commits] CVS: llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Chris,
Attached is the testcase, which will get:
opt:
/developer/home2/zsth/llvm-gcc-dev/HEAD/llvm/llvm/lib/VMCore/Constants.cpp:1559:
static llvm::Constant* llvm::ConstantExpr::getZExt(llvm::Constant*,
const llvm::Type*): Assertion `C-getType()-getPrimitiveSizeInBits()
Ty-getPrimitiveSizeInBits() SrcTy must be smaller than DestTy for
ZExt!' failed.
The condition IterationCount-getType() != LargestType doesn't mean
the IterationCount-getType's bitwidth LargestType's
so, sometimes, (like in this testcase), it need a trunc not ext. This
patch is to fix it.
Sheng
DOUT INDVARS: New CanIV: *IndVar;
if (!isaSCEVCouldNotCompute(IterationCount)) {
-if (IterationCount-getType() != LargestType)
+if (IterationCount-getType()-getPrimitiveSizeInBits()
+LargestType-getPrimitiveSizeInBits())
IterationCount = SCEVZeroExtendExpr::get(IterationCount,
LargestType);
+else if (IterationCount-getType() != LargestType)
+ IterationCount = SCEVTruncateExpr::get(IterationCount,
LargestType);
if (Instruction *DI = LinearFunctionTestReplace(L,
IterationCount,Rewriter))
DeadInsts.insert(DI);
}
testcase.bc
Description: Binary data
; ModuleID = 'testcase.bc'
target datalayout =
e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64
target triple = i686-pc-linux-gnu
define i32 @testcase(i5 zext %k) {
entry:
br label %bb2
bb: ; preds = %bb2
%tmp1 = add i32 %tmp2, %result ; i32 [#uses=1]
%indvar_next1 = add i5 %k_0, 1 ; i5 [#uses=1]
br label %bb2
bb2:; preds = %bb, %entry
%k_0 = phi i5 [ 0, %entry ], [ %indvar_next1, %bb ] ; i5
[#uses=2]
%result = phi i32 [ 0, %entry ], [ %tmp1, %bb ] ; i32
[#uses=2]
%tmp2 = zext i5 %k_0 to i32 ; i32 [#uses=1]
%exitcond = icmp eq i32 %tmp2, 16 ; i1 [#uses=1]
br i1 %exitcond, label %bb3, label %bb
bb3:; preds = %bb2
ret i32 %result
}
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
Changes in directory llvm/lib/Transforms/Scalar:
LoopUnswitch.cpp updated: 1.72 - 1.73
---
Log message:
- Undo previous check and allow loop switch for condtion that is not inside
loop.
- Avoid loop unswich for loop header branch.
- While cloning dominators fix typo and handle self dominating blocks.
---
Diffs of the changes: (+7 -8)
LoopUnswitch.cpp | 15 +++
1 files changed, 7 insertions(+), 8 deletions(-)
Index: llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
diff -u llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.72
llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.73
--- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp:1.72Wed Jun 27 19:49:00 2007
+++ llvm/lib/Transforms/Scalar/LoopUnswitch.cpp Wed Jun 27 21:05:46 2007
@@ -136,13 +136,6 @@
// Constants should be folded, not unswitched on!
if (isaConstant(Cond)) return false;
- // If cond is not in loop then it is not suitable.
- if (Instruction *I = dyn_castInstruction(Cond))
-if (!L-contains(I-getParent()))
- return 0;
- if (isaArgument(Cond))
-return 0;
-
// TODO: Handle: br (VARIANT|INVARIANT).
// TODO: Hoist simple expressions out of loops.
if (L-isLoopInvariant(Cond)) return Cond;
@@ -173,6 +166,8 @@
// loop.
for (Loop::block_iterator I = L-block_begin(), E = L-block_end();
I != E; ++I) {
+if (*I == L-getHeader())
+ continue;
TerminatorInst *TI = (*I)-getTerminator();
if (BranchInst *BI = dyn_castBranchInst(TI)) {
// If this isn't branching on an invariant condition, we can't unswitch
@@ -491,7 +486,11 @@
CloneDomInfo(NewIDom, OrigIDom, L, DT, VM);
NewIDom = castBasicBlock(VM[OrigIDom]);
}
- DT-addNewBlock(NewBB, OrigIDom);
+ if (NewBB == NewIDom) {
+DT-addNewBlock(NewBB, OrigIDom);
+DT-changeImmediateDominator(NewBB, NewIDom);
+ } else
+DT-addNewBlock(NewBB, NewIDom);
}
/// CloneLoop - Recursively clone the specified loop and all of its children,
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[llvm-commits] CVS: llvm/include/llvm/Analysis/Dominators.h
Changes in directory llvm/include/llvm/Analysis:
Dominators.h updated: 1.107 - 1.108
---
Log message:
Handle the case when block dominates itself.
---
Diffs of the changes: (+4 -1)
Dominators.h |5 -
1 files changed, 4 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/Analysis/Dominators.h
diff -u llvm/include/llvm/Analysis/Dominators.h:1.107
llvm/include/llvm/Analysis/Dominators.h:1.108
--- llvm/include/llvm/Analysis/Dominators.h:1.107 Wed Jun 27 15:53:52 2007
+++ llvm/include/llvm/Analysis/Dominators.h Wed Jun 27 21:07:08 2007
@@ -185,7 +185,7 @@
const DomTreeNode *B) const {
const DomTreeNode *IDom;
if (A == 0 || B == 0) return false;
-while ((IDom = B-getIDom()) != 0 IDom != A)
+while ((IDom = B-getIDom()) != 0 IDom != A IDom != B)
B = IDom; // Walk up the tree
return IDom != 0;
}
@@ -244,6 +244,9 @@
DomTreeNode *addNewBlock(BasicBlock *BB, BasicBlock *DomBB) {
assert(getNode(BB) == 0 Block already in dominator tree!);
DomTreeNode *IDomNode = getNode(DomBB);
+// Check if BB dominates itself.
+//if (!IDomNode BB == DomBB)
+// IDomNode = BB;
assert(IDomNode Not immediate dominator specified for block!);
DFSInfoValid = false;
return DomTreeNodes[BB] =
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[llvm-commits] CVS: llvm/include/llvm/Analysis/Dominators.h
Changes in directory llvm/include/llvm/Analysis:
Dominators.h updated: 1.108 - 1.109
---
Log message:
Remove unnecessary comments.
---
Diffs of the changes: (+0 -3)
Dominators.h |3 ---
1 files changed, 3 deletions(-)
Index: llvm/include/llvm/Analysis/Dominators.h
diff -u llvm/include/llvm/Analysis/Dominators.h:1.108
llvm/include/llvm/Analysis/Dominators.h:1.109
--- llvm/include/llvm/Analysis/Dominators.h:1.108 Wed Jun 27 21:07:08 2007
+++ llvm/include/llvm/Analysis/Dominators.h Wed Jun 27 21:11:54 2007
@@ -244,9 +244,6 @@
DomTreeNode *addNewBlock(BasicBlock *BB, BasicBlock *DomBB) {
assert(getNode(BB) == 0 Block already in dominator tree!);
DomTreeNode *IDomNode = getNode(DomBB);
-// Check if BB dominates itself.
-//if (!IDomNode BB == DomBB)
-// IDomNode = BB;
assert(IDomNode Not immediate dominator specified for block!);
DFSInfoValid = false;
return DomTreeNodes[BB] =
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