[llvm-commits] [llvm] r47121 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/

2008-02-14 Thread Nate Begeman 
Author: sampo
Date: Thu Feb 14 02:57:00 2008
New Revision: 47121

URL: http://llvm.org/viewvc/llvm-project?rev=47121view=rev
Log:
Change how FP immediates are handled.  
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
   if it is legal.

This allows ConstantFP to be handled like Constant, allowing for 
targets that can encode FP immediates as MachineOperands.

As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants!  Hooray.

Modified:
llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp
llvm/trunk/lib/Target/IA64/IA64InstrInfo.td
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
llvm/trunk/lib/Target/TargetSelectionDAG.td
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/utils/TableGen/DAGISelEmitter.cpp

Modified: llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h?rev=47121r1=47120r2=47121view=diff

==
--- llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h Thu Feb 14 02:57:00 2008
@@ -272,6 +272,7 @@
 ///
 static bool isPassiveNode(SDNode *Node) {
   if (isaConstantSDNode(Node))   return true;
+  if (isaConstantFPSDNode(Node)) return true;
   if (isaRegisterSDNode(Node))   return true;
   if (isaGlobalAddressSDNode(Node))  return true;
   if (isaBasicBlockSDNode(Node)) return true;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47121r1=47120r2=47121view=diff

==
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Feb 14 02:57:00 2008
@@ -1155,24 +1155,10 @@
 // leave these constants as ConstantFP nodes for the target to deal with.
 ConstantFPSDNode *CFP = castConstantFPSDNode(Node);
 
-// Check to see if this FP immediate is already legal.
-bool isLegal = false;
-for (TargetLowering::legal_fpimm_iterator I = TLI.legal_fpimm_begin(),
-   E = TLI.legal_fpimm_end(); I != E; ++I)
-  if (CFP-isExactlyValue(*I)) {
-isLegal = true;
-break;
-  }
-
-// If this is a legal constant, turn it into a TargetConstantFP node.
-if (isLegal) {
-  Result = DAG.getTargetConstantFP(CFP-getValueAPF(), 
-   CFP-getValueType(0));
-  break;
-}
-
 switch (TLI.getOperationAction(ISD::ConstantFP, CFP-getValueType(0))) {
 default: assert(0  This action is not supported yet!);
+case TargetLowering::Legal:
+  break;
 case TargetLowering::Custom:
   Tmp3 = TLI.LowerOperation(Result, DAG);
   if (Tmp3.Val) {
@@ -1180,9 +1166,22 @@
 break;
   }
   // FALLTHROUGH
-case TargetLowering::Expand:
+case TargetLowering::Expand: {
+  // Check to see if this FP immediate is already legal.
+  bool isLegal = false;
+  for (TargetLowering::legal_fpimm_iterator I = TLI.legal_fpimm_begin(),
+ E = TLI.legal_fpimm_end(); I != E; ++I) {
+if (CFP-isExactlyValue(*I)) {
+  isLegal = true;
+  break;
+}
+  }
+  // If this is a legal constant, turn it into a TargetConstantFP node.
+  if (isLegal)
+break;
   Result = ExpandConstantFP(CFP, true, DAG, TLI);
 }
+}
 break;
   }
   case ISD::TokenFactor:

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp?rev=47121r1=47120r2=47121view=diff

==
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Thu Feb 14 02:57:00 2008
@@ -14,6 +14,7 @@
 
//===--===//
 
 #define DEBUG_TYPE pre-RA-sched
+#include llvm/Constants.h
 #include llvm/Type.h
 #include llvm/CodeGen/ScheduleDAG.h
 #include llvm/CodeGen/MachineConstantPool.h
@@ -478,6 +479,10 @@
 }
   } else if (ConstantSDNode *C = dyn_castConstantSDNode(Op)) {
 MI-addOperand(MachineOperand::CreateImm(C-getValue()));
+  } else if (ConstantFPSDNode *F = dyn_castConstantFPSDNode(Op)) {
+const Type

[llvm-commits] test/C++Frontend/2008-02-13-sret.cpp

2008-02-14 Thread Duncan Sands 
Hi Dale, this test is failing for me (x86-32 linux):
there is nothing called retval.

// RUN: %llvmgxx -S -O0 -emit-llvm %s -o - | grep retval | grep S242 | grep 
{i32 1} | count 2

Ciao,

Duncan.

; ModuleID = '2008-02-13-sret.cpp'
target datalayout = 
e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32
target triple = i686-pc-linux-gnu
%struct.S242 = type { i8*, [1 x i32] }
%struct.S92 = type { i16, [2 x i8] }
%struct.S93 = type { i8*, [1 x i32] }
@s242 = external global %struct.S242; %struct.S242* [#uses=2]
@s93 = external global %struct.S242 ; %struct.S242* [#uses=1]
@s92 = external global %struct.S92  ; %struct.S92* [#uses=1]

define void @_Z7check92v(%struct.S92* sret  %agg.result) {
entry:
%ret = alloca %struct.S92, align 4  ; %struct.S92* 
[#uses=0]
%memtmp = alloca %struct.S92, align 8   ; %struct.S92* 
[#uses=2]
%alloca point = bitcast i32 0 to i32  ; i32 [#uses=0]
%agg.result1 = bitcast %struct.S92* %agg.result to i8*  ; i8* 
[#uses=1]
%tmp = call i8* @_Z6memsetPvim( i8* %agg.result1, i32 0, i32 4 )
; i8* [#uses=0]
%tmp2 = getelementptr %struct.S92* @s92, i32 0, i32 0   ; 
i16* [#uses=1]
%tmp3 = load i16* %tmp2, align 1; i16 [#uses=1]
%tmp4 = shl i16 %tmp3, 2; i16 [#uses=1]
%tmp5 = ashr i16 %tmp4, 2   ; i16 [#uses=1]
%tmp6 = getelementptr %struct.S92* %agg.result, i32 0, i32 0
; i16* [#uses=2]
%tmp7 = load i16* %tmp6, align 1; i16 [#uses=1]
%tmp8 = and i16 %tmp5, 16383; i16 [#uses=1]
%tmp9 = and i16 %tmp7, -16384   ; i16 [#uses=1]
%tmp10 = or i16 %tmp9, %tmp8; i16 [#uses=1]
store i16 %tmp10, i16* %tmp6, align 1
%tmp11 = getelementptr %struct.S92* %memtmp, i32 0, i32 0   
; i16* [#uses=1]
%tmp12 = getelementptr %struct.S92* %agg.result, i32 0, i32 0   
; i16* [#uses=1]
%tmp13 = load i16* %tmp12, align 4  ; i16 [#uses=1]
store i16 %tmp13, i16* %tmp11, align 4
%tmp14 = getelementptr %struct.S92* %memtmp, i32 0, i32 1   
; [2 x i8]* [#uses=2]
%tmp15 = getelementptr %struct.S92* %agg.result, i32 0, i32 1   
; [2 x i8]* [#uses=2]
%tmp16 = getelementptr [2 x i8]* %tmp14, i32 0, i32 0   ; i8* 
[#uses=1]
%tmp17 = getelementptr [2 x i8]* %tmp15, i32 0, i32 0   ; i8* 
[#uses=1]
%tmp18 = load i8* %tmp17, align 2   ; i8 [#uses=1]
store i8 %tmp18, i8* %tmp16, align 2
%tmp19 = getelementptr [2 x i8]* %tmp14, i32 0, i32 1   ; i8* 
[#uses=1]
%tmp20 = getelementptr [2 x i8]* %tmp15, i32 0, i32 1   ; i8* 
[#uses=1]
%tmp21 = load i8* %tmp20, align 1   ; i8 [#uses=1]
store i8 %tmp21, i8* %tmp19, align 1
br label %return

return: ; preds = %entry
ret void
}

define void @_Z10check242vaiz(i32 %z, ...) {
entry:
%z_addr = alloca i32; i32* [#uses=1]
%ap = alloca i8*; i8** [#uses=4]
%arg = alloca %struct.S242  ; %struct.S242* [#uses=2]
%tmp = alloca %struct.S242  ; %struct.S242* [#uses=4]
%ap.2 = alloca i8*  ; i8** [#uses=3]
%alloca point = bitcast i32 0 to i32  ; i32 [#uses=0]
store i32 %z, i32* %z_addr
%ap1 = bitcast i8** %ap to i8*  ; i8* [#uses=1]
call void @llvm.va_start( i8* %ap1 )
%tmp2 = load i8** %ap, align 4  ; i8* [#uses=1]
store i8* %tmp2, i8** %ap.2, align 4
%tmp3 = load i8** %ap.2, align 4; i8* [#uses=1]
%tmp4 = getelementptr i8* %tmp3, i64 8  ; i8* [#uses=1]
store i8* %tmp4, i8** %ap, align 4
%tmp5 = load i8** %ap.2, align 4; i8* [#uses=1]
%tmp56 = bitcast i8* %tmp5 to %struct.S242* ; 
%struct.S242* [#uses=2]
%tmp7 = getelementptr %struct.S242* %tmp, i32 0, i32 0  ; 
i8** [#uses=1]
%tmp8 = getelementptr %struct.S242* %tmp56, i32 0, i32 0
; i8** [#uses=1]
%tmp9 = load i8** %tmp8, align 4; i8* [#uses=1]
store i8* %tmp9, i8** %tmp7, align 4
%tmp10 = getelementptr %struct.S242* %tmp, i32 0, i32 1 ; [1 x 
i32]* [#uses=1]
%tmp11 = getelementptr %struct.S242* %tmp56, i32 0, i32 1   
; [1 x i32]* [#uses=1]
%tmp12 = getelementptr [1 x i32]* %tmp10, i32 0, i32 0  ; 
i32* [#uses=1]
%tmp13 = getelementptr [1 x i32]* %tmp11, i32 0, i32 0  ; 
i32* [#uses=1]
%tmp14 = load i32* %tmp13, align 4  ; i32 [#uses=1]
store i32 %tmp14, i32* %tmp12, align 4

[llvm-commits] [llvm] r47122 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/CodeGen/SelectionDAG/Targ

2008-02-14 Thread Duncan Sands 
Author: baldrick
Date: Thu Feb 14 11:28:50 2008
New Revision: 47122

URL: http://llvm.org/viewvc/llvm-project?rev=47122view=rev
Log:
In TargetLowering::LowerCallTo, don't assert that
the return value is zero-extended if it isn't
sign-extended.  It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is unsigned.  Currently
isSExt is set when signed, and nothing is
set otherwise.  This should be right for all
calls to standard library routines.

Modified:
llvm/trunk/include/llvm/Target/TargetLowering.h
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/Alpha/AlphaISelLowering.cpp
llvm/trunk/lib/Target/Alpha/AlphaISelLowering.h
llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp
llvm/trunk/lib/Target/IA64/IA64ISelLowering.h
llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=47122r1=47121r2=47122view=diff

==
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Thu Feb 14 11:28:50 2008
@@ -924,8 +924,8 @@
   };
   typedef std::vectorArgListEntry ArgListTy;
   virtual std::pairSDOperand, SDOperand
-  LowerCallTo(SDOperand Chain, const Type *RetTy, bool RetTyIsSigned, 
-  bool isVarArg, unsigned CallingConv, bool isTailCall, 
+  LowerCallTo(SDOperand Chain, const Type *RetTy, bool RetSExt, bool RetZExt,
+  bool isVarArg, unsigned CallingConv, bool isTailCall,
   SDOperand Callee, ArgListTy Args, SelectionDAG DAG);
 
 

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=47122r1=47121r2=47122view=diff

==
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Feb 14 11:28:50 2008
@@ -2862,7 +2862,8 @@
   }
 
   std::pairSDOperand,SDOperand CallResult =
-TLI.LowerCallTo(Tmp1, Type::VoidTy, false, false, CallingConv::C, 
false,
+TLI.LowerCallTo(Tmp1, Type::VoidTy,
+false, false, false, CallingConv::C, false,
 DAG.getExternalSymbol(FnName, IntPtr), Args, DAG);
   Result = CallResult.second;
   break;
@@ -3963,7 +3964,8 @@
   Tmp1 = LegalizeOp(Node-getOperand(0));
   TargetLowering::ArgListTy Args;
   std::pairSDOperand,SDOperand CallResult =
-TLI.LowerCallTo(Tmp1, Type::VoidTy, false, false, CallingConv::C, 
false,
+TLI.LowerCallTo(Tmp1, Type::VoidTy,
+false, false, false, CallingConv::C, false,
 DAG.getExternalSymbol(abort, TLI.getPointerTy()),
 Args, DAG);
   Result = CallResult.second;
@@ -5153,6 +5155,7 @@
 const Type *ArgTy = MVT::getTypeForValueType(ArgVT);
 Entry.Node = Node-getOperand(i); Entry.Ty = ArgTy; 
 Entry.isSExt = isSigned;
+Entry.isZExt = !isSigned;
 Args.push_back(Entry);
   }
   SDOperand Callee = DAG.getExternalSymbol(Name, TLI.getPointerTy());
@@ -5160,8 +5163,8 @@
   // Splice the libcall in wherever FindInputOutputChains tells us to.
   const Type *RetTy = MVT::getTypeForValueType(Node-getValueType(0));
   std::pairSDOperand,SDOperand CallInfo =
-TLI.LowerCallTo(InChain, RetTy, isSigned, false, CallingConv::C, false,
-Callee, Args, DAG);
+TLI.LowerCallTo(InChain, RetTy, isSigned, !isSigned, false, CallingConv::C,
+false, Callee, Args, DAG);
 
   // Legalize the call sequence, starting with the chain.  This will advance
   // the LastCALLSEQ_END to the legalized version of the CALLSEQ_END node that

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=47122r1=47121r2=47122view=diff

==
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Feb 14 
11:28:50 2008
@@ -3092,6 +3092,7 @@
   std::pairSDOperand,SDOperand Result =
 TLI.LowerCallTo(getRoot(), CS.getType(),

[llvm-commits] [llvm] r47124 - in /llvm/trunk: Xcode/LLVM.xcodeproj/project.pbxproj docs/CFEBuildInstrs.html docs/GCCFEBuildInstrs.html docs/GettingStarted.html docs/index.html

2008-02-14 Thread Duncan Sands 
Author: baldrick
Date: Thu Feb 14 11:53:22 2008
New Revision: 47124

URL: http://llvm.org/viewvc/llvm-project?rev=47124view=rev
Log:
Rename CFEBuildInstrs.html to GCCFEBuildInstrs.html.
Update all references to it and place a redirection
page at the old address.

Added:
llvm/trunk/docs/CFEBuildInstrs.html
llvm/trunk/docs/GCCFEBuildInstrs.html
  - copied, changed from r47121, llvm/trunk/docs/CFEBuildInstrs.html
Modified:
llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj
llvm/trunk/docs/GettingStarted.html
llvm/trunk/docs/index.html

Modified: llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj?rev=47124r1=47123r2=47124view=diff

==
--- llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj (original)
+++ llvm/trunk/Xcode/LLVM.xcodeproj/project.pbxproj Thu Feb 14 11:53:22 2008
@@ -979,7 +979,7 @@
DE66F38C08ABF35300323D32 /* CREDITS.TXT */ = {isa = 
PBXFileReference; fileEncoding = 30; lastKnownFileType = text; name = 
CREDITS.TXT; path = ../CREDITS.TXT; sourceTree = SOURCE_ROOT; };
DE66F38F08ABF35C00323D32 /* AliasAnalysis.html */ = {isa = 
PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 
30; path = AliasAnalysis.html; sourceTree = group; };
DE66F39008ABF35C00323D32 /* Bugpoint.html */ = {isa = 
PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 
30; path = Bugpoint.html; sourceTree = group; };
-   DE66F39208ABF35C00323D32 /* CFEBuildInstrs.html */ = {isa = 
PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 
30; path = CFEBuildInstrs.html; sourceTree = group; };
+   DE66F39208ABF35C00323D32 /* GCCFEBuildInstrs.html */ = {isa = 
PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 
30; path = GCCFEBuildInstrs.html; sourceTree = group; };
DE66F39308ABF35C00323D32 /* CodeGenerator.html */ = {isa = 
PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 
30; path = CodeGenerator.html; sourceTree = group; };
DE66F39408ABF35C00323D32 /* CodingStandards.html */ = {isa = 
PBXFileReference; explicitFileType = text.html.documentation; fileEncoding = 
30; path = CodingStandards.html; sourceTree = group; };
DE66F39808ABF35C00323D32 /* bugpoint.pod */ = {isa = 
PBXFileReference; fileEncoding = 30; lastKnownFileType = text; path = 
bugpoint.pod; sourceTree = group; };
@@ -2593,7 +2593,7 @@
children = (
DE66F38F08ABF35C00323D32 /* AliasAnalysis.html 
*/,
DE66F39008ABF35C00323D32 /* Bugpoint.html */,
-   DE66F39208ABF35C00323D32 /* CFEBuildInstrs.html 
*/,
+   DE66F39208ABF35C00323D32 /* 
GCCFEBuildInstrs.html */,
DE66F39308ABF35C00323D32 /* CodeGenerator.html 
*/,
DE66F39408ABF35C00323D32 /* 
CodingStandards.html */,
DE66F39508ABF35C00323D32 /* CommandGuide */,

Added: llvm/trunk/docs/CFEBuildInstrs.html
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CFEBuildInstrs.html?rev=47124view=auto

==
--- llvm/trunk/docs/CFEBuildInstrs.html (added)
+++ llvm/trunk/docs/CFEBuildInstrs.html Thu Feb 14 11:53:22 2008
@@ -0,0 +1,29 @@
+!DOCTYPE HTML PUBLIC -//W3C//DTD HTML 4.01//EN
+  http://www.w3.org/TR/html4/strict.dtd;
+html
+head
+  meta http-equiv=Content-Type content=text/html; charset=UTF-8
+  link rel=stylesheet href=llvm.css type=text/css media=screen
+  titleBuilding the LLVM C/C++ Front-End/title
+  meta HTTP-EQUIV=REFRESH CONTENT=3; URL=GCCFEBuildInstrs.html
+/head
+body
+div class=doc_title
+This page has moved a href=GCCFEBuildInstrs.htmlhere/A.
+/div
+
+!-- *** 
--
+
+hr
+address
+  a href=http://jigsaw.w3.org/css-validator/check/referer;img
+  src=http://jigsaw.w3.org/css-validator/images/vcss; alt=Valid CSS!/a
+  a href=http://validator.w3.org/check/referer;img
+  src=http://www.w3.org/Icons/valid-html401; alt=Valid HTML 4.01!/a
+
+  a href=http://llvm.org;LLVM Compiler Infrastructure/abr
+  Last modified: $Date: 2008-02-13 17:46:10 +0100 (Wed, 13 Feb 2008) $
+/address
+
+/body
+/html

Copied: llvm/trunk/docs/GCCFEBuildInstrs.html (from r47121, 
llvm/trunk/docs/CFEBuildInstrs.html)
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/GCCFEBuildInstrs.html?p2=llvm/trunk/docs/GCCFEBuildInstrs.htmlp1=llvm/trunk/docs/CFEBuildInstrs.htmlr1=47121r2=47124rev=47124view=diff

==
--- llvm/trunk/docs/CFEBuildInstrs.html

Re: [llvm-commits] test/C++Frontend/2008-02-13-sret.cpp

2008-02-14 Thread Dale Johannesen 

On Feb 14, 2008, at 6:52 AM, Duncan Sands wrote:

 Hi Dale, this test is failing for me (x86-32 linux):
 there is nothing called retval.

 // RUN: %llvmgxx -S -O0 -emit-llvm %s -o - | grep retval | grep S242  
 | grep {i32 1} | count 2

OK, that's because Linux returns S242 by the sret mechanism instead of  
as an i64.  What's I'd like to do to preserve the sense of the test is  
grep for retval | memtmp, but I'm not sure how to do that portably.   
Does this work for you?

// RUN: %llvmgxx -S -O0 -emit-llvm %s -o - | grep {retval\\|memtmp} |  
grep S242 | grep {i32 1} | count 2

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[llvm-commits] CVS: llvm-www/releases/download.html

2008-02-14 Thread Chris Lattner 


Changes in directory llvm-www/releases:

download.html updated: 1.49 - 1.50
---
Log message:

update the one reference to CFEBuildInstrs.html that I see.


---
Diffs of the changes:  (+2 -2)

 download.html |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)


Index: llvm-www/releases/download.html
diff -u llvm-www/releases/download.html:1.49 
llvm-www/releases/download.html:1.50
--- llvm-www/releases/download.html:1.49Tue Feb 12 01:01:14 2008
+++ llvm-www/releases/download.html Thu Feb 14 12:58:19 2008
@@ -25,8 +25,8 @@
 
 pNote that if you intend to build the LLVM GCC front-end from source, you
 must 
-follow the instructions in the a href=/docs/CFEBuildInstrs.htmlhow to 
-build the C front-end/a document./p
+follow the instructions in the a href=/docs/GCCFEBuildInstrs.htmlhow to 
+build the llvm-gcc front-end/a document./p
 /div
 
 table class=rel_section



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[llvm-commits] [llvm] r47128 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp test/CodeGen/X86/2008-02-14-BitMiscompile.ll

2008-02-14 Thread Chris Lattner 
Author: lattner
Date: Thu Feb 14 12:48:56 2008
New Revision: 47128

URL: http://llvm.org/viewvc/llvm-project?rev=47128view=rev
Log:
Fix a miscompilation from Dan's recent apintification.

Added:
llvm/trunk/test/CodeGen/X86/2008-02-14-BitMiscompile.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47128r1=47127r2=47128view=diff

==
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Feb 14 12:48:56 
2008
@@ -1437,12 +1437,10 @@
 // We know that the top bits of C-X are clear if X contains less bits
 // than C (i.e. no wrap-around can happen).  For example, 20-X is
 // positive if we can prove that X is = 0 and  16.
-
-// sign bit clear
 if (CLHS-getAPIntValue().isNonNegative()) {
   unsigned NLZ = (CLHS-getAPIntValue()+1).countLeadingZeros();
   // NLZ can't be BitWidth with no sign bit
-  APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ);
+  APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
   ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero, KnownOne, Depth+1);
 
   // If all of the MaskV bits are known to be zero, then we know the output

Added: llvm/trunk/test/CodeGen/X86/2008-02-14-BitMiscompile.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-14-BitMiscompile.ll?rev=47128view=auto

==
--- llvm/trunk/test/CodeGen/X86/2008-02-14-BitMiscompile.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-02-14-BitMiscompile.ll Thu Feb 14 12:48:56 
2008
@@ -0,0 +1,8 @@
+; RUN: llvm-as  %s | llc -march=x86 | grep and
+define i32 @test(i1 %A) {
+   %B = zext i1 %A to i32  ; i32 [#uses=1]
+   %C = sub i32 0, %B  ; i32 [#uses=1]
+   %D = and i32 %C, 255; i32 [#uses=1]
+   ret i32 %D
+}
+


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[llvm-commits] [llvm] r47127 - in /llvm/trunk/lib/Target/CellSPU: SPUISelLowering.cpp SPUISelLowering.h SPUInstrInfo.td

2008-02-14 Thread Nate Begeman 
Author: sampo
Date: Thu Feb 14 12:43:04 2008
New Revision: 47127

URL: http://llvm.org/viewvc/llvm-project?rev=47127view=rev
Log:
Fix single precision FP constants on SPU.  They are actually legal,
which allows us to kill a target-specific node.

Modified:
llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h
llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp?rev=47127r1=47126r2=47127view=diff

==
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.cpp Thu Feb 14 12:43:04 2008
@@ -158,7 +158,7 @@
 
   // SPU constant load actions are custom lowered:
   setOperationAction(ISD::Constant,   MVT::i64, Custom);
-  setOperationAction(ISD::ConstantFP, MVT::f32, Custom);
+  setOperationAction(ISD::ConstantFP, MVT::f32, Legal);
   setOperationAction(ISD::ConstantFP, MVT::f64, Custom);
 
   // SPU's loads and stores have to be custom lowered:
@@ -420,7 +420,6 @@
   SPUISD::ROTBYTES_LEFT_CHAINED;
 node_names[(unsigned) SPUISD::FSMBI] = SPUISD::FSMBI;
 node_names[(unsigned) SPUISD::SELB] = SPUISD::SELB;
-node_names[(unsigned) SPUISD::SFPConstant] = SPUISD::SFPConstant;
 node_names[(unsigned) SPUISD::FPInterp] = SPUISD::FPInterp;
 node_names[(unsigned) SPUISD::FPRecipEst] = SPUISD::FPRecipEst;
 node_names[(unsigned) SPUISD::SEXT32TO64] = SPUISD::SEXT32TO64;
@@ -851,12 +850,7 @@
   return SDOperand();
 }
 
-//! Custom lower single precision floating point constants
-/*!
-  float immediates can be lowered as if they were unsigned 32-bit integers.
-  The SPUISD::SFPConstant pseudo-instruction handles this in the instruction
-  target description.
- */
+//! Custom lower double precision floating point constants
 static SDOperand
 LowerConstantFP(SDOperand Op, SelectionDAG DAG) {
   unsigned VT = Op.getValueType();
@@ -865,11 +859,7 @@
   assert((FP != 0) 
  LowerConstantFP: Node is not ConstantFPSDNode);
 
-  if (VT == MVT::f32) {
-float targetConst = FP-getValueAPF().convertToFloat();
-return DAG.getNode(SPUISD::SFPConstant, VT,
-   DAG.getTargetConstantFP(targetConst, VT));
-  } else if (VT == MVT::f64) {
+  if (VT == MVT::f64) {
 uint64_t dbits = DoubleToBits(FP-getValueAPF().convertToDouble());
 return DAG.getNode(ISD::BIT_CONVERT, VT,
LowerConstant(DAG.getConstant(dbits, MVT::i64), DAG));

Modified: llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h?rev=47127r1=47126r2=47127view=diff

==
--- llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUISelLowering.h Thu Feb 14 12:43:04 2008
@@ -61,7 +61,6 @@
   ROTBYTES_LEFT_CHAINED,/// Rotate bytes (loads - ROTQBYI), with 
chain
   FSMBI,/// Form Select Mask for Bytes, Immediate
   SELB, /// Select bits - (b  mask) | (a  ~mask)
-  SFPConstant,  /// Single precision floating point constant
   FPInterp, /// Floating point interpolate
   FPRecipEst,   /// Floating point reciprocal estimate
   SEXT32TO64,   /// Sign-extended 32-bit const - 64-bits

Modified: llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td?rev=47127r1=47126r2=47127view=diff

==
--- llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUInstrInfo.td Thu Feb 14 12:43:04 2008
@@ -349,12 +349,12 @@
 def ILf32:
   RI16Form0b10010, (outs R32FP:$rT), (ins s16imm_f32:$val),
 il\t$rT, $val, ImmLoad,
-[(set R32FP:$rT, (SPUFPconstant fpimmSExt16:$val))];
+[(set R32FP:$rT, fpimmSExt16:$val)];
 
 def ILf64:
   RI16Form0b10010, (outs R64FP:$rT), (ins s16imm_f64:$val),
 il\t$rT, $val, ImmLoad,
-[(set R64FP:$rT, (SPUFPconstant fpimmSExt16:$val))];
+[(set R64FP:$rT, fpimmSExt16:$val)];
 
 def ILHUv4i32:
   RI16Form0b01010, (outs VECREG:$rT), (ins u16imm:$val),
@@ -370,7 +370,7 @@
 def ILHUf32:
RI16Form0b01010, (outs R32FP:$rT), (ins f16imm:$val),
 ilhu\t$rT, $val, ImmLoad,
-[(set R32FP:$rT, (SPUFPconstant hi16_f32:$val))];
+[(set R32FP:$rT, hi16_f32:$val)];
 
 // ILHUhi: Used for loading high portion of an address. Note the symbolHi
 // printer used for the operand.
@@ -405,12 +405,12 @@
 def ILAf32:
   RI18Form0b110, (outs R32FP:$rT), (ins f18imm:$val),
 ila\t$rT, $val, LoadNOP,
-[(set R32FP:$rT,

[llvm-commits] [llvm] r47129 - in /llvm/trunk: lib/Transforms/Utils/LowerInvoke.cpp test/Transforms/LowerInvoke/2008-02-14-CritEdgePhiCrash.ll

2008-02-14 Thread Chris Lattner 
Author: lattner
Date: Thu Feb 14 13:18:13 2008
New Revision: 47129

URL: http://llvm.org/viewvc/llvm-project?rev=47129view=rev
Log:
Fix PR2029

Added:
llvm/trunk/test/Transforms/LowerInvoke/2008-02-14-CritEdgePhiCrash.ll
Modified:
llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp

Modified: llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp?rev=47129r1=47128r2=47129view=diff

==
--- llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp (original)
+++ llvm/trunk/lib/Transforms/Utils/LowerInvoke.cpp Thu Feb 14 13:18:13 2008
@@ -256,6 +256,17 @@
  SwitchInst *CatchSwitch) {
   ConstantInt *InvokeNoC = ConstantInt::get(Type::Int32Ty, InvokeNo);
 
+  // If the unwind edge has phi nodes, split the edge.
+  if (isaPHINode(II-getUnwindDest()-begin())) {
+SplitCriticalEdge(II, 1, this);
+   
+// If there are any phi nodes left, they must have a single predecessor.
+while (PHINode *PN = dyn_castPHINode(II-getUnwindDest()-begin())) {
+  PN-replaceAllUsesWith(PN-getIncomingValue(0));
+  PN-eraseFromParent();
+}
+  }
+  
   // Insert a store of the invoke num before the invoke and store zero into the
   // location afterward.
   new StoreInst(InvokeNoC, InvokeNum, true, II);  // volatile

Added: llvm/trunk/test/Transforms/LowerInvoke/2008-02-14-CritEdgePhiCrash.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LowerInvoke/2008-02-14-CritEdgePhiCrash.ll?rev=47129view=auto

==
--- llvm/trunk/test/Transforms/LowerInvoke/2008-02-14-CritEdgePhiCrash.ll 
(added)
+++ llvm/trunk/test/Transforms/LowerInvoke/2008-02-14-CritEdgePhiCrash.ll Thu 
Feb 14 13:18:13 2008
@@ -0,0 +1,14 @@
+; RUN: llvm-as  %s | opt -lowerinvoke -enable-correct-eh-support 
-disable-output
+; PR2029
+define i32 @main(i32 %argc, i8** %argv) {
+bb470:
+invoke i32 @main(i32 0, i8** null) to label %invcont474 unwind label
+%lpad902
+
+invcont474: ; preds = %bb470
+ret i32 0
+
+lpad902:; preds = %bb470
+%tmp471.lcssa = phi i8* [ null, %bb470 ]; i8*
+ret i32 0
+}


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[llvm-commits] [poolalloc] r47132 - /poolalloc/trunk/include/poolalloc/PoolAllocate.h

2008-02-14 Thread John Criswell 
Author: criswell
Date: Thu Feb 14 14:23:37 2008
New Revision: 47132

URL: http://llvm.org/viewvc/llvm-project?rev=47132view=rev
Log:
Change the getPoolType() method to switch between different pool sizes
depending upon whether we're compiling for use with SAFECode.

Modified:
poolalloc/trunk/include/poolalloc/PoolAllocate.h

Modified: poolalloc/trunk/include/poolalloc/PoolAllocate.h
URL: 
http://llvm.org/viewvc/llvm-project/poolalloc/trunk/include/poolalloc/PoolAllocate.h?rev=47132r1=47131r2=47132view=diff

==
--- poolalloc/trunk/include/poolalloc/PoolAllocate.h (original)
+++ poolalloc/trunk/include/poolalloc/PoolAllocate.h Thu Feb 14 14:23:37 2008
@@ -208,7 +208,11 @@
   /// getPoolType - Return the type of a pool descriptor
   const Type * getPoolType() {
 Type * VoidPtrType = PointerType::getUnqual(Type::Int8Ty);
+#ifdef SAFECODE
+return ArrayType::get(VoidPtrType, 50);
+#else
 return ArrayType::get(VoidPtrType, 16);
+#endif
   }
 
  private:


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[llvm-commits] [poolalloc] r47133 - in /poolalloc/trunk/lib/PoolAllocate: PoolAllocate.cpp TransformFunctionBody.cpp

2008-02-14 Thread John Criswell 
Author: criswell
Date: Thu Feb 14 14:24:14 2008
New Revision: 47133

URL: http://llvm.org/viewvc/llvm-project?rev=47133view=rev
Log:
Use getPoolType() to determine the type of the pool descriptor.

Modified:
poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp

Modified: poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp
URL: 
http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp?rev=47133r1=47132r2=47133view=diff

==
--- poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/PoolAllocate.cpp Thu Feb 14 14:24:14 2008
@@ -183,11 +183,7 @@
   if (VoidPtrTy == 0) {
 // NOTE: If these are changed, make sure to update PoolOptimize.cpp as 
well!
 VoidPtrTy = PointerType::getUnqual(Type::Int8Ty);
-#ifdef SAFECODE
-PoolDescType = ArrayType::get(VoidPtrTy, 50);
-#else
-PoolDescType = ArrayType::get(VoidPtrTy, 16);
-#endif
+PoolDescType = getPoolType();
 PoolDescPtrTy = PointerType::getUnqual(PoolDescType);
   }
 

Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp
URL: 
http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp?rev=47133r1=47132r2=47133view=diff

==
--- poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Thu Feb 14 
14:24:14 2008
@@ -665,7 +665,7 @@
  //Dinakar we need pooldescriptors for allocas in the callee if it 
escapes
  BasicBlock::iterator InsertPt = 
TheCall-getParent()-getParent()-front().begin();
  Type *VoidPtrTy = PointerType::getUnqual(Type::Int8Ty);
- ArgVal =  new AllocaInst(ArrayType::get(VoidPtrTy, 16), 0, PD, 
InsertPt);
+ ArgVal =  new AllocaInst(PAInfo.getPoolType(), 0, PD, InsertPt);
  Value *ElSize = ConstantInt::get(Type::Int32Ty,0);
  Value *Align  = ConstantInt::get(Type::Int32Ty,0);
   Value* Opts[3] = {ArgVal, ElSize, Align};


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[llvm-commits] [poolalloc] r47134 - /poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp

2008-02-14 Thread John Criswell 
Author: criswell
Date: Thu Feb 14 14:42:17 2008
New Revision: 47134

URL: http://llvm.org/viewvc/llvm-project?rev=47134view=rev
Log:
Fixed formatting; no functionality changes.

Modified:
poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp

Modified: poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp
URL: 
http://llvm.org/viewvc/llvm-project/poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp?rev=47134r1=47133r2=47134view=diff

==
--- poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp (original)
+++ poolalloc/trunk/lib/PoolAllocate/TransformFunctionBody.cpp Thu Feb 14 
14:42:17 2008
@@ -515,7 +515,8 @@
   std::vectorconst DSNode* ArgNodes;
   DSGraph *CalleeGraph;  // The callee graph
 
-  // For indirect callees find any callee since all DS graphs have been merged.
+  // For indirect callees, find any callee since all DS graphs have been
+  // merged.
   if (CF) {   // Direct calls are nice and simple.
 DEBUG(std::cerrHandling direct call:   *TheCall);
 FuncInfo *CFI = PAInfo.getFuncInfo(*CF);
@@ -543,11 +544,11 @@
 
 if (!CF) 
   for (EquivClassGraphs::callee_iterator I = 
ECGraphs.callee_begin(OrigInst), 
-E = ECGraphs.callee_end(OrigInst); I != E; ++I)
-   if (I-second) {
- CF = I-second;
- break;
-   }
+   E = ECGraphs.callee_end(OrigInst); I != E; ++I)
+if (I-second) {
+  CF = I-second;
+  break;
+}
 
 // If we didn't find the callee in the constructed call graph, try
 // checking in the DSNode itself.
@@ -661,21 +662,23 @@
 #ifdef BOUNDS_CHECK
   if (ArgNodes[i]-isArray()) {
 #endif
-   if (!isaInvokeInst(TheCall)) {
- //Dinakar we need pooldescriptors for allocas in the callee if it 
escapes
- BasicBlock::iterator InsertPt = 
TheCall-getParent()-getParent()-front().begin();
- Type *VoidPtrTy = PointerType::getUnqual(Type::Int8Ty);
- ArgVal =  new AllocaInst(PAInfo.getPoolType(), 0, PD, InsertPt);
- Value *ElSize = ConstantInt::get(Type::Int32Ty,0);
- Value *Align  = ConstantInt::get(Type::Int32Ty,0);
-  Value* Opts[3] = {ArgVal, ElSize, Align};
- new CallInst(PAInfo.PoolInit, Opts, Opts + 3,, TheCall);
-  BasicBlock::iterator BBI = TheCall;
-  new CallInst(PAInfo.PoolDestroy, ArgVal, , ++BBI);
-   }
-   //probably need to update DSG
-   //  std::cerr  WARNING: NULL POOL ARGUMENTS ARE PASSED IN!\n;
-#ifdef BOUNDS_CHECK
+  if (!isaInvokeInst(TheCall)) {
+// Dinakar: We need pooldescriptors for allocas in the callee if it
+//  escapes
+BasicBlock::iterator InsertPt = 
TheCall-getParent()-getParent()-front().begin();
+Type *VoidPtrTy = PointerType::getUnqual(Type::Int8Ty);
+ArgVal =  new AllocaInst(PAInfo.getPoolType(), 0, PD, InsertPt);
+Value *ElSize = ConstantInt::get(Type::Int32Ty,0);
+Value *Align  = ConstantInt::get(Type::Int32Ty,0);
+Value* Opts[3] = {ArgVal, ElSize, Align};
+new CallInst(PAInfo.PoolInit, Opts, Opts + 3,, TheCall);
+BasicBlock::iterator BBI = TheCall;
+new CallInst(PAInfo.PoolDestroy, ArgVal, , ++BBI);
+  }
+
+  //probably need to update DSG
+  //  std::cerr  WARNING: NULL POOL ARGUMENTS ARE PASSED IN!\n;
+#ifdef BOUNDS_CHECK
   }
 #endif
 }


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[llvm-commits] [llvm] r47138 - /llvm/trunk/lib/Support/APInt.cpp

2008-02-14 Thread Dan Gohman 
Author: djg
Date: Thu Feb 14 16:38:45 2008
New Revision: 47138

URL: http://llvm.org/viewvc/llvm-project?rev=47138view=rev
Log:
Fix a warning about comparison between signed and unsigned,
being consistent with the rest of the APInt implementation.

Modified:
llvm/trunk/lib/Support/APInt.cpp

Modified: llvm/trunk/lib/Support/APInt.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/APInt.cpp?rev=47138r1=47137r2=47138view=diff

==
--- llvm/trunk/lib/Support/APInt.cpp (original)
+++ llvm/trunk/lib/Support/APInt.cpp Thu Feb 14 16:38:45 2008
@@ -818,7 +818,7 @@
 return std::min(uint32_t(CountTrailingOnes_64(VAL)), BitWidth);
   uint32_t Count = 0;
   uint32_t i = 0;
-  for (; i  getNumWords()  pVal[i] == -1; ++i)
+  for (; i  getNumWords()  pVal[i] == -1ULL; ++i)
 Count += APINT_BITS_PER_WORD;
   if (i  getNumWords())
 Count += CountTrailingOnes_64(pVal[i]);


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[llvm-commits] [llvm] r47141 - in /llvm/trunk: lib/Transforms/Scalar/LoopIndexSplit.cpp test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll

2008-02-14 Thread Devang Patel 
Author: dpatel
Date: Thu Feb 14 17:18:47 2008
New Revision: 47141

URL: http://llvm.org/viewvc/llvm-project?rev=47141view=rev
Log:
If loop header is also loop exiting block then OrigPN is incoming value for B 
loop header.
Fixes PR 2030.


Added:
llvm/trunk/test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll
Modified:
llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp?rev=47141r1=47140r2=47141view=diff

==
--- llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopIndexSplit.cpp Thu Feb 14 17:18:47 2008
@@ -1465,7 +1465,13 @@
 PN-addIncoming(SD.B_StartValue, A_ExitingBlock);
   else { 
 PHINode *OrigPN = castPHINode(InverseMap[PN]);
-Value *V2 = OrigPN-getIncomingValueForBlock(A_ExitingBlock);
+Value *V2 = NULL;
+// If loop header is also loop exiting block then
+// OrigPN is incoming value for B loop header.
+if (A_ExitingBlock == L-getHeader())
+  V2 = OrigPN;
+else
+  V2 = OrigPN-getIncomingValueForBlock(A_ExitingBlock);
 PN-addIncoming(V2, A_ExitingBlock);
   }
 } else

Added: llvm/trunk/test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll?rev=47141view=auto

==
--- llvm/trunk/test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll (added)
+++ llvm/trunk/test/Transforms/LoopIndexSplit/2008-02-14-Crash.ll Thu Feb 14 
17:18:47 2008
@@ -0,0 +1,464 @@
+; RUN: llvm-as  %s | opt -loop-index-split -disable-output
+; PR 2030
+   %struct.FULL = type { i32, i32, [1000 x float*] }
+
+define i32 @matgen(%struct.FULL* %a, float** %x, float** %b, float** %bt, 
i32** %ipvt, i32 %test_case, i32 %scale) {
+entry:
+   br i1 false, label %bb, label %entry.bb30_crit_edge
+
+entry.bb30_crit_edge:  ; preds = %entry
+   br label %bb30
+
+bb:; preds = %entry
+   br label %bb14
+
+bb6:   ; preds = %bb14
+   br label %bb14
+
+bb14:  ; preds = %bb6, %bb
+   br i1 false, label %bb6, label %bb22
+
+bb22:  ; preds = %bb14
+   br label %bb30
+
+bb30:  ; preds = %bb22, %entry.bb30_crit_edge
+   switch i32 %test_case, label %bb648 [
+i32 1, label %bb30.bb32_crit_edge
+i32 2, label %bb30.bb32_crit_edge1
+i32 3, label %bb30.bb32_crit_edge2
+i32 4, label %bb30.bb108_crit_edge
+i32 5, label %bb30.bb108_crit_edge3
+i32 6, label %bb30.bb142_crit_edge
+i32 7, label %bb30.bb142_crit_edge4
+i32 8, label %bb30.bb142_crit_edge5
+i32 9, label %bb234
+i32 10, label %bb292
+i32 11, label %bb353
+i32 12, label %bb419
+i32 13, label %bb485
+i32 14, label %bb567
+   ]
+
+bb30.bb142_crit_edge5: ; preds = %bb30
+   br label %bb142
+
+bb30.bb142_crit_edge4: ; preds = %bb30
+   br label %bb142
+
+bb30.bb142_crit_edge:  ; preds = %bb30
+   br label %bb142
+
+bb30.bb108_crit_edge3: ; preds = %bb30
+   br label %bb108
+
+bb30.bb108_crit_edge:  ; preds = %bb30
+   br label %bb108
+
+bb30.bb32_crit_edge2:  ; preds = %bb30
+   br label %bb32
+
+bb30.bb32_crit_edge1:  ; preds = %bb30
+   br label %bb32
+
+bb30.bb32_crit_edge:   ; preds = %bb30
+   br label %bb32
+
+bb32:  ; preds = %bb30.bb32_crit_edge, %bb30.bb32_crit_edge1, 
%bb30.bb32_crit_edge2
+   br i1 false, label %bb53, label %bb52
+
+bb52:  ; preds = %bb32
+   br label %bb739
+
+bb53:  ; preds = %bb32
+   br label %bb101
+
+bb58:  ; preds = %bb101
+   br label %bb92
+
+bb64:  ; preds = %bb92
+   br i1 false, label %bb64.bb87_crit_edge, label %bb72
+
+bb64.bb87_crit_edge:   ; preds = %bb64
+   br label %bb87
+
+bb72:  ; preds = %bb64
+   br i1 false, label %bb72.bb87_crit_edge, label %bb79
+
+bb72.bb87_crit_edge:   ; preds = %bb72
+   br label %bb87
+
+bb79:  ; preds = %bb72
+   br label %bb87
+
+bb87:  ; preds = %bb79, %bb72.bb87_crit_edge, %bb64.bb87_crit_edge
+   br label %bb92
+
+bb92:  ; preds = %bb87, %bb58
+   br i1 false, label %bb64, label %bb98
+
+bb98:  ; preds = %bb92
+   br label %bb101
+
+bb101: ; preds = %bb98, %bb53
+   br i1 false, label %bb58, label %bb107
+
+bb107: ; preds = %bb101
+   br label %bb651
+
+bb108: ; preds = %bb30.bb108_crit_edge,

Re: [llvm-commits] [llvm] r47121 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/PowerPC/ lib/Target/Sparc/

2008-02-14 Thread Evan Cheng 
This is not a new issue. But I am wondering if this may be a compile  
time issue if the number of legal FP immediate is sufficiently large?  
Should we build a hash table for it instead?

Evan

On Feb 14, 2008, at 12:57 AM, Nate Begeman wrote:


 switch (TLI.getOperationAction(ISD::ConstantFP, CFP- 
 getValueType(0))) {
 default: assert(0  This action is not supported yet!);
 +case TargetLowering::Legal:
 +  break;
 case TargetLowering::Custom:
   Tmp3 = TLI.LowerOperation(Result, DAG);
   if (Tmp3.Val) {
 @@ -1180,9 +1166,22 @@
 break;
   }
   // FALLTHROUGH
 -case TargetLowering::Expand:
 +case TargetLowering::Expand: {
 +  // Check to see if this FP immediate is already legal.
 +  bool isLegal = false;
 +  for (TargetLowering::legal_fpimm_iterator I =  
 TLI.legal_fpimm_begin(),
 + E = TLI.legal_fpimm_end(); I != E; ++I) {
 +if (CFP-isExactlyValue(*I)) {
 +  isLegal = true;
 +  break;
 +}
 +  }
 +  // If this is a legal constant, turn it into a  
 TargetConstantFP node.
 +  if (isLegal)
 +break;
   Result = ExpandConstantFP(CFP, true, DAG, TLI);
 }
 +}
 break;
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Re: [llvm-commits] [llvm] r47122 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/CodeGen/SelectionDAG/

2008-02-14 Thread Evan Cheng 

On Feb 14, 2008, at 9:28 AM, Duncan Sands wrote:

 Author: baldrick
 Date: Thu Feb 14 11:28:50 2008
 New Revision: 47122

 URL: http://llvm.org/viewvc/llvm-project?rev=47122view=rev
 Log:
 In TargetLowering::LowerCallTo, don't assert that
 the return value is zero-extended if it isn't
 sign-extended.  It may also be any-extended.
 Also, if a floating point value was returned
 in a larger floating point type, pass 1 as the
 second operand to FP_ROUND, which tells it
 that all the precision is in the original type.
 I think this is right but I could be wrong.

Yep.


 Finally, when doing libcalls, set isZExt on
 a parameter if it is unsigned.  Currently
 isSExt is set when signed, and nothing is
 set otherwise.  This should be right for all
 calls to standard library routines.

I am not sure I totally understand the reason for this. Is it because  
these libcalls are implicitly defined?

Evan
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[llvm-commits] [llvm] r47143 - in /llvm/trunk: lib/Target/CellSPU/SPUSubtarget.h lib/Target/PowerPC/PPCAsmPrinter.cpp lib/Target/PowerPC/PPCSubtarget.cpp lib/Target/PowerPC/PPCSubtarget.h utils/TableG

2008-02-14 Thread Dale Johannesen 
Author: johannes
Date: Thu Feb 14 17:35:16 2008
New Revision: 47143

URL: http://llvm.org/viewvc/llvm-project?rev=47143view=rev
Log:
Rewrite tblgen handling of subtarget features so
it follows the order of the enum, not alphabetical.
The motivation is to make -mattr=+ssse3,+sse41
select SSE41 as it ought to.  Added ignored
enum values of 0 to PPC and SPU to avoid compiler
warnings.


Modified:
llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h
llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
llvm/trunk/utils/TableGen/SubtargetEmitter.cpp

Modified: llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h?rev=47143r1=47142r2=47143view=diff

==
--- llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h Thu Feb 14 17:35:16 2008
@@ -26,6 +26,7 @@
 
   namespace SPU {
 enum {
+  PROC_NONE,
   DEFAULT_PROC
 };
   }

Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47143r1=47142r2=47143view=diff

==
--- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Feb 14 17:35:16 2008
@@ -849,6 +849,7 @@
 
 bool DarwinAsmPrinter::doInitialization(Module M) {
   static const char *CPUDirectives[] = {
+,
 ppc,
 ppc601,
 ppc602,

Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=47143r1=47142r2=47143view=diff

==
--- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Thu Feb 14 17:35:16 2008
@@ -60,6 +60,7 @@
const std::string FS, bool is64Bit)
   : TM(tm)
   , StackAlignment(16)
+  , DarwinDirective(PPC::DIR_NONE)
   , IsGigaProcessor(false)
   , Has64BitSupport(false)
   , Use64BitRegs(false)

Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h?rev=47143r1=47142r2=47143view=diff

==
--- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h Thu Feb 14 17:35:16 2008
@@ -27,6 +27,7 @@
 namespace PPC {
   // -m directive values.
   enum {
+DIR_NONE,
 DIR_32,
 DIR_601, 
 DIR_602, 

Modified: llvm/trunk/utils/TableGen/SubtargetEmitter.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/SubtargetEmitter.cpp?rev=47143r1=47142r2=47143view=diff

==
--- llvm/trunk/utils/TableGen/SubtargetEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/SubtargetEmitter.cpp Thu Feb 14 17:35:16 2008
@@ -482,8 +482,12 @@
 const std::string Value = R-getValueAsString(Value);
 const std::string Attribute = R-getValueAsString(Attribute);
 
-OSif ((BitsInstance  ) != 0) 
-Attribute   =   Value  ;\n;
+if (Value==true || Value==false)
+  OSif ((BitsInstance  ) != 0) 
+  Attribute   =   Value  ;\n;
+else
+  OSif ((BitsInstance  ) != 0Attribute  
+Value  )   Attribute   =   Value  ;\n;
   }
 
   if (HasItineraries) {


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Re: [llvm-commits] [llvm] r47143 - in /llvm/trunk: lib/Target/CellSPU/SPUSubtarget.h lib/Target/PowerPC/PPCAsmPrinter.cpp lib/Target/PowerPC/PPCSubtarget.cpp lib/Target/PowerPC/PPCSubtarget.h utils/Ta

2008-02-14 Thread Evan Cheng 
Thanks. Since you are hacking on this, can you check something for me?  
I seem to be getting this annoying warning (something like generating  
64-bit code for 32-bit cpu) when I do (for example) -march=x86-64 - 
mattr=-sse41. Any idea what's causing this bogus warning? Is it when - 
mattr is used, it does not do auto CPU feature detection?

Evan

On Feb 14, 2008, at 3:35 PM, Dale Johannesen wrote:

 Author: johannes
 Date: Thu Feb 14 17:35:16 2008
 New Revision: 47143

 URL: http://llvm.org/viewvc/llvm-project?rev=47143view=rev
 Log:
 Rewrite tblgen handling of subtarget features so
 it follows the order of the enum, not alphabetical.
 The motivation is to make -mattr=+ssse3,+sse41
 select SSE41 as it ought to.  Added ignored
 enum values of 0 to PPC and SPU to avoid compiler
 warnings.


 Modified:
llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h
llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
llvm/trunk/utils/TableGen/SubtargetEmitter.cpp

 Modified: llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h
 URL: 
 http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h?rev=47143r1=47142r2=47143view=diff

 = 
 = 
 = 
 = 
 = 
 = 
 = 
 = 
 ==
 --- llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h (original)
 +++ llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h Thu Feb 14 17:35:16  
 2008
 @@ -26,6 +26,7 @@

   namespace SPU {
 enum {
 +  PROC_NONE,
   DEFAULT_PROC
 };
   }

 Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
 URL: 
 http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47143r1=47142r2=47143view=diff

 = 
 = 
 = 
 = 
 = 
 = 
 = 
 = 
 ==
 --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
 +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Feb 14  
 17:35:16 2008
 @@ -849,6 +849,7 @@

 bool DarwinAsmPrinter::doInitialization(Module M) {
   static const char *CPUDirectives[] = {
 +,
 ppc,
 ppc601,
 ppc602,

 Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
 URL: 
 http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=47143r1=47142r2=47143view=diff

 = 
 = 
 = 
 = 
 = 
 = 
 = 
 = 
 ==
 --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original)
 +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Thu Feb 14  
 17:35:16 2008
 @@ -60,6 +60,7 @@
const std::string FS, bool is64Bit)
   : TM(tm)
   , StackAlignment(16)
 +  , DarwinDirective(PPC::DIR_NONE)
   , IsGigaProcessor(false)
   , Has64BitSupport(false)
   , Use64BitRegs(false)

 Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
 URL: 
 http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h?rev=47143r1=47142r2=47143view=diff

 = 
 = 
 = 
 = 
 = 
 = 
 = 
 = 
 ==
 --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h (original)
 +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h Thu Feb 14 17:35:16  
 2008
 @@ -27,6 +27,7 @@
 namespace PPC {
   // -m directive values.
   enum {
 +DIR_NONE,
 DIR_32,
 DIR_601,
 DIR_602,

 Modified: llvm/trunk/utils/TableGen/SubtargetEmitter.cpp
 URL: 
 http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/SubtargetEmitter.cpp?rev=47143r1=47142r2=47143view=diff

 = 
 = 
 = 
 = 
 = 
 = 
 = 
 = 
 ==
 --- llvm/trunk/utils/TableGen/SubtargetEmitter.cpp (original)
 +++ llvm/trunk/utils/TableGen/SubtargetEmitter.cpp Thu Feb 14  
 17:35:16 2008
 @@ -482,8 +482,12 @@
 const std::string Value = R-getValueAsString(Value);
 const std::string Attribute = R-getValueAsString(Attribute);

 -OSif ((BitsInstance  ) != 0) 
 -Attribute   =   Value  ;\n;
 +if (Value==true || Value==false)
 +  OSif ((BitsInstance  ) != 0) 
 +  Attribute   =   Value  ;\n;
 +else
 +  OSif ((BitsInstance  ) != 0 
 Attribute 
 +Value  )   Attribute   =   Value  
  ;\n;
   }

   if (HasItineraries) {


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[llvm-commits] [test-suite] r47144 - in /test-suite/trunk: DiffOutput.sh RunSafely.sh RunSafelyAndStable.sh TimeProgram.sh TimedExec.sh

2008-02-14 Thread Lauro Ramos Venancio 
Author: laurov
Date: Thu Feb 14 17:43:19 2008
New Revision: 47144

URL: http://llvm.org/viewvc/llvm-project?rev=47144view=rev
Log:
Shell scripts are not binary files.


Modified:
test-suite/trunk/DiffOutput.sh   (props changed)
test-suite/trunk/RunSafely.sh   (props changed)
test-suite/trunk/RunSafelyAndStable.sh   (props changed)
test-suite/trunk/TimeProgram.sh   (props changed)
test-suite/trunk/TimedExec.sh   (props changed)

Propchange: test-suite/trunk/DiffOutput.sh

--
--- svn:mime-type (original)
+++ svn:mime-type (removed)
@@ -1 +0,0 @@
-application/x-sh

Propchange: test-suite/trunk/RunSafely.sh

--
--- svn:mime-type (original)
+++ svn:mime-type (removed)
@@ -1 +0,0 @@
-application/x-sh

Propchange: test-suite/trunk/RunSafelyAndStable.sh

--
--- svn:mime-type (original)
+++ svn:mime-type (removed)
@@ -1 +0,0 @@
-application/x-sh

Propchange: test-suite/trunk/TimeProgram.sh

--
--- svn:mime-type (original)
+++ svn:mime-type (removed)
@@ -1 +0,0 @@
-application/x-sh

Propchange: test-suite/trunk/TimedExec.sh

--
--- svn:mime-type (original)
+++ svn:mime-type (removed)
@@ -1 +0,0 @@
-application/x-sh


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[llvm-commits] [test-suite] r47145 - /test-suite/trunk/RunSafely.sh

2008-02-14 Thread Lauro Ramos Venancio 
Author: laurov
Date: Thu Feb 14 17:46:20 2008
New Revision: 47145

URL: http://llvm.org/viewvc/llvm-project?rev=47145view=rev
Log:
Fix PR1437 and limit stack size.


Modified:
test-suite/trunk/RunSafely.sh

Modified: test-suite/trunk/RunSafely.sh
URL: 
http://llvm.org/viewvc/llvm-project/test-suite/trunk/RunSafely.sh?rev=47145r1=47144r2=47145view=diff

==
--- test-suite/trunk/RunSafely.sh (original)
+++ test-suite/trunk/RunSafely.sh Thu Feb 14 17:46:20 2008
@@ -81,6 +81,9 @@
 # To prevent infinite loops which fill up the disk, specify a limit on 
size of
 # files being output by the tests. 10 MB should be enough for anybody. ;)
 ULIMITCMD=$ULIMITCMD ulimit -f 10485760;
+
+# stack size: 100 MB should be enough for anybody. ;)
+ULIMITCMD=$ULIMITCMD ulimit -s 10;
 esac
 rm -f core core.*
 
@@ -102,7 +105,7 @@
 fi
 
 if [ x$RHOST = x ] ; then
-  ( sh -c $ULIMITCMD; time -p sh -c $COMMAND $OUTFILE 21  $INFILE ; 
echo exit $? ) 21 \
+  ( sh -c $ULIMITCMD time -p $COMMAND $OUTFILE 21  $INFILE; echo exit 
\$? ) 21 \
 | awk -- '\
 BEGIN { cpu = 0.0; }
 /^user/   { cpu += $2; print; }


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[llvm-commits] [llvm] r47148 - /llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp

2008-02-14 Thread Chris Lattner 
Author: lattner
Date: Thu Feb 14 18:57:28 2008
New Revision: 47148

URL: http://llvm.org/viewvc/llvm-project?rev=47148view=rev
Log:
Support vector constant zeros, thanks to Zack Rusin for the testcase.

Modified:
llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp

Modified: llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp?rev=47148r1=47147r2=47148view=diff

==
--- llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/ExecutionEngine.cpp Thu Feb 14 18:57:28 2008
@@ -799,13 +799,13 @@
 for (unsigned i = 0, e = CP-getNumOperands(); i != e; ++i)
   InitializeMemory(CP-getOperand(i), (char*)Addr+i*ElementSize);
 return;
+  } else if (isaConstantAggregateZero(Init)) {
+memset(Addr, 0, (size_t)getTargetData()-getABITypeSize(Init-getType()));
+return;
   } else if (Init-getType()-isFirstClassType()) {
 GenericValue Val = getConstantValue(Init);
 StoreValueToMemory(Val, (GenericValue*)Addr, Init-getType());
 return;
-  } else if (isaConstantAggregateZero(Init)) {
-memset(Addr, 0, (size_t)getTargetData()-getABITypeSize(Init-getType()));
-return;
   }
 
   switch (Init-getType()-getTypeID()) {


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[llvm-commits] [llvm] r47149 - /llvm/trunk/lib/Target/X86/X86.td

2008-02-14 Thread Dale Johannesen 
Author: johannes
Date: Thu Feb 14 19:22:41 2008
New Revision: 47149

URL: http://llvm.org/viewvc/llvm-project?rev=47149view=rev
Log:
nocona, core2 and penryn support 64 bit.


Modified:
llvm/trunk/lib/Target/X86/X86.td

Modified: llvm/trunk/lib/Target/X86/X86.td
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=47149r1=47148r2=47149view=diff

==
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Thu Feb 14 19:22:41 2008
@@ -70,9 +70,9 @@
 def : Procx86-64,  [Feature64Bit];
 def : Procyonah,   [FeatureSSE3];
 def : Procprescott,[FeatureSSE3];
-def : Procnocona,  [FeatureSSE3];
-def : Proccore2,   [FeatureSSSE3];
-def : Procpenryn,  [FeatureSSE41];
+def : Procnocona,  [FeatureSSE3,   Feature64Bit];
+def : Proccore2,   [FeatureSSSE3,  Feature64Bit];
+def : Procpenryn,  [FeatureSSE41,  Feature64Bit];
 
 def : Prock6,  [FeatureMMX];
 def : Prock6-2,[FeatureMMX,Feature3DNow];


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Re: [llvm-commits] [llvm] r47143 - in /llvm/trunk: lib/Target/CellSPU/SPUSubtarget.h lib/Target/PowerPC/PPCAsmPrinter.cpp lib/Target/PowerPC/PPCSubtarget.cpp lib/Target/PowerPC/PPCSubtarget.h utils/Ta

2008-02-14 Thread Dale Johannesen 

On Feb 14, 2008, at 3:40 PM, Evan Cheng wrote:

 Thanks. Since you are hacking on this, can you check something for me?
 I seem to be getting this annoying warning (something like generating
 64-bit code for 32-bit cpu) when I do (for example) -march=x86-64 -
 mattr=-sse41. Any idea what's causing this bogus warning? Is it when -
 mattr is used, it does not do auto CPU feature detection?

 Evan

It's simpler than that, the core2 table entry didn't say it has 64- 
bit support.  Fixed.

This warning (PPC has it too) also comes out for cross compiles, which  
I suppose is accurate, but doesn't seem helpful.  Anybody for getting  
rid of it?

 On Feb 14, 2008, at 3:35 PM, Dale Johannesen wrote:

 Author: johannes
 Date: Thu Feb 14 17:35:16 2008
 New Revision: 47143

 URL: http://llvm.org/viewvc/llvm-project?rev=47143view=rev
 Log:
 Rewrite tblgen handling of subtarget features so
 it follows the order of the enum, not alphabetical.
 The motivation is to make -mattr=+ssse3,+sse41
 select SSE41 as it ought to.  Added ignored
 enum values of 0 to PPC and SPU to avoid compiler
 warnings.


 Modified:
   llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h
   llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
   llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
   llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
   llvm/trunk/utils/TableGen/SubtargetEmitter.cpp

 Modified: llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h
 URL: 
 http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h?rev=47143r1=47142r2=47143view=diff

 =
 =
 =
 =
 =
 =
 =
 =
 = 
 =
 --- llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h (original)
 +++ llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h Thu Feb 14 17:35:16
 2008
 @@ -26,6 +26,7 @@

  namespace SPU {
enum {
 +  PROC_NONE,
  DEFAULT_PROC
};
  }

 Modified: llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
 URL: 
 http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp?rev=47143r1=47142r2=47143view=diff

 =
 =
 =
 =
 =
 =
 =
 =
 = 
 =
 --- llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp (original)
 +++ llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp Thu Feb 14
 17:35:16 2008
 @@ -849,6 +849,7 @@

 bool DarwinAsmPrinter::doInitialization(Module M) {
  static const char *CPUDirectives[] = {
 +,
ppc,
ppc601,
ppc602,

 Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
 URL: 
 http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=47143r1=47142r2=47143view=diff

 =
 =
 =
 =
 =
 =
 =
 =
 = 
 =
 --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original)
 +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Thu Feb 14
 17:35:16 2008
 @@ -60,6 +60,7 @@
   const std::string FS, bool is64Bit)
  : TM(tm)
  , StackAlignment(16)
 +  , DarwinDirective(PPC::DIR_NONE)
  , IsGigaProcessor(false)
  , Has64BitSupport(false)
  , Use64BitRegs(false)

 Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
 URL: 
 http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h?rev=47143r1=47142r2=47143view=diff

 =
 =
 =
 =
 =
 =
 =
 =
 = 
 =
 --- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h (original)
 +++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h Thu Feb 14 17:35:16
 2008
 @@ -27,6 +27,7 @@
 namespace PPC {
  // -m directive values.
  enum {
 +DIR_NONE,
DIR_32,
DIR_601,
DIR_602,

 Modified: llvm/trunk/utils/TableGen/SubtargetEmitter.cpp
 URL: 
 http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/SubtargetEmitter.cpp?rev=47143r1=47142r2=47143view=diff

 =
 =
 =
 =
 =
 =
 =
 =
 = 
 =
 --- llvm/trunk/utils/TableGen/SubtargetEmitter.cpp (original)
 +++ llvm/trunk/utils/TableGen/SubtargetEmitter.cpp Thu Feb 14
 17:35:16 2008
 @@ -482,8 +482,12 @@
const std::string Value = R-getValueAsString(Value);
const std::string Attribute = R-getValueAsString(Attribute);

 -OSif ((BitsInstance  ) != 0) 
 -Attribute   =   Value  ;\n;
 +if (Value==true || Value==false)
 +  OSif ((BitsInstance  ) != 0) 
 +  Attribute   =   Value  ;\n;
 +else
 +  OSif ((BitsInstance  ) != 0   
 Attribute 
 +Value  )   Attribute   =   Value
  ;\n;
  }

  if (HasItineraries) {


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[llvm-commits] [llvm] r47150 - in /llvm/trunk: lib/Transforms/Scalar/LoopRotation.cpp test/Other/2008-02-14-PassManager.ll

2008-02-14 Thread Devang Patel 
Author: dpatel
Date: Thu Feb 14 19:24:49 2008
New Revision: 47150

URL: http://llvm.org/viewvc/llvm-project?rev=47150view=rev
Log:
Fix PR2028

Added:
llvm/trunk/test/Other/2008-02-14-PassManager.ll
Modified:
llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp?rev=47150r1=47149r2=47150view=diff

==
--- llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/LoopRotation.cpp Thu Feb 14 19:24:49 2008
@@ -56,12 +56,12 @@
 
 // LCSSA form makes instruction renaming easier.
 virtual void getAnalysisUsage(AnalysisUsage AU) const {
+  AU.addRequiredID(LoopSimplifyID);
+  AU.addPreservedID(LoopSimplifyID);
   AU.addRequiredID(LCSSAID);
   AU.addPreservedID(LCSSAID);
   AU.addPreservedScalarEvolution();
   AU.addPreservedLoopInfo();
-  AU.addRequiredID(LoopSimplifyID);
-  AU.addPreservedID(LoopSimplifyID);
   AU.addPreservedDominatorTree();
   AU.addPreservedDominanceFrontier();
 }

Added: llvm/trunk/test/Other/2008-02-14-PassManager.ll
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Other/2008-02-14-PassManager.ll?rev=47150view=auto

==
--- llvm/trunk/test/Other/2008-02-14-PassManager.ll (added)
+++ llvm/trunk/test/Other/2008-02-14-PassManager.ll Thu Feb 14 19:24:49 2008
@@ -0,0 +1,5 @@
+; RUN:  llvm-as  %s |  opt -loop-unroll -loop-rotate -simplifycfg 
-disable-output
+; PR 2028
+define i32 @test1() {
+   ret i32 0;
+}


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Re: [llvm-commits] [llvm] r46827 - memoperands #1

2008-02-14 Thread Dan Gohman 

On Feb 12, 2008, at 1:42 PM, Chris Lattner wrote:


 On Feb 12, 2008, at 11:27 AM, Dan Gohman wrote:

 Hi Chris,

 Thanks for the careful review! I've responded to parts of it already,
 and I'll
 be responding to more soon.

 Thanks Dan!

 On Feb 10, 2008, at 11:56 AM, Chris Lattner wrote:
 Instead of Size here, would it make sense to store an MVT?  That
 would
 seem to capture strictly more information, thought I'm not sure if
 it's directly useful right now.

 This, and the question of whether to make LSBaseNode store a
 MemOperand
 instead of separate fields, are related.

 Ok, right.  What is your opinion on this?  Is there any reason not to
 give MemOperand a VT and then give LSBaseNode a MemOperand?

There's a little redundancy; the MemOperand has flags to distinguish
between load and store, and LSBaseNode has its opcode which
is either LOAD or STORE.  But that's not a big problem.



 Also related is the question is what to do about the lowering of
 something like
 insert vector element where the element index isn't a constant and  
 the
 target
 doesn't have an instruction to handle it. Legalize emits a store with
 a computed
 offset; what should the MemOperand for this look like? One way is to
 give it a
 larger size, to cover the known area over which the store might  
 occur.
 This
 would mean it would use a different VT from the actual store, which
 could be
 confusing. Maybe it should have both a size and a VT.

 Good question.  This sort of thing is currently rare enough that it is
 probably fine to just use a null Value*, and have everything treat it
 conservatively.  Would this be acceptable for now?

Yes, using a null Value* is done in many places right now that
don't yet provide a proper SourceValue.

Dan

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[llvm-commits] [llvm] r47151 - /llvm/trunk/include/llvm/CodeGen/MemOperand.h

2008-02-14 Thread Dan Gohman 
Author: djg
Date: Thu Feb 14 19:29:57 2008
New Revision: 47151

URL: http://llvm.org/viewvc/llvm-project?rev=47151view=rev
Log:
Change MemOperand's size and offset to be 64-bit.

Modified:
llvm/trunk/include/llvm/CodeGen/MemOperand.h

Modified: llvm/trunk/include/llvm/CodeGen/MemOperand.h
URL: 
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MemOperand.h?rev=47151r1=47150r2=47151view=diff

==
--- llvm/trunk/include/llvm/CodeGen/MemOperand.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MemOperand.h Thu Feb 14 19:29:57 2008
@@ -31,8 +31,8 @@
 class MemOperand {
   const Value *V;
   unsigned int Flags;
-  int Offset;
-  int Size;
+  int64_t Offset;
+  uint64_t Size;
   unsigned int Alignment;
 
 public:
@@ -48,7 +48,8 @@
 
   /// MemOperand - Construct an MemOperand object with the specified
   /// address Value, flags, offset, size, and alignment.
-  MemOperand(const Value *v, unsigned int f, int o, int s, unsigned int a)
+  MemOperand(const Value *v, unsigned int f, int64_t o, uint64_t s,
+ unsigned int a)
 : V(v), Flags(f), Offset(o), Size(s), Alignment(a) {}
 
   /// getValue - Return the base address of the memory access.
@@ -63,10 +64,10 @@
   /// getOffset - For normal values, this is a byte offset added to the base
   /// address. For PseudoSourceValue::FPRel values, this is the FrameIndex
   /// number.
-  int getOffset() const { return Offset; }
+  int64_t getOffset() const { return Offset; }
 
   /// getSize - Return the size in bytes of the memory reference.
-  int getSize() const { return Size; }
+  uint64_t getSize() const { return Size; }
 
   /// getAlignment - Return the minimum known alignment in bytes of the
   /// memory reference.


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Re: [llvm-commits] [llvm] r47143 - in /llvm/trunk: lib/Target/CellSPU/SPUSubtarget.h lib/Target/PowerPC/PPCAsmPrinter.cpp lib/Target/PowerPC/PPCSubtarget.cpp lib/Target/PowerPC/PPCSubtarget.h utils/Ta

2008-02-14 Thread Chris Lattner 
On Feb 14, 2008, at 5:23 PM, Dale Johannesen wrote:
 n Feb 14, 2008, at 3:40 PM, Evan Cheng wrote:
 Thanks. Since you are hacking on this, can you check something for  
 me?
 I seem to be getting this annoying warning (something like  
 generating
 64-bit code for 32-bit cpu) when I do (for example) -march=x86-64 -
 mattr=-sse41. Any idea what's causing this bogus warning? Is it  
 when -
 mattr is used, it does not do auto CPU feature detection?

 Evan

 It's simpler than that, the core2 table entry didn't say it has 64-
 bit support.  Fixed.

 This warning (PPC has it too) also comes out for cross compiles, which
 I suppose is accurate, but doesn't seem helpful.  Anybody for getting
 rid of it?

Please kill it, the code generator shouldn't print to stderr unless  
aborting.

-Chris
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Re: [llvm-commits] [llvm] r47121 - in /llvm/trunk: include/llvm/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/IA64/ lib/Target/PowerPC/ lib/Target/Sparc/

2008-02-14 Thread Chris Lattner 

On Feb 14, 2008, at 3:30 PM, Evan Cheng wrote:

 This is not a new issue. But I am wondering if this may be a compile
 time issue if the number of legal FP immediate is sufficiently large?
 Should we build a hash table for it instead?

If a target had a huge number of legal fp immediates, it could use  
custom lowering instead of 'expand'.

-Chris

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Re: [llvm-commits] CVS: llvm-www/releases/download.html

2008-02-14 Thread Duncan Sands 
 update the one reference to CFEBuildInstrs.html that I see.

Thanks Chris!  Can you please also update the 2.2 release notes, and
where it says (about Ada and Fortran) they need to be built from source,
make that a link to GCCFEBuildIntrs.

Ciao,

Duncan.
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Re: [llvm-commits] [llvm] r47122 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/CodeGen/SelectionDAG/

2008-02-14 Thread Duncan Sands 
Hi Evan,

  Finally, when doing libcalls, set isZExt on
  a parameter if it is unsigned.  Currently
  isSExt is set when signed, and nothing is
  set otherwise.  This should be right for all
  calls to standard library routines.
 
 I am not sure I totally understand the reason for this. Is it because  
 these libcalls are implicitly defined?

in what seems to be a hang-over from the days when
types were signed or unsigned, all places that generate
calls to library functions (whether via ExpandLibCall
or via a direct call to LowerCallTo, used a lot for memcpy
and friends) only ever set isSExt on arguments, they
never set isZExt.  Since library calls are to C
functions, and C integer arguments are always either
zero extended or sign extended (and should never be
any extended) [*] then that means that we should be
setting isZExt when not setting isSExt.  This does
result in isZExt being set for pointers, but that should
be harmless.

Note that ExpandLibCall now sets either isSExt or
isZExt for return values, for the same reason.

Ciao,

Duncan.

[*] I don't know much about C so I could be wrong here.
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Re: [llvm-commits] [test-suite] r47145 - /test-suite/trunk/RunSafely.sh

2008-02-14 Thread Duncan Sands 
 +# stack size: 100 MB should be enough for anybody. ;)
 +ULIMITCMD=$ULIMITCMD ulimit -s 10;

What about over-all virtual memory (-v)?

D.
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