Mesa (master): glx: make the interval of LIBGL_SHOW_FPS adjustable
Module: Mesa
Branch: master
Commit: da33347131ff88a3b7979aea2031ce6f34319ed0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=da33347131ff88a3b7979aea2031ce6f34319ed0
Author: Chia-I Wu
Date: Wed Aug 28 11:40:05 2013 +0800
glx: make the interval of LIBGL_SHOW_FPS adjustable
LIBGL_SHOW_FPS=1 makes GLX print FPS every second while other values do
nothing. Extend it so that LIBGL_SHOW_FPS=N will print the FPS every N
seconds.
Signed-off-by: Chia-I Wu
Reviewed-by: Marek Olšák
---
src/glx/dri2_glx.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/src/glx/dri2_glx.c b/src/glx/dri2_glx.c
index c54edac..54fc21c 100644
--- a/src/glx/dri2_glx.c
+++ b/src/glx/dri2_glx.c
@@ -95,7 +95,7 @@ struct dri2_screen {
void *driver;
int fd;
- Bool show_fps;
+ int show_fps_interval;
};
struct dri2_context
@@ -764,6 +764,8 @@ unsigned dri2GetSwapEventType(Display* dpy, XID drawable)
static void show_fps(struct dri2_drawable *draw)
{
+ const int interval =
+ ((struct dri2_screen *) draw->base.psc)->show_fps_interval;
struct timeval tv;
uint64_t current_time;
@@ -772,7 +774,7 @@ static void show_fps(struct dri2_drawable *draw)
draw->frames++;
- if (draw->previous_time + 100 <= current_time) {
+ if (draw->previous_time + interval * 100 <= current_time) {
if (draw->previous_time) {
fprintf(stderr, "libGL: FPS = %.1f\n",
((uint64_t)draw->frames * 100) /
@@ -859,7 +861,7 @@ dri2SwapBuffers(__GLXDRIdrawable *pdraw, int64_t
target_msc, int64_t divisor,
target_msc, divisor, remainder);
}
-if (psc->show_fps) {
+if (psc->show_fps_interval) {
show_fps(priv);
}
@@ -1283,7 +1285,9 @@ dri2CreateScreen(int screen, struct glx_display * priv)
free(deviceName);
tmp = getenv("LIBGL_SHOW_FPS");
- psc->show_fps = tmp && strcmp(tmp, "1") == 0;
+ psc->show_fps_interval = (tmp) ? atoi(tmp) : 0;
+ if (psc->show_fps_interval < 0)
+ psc->show_fps_interval = 0;
return &psc->base;
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Mesa (master): i965: Remove unused ATTRIB_BIT_DWORDS define.
Module: Mesa
Branch: master
Commit: a3335417e3c1f8ef6947f7ae57e75e3df501cef5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3335417e3c1f8ef6947f7ae57e75e3df501cef5
Author: Kenneth Graunke
Date: Wed Aug 28 14:23:39 2013 -0700
i965: Remove unused ATTRIB_BIT_DWORDS define.
Reviewed-by: Eric Anholt
Reviewed-by: Paul Berry
---
src/mesa/drivers/dri/i965/brw_context.h |7 ---
1 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 939083b..64371cf 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -786,13 +786,6 @@ struct brw_cached_batch_item {
struct brw_cached_batch_item *next;
};
-
-
-/* Protect against a future where VERT_ATTRIB_MAX > 32. Wouldn't life
- * be easier if C allowed arrays of packed elements?
- */
-#define ATTRIB_BIT_DWORDS ((VERT_ATTRIB_MAX+31)/32)
-
struct brw_vertex_buffer {
/** Buffer object containing the uploaded vertex data */
drm_intel_bo *bo;
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Mesa (master): i965: Use the proper element of the prim array in brw_try_draw_prims.
Module: Mesa
Branch: master
Commit: b8211ab3edb1bb9f414e8b4913609f48326e202e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8211ab3edb1bb9f414e8b4913609f48326e202e
Author: Kenneth Graunke
Date: Thu Mar 21 15:01:34 2013 -0700
i965: Use the proper element of the prim array in brw_try_draw_prims.
The VBO module actually calls us with an array of _mesa_prim objects.
For example, it may break up a DrawArrays() call into multiple
primitives when primitive restart is enabled.
Previously, we treated prim like a pointer, always accessing element 0.
This worked because all of the primitive objects in a single draw call
have the same value for num_instances and basevertex.
However, accessing an array as a pointer and using the wrong object's
fields is misleading. For stylistic reasons alone, we should use the
right object.
Signed-off-by: Kenneth Graunke
Reviewed-by: Eric Anholt
Reviewed-by: Paul Berry
---
src/mesa/drivers/dri/i965/brw_draw.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index 0b11566..dec17db 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -390,12 +390,12 @@ static bool brw_try_draw_prims( struct gl_context *ctx,
intel_batchbuffer_require_space(brw, estimated_max_prim_size, false);
intel_batchbuffer_save_state(brw);
- if (brw->num_instances != prim->num_instances) {
- brw->num_instances = prim->num_instances;
+ if (brw->num_instances != prim[i].num_instances) {
+ brw->num_instances = prim[i].num_instances;
brw->state.dirty.brw |= BRW_NEW_VERTICES;
}
- if (brw->basevertex != prim->basevertex) {
- brw->basevertex = prim->basevertex;
+ if (brw->basevertex != prim[i].basevertex) {
+ brw->basevertex = prim[i].basevertex;
brw->state.dirty.brw |= BRW_NEW_VERTICES;
}
if (brw->gen < 6)
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Mesa (master): i965: Combine brw_emit_prim and gen7_emit_prim.
Module: Mesa
Branch: master
Commit: 976d1d6665686cf6be6f3388a28c21516d94de76
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=976d1d6665686cf6be6f3388a28c21516d94de76
Author: Kenneth Graunke
Date: Fri Apr 5 23:10:39 2013 -0700
i965: Combine brw_emit_prim and gen7_emit_prim.
These functions have almost identical code; the only difference is that
a few of the bits moved around. Adding a few trivial conditionals
allows the same function to work on all generations, and the resulting
code is still quite readable.
v2: Comment that the workaround flush is only necessary on SNB
(requested by Paul Berry).
Signed-off-by: Kenneth Graunke
Reviewed-by: Eric Anholt
Reviewed-by: Paul Berry
---
src/mesa/drivers/dri/i965/brw_draw.c | 81 --
1 files changed, 18 insertions(+), 63 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index 5c17ce6..0b11566 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -171,11 +171,15 @@ static void brw_emit_prim(struct brw_context *brw,
start_vertex_location = prim->start;
base_vertex_location = prim->basevertex;
if (prim->indexed) {
- vertex_access_type = GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM;
+ vertex_access_type = brw->gen >= 7 ?
+ GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM :
+ GEN4_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM;
start_vertex_location += brw->ib.start_vertex_offset;
base_vertex_location += brw->vb.start_vertex_bias;
} else {
- vertex_access_type = GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
+ vertex_access_type = brw->gen >= 7 ?
+ GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL :
+ GEN4_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
start_vertex_location += brw->vb.start_vertex_bias;
}
@@ -198,65 +202,16 @@ static void brw_emit_prim(struct brw_context *brw,
intel_batchbuffer_emit_mi_flush(brw);
}
- BEGIN_BATCH(6);
- OUT_BATCH(CMD_3D_PRIM << 16 | (6 - 2) |
-hw_prim << GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT |
-vertex_access_type);
- OUT_BATCH(verts_per_instance);
- OUT_BATCH(start_vertex_location);
- OUT_BATCH(prim->num_instances);
- OUT_BATCH(prim->base_instance);
- OUT_BATCH(base_vertex_location);
- ADVANCE_BATCH();
-
- brw->batch.need_workaround_flush = true;
-
- if (brw->always_flush_cache) {
- intel_batchbuffer_emit_mi_flush(brw);
- }
-}
-
-static void gen7_emit_prim(struct brw_context *brw,
- const struct _mesa_prim *prim,
- uint32_t hw_prim)
-{
- int verts_per_instance;
- int vertex_access_type;
- int start_vertex_location;
- int base_vertex_location;
-
- DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode),
- prim->start, prim->count);
-
- start_vertex_location = prim->start;
- base_vertex_location = prim->basevertex;
- if (prim->indexed) {
- vertex_access_type = GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM;
- start_vertex_location += brw->ib.start_vertex_offset;
- base_vertex_location += brw->vb.start_vertex_bias;
+ if (brw->gen >= 7) {
+ BEGIN_BATCH(7);
+ OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2));
+ OUT_BATCH(hw_prim | vertex_access_type);
} else {
- vertex_access_type = GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL;
- start_vertex_location += brw->vb.start_vertex_bias;
+ BEGIN_BATCH(6);
+ OUT_BATCH(CMD_3D_PRIM << 16 | (6 - 2) |
+hw_prim << GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT |
+vertex_access_type);
}
-
- verts_per_instance = prim->count;
-
- /* If nothing to emit, just return. */
- if (verts_per_instance == 0)
- return;
-
- /* If we're set to always flush, do it before and after the primitive emit.
-* We want to catch both missed flushes that hurt instruction/state cache
-* and missed flushes of the render cache as it heads to other parts of
-* the besides the draw code.
-*/
- if (brw->always_flush_cache) {
- intel_batchbuffer_emit_mi_flush(brw);
- }
-
- BEGIN_BATCH(7);
- OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2));
- OUT_BATCH(hw_prim | vertex_access_type);
OUT_BATCH(verts_per_instance);
OUT_BATCH(start_vertex_location);
OUT_BATCH(prim->num_instances);
@@ -264,6 +219,9 @@ static void gen7_emit_prim(struct brw_context *brw,
OUT_BATCH(base_vertex_location);
ADVANCE_BATCH();
+ /* Only used on Sandybridge; harmless to set elsewhere. */
+ brw->batch.need_workaround_flush = true;
+
if (brw->always_flush_cache) {
intel_batchbuffer_emit_mi_flush(brw);
}
@@ -456,10 +414,7 @@ retry:
brw_upload_state(brw);
}
- if (brw->gen >= 7)
-gen7_emit_prim(brw, &prim[i], brw->primitive);
- else
-brw_emit_prim(brw, &prim[i], brw->primitive);
+ brw_emit_prim(brw, &prim[i], brw->primitive);
brw->no_batch_wrap = false;
Mesa (master): nvc0: clear the flushed flag
Module: Mesa
Branch: master
Commit: 528a48ee8da91d79614a877edf8583d063db6c36
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=528a48ee8da91d79614a877edf8583d063db6c36
Author: Christoph Bumiller
Date: Tue Jun 18 10:59:45 2013 +0200
nvc0: clear the flushed flag
---
src/gallium/drivers/nvc0/nvc0_state_validate.c |9 -
1 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/nvc0/nvc0_state_validate.c
b/src/gallium/drivers/nvc0/nvc0_state_validate.c
index 1e14723..4b50b43 100644
--- a/src/gallium/drivers/nvc0/nvc0_state_validate.c
+++ b/src/gallium/drivers/nvc0/nvc0_state_validate.c
@@ -566,11 +566,10 @@ nvc0_state_validate(struct nvc0_context *nvc0, uint32_t
mask, unsigned words)
nouveau_pushbuf_bufctx(nvc0->base.pushbuf, nvc0->bufctx_3d);
ret = nouveau_pushbuf_validate(nvc0->base.pushbuf);
- if (unlikely(ret))
- return FALSE;
- if (unlikely(nvc0->state.flushed))
+ if (unlikely(nvc0->state.flushed)) {
+ nvc0->state.flushed = FALSE;
nvc0_bufctx_fence(nvc0, nvc0->bufctx_3d, TRUE);
-
- return TRUE;
+ }
+ return !ret;
}
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Mesa (master): nvc0: delete compute object on screen destruction
Module: Mesa Branch: master Commit: 7fe159ba7442b4558d4d06ad8c236ae565f5e5d8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7fe159ba7442b4558d4d06ad8c236ae565f5e5d8 Author: Christoph Bumiller Date: Sun May 12 16:42:45 2013 +0200 nvc0: delete compute object on screen destruction Cc: "9.2" --- src/gallium/drivers/nvc0/nvc0_screen.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c b/src/gallium/drivers/nvc0/nvc0_screen.c index 93a2902..1de07ff 100644 --- a/src/gallium/drivers/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nvc0/nvc0_screen.c @@ -361,6 +361,7 @@ nvc0_screen_destroy(struct pipe_screen *pscreen) nouveau_object_del(&screen->eng3d); nouveau_object_del(&screen->eng2d); nouveau_object_del(&screen->m2mf); + nouveau_object_del(&screen->compute); nouveau_screen_fini(&screen->base); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nvc0: don't use bufctx in nvc0_cb_push
Module: Mesa
Branch: master
Commit: 1048d89907b3a11e695b2c44d1966fb4e61b1b77
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1048d89907b3a11e695b2c44d1966fb4e61b1b77
Author: Christoph Bumiller
Date: Mon Jun 17 18:47:21 2013 +0200
nvc0: don't use bufctx in nvc0_cb_push
Too many calls into libdrm when a single one is enough.
---
src/gallium/drivers/nvc0/nvc0_transfer.c | 10 +++---
1 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/nvc0/nvc0_transfer.c
b/src/gallium/drivers/nvc0/nvc0_transfer.c
index 3f87662..a0333a3 100644
--- a/src/gallium/drivers/nvc0/nvc0_transfer.c
+++ b/src/gallium/drivers/nvc0/nvc0_transfer.c
@@ -505,13 +505,13 @@ nvc0_miptree_transfer_unmap(struct pipe_context *pctx,
FREE(tx);
}
+/* This happens rather often with DTD9/st. */
void
nvc0_cb_push(struct nouveau_context *nv,
struct nouveau_bo *bo, unsigned domain,
unsigned base, unsigned size,
unsigned offset, unsigned words, const uint32_t *data)
{
- struct nouveau_bufctx *bctx = nvc0_context(&nv->pipe)->bufctx;
struct nouveau_pushbuf *push = nv->pushbuf;
NOUVEAU_DRV_STAT(nv->screen, constbuf_upload_count, 1);
@@ -520,10 +520,6 @@ nvc0_cb_push(struct nouveau_context *nv,
assert(!(offset & 3));
size = align(size, 0x100);
- nouveau_bufctx_refn(bctx, 0, bo, NOUVEAU_BO_WR | domain);
- nouveau_pushbuf_bufctx(push, bctx);
- nouveau_pushbuf_validate(push);
-
BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
PUSH_DATA (push, size);
PUSH_DATAh(push, bo->offset + base);
@@ -534,6 +530,8 @@ nvc0_cb_push(struct nouveau_context *nv,
nr = MIN2(nr, words);
nr = MIN2(nr, NV04_PFIFO_MAX_PACKET_LEN - 1);
+ PUSH_SPACE(push, nr + 2);
+ PUSH_REFN (push, bo, NOUVEAU_BO_WR | domain);
BEGIN_1IC0(push, NVC0_3D(CB_POS), nr + 1);
PUSH_DATA (push, offset);
PUSH_DATAp(push, data, nr);
@@ -542,8 +540,6 @@ nvc0_cb_push(struct nouveau_context *nv,
data += nr;
offset += nr * 4;
}
-
- nouveau_bufctx_reset(bctx, 0);
}
void
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Mesa (master): nvc0: fix blitctx memory leak
Module: Mesa
Branch: master
Commit: 2a7762bdb62faa1d54c445fcec7733cf6f690ac5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2a7762bdb62faa1d54c445fcec7733cf6f690ac5
Author: Joakim Sindholt
Date: Sun May 12 16:17:00 2013 +0200
nvc0: fix blitctx memory leak
Cc: "9.2 and 9.1"
---
src/gallium/drivers/nvc0/nvc0_context.c |1 +
src/gallium/drivers/nvc0/nvc0_context.h |1 +
src/gallium/drivers/nvc0/nvc0_surface.c |7 +++
3 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/nvc0/nvc0_context.c
b/src/gallium/drivers/nvc0/nvc0_context.c
index bf0c204..f7cfe59 100644
--- a/src/gallium/drivers/nvc0/nvc0_context.c
+++ b/src/gallium/drivers/nvc0/nvc0_context.c
@@ -111,6 +111,7 @@ nvc0_destroy(struct pipe_context *pipe)
nouveau_pushbuf_kick(nvc0->base.pushbuf, nvc0->base.pushbuf->channel);
nvc0_context_unreference_resources(nvc0);
+ nvc0_blitctx_destroy(nvc0);
#ifdef NVC0_WITH_DRAW_MODULE
draw_destroy(nvc0->draw);
diff --git a/src/gallium/drivers/nvc0/nvc0_context.h
b/src/gallium/drivers/nvc0/nvc0_context.h
index 2c84cdf..a175f0a 100644
--- a/src/gallium/drivers/nvc0/nvc0_context.h
+++ b/src/gallium/drivers/nvc0/nvc0_context.h
@@ -96,6 +96,7 @@
struct nvc0_blitctx;
boolean nvc0_blitctx_create(struct nvc0_context *);
+void nvc0_blitctx_destroy(struct nvc0_context *);
struct nvc0_context {
struct nouveau_context base;
diff --git a/src/gallium/drivers/nvc0/nvc0_surface.c
b/src/gallium/drivers/nvc0/nvc0_surface.c
index c8d26f5..606a2b5 100644
--- a/src/gallium/drivers/nvc0/nvc0_surface.c
+++ b/src/gallium/drivers/nvc0/nvc0_surface.c
@@ -1247,6 +1247,13 @@ nvc0_blitctx_create(struct nvc0_context *nvc0)
}
void
+nvc0_blitctx_destroy(struct nvc0_context *nvc0)
+{
+ if (nvc0->blit)
+ FREE(nvc0->blit);
+}
+
+void
nvc0_init_surface_functions(struct nvc0_context *nvc0)
{
struct pipe_context *pipe = &nvc0->base.pipe;
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Mesa (master): nvc0/ir: add f32 long immediate cannot saturate
Module: Mesa
Branch: master
Commit: 53992060564bd66f167342e0864cee9406147b04
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=53992060564bd66f167342e0864cee9406147b04
Author: Christoph Bumiller
Date: Sun Jun 30 15:23:15 2013 +0200
nvc0/ir: add f32 long immediate cannot saturate
Cc: "9.2"
---
.../drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp
b/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp
index 2dd7fd2..4ee1a67 100644
--- a/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_target_nvc0.cpp
@@ -337,6 +337,11 @@ TargetNVC0::insnCanLoad(const Instruction *i, int s,
// (except if we implement more constraints)
if (ld->getSrc(0)->asImm()->reg.data.u32 & 0xfff)
return false;
+ } else
+ if (i->op == OP_ADD && i->sType == TYPE_F32) {
+ // add f32 LIMM cannot saturate
+ if (i->saturate && (reg.data.u32 & 0xfff))
+return false;
}
}
@@ -431,6 +436,13 @@ TargetNVC0::isSatSupported(const Instruction *insn) const
if (insn->dType == TYPE_U32)
return (insn->op == OP_ADD) || (insn->op == OP_MAD);
+ // add f32 LIMM cannot saturate
+ if (insn->op == OP_ADD && insn->sType == TYPE_F32) {
+ if (insn->getSrc(1)->asImm() &&
+ insn->getSrc(1)->reg.data.u32 & 0xfff)
+ return false;
+ }
+
return insn->dType == TYPE_F32;
}
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Mesa (master): nvc0/ir: fix use after free in texture barrier insertion pass
Module: Mesa
Branch: master
Commit: 7086636358b611a2bb124253e1fe870107e1cecb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7086636358b611a2bb124253e1fe870107e1cecb
Author: Tiziano Bacocco
Date: Tue Jul 30 22:04:49 2013 +0200
nvc0/ir: fix use after free in texture barrier insertion pass
Fixes crash with Amnesia: The Dark Descent.
Cc: "9.2 and 9.1"
---
.../drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
b/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
index 251e49b..1832e1a 100644
--- a/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
@@ -443,6 +443,7 @@ NVC0LegalizePostRA::insertTextureBarriers(Function *fn)
if (i->op == OP_TEXBAR) {
if (i->subOp >= max) {
delete_Instruction(prog, i);
+ i = NULL;
} else {
max = i->subOp;
if (prev && prev->op == OP_TEXBAR && prev->subOp >= max) {
@@ -454,7 +455,7 @@ NVC0LegalizePostRA::insertTextureBarriers(Function *fn)
if (isTextureOp(i->op)) {
max++;
}
- if (!i->isNop())
+ if (i && !i->isNop())
prev = i;
}
}
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Mesa (master): nouveau: initialise the nouveau_transfer maps
Module: Mesa Branch: master Commit: dc10251d086576a007c77b7ca7854f5fe8c7e134 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc10251d086576a007c77b7ca7854f5fe8c7e134 Author: Emil Velikov Date: Fri Aug 9 19:51:02 2013 +0100 nouveau: initialise the nouveau_transfer maps Cc: "9.2 and 9.1" Signed-off-by: Emil Velikov --- src/gallium/drivers/nouveau/nouveau_buffer.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/src/gallium/drivers/nouveau/nouveau_buffer.c b/src/gallium/drivers/nouveau/nouveau_buffer.c index 02bc6f0..3e04049 100644 --- a/src/gallium/drivers/nouveau/nouveau_buffer.c +++ b/src/gallium/drivers/nouveau/nouveau_buffer.c @@ -289,6 +289,7 @@ nouveau_buffer_cache(struct nouveau_context *nv, struct nv04_resource *buf) tx.base.box.x = 0; tx.base.box.width = buf->base.width0; tx.bo = NULL; + tx.map = NULL; if (!buf->data) if (!nouveau_buffer_malloc(buf)) @@ -690,6 +691,7 @@ nouveau_buffer_migrate(struct nouveau_context *nv, tx.base.box.x = 0; tx.base.box.width = buf->base.width0; tx.bo = NULL; + tx.map = NULL; if (!nouveau_transfer_staging(nv, &tx, FALSE)) return FALSE; nouveau_transfer_write(nv, &tx, 0, tx.base.box.width); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nv30: find first unused texcoord rather than bailing if first is used
Module: Mesa Branch: master Commit: 3282697621241e646247b85327c50747416a766b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3282697621241e646247b85327c50747416a766b Author: Ilia Mirkin Date: Sun Sep 1 12:38:52 2013 -0400 nv30: find first unused texcoord rather than bailing if first is used This fixes shaders produced by supertuxkart. Cc: "9.2" Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nv30/nvfx_fragprog.c |3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nv30/nvfx_fragprog.c b/src/gallium/drivers/nv30/nvfx_fragprog.c index 1231862..a734330 100644 --- a/src/gallium/drivers/nv30/nvfx_fragprog.c +++ b/src/gallium/drivers/nv30/nvfx_fragprog.c @@ -976,9 +976,8 @@ nvfx_fragprog_assign_generic(struct nv30_context *nvfx, struct nvfx_fpc *fpc, fpc->r_input[idx] = nvfx_reg(NVFXSR_INPUT, hw); return TRUE; } - return FALSE; } - return TRUE; + return FALSE; default: return TRUE; } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): i965/fs: Gen4: Zero out extra coordinates when using shadow compare
Module: Mesa
Branch: master
Commit: f35dea05b1329b9303a11fb803897fb189ff99b4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f35dea05b1329b9303a11fb803897fb189ff99b4
Author: Chris Forbes
Date: Tue Aug 27 19:35:49 2013 +1200
i965/fs: Gen4: Zero out extra coordinates when using shadow compare
Fixes broken rendering if these MRFs contained anything other than zero.
NOTE: This is a candidate for stable branches.
Signed-off-by: Chris Forbes
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index b049436..1e01d39 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -876,7 +876,13 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst,
fs_reg coordinate,
emit(MOV(fs_reg(MRF, base_mrf + mlen + i), coordinate));
coordinate.reg_offset++;
}
- /* gen4's SIMD8 sampler always has the slots for u,v,r present. */
+
+ /* gen4's SIMD8 sampler always has the slots for u,v,r present.
+ * the unused slots must be zeroed.
+ */
+ for (int i = ir->coordinate->type->vector_elements; i < 3; i++) {
+ emit(MOV(fs_reg(MRF, base_mrf + mlen + i), fs_reg(0.0f)));
+ }
mlen += 3;
if (ir->op == ir_tex) {
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