Mesa (master): st/mesa: refactor some bitmap drawing code

[Brian Paul]

Module: Mesa
Branch: master
Commit: 130d34ce65785e27ed3aa8bb9fa9b76995ea61da
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=130d34ce65785e27ed3aa8bb9fa9b76995ea61da

Author: Brian Paul 
Date:   Tue Feb  2 17:12:46 2016 -0700

st/mesa: refactor some bitmap drawing code

Move setup/restoration of rendering state into helper functions.
This makes the draw_bitmap_quad() function much more concise.

Reviewed-by: Nicolai Hähnle 

---

 src/mesa/state_tracker/st_cb_bitmap.c | 90 ++-
 1 file changed, 57 insertions(+), 33 deletions(-)

diff --git a/src/mesa/state_tracker/st_cb_bitmap.c 
b/src/mesa/state_tracker/st_cb_bitmap.c
index 87c606a..31f57c4 100644
--- a/src/mesa/state_tracker/st_cb_bitmap.c
+++ b/src/mesa/state_tracker/st_cb_bitmap.c
@@ -248,24 +248,18 @@ setup_bitmap_vertex_data(struct st_context *st, bool 
normalized,
 }
 
 
-
 /**
- * Render a glBitmap by drawing a textured quad
+ * Setup pipeline state prior to rendering the bitmap textured quad.
  */
 static void
-draw_bitmap_quad(struct gl_context *ctx, GLint x, GLint y, GLfloat z,
- GLsizei width, GLsizei height,
- struct pipe_sampler_view *sv,
- const GLfloat *color)
+setup_render_state(struct gl_context *ctx,
+   struct pipe_sampler_view *sv,
+   const GLfloat *color)
 {
struct st_context *st = st_context(ctx);
-   struct pipe_context *pipe = st->pipe;
struct cso_context *cso = st->cso_context;
struct st_fp_variant *fpv;
struct st_fp_variant_key key;
-   GLuint maxSize;
-   GLuint offset;
-   struct pipe_resource *vbuf = NULL;
 
memset(, 0, sizeof(key));
key.st = st->has_shareable_shaders ? NULL : st;
@@ -291,16 +285,6 @@ draw_bitmap_quad(struct gl_context *ctx, GLint x, GLint y, 
GLfloat z,
   COPY_4V(ctx->Current.Attrib[VERT_ATTRIB_COLOR0], colorSave);
}
 
-
-   /* limit checks */
-   /* XXX if the bitmap is larger than the max texture size, break
-* it up into chunks.
-*/
-   maxSize = 1 << (pipe->screen->get_param(pipe->screen,
-PIPE_CAP_MAX_TEXTURE_2D_LEVELS) - 1);
-   assert(width <= (GLsizei)maxSize);
-   assert(height <= (GLsizei)maxSize);
-
cso_save_rasterizer(cso);
cso_save_fragment_samplers(cso);
cso_save_fragment_sampler_views(cso);
@@ -372,6 +356,58 @@ draw_bitmap_quad(struct gl_context *ctx, GLint x, GLint y, 
GLfloat z,
 
cso_set_vertex_elements(cso, 3, st->velems_util_draw);
cso_set_stream_outputs(st->cso_context, 0, NULL, NULL);
+}
+
+
+/**
+ * Restore pipeline state after rendering the bitmap textured quad.
+ */
+static void
+restore_render_state(struct gl_context *ctx)
+{
+   struct st_context *st = st_context(ctx);
+   struct cso_context *cso = st->cso_context;
+
+   cso_restore_rasterizer(cso);
+   cso_restore_fragment_samplers(cso);
+   cso_restore_fragment_sampler_views(cso);
+   cso_restore_viewport(cso);
+   cso_restore_fragment_shader(cso);
+   cso_restore_vertex_shader(cso);
+   cso_restore_tessctrl_shader(cso);
+   cso_restore_tesseval_shader(cso);
+   cso_restore_geometry_shader(cso);
+   cso_restore_vertex_elements(cso);
+   cso_restore_aux_vertex_buffer_slot(cso);
+   cso_restore_stream_outputs(cso);
+}
+
+
+/**
+ * Render a glBitmap by drawing a textured quad
+ */
+static void
+draw_bitmap_quad(struct gl_context *ctx, GLint x, GLint y, GLfloat z,
+ GLsizei width, GLsizei height,
+ struct pipe_sampler_view *sv,
+ const GLfloat *color)
+{
+   struct st_context *st = st_context(ctx);
+   struct pipe_context *pipe = st->pipe;
+   struct pipe_resource *vbuf = NULL;
+   GLuint maxSize;
+   GLuint offset;
+
+   /* limit checks */
+   /* XXX if the bitmap is larger than the max texture size, break
+* it up into chunks.
+*/
+   maxSize = 1 << (pipe->screen->get_param(pipe->screen,
+PIPE_CAP_MAX_TEXTURE_2D_LEVELS) - 1);
+   assert(width <= (GLsizei)maxSize);
+   assert(height <= (GLsizei)maxSize);
+
+   setup_render_state(ctx, sv, color);
 
/* convert Z from [0,1] to [-1,-1] to match viewport Z scale/bias */
z = z * 2.0f - 1.0f;
@@ -389,19 +425,7 @@ draw_bitmap_quad(struct gl_context *ctx, GLint x, GLint y, 
GLfloat z,
   3); /* attribs/vert */
}
 
-   /* restore state */
-   cso_restore_rasterizer(cso);
-   cso_restore_fragment_samplers(cso);
-   cso_restore_fragment_sampler_views(cso);
-   cso_restore_viewport(cso);
-   cso_restore_fragment_shader(cso);
-   cso_restore_vertex_shader(cso);
-   cso_restore_tessctrl_shader(cso);
-   cso_restore_tesseval_shader(cso);
-   cso_restore_geometry_shader(cso);
-   cso_restore_vertex_elements(cso);
-   cso_restore_aux_vertex_buffer_slot(cso);
-   cso_restore_stream_outputs(cso);
+   restore_render_state(ctx);
 
pipe_resource_reference(, NULL);
 

___

Mesa (master): st/mesa: move the setup_bitmap_vertex_data() code into draw_bitmap_quad()

[Brian Paul]

Module: Mesa
Branch: master
Commit: a5799de3dc8ddf0e90c2e64438664df3ce84f5ae
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a5799de3dc8ddf0e90c2e64438664df3ce84f5ae

Author: Brian Paul 
Date:   Tue Feb  2 17:24:34 2016 -0700

st/mesa: move the setup_bitmap_vertex_data() code into draw_bitmap_quad()

Now all the code to setup the vertex data and draw it is in one place.

Reviewed-by: Nicolai Hähnle 

---

 src/mesa/state_tracker/st_cb_bitmap.c | 168 --
 1 file changed, 78 insertions(+), 90 deletions(-)

diff --git a/src/mesa/state_tracker/st_cb_bitmap.c 
b/src/mesa/state_tracker/st_cb_bitmap.c
index 31f57c4..c26ee7f 100644
--- a/src/mesa/state_tracker/st_cb_bitmap.c
+++ b/src/mesa/state_tracker/st_cb_bitmap.c
@@ -176,77 +176,6 @@ make_bitmap_texture(struct gl_context *ctx, GLsizei width, 
GLsizei height,
return pt;
 }
 
-static void
-setup_bitmap_vertex_data(struct st_context *st, bool normalized,
- int x, int y, int width, int height,
- float z, const float color[4],
-struct pipe_resource **vbuf,
-unsigned *vbuf_offset)
-{
-   const GLfloat fb_width = (GLfloat)st->state.framebuffer.width;
-   const GLfloat fb_height = (GLfloat)st->state.framebuffer.height;
-   const GLfloat x0 = (GLfloat)x;
-   const GLfloat x1 = (GLfloat)(x + width);
-   const GLfloat y0 = (GLfloat)y;
-   const GLfloat y1 = (GLfloat)(y + height);
-   GLfloat sLeft = (GLfloat)0.0, sRight = (GLfloat)1.0;
-   GLfloat tTop = (GLfloat)0.0, tBot = (GLfloat)1.0 - tTop;
-   const GLfloat clip_x0 = (GLfloat)(x0 / fb_width * 2.0 - 1.0);
-   const GLfloat clip_y0 = (GLfloat)(y0 / fb_height * 2.0 - 1.0);
-   const GLfloat clip_x1 = (GLfloat)(x1 / fb_width * 2.0 - 1.0);
-   const GLfloat clip_y1 = (GLfloat)(y1 / fb_height * 2.0 - 1.0);
-   GLuint i;
-   float (*vertices)[3][4];  /**< vertex pos + color + texcoord */
-
-   if (!normalized) {
-  sRight = (GLfloat) width;
-  tBot = (GLfloat) height;
-   }
-
-   u_upload_alloc(st->uploader, 0, 4 * sizeof(vertices[0]), 4,
-  vbuf_offset, vbuf, (void **) );
-   if (!*vbuf) {
-  return;
-   }
-
-   /* Positions are in clip coords since we need to do clipping in case
-* the bitmap quad goes beyond the window bounds.
-*/
-   vertices[0][0][0] = clip_x0;
-   vertices[0][0][1] = clip_y0;
-   vertices[0][2][0] = sLeft;
-   vertices[0][2][1] = tTop;
-
-   vertices[1][0][0] = clip_x1;
-   vertices[1][0][1] = clip_y0;
-   vertices[1][2][0] = sRight;
-   vertices[1][2][1] = tTop;
-   
-   vertices[2][0][0] = clip_x1;
-   vertices[2][0][1] = clip_y1;
-   vertices[2][2][0] = sRight;
-   vertices[2][2][1] = tBot;
-   
-   vertices[3][0][0] = clip_x0;
-   vertices[3][0][1] = clip_y1;
-   vertices[3][2][0] = sLeft;
-   vertices[3][2][1] = tBot;
-   
-   /* same for all verts: */
-   for (i = 0; i < 4; i++) {
-  vertices[i][0][2] = z;
-  vertices[i][0][3] = 1.0f;
-  vertices[i][1][0] = color[0];
-  vertices[i][1][1] = color[1];
-  vertices[i][1][2] = color[2];
-  vertices[i][1][3] = color[3];
-  vertices[i][2][2] = 0.0; /*R*/
-  vertices[i][2][3] = 1.0; /*Q*/
-   }
-
-   u_upload_unmap(st->uploader);
-}
-
 
 /**
  * Setup pipeline state prior to rendering the bitmap textured quad.
@@ -395,36 +324,95 @@ draw_bitmap_quad(struct gl_context *ctx, GLint x, GLint 
y, GLfloat z,
struct st_context *st = st_context(ctx);
struct pipe_context *pipe = st->pipe;
struct pipe_resource *vbuf = NULL;
-   GLuint maxSize;
-   GLuint offset;
+   const float fb_width = (float) st->state.framebuffer.width;
+   const float fb_height = (float) st->state.framebuffer.height;
+   const float x0 = (float) x;
+   const float x1 = (float) (x + width);
+   const float y0 = (float) y;
+   const float y1 = (float) (y + height);
+   float sLeft = 0.0f, sRight = 1.0f;
+   float tTop = 0.0f, tBot = 1.0f - tTop;
+   const float clip_x0 = x0 / fb_width * 2.0f - 1.0f;
+   const float clip_y0 = y0 / fb_height * 2.0f - 1.0f;
+   const float clip_x1 = x1 / fb_width * 2.0f - 1.0f;
+   const float clip_y1 = y1 / fb_height * 2.0f - 1.0f;
+   float (*vertices)[3][4];  /**< vertex pos + color + texcoord */
+   unsigned offset, i;
 
/* limit checks */
-   /* XXX if the bitmap is larger than the max texture size, break
-* it up into chunks.
-*/
-   maxSize = 1 << (pipe->screen->get_param(pipe->screen,
+   {
+  /* XXX if the bitmap is larger than the max texture size, break
+   * it up into chunks.
+   */
+  GLuint maxSize = 1 << (pipe->screen->get_param(pipe->screen,
 PIPE_CAP_MAX_TEXTURE_2D_LEVELS) - 1);
-   assert(width <= (GLsizei)maxSize);
-   assert(height <= (GLsizei)maxSize);
+  assert(width <= (GLsizei) maxSize);
+  assert(height <= (GLsizei) maxSize);
+   }
 
setup_render_state(ctx, sv, color);
 
/* convert Z from [0,1] 

Mesa (master): mesa: whitespace clean-ups in dlist.h

[Brian Paul]

Module: Mesa
Branch: master
Commit: b1ddc03633c3bff7e81964ef0c4419cf66d40e02
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b1ddc03633c3bff7e81964ef0c4419cf66d40e02

Author: Brian Paul 
Date:   Mon Feb  8 11:29:07 2016 -0700

mesa: whitespace clean-ups in dlist.h

And remove 'extern' qualifiers.

---

 src/mesa/main/dlist.h | 47 +++
 1 file changed, 31 insertions(+), 16 deletions(-)

diff --git a/src/mesa/main/dlist.h b/src/mesa/main/dlist.h
index a121467..7a23208 100644
--- a/src/mesa/main/dlist.h
+++ b/src/mesa/main/dlist.h
@@ -38,46 +38,61 @@
 
 GLboolean GLAPIENTRY
 _mesa_IsList(GLuint list);
+
 void GLAPIENTRY
 _mesa_DeleteLists(GLuint list, GLsizei range);
+
 GLuint GLAPIENTRY
 _mesa_GenLists(GLsizei range);
+
 void GLAPIENTRY
 _mesa_NewList(GLuint name, GLenum mode);
+
 void GLAPIENTRY
 _mesa_EndList(void);
+
 void GLAPIENTRY
-_mesa_CallList( GLuint list );
+_mesa_CallList(GLuint list);
+
 void GLAPIENTRY
-_mesa_CallLists( GLsizei n, GLenum type, const GLvoid *lists );
+_mesa_CallLists(GLsizei n, GLenum type, const GLvoid *lists);
+
 void GLAPIENTRY
 _mesa_ListBase(GLuint base);
 
-extern struct gl_display_list *
+struct gl_display_list *
 _mesa_lookup_list(struct gl_context *ctx, GLuint list);
 
-extern void _mesa_compile_error( struct gl_context *ctx, GLenum error, const 
char *s );
+void
+_mesa_compile_error(struct gl_context *ctx, GLenum error, const char *s);
 
-extern void *_mesa_dlist_alloc(struct gl_context *ctx, GLuint opcode, GLuint 
sz);
+void *
+_mesa_dlist_alloc(struct gl_context *ctx, GLuint opcode, GLuint sz);
 
-extern void *
+void *
 _mesa_dlist_alloc_aligned(struct gl_context *ctx, GLuint opcode, GLuint bytes);
 
-extern GLint _mesa_dlist_alloc_opcode( struct gl_context *ctx, GLuint sz,
-   void (*execute)( struct gl_context *, 
void * ),
-   void (*destroy)( struct gl_context *, 
void * ),
-   void (*print)( struct gl_context *, 
void *, FILE * ) );
+GLint
+_mesa_dlist_alloc_opcode(struct gl_context *ctx, GLuint sz,
+ void (*execute)(struct gl_context *, void *),
+ void (*destroy)(struct gl_context *, void *),
+ void (*print)(struct gl_context *, void *, FILE *));
 
-extern void _mesa_delete_list(struct gl_context *ctx, struct gl_display_list 
*dlist);
+void
+_mesa_delete_list(struct gl_context *ctx, struct gl_display_list *dlist);
 
-extern void _mesa_initialize_save_table(const struct gl_context *);
+void
+_mesa_initialize_save_table(const struct gl_context *);
 
-extern void _mesa_install_dlist_vtxfmt(struct _glapi_table *disp,
-   const GLvertexformat *vfmt);
+void
+_mesa_install_dlist_vtxfmt(struct _glapi_table *disp,
+   const GLvertexformat *vfmt);
 
-extern void _mesa_init_display_list( struct gl_context * ctx );
+void
+_mesa_init_display_list(struct gl_context * ctx);
 
-extern void _mesa_free_display_list_data(struct gl_context *ctx);
+void
+_mesa_free_display_list_data(struct gl_context *ctx);
 
 
 #endif /* DLIST_H */

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Mesa (master): mesa: rewrite save_CallLists() code

[Brian Paul]

Module: Mesa
Branch: master
Commit: 0193e20df531039e89de089bdb33abd4e2095e19
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0193e20df531039e89de089bdb33abd4e2095e19

Author: Brian Paul 
Date:   Mon Feb  8 17:50:23 2016 -0700

mesa: rewrite save_CallLists() code

When glCallLists() is compiled into a display list, preserve the call
as a single glCallLists rather than 'n' glCallList calls.  This will
matter for an upcoming display list optimization project.

Reviewed-by: Ian Romanick 

---

 src/mesa/main/dlist.c | 61 +--
 1 file changed, 35 insertions(+), 26 deletions(-)

diff --git a/src/mesa/main/dlist.c b/src/mesa/main/dlist.c
index 65f0929..fb31d2f 100644
--- a/src/mesa/main/dlist.c
+++ b/src/mesa/main/dlist.c
@@ -194,7 +194,7 @@ typedef enum
OPCODE_BLEND_FUNC_SEPARATE_I,
 
OPCODE_CALL_LIST,
-   OPCODE_CALL_LIST_OFFSET,
+   OPCODE_CALL_LISTS,
OPCODE_CLEAR,
OPCODE_CLEAR_ACCUM,
OPCODE_CLEAR_COLOR,
@@ -706,6 +706,10 @@ _mesa_delete_list(struct gl_context *ctx, struct 
gl_display_list *dlist)
 free(get_pointer([10]));
 n += InstSize[n[0].opcode];
 break;
+ case OPCODE_CALL_LISTS:
+free(get_pointer([3]));
+n += InstSize[n[0].opcode];
+break;
  case OPCODE_DRAW_PIXELS:
 free(get_pointer([5]));
 n += InstSize[n[0].opcode];
@@ -1569,37 +1573,49 @@ static void GLAPIENTRY
 save_CallLists(GLsizei num, GLenum type, const GLvoid * lists)
 {
GET_CURRENT_CONTEXT(ctx);
-   GLint i;
-   GLboolean typeErrorFlag;
+   unsigned type_size;
+   Node *n;
+   void *lists_copy;
 
SAVE_FLUSH_VERTICES(ctx);
 
switch (type) {
case GL_BYTE:
case GL_UNSIGNED_BYTE:
+  type_size = 1;
+  break;
case GL_SHORT:
case GL_UNSIGNED_SHORT:
+   case GL_2_BYTES:
+  type_size = 2;
+  break;
+   case GL_3_BYTES:
+  type_size = 3;
+  break;
case GL_INT:
case GL_UNSIGNED_INT:
case GL_FLOAT:
-   case GL_2_BYTES:
-   case GL_3_BYTES:
case GL_4_BYTES:
-  typeErrorFlag = GL_FALSE;
+  type_size = 4;
   break;
default:
-  typeErrorFlag = GL_TRUE;
+  type_size = 0;
}
 
-   for (i = 0; i < num; i++) {
-  GLint list = translate_id(i, type, lists);
-  Node *n = alloc_instruction(ctx, OPCODE_CALL_LIST_OFFSET, 2);
-  if (n) {
- n[1].i = list;
- n[2].b = typeErrorFlag;
-  }
+   if (num > 0 && type_size > 0) {
+  /* create a copy of the array of list IDs to save in the display list */
+  lists_copy = memdup(lists, num * type_size);
+   } else {
+  lists_copy = NULL;
}
 
+   n = alloc_instruction(ctx, OPCODE_CALL_LISTS, 2 + POINTER_DWORDS);
+   if (n) {
+  n[1].i = num;
+  n[2].e = type;
+  save_pointer([3], lists_copy);
+   };
+
/* After this, we don't know what state we're in.  Invalidate all
 * cached information previously gathered:
 */
@@ -7772,15 +7788,9 @@ execute_list(struct gl_context *ctx, GLuint list)
execute_list(ctx, n[1].ui);
 }
 break;
- case OPCODE_CALL_LIST_OFFSET:
-/* Generated by glCallLists() so we must add ListBase */
-if (n[2].b) {
-   /* user specified a bad data type at compile time */
-   _mesa_error(ctx, GL_INVALID_ENUM, "glCallLists(type)");
-}
-else if (ctx->ListState.CallDepth < MAX_LIST_NESTING) {
-   GLuint list = (GLuint) (ctx->List.ListBase + n[1].i);
-   execute_list(ctx, list);
+ case OPCODE_CALL_LISTS:
+if (ctx->ListState.CallDepth < MAX_LIST_NESTING) {
+   CALL_CallLists(ctx->Exec, (n[1].i, n[2].e, get_pointer([3])));
 }
 break;
  case OPCODE_CLEAR:
@@ -9736,9 +9746,8 @@ print_list(struct gl_context *ctx, GLuint list, const 
char *fname)
  case OPCODE_CALL_LIST:
 fprintf(f, "CallList %d\n", (int) n[1].ui);
 break;
- case OPCODE_CALL_LIST_OFFSET:
-fprintf(f, "CallList %d + offset %u = %u\n", (int) n[1].ui,
- ctx->List.ListBase, ctx->List.ListBase + n[1].ui);
+ case OPCODE_CALL_LISTS:
+fprintf(f, "CallLists %d, %s\n", n[1].i, enum_string(n[1].e));
 break;
  case OPCODE_DISABLE:
 fprintf(f, "Disable %s\n", enum_string(n[1].e));

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Mesa (master): draw: use util_pstipple_* function for stipple pattern textures and samplers

[Nicolai Hähnle]

Module: Mesa
Branch: master
Commit: c260175677c20ed4f11a6679c45391783d07aaeb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c260175677c20ed4f11a6679c45391783d07aaeb

Author: Nicolai Hähnle 
Date:   Thu Jan 21 16:10:11 2016 -0500

draw: use util_pstipple_* function for stipple pattern textures and samplers

This reduces code duplication.

Suggested-by: Jose Fonseca 
Reviewed-by: Brian Paul 
Reviewed-by: Jose Fonseca 

---

 src/gallium/auxiliary/draw/draw_pipe_pstipple.c | 121 +++-
 src/gallium/auxiliary/util/u_pstipple.c |   4 +-
 src/gallium/auxiliary/util/u_pstipple.h |   5 +
 3 files changed, 18 insertions(+), 112 deletions(-)

diff --git a/src/gallium/auxiliary/draw/draw_pipe_pstipple.c 
b/src/gallium/auxiliary/draw/draw_pipe_pstipple.c
index e468cc3..0298334 100644
--- a/src/gallium/auxiliary/draw/draw_pipe_pstipple.c
+++ b/src/gallium/auxiliary/draw/draw_pipe_pstipple.c
@@ -153,113 +153,6 @@ generate_pstip_fs(struct pstip_stage *pstip)
 
 
 /**
- * Load texture image with current stipple pattern.
- */
-static void
-pstip_update_texture(struct pstip_stage *pstip)
-{
-   static const uint bit31 = 1 << 31;
-   struct pipe_context *pipe = pstip->pipe;
-   struct pipe_transfer *transfer;
-   const uint *stipple = pstip->state.stipple->stipple;
-   uint i, j;
-   ubyte *data;
-
-   data = pipe_transfer_map(pipe, pstip->texture, 0, 0,
-PIPE_TRANSFER_WRITE, 0, 0, 32, 32, );
-
-   /*
-* Load alpha texture.
-* Note: 0 means keep the fragment, 255 means kill it.
-* We'll negate the texel value and use KILL_IF which kills if value
-* is negative.
-*/
-   for (i = 0; i < 32; i++) {
-  for (j = 0; j < 32; j++) {
- if (stipple[i] & (bit31 >> j)) {
-/* fragment "on" */
-data[i * transfer->stride + j] = 0;
- }
- else {
-/* fragment "off" */
-data[i * transfer->stride + j] = 255;
- }
-  }
-   }
-
-   /* unmap */
-   pipe_transfer_unmap(pipe, transfer);
-}
-
-
-/**
- * Create the texture map we'll use for stippling.
- */
-static boolean
-pstip_create_texture(struct pstip_stage *pstip)
-{
-   struct pipe_context *pipe = pstip->pipe;
-   struct pipe_screen *screen = pipe->screen;
-   struct pipe_resource texTemp;
-   struct pipe_sampler_view viewTempl;
-
-   memset(, 0, sizeof(texTemp));
-   texTemp.target = PIPE_TEXTURE_2D;
-   texTemp.format = PIPE_FORMAT_A8_UNORM; /* XXX verify supported by driver! */
-   texTemp.last_level = 0;
-   texTemp.width0 = 32;
-   texTemp.height0 = 32;
-   texTemp.depth0 = 1;
-   texTemp.array_size = 1;
-   texTemp.bind = PIPE_BIND_SAMPLER_VIEW;
-
-   pstip->texture = screen->resource_create(screen, );
-   if (pstip->texture == NULL)
-  return FALSE;
-
-   u_sampler_view_default_template(,
-   pstip->texture,
-   pstip->texture->format);
-   pstip->sampler_view = pipe->create_sampler_view(pipe,
-   pstip->texture,
-   );
-   if (!pstip->sampler_view) {
-  return FALSE;
-   }
-
-   return TRUE;
-}
-
-
-/**
- * Create the sampler CSO that'll be used for stippling.
- */
-static boolean
-pstip_create_sampler(struct pstip_stage *pstip)
-{
-   struct pipe_sampler_state sampler;
-   struct pipe_context *pipe = pstip->pipe;
-
-   memset(, 0, sizeof(sampler));
-   sampler.wrap_s = PIPE_TEX_WRAP_REPEAT;
-   sampler.wrap_t = PIPE_TEX_WRAP_REPEAT;
-   sampler.wrap_r = PIPE_TEX_WRAP_REPEAT;
-   sampler.min_mip_filter = PIPE_TEX_MIPFILTER_NONE;
-   sampler.min_img_filter = PIPE_TEX_FILTER_NEAREST;
-   sampler.mag_img_filter = PIPE_TEX_FILTER_NEAREST;
-   sampler.normalized_coords = 1;
-   sampler.min_lod = 0.0f;
-   sampler.max_lod = 0.0f;
-
-   pstip->sampler_cso = pipe->create_sampler_state(pipe, );
-   if (pstip->sampler_cso == NULL)
-  return FALSE;
-   
-   return TRUE;
-}
-
-
-/**
  * When we're about to draw our first stipple polygon in a batch, this function
  * is called to tell the driver to bind our modified fragment shader.
  */
@@ -537,7 +430,8 @@ pstip_set_polygon_stipple(struct pipe_context *pipe,
/* pass-through */
pstip->driver_set_polygon_stipple(pstip->pipe, stipple);
 
-   pstip_update_texture(pstip);
+   util_pstipple_update_stipple_texture(pstip->pipe, pstip->texture,
+pstip->state.stipple->stipple);
 }
 
 
@@ -573,10 +467,17 @@ draw_install_pstipple_stage(struct draw_context *draw,
pstip->driver_set_polygon_stipple = pipe->set_polygon_stipple;
 
/* create special texture, sampler state */
-   if (!pstip_create_texture(pstip))
+   pstip->texture = util_pstipple_create_stipple_texture(pipe, NULL);
+   if (!pstip->texture)
+  goto fail;
+
+   pstip->sampler_view = 

Mesa (master): draw: use util_pstipple_create_fragment_shader

[Nicolai Hähnle]

Module: Mesa
Branch: master
Commit: 452e51bf1ea6d6896f944192d40547f334f09676
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=452e51bf1ea6d6896f944192d40547f334f09676

Author: Nicolai Hähnle 
Date:   Thu Jan 21 16:03:17 2016 -0500

draw: use util_pstipple_create_fragment_shader

This reduces code duplication. It also adds support for drivers where the
fragment position is a system value.

Suggested-by: Jose Fonseca 
Reviewed-by: Brian Paul 
Reviewed-by: Jose Fonseca 

---

 src/gallium/auxiliary/draw/draw_pipe_pstipple.c | 209 ++--
 1 file changed, 12 insertions(+), 197 deletions(-)

diff --git a/src/gallium/auxiliary/draw/draw_pipe_pstipple.c 
b/src/gallium/auxiliary/draw/draw_pipe_pstipple.c
index cf52ca4..e468cc3 100644
--- a/src/gallium/auxiliary/draw/draw_pipe_pstipple.c
+++ b/src/gallium/auxiliary/draw/draw_pipe_pstipple.c
@@ -43,10 +43,10 @@
 #include "util/u_format.h"
 #include "util/u_math.h"
 #include "util/u_memory.h"
+#include "util/u_pstipple.h"
 #include "util/u_sampler.h"
 
 #include "tgsi/tgsi_transform.h"
-#include "tgsi/tgsi_dump.h"
 
 #include "draw_context.h"
 #include "draw_pipe.h"
@@ -114,178 +114,6 @@ struct pstip_stage
 };
 
 
-
-/**
- * Subclass of tgsi_transform_context, used for transforming the
- * user's fragment shader to add the extra texture sample and fragment kill
- * instructions.
- */
-struct pstip_transform_context {
-   struct tgsi_transform_context base;
-   uint tempsUsed;  /**< bitmask */
-   int wincoordInput;
-   int maxInput;
-   uint samplersUsed;  /**< bitfield of samplers used */
-   bool hasSview;
-   int freeSampler;  /** an available sampler for the pstipple */
-   int texTemp;  /**< temp registers */
-   int numImmed;
-};
-
-
-/**
- * TGSI declaration transform callback.
- * Look for a free sampler, a free input attrib, and two free temp regs.
- */
-static void
-pstip_transform_decl(struct tgsi_transform_context *ctx,
- struct tgsi_full_declaration *decl)
-{
-   struct pstip_transform_context *pctx = (struct pstip_transform_context *) 
ctx;
-
-   if (decl->Declaration.File == TGSI_FILE_SAMPLER) {
-  uint i;
-  for (i = decl->Range.First;
-   i <= decl->Range.Last; i++) {
- pctx->samplersUsed |= 1 << i;
-  }
-   }
-   else if (decl->Declaration.File == TGSI_FILE_SAMPLER_VIEW) {
-  pctx->hasSview = true;
-   }
-   else if (decl->Declaration.File == TGSI_FILE_INPUT) {
-  pctx->maxInput = MAX2(pctx->maxInput, (int) decl->Range.Last);
-  if (decl->Semantic.Name == TGSI_SEMANTIC_POSITION)
- pctx->wincoordInput = (int) decl->Range.First;
-   }
-   else if (decl->Declaration.File == TGSI_FILE_TEMPORARY) {
-  uint i;
-  for (i = decl->Range.First;
-   i <= decl->Range.Last; i++) {
- pctx->tempsUsed |= (1 << i);
-  }
-   }
-
-   ctx->emit_declaration(ctx, decl);
-}
-
-
-/**
- * TGSI immediate declaration transform callback.
- * We're just counting the number of immediates here.
- */
-static void
-pstip_transform_immed(struct tgsi_transform_context *ctx,
-  struct tgsi_full_immediate *immed)
-{
-   struct pstip_transform_context *pctx = (struct pstip_transform_context *) 
ctx;
-   ctx->emit_immediate(ctx, immed); /* emit to output shader */
-   pctx->numImmed++;
-}
-
-
-/**
- * Find the lowest zero bit in the given word, or -1 if bitfield is all ones.
- */
-static int
-free_bit(uint bitfield)
-{
-   return ffs(~bitfield) - 1;
-}
-
-
-/**
- * TGSI transform prolog callback.
- */
-static void
-pstip_transform_prolog(struct tgsi_transform_context *ctx)
-{
-   struct pstip_transform_context *pctx = (struct pstip_transform_context *) 
ctx;
-   uint i;
-   int wincoordInput;
-
-   /* find free sampler */
-   pctx->freeSampler = free_bit(pctx->samplersUsed);
-   if (pctx->freeSampler >= PIPE_MAX_SAMPLERS)
-  pctx->freeSampler = PIPE_MAX_SAMPLERS - 1;
-
-   if (pctx->wincoordInput < 0)
-  wincoordInput = pctx->maxInput + 1;
-   else
-  wincoordInput = pctx->wincoordInput;
-
-   /* find one free temp reg */
-   for (i = 0; i < 32; i++) {
-  if ((pctx->tempsUsed & (1 << i)) == 0) {
-  /* found a free temp */
-  if (pctx->texTemp < 0)
- pctx->texTemp  = i;
-  else
- break;
-  }
-   }
-   assert(pctx->texTemp >= 0);
-
-   if (pctx->wincoordInput < 0) {
-  /* declare new position input reg */
-  tgsi_transform_input_decl(ctx, wincoordInput,
-TGSI_SEMANTIC_POSITION, 1,
-TGSI_INTERPOLATE_LINEAR);
-   }
-
-   /* declare new sampler */
-   tgsi_transform_sampler_decl(ctx, pctx->freeSampler);
-
-   /* if the src shader has SVIEW decl's for each SAMP decl, we
-* need to continue the trend and ensure there is a matching
-* SVIEW for the new SAMP we just created
-*/
-   if (pctx->hasSview) {
-  

Mesa (master): winsys/radeon: fix a wrong NUM_TILE_PIPES value from the kernel

[Marek Olšák]

Module: Mesa
Branch: master
Commit: 83b4d701c082bb43dc710be9ec423171ea11e8d1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=83b4d701c082bb43dc710be9ec423171ea11e8d1

Author: Marek Olšák 
Date:   Sun Feb  7 20:25:01 2016 +0100

winsys/radeon: fix a wrong NUM_TILE_PIPES value from the kernel

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94019

Tested-by: Nick Sarnie 
Reviewed-by: Michel Dänzer 

---

 src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c 
b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 35dc7e6..49c310c 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -405,6 +405,12 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
 radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
  >info.num_tile_pipes);
 
+/* The kernel returns 12 for some cards for an unknown reason.
+ * I thought this was supposed to be a power of two.
+ */
+if (ws->gen == DRV_SI && ws->info.num_tile_pipes == 12)
+ws->info.num_tile_pipes = 8;
+
 if (radeon_get_drm_value(ws->fd, RADEON_INFO_BACKEND_MAP, NULL,
   >info.r600_gb_backend_map))
 ws->info.r600_gb_backend_map_valid = TRUE;

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Mesa (master): glsl: remove unrequired forward declaration

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 6235b6913449243cec5213734881d1c5e1ccc861
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6235b6913449243cec5213734881d1c5e1ccc861

Author: Timothy Arceri 
Date:   Sat Jan 30 10:50:12 2016 +1100

glsl: remove unrequired forward declaration

This was added in 2548092ad80156a4 although I don't see why as it
was already in the linker.h header.

Reviewed-by: Kenneth Graunke 

---

 src/compiler/glsl/linker.cpp | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index a245a11..9dbb926 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -82,8 +82,6 @@
 #include "main/enums.h"
 
 
-void linker_error(gl_shader_program *, const char *, ...);
-
 namespace {
 
 /**

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Mesa (master): nir: remove unused nir_variable fields

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 1aae5e8cedcb4b9635965d784f3e3803007b2047
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1aae5e8cedcb4b9635965d784f3e3803007b2047

Author: Timothy Arceri 
Date:   Tue Feb  2 11:53:57 2016 +1100

nir: remove unused nir_variable fields

These are used in GLSL IR to removed unused varyings and match
transform feedback variables. There is no need to use these in NIR.

Reviewed-by: Kenneth Graunke 

---

 src/compiler/nir/glsl_to_nir.cpp |  2 --
 src/compiler/nir/nir.h   | 18 --
 2 files changed, 20 deletions(-)

diff --git a/src/compiler/nir/glsl_to_nir.cpp b/src/compiler/nir/glsl_to_nir.cpp
index 365fd4d..3db2775 100644
--- a/src/compiler/nir/glsl_to_nir.cpp
+++ b/src/compiler/nir/glsl_to_nir.cpp
@@ -364,8 +364,6 @@ nir_visitor::visit(ir_variable *ir)
var->data.explicit_binding = ir->data.explicit_binding;
var->data.has_initializer = ir->data.has_initializer;
var->data.location_frac = ir->data.location_frac;
-   var->data.from_named_ifc_block_array = ir->data.from_named_ifc_block_array;
-   var->data.from_named_ifc_block_nonarray = 
ir->data.from_named_ifc_block_nonarray;
 
switch (ir->data.depth_layout) {
case ir_depth_layout_none:
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 4968460..a4dbfde 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -224,24 +224,6 @@ typedef struct nir_variable {
   unsigned location_frac:2;
 
   /**
-   * Non-zero if this variable was created by lowering a named interface
-   * block which was not an array.
-   *
-   * Note that this variable and \c from_named_ifc_block_array will never
-   * both be non-zero.
-   */
-  unsigned from_named_ifc_block_nonarray:1;
-
-  /**
-   * Non-zero if this variable was created by lowering a named interface
-   * block which was an array.
-   *
-   * Note that this variable and \c from_named_ifc_block_nonarray will 
never
-   * both be non-zero.
-   */
-  unsigned from_named_ifc_block_array:1;
-
-  /**
* \brief Layout qualifier for gl_FragDepth.
*
* This is not equal to \c ir_depth_layout_none if and only if this

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Mesa (master): glsl: don't attempt to link empty program

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 76cfb472077dc83c892b4cddf7941deaa7b5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76cfb472077dc83c892b4cddf7941deaa7b5

Author: Timothy Arceri 
Date:   Mon Jan 25 21:56:18 2016 +1100

glsl: don't attempt to link empty program

Previously an empty program would go through the entire
link_shaders() function and we would have to be careful
not to cause a segfault.

In core profile also now set link_status to false by
generating an error, it was previously set to true.

From Section 7.3 (PROGRAM OBJECTS) of the OpenGL 4.5 spec:

   "Linking can fail for a variety of reasons as specified in the
   OpenGL Shading Language Specification, as well as any of the
   following reasons:

- No shader objects are attached to program."

V2: Only generate an error in core profile and add spec quote (Ian)

V3: generate error in ES too, remove previous check which was only
applying the rule to GL 4.5/ES 3.1 and above. My understand is that
this spec change is clarifying previously undefined behaviour and
therefore should be applied retrospectively. The ES CTS tests for
this are in ES 2 I suspect it was passing because it would have
generated an error for not having both a vertex and fragment shader.

Reviewed-by: Kenneth Graunke 

---

 src/compiler/glsl/linker.cpp | 46 ++--
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index f1ac53a..31efb57 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -4106,15 +4106,34 @@ disable_varying_optimizations_for_sso(struct 
gl_shader_program *prog)
 void
 link_shaders(struct gl_context *ctx, struct gl_shader_program *prog)
 {
+   prog->LinkStatus = true; /* All error paths will set this to false */
+   prog->Validated = false;
+   prog->_Used = false;
+
+   /* Section 7.3 (Program Objects) of the OpenGL 4.5 Core Profile spec says:
+*
+* "Linking can fail for a variety of reasons as specified in the
+* OpenGL Shading Language Specification, as well as any of the
+* following reasons:
+*
+* - No shader objects are attached to program."
+*
+* The Compatibility Profile specification does not list the error.  In
+* Compatibility Profile missing shader stages are replaced by
+* fixed-function.  This applies to the case where all stages are
+* missing.
+*/
+   if (prog->NumShaders == 0) {
+  if (ctx->API != API_OPENGL_COMPAT)
+ linker_error(prog, "no shaders attached to the program\n");
+  return;
+   }
+
tfeedback_decl *tfeedback_decls = NULL;
unsigned num_tfeedback_decls = prog->TransformFeedback.NumVarying;
 
void *mem_ctx = ralloc_context(NULL); // temporary linker context
 
-   prog->LinkStatus = true; /* All error paths will set this to false */
-   prog->Validated = false;
-   prog->_Used = false;
-
prog->ARB_fragment_coord_conventions_enable = false;
 
/* Separate the shaders into groups based on their type.
@@ -4163,25 +4182,6 @@ link_shaders(struct gl_context *ctx, struct 
gl_shader_program *prog)
prog->Version = max_version;
prog->IsES = is_es_prog;
 
-   /* From OpenGL 4.5 Core specification (7.3 Program Objects):
-* "Linking can fail for a variety of reasons as specified in the OpenGL
-* Shading Language Specification, as well as any of the following
-* reasons:
-*
-* * No shader objects are attached to program.
-*
-* ..."
-*
-* Same rule applies for OpenGL ES >= 3.1.
-*/
-
-   if (prog->NumShaders == 0 &&
-   ((ctx->API == API_OPENGL_CORE && ctx->Version >= 45) ||
-(ctx->API == API_OPENGLES2 && ctx->Version >= 31))) {
-  linker_error(prog, "No shader objects are attached to program.\n");
-  goto done;
-   }
-
/* Some shaders have to be linked with some other shaders present.
 */
if (num_shaders[MESA_SHADER_GEOMETRY] > 0 &&

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Mesa (master): glsl: simplify ES Vertex/Fragment shader requirements

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: fd0b89ad8d7ba10045683e4768a89811c8633a85
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd0b89ad8d7ba10045683e4768a89811c8633a85

Author: Timothy Arceri 
Date:   Wed Jan 27 16:16:01 2016 +1100

glsl: simplify ES Vertex/Fragment shader requirements

We really just needed to skip the existing ES < 3.1 check if we have
a compute shader, all other scenarios are already covered.

* No shaders is a link error.
* Geom or Tess without Vertex is a link error which means we always
  require a Vertex shader and hence a Fragment shader.
* Finally a Compute shader linked with any other stage is a link error.

Reviewed-by: Kenneth Graunke 

---

 src/compiler/glsl/linker.cpp | 56 ++--
 1 file changed, 28 insertions(+), 28 deletions(-)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index a370643..c6fdbe9 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -4566,38 +4566,38 @@ link_shaders(struct gl_context *ctx, struct 
gl_shader_program *prog)
if (!prog->LinkStatus)
   goto done;
 
-   /* OpenGL ES requires that a vertex shader and a fragment shader both be
-* present in a linked program. GL_ARB_ES2_compatibility doesn't say
+   /* OpenGL ES < 3.1 requires that a vertex shader and a fragment shader both
+* be present in a linked program. GL_ARB_ES2_compatibility doesn't say
 * anything about shader linking when one of the shaders (vertex or
 * fragment shader) is absent. So, the extension shouldn't change the
 * behavior specified in GLSL specification.
+*
+* From OpenGL ES 3.1 specification (7.3 Program Objects):
+* "Linking can fail for a variety of reasons as specified in the
+* OpenGL ES Shading Language Specification, as well as any of the
+* following reasons:
+*
+* ...
+*
+* * program contains objects to form either a vertex shader or
+*   fragment shader, and program is not separable, and does not
+*   contain objects to form both a vertex shader and fragment
+*   shader."
+*
+* However, the only scenario in 3.1+ where we don't require them both is
+* when we have a compute shader. For example:
+*
+* - No shaders is a link error.
+* - Geom or Tess without a Vertex shader is a link error which means we
+*   always require a Vertex shader and hence a Fragment shader.
+* - Finally a Compute shader linked with any other stage is a link error.
 */
-   if (!prog->SeparateShader && ctx->API == API_OPENGLES2) {
-  /* With ES < 3.1 one needs to have always vertex + fragment shader. */
-  if (ctx->Version < 31) {
- if (prog->_LinkedShaders[MESA_SHADER_VERTEX] == NULL) {
-   linker_error(prog, "program lacks a vertex shader\n");
- } else if (prog->_LinkedShaders[MESA_SHADER_FRAGMENT] == NULL) {
-   linker_error(prog, "program lacks a fragment shader\n");
- }
-  } else {
- /* From OpenGL ES 3.1 specification (7.3 Program Objects):
-  * "Linking can fail for a variety of reasons as specified in the
-  * OpenGL ES Shading Language Specification, as well as any of the
-  * following reasons:
-  *
-  * ...
-  *
-  * * program contains objects to form either a vertex shader or
-  *   fragment shader, and program is not separable, and does not
-  *   contain objects to form both a vertex shader and fragment
-  *   shader."
-  */
- if (!!prog->_LinkedShaders[MESA_SHADER_VERTEX] ^
- !!prog->_LinkedShaders[MESA_SHADER_FRAGMENT]) {
-linker_error(prog, "Program needs to contain both vertex and "
- "fragment shaders.\n");
- }
+   if (!prog->SeparateShader && ctx->API == API_OPENGLES2 &&
+   num_shaders[MESA_SHADER_COMPUTE] == 0) {
+  if (prog->_LinkedShaders[MESA_SHADER_VERTEX] == NULL) {
+linker_error(prog, "program lacks a vertex shader\n");
+  } else if (prog->_LinkedShaders[MESA_SHADER_FRAGMENT] == NULL) {
+linker_error(prog, "program lacks a fragment shader\n");
   }
}
 

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Mesa (master): glsl: small tidy up now that link_shaders() exits early with 0 shaders

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 20823992b41285f0fed77a4ba6f421420799c819
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=20823992b41285f0fed77a4ba6f421420799c819

Author: Timothy Arceri 
Date:   Wed Jan 27 15:34:53 2016 +1100

glsl: small tidy up now that link_shaders() exits early with 0 shaders

Reviewed-by: Kenneth Graunke 

---

 src/compiler/glsl/linker.cpp | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index 31efb57..6983093 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -4149,13 +4149,11 @@ link_shaders(struct gl_context *ctx, struct 
gl_shader_program *prog)
 
unsigned min_version = UINT_MAX;
unsigned max_version = 0;
-   const bool is_es_prog =
-  (prog->NumShaders > 0 && prog->Shaders[0]->IsES) ? true : false;
for (unsigned i = 0; i < prog->NumShaders; i++) {
   min_version = MIN2(min_version, prog->Shaders[i]->Version);
   max_version = MAX2(max_version, prog->Shaders[i]->Version);
 
-  if (prog->Shaders[i]->IsES != is_es_prog) {
+  if (prog->Shaders[i]->IsES != prog->Shaders[0]->IsES) {
 linker_error(prog, "all shaders must use same shading "
  "language version\n");
 goto done;
@@ -4173,14 +4171,14 @@ link_shaders(struct gl_context *ctx, struct 
gl_shader_program *prog)
/* In desktop GLSL, different shader versions may be linked together.  In
 * GLSL ES, all shader versions must be the same.
 */
-   if (is_es_prog && min_version != max_version) {
+   if (prog->Shaders[0]->IsES && min_version != max_version) {
   linker_error(prog, "all shaders must use same shading "
   "language version\n");
   goto done;
}
 
prog->Version = max_version;
-   prog->IsES = is_es_prog;
+   prog->IsES = prog->Shaders[0]->IsES;
 
/* Some shaders have to be linked with some other shaders present.
 */
@@ -4363,7 +4361,7 @@ link_shaders(struct gl_context *ctx, struct 
gl_shader_program *prog)
 *
 * This rule also applies to GLSL ES 3.00.
 */
-   if (max_version >= (is_es_prog ? 300 : 130)) {
+   if (max_version >= (prog->IsES ? 300 : 130)) {
   struct gl_shader *sh = prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
   if (sh) {
 lower_discard_flow(sh->ir);

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Mesa (master): glsl: clean up and fix bug in varying linking rules

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 9dd6a4ea793dd050cebbacbd5f429d4e8e57ee26
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9dd6a4ea793dd050cebbacbd5f429d4e8e57ee26

Author: Timothy Arceri 
Date:   Sat Jan 23 09:08:23 2016 +1100

glsl: clean up and fix bug in varying linking rules

The existing code was very hard to follow and has been the source
of at least 3 bugs in the past year.

The existing code also has a bug for SSO where if we have a
multi-stage SSO for example a tes -> gs program, if we try to use
transform feedback with gs the existing code would look for the
transform feedback varyings in the tes stage and fail as it can't
find them.

V2: Add more code comments, always try to remove unused inputs
to the first stage.

Reviewed-by: Kenneth Graunke 

---

 src/compiler/glsl/linker.cpp | 137 ---
 1 file changed, 63 insertions(+), 74 deletions(-)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index c6fdbe9..a245a11 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -4462,91 +4462,80 @@ link_shaders(struct gl_context *ctx, struct 
gl_shader_program *prog)
  goto done;
}
 
-   /* Linking the stages in the opposite order (from fragment to vertex)
-* ensures that inter-shader outputs written to in an earlier stage are
-* eliminated if they are (transitively) not used in a later stage.
+   /* If there is no fragment shader we need to set transform feedback.
+*
+* For SSO we need also need to assign output locations, we assign them
+* here because we need to do it for both single stage programs and multi
+* stage programs.
 */
-   int next;
-
-   if (first < MESA_SHADER_FRAGMENT) {
-  gl_shader *const sh = prog->_LinkedShaders[last];
-
-  if (first != MESA_SHADER_VERTEX) {
- /* There was no vertex shader, but we still have to assign varying
-  * locations for use by tessellation/geometry shader inputs in SSO.
-  *
-  * If the shader is not separable (i.e., prog->SeparateShader is
-  * false), linking will have already failed when first is not
-  * MESA_SHADER_VERTEX.
-  */
- if (!assign_varying_locations(ctx, mem_ctx, prog,
-   NULL, prog->_LinkedShaders[first],
-   num_tfeedback_decls, tfeedback_decls))
-goto done;
-  }
-
-  if (last != MESA_SHADER_FRAGMENT &&
- (num_tfeedback_decls != 0 || prog->SeparateShader)) {
- /* There was no fragment shader, but we still have to assign varying
-  * locations for use by transform feedback.
-  */
- if (!assign_varying_locations(ctx, mem_ctx, prog,
-   sh, NULL,
-   num_tfeedback_decls, tfeedback_decls))
-goto done;
-  }
-
-  do_dead_builtin_varyings(ctx, sh, NULL,
-   num_tfeedback_decls, tfeedback_decls);
+   if (last < MESA_SHADER_FRAGMENT &&
+   (num_tfeedback_decls != 0 || prog->SeparateShader)) {
+  if (!assign_varying_locations(ctx, mem_ctx, prog,
+prog->_LinkedShaders[last], NULL,
+num_tfeedback_decls, tfeedback_decls))
+ goto done;
+   }
 
-  remove_unused_shader_inputs_and_outputs(prog->SeparateShader, sh,
+   if (last <= MESA_SHADER_FRAGMENT) {
+  /* Remove unused varyings from the first/last stage unless SSO */
+  remove_unused_shader_inputs_and_outputs(prog->SeparateShader,
+  prog->_LinkedShaders[first],
+  ir_var_shader_in);
+  remove_unused_shader_inputs_and_outputs(prog->SeparateShader,
+  prog->_LinkedShaders[last],
   ir_var_shader_out);
-   }
-   else if (first == MESA_SHADER_FRAGMENT) {
-  /* If the program only contains a fragment shader...
-   */
-  gl_shader *const sh = prog->_LinkedShaders[first];
 
-  do_dead_builtin_varyings(ctx, NULL, sh,
-   num_tfeedback_decls, tfeedback_decls);
+  /* If the program is made up of only a single stage */
+  if (first == last) {
 
-  if (prog->SeparateShader) {
- if (!assign_varying_locations(ctx, mem_ctx, prog,
-   NULL /* producer */,
-   sh /* consumer */,
-   0 /* num_tfeedback_decls */,
-   NULL /* tfeedback_decls */))
-goto done;
-  } else {
- remove_unused_shader_inputs_and_outputs(false, sh,
- ir_var_shader_in);
-  }
-   }
+   

Mesa (master): glsl: simplify required stages for linking rules

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 55fa3c44bc00a7761c2616bcea7eed7d5a775ffc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=55fa3c44bc00a7761c2616bcea7eed7d5a775ffc

Author: Timothy Arceri 
Date:   Wed Jan 27 15:42:58 2016 +1100

glsl: simplify required stages for linking rules

Reviewed-by: Kenneth Graunke 

---

 src/compiler/glsl/linker.cpp | 84 +---
 1 file changed, 41 insertions(+), 43 deletions(-)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index 6983093..a370643 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -4182,50 +4182,48 @@ link_shaders(struct gl_context *ctx, struct 
gl_shader_program *prog)
 
/* Some shaders have to be linked with some other shaders present.
 */
-   if (num_shaders[MESA_SHADER_GEOMETRY] > 0 &&
-   num_shaders[MESA_SHADER_VERTEX] == 0 &&
-   !prog->SeparateShader) {
-  linker_error(prog, "Geometry shader must be linked with "
-  "vertex shader\n");
-  goto done;
-   }
-   if (num_shaders[MESA_SHADER_TESS_EVAL] > 0 &&
-   num_shaders[MESA_SHADER_VERTEX] == 0 &&
-   !prog->SeparateShader) {
-  linker_error(prog, "Tessellation evaluation shader must be linked with "
-  "vertex shader\n");
-  goto done;
-   }
-   if (num_shaders[MESA_SHADER_TESS_CTRL] > 0 &&
-   num_shaders[MESA_SHADER_VERTEX] == 0 &&
-   !prog->SeparateShader) {
-  linker_error(prog, "Tessellation control shader must be linked with "
-  "vertex shader\n");
-  goto done;
-   }
+   if (!prog->SeparateShader) {
+  if (num_shaders[MESA_SHADER_GEOMETRY] > 0 &&
+  num_shaders[MESA_SHADER_VERTEX] == 0) {
+ linker_error(prog, "Geometry shader must be linked with "
+ "vertex shader\n");
+ goto done;
+  }
+  if (num_shaders[MESA_SHADER_TESS_EVAL] > 0 &&
+  num_shaders[MESA_SHADER_VERTEX] == 0) {
+ linker_error(prog, "Tessellation evaluation shader must be linked "
+ "with vertex shader\n");
+ goto done;
+  }
+  if (num_shaders[MESA_SHADER_TESS_CTRL] > 0 &&
+  num_shaders[MESA_SHADER_VERTEX] == 0) {
+ linker_error(prog, "Tessellation control shader must be linked with "
+ "vertex shader\n");
+ goto done;
+  }
 
-   /* The spec is self-contradictory here. It allows linking without a tess
-* eval shader, but that can only be used with transform feedback and
-* rasterization disabled. However, transform feedback isn't allowed
-* with GL_PATCHES, so it can't be used.
-*
-* More investigation showed that the idea of transform feedback after
-* a tess control shader was dropped, because some hw vendors couldn't
-* support tessellation without a tess eval shader, but the linker section
-* wasn't updated to reflect that.
-*
-* All specifications (ARB_tessellation_shader, GL 4.0-4.5) have this
-* spec bug.
-*
-* Do what's reasonable and always require a tess eval shader if a tess
-* control shader is present.
-*/
-   if (num_shaders[MESA_SHADER_TESS_CTRL] > 0 &&
-   num_shaders[MESA_SHADER_TESS_EVAL] == 0 &&
-   !prog->SeparateShader) {
-  linker_error(prog, "Tessellation control shader must be linked with "
-  "tessellation evaluation shader\n");
-  goto done;
+  /* The spec is self-contradictory here. It allows linking without a tess
+   * eval shader, but that can only be used with transform feedback and
+   * rasterization disabled. However, transform feedback isn't allowed
+   * with GL_PATCHES, so it can't be used.
+   *
+   * More investigation showed that the idea of transform feedback after
+   * a tess control shader was dropped, because some hw vendors couldn't
+   * support tessellation without a tess eval shader, but the linker
+   * section wasn't updated to reflect that.
+   *
+   * All specifications (ARB_tessellation_shader, GL 4.0-4.5) have this
+   * spec bug.
+   *
+   * Do what's reasonable and always require a tess eval shader if a tess
+   * control shader is present.
+   */
+  if (num_shaders[MESA_SHADER_TESS_CTRL] > 0 &&
+  num_shaders[MESA_SHADER_TESS_EVAL] == 0) {
+ linker_error(prog, "Tessellation control shader must be linked with "
+ "tessellation evaluation shader\n");
+ goto done;
+  }
}
 
/* Compute shaders have additional restrictions. */

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Mesa (master): ilo: add PIPE_QUERY_OCCLUSION_PREDICATE support

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: 0d04ec2fd23f8b1baf62ea0ab8c7a86f23ada619
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d04ec2fd23f8b1baf62ea0ab8c7a86f23ada619

Author: Ilia Mirkin 
Date:   Thu Feb  4 12:47:42 2016 -0500

ilo: add PIPE_QUERY_OCCLUSION_PREDICATE support

Signed-off-by: Ilia Mirkin 
Reviewed-by: Chia-I Wu 

---

 src/gallium/drivers/ilo/ilo_draw.c   | 2 ++
 src/gallium/drivers/ilo/ilo_query.c  | 9 -
 src/gallium/drivers/ilo/ilo_render.c | 2 ++
 3 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/ilo/ilo_draw.c 
b/src/gallium/drivers/ilo/ilo_draw.c
index 69f36ae..6831d2c 100644
--- a/src/gallium/drivers/ilo/ilo_draw.c
+++ b/src/gallium/drivers/ilo/ilo_draw.c
@@ -71,6 +71,7 @@ query_process_bo(const struct ilo_context *ilo, struct 
ilo_query *q)
 
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
+   case PIPE_QUERY_OCCLUSION_PREDICATE:
case PIPE_QUERY_TIME_ELAPSED:
case PIPE_QUERY_PRIMITIVES_GENERATED:
case PIPE_QUERY_PRIMITIVES_EMITTED:
@@ -157,6 +158,7 @@ ilo_init_draw_query(struct ilo_context *ilo, struct 
ilo_query *q)
 
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
+   case PIPE_QUERY_OCCLUSION_PREDICATE:
case PIPE_QUERY_TIME_ELAPSED:
case PIPE_QUERY_PRIMITIVES_GENERATED:
case PIPE_QUERY_PRIMITIVES_EMITTED:
diff --git a/src/gallium/drivers/ilo/ilo_query.c 
b/src/gallium/drivers/ilo/ilo_query.c
index 27d0812..106bd42 100644
--- a/src/gallium/drivers/ilo/ilo_query.c
+++ b/src/gallium/drivers/ilo/ilo_query.c
@@ -47,7 +47,7 @@ static const struct {
 #define INFOX(prefix) { NULL, NULL, NULL, NULL, }
 
[PIPE_QUERY_OCCLUSION_COUNTER]  = INFO(draw),
-   [PIPE_QUERY_OCCLUSION_PREDICATE]= INFOX(draw),
+   [PIPE_QUERY_OCCLUSION_PREDICATE]= INFO(draw),
[PIPE_QUERY_TIMESTAMP]  = INFO(draw),
[PIPE_QUERY_TIMESTAMP_DISJOINT] = INFOX(draw),
[PIPE_QUERY_TIME_ELAPSED]   = INFO(draw),
@@ -75,6 +75,7 @@ ilo_create_query(struct pipe_context *pipe, unsigned 
query_type, unsigned index)
 
switch (query_type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
+   case PIPE_QUERY_OCCLUSION_PREDICATE:
case PIPE_QUERY_TIMESTAMP:
case PIPE_QUERY_TIME_ELAPSED:
case PIPE_QUERY_PRIMITIVES_GENERATED:
@@ -163,6 +164,12 @@ query_serialize(const struct ilo_query *q, void *buf)
  dst[0] = q->result.u64;
   }
   break;
+   case PIPE_QUERY_OCCLUSION_PREDICATE:
+  {
+ uint64_t *dst = buf;
+ dst[0] = !!q->result.u64;
+  }
+  break;
case PIPE_QUERY_PIPELINE_STATISTICS:
   {
  const struct pipe_query_data_pipeline_statistics *stats =
diff --git a/src/gallium/drivers/ilo/ilo_render.c 
b/src/gallium/drivers/ilo/ilo_render.c
index 8bc04df..9a47ca8 100644
--- a/src/gallium/drivers/ilo/ilo_render.c
+++ b/src/gallium/drivers/ilo/ilo_render.c
@@ -202,6 +202,7 @@ ilo_render_get_query_len(const struct ilo_render *render,
 
switch (query_type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
+   case PIPE_QUERY_OCCLUSION_PREDICATE:
case PIPE_QUERY_TIMESTAMP:
case PIPE_QUERY_TIME_ELAPSED:
   /* no reg */
@@ -268,6 +269,7 @@ ilo_render_emit_query(struct ilo_render *render,
 
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
+   case PIPE_QUERY_OCCLUSION_PREDICATE:
   pipe_control_dw1 = GEN6_PIPE_CONTROL_DEPTH_STALL |
  GEN6_PIPE_CONTROL_WRITE_PS_DEPTH_COUNT;
   break;

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Mesa (master): st/mesa: make use of the occlusion predicate query

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: 7aca4bb9b130450574b42fd84667f645a0749226
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7aca4bb9b130450574b42fd84667f645a0749226

Author: Ilia Mirkin 
Date:   Thu Feb  4 21:51:58 2016 -0500

st/mesa: make use of the occlusion predicate query

Signed-off-by: Ilia Mirkin 
Reviewed-by: Marek Olšák 
Reviewed-by: Nicolai Hähnle 

---

 src/mesa/state_tracker/st_cb_queryobj.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/mesa/state_tracker/st_cb_queryobj.c 
b/src/mesa/state_tracker/st_cb_queryobj.c
index fc239bc..cdb9efc 100644
--- a/src/mesa/state_tracker/st_cb_queryobj.c
+++ b/src/mesa/state_tracker/st_cb_queryobj.c
@@ -96,7 +96,8 @@ st_BeginQuery(struct gl_context *ctx, struct gl_query_object 
*q)
switch (q->Target) {
case GL_ANY_SAMPLES_PASSED:
case GL_ANY_SAMPLES_PASSED_CONSERVATIVE:
-  /* fall-through */
+  type = PIPE_QUERY_OCCLUSION_PREDICATE;
+  break;
case GL_SAMPLES_PASSED_ARB:
   type = PIPE_QUERY_OCCLUSION_COUNTER;
   break;
@@ -240,7 +241,14 @@ get_query_result(struct pipe_context *pipe,
   stq->base.Result = data.pipeline_statistics.c_primitives;
   break;
default:
-  stq->base.Result = data.u64;
+  switch (stq->type) {
+  case PIPE_QUERY_OCCLUSION_PREDICATE:
+ stq->base.Result = !!data.b;
+ break;
+  default:
+ stq->base.Result = data.u64;
+ break;
+  }
   break;
}
 

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Mesa (master): nv50: add PIPE_QUERY_OCCLUSION_PREDICATE support

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: 50235ab3ab9f22565aed596e5a915831d099314d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=50235ab3ab9f22565aed596e5a915831d099314d

Author: Ilia Mirkin 
Date:   Thu Feb  4 12:48:29 2016 -0500

nv50: add PIPE_QUERY_OCCLUSION_PREDICATE support

Signed-off-by: Ilia Mirkin 
Reviewed-by: Samuel Pitoiset 

---

 src/gallium/drivers/nouveau/nv50/nv50_query_hw.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_query_hw.c 
b/src/gallium/drivers/nouveau/nv50/nv50_query_hw.c
index cccd3b7..727b509 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_query_hw.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_query_hw.c
@@ -156,6 +156,7 @@ nv50_hw_begin_query(struct nv50_context *nv50, struct 
nv50_query *q)
 
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
+   case PIPE_QUERY_OCCLUSION_PREDICATE:
   hq->nesting = nv50->screen->num_occlusion_queries_active++;
   if (hq->nesting) {
  nv50_hw_query_get(push, q, 0x10, 0x0100f002);
@@ -213,6 +214,7 @@ nv50_hw_end_query(struct nv50_context *nv50, struct 
nv50_query *q)
 
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
+   case PIPE_QUERY_OCCLUSION_PREDICATE:
   nv50_hw_query_get(push, q, 0, 0x0100f002);
   if (--nv50->screen->num_occlusion_queries_active == 0) {
  PUSH_SPACE(push, 2);
@@ -304,6 +306,9 @@ nv50_hw_get_query_result(struct nv50_context *nv50, struct 
nv50_query *q,
case PIPE_QUERY_OCCLUSION_COUNTER: /* u32 sequence, u32 count, u64 time */
   res64[0] = hq->data[1] - hq->data[5];
   break;
+   case PIPE_QUERY_OCCLUSION_PREDICATE:
+  res8[0] = hq->data[1] != hq->data[5];
+  break;
case PIPE_QUERY_PRIMITIVES_GENERATED: /* u64 count, u64 time */
case PIPE_QUERY_PRIMITIVES_EMITTED: /* u64 count, u64 time */
   res64[0] = data64[0] - data64[2];
@@ -372,6 +377,7 @@ nv50_hw_create_query(struct nv50_context *nv50, unsigned 
type, unsigned index)
 
switch (q->type) {
case PIPE_QUERY_OCCLUSION_COUNTER:
+   case PIPE_QUERY_OCCLUSION_PREDICATE:
   hq->rotate = 32;
   break;
case PIPE_QUERY_PRIMITIVES_GENERATED:

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Mesa (master): nv30: add PIPE_QUERY_OCCLUSION_PREDICATE support

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: 0cb1dda36e1a651173fec48c151fd3d07eb8077f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0cb1dda36e1a651173fec48c151fd3d07eb8077f

Author: Ilia Mirkin 
Date:   Thu Feb  4 12:48:06 2016 -0500

nv30: add PIPE_QUERY_OCCLUSION_PREDICATE support

Signed-off-by: Ilia Mirkin 

---

 src/gallium/drivers/nouveau/nv30/nv30_query.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nv30/nv30_query.c 
b/src/gallium/drivers/nouveau/nv30/nv30_query.c
index 3980be9..75a4b04 100644
--- a/src/gallium/drivers/nouveau/nv30/nv30_query.c
+++ b/src/gallium/drivers/nouveau/nv30/nv30_query.c
@@ -120,6 +120,7 @@ nv30_query_create(struct pipe_context *pipe, unsigned type, 
unsigned index)
   q->report = 1;
   break;
case PIPE_QUERY_OCCLUSION_COUNTER:
+   case PIPE_QUERY_OCCLUSION_PREDICATE:
   q->enable = NV30_3D_QUERY_ENABLE;
   q->report = 1;
   break;
@@ -203,7 +204,6 @@ nv30_query_result(struct pipe_context *pipe, struct 
pipe_query *pq,
struct nv30_query *q = nv30_query(pq);
volatile uint32_t *ntfy0 = nv30_ntfy(screen, q->qo[0]);
volatile uint32_t *ntfy1 = nv30_ntfy(screen, q->qo[1]);
-   uint64_t *res64 = >u64;
 
if (ntfy1) {
   while (ntfy1[3] & 0xff00) {
@@ -227,7 +227,10 @@ nv30_query_result(struct pipe_context *pipe, struct 
pipe_query *pq,
   nv30_query_object_del(screen, >qo[1]);
}
 
-   *res64 = q->result;
+   if (q->type == PIPE_QUERY_OCCLUSION_PREDICATE)
+  result->b = !!q->result;
+   else
+  result->u64 = q->result;
return true;
 }
 

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Mesa (master): mesa: remove hack to fix up GL_ANY_SAMPLES_PASSED results

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: 922be4eab9d2a5d169dc84b3f2d99f08f3d16e5c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=922be4eab9d2a5d169dc84b3f2d99f08f3d16e5c

Author: Ilia Mirkin 
Date:   Thu Feb  4 21:55:13 2016 -0500

mesa: remove hack to fix up GL_ANY_SAMPLES_PASSED results

Both st/mesa and i965 should return a true/false result now, and the
only other driver implementing queries (radeon) doesn't support
ARB_occlusion_query2 which added that pname.

Signed-off-by: Ilia Mirkin 
Reviewed-by: Marek Olšák 
Reviewed-by: Nicolai Hähnle 

---

 src/mesa/main/queryobj.c | 5 -
 1 file changed, 5 deletions(-)

diff --git a/src/mesa/main/queryobj.c b/src/mesa/main/queryobj.c
index b86692a..7a70b59 100644
--- a/src/mesa/main/queryobj.c
+++ b/src/mesa/main/queryobj.c
@@ -807,11 +807,6 @@ invalid_enum:
   return;
}
 
-   /* TODO: Have the driver be required to handle this fixup. */
-   if (q->Target == GL_ANY_SAMPLES_PASSED ||
-   q->Target == GL_ANY_SAMPLES_PASSED_CONSERVATIVE)
-  value = !!value;
-
switch (ptype) {
case GL_INT: {
   GLint *param = (GLint *)offset;

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Mesa (master): ptn: use const_index helpers

[Rob Clark]

Module: Mesa
Branch: master
Commit: 6921762de6490fb7fa791e3fa6aff9f9f27bf40f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6921762de6490fb7fa791e3fa6aff9f9f27bf40f

Author: Rob Clark 
Date:   Thu Jan 21 13:49:07 2016 -0500

ptn: use const_index helpers

Signed-off-by: Rob Clark 
Reviewed-by: Jason Ekstrand 

---

 src/mesa/program/prog_to_nir.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/program/prog_to_nir.c b/src/mesa/program/prog_to_nir.c
index ebcc528..29e5d30 100644
--- a/src/mesa/program/prog_to_nir.c
+++ b/src/mesa/program/prog_to_nir.c
@@ -927,7 +927,7 @@ ptn_add_output_stores(struct ptn_compile *c)
   nir_intrinsic_instr *store =
  nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_var);
   store->num_components = glsl_get_vector_elements(var->type);
-  store->const_index[0] = (1 << store->num_components) - 1;
+  nir_intrinsic_set_write_mask(store, (1 << store->num_components) - 1);
   store->variables[0] =
  nir_deref_var_create(store, c->output_vars[var->data.location]);
 
@@ -998,7 +998,7 @@ setup_registers_and_variables(struct ptn_compile *c)
 nir_intrinsic_instr *store =
nir_intrinsic_instr_create(shader, nir_intrinsic_store_var);
 store->num_components = 4;
-store->const_index[0] = WRITEMASK_XYZW;
+nir_intrinsic_set_write_mask(store, WRITEMASK_XYZW);
 store->variables[0] = nir_deref_var_create(store, fullvar);
 store->src[0] = nir_src_for_ssa(f001);
 nir_builder_instr_insert(b, >instr);

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Mesa (master): nir: use const_index helpers

[Rob Clark]

Module: Mesa
Branch: master
Commit: ced8d3e7730777ea8a264d22f83b43f7b3a5c433
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ced8d3e7730777ea8a264d22f83b43f7b3a5c433

Author: Rob Clark 
Date:   Thu Jan 21 14:12:58 2016 -0500

nir: use const_index helpers

Signed-off-by: Rob Clark 
Reviewed-by: Jason Ekstrand 

---

 src/compiler/nir/nir_builder.h   |  2 +-
 src/compiler/nir/nir_lower_atomics.c |  4 ++--
 src/compiler/nir/nir_lower_clip.c|  8 
 src/compiler/nir/nir_lower_gs_intrinsics.c   |  4 ++--
 src/compiler/nir/nir_lower_io.c  | 12 +---
 src/compiler/nir/nir_lower_locals_to_regs.c  |  2 +-
 src/compiler/nir/nir_lower_two_sided_color.c |  4 ++--
 src/compiler/nir/nir_lower_var_copies.c  |  2 +-
 src/compiler/nir/nir_lower_vars_to_ssa.c |  5 +++--
 src/compiler/nir/nir_print.c |  2 +-
 src/compiler/nir/nir_validate.c  |  2 +-
 11 files changed, 23 insertions(+), 24 deletions(-)

diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h
index 88ba3a1..d546e41 100644
--- a/src/compiler/nir/nir_builder.h
+++ b/src/compiler/nir/nir_builder.h
@@ -343,7 +343,7 @@ nir_store_var(nir_builder *build, nir_variable *var, 
nir_ssa_def *value,
nir_intrinsic_instr *store =
   nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_var);
store->num_components = num_components;
-   store->const_index[0] = writemask;
+   nir_intrinsic_set_write_mask(store, writemask);
store->variables[0] = nir_deref_var_create(store, var);
store->src[0] = nir_src_for_ssa(value);
nir_builder_instr_insert(build, >instr);
diff --git a/src/compiler/nir/nir_lower_atomics.c 
b/src/compiler/nir/nir_lower_atomics.c
index 1a4458d..1935a52 100644
--- a/src/compiler/nir/nir_lower_atomics.c
+++ b/src/compiler/nir/nir_lower_atomics.c
@@ -70,8 +70,8 @@ lower_instr(nir_intrinsic_instr *instr,
unsigned uniform_loc = instr->variables[0]->var->data.location;
 
nir_intrinsic_instr *new_instr = nir_intrinsic_instr_create(mem_ctx, op);
-   new_instr->const_index[0] =
-  
state->shader_program->UniformStorage[uniform_loc].opaque[state->shader->stage].index;
+   nir_intrinsic_set_base(new_instr,
+  
state->shader_program->UniformStorage[uniform_loc].opaque[state->shader->stage].index);
 
nir_load_const_instr *offset_const = nir_load_const_instr_create(mem_ctx, 
1);
offset_const->value.u[0] = instr->variables[0]->var->data.offset;
diff --git a/src/compiler/nir/nir_lower_clip.c 
b/src/compiler/nir/nir_lower_clip.c
index 0ca6a28..bcbad53 100644
--- a/src/compiler/nir/nir_lower_clip.c
+++ b/src/compiler/nir/nir_lower_clip.c
@@ -71,8 +71,8 @@ store_clipdist_output(nir_builder *b, nir_variable *out, 
nir_ssa_def **val)
 
store = nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_output);
store->num_components = 4;
-   store->const_index[0] = out->data.driver_location;
-   store->const_index[1] = 0xf;   /* wrmask */
+   nir_intrinsic_set_base(store, out->data.driver_location);
+   nir_intrinsic_set_write_mask(store, 0xf);
store->src[0].ssa = nir_vec4(b, val[0], val[1], val[2], val[3]);
store->src[0].is_ssa = true;
store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0));
@@ -86,7 +86,7 @@ load_clipdist_input(nir_builder *b, nir_variable *in, 
nir_ssa_def **val)
 
load = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_input);
load->num_components = 4;
-   load->const_index[0] = in->data.driver_location;
+   nir_intrinsic_set_base(load, in->data.driver_location);
load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
nir_ssa_dest_init(>instr, >dest, 4, NULL);
nir_builder_instr_insert(b, >instr);
@@ -112,7 +112,7 @@ find_output_in_block(nir_block *block, void *void_state)
   if (instr->type == nir_instr_type_intrinsic) {
  nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
  if ((intr->intrinsic == nir_intrinsic_store_output) &&
- intr->const_index[0] == state->drvloc) {
+ nir_intrinsic_base(intr) == state->drvloc) {
 assert(state->def == NULL);
 assert(intr->src[0].is_ssa);
 assert(nir_src_as_const_value(intr->src[1]));
diff --git a/src/compiler/nir/nir_lower_gs_intrinsics.c 
b/src/compiler/nir/nir_lower_gs_intrinsics.c
index fdff165..14abfe3 100644
--- a/src/compiler/nir/nir_lower_gs_intrinsics.c
+++ b/src/compiler/nir/nir_lower_gs_intrinsics.c
@@ -93,7 +93,7 @@ rewrite_emit_vertex(nir_intrinsic_instr *intrin, struct state 
*state)
nir_intrinsic_instr *lowered =
   nir_intrinsic_instr_create(b->shader,
  nir_intrinsic_emit_vertex_with_counter);
-   lowered->const_index[0] = intrin->const_index[0];
+   nir_intrinsic_set_stream_id(lowered, nir_intrinsic_stream_id(intrin));
lowered->src[0] = nir_src_for_ssa(count);
nir_builder_instr_insert(b, 

Mesa (master): ttn: small logic cleanup

[Rob Clark]

Module: Mesa
Branch: master
Commit: b1770235ed74814a4f5d03fe3e93e59c38a3686b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b1770235ed74814a4f5d03fe3e93e59c38a3686b

Author: Rob Clark 
Date:   Thu Jan 21 13:32:37 2016 -0500

ttn: small logic cleanup

The only case where dim!=NULL is where op==load_ubo.  But using
op==load_ubo is less confusing.

Signed-off-by: Rob Clark 

---

 src/gallium/auxiliary/nir/tgsi_to_nir.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c 
b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index 3e7d69f..89c1665 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -614,7 +614,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned 
file, unsigned index,
   }
 
   nir_ssa_def *offset;
-  if (dim) {
+  if (op == nir_intrinsic_load_ubo) {
  /* UBO loads don't have a const_index[0] base offset. */
  offset = nir_imm_int(b, index);
  if (indirect) {

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Mesa (master): gtn: use const_index helpers

[Rob Clark]

Module: Mesa
Branch: master
Commit: b6cf98bc82a7842f8391a8e33e5318f6976d21b3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6cf98bc82a7842f8391a8e33e5318f6976d21b3

Author: Rob Clark 
Date:   Thu Jan 21 13:32:09 2016 -0500

gtn: use const_index helpers

Signed-off-by: Rob Clark 
Reviewed-by: Jason Ekstrand 

---

 src/compiler/nir/glsl_to_nir.cpp | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/src/compiler/nir/glsl_to_nir.cpp b/src/compiler/nir/glsl_to_nir.cpp
index 3db2775..68b7aeb 100644
--- a/src/compiler/nir/glsl_to_nir.cpp
+++ b/src/compiler/nir/glsl_to_nir.cpp
@@ -585,7 +585,7 @@ nir_visitor::visit(ir_emit_vertex *ir)
 {
nir_intrinsic_instr *instr =
   nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
-   instr->const_index[0] = ir->stream_id();
+   nir_intrinsic_set_stream_id(instr, ir->stream_id());
nir_builder_instr_insert(, >instr);
 }
 
@@ -594,7 +594,7 @@ nir_visitor::visit(ir_end_primitive *ir)
 {
nir_intrinsic_instr *instr =
   nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
-   instr->const_index[0] = ir->stream_id();
+   nir_intrinsic_set_stream_id(instr, ir->stream_id());
nir_builder_instr_insert(, >instr);
 }
 
@@ -874,7 +874,7 @@ nir_visitor::visit(ir_call *ir)
  instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
  instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
  instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
- instr->const_index[0] = write_mask->value.u[0];
+ nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
  instr->num_components = val->type->vector_elements;
 
  nir_builder_instr_insert(, >instr);
@@ -972,7 +972,7 @@ nir_visitor::visit(ir_call *ir)
  exec_node *param = ir->actual_parameters.get_head();
  ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
 
- instr->const_index[0] = 0;
+ nir_intrinsic_set_base(instr, 0);
  instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
 
  const glsl_type *type = ir->return_deref->var->type;
@@ -996,10 +996,10 @@ nir_visitor::visit(ir_call *ir)
  ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
  assert(write_mask);
 
- instr->const_index[0] = 0;
+ nir_intrinsic_set_base(instr, 0);
  instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
 
- instr->const_index[1] = write_mask->value.u[0];
+ nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
 
  instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
  instr->num_components = val->type->vector_elements;
@@ -1054,7 +1054,8 @@ nir_visitor::visit(ir_call *ir)
  nir_intrinsic_instr *store_instr =
 nir_intrinsic_instr_create(shader, nir_intrinsic_store_var);
  store_instr->num_components = ir->return_deref->type->vector_elements;
- store_instr->const_index[0] = (1 << store_instr->num_components) - 1;
+ nir_intrinsic_set_write_mask(store_instr,
+  (1 << store_instr->num_components) - 1);
 
  store_instr->variables[0] =
 evaluate_deref(_instr->instr, ir->return_deref);
@@ -1132,7 +1133,7 @@ nir_visitor::visit(ir_assignment *ir)
nir_intrinsic_instr *store =
   nir_intrinsic_instr_create(this->shader, nir_intrinsic_store_var);
store->num_components = ir->lhs->type->vector_elements;
-   store->const_index[0] = ir->write_mask;
+   nir_intrinsic_set_write_mask(store, ir->write_mask);
nir_deref *store_deref = nir_copy_deref(store, _deref->deref);
store->variables[0] = nir_deref_as_var(store_deref);
store->src[0] = nir_src_for_ssa(src);

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Mesa (master): freedreno/ir3: use const_index helpers

[Rob Clark]

Module: Mesa
Branch: master
Commit: 8b0fb1c152fe191768953aa8c77b89034a377f83
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b0fb1c152fe191768953aa8c77b89034a377f83

Author: Rob Clark 
Date:   Thu Jan 21 15:15:56 2016 -0500

freedreno/ir3: use const_index helpers

Signed-off-by: Rob Clark 

---

 src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c 
b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index 6eb6a2d..f38dc86 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -1004,7 +1004,7 @@ emit_intrinsic_load_ubo(struct ir3_compile *ctx, 
nir_intrinsic_instr *intr,
nir_const_value *const_offset;
/* UBO addresses are the first driver params: */
unsigned ubo = regid(ctx->so->first_driver_param + IR3_UBOS_OFF, 0);
-   int off = intr->const_index[0];
+   int off = 0;
 
/* First src is ubo index, which could either be an immed or not: */
src0 = get_src(ctx, >src[0])[0];
@@ -1092,7 +1092,7 @@ emit_intrinsic_store_var(struct ir3_compile *ctx, 
nir_intrinsic_instr *intr)
nir_deref_array *darr = nir_deref_as_array(dvar->deref.child);
struct ir3_array *arr = get_var(ctx, dvar->var);
struct ir3_instruction *addr, **src;
-   unsigned wrmask = intr->const_index[0];
+   unsigned wrmask = nir_intrinsic_write_mask(intr);
 
compile_assert(ctx, dvar->deref.child &&
(dvar->deref.child->deref_type == nir_deref_type_array));
@@ -1145,8 +1145,8 @@ emit_intrinsic(struct ir3_compile *ctx, 
nir_intrinsic_instr *intr)
const nir_intrinsic_info *info = _intrinsic_infos[intr->intrinsic];
struct ir3_instruction **dst, **src;
struct ir3_block *b = ctx->block;
-   int idx = intr->const_index[0];
nir_const_value *const_offset;
+   int idx;
 
if (info->has_dest) {
dst = get_dst(ctx, >dest, intr->num_components);
@@ -1156,6 +1156,7 @@ emit_intrinsic(struct ir3_compile *ctx, 
nir_intrinsic_instr *intr)
 
switch (intr->intrinsic) {
case nir_intrinsic_load_uniform:
+   idx = nir_intrinsic_base(intr);
const_offset = nir_src_as_const_value(intr->src[0]);
if (const_offset) {
idx += const_offset->u[0];
@@ -1182,6 +1183,7 @@ emit_intrinsic(struct ir3_compile *ctx, 
nir_intrinsic_instr *intr)
emit_intrinsic_load_ubo(ctx, intr, dst);
break;
case nir_intrinsic_load_input:
+   idx = nir_intrinsic_base(intr);
const_offset = nir_src_as_const_value(intr->src[0]);
if (const_offset) {
idx += const_offset->u[0];
@@ -1208,6 +1210,7 @@ emit_intrinsic(struct ir3_compile *ctx, 
nir_intrinsic_instr *intr)
emit_intrinsic_store_var(ctx, intr);
break;
case nir_intrinsic_store_output:
+   idx = nir_intrinsic_base(intr);
const_offset = nir_src_as_const_value(intr->src[1]);
compile_assert(ctx, const_offset != NULL);
idx += const_offset->u[0];
@@ -1243,6 +1246,7 @@ emit_intrinsic(struct ir3_compile *ctx, 
nir_intrinsic_instr *intr)
dst[0] = ctx->instance_id;
break;
case nir_intrinsic_load_user_clip_plane:
+   idx = nir_intrinsic_ucp_id(intr);
for (int i = 0; i < intr->num_components; i++) {
unsigned n = idx * 4 + i;
dst[i] = create_driver_param(ctx, IR3_DP_UCP0_X + n);

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Mesa (master): nir: const_index helpers

[Rob Clark]

Module: Mesa
Branch: master
Commit: 1df3ecc1b87d95130165283154a13ea5b9a498d4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1df3ecc1b87d95130165283154a13ea5b9a498d4

Author: Rob Clark 
Date:   Wed Jan 13 18:43:14 2016 -0500

nir: const_index helpers

Direct access to intr->const_index[n], where different slots have
different meanings, is somewhat confusing.

Instead, let's put some extra info in nir_intrinsic_infos[] about which
slots map to what, and add some get/set helpers.  The helpers validate
that the field being accessed (base/writemask/etc) is applicable for the
intrinsic opc, for some extra safety.  And nir_print can use this to
dump out decoded const_index fields.

Signed-off-by: Rob Clark 
Reviewed-by: Jason Ekstrand 

---

 src/compiler/nir/nir.h|  64 +-
 src/compiler/nir/nir_intrinsics.c |  10 ++-
 src/compiler/nir/nir_intrinsics.h | 177 +++---
 src/compiler/nir/nir_print.c  |  40 +++--
 4 files changed, 191 insertions(+), 100 deletions(-)

diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index a4dbfde..16203af 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -768,7 +768,7 @@ typedef struct {
 } nir_call_instr;
 
 #define INTRINSIC(name, num_srcs, src_components, has_dest, dest_components, \
-  num_variables, num_indices, flags) \
+  num_variables, num_indices, idx0, idx1, idx2, flags) \
nir_intrinsic_##name,
 
 #define LAST_INTRINSIC(name) nir_last_intrinsic = nir_intrinsic_##name,
@@ -781,6 +781,8 @@ typedef enum {
 #undef INTRINSIC
 #undef LAST_INTRINSIC
 
+#define NIR_INTRINSIC_MAX_CONST_INDEX 3
+
 /** Represents an intrinsic
  *
  * An intrinsic is an instruction type for handling things that are
@@ -824,7 +826,7 @@ typedef struct {
 */
uint8_t num_components;
 
-   int const_index[3];
+   int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
 
nir_deref_var *variables[2];
 
@@ -853,6 +855,39 @@ typedef enum {
NIR_INTRINSIC_CAN_REORDER = (1 << 1),
 } nir_intrinsic_semantic_flag;
 
+/**
+ * \name NIR intrinsics const-index flag
+ *
+ * Indicates the usage of a const_index slot.
+ *
+ * \sa nir_intrinsic_info::index_map
+ */
+typedef enum {
+   /**
+* Generally instructions that take a offset src argument, can encode
+* a constant 'base' value which is added to the offset.
+*/
+   NIR_INTRINSIC_BASE = 1,
+
+   /**
+* For store instructions, a writemask for the store.
+*/
+   NIR_INTRINSIC_WRMASK = 2,
+
+   /**
+* The stream-id for GS emit_vertex/end_primitive intrinsics.
+*/
+   NIR_INTRINSIC_STREAM_ID = 3,
+
+   /**
+* The clip-plane id for load_user_clip_plane intrinsic.
+*/
+   NIR_INTRINSIC_UCP_ID = 4,
+
+   NIR_INTRINSIC_NUM_INDEX_FLAGS,
+
+} nir_intrinsic_index_flag;
+
 #define NIR_INTRINSIC_MAX_INPUTS 4
 
 typedef struct {
@@ -882,12 +917,37 @@ typedef struct {
/** the number of constant indices used by the intrinsic */
unsigned num_indices;
 
+   /** indicates the usage of intr->const_index[n] */
+   unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
+
/** semantic flags for calls to this intrinsic */
nir_intrinsic_semantic_flag flags;
 } nir_intrinsic_info;
 
 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
 
+
+#define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
+static inline type\
+nir_intrinsic_##name(nir_intrinsic_instr *instr)  \
+{ \
+   const nir_intrinsic_info *info = _intrinsic_infos[instr->intrinsic];   \
+   assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
+   return instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1];  \
+} \
+static inline void\
+nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val)\
+{ \
+   const nir_intrinsic_info *info = _intrinsic_infos[instr->intrinsic];   \
+   assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
+   instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val;   \
+}
+
+INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
+INTRINSIC_IDX_ACCESSORS(base, BASE, int)
+INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
+INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
+
 /**
  * \group texture information
  *
diff --git a/src/compiler/nir/nir_intrinsics.c 
b/src/compiler/nir/nir_intrinsics.c
index a7c868c..0257b19 100644
--- a/src/compiler/nir/nir_intrinsics.c
+++ b/src/compiler/nir/nir_intrinsics.c
@@ -30,7 +30,8 @@
 #define 

Mesa (master): ttn: use const_index helpers

[Rob Clark]

Module: Mesa
Branch: master
Commit: ead05e8670c4626a1d4ea03a6a60b5019188e1e2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ead05e8670c4626a1d4ea03a6a60b5019188e1e2

Author: Rob Clark 
Date:   Thu Jan 21 13:36:37 2016 -0500

ttn: use const_index helpers

Signed-off-by: Rob Clark 
Reviewed-by: Jason Ekstrand 

---

 src/gallium/auxiliary/nir/tgsi_to_nir.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c 
b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index 89c1665..61ff0a7 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -615,7 +615,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned 
file, unsigned index,
 
   nir_ssa_def *offset;
   if (op == nir_intrinsic_load_ubo) {
- /* UBO loads don't have a const_index[0] base offset. */
+ /* UBO loads don't have a base offset. */
  offset = nir_imm_int(b, index);
  if (indirect) {
 offset = nir_iadd(b, offset, ttn_src_for_indirect(c, indirect));
@@ -623,7 +623,7 @@ ttn_src_for_file_and_index(struct ttn_compile *c, unsigned 
file, unsigned index,
  /* UBO offsets are in bytes, but TGSI gives them to us in vec4's */
  offset = nir_ishl(b, offset, nir_imm_int(b, 4));
   } else {
- load->const_index[0] = index;
+ nir_intrinsic_set_base(load, index);
  if (indirect) {
 offset = ttn_src_for_indirect(c, indirect);
  } else {
@@ -1875,7 +1875,7 @@ ttn_emit_instruction(struct ttn_compile *c)
_dst->Indirect : NULL;
 
   store->num_components = 4;
-  store->const_index[0] = dest.write_mask;
+  nir_intrinsic_set_write_mask(store, dest.write_mask);
   store->variables[0] = ttn_array_deref(c, store, var, offset, indirect);
   store->src[0] = nir_src_for_reg(dest.dest.reg.reg);
 
@@ -1907,8 +1907,8 @@ ttn_add_output_stores(struct ttn_compile *c)
  store->num_components = 4;
  store->src[0].reg.reg = c->output_regs[loc].reg;
  store->src[0].reg.base_offset = c->output_regs[loc].offset;
- store->const_index[0] = loc;
- store->const_index[1] = 0xf;  /* writemask */
+ nir_intrinsic_set_base(store, loc);
+ nir_intrinsic_set_write_mask(store, 0xf);
  store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0));
  nir_builder_instr_insert(b, >instr);
   }

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Mesa (master): glsl: Disallow transform feedback varyings with compute shaders.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 8b0f6de73d7bf5cc2b9bb189e5a3fe4d48dd1017
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b0f6de73d7bf5cc2b9bb189e5a3fe4d48dd1017

Author: Kenneth Graunke 
Date:   Tue Feb  9 02:12:07 2016 -0800

glsl: Disallow transform feedback varyings with compute shaders.

If the only stage is MESA_SHADER_COMPUTE, we should complain that
there's nothing coming out of the geometry shader stage just as
we would if the first stage were MESA_SHADER_FRAGMENT.

Also, it's valid for tessellation shaders to be the stage producing
transform feedback varyings, so mention those in the compiler error.

Found by inspection.

Signed-off-by: Kenneth Graunke 
Reviewed-by: Timothy Arceri 

---

 src/compiler/glsl/linker.cpp | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index 9dbb926..bad1c17 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -4446,9 +4446,10 @@ link_shaders(struct gl_context *ctx, struct 
gl_shader_program *prog)
* non-zero, but the program object has no vertex or geometry
* shader;
*/
-  if (first == MESA_SHADER_FRAGMENT) {
+  if (first >= MESA_SHADER_FRAGMENT) {
  linker_error(prog, "Transform feedback varyings specified, but "
-  "no vertex or geometry shader is present.\n");
+  "no vertex, tessellation, or geometry shader is "
+  "present.\n");
  goto done;
   }
 

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Mesa (master): st/mesa: don't allocate bitmap drawing state until needed

[Brian Paul]

Module: Mesa
Branch: master
Commit: 7d18faf8e7509a575f39b0a409b8167db7561153
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7d18faf8e7509a575f39b0a409b8167db7561153

Author: Brian Paul 
Date:   Mon Feb  8 09:59:40 2016 -0700

st/mesa: don't allocate bitmap drawing state until needed

Most apps don't use glBitmap so don't allocate the bitmap cache or
gallium state objects/shaders/etc until the first call to st_Bitmap().

v2: simplify a conditional, per Gustaw Smolarczyk.

Reviewed-by: Nicolai Hähnle 

---

 src/mesa/state_tracker/st_cb_bitmap.c | 145 ++
 src/mesa/state_tracker/st_cb_bitmap.h |   3 -
 src/mesa/state_tracker/st_context.c   |   1 -
 3 files changed, 77 insertions(+), 72 deletions(-)

diff --git a/src/mesa/state_tracker/st_cb_bitmap.c 
b/src/mesa/state_tracker/st_cb_bitmap.c
index c26ee7f..34809ad 100644
--- a/src/mesa/state_tracker/st_cb_bitmap.c
+++ b/src/mesa/state_tracker/st_cb_bitmap.c
@@ -497,8 +497,9 @@ create_cache_trans(struct st_context *st)
 void
 st_flush_bitmap_cache(struct st_context *st)
 {
-   if (!st->bitmap.cache->empty) {
-  struct bitmap_cache *cache = st->bitmap.cache;
+   struct bitmap_cache *cache = st->bitmap.cache;
+
+   if (cache && !cache->empty) {
   struct pipe_context *pipe = st->pipe;
   struct pipe_sampler_view *sv;
 
@@ -617,6 +618,76 @@ accum_bitmap(struct gl_context *ctx,
 }
 
 
+/**
+ * One-time init for drawing bitmaps.
+ */
+static void
+init_bitmap_state(struct st_context *st)
+{
+   struct pipe_sampler_state *sampler = >bitmap.samplers[0];
+   struct pipe_context *pipe = st->pipe;
+   struct pipe_screen *screen = pipe->screen;
+
+   /* This function should only be called once */
+   assert(st->bitmap.cache == NULL);
+
+   /* alloc bitmap cache object */
+   st->bitmap.cache = ST_CALLOC_STRUCT(bitmap_cache);
+
+   /* init sampler state once */
+   memset(sampler, 0, sizeof(*sampler));
+   sampler->wrap_s = PIPE_TEX_WRAP_CLAMP;
+   sampler->wrap_t = PIPE_TEX_WRAP_CLAMP;
+   sampler->wrap_r = PIPE_TEX_WRAP_CLAMP;
+   sampler->min_img_filter = PIPE_TEX_FILTER_NEAREST;
+   sampler->min_mip_filter = PIPE_TEX_MIPFILTER_NONE;
+   sampler->mag_img_filter = PIPE_TEX_FILTER_NEAREST;
+   st->bitmap.samplers[1] = *sampler;
+   st->bitmap.samplers[1].normalized_coords = 1;
+
+   /* init baseline rasterizer state once */
+   memset(>bitmap.rasterizer, 0, sizeof(st->bitmap.rasterizer));
+   st->bitmap.rasterizer.half_pixel_center = 1;
+   st->bitmap.rasterizer.bottom_edge_rule = 1;
+   st->bitmap.rasterizer.depth_clip = 1;
+
+   /* find a usable texture format */
+   if (screen->is_format_supported(screen, PIPE_FORMAT_I8_UNORM,
+   PIPE_TEXTURE_2D, 0,
+   PIPE_BIND_SAMPLER_VIEW)) {
+  st->bitmap.tex_format = PIPE_FORMAT_I8_UNORM;
+   }
+   else if (screen->is_format_supported(screen, PIPE_FORMAT_A8_UNORM,
+PIPE_TEXTURE_2D, 0,
+PIPE_BIND_SAMPLER_VIEW)) {
+  st->bitmap.tex_format = PIPE_FORMAT_A8_UNORM;
+   }
+   else if (screen->is_format_supported(screen, PIPE_FORMAT_L8_UNORM,
+PIPE_TEXTURE_2D, 0,
+PIPE_BIND_SAMPLER_VIEW)) {
+  st->bitmap.tex_format = PIPE_FORMAT_L8_UNORM;
+   }
+   else {
+  /* XXX support more formats */
+  assert(0);
+   }
+
+   /* Create the vertex shader */
+   {
+  const uint semantic_names[] = { TGSI_SEMANTIC_POSITION,
+  TGSI_SEMANTIC_COLOR,
+st->needs_texcoord_semantic ? TGSI_SEMANTIC_TEXCOORD :
+  TGSI_SEMANTIC_GENERIC };
+  const uint semantic_indexes[] = { 0, 0, 0 };
+  st->bitmap.vs = util_make_vertex_passthrough_shader(st->pipe, 3,
+  semantic_names,
+  semantic_indexes,
+  FALSE);
+   }
+
+   reset_cache(st);
+}
+
 
 /**
  * Called via ctx->Driver.Bitmap()
@@ -632,6 +703,10 @@ st_Bitmap(struct gl_context *ctx, GLint x, GLint y,
assert(width > 0);
assert(height > 0);
 
+   if (!st->bitmap.cache) {
+  init_bitmap_state(st);
+   }
+
/* We only need to validate state of the st dirty flags are set or
 * any non-_NEW_PROGRAM_CONSTANTS mesa flags are set.  The VS we use
 * for bitmap drawing uses no constants and the FS constants are
@@ -641,19 +716,6 @@ st_Bitmap(struct gl_context *ctx, GLint x, GLint y,
   st_validate_state(st);
}
 
-   if (!st->bitmap.vs) {
-  /* create pass-through vertex shader now */
-  const uint semantic_names[] = { TGSI_SEMANTIC_POSITION,
-  TGSI_SEMANTIC_COLOR,
-st->needs_texcoord_semantic ? TGSI_SEMANTIC_TEXCOORD :
- 

Mesa (master): mesa: add missing error check in _mesa_CallLists()

[Brian Paul]

Module: Mesa
Branch: master
Commit: 711d5347cf4e4cae60461487bcf416c915aa7395
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=711d5347cf4e4cae60461487bcf416c915aa7395

Author: Brian Paul 
Date:   Mon Feb  8 15:30:39 2016 -0700

mesa: add missing error check in _mesa_CallLists()

Generate GL_INVALID_VALUE if n < 0.  Return early if n==0 or lists==NULL.

v2: fix formatting, also check for lists==NULL.

Reviewed-by: Ian Romanick 

---

 src/mesa/main/dlist.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/src/mesa/main/dlist.c b/src/mesa/main/dlist.c
index cd8e3b6..65f0929 100644
--- a/src/mesa/main/dlist.c
+++ b/src/mesa/main/dlist.c
@@ -9105,6 +9105,14 @@ _mesa_CallLists(GLsizei n, GLenum type, const GLvoid * 
lists)
   return;
}
 
+   if (n < 0) {
+  _mesa_error(ctx, GL_INVALID_VALUE, "glCallLists(n < 0)");
+  return;
+   } else if (n == 0 || lists == NULL) {
+  /* nothing to do */
+  return;
+   }
+
/* Save the CompileFlag status, turn it off, execute display list,
 * and restore the CompileFlag.
 */

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Mesa (master): mesa: fix incorrect viewport position when GL_CLIP_ORIGIN = GL_LOWER_LEFT

[Brian Paul]

Module: Mesa
Branch: master
Commit: fe14110f359b0665cb0c09aa14f13a5ebb33b1bc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe14110f359b0665cb0c09aa14f13a5ebb33b1bc

Author: Brian Paul 
Date:   Tue Feb  9 09:58:39 2016 -0700

mesa: fix incorrect viewport position when GL_CLIP_ORIGIN = GL_LOWER_LEFT

Ilia Mirkin found/fixed the mistake.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93813
Cc: "11.1" 
Reviewed-by: Jose Fonseca 
Reviewed-by: Roland Scheidegger 

---

 src/mesa/main/viewport.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/main/viewport.c b/src/mesa/main/viewport.c
index 7d891429..681e46b 100644
--- a/src/mesa/main/viewport.c
+++ b/src/mesa/main/viewport.c
@@ -456,11 +456,11 @@ _mesa_get_viewport_xform(struct gl_context *ctx, unsigned 
i,
translate[0] = half_width + x;
if (ctx->Transform.ClipOrigin == GL_UPPER_LEFT) {
   scale[1] = -half_height;
-  translate[1] = half_height - y;
} else {
   scale[1] = half_height;
-  translate[1] = half_height + y;
}
+   translate[1] = half_height + y;
+
if (ctx->Transform.ClipDepthMode == GL_NEGATIVE_ONE_TO_ONE) {
   scale[2] = 0.5 * (f - n);
   translate[2] = 0.5 * (n + f);

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Mesa (master): 23 new commits

[Marek Olšák]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=329181ae3329dc7d6f0aac62a86c4209444d5725
Author: Marek Olšák 
Date:   Fri Feb 5 22:49:12 2016 +0100

radeonsi: enable denorms for 64-bit and 16-bit floats

This fixes FP16 conversion instructions for VI, which has 16-bit floats,
but not SI & CI, which can't disable denorms for those instructions.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=17fe3fa312d26db58b1c441519a92cd029e03727
Author: Marek Olšák 
Date:   Sat Feb 6 17:13:07 2016 +0100

gallium: pass the robust buffer access context flag to drivers

radeonsi will not do bounds checking for loads if this is not set.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d611fce23dce77e674a3fca6e7ed70efbedb
Author: Marek Olšák 
Date:   Wed Jan 6 21:21:07 2016 +0100

gallium/radeon: add a function for adding llvm function attributes

This will be used for setting the new InitialPSInputAddr attribute.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de2e28366a4b43b7c47373d3bbe17243a4dbb3ba
Author: Marek Olšák 
Date:   Thu Jan 28 02:26:59 2016 +0100

radeonsi: compile geometry shaders immediately

they have only 1 variant

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7a8b6fff5ae23546ed92aad4ad67470355ed919
Author: Marek Olšák 
Date:   Thu Jan 28 01:29:25 2016 +0100

radeonsi: split out code for deleting si_shader

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e21142087c43627a8b4bdf5aefac8efb58bb5aad
Author: Marek Olšák 
Date:   Tue Jan 26 17:07:29 2016 +0100

radeonsi: move code writing tess factors into a separate function

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc5fc3c2f60b4c208369e0eddbf416af059d88c7
Author: Marek Olšák 
Date:   Tue Jan 26 23:32:23 2016 +0100

radeonsi: make LLVM IR dumping less messy

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1041366db7a8af64db5d426f48e253796b77e84
Author: Marek Olšák 
Date:   Tue Jan 26 22:39:24 2016 +0100

radeonsi: move a few r600_can_dump_shader calls to where they're needed

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6d5666fbf2a4196462db7ea82918feae883daae
Author: Marek Olšák 
Date:   Tue Jan 26 17:27:54 2016 +0100

radeonsi: remove useless code that handles dx10_clamp_mode

"enable-no-nans-fp-math" is a wrong string and there was a disagreement
about fixing it.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=57271d5364bb84fd5c6b6a6baaf8d81bae8c53c1
Author: Marek Olšák 
Date:   Tue Jan 26 22:16:55 2016 +0100

radeonsi: dump SPI_PS_INPUT values along with shader stats

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a53628f45787370636b3b0a0c7d29cb80e1ada7
Author: Marek Olšák 
Date:   Wed Jan 6 16:03:38 2016 +0100

radeonsi: read SPI_PS_INPUT_ADDR from LLVM if it returns it

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9483fcc7f24d7e144530084bc38e5c325013a130
Author: Marek Olšák 
Date:   Sat Jan 9 14:33:38 2016 +0100

radeonsi: don't force gl_SampleMaskIn to 1 for smoothing

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c379c2540b7343b02a4c1b4d3cad3c194729d617
Author: Marek Olšák 
Date:   Sat Jan 2 00:41:43 2016 +0100

radeonsi: split PS input interpolation code into its own function

This will be used by the fragment shader prolog.

Reviewed-by: Nicolai Hähnle 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9126dcda834ba9cf58af32e97f4b5d93c9817a3
Author: Marek Olšák 
Date:   Sun Jan 3 19:00:29 2016 +0100

radeonsi: implement forcing per-sample_interpolation using the shader key 
only

It was partly a state and partly emulated by shader code, but since we want
to do this in a fragment shader prolog, we need to put it into the shader
key, which will be used to generate the prolog.

This also removes 

Mesa (master): mesa/readpix: Dedent former _mesa_readpixels() if block

[Nanley Chery]

Module: Mesa
Branch: master
Commit: c624241ef47c3a6ea2d1177969328bd4547e45a2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c624241ef47c3a6ea2d1177969328bd4547e45a2

Author: Nanley Chery 
Date:   Fri Feb  5 16:25:28 2016 -0800

mesa/readpix: Dedent former _mesa_readpixels() if block

Formatting patch split out for easy reviewing.

Signed-off-by: Nanley Chery 
Reviewed-by: Ian Romanick 
Reviewed-by: Brian Paul 

---

 src/mesa/main/readpix.c | 58 -
 1 file changed, 29 insertions(+), 29 deletions(-)

diff --git a/src/mesa/main/readpix.c b/src/mesa/main/readpix.c
index 56e9d60..470182a 100644
--- a/src/mesa/main/readpix.c
+++ b/src/mesa/main/readpix.c
@@ -861,38 +861,38 @@ _mesa_readpixels(struct gl_context *ctx,
if (ctx->NewState)
   _mesa_update_state(ctx);
 
-  pixels = _mesa_map_pbo_dest(ctx, packing, pixels);
-
-  if (pixels) {
- /* Try memcpy first. */
- if (readpixels_memcpy(ctx, x, y, width, height, format, type,
-   pixels, packing)) {
-_mesa_unmap_pbo_dest(ctx, packing);
-return;
- }
-
- /* Otherwise take the slow path. */
- switch (format) {
- case GL_STENCIL_INDEX:
-read_stencil_pixels(ctx, x, y, width, height, type, pixels,
-packing);
-break;
- case GL_DEPTH_COMPONENT:
-read_depth_pixels(ctx, x, y, width, height, type, pixels,
-  packing);
-break;
- case GL_DEPTH_STENCIL_EXT:
-read_depth_stencil_pixels(ctx, x, y, width, height, type, pixels,
-  packing);
-break;
- default:
-/* all other formats should be color formats */
-read_rgba_pixels(ctx, x, y, width, height, format, type, pixels,
- packing);
- }
+   pixels = _mesa_map_pbo_dest(ctx, packing, pixels);
 
+   if (pixels) {
+  /* Try memcpy first. */
+  if (readpixels_memcpy(ctx, x, y, width, height, format, type,
+pixels, packing)) {
  _mesa_unmap_pbo_dest(ctx, packing);
+ return;
+  }
+
+  /* Otherwise take the slow path. */
+  switch (format) {
+  case GL_STENCIL_INDEX:
+ read_stencil_pixels(ctx, x, y, width, height, type, pixels,
+ packing);
+ break;
+  case GL_DEPTH_COMPONENT:
+ read_depth_pixels(ctx, x, y, width, height, type, pixels,
+   packing);
+ break;
+  case GL_DEPTH_STENCIL_EXT:
+ read_depth_stencil_pixels(ctx, x, y, width, height, type, pixels,
+   packing);
+ break;
+  default:
+ /* all other formats should be color formats */
+ read_rgba_pixels(ctx, x, y, width, height, format, type, pixels,
+  packing);
   }
+
+  _mesa_unmap_pbo_dest(ctx, packing);
+   }
 }
 
 

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Mesa (master): mesa/readpix: Clip ReadPixels() area to the ReadBuffer's

[Nanley Chery]

Module: Mesa
Branch: master
Commit: 605832736a6d9427ad894d403cceeb74a5b18dc1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=605832736a6d9427ad894d403cceeb74a5b18dc1

Author: Nanley Chery 
Date:   Fri Feb  5 16:21:33 2016 -0800

mesa/readpix: Clip ReadPixels() area to the ReadBuffer's

The fast path for Intel's ReadPixels() unintentionally omits clipping
the specified area to a valid one. Rather than clip in various
corner-cases, perform this operation in the API validation stage.

The bug in intel_readpixels_tiled_memcpy() showed itself when the winsys
ReadBuffer's height was smaller than the one specified by ReadPixels().
yoffset became negative, which was an invalid input for tiled_to_linear().

v2: Move clipping to validation stage (Jason)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92193
Reported-by: Marta Löfstedt 
Cc: "11.0 11.1" 
Signed-off-by: Nanley Chery 
Reviewed-by: Ian Romanick 
Reviewed-by: Brian Paul 

---

 src/mesa/main/readpix.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/mesa/main/readpix.c b/src/mesa/main/readpix.c
index 8cdc9fe..a5b74bc 100644
--- a/src/mesa/main/readpix.c
+++ b/src/mesa/main/readpix.c
@@ -993,6 +993,7 @@ _mesa_ReadnPixelsARB( GLint x, GLint y, GLsizei width, 
GLsizei height,
 {
GLenum err = GL_NO_ERROR;
struct gl_renderbuffer *rb;
+   struct gl_pixelstore_attrib clippedPacking;
 
GET_CURRENT_CONTEXT(ctx);
 
@@ -1094,7 +1095,9 @@ _mesa_ReadnPixelsARB( GLint x, GLint y, GLsizei width, 
GLsizei height,
   }
}
 
-   if (width == 0 || height == 0)
+   /* Do all needed clipping here, so that we can forget about it later */
+   clippedPacking = ctx->Pack;
+   if (!_mesa_clip_readpixels(ctx, , , , , ))
   return; /* nothing to do */
 
if (!_mesa_validate_pbo_access(2, >Pack, width, height, 1,
@@ -1118,7 +1121,7 @@ _mesa_ReadnPixelsARB( GLint x, GLint y, GLsizei width, 
GLsizei height,
}
 
ctx->Driver.ReadPixels(ctx, x, y, width, height,
- format, type, >Pack, pixels);
+  format, type, , pixels);
 }
 
 void GLAPIENTRY

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Mesa (master): i965: Explicitly write the "TR DS Cache Disable" bit at TCS EOT.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 830b075e86e3e9af1bf12316d0f9d888a85a973b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=830b075e86e3e9af1bf12316d0f9d888a85a973b

Author: Kenneth Graunke 
Date:   Tue Jan  5 01:53:57 2016 -0800

i965: Explicitly write the "TR DS Cache Disable" bit at TCS EOT.

Bit 0 of the Patch Header is "TR DS Cache Disable".  Setting that bit
disables the DS Cache for tessellator-output topologies resulting in
stitch-transition regions (but leaves it enabled for other cases).

We probably shouldn't leave this to chance - the URB could contain
garbage - which could result in the cache randomly being turned on
or off.

This patch makes the final EOT write 0 to the first DWord (which
only contains this one bit).  This ensures the cache is always on.

Signed-off-by: Kenneth Graunke 
Reviewed-by: Matt Turner 

---

 src/mesa/drivers/dri/i965/brw_vec4.cpp   | 2 +-
 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 5 -
 src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp   | 2 +-
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index e7aec1f..e8bc2ec 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -274,9 +274,9 @@ vec4_visitor::implied_mrf_writes(vec4_instruction *inst)
case SHADER_OPCODE_INT_QUOTIENT:
case SHADER_OPCODE_INT_REMAINDER:
case SHADER_OPCODE_POW:
+   case TCS_OPCODE_THREAD_END:
   return 2;
case VS_OPCODE_URB_WRITE:
-   case TCS_OPCODE_THREAD_END:
   return 1;
case VS_OPCODE_PULL_CONSTANT_LOAD:
   return 2;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 730be21..ee39777 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -980,15 +980,18 @@ generate_tcs_thread_end(struct brw_codegen *p, 
vec4_instruction *inst)
brw_set_default_access_mode(p, BRW_ALIGN_1);
brw_set_default_mask_control(p, BRW_MASK_DISABLE);
brw_MOV(p, header, brw_imm_ud(0));
+   brw_MOV(p, get_element_ud(header, 5), brw_imm_ud(WRITEMASK_X << 8));
brw_MOV(p, get_element_ud(header, 0),
retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UD));
+   brw_MOV(p, brw_message_reg(inst->base_mrf + 1), brw_imm_ud(0u));
brw_pop_insn_state(p);
 
brw_urb_WRITE(p,
  brw_null_reg(), /* dest */
  inst->base_mrf, /* starting mrf reg nr */
  header,
- BRW_URB_WRITE_EOT | inst->urb_write_flags,
+ BRW_URB_WRITE_EOT | BRW_URB_WRITE_OWORD |
+ BRW_URB_WRITE_USE_CHANNEL_MASKS,
  inst->mlen,
  0,  /* response len */
  0,  /* urb destination offset */
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
index 9b75f45..0d56356 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp
@@ -205,7 +205,7 @@ vec4_tcs_visitor::emit_thread_end()
 
inst = emit(TCS_OPCODE_THREAD_END);
inst->base_mrf = 14;
-   inst->mlen = 1;
+   inst->mlen = 2;
 }
 
 

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Mesa (master): mesa/image: Make _mesa_clip_readpixels() work with renderbuffers

[Nanley Chery]

Module: Mesa
Branch: master
Commit: 55d56d34e0535baa2c7e1e1d8f1be11593a07fa8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=55d56d34e0535baa2c7e1e1d8f1be11593a07fa8

Author: Nanley Chery 
Date:   Fri Feb  5 16:20:01 2016 -0800

mesa/image: Make _mesa_clip_readpixels() work with renderbuffers

v2: Use gl_renderbuffer::{Width,Height} (Jason)

Cc: "11.0 11.1" 
Signed-off-by: Nanley Chery 
Reviewed-by: Ian Romanick 
Reviewed-by: Brian Paul 

---

 src/mesa/main/image.c | 22 +-
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/src/mesa/main/image.c b/src/mesa/main/image.c
index e79e3e6..99f253c 100644
--- a/src/mesa/main/image.c
+++ b/src/mesa/main/image.c
@@ -670,7 +670,7 @@ _mesa_clip_drawpixels(const struct gl_context *ctx,
  * so that the image region is entirely within the window bounds.
  * Note: this is different from _mesa_clip_drawpixels() in that the
  * scissor box is ignored, and we use the bounds of the current readbuffer
- * surface.
+ * surface or the attached image.
  *
  * \return  GL_TRUE if region to read is in bounds
  *  GL_FALSE if region is completely out of bounds (nothing to read)
@@ -682,6 +682,18 @@ _mesa_clip_readpixels(const struct gl_context *ctx,
   struct gl_pixelstore_attrib *pack)
 {
const struct gl_framebuffer *buffer = ctx->ReadBuffer;
+   struct gl_renderbuffer *rb = buffer->_ColorReadBuffer;
+   GLsizei clip_width;
+   GLsizei clip_height;
+
+   if (rb) {
+  clip_width = rb->Width;
+  clip_height = rb->Height;
+   } else {
+  clip_width = buffer->Width;
+  clip_height = buffer->Height;
+   }
+
 
if (pack->RowLength == 0) {
   pack->RowLength = *width;
@@ -694,8 +706,8 @@ _mesa_clip_readpixels(const struct gl_context *ctx,
   *srcX = 0;
}
/* right clipping */
-   if (*srcX + *width > (GLsizei) buffer->Width)
-  *width -= (*srcX + *width - buffer->Width);
+   if (*srcX + *width > clip_width)
+  *width -= (*srcX + *width - clip_width);
 
if (*width <= 0)
   return GL_FALSE;
@@ -707,8 +719,8 @@ _mesa_clip_readpixels(const struct gl_context *ctx,
   *srcY = 0;
}
/* top clipping */
-   if (*srcY + *height > (GLsizei) buffer->Height)
-  *height -= (*srcY + *height - buffer->Height);
+   if (*srcY + *height > clip_height)
+  *height -= (*srcY + *height - clip_height);
 
if (*height <= 0)
   return GL_FALSE;

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Mesa (master): mesa/readpix: Don't clip in _mesa_readpixels()

[Nanley Chery]

Module: Mesa
Branch: master
Commit: b89a8a15c240418d1859947b5114993ecdf424fb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b89a8a15c240418d1859947b5114993ecdf424fb

Author: Nanley Chery 
Date:   Fri Feb  5 16:25:01 2016 -0800

mesa/readpix: Don't clip in _mesa_readpixels()

The clipping is performed higher up in the call-chain.

Signed-off-by: Nanley Chery 
Reviewed-by: Ian Romanick 
Reviewed-by: Brian Paul 

---

 src/mesa/main/readpix.c | 20 +++-
 1 file changed, 7 insertions(+), 13 deletions(-)

diff --git a/src/mesa/main/readpix.c b/src/mesa/main/readpix.c
index a5b74bc..56e9d60 100644
--- a/src/mesa/main/readpix.c
+++ b/src/mesa/main/readpix.c
@@ -858,21 +858,16 @@ _mesa_readpixels(struct gl_context *ctx,
  const struct gl_pixelstore_attrib *packing,
  GLvoid *pixels)
 {
-   struct gl_pixelstore_attrib clippedPacking = *packing;
-
if (ctx->NewState)
   _mesa_update_state(ctx);
 
-   /* Do all needed clipping here, so that we can forget about it later */
-   if (_mesa_clip_readpixels(ctx, , , , , )) {
-
-  pixels = _mesa_map_pbo_dest(ctx, , pixels);
+  pixels = _mesa_map_pbo_dest(ctx, packing, pixels);
 
   if (pixels) {
  /* Try memcpy first. */
  if (readpixels_memcpy(ctx, x, y, width, height, format, type,
pixels, packing)) {
-_mesa_unmap_pbo_dest(ctx, );
+_mesa_unmap_pbo_dest(ctx, packing);
 return;
  }
 
@@ -880,25 +875,24 @@ _mesa_readpixels(struct gl_context *ctx,
  switch (format) {
  case GL_STENCIL_INDEX:
 read_stencil_pixels(ctx, x, y, width, height, type, pixels,
-);
+packing);
 break;
  case GL_DEPTH_COMPONENT:
 read_depth_pixels(ctx, x, y, width, height, type, pixels,
-  );
+  packing);
 break;
  case GL_DEPTH_STENCIL_EXT:
 read_depth_stencil_pixels(ctx, x, y, width, height, type, pixels,
-  );
+  packing);
 break;
  default:
 /* all other formats should be color formats */
 read_rgba_pixels(ctx, x, y, width, height, format, type, pixels,
- );
+ packing);
  }
 
- _mesa_unmap_pbo_dest(ctx, );
+ _mesa_unmap_pbo_dest(ctx, packing);
   }
-   }
 }
 
 

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Mesa (master): i965/fs: Add an enum for keeping track of texture instruciton sources

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: a37b8110c13bf9e38220d6eb9e531b2acffcb4ed
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a37b8110c13bf9e38220d6eb9e531b2acffcb4ed

Author: Jason Ekstrand 
Date:   Fri Feb  5 18:39:13 2016 -0800

i965/fs: Add an enum for keeping track of texture instruciton sources

These logical texture instructions can have a *lot* of sources.  It's much
safer if we have symbolic names for them.

Reviewed-by: Kenneth Graunke 

---

 src/mesa/drivers/dri/i965/brw_defines.h  | 40 
 src/mesa/drivers/dri/i965/brw_fs.cpp | 46 +++-
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 30 --
 3 files changed, 72 insertions(+), 44 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index 01e0c99..938770f 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -968,19 +968,8 @@ enum opcode {
 *
 * LOGICAL opcodes are eventually translated to the matching non-LOGICAL
 * opcode but instead of taking a single payload blob they expect their
-* arguments separately as individual sources:
-*
-* Source 0: [optional] Texture coordinates.
-* Source 1: [optional] Shadow comparitor.
-* Source 2: [optional] dPdx if the operation takes explicit derivatives,
-*  otherwise LOD value.
-* Source 3: [optional] dPdy if the operation takes explicit derivatives.
-* Source 4: [optional] Sample index.
-* Source 5: [optional] MCS data.
-* Source 6: [required] Texture sampler.
-* Source 7: [optional] Texel offset.
-* Source 8: [required] Number of coordinate components (as UD immediate).
-* Source 9: [required] Number derivative components (as UD immediate).
+* arguments separately as individual sources. The position/ordering of the
+* arguments are defined by the enum tex_logical_srcs.
 */
SHADER_OPCODE_TEX,
SHADER_OPCODE_TEX_LOGICAL,
@@ -1404,6 +1393,31 @@ enum fb_write_logical_srcs {
FB_WRITE_LOGICAL_SRC_COMPONENTS,  /* REQUIRED */
 };
 
+enum tex_logical_srcs {
+   /** Texture coordinates */
+   TEX_LOGICAL_SRC_COORDINATE,
+   /** Shadow comparitor */
+   TEX_LOGICAL_SRC_SHADOW_C,
+   /** dPdx if the operation takes explicit derivatives, otherwise LOD value */
+   TEX_LOGICAL_SRC_LOD,
+   /** dPdy if the operation takes explicit derivatives */
+   TEX_LOGICAL_SRC_LOD2,
+   /** Sample index */
+   TEX_LOGICAL_SRC_SAMPLE_INDEX,
+   /** MCS data */
+   TEX_LOGICAL_SRC_MCS,
+   /** REQUIRED: Texture sampler */
+   TEX_LOGICAL_SRC_SAMPLER,
+   /** Texel offset for gathers */
+   TEX_LOGICAL_SRC_OFFSET_VALUE,
+   /** REQUIRED: Number of coordinate components (as UD immediate) */
+   TEX_LOGICAL_SRC_COORD_COMPONENTS,
+   /** REQUIRED: Number of derivative components (as UD immediate) */
+   TEX_LOGICAL_SRC_GRAD_COMPONENTS,
+
+   TEX_LOGICAL_NUM_SRCS,
+};
+
 #ifdef __cplusplus
 /**
  * Allow brw_urb_write_flags enums to be ORed together.
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 41a3f81..18a56f6 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -739,18 +739,20 @@ fs_inst::components_read(unsigned i) const
case SHADER_OPCODE_LOD_LOGICAL:
case SHADER_OPCODE_TG4_LOGICAL:
case SHADER_OPCODE_TG4_OFFSET_LOGICAL:
-  assert(src[8].file == IMM && src[9].file == IMM);
+  assert(src[TEX_LOGICAL_SRC_COORD_COMPONENTS].file == IMM &&
+ src[TEX_LOGICAL_SRC_GRAD_COMPONENTS].file == IMM);
   /* Texture coordinates. */
-  if (i == 0)
- return src[8].ud;
+  if (i == TEX_LOGICAL_SRC_COORDINATE)
+ return src[TEX_LOGICAL_SRC_COORD_COMPONENTS].ud;
   /* Texture derivatives. */
-  else if ((i == 2 || i == 3) && opcode == SHADER_OPCODE_TXD_LOGICAL)
- return src[9].ud;
+  else if ((i == TEX_LOGICAL_SRC_LOD || i == TEX_LOGICAL_SRC_LOD2) &&
+   opcode == SHADER_OPCODE_TXD_LOGICAL)
+ return src[TEX_LOGICAL_SRC_GRAD_COMPONENTS].ud;
   /* Texture offset. */
-  else if (i == 7)
+  else if (i == TEX_LOGICAL_SRC_OFFSET_VALUE)
  return 2;
   /* MCS */
-  else if (i == 5 && opcode == SHADER_OPCODE_TXF_CMS_W_LOGICAL)
+  else if (i == TEX_LOGICAL_SRC_MCS && opcode == 
SHADER_OPCODE_TXF_CMS_W_LOGICAL)
  return 2;
   else
  return 1;
@@ -4080,17 +4082,18 @@ static void
 lower_sampler_logical_send(const fs_builder , fs_inst *inst, opcode op)
 {
const brw_device_info *devinfo = bld.shader->devinfo;
-   const fs_reg  = inst->src[0];
-   const fs_reg _c = inst->src[1];
-   const fs_reg  = inst->src[2];
-   const fs_reg  = inst->src[3];
-   const fs_reg _index = inst->src[4];
-   const fs_reg  = inst->src[5];
-   const fs_reg  = inst->src[6];
-   const fs_reg _value = inst->src[7];

Mesa (master): nir/tex_instr: Rename sampler to texture

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: ee85014b90af1d94d637ec763a803479e9bac5dc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ee85014b90af1d94d637ec763a803479e9bac5dc

Author: Jason Ekstrand 
Date:   Sat Feb  6 09:05:10 2016 -0800

nir/tex_instr: Rename sampler to texture

We're about to separate the two concepts.  When we do, the sampler will
become optional.  Doing a rename first makes the separation a bit more
safe because drivers that depend on GLSL or TGSI behaviour will be fine to
just use the texture index all the time.

Reviewed-by: Kenneth Graunke 

---

 src/compiler/nir/glsl_to_nir.cpp   |  2 +-
 src/compiler/nir/nir.c | 10 -
 src/compiler/nir/nir.h | 24 +++---
 src/compiler/nir/nir_clone.c   |  8 
 src/compiler/nir/nir_instr_set.c   | 18 
 src/compiler/nir/nir_lower_samplers.c  | 18 
 src/compiler/nir/nir_lower_tex.c   | 12 +--
 src/compiler/nir/nir_opt_constant_folding.c|  4 ++--
 src/compiler/nir/nir_print.c   | 12 +--
 src/compiler/nir/nir_remove_dead_variables.c   |  4 ++--
 src/compiler/nir/nir_validate.c|  4 ++--
 src/gallium/auxiliary/nir/tgsi_to_nir.c|  8 
 .../drivers/freedreno/ir3/ir3_compiler_nir.c   |  6 +++---
 src/gallium/drivers/vc4/vc4_nir_lower_txf_ms.c |  6 +++---
 src/gallium/drivers/vc4/vc4_program.c  |  4 ++--
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp   | 24 +++---
 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 24 +++---
 src/mesa/program/prog_to_nir.c |  2 +-
 18 files changed, 95 insertions(+), 95 deletions(-)

diff --git a/src/compiler/nir/glsl_to_nir.cpp b/src/compiler/nir/glsl_to_nir.cpp
index 68b7aeb..ee1a0cb 100644
--- a/src/compiler/nir/glsl_to_nir.cpp
+++ b/src/compiler/nir/glsl_to_nir.cpp
@@ -1852,7 +1852,7 @@ nir_visitor::visit(ir_texture *ir)
   unreachable("not reached");
}
 
-   instr->sampler = evaluate_deref(>instr, ir->sampler);
+   instr->texture = evaluate_deref(>instr, ir->sampler);
 
unsigned src_number = 0;
 
diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c
index 7f343ee..6a070f5 100644
--- a/src/compiler/nir/nir.c
+++ b/src/compiler/nir/nir.c
@@ -486,9 +486,9 @@ nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
for (unsigned i = 0; i < num_srcs; i++)
   src_init(>src[i].src);
 
-   instr->sampler_index = 0;
-   instr->sampler_array_size = 0;
-   instr->sampler = NULL;
+   instr->texture_index = 0;
+   instr->texture_array_size = 0;
+   instr->texture = NULL;
 
return instr;
 }
@@ -1007,8 +1007,8 @@ visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb 
cb, void *state)
  return false;
}
 
-   if (instr->sampler != NULL) {
-  if (!visit_deref_src(instr->sampler, cb, state))
+   if (instr->texture != NULL) {
+  if (!visit_deref_src(instr->texture, cb, state))
  return false;
}
 
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 16203af..48dda99 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -965,7 +965,7 @@ typedef enum {
nir_tex_src_ms_index, /* MSAA sample index */
nir_tex_src_ddx,
nir_tex_src_ddy,
-   nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
+   nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
nir_num_tex_src_types
 } nir_tex_src_type;
 
@@ -1015,17 +1015,17 @@ typedef struct {
/* gather component selector */
unsigned component : 2;
 
-   /** The sampler index
+   /** The texture index
 *
-* If this texture instruction has a nir_tex_src_sampler_offset source,
-* then the sampler index is given by sampler_index + sampler_offset.
+* If this texture instruction has a nir_tex_src_texture_offset source,
+* then the texture index is given by texture_index + texture_offset.
 */
-   unsigned sampler_index;
+   unsigned texture_index;
 
-   /** The size of the sampler array or 0 if it's not an array */
-   unsigned sampler_array_size;
+   /** The size of the texture array or 0 if it's not an array */
+   unsigned texture_array_size;
 
-   nir_deref_var *sampler; /* if this is NULL, use sampler_index instead */
+   nir_deref_var *texture; /* if this is NULL, use texture_index instead */
 } nir_tex_instr;
 
 static inline unsigned
@@ -2091,15 +2091,15 @@ typedef struct nir_lower_tex_options {
unsigned saturate_t;
unsigned saturate_r;
 
-   /* Bitmask of samplers that need swizzling.
+   /* Bitmask of textures that need swizzling.
 *
-* If (swizzle_result & (1 << sampler_index)), then the swizzle in
-* swizzles[sampler_index] is applied to the result of the texturing
+* If (swizzle_result & (1 << 

Mesa (master): i965/fs: Plumb separate surfaces and samplers through from NIR

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: b8ab9c8c8674d67e09c1134ca44b37e0a611f5b5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8ab9c8c8674d67e09c1134ca44b37e0a611f5b5

Author: Jason Ekstrand 
Date:   Fri Feb  5 18:24:02 2016 -0800

i965/fs: Plumb separate surfaces and samplers through from NIR

Reviewed-by: Kenneth Graunke 

---

 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp |  2 +-
 src/mesa/drivers/dri/i965/brw_defines.h |  4 +++-
 src/mesa/drivers/dri/i965/brw_fs.cpp| 29 -
 src/mesa/drivers/dri/i965/brw_fs.h  |  2 ++
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp  |  2 +-
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp| 17 ++-
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp| 12 ++
 7 files changed, 46 insertions(+), 22 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp 
b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
index c6ae3d8..fd23e23 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
@@ -85,7 +85,7 @@ brw_blorp_eu_emitter::emit_texture_lookup(const struct 
brw_reg ,
   unsigned msg_length)
 {
fs_inst *inst = new (mem_ctx) fs_inst(op, 16, dst, 
brw_message_reg(base_mrf),
- brw_imm_ud(0u));
+ brw_imm_ud(0u), brw_imm_ud(0u));
 
inst->base_mrf = base_mrf;
inst->mlen = msg_length;
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index 938770f..fc8e157 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1406,7 +1406,9 @@ enum tex_logical_srcs {
TEX_LOGICAL_SRC_SAMPLE_INDEX,
/** MCS data */
TEX_LOGICAL_SRC_MCS,
-   /** REQUIRED: Texture sampler */
+   /** REQUIRED: Texture surface index */
+   TEX_LOGICAL_SRC_SURFACE,
+   /** Texture sampler index */
TEX_LOGICAL_SRC_SAMPLER,
/** Texel offset for gathers */
TEX_LOGICAL_SRC_OFFSET_VALUE,
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 18a56f6..0ce7ed1 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -3653,6 +3653,7 @@ lower_sampler_logical_send_gen4(const fs_builder , 
fs_inst *inst, opcode op,
 const fs_reg ,
 const fs_reg _c,
 const fs_reg , const fs_reg ,
+const fs_reg ,
 const fs_reg ,
 unsigned coord_components,
 unsigned grad_components)
@@ -3745,8 +3746,9 @@ lower_sampler_logical_send_gen4(const fs_builder , 
fs_inst *inst, opcode op,
 
inst->opcode = op;
inst->src[0] = reg_undef;
-   inst->src[1] = sampler;
-   inst->resize_sources(2);
+   inst->src[1] = surface;
+   inst->src[2] = sampler;
+   inst->resize_sources(3);
inst->base_mrf = msg_begin.nr;
inst->mlen = msg_end.nr - msg_begin.nr;
inst->header_size = 1;
@@ -3758,6 +3760,7 @@ lower_sampler_logical_send_gen5(const fs_builder , 
fs_inst *inst, opcode op,
 const fs_reg _c,
 fs_reg lod, fs_reg lod2,
 const fs_reg _index,
+const fs_reg ,
 const fs_reg ,
 const fs_reg _value,
 unsigned coord_components,
@@ -3840,8 +3843,9 @@ lower_sampler_logical_send_gen5(const fs_builder , 
fs_inst *inst, opcode op,
 
inst->opcode = op;
inst->src[0] = reg_undef;
-   inst->src[1] = sampler;
-   inst->resize_sources(2);
+   inst->src[1] = surface;
+   inst->src[2] = sampler;
+   inst->resize_sources(3);
inst->base_mrf = message.nr;
inst->mlen = msg_end.nr - message.nr;
inst->header_size = header_size;
@@ -3865,7 +3869,9 @@ lower_sampler_logical_send_gen7(const fs_builder , 
fs_inst *inst, opcode op,
 const fs_reg _c,
 fs_reg lod, fs_reg lod2,
 const fs_reg _index,
-const fs_reg , const fs_reg ,
+const fs_reg ,
+const fs_reg ,
+const fs_reg ,
 fs_reg offset_value,
 unsigned coord_components,
 unsigned grad_components)
@@ -4068,8 +4074,9 @@ lower_sampler_logical_send_gen7(const fs_builder , 
fs_inst *inst, opcode op,
/* Generate the SEND. */
inst->opcode = op;
inst->src[0] = src_payload;
-   inst->src[1] = sampler;
-   

Mesa (master): i965/fs: Separate the sampler from the surface in generate_tex

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: c0c14de130d01d4dbe34626c117d00f2ad152c17
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c0c14de130d01d4dbe34626c117d00f2ad152c17

Author: Jason Ekstrand 
Date:   Mon Nov  2 15:24:05 2015 -0800

i965/fs: Separate the sampler from the surface in generate_tex

Reviewed-by: Kenneth Graunke 

---

 src/mesa/drivers/dri/i965/brw_fs.h |  1 +
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 20 ++--
 2 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 4612a28..2da089f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -448,6 +448,7 @@ private:
void generate_linterp(fs_inst *inst, struct brw_reg dst,
 struct brw_reg *src);
void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
+ struct brw_reg surface_index,
  struct brw_reg sampler_index);
void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst,
  struct brw_reg src,
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 1916a99..15155c2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -678,6 +678,7 @@ fs_generator::generate_get_buffer_size(fs_inst *inst,
 
 void
 fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg 
src,
+   struct brw_reg surface_index,
struct brw_reg sampler_index)
 {
int msg_type = -1;
@@ -933,14 +934,16 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg 
dst, struct brw_reg src
  ? prog_data->binding_table.gather_texture_start
  : prog_data->binding_table.texture_start;
 
-   if (sampler_index.file == BRW_IMMEDIATE_VALUE) {
+   if (surface_index.file == BRW_IMMEDIATE_VALUE &&
+   sampler_index.file == BRW_IMMEDIATE_VALUE) {
+  uint32_t surface = surface_index.ud;
   uint32_t sampler = sampler_index.ud;
 
   brw_SAMPLE(p,
  retype(dst, BRW_REGISTER_TYPE_UW),
  inst->base_mrf,
  src,
- sampler + base_binding_table_index,
+ surface + base_binding_table_index,
  sampler % 16,
  msg_type,
  rlen,
@@ -949,19 +952,24 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg 
dst, struct brw_reg src
  simd_mode,
  return_format);
 
-  brw_mark_surface_used(prog_data, sampler + base_binding_table_index);
+  brw_mark_surface_used(prog_data, surface + base_binding_table_index);
} else {
   /* Non-const sampler index */
 
   struct brw_reg addr = vec1(retype(brw_address_reg(0), 
BRW_REGISTER_TYPE_UD));
+  struct brw_reg surface_reg = vec1(retype(surface_index, 
BRW_REGISTER_TYPE_UD));
   struct brw_reg sampler_reg = vec1(retype(sampler_index, 
BRW_REGISTER_TYPE_UD));
 
   brw_push_insn_state(p);
   brw_set_default_mask_control(p, BRW_MASK_DISABLE);
   brw_set_default_access_mode(p, BRW_ALIGN_1);
 
-  /* addr = ((sampler * 0x101) + base_binding_table_index) & 0xfff */
-  brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101));
+  if (memcmp(_reg, _reg, sizeof(surface_reg)) == 0) {
+ brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101));
+  } else {
+ brw_SHL(p, addr, sampler_reg, brw_imm_ud(8));
+ brw_OR(p, addr, addr, surface_reg);
+  }
   if (base_binding_table_index)
  brw_ADD(p, addr, addr, brw_imm_ud(base_binding_table_index));
   brw_AND(p, addr, addr, brw_imm_ud(0xfff));
@@ -2070,7 +2078,7 @@ fs_generator::generate_code(const cfg_t *cfg, int 
dispatch_width)
   case SHADER_OPCODE_TG4:
   case SHADER_OPCODE_TG4_OFFSET:
   case SHADER_OPCODE_SAMPLEINFO:
-generate_tex(inst, dst, src[0], src[1]);
+generate_tex(inst, dst, src[0], src[1], src[1]);
 break;
   case FS_OPCODE_DDX_COARSE:
   case FS_OPCODE_DDX_FINE:

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Mesa (master): nir: Separate texture from sampler in nir_tex_instr

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 5ec456375e4fdd0b6c7d797f99191044e19ead74
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ec456375e4fdd0b6c7d797f99191044e19ead74

Author: Jason Ekstrand 
Date:   Mon Nov  2 17:58:29 2015 -0800

nir: Separate texture from sampler in nir_tex_instr

This commit adds the capability to NIR to support separate textures and
samplers.  As it currently stands, glsl_to_nir only sets the texture deref
and leaves the sampler deref alone as it did before and nir_lower_samplers
assumes this.  Backends can still assume that they are combined and only
look at only at the texture index.  Or, if they wish, they can assume that
they are separate because nir_lower_samplers, tgsi_to_nir, and prog_to_nir
all set both texture and sampler index whenever a sampler is required (the
two indices are the same in this case).

Reviewed-by: Kenneth Graunke 

---

 src/compiler/nir/nir.c   |  7 +++
 src/compiler/nir/nir.h   | 31 +++-
 src/compiler/nir/nir_clone.c |  7 ++-
 src/compiler/nir/nir_instr_set.c | 15 --
 src/compiler/nir/nir_lower_samplers.c| 13 +++-
 src/compiler/nir/nir_lower_tex.c |  6 +++---
 src/compiler/nir/nir_opt_constant_folding.c  | 11 +++---
 src/compiler/nir/nir_print.c | 14 ++---
 src/compiler/nir/nir_remove_dead_variables.c |  5 +
 src/compiler/nir/nir_validate.c  |  3 +++
 src/gallium/auxiliary/nir/tgsi_to_nir.c  |  1 +
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp |  3 +++
 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp   |  3 +++
 src/mesa/program/prog_to_nir.c   |  1 +
 14 files changed, 102 insertions(+), 18 deletions(-)

diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c
index 6a070f5..df40a55 100644
--- a/src/compiler/nir/nir.c
+++ b/src/compiler/nir/nir.c
@@ -489,6 +489,8 @@ nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
instr->texture_index = 0;
instr->texture_array_size = 0;
instr->texture = NULL;
+   instr->sampler_index = 0;
+   instr->sampler = NULL;
 
return instr;
 }
@@ -1012,6 +1014,11 @@ visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb 
cb, void *state)
  return false;
}
 
+   if (instr->sampler != NULL) {
+  if (!visit_deref_src(instr->sampler, cb, state))
+ return false;
+   }
+
return true;
 }
 
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 48dda99..8085341 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -966,6 +966,7 @@ typedef enum {
nir_tex_src_ddx,
nir_tex_src_ddy,
nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
+   nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
nir_num_tex_src_types
 } nir_tex_src_type;
 
@@ -1025,7 +1026,35 @@ typedef struct {
/** The size of the texture array or 0 if it's not an array */
unsigned texture_array_size;
 
-   nir_deref_var *texture; /* if this is NULL, use texture_index instead */
+   /** The texture deref
+*
+* If this is null, use texture_index instead.
+*/
+   nir_deref_var *texture;
+
+   /** The sampler index
+*
+* The following operations do not require a sampler and, as such, this
+* field should be ignored:
+*- nir_texop_txf
+*- nir_texop_txf_ms
+*- nir_texop_txs
+*- nir_texop_lod
+*- nir_texop_tg4
+*- nir_texop_query_levels
+*- nir_texop_texture_samples
+*- nir_texop_samples_identical
+*
+* If this texture instruction has a nir_tex_src_sampler_offset source,
+* then the sampler index is given by sampler_index + sampler_offset.
+*/
+   unsigned sampler_index;
+
+   /** The sampler deref
+*
+* If this is null, use sampler_index instead.
+*/
+   nir_deref_var *sampler;
 } nir_tex_instr;
 
 static inline unsigned
diff --git a/src/compiler/nir/nir_clone.c b/src/compiler/nir/nir_clone.c
index d9c190d..a666d8e 100644
--- a/src/compiler/nir/nir_clone.c
+++ b/src/compiler/nir/nir_clone.c
@@ -357,10 +357,15 @@ clone_tex(clone_state *state, const nir_tex_instr *tex)
ntex->is_new_style_shadow = tex->is_new_style_shadow;
memcpy(ntex->const_offset, tex->const_offset, sizeof(ntex->const_offset));
ntex->component = tex->component;
+
ntex->texture_index = tex->texture_index;
-   ntex->texture_array_size = tex->texture_array_size;
if (tex->texture)
   ntex->texture = clone_deref_var(state, tex->texture, >instr);
+   ntex->texture_array_size = tex->texture_array_size;
+
+   ntex->sampler_index = tex->sampler_index;
+   if (tex->sampler)
+  ntex->sampler = clone_deref_var(state, tex->sampler, >instr);
 
return ntex;
 }
diff --git a/src/compiler/nir/nir_instr_set.c b/src/compiler/nir/nir_instr_set.c
index 4489a88..c3cf257 100644
--- 

Mesa (master): nir: Add some braces around loops and ifs

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 3f421849945d763b3e477ceb1c726c2dbed3bafd
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f421849945d763b3e477ceb1c726c2dbed3bafd

Author: Jason Ekstrand 
Date:   Tue Feb  9 10:48:42 2016 -0800

nir: Add some braces around loops and ifs

---

 src/compiler/nir/nir.c | 15 ++-
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c
index 21bf678..7f343ee 100644
--- a/src/compiler/nir/nir.c
+++ b/src/compiler/nir/nir.c
@@ -978,9 +978,10 @@ visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb 
cb, void *state)
 {
nir_deref *cur = >deref;
while (cur != NULL) {
-  if (cur->deref_type == nir_deref_type_array)
+  if (cur->deref_type == nir_deref_type_array) {
  if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
 return false;
+  }
 
   cur = cur->child;
}
@@ -1001,13 +1002,15 @@ visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb 
cb, void *state)
 static bool
 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
 {
-   for (unsigned i = 0; i < instr->num_srcs; i++)
+   for (unsigned i = 0; i < instr->num_srcs; i++) {
   if (!visit_src(>src[i].src, cb, state))
  return false;
+   }
 
-   if (instr->sampler != NULL)
+   if (instr->sampler != NULL) {
   if (!visit_deref_src(instr->sampler, cb, state))
  return false;
+   }
 
return true;
 }
@@ -1017,15 +1020,17 @@ visit_intrinsic_src(nir_intrinsic_instr *instr, 
nir_foreach_src_cb cb,
 void *state)
 {
unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
-   for (unsigned i = 0; i < num_srcs; i++)
+   for (unsigned i = 0; i < num_srcs; i++) {
   if (!visit_src(>src[i], cb, state))
  return false;
+   }
 
unsigned num_vars =
   nir_intrinsic_infos[instr->intrinsic].num_variables;
-   for (unsigned i = 0; i < num_vars; i++)
+   for (unsigned i = 0; i < num_vars; i++) {
   if (!visit_deref_src(instr->variables[i], cb, state))
  return false;
+   }
 
return true;
 }

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Mesa (master): i965/vec4: Plumb separate surfaces and samplers through from NIR

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: d03e5d52557ce6523eb65dfec9172d6000f5ff8d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d03e5d52557ce6523eb65dfec9172d6000f5ff8d

Author: Jason Ekstrand 
Date:   Mon Nov  2 18:39:17 2015 -0800

i965/vec4: Plumb separate surfaces and samplers through from NIR

Reviewed-by: Kenneth Graunke 

---

 src/mesa/drivers/dri/i965/brw_vec4.h |  3 ++-
 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp |  2 +-
 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp   | 15 ---
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp   | 12 
 4 files changed, 23 insertions(+), 9 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h 
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 1460f45..14a5f0e 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -260,10 +260,11 @@ public:
  src_reg offset_value,
  src_reg mcs,
  bool is_cube_array,
+ uint32_t surface, src_reg surface_reg,
  uint32_t sampler, src_reg sampler_reg);
 
src_reg emit_mcs_fetch(const glsl_type *coordinate_type, src_reg coordinate,
-  src_reg sampler);
+  src_reg surface);
void emit_gen6_gather_wa(uint8_t wa, dst_reg dst);
 
void emit_ndc_computation();
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index b071945..549b707 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -1675,7 +1675,7 @@ generate_code(struct brw_codegen *p,
   case SHADER_OPCODE_TG4:
   case SHADER_OPCODE_TG4_OFFSET:
   case SHADER_OPCODE_SAMPLEINFO:
- generate_tex(p, prog_data, inst, dst, src[0], src[1], src[1]);
+ generate_tex(p, prog_data, inst, dst, src[0], src[1], src[2]);
  break;
 
   case VS_OPCODE_URB_WRITE:
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 41d20ff..ca6a9de 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -1640,7 +1640,9 @@ void
 vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
 {
unsigned texture = instr->texture_index;
+   unsigned sampler = instr->sampler_index;
src_reg texture_reg = brw_imm_ud(texture);
+   src_reg sampler_reg = brw_imm_ud(sampler);
src_reg coordinate;
const glsl_type *coord_type = NULL;
src_reg shadow_comparitor;
@@ -1738,8 +1740,14 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
  break;
   }
 
-  case nir_tex_src_sampler_offset:
- break; /* Ignored for now */
+  case nir_tex_src_sampler_offset: {
+ /* Emit code to evaluate the actual indexing expression */
+ src_reg src = get_nir_src(instr->src[i].src, 1);
+ src_reg temp(this, glsl_type::uint_type);
+ emit(ADD(dst_reg(temp), src, brw_imm_ud(sampler)));
+ sampler_reg = emit_uniformize(temp);
+ break;
+  }
 
   case nir_tex_src_projector:
  unreachable("Should be lowered by do_lower_texture_projection");
@@ -1795,7 +1803,8 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
 shadow_comparitor,
 lod, lod2, sample_index,
 constant_offset, offset_value,
-mcs, is_cube_array, texture, texture_reg);
+mcs, is_cube_array,
+texture, texture_reg, sampler, sampler_reg);
 }
 
 void
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 443d0eb..96dbc37 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -815,13 +815,14 @@ vec4_visitor::emit_uniformize(const src_reg )
 
 src_reg
 vec4_visitor::emit_mcs_fetch(const glsl_type *coordinate_type,
- src_reg coordinate, src_reg sampler)
+ src_reg coordinate, src_reg surface)
 {
vec4_instruction *inst =
   new(mem_ctx) vec4_instruction(SHADER_OPCODE_TXF_MCS,
 dst_reg(this, glsl_type::uvec4_type));
inst->base_mrf = 2;
-   inst->src[1] = sampler;
+   inst->src[1] = surface;
+   inst->src[2] = surface;
 
int param_base;
 
@@ -877,6 +878,8 @@ vec4_visitor::emit_texture(ir_texture_opcode op,
src_reg offset_value,
src_reg mcs,
bool is_cube_array,
+   uint32_t surface,
+   src_reg surface_reg,
uint32_t sampler,
src_reg sampler_reg)
 {
@@ -942,7 +945,8 @@ vec4_visitor::emit_texture(ir_texture_opcode op,
inst->dst.writemask = 

Mesa (master): i965/vec4: Separate the sampler from the surface in generate_tex

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: f88027f7bda781701c74bf71ebf89aa3b30b70d8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f88027f7bda781701c74bf71ebf89aa3b30b70d8

Author: Jason Ekstrand 
Date:   Mon Nov  2 18:28:49 2015 -0800

i965/vec4: Separate the sampler from the surface in generate_tex

Reviewed-by: Kenneth Graunke 

---

 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 18 +-
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index ee39777..b071945 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -109,6 +109,7 @@ generate_tex(struct brw_codegen *p,
  vec4_instruction *inst,
  struct brw_reg dst,
  struct brw_reg src,
+ struct brw_reg surface_index,
  struct brw_reg sampler_index)
 {
const struct brw_device_info *devinfo = p->devinfo;
@@ -264,14 +265,16 @@ generate_tex(struct brw_codegen *p,
  ? prog_data->base.binding_table.gather_texture_start
  : prog_data->base.binding_table.texture_start;
 
-   if (sampler_index.file == BRW_IMMEDIATE_VALUE) {
+   if (surface_index.file == BRW_IMMEDIATE_VALUE &&
+   sampler_index.file == BRW_IMMEDIATE_VALUE) {
+  uint32_t surface = surface_index.ud;
   uint32_t sampler = sampler_index.ud;
 
   brw_SAMPLE(p,
  dst,
  inst->base_mrf,
  src,
- sampler + base_binding_table_index,
+ surface + base_binding_table_index,
  sampler % 16,
  msg_type,
  1, /* response length */
@@ -285,14 +288,19 @@ generate_tex(struct brw_codegen *p,
   /* Non-constant sampler index. */
 
   struct brw_reg addr = vec1(retype(brw_address_reg(0), 
BRW_REGISTER_TYPE_UD));
+  struct brw_reg surface_reg = vec1(retype(surface_index, 
BRW_REGISTER_TYPE_UD));
   struct brw_reg sampler_reg = vec1(retype(sampler_index, 
BRW_REGISTER_TYPE_UD));
 
   brw_push_insn_state(p);
   brw_set_default_mask_control(p, BRW_MASK_DISABLE);
   brw_set_default_access_mode(p, BRW_ALIGN_1);
 
-  /* addr = ((sampler * 0x101) + base_binding_table_index) & 0xfff */
-  brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101));
+  if (memcmp(_reg, _reg, sizeof(surface_reg)) == 0) {
+ brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101));
+  } else {
+ brw_SHL(p, addr, sampler_reg, brw_imm_ud(8));
+ brw_OR(p, addr, addr, surface_reg);
+  }
   if (base_binding_table_index)
  brw_ADD(p, addr, addr, brw_imm_ud(base_binding_table_index));
   brw_AND(p, addr, addr, brw_imm_ud(0xfff));
@@ -1667,7 +1675,7 @@ generate_code(struct brw_codegen *p,
   case SHADER_OPCODE_TG4:
   case SHADER_OPCODE_TG4_OFFSET:
   case SHADER_OPCODE_SAMPLEINFO:
- generate_tex(p, prog_data, inst, dst, src[0], src[1]);
+ generate_tex(p, prog_data, inst, dst, src[0], src[1], src[1]);
  break;
 
   case VS_OPCODE_URB_WRITE:

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Mesa (master): st/mesa: clarify some texture target code in st_cb_drawpix.c

[Brian Paul]

Module: Mesa
Branch: master
Commit: cac54d7987ce1b878d41160f6429fb38e85a603c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cac54d7987ce1b878d41160f6429fb38e85a603c

Author: Brian Paul 
Date:   Tue Feb  9 14:44:54 2016 -0700

st/mesa: clarify some texture target code in st_cb_drawpix.c

Use st->internal_target instead of PIPE_TEXTURE_2D when choosing the
texture format.  Probably no real difference, but let's be consistent.

Simplify a test when determining whether we need normalized texcoords.

Add a new assertion.

Reviewed-by: Roland Scheidegger 

---

 src/mesa/state_tracker/st_cb_drawpixels.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c 
b/src/mesa/state_tracker/st_cb_drawpixels.c
index 7096bd2..fd58886 100644
--- a/src/mesa/state_tracker/st_cb_drawpixels.c
+++ b/src/mesa/state_tracker/st_cb_drawpixels.c
@@ -358,8 +358,8 @@ make_texture(struct st_context *st,
   GLenum intFormat = internal_format(ctx, format, type);
 
   pipeFormat = st_choose_format(st, intFormat, format, type,
-PIPE_TEXTURE_2D, 0, PIPE_BIND_SAMPLER_VIEW,
-FALSE);
+st->internal_target, 0,
+PIPE_BIND_SAMPLER_VIEW, FALSE);
   assert(pipeFormat != PIPE_FORMAT_NONE);
}
 
@@ -556,7 +556,9 @@ draw_textured_quad(struct gl_context *ctx, GLint x, GLint 
y, GLfloat z,
struct cso_context *cso = st->cso_context;
GLfloat x0, y0, x1, y1;
GLsizei maxSize;
-   boolean normalized = sv[0]->texture->target != PIPE_TEXTURE_RECT;
+   boolean normalized = sv[0]->texture->target == PIPE_TEXTURE_2D;
+
+   assert(sv[0]->texture->target == st->internal_target);
 
/* limit checks */
/* XXX if DrawPixels image is larger than max texture size, break

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Mesa (master): st/mesa: fix bitmap texture target code and simplify tex sampler state

[Brian Paul]

Module: Mesa
Branch: master
Commit: 5e4de781fadea9e138e722c53a2e72eeb1d41a5a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e4de781fadea9e138e722c53a2e72eeb1d41a5a

Author: Brian Paul 
Date:   Tue Feb  9 14:35:31 2016 -0700

st/mesa: fix bitmap texture target code and simplify tex sampler state

Bitmaps may be drawn with a PIPE_TEXTURE_2D or PIPE_TEXTURE_RECT resource
as determined at context creation by checking if PIPE_CAP_NPOT_TEXTURES is
supported.  But many places in the bitmap code were hard-coded to use
PIPE_TEXTURE_2D.  Use st->internal_target instead.

I think an older NV chip is the only case where a gallium driver does not
support NPOT textures.  Bitmap drawing was probably broken for that GPU.

Also, we only need one sampler state with texcoord normalization set up
according to st->internal_target.

Reviewed-by: Roland Scheidegger 

---

 src/mesa/state_tracker/st_cb_bitmap.c | 32 
 src/mesa/state_tracker/st_context.h   |  2 +-
 2 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/src/mesa/state_tracker/st_cb_bitmap.c 
b/src/mesa/state_tracker/st_cb_bitmap.c
index 34809ad..627b8cb 100644
--- a/src/mesa/state_tracker/st_cb_bitmap.c
+++ b/src/mesa/state_tracker/st_cb_bitmap.c
@@ -251,8 +251,7 @@ setup_render_state(struct gl_context *ctx,
   for (i = 0; i < st->state.num_samplers[PIPE_SHADER_FRAGMENT]; i++) {
  samplers[i] = >state.samplers[PIPE_SHADER_FRAGMENT][i];
   }
-  samplers[fpv->bitmap_sampler] =
- >bitmap.samplers[sv->texture->target != PIPE_TEXTURE_RECT];
+  samplers[fpv->bitmap_sampler] = >bitmap.sampler;
   cso_set_samplers(cso, PIPE_SHADER_FRAGMENT, num,
(const struct pipe_sampler_state **) samplers);
}
@@ -438,7 +437,7 @@ reset_cache(struct st_context *st)
assert(!cache->texture);
 
/* allocate a new texture */
-   cache->texture = st_texture_create(st, PIPE_TEXTURE_2D,
+   cache->texture = st_texture_create(st, st->internal_target,
   st->bitmap.tex_format, 0,
   BITMAP_CACHE_WIDTH, BITMAP_CACHE_HEIGHT,
   1, 1, 0,
@@ -624,26 +623,27 @@ accum_bitmap(struct gl_context *ctx,
 static void
 init_bitmap_state(struct st_context *st)
 {
-   struct pipe_sampler_state *sampler = >bitmap.samplers[0];
struct pipe_context *pipe = st->pipe;
struct pipe_screen *screen = pipe->screen;
 
/* This function should only be called once */
assert(st->bitmap.cache == NULL);
 
+   assert(st->internal_target == PIPE_TEXTURE_2D ||
+  st->internal_target == PIPE_TEXTURE_RECT);
+
/* alloc bitmap cache object */
st->bitmap.cache = ST_CALLOC_STRUCT(bitmap_cache);
 
/* init sampler state once */
-   memset(sampler, 0, sizeof(*sampler));
-   sampler->wrap_s = PIPE_TEX_WRAP_CLAMP;
-   sampler->wrap_t = PIPE_TEX_WRAP_CLAMP;
-   sampler->wrap_r = PIPE_TEX_WRAP_CLAMP;
-   sampler->min_img_filter = PIPE_TEX_FILTER_NEAREST;
-   sampler->min_mip_filter = PIPE_TEX_MIPFILTER_NONE;
-   sampler->mag_img_filter = PIPE_TEX_FILTER_NEAREST;
-   st->bitmap.samplers[1] = *sampler;
-   st->bitmap.samplers[1].normalized_coords = 1;
+   memset(>bitmap.sampler, 0, sizeof(st->bitmap.sampler));
+   st->bitmap.sampler.wrap_s = PIPE_TEX_WRAP_CLAMP;
+   st->bitmap.sampler.wrap_t = PIPE_TEX_WRAP_CLAMP;
+   st->bitmap.sampler.wrap_r = PIPE_TEX_WRAP_CLAMP;
+   st->bitmap.sampler.min_img_filter = PIPE_TEX_FILTER_NEAREST;
+   st->bitmap.sampler.min_mip_filter = PIPE_TEX_MIPFILTER_NONE;
+   st->bitmap.sampler.mag_img_filter = PIPE_TEX_FILTER_NEAREST;
+   st->bitmap.sampler.normalized_coords = st->internal_target == 
PIPE_TEXTURE_2D;
 
/* init baseline rasterizer state once */
memset(>bitmap.rasterizer, 0, sizeof(st->bitmap.rasterizer));
@@ -653,17 +653,17 @@ init_bitmap_state(struct st_context *st)
 
/* find a usable texture format */
if (screen->is_format_supported(screen, PIPE_FORMAT_I8_UNORM,
-   PIPE_TEXTURE_2D, 0,
+   st->internal_target, 0,
PIPE_BIND_SAMPLER_VIEW)) {
   st->bitmap.tex_format = PIPE_FORMAT_I8_UNORM;
}
else if (screen->is_format_supported(screen, PIPE_FORMAT_A8_UNORM,
-PIPE_TEXTURE_2D, 0,
+st->internal_target, 0,
 PIPE_BIND_SAMPLER_VIEW)) {
   st->bitmap.tex_format = PIPE_FORMAT_A8_UNORM;
}
else if (screen->is_format_supported(screen, PIPE_FORMAT_L8_UNORM,
-PIPE_TEXTURE_2D, 0,
+st->internal_target, 0,
 PIPE_BIND_SAMPLER_VIEW)) {
   st->bitmap.tex_format = PIPE_FORMAT_L8_UNORM;
}
diff --git a/src/mesa/state_tracker/st_context.h 

Mesa (master): st/mesa: move some st_cb_drawpixels.c code, add comments

[Brian Paul]

Module: Mesa
Branch: master
Commit: a5b8ede25319217843f8ff7681a0af5ad4aab84a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a5b8ede25319217843f8ff7681a0af5ad4aab84a

Author: Brian Paul 
Date:   Tue Feb  9 14:19:25 2016 -0700

st/mesa: move some st_cb_drawpixels.c code, add comments

---

 src/mesa/state_tracker/st_cb_drawpixels.c | 39 +--
 1 file changed, 22 insertions(+), 17 deletions(-)

diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c 
b/src/mesa/state_tracker/st_cb_drawpixels.c
index 04a9de0..9c1eba4 100644
--- a/src/mesa/state_tracker/st_cb_drawpixels.c
+++ b/src/mesa/state_tracker/st_cb_drawpixels.c
@@ -648,6 +648,7 @@ draw_textured_quad(struct gl_context *ctx, GLint x, GLint 
y, GLfloat z,
   sampler.normalized_coords = normalized;
 
   if (fpv) {
+ /* drawing a color image */
  const struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
  uint num = MAX2(MAX2(fpv->drawpix_sampler, fpv->pixelmap_sampler) + 1,
  st->state.num_samplers[PIPE_SHADER_FRAGMENT]);
@@ -662,12 +663,33 @@ draw_textured_quad(struct gl_context *ctx, GLint x, GLint 
y, GLfloat z,
 
  cso_set_samplers(cso, PIPE_SHADER_FRAGMENT, num, samplers);
   } else {
+ /* drawing a depth/stencil image */
  const struct pipe_sampler_state *samplers[2] = {, };
 
  cso_set_samplers(cso, PIPE_SHADER_FRAGMENT, num_sampler_view, 
samplers);
   }
}
 
+   /* user textures, plus the drawpix textures */
+   if (fpv) {
+  /* drawing a color image */
+  struct pipe_sampler_view *sampler_views[PIPE_MAX_SAMPLERS];
+  uint num = MAX3(fpv->drawpix_sampler + 1,
+  fpv->pixelmap_sampler + 1,
+  st->state.num_sampler_views[PIPE_SHADER_FRAGMENT]);
+
+  memcpy(sampler_views, st->state.sampler_views[PIPE_SHADER_FRAGMENT],
+ sizeof(sampler_views));
+
+  sampler_views[fpv->drawpix_sampler] = sv[0];
+  if (sv[1])
+ sampler_views[fpv->pixelmap_sampler] = sv[1];
+  cso_set_sampler_views(cso, PIPE_SHADER_FRAGMENT, num, sampler_views);
+   } else {
+  /* drawing a depth/stencil image */
+  cso_set_sampler_views(cso, PIPE_SHADER_FRAGMENT, num_sampler_view, sv);
+   }
+
/* viewport state: viewport matching window dims */
{
   const float w = (float) ctx->DrawBuffer->Width;
@@ -685,23 +707,6 @@ draw_textured_quad(struct gl_context *ctx, GLint x, GLint 
y, GLfloat z,
cso_set_vertex_elements(cso, 3, st->velems_util_draw);
cso_set_stream_outputs(st->cso_context, 0, NULL, NULL);
 
-   /* user textures, plus the drawpix textures */
-   if (fpv) {
-  struct pipe_sampler_view *sampler_views[PIPE_MAX_SAMPLERS];
-  uint num = MAX3(fpv->drawpix_sampler + 1,
-  fpv->pixelmap_sampler + 1,
-  st->state.num_sampler_views[PIPE_SHADER_FRAGMENT]);
-
-  memcpy(sampler_views, st->state.sampler_views[PIPE_SHADER_FRAGMENT],
- sizeof(sampler_views));
-
-  sampler_views[fpv->drawpix_sampler] = sv[0];
-  if (sv[1])
- sampler_views[fpv->pixelmap_sampler] = sv[1];
-  cso_set_sampler_views(cso, PIPE_SHADER_FRAGMENT, num, sampler_views);
-   } else
-  cso_set_sampler_views(cso, PIPE_SHADER_FRAGMENT, num_sampler_view, sv);
-
/* Compute Gallium window coords (y=0=top) with pixel zoom.
 * Recall that these coords are transformed by the current
 * vertex shader and viewport transformation.

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Mesa (master): st/mesa: use MAX3() macro, as we do for sampler view code below

[Brian Paul]

Module: Mesa
Branch: master
Commit: 9e2a9d5743246e0fdaa03fe90f8dc341cea10907
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e2a9d5743246e0fdaa03fe90f8dc341cea10907

Author: Brian Paul 
Date:   Tue Feb  9 14:20:41 2016 -0700

st/mesa: use MAX3() macro, as we do for sampler view code below

Reviewed-by: Roland Scheidegger 

---

 src/mesa/state_tracker/st_cb_drawpixels.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c 
b/src/mesa/state_tracker/st_cb_drawpixels.c
index 9c1eba4..7096bd2 100644
--- a/src/mesa/state_tracker/st_cb_drawpixels.c
+++ b/src/mesa/state_tracker/st_cb_drawpixels.c
@@ -650,7 +650,8 @@ draw_textured_quad(struct gl_context *ctx, GLint x, GLint 
y, GLfloat z,
   if (fpv) {
  /* drawing a color image */
  const struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
- uint num = MAX2(MAX2(fpv->drawpix_sampler, fpv->pixelmap_sampler) + 1,
+ uint num = MAX3(fpv->drawpix_sampler + 1,
+ fpv->pixelmap_sampler + 1,
  st->state.num_samplers[PIPE_SHADER_FRAGMENT]);
  uint i;
 

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Mesa (master): i965/vec4/gs: Stop munging the ATTR containing gl_PointSize.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 67c5d00273ca248d681bc73e81a53a8c45741991
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=67c5d00273ca248d681bc73e81a53a8c45741991

Author: Kenneth Graunke 
Date:   Wed Jan 13 20:33:16 2016 -0800

i965/vec4/gs: Stop munging the ATTR containing gl_PointSize.

gl_PointSize is delivered in the .w component of the VUE header, while
the language expects it to be a float (and thus in the .x component).

Previously, we emitted MOVs to copy it over to the .x component.
But this is silly - we can just use a . swizzle and access it
without copying anything or clobbering the value stored at .x
(which admittedly is useless).

Removes the last use of ATTR destinations.

v2: Use BRW_SWIZZLE_, not SWIZZLE_ (caught by GCC).

Signed-off-by: Kenneth Graunke 
Reviewed-by: Matt Turner 
Reviewed-by: Chris Forbes 

---

 src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp |  4 
 src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 23 ---
 2 files changed, 4 insertions(+), 23 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp
index 6f66978..d9c048e 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_nir.cpp
@@ -73,6 +73,10 @@ vec4_gs_visitor::nir_emit_intrinsic(nir_intrinsic_instr 
*instr)
   src = src_reg(ATTR, BRW_VARYING_SLOT_COUNT * vertex->u[0] +
   instr->const_index[0] + offset->u[0],
 type);
+  /* gl_PointSize is passed in the .w component of the VUE header */
+  if (instr->const_index[0] == VARYING_SLOT_PSIZ)
+ src.swizzle = BRW_SWIZZLE_;
+
   dest = get_nir_dest(instr->dest, src.type);
   dest.writemask = brw_writemask_for_size(instr->num_components);
   emit(MOV(dest, src));
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
index b2a971a..1b63d56 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
@@ -182,29 +182,6 @@ vec4_gs_visitor::emit_prolog()
   }
}
 
-   /* If the geometry shader uses the gl_PointSize input, we need to fix it up
-* to account for the fact that the vertex shader stored it in the w
-* component of VARYING_SLOT_PSIZ.
-*/
-   if (nir->info.inputs_read & VARYING_BIT_PSIZ) {
-  this->current_annotation = "swizzle gl_PointSize input";
-  for (int vertex = 0; vertex < (int)nir->info.gs.vertices_in; vertex++) {
- dst_reg dst(ATTR,
- BRW_VARYING_SLOT_COUNT * vertex + VARYING_SLOT_PSIZ);
- dst.type = BRW_REGISTER_TYPE_F;
- src_reg src(dst);
- dst.writemask = WRITEMASK_X;
- src.swizzle = BRW_SWIZZLE_;
- inst = emit(MOV(dst, src));
-
- /* In dual instanced dispatch mode, dst has a width of 4, so we need
-  * to make sure the MOV happens regardless of which channels are
-  * enabled.
-  */
- inst->force_writemask_all = true;
-  }
-   }
-
this->current_annotation = NULL;
 }
 

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Mesa (master): i965: Apply VS attribute workarounds in NIR.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: d56ae2d1605fc1b5a3fdf5aba9aefc3c7692a4ba
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d56ae2d1605fc1b5a3fdf5aba9aefc3c7692a4ba

Author: Kenneth Graunke 
Date:   Wed Jan 13 20:33:15 2016 -0800

i965: Apply VS attribute workarounds in NIR.

This patch re-implements the pre-Haswell VS attribute workarounds.
Instead of emitting shader code in the vec4 backend, we now simply
call a NIR pass to emit the necessary code.

This simplifies the vec4 backend.  Beyond deleting code, it removes
the primary use of ATTR as a destination.  It also eliminates the
requirement that the vec4 VS backend express the ATTR file in terms
of VERT_ATTRIB_* locations, giving us a bit more flexibility.

This approach is a little different: rather than munging the attributes
at the top, we emit code to fix them up when they're accessed.  However,
we run the optimizer afterwards, so CSE should eliminate the redundant
math.  It may even be able to fuse it with other calculations based on
the input value.

shader-db does not handle non-default NOS settings, so I have no
statistics about this patch.

Note that the scalar backend does not implement VS attribute
workarounds, as they are unnecessary on hardware which allows SIMD8 VS.

v2: Do one multiply for FIXED rescaling and select components from
either the original or scaled copy, rather than multiplying each
component separately (suggested by Matt Turner).

Signed-off-by: Kenneth Graunke 
Reviewed-by: Matt Turner 
Reviewed-by: Chris Forbes 

---

 src/mesa/drivers/dri/i965/Makefile.sources |   1 +
 src/mesa/drivers/dri/i965/brw_nir.c|  19 ++-
 src/mesa/drivers/dri/i965/brw_nir.h|   7 +-
 .../dri/i965/brw_nir_attribute_workarounds.c   | 176 +
 src/mesa/drivers/dri/i965/brw_shader.cpp   |   2 +-
 src/mesa/drivers/dri/i965/brw_vec4.cpp |   3 +
 src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp |   2 +-
 src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp  | 109 -
 8 files changed, 202 insertions(+), 117 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
b/src/mesa/drivers/dri/i965/Makefile.sources
index caabb0d..300c139 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -43,6 +43,7 @@ i965_compiler_FILES = \
brw_nir.h \
brw_nir.c \
brw_nir_analyze_boolean_resolves.c \
+   brw_nir_attribute_workarounds.c \
brw_nir_opt_peephole_ffma.c \
brw_nir_uniforms.cpp \
brw_packed_float.c \
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c 
b/src/mesa/drivers/dri/i965/brw_nir.c
index 46b5116..41059b3 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -205,7 +205,9 @@ remap_patch_urb_offsets(nir_block *block, void *closure)
 static void
 brw_nir_lower_inputs(nir_shader *nir,
  const struct brw_device_info *devinfo,
- bool is_scalar)
+ bool is_scalar,
+ bool use_legacy_snorm_formula,
+ const uint8_t *vs_attrib_wa_flags)
 {
switch (nir->stage) {
case MESA_SHADER_VERTEX:
@@ -225,6 +227,9 @@ brw_nir_lower_inputs(nir_shader *nir,
 
   add_const_offset_to_base(nir, nir_var_shader_in);
 
+  brw_nir_apply_attribute_workarounds(nir, use_legacy_snorm_formula,
+  vs_attrib_wa_flags);
+
   if (is_scalar) {
  /* Finally, translate VERT_ATTRIB_* values into the actual registers.
   *
@@ -501,12 +506,15 @@ brw_preprocess_nir(nir_shader *nir, bool is_scalar)
 nir_shader *
 brw_nir_lower_io(nir_shader *nir,
  const struct brw_device_info *devinfo,
- bool is_scalar)
+ bool is_scalar,
+ bool use_legacy_snorm_formula,
+ const uint8_t *vs_attrib_wa_flags)
 {
bool progress; /* Written by OPT and OPT_V */
(void)progress;
 
-   OPT_V(brw_nir_lower_inputs, devinfo, is_scalar);
+   OPT_V(brw_nir_lower_inputs, devinfo, is_scalar,
+ use_legacy_snorm_formula, vs_attrib_wa_flags);
OPT_V(brw_nir_lower_outputs, devinfo, is_scalar);
OPT_V(nir_lower_io, nir_var_all, is_scalar ? type_size_scalar : 
type_size_vec4);
 
@@ -617,9 +625,10 @@ brw_create_nir(struct brw_context *brw,
   OPT_V(nir_lower_atomics, shader_prog);
}
 
-   if (nir->stage != MESA_SHADER_TESS_CTRL &&
+   if (nir->stage != MESA_SHADER_VERTEX &&
+   nir->stage != MESA_SHADER_TESS_CTRL &&
nir->stage != MESA_SHADER_TESS_EVAL) {
-  nir = brw_nir_lower_io(nir, devinfo, is_scalar);
+  nir = brw_nir_lower_io(nir, devinfo, is_scalar, false, NULL);
}
 
return nir;
diff --git a/src/mesa/drivers/dri/i965/brw_nir.h 
b/src/mesa/drivers/dri/i965/brw_nir.h
index 

Mesa (master): i965/vec4: Drop support for ATTR as an instruction destination.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 85f5c18fef1ff2f19d698f150e23a02acd6f59b9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=85f5c18fef1ff2f19d698f150e23a02acd6f59b9

Author: Kenneth Graunke 
Date:   Wed Jan 13 20:33:17 2016 -0800

i965/vec4: Drop support for ATTR as an instruction destination.

This is no longer necessary...and it doesn't make much sense to
have inputs as destinations.

Signed-off-by: Kenneth Graunke 
Reviewed-by: Matt Turner 
Reviewed-by: Chris Forbes 

---

 src/mesa/drivers/dri/i965/brw_vec4.cpp | 16 
 1 file changed, 16 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 109080a..0d8c104 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1522,22 +1522,6 @@ vec4_visitor::lower_attributes_to_hw_regs(const int 
*attribute_map,
   bool interleaved)
 {
foreach_block_and_inst(block, vec4_instruction, inst, cfg) {
-  /* We have to support ATTR as a destination for GL_FIXED fixup. */
-  if (inst->dst.file == ATTR) {
- int grf = attribute_map[inst->dst.nr + inst->dst.reg_offset];
-
- /* All attributes used in the shader need to have been assigned a
-  * hardware register by the caller
-  */
- assert(grf != 0);
-
-struct brw_reg reg = attribute_to_hw_reg(grf, interleaved);
-reg.type = inst->dst.type;
-reg.writemask = inst->dst.writemask;
-
- inst->dst = reg;
-  }
-
   for (int i = 0; i < 3; i++) {
 if (inst->src[i].file != ATTR)
continue;

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Mesa (master): mesa: fix trivial comment typo in dlist.c

[Brian Paul]

Module: Mesa
Branch: master
Commit: 85fab1f09a2aa8e537203c350b7392c9b52ef86b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=85fab1f09a2aa8e537203c350b7392c9b52ef86b

Author: Brian Paul 
Date:   Tue Feb  9 20:09:26 2016 -0700

mesa: fix trivial comment typo in dlist.c

---

 src/mesa/main/dlist.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/main/dlist.c b/src/mesa/main/dlist.c
index fb31d2f..0e25efb 100644
--- a/src/mesa/main/dlist.c
+++ b/src/mesa/main/dlist.c
@@ -607,7 +607,7 @@ void mesa_print_display_list(GLuint list);
 
 /**
  * Allocate a gl_display_list object with an initial block of storage.
- * \param count  how many display list nodes/tokes to allocate
+ * \param count  how many display list nodes/tokens to allocate
  */
 static struct gl_display_list *
 make_list(GLuint name, GLuint count)

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Mesa (master): i965: Use constant pointer when checking for compression

[Topi Pohjolainen]

Module: Mesa
Branch: master
Commit: 3c432d48bfe8b3d3326c16aed191fa80a5400963
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c432d48bfe8b3d3326c16aed191fa80a5400963

Author: Topi Pohjolainen 
Date:   Mon Dec  7 21:58:33 2015 +0200

i965: Use constant pointer when checking for compression

Signed-off-by: Topi Pohjolainen 
Reviewed-by: Ben Widawsky 

---

 src/mesa/drivers/dri/i965/brw_context.h | 2 +-
 src/mesa/drivers/dri/i965/brw_surface_formats.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index 55d6723..5c63b8f 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1573,7 +1573,7 @@ void brw_upload_image_surfaces(struct brw_context *brw,
 /* brw_surface_formats.c */
 bool brw_render_target_supported(struct brw_context *brw,
  struct gl_renderbuffer *rb);
-bool brw_losslessly_compressible_format(struct brw_context *brw,
+bool brw_losslessly_compressible_format(const struct brw_context *brw,
 uint32_t brw_format);
 uint32_t brw_depth_format(struct brw_context *brw, mesa_format format);
 mesa_format brw_lower_mesa_image_format(const struct brw_device_info *devinfo,
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c 
b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index b5c1a35..3c0b23b 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -824,7 +824,7 @@ brw_render_target_supported(struct brw_context *brw,
  * compression.
  */
 bool
-brw_losslessly_compressible_format(struct brw_context *brw,
+brw_losslessly_compressible_format(const struct brw_context *brw,
uint32_t brw_format)
 {
const struct surface_format_info * const sinfo =

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Mesa (master): i965/gen8: Remove dead assertion

[Topi Pohjolainen]

Module: Mesa
Branch: master
Commit: 878b2b8964c23d3be72dc28ef1a9758927f53214
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=878b2b8964c23d3be72dc28ef1a9758927f53214

Author: Topi Pohjolainen 
Date:   Sun Jan  3 15:06:09 2016 +0200

i965/gen8: Remove dead assertion

The assertion is inside a condition mandating num_samples > 1 and
therefore the first half of the constraint is always met. The
second half in turn would only be applicable for single sampled
case and moreover it is trying to falsely check against surface
type instead of format.
Subsequent patches will introduce proper support for the lossless
compression and dropping this here makes the patches a little
simpler.

Signed-off-by: Topi Pohjolainen 
Reviewed-by: Ben Widawsky 

---

 src/mesa/drivers/dri/i965/gen8_surface_state.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c 
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 0df25d2..fc8f701 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -243,12 +243,6 @@ gen8_emit_texture_surface_state(struct brw_context *brw,
*/
   if (brw->gen >= 9 || mt->num_samples == 1)
  assert(mt->halign == 16);
-
-  if (brw->gen >= 9) {
- assert(mt->num_samples > 1 ||
-brw_losslessly_compressible_format(brw, surf_type));
-  }
-
}
 
uint32_t *surf = allocate_surface_state(brw, surf_offset, surf_index);

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